Merge branch '7.8'
[mesa.git] / src / gallium / drivers / nv50 / nv50_texture.h
1 #ifndef __NV50_TEXTURE_H__
2 #define __NV50_TEXTURE_H__
3
4 /* It'd be really nice to have these in nouveau_class.h generated by
5 * renouveau like the rest of the object header - but not sure it can
6 * handle non-object stuff nicely - need to look into it.
7 */
8
9 /* Texture image control block */
10 #define NV50TIC_0_0_SWIZZLE_MASK 0x3ffc0000
11 #define NV50TIC_0_0_MAPA_MASK 0x38000000
12 #define NV50TIC_0_0_MAPA_SHIFT 27
13 #define NV50TIC_0_0_MAPA_ZERO 0x00000000
14 #define NV50TIC_0_0_MAPA_C0 0x10000000
15 #define NV50TIC_0_0_MAPA_C1 0x18000000
16 #define NV50TIC_0_0_MAPA_C2 0x20000000
17 #define NV50TIC_0_0_MAPA_C3 0x28000000
18 #define NV50TIC_0_0_MAPA_ONE 0x38000000
19 #define NV50TIC_0_0_MAPB_MASK 0x07000000
20 #define NV50TIC_0_0_MAPB_SHIFT 24
21 #define NV50TIC_0_0_MAPB_ZERO 0x00000000
22 #define NV50TIC_0_0_MAPB_C0 0x02000000
23 #define NV50TIC_0_0_MAPB_C1 0x03000000
24 #define NV50TIC_0_0_MAPB_C2 0x04000000
25 #define NV50TIC_0_0_MAPB_C3 0x05000000
26 #define NV50TIC_0_0_MAPB_ONE 0x07000000
27 #define NV50TIC_0_0_MAPG_MASK 0x00e00000
28 #define NV50TIC_0_0_MAPG_SHIFT 21
29 #define NV50TIC_0_0_MAPG_ZERO 0x00000000
30 #define NV50TIC_0_0_MAPG_C0 0x00400000
31 #define NV50TIC_0_0_MAPG_C1 0x00600000
32 #define NV50TIC_0_0_MAPG_C2 0x00800000
33 #define NV50TIC_0_0_MAPG_C3 0x00a00000
34 #define NV50TIC_0_0_MAPG_ONE 0x00e00000
35 #define NV50TIC_0_0_MAPR_MASK 0x001c0000
36 #define NV50TIC_0_0_MAPR_SHIFT 18
37 #define NV50TIC_0_0_MAPR_ZERO 0x00000000
38 #define NV50TIC_0_0_MAPR_C0 0x00080000
39 #define NV50TIC_0_0_MAPR_C1 0x000c0000
40 #define NV50TIC_0_0_MAPR_C2 0x00100000
41 #define NV50TIC_0_0_MAPR_C3 0x00140000
42 #define NV50TIC_0_0_MAPR_ONE 0x001c0000
43 #define NV50TIC_0_0_TYPEA_MASK 0x00038000
44 #define NV50TIC_0_0_TYPEA_UNORM 0x00010000
45 #define NV50TIC_0_0_TYPEA_SNORM 0x00008000
46 #define NV50TIC_0_0_TYPEA_SINT 0x00018000
47 #define NV50TIC_0_0_TYPEA_UINT 0x00020000
48 #define NV50TIC_0_0_TYPEA_FLOAT 0x00038000
49 #define NV50TIC_0_0_TYPEB_MASK 0x00007000
50 #define NV50TIC_0_0_TYPEB_UNORM 0x00002000
51 #define NV50TIC_0_0_TYPEB_SNORM 0x00001000
52 #define NV50TIC_0_0_TYPEB_SINT 0x00003000
53 #define NV50TIC_0_0_TYPEB_UINT 0x00004000
54 #define NV50TIC_0_0_TYPEB_FLOAT 0x00007000
55 #define NV50TIC_0_0_TYPEG_MASK 0x00000e00
56 #define NV50TIC_0_0_TYPEG_UNORM 0x00000400
57 #define NV50TIC_0_0_TYPEG_SNORM 0x00000200
58 #define NV50TIC_0_0_TYPEG_SINT 0x00000600
59 #define NV50TIC_0_0_TYPEG_UINT 0x00000800
60 #define NV50TIC_0_0_TYPEG_FLOAT 0x00000e00
61 #define NV50TIC_0_0_TYPER_MASK 0x000001c0
62 #define NV50TIC_0_0_TYPER_UNORM 0x00000080
63 #define NV50TIC_0_0_TYPER_SNORM 0x00000040
64 #define NV50TIC_0_0_TYPER_SINT 0x000000c0
65 #define NV50TIC_0_0_TYPER_UINT 0x00000100
66 #define NV50TIC_0_0_TYPER_FLOAT 0x000001c0
67 #define NV50TIC_0_0_FMT_MASK 0x0000003f
68 #define NV50TIC_0_0_FMT_32_32_32_32 0x00000001
69 #define NV50TIC_0_0_FMT_16_16_16_16 0x00000003
70 #define NV50TIC_0_0_FMT_32_32 0x00000004
71 #define NV50TIC_0_0_FMT_8_8_8_8 0x00000008
72 #define NV50TIC_0_0_FMT_2_10_10_10 0x00000009
73 #define NV50TIC_0_0_FMT_16_16 0x0000000c
74 #define NV50TIC_0_0_FMT_32 0x0000000f
75 #define NV50TIC_0_0_FMT_4_4_4_4 0x00000012
76 /* #define NV50TIC_0_0_FMT_1_5_5_5 0x00000013 */
77 #define NV50TIC_0_0_FMT_1_5_5_5 0x00000014
78 #define NV50TIC_0_0_FMT_5_6_5 0x00000015
79 #define NV50TIC_0_0_FMT_8_8 0x00000018
80 #define NV50TIC_0_0_FMT_16 0x0000001b
81 #define NV50TIC_0_0_FMT_8 0x0000001d
82 #define NV50TIC_0_0_FMT_5_9_9_9 0x00000020
83 #define NV50TIC_0_0_FMT_10_11_11 0x00000021
84 #define NV50TIC_0_0_FMT_DXT1 0x00000024
85 #define NV50TIC_0_0_FMT_DXT3 0x00000025
86 #define NV50TIC_0_0_FMT_DXT5 0x00000026
87 #define NV50TIC_0_0_FMT_RGTC1 0x00000027
88 #define NV50TIC_0_0_FMT_RGTC2 0x00000028
89 #define NV50TIC_0_0_FMT_24_8 0x00000029
90 #define NV50TIC_0_0_FMT_8_24 0x0000002a
91 #define NV50TIC_0_0_FMT_32_DEPTH 0x0000002f
92 #define NV50TIC_0_0_FMT_32_8 0x00000030
93
94 #define NV50TIC_0_1_OFFSET_LOW_MASK 0xffffffff
95 #define NV50TIC_0_1_OFFSET_LOW_SHIFT 0
96
97 #define NV50TIC_0_2_COLORSPACE_SRGB 0x00000400
98 #define NV50TIC_0_2_TARGET_1D 0x00000000
99 #define NV50TIC_0_2_TARGET_2D 0x00004000
100 #define NV50TIC_0_2_TARGET_3D 0x00008000
101 #define NV50TIC_0_2_TARGET_CUBE 0x0000c000
102 #define NV50TIC_0_2_TARGET_1D_ARRAY 0x00010000
103 #define NV50TIC_0_2_TARGET_2D_ARRAY 0x00014000
104 #define NV50TIC_0_2_TARGET_BUFFER 0x00018000
105 #define NV50TIC_0_2_TARGET_RECT 0x0001c000
106 /* #define NV50TIC_0_0_TILE_MODE_LINEAR 0x00040000 */
107 #define NV50TIC_0_2_TILE_MODE_Y_MASK 0x01c00000
108 #define NV50TIC_0_2_TILE_MODE_Y_SHIFT 22
109 #define NV50TIC_0_2_TILE_MODE_Z_MASK 0x0e000000
110 #define NV50TIC_0_2_TILE_MODE_Z_SHIFT 25
111 #define NV50TIC_0_2_NORMALIZED_COORDS 0x80000000
112
113 #define NV50TIC_0_3_UNKNOWN_MASK 0xffffffff
114
115 #define NV50TIC_0_4_WIDTH_MASK 0x0000ffff
116 #define NV50TIC_0_4_WIDTH_SHIFT 0
117
118 #define NV50TIC_0_5_LAST_LEVEL_MASK 0xf0000000
119 #define NV50TIC_0_5_LAST_LEVEL_SHIFT 28
120 #define NV50TIC_0_5_DEPTH_MASK 0x0fff0000
121 #define NV50TIC_0_5_DEPTH_SHIFT 16
122 #define NV50TIC_0_5_HEIGHT_MASK 0x0000ffff
123 #define NV50TIC_0_5_HEIGHT_SHIFT 0
124 #define NV50TIC_0_6_UNKNOWN_MASK 0xffffffff
125
126 #define NV50TIC_0_7_BASE_LEVEL_MASK 0x0000000f
127 #define NV50TIC_0_7_BASE_LEVEL_SHIFT 0
128 #define NV50TIC_0_7_MAX_LEVEL_MASK 0x000000f0
129 #define NV50TIC_0_7_MAX_LEVEL_SHIFT 4
130
131 /* Texture sampler control block */
132 #define NV50TSC_1_0_WRAPS_MASK 0x00000007
133 #define NV50TSC_1_0_WRAPS_REPEAT 0x00000000
134 #define NV50TSC_1_0_WRAPS_MIRROR_REPEAT 0x00000001
135 #define NV50TSC_1_0_WRAPS_CLAMP_TO_EDGE 0x00000002
136 #define NV50TSC_1_0_WRAPS_CLAMP_TO_BORDER 0x00000003
137 #define NV50TSC_1_0_WRAPS_CLAMP 0x00000004
138 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_EDGE 0x00000005
139 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP_TO_BORDER 0x00000006
140 #define NV50TSC_1_0_WRAPS_MIRROR_CLAMP 0x00000007
141 #define NV50TSC_1_0_WRAPT_MASK 0x00000038
142 #define NV50TSC_1_0_WRAPT_REPEAT 0x00000000
143 #define NV50TSC_1_0_WRAPT_MIRROR_REPEAT 0x00000008
144 #define NV50TSC_1_0_WRAPT_CLAMP_TO_EDGE 0x00000010
145 #define NV50TSC_1_0_WRAPT_CLAMP_TO_BORDER 0x00000018
146 #define NV50TSC_1_0_WRAPT_CLAMP 0x00000020
147 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_EDGE 0x00000028
148 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP_TO_BORDER 0x00000030
149 #define NV50TSC_1_0_WRAPT_MIRROR_CLAMP 0x00000038
150 #define NV50TSC_1_0_WRAPR_MASK 0x000001c0
151 #define NV50TSC_1_0_WRAPR_REPEAT 0x00000000
152 #define NV50TSC_1_0_WRAPR_MIRROR_REPEAT 0x00000040
153 #define NV50TSC_1_0_WRAPR_CLAMP_TO_EDGE 0x00000080
154 #define NV50TSC_1_0_WRAPR_CLAMP_TO_BORDER 0x000000c0
155 #define NV50TSC_1_0_WRAPR_CLAMP 0x00000100
156 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_EDGE 0x00000140
157 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_BORDER 0x00000180
158 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP 0x000001c0
159 #define NV50TSC_1_0_MAX_ANISOTROPY_MASK 0x00700000
160
161 #define NV50TSC_1_1_MAGF_MASK 0x00000003
162 #define NV50TSC_1_1_MAGF_NEAREST 0x00000001
163 #define NV50TSC_1_1_MAGF_LINEAR 0x00000002
164 #define NV50TSC_1_1_MINF_MASK 0x00000030
165 #define NV50TSC_1_1_MINF_NEAREST 0x00000010
166 #define NV50TSC_1_1_MINF_LINEAR 0x00000020
167 #define NV50TSC_1_1_MIPF_MASK 0x000000c0
168 #define NV50TSC_1_1_MIPF_NONE 0x00000040
169 #define NV50TSC_1_1_MIPF_NEAREST 0x00000080
170 #define NV50TSC_1_1_MIPF_LINEAR 0x000000c0
171 #define NV50TSC_1_1_LOD_BIAS_MASK 0x01fff000
172 #define NV50TSC_1_1_UNKN_ANISO_15 0x10000000
173 #define NV50TSC_1_1_UNKN_ANISO_35 0x18000000
174
175 #define NV50TSC_1_2_MIN_LOD_MASK 0x00000f00
176 #define NV50TSC_1_2_MAX_LOD_MASK 0x00f00000
177
178 #define NV50TSC_1_3_UNKNOWN_MASK 0xffffffff
179
180 #define NV50TSC_1_4_BORDER_COLOR_RED_MASK 0xffffffff
181
182 #define NV50TSC_1_5_BORDER_COLOR_GREEN_MASK 0xffffffff
183
184 #define NV50TSC_1_6_BORDER_COLOR_BLUE_MASK 0xffffffff
185
186 #define NV50TSC_1_7_BORDER_COLOR_ALPHA_MASK 0xffffffff
187
188 #endif