Merge branch 'gallium-polygon-stipple'
[mesa.git] / src / gallium / drivers / nv50 / nv50_texture.xml.h
1 #ifndef RNNDB_NV50_TEXTURE_XML
2 #define RNNDB_NV50_TEXTURE_XML
3
4 /* Autogenerated file, DO NOT EDIT manually!
5
6 This file was generated by the rules-ng-ng headergen tool in this git repository:
7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
9
10 The rules-ng-ng source files this header was generated from are:
11 - rnndb/nv50_texture.xml ( 7947 bytes, from 2011-07-09 13:43:58)
12 - ./rnndb/copyright.xml ( 6452 bytes, from 2011-07-09 13:43:58)
13 - ./rnndb/nvchipsets.xml ( 3617 bytes, from 2011-07-09 13:43:58)
14 - ./rnndb/nv50_defs.xml ( 5468 bytes, from 2011-07-09 13:43:58)
15
16 Copyright (C) 2006-2011 by the following authors:
17 - Artur Huillet <arthur.huillet@free.fr> (ahuillet)
18 - Ben Skeggs (darktama, darktama_)
19 - B. R. <koala_br@users.sourceforge.net> (koala_br)
20 - Carlos Martin <carlosmn@users.sf.net> (carlosmn)
21 - Christoph Bumiller <e0425955@student.tuwien.ac.at> (calim, chrisbmr)
22 - Dawid Gajownik <gajownik@users.sf.net> (gajownik)
23 - Dmitry Baryshkov
24 - Dmitry Eremin-Solenikov <lumag@users.sf.net> (lumag)
25 - EdB <edb_@users.sf.net> (edb_)
26 - Erik Waling <erikwailing@users.sf.net> (erikwaling)
27 - Francisco Jerez <currojerez@riseup.net> (curro)
28 - imirkin <imirkin@users.sf.net> (imirkin)
29 - jb17bsome <jb17bsome@bellsouth.net> (jb17bsome)
30 - Jeremy Kolb <kjeremy@users.sf.net> (kjeremy)
31 - Laurent Carlier <lordheavym@gmail.com> (lordheavy)
32 - Luca Barbieri <luca@luca-barbieri.com> (lb, lb1)
33 - Maarten Maathuis <madman2003@gmail.com> (stillunknown)
34 - Marcin Koƛcielnicki <koriakin@0x04.net> (mwk, koriakin)
35 - Mark Carey <mark.carey@gmail.com> (careym)
36 - Matthieu Castet <matthieu.castet@parrot.com> (mat-c)
37 - nvidiaman <nvidiaman@users.sf.net> (nvidiaman)
38 - Patrice Mandin <patmandin@gmail.com> (pmandin, pmdata)
39 - Pekka Paalanen <pq@iki.fi> (pq, ppaalanen)
40 - Peter Popov <ironpeter@users.sf.net> (ironpeter)
41 - Richard Hughes <hughsient@users.sf.net> (hughsient)
42 - Rudi Cilibrasi <cilibrar@users.sf.net> (cilibrar)
43 - Serge Martin
44 - Simon Raffeiner
45 - Stephane Loeuillet <leroutier@users.sf.net> (leroutier)
46 - Stephane Marchesin <stephane.marchesin@gmail.com> (marcheu)
47 - sturmflut <sturmflut@users.sf.net> (sturmflut)
48 - Sylvain Munaut <tnt@246tNt.com>
49 - Victor Stinner <victor.stinner@haypocalc.com> (haypo)
50 - Wladmir van der Laan <laanwj@gmail.com> (miathan6)
51 - Younes Manton <younes.m@gmail.com> (ymanton)
52
53 Permission is hereby granted, free of charge, to any person obtaining
54 a copy of this software and associated documentation files (the
55 "Software"), to deal in the Software without restriction, including
56 without limitation the rights to use, copy, modify, merge, publish,
57 distribute, sublicense, and/or sell copies of the Software, and to
58 permit persons to whom the Software is furnished to do so, subject to
59 the following conditions:
60
61 The above copyright notice and this permission notice (including the
62 next paragraph) shall be included in all copies or substantial
63 portions of the Software.
64
65 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
66 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
67 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
68 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
69 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
70 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
71 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
72 */
73
74
75 #define NV50_TIC_MAP_ZERO 0x00000000
76 #define NV50_TIC_MAP_C0 0x00000002
77 #define NV50_TIC_MAP_C1 0x00000003
78 #define NV50_TIC_MAP_C2 0x00000004
79 #define NV50_TIC_MAP_C3 0x00000005
80 #define NV50_TIC_MAP_ONE_INT 0x00000006
81 #define NV50_TIC_MAP_ONE_FLOAT 0x00000007
82 #define NV50_TIC_TYPE_SNORM 0x00000001
83 #define NV50_TIC_TYPE_UNORM 0x00000002
84 #define NV50_TIC_TYPE_SINT 0x00000003
85 #define NV50_TIC_TYPE_UINT 0x00000004
86 #define NV50_TIC_TYPE_SSCALED 0x00000005
87 #define NV50_TIC_TYPE_USCALED 0x00000006
88 #define NV50_TIC_TYPE_FLOAT 0x00000007
89 #define NV50_TSC_WRAP_REPEAT 0x00000000
90 #define NV50_TSC_WRAP_MIRROR_REPEAT 0x00000001
91 #define NV50_TSC_WRAP_CLAMP_TO_EDGE 0x00000002
92 #define NV50_TSC_WRAP_CLAMP_TO_BORDER 0x00000003
93 #define NV50_TSC_WRAP_CLAMP 0x00000004
94 #define NV50_TSC_WRAP_MIRROR_CLAMP_TO_EDGE 0x00000005
95 #define NV50_TSC_WRAP_MIRROR_CLAMP_TO_BORDER 0x00000006
96 #define NV50_TSC_WRAP_MIRROR_CLAMP 0x00000007
97 #define NV50_TIC__SIZE 0x00000020
98 #define NV50_TIC_0 0x00000000
99 #define NV50_TIC_0_MAPA__MASK 0x38000000
100 #define NV50_TIC_0_MAPA__SHIFT 27
101 #define NV50_TIC_0_MAPB__MASK 0x07000000
102 #define NV50_TIC_0_MAPB__SHIFT 24
103 #define NV50_TIC_0_MAPG__MASK 0x00e00000
104 #define NV50_TIC_0_MAPG__SHIFT 21
105 #define NV50_TIC_0_MAPR__MASK 0x001c0000
106 #define NV50_TIC_0_MAPR__SHIFT 18
107 #define NV50_TIC_0_TYPE3__MASK 0x00038000
108 #define NV50_TIC_0_TYPE3__SHIFT 15
109 #define NV50_TIC_0_TYPE2__MASK 0x00007000
110 #define NV50_TIC_0_TYPE2__SHIFT 12
111 #define NV50_TIC_0_TYPE1__MASK 0x00000e00
112 #define NV50_TIC_0_TYPE1__SHIFT 9
113 #define NV50_TIC_0_TYPE0__MASK 0x000001c0
114 #define NV50_TIC_0_TYPE0__SHIFT 6
115 #define NV50_TIC_0_FMT__MASK 0x0000003f
116 #define NV50_TIC_0_FMT__SHIFT 0
117 #define NV50_TIC_0_FMT_32_32_32_32 0x00000001
118 #define NV50_TIC_0_FMT_16_16_16_16 0x00000003
119 #define NV50_TIC_0_FMT_32_32 0x00000004
120 #define NV50_TIC_0_FMT_32_8_X24 0x00000005
121 #define NV50_TIC_0_FMT_8_8_8_8 0x00000008
122 #define NV50_TIC_0_FMT_10_10_10_2 0x00000009
123 #define NV50_TIC_0_FMT_16_16 0x0000000c
124 #define NV50_TIC_0_FMT_24_8 0x0000000d
125 #define NV50_TIC_0_FMT_8_24 0x0000000e
126 #define NV50_TIC_0_FMT_32 0x0000000f
127 #define NV50_TIC_0_FMT_BPTC_FLOAT 0x00000010
128 #define NV50_TIC_0_FMT_BPTC_UFLOAT 0x00000011
129 #define NV50_TIC_0_FMT_4_4_4_4 0x00000012
130 #define NV50_TIC_0_FMT_1_5_5_5 0x00000013
131 #define NV50_TIC_0_FMT_5_5_5_1 0x00000014
132 #define NV50_TIC_0_FMT_5_6_5 0x00000015
133 #define NV50_TIC_0_FMT_5_5_6 0x00000016
134 #define NV50_TIC_0_FMT_BPTC 0x00000017
135 #define NV50_TIC_0_FMT_8_8 0x00000018
136 #define NV50_TIC_0_FMT_16 0x0000001b
137 #define NV50_TIC_0_FMT_8 0x0000001d
138 #define NV50_TIC_0_FMT_4_4 0x0000001e
139 #define NV50_TIC_0_FMT_BITMAP 0x0000001f
140 #define NV50_TIC_0_FMT_9_9_9_E5 0x00000020
141 #define NV50_TIC_0_FMT_11_11_10 0x00000021
142 #define NV50_TIC_0_FMT_U8_YA8_V8_YB8 0x00000022
143 #define NV50_TIC_0_FMT_YA8_U8_YB8_V8 0x00000023
144 #define NV50_TIC_0_FMT_DXT1 0x00000024
145 #define NV50_TIC_0_FMT_DXT3 0x00000025
146 #define NV50_TIC_0_FMT_DXT5 0x00000026
147 #define NV50_TIC_0_FMT_RGTC1 0x00000027
148 #define NV50_TIC_0_FMT_RGTC2 0x00000028
149 #define NV50_TIC_0_FMT_S8_Z24 0x00000029
150 #define NV50_TIC_0_FMT_Z24_S8 0x0000002a
151 #define NV50_TIC_0_FMT_Z24_X8 0x0000002b
152 #define NV50_TIC_0_FMT_Z24_C8_MS4_CS4 0x0000002c
153 #define NV50_TIC_0_FMT_Z24_C8_MS8_CS8 0x0000002d
154 #define NV50_TIC_0_FMT_Z24_C8_MS4_CS12 0x0000002e
155 #define NV50_TIC_0_FMT_Z32 0x0000002f
156 #define NV50_TIC_0_FMT_Z32_S8_X24 0x00000030
157 #define NV50_TIC_0_FMT_Z24_X8_S8_C8_X16_MS4_CS4 0x00000031
158 #define NV50_TIC_0_FMT_Z24_X8_S8_C8_X16_MS8_CS8 0x00000032
159 #define NV50_TIC_0_FMT_Z32_X8_C8_X16_MS4_CS4 0x00000033
160 #define NV50_TIC_0_FMT_Z32_X8_C8_X16_MS8_CS8 0x00000034
161 #define NV50_TIC_0_FMT_Z32_S8_C8_X16_MS4_CS4 0x00000035
162 #define NV50_TIC_0_FMT_Z32_S8_C8_X16_MS8_CS8 0x00000036
163 #define NV50_TIC_0_FMT_Z24_X8_S8_C8_X16_MS4_CS12 0x00000037
164 #define NV50_TIC_0_FMT_Z32_X8_C8_X16_MS4_CS12 0x00000038
165 #define NV50_TIC_0_FMT_Z32_S8_C8_X16_MS4_CS12 0x00000039
166 #define NV50_TIC_0_FMT_Z16 0x0000003a
167
168 #define NV50_TIC_1 0x00000004
169 #define NV50_TIC_1_OFFSET_LOW__MASK 0xffffffff
170 #define NV50_TIC_1_OFFSET_LOW__SHIFT 0
171
172 #define NV50_TIC_2 0x00000008
173 #define NV50_TIC_2_OFFSET_HIGH__MASK 0x000000ff
174 #define NV50_TIC_2_OFFSET_HIGH__SHIFT 0
175 #define NV50_TIC_2_COLORSPACE_SRGB 0x00000400
176 #define NV50_TIC_2_TARGET__MASK 0x0003c000
177 #define NV50_TIC_2_TARGET__SHIFT 14
178 #define NV50_TIC_2_TARGET_1D 0x00000000
179 #define NV50_TIC_2_TARGET_2D 0x00004000
180 #define NV50_TIC_2_TARGET_3D 0x00008000
181 #define NV50_TIC_2_TARGET_CUBE 0x0000c000
182 #define NV50_TIC_2_TARGET_1D_ARRAY 0x00010000
183 #define NV50_TIC_2_TARGET_2D_ARRAY 0x00014000
184 #define NV50_TIC_2_TARGET_BUFFER 0x00018000
185 #define NV50_TIC_2_TARGET_RECT 0x0001c000
186 #define NV50_TIC_2_TARGET_CUBE_ARRAY 0x00020000
187 #define NV50_TIC_2_LINEAR 0x00040000
188 #define NV50_TIC_2_TILE_MODE_X__MASK 0x00380000
189 #define NV50_TIC_2_TILE_MODE_X__SHIFT 19
190 #define NV50_TIC_2_TILE_MODE_Y__MASK 0x01c00000
191 #define NV50_TIC_2_TILE_MODE_Y__SHIFT 22
192 #define NV50_TIC_2_TILE_MODE_Z__MASK 0x0e000000
193 #define NV50_TIC_2_TILE_MODE_Z__SHIFT 25
194 #define NV50_TIC_2_2D_UNK0258__MASK 0x30000000
195 #define NV50_TIC_2_2D_UNK0258__SHIFT 28
196 #define NV50_TIC_2_NO_BORDER 0x40000000
197 #define NV50_TIC_2_NORMALIZED_COORDS 0x80000000
198
199 #define NV50_TIC_3 0x0000000c
200 #define NV50_TIC_3_PITCH__MASK 0xffffffff
201 #define NV50_TIC_3_PITCH__SHIFT 0
202
203 #define NV50_TIC_4 0x00000010
204 #define NV50_TIC_4_WIDTH__MASK 0xffffffff
205 #define NV50_TIC_4_WIDTH__SHIFT 0
206
207 #define NV50_TIC_5 0x00000014
208 #define NV50_TIC_5_LAST_LEVEL__MASK 0xf0000000
209 #define NV50_TIC_5_LAST_LEVEL__SHIFT 28
210 #define NV50_TIC_5_DEPTH__MASK 0x0fff0000
211 #define NV50_TIC_5_DEPTH__SHIFT 16
212 #define NV50_TIC_5_HEIGHT__MASK 0x0000ffff
213 #define NV50_TIC_5_HEIGHT__SHIFT 0
214
215 #define NV50_TIC_7 0x0000001c
216 #define NV50_TIC_7_BASE_LEVEL__MASK 0x0000000f
217 #define NV50_TIC_7_BASE_LEVEL__SHIFT 0
218 #define NV50_TIC_7_MAX_LEVEL__MASK 0x000000f0
219 #define NV50_TIC_7_MAX_LEVEL__SHIFT 4
220 #define NV50_TIC_7_MS_MODE__MASK 0x0000f000
221 #define NV50_TIC_7_MS_MODE__SHIFT 12
222 #define NV50_TIC_7_MS_MODE_MS1 0x00000000
223 #define NV50_TIC_7_MS_MODE_MS2 0x00001000
224 #define NV50_TIC_7_MS_MODE_MS4 0x00002000
225 #define NV50_TIC_7_MS_MODE_MS8 0x00003000
226 #define NVA3_TIC_7_MS_MODE_MS8_ALT 0x00004000
227 #define NVA3_TIC_7_MS_MODE_MS2_ALT 0x00005000
228 #define NVC0_TIC_7_MS_MODE_UNK6 0x00006000
229 #define NV50_TIC_7_MS_MODE_MS4_CS4 0x00008000
230 #define NV50_TIC_7_MS_MODE_MS4_CS12 0x00009000
231 #define NV50_TIC_7_MS_MODE_MS8_CS8 0x0000a000
232 #define NVC0_TIC_7_MS_MODE_MS8_CS24 0x0000b000
233
234 #define NV50_TSC__SIZE 0x00000020
235 #define NV50_TSC_0 0x00000000
236 #define NV50_TSC_0_WRAPS__MASK 0x00000007
237 #define NV50_TSC_0_WRAPS__SHIFT 0
238 #define NV50_TSC_0_WRAPT__MASK 0x00000038
239 #define NV50_TSC_0_WRAPT__SHIFT 3
240 #define NV50_TSC_0_WRAPR__MASK 0x000001c0
241 #define NV50_TSC_0_WRAPR__SHIFT 6
242 #define NV50_TSC_0_SHADOW_COMPARE_ENABLE 0x00000200
243 #define NV50_TSC_0_SHADOW_COMPARE_FUNC__MASK 0x00001c00
244 #define NV50_TSC_0_SHADOW_COMPARE_FUNC__SHIFT 10
245 #define NV50_TSC_0_BOX_S__MASK 0x0001c000
246 #define NV50_TSC_0_BOX_S__SHIFT 14
247 #define NV50_TSC_0_BOX_T__MASK 0x000e0000
248 #define NV50_TSC_0_BOX_T__SHIFT 17
249 #define NV50_TSC_0_ANISOTROPY_MASK__MASK 0x00700000
250 #define NV50_TSC_0_ANISOTROPY_MASK__SHIFT 20
251
252 #define NV50_TSC_1 0x00000004
253 #define NV50_TSC_1_UNKN_ANISO_15 0x10000000
254 #define NV50_TSC_1_UNKN_ANISO_35 0x18000000
255 #define NV50_TSC_1_MAGF__MASK 0x00000003
256 #define NV50_TSC_1_MAGF__SHIFT 0
257 #define NV50_TSC_1_MAGF_NEAREST 0x00000001
258 #define NV50_TSC_1_MAGF_LINEAR 0x00000002
259 #define NV50_TSC_1_MINF__MASK 0x00000030
260 #define NV50_TSC_1_MINF__SHIFT 4
261 #define NV50_TSC_1_MINF_NEAREST 0x00000010
262 #define NV50_TSC_1_MINF_LINEAR 0x00000020
263 #define NV50_TSC_1_MIPF__MASK 0x000000c0
264 #define NV50_TSC_1_MIPF__SHIFT 6
265 #define NV50_TSC_1_MIPF_NONE 0x00000040
266 #define NV50_TSC_1_MIPF_NEAREST 0x00000080
267 #define NV50_TSC_1_MIPF_LINEAR 0x000000c0
268 #define NV50_TSC_1_LOD_BIAS__MASK 0x01fff000
269 #define NV50_TSC_1_LOD_BIAS__SHIFT 12
270
271 #define NV50_TSC_2 0x00000008
272 #define NV50_TSC_2_MIN_LOD__MASK 0x00000fff
273 #define NV50_TSC_2_MIN_LOD__SHIFT 0
274 #define NV50_TSC_2_MAX_LOD__MASK 0x00fff000
275 #define NV50_TSC_2_MAX_LOD__SHIFT 12
276
277 #define NV50_TSC_4 0x00000010
278 #define NV50_TSC_4_BORDER_COLOR_RED__MASK 0xffffffff
279 #define NV50_TSC_4_BORDER_COLOR_RED__SHIFT 0
280
281 #define NV50_TSC_5 0x00000014
282 #define NV50_TSC_5_BORDER_COLOR_GREEN__MASK 0xffffffff
283 #define NV50_TSC_5_BORDER_COLOR_GREEN__SHIFT 0
284
285 #define NV50_TSC_6 0x00000018
286 #define NV50_TSC_6_BORDER_COLOR_BLUE__MASK 0xffffffff
287 #define NV50_TSC_6_BORDER_COLOR_BLUE__SHIFT 0
288
289 #define NV50_TSC_7 0x0000001c
290 #define NV50_TSC_7_BORDER_COLOR_ALPHA__MASK 0xffffffff
291 #define NV50_TSC_7_BORDER_COLOR_ALPHA__SHIFT 0
292
293
294 #endif /* RNNDB_NV50_TEXTURE_XML */