src/gallium/drivers/nvc0/nvc0_screen.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "util/u_format_s3tc.h"
  24 #include "pipe/p_screen.h"
  25
  26 #include "nvc0_fence.h"
  27 #include "nvc0_context.h"
  28 #include "nvc0_screen.h"
  29
  30 #include "nouveau/nv_object.xml.h"
  31 #include "nvc0_graph_macros.h"
  32
  33 static boolean
  34 nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
  35                                 enum pipe_format format,
  36                                 enum pipe_texture_target target,
  37                                 unsigned sample_count,
  38                                 unsigned bindings, unsigned geom_flags)
  39 {
  40    if (sample_count > 1)
  41       return FALSE;
  42
  43    if (!util_format_s3tc_enabled) {
  44       switch (format) {
  45       case PIPE_FORMAT_DXT1_RGB:
  46       case PIPE_FORMAT_DXT1_RGBA:
  47       case PIPE_FORMAT_DXT3_RGBA:
  48       case PIPE_FORMAT_DXT5_RGBA:
  49          return FALSE;
  50       default:
  51          break;
  52       }
  53    }
  54
  55    /* transfers & shared are always supported */
  56    bindings &= ~(PIPE_BIND_TRANSFER_READ |
  57                  PIPE_BIND_TRANSFER_WRITE |
  58                  PIPE_BIND_SHARED);
  59
  60    return (nvc0_format_table[format].usage & bindings) == bindings;
  61 }
  62
  63 static int
  64 nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  65 {
  66    switch (param) {
  67    case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  68    case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
  69       return 32;
  70    case PIPE_CAP_MAX_COMBINED_SAMPLERS:
  71       return 64;
  72    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  73       return 13;
  74    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  75       return 10;
  76    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  77       return 13;
  78    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  79    case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
  80    case PIPE_CAP_TEXTURE_SWIZZLE:
  81    case PIPE_CAP_TEXTURE_SHADOW_MAP:
  82    case PIPE_CAP_NPOT_TEXTURES:
  83    case PIPE_CAP_ANISOTROPIC_FILTER:
  84       return 1;
  85    case PIPE_CAP_TWO_SIDED_STENCIL:
  86    case PIPE_CAP_DEPTH_CLAMP:
  87    case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
  88    case PIPE_CAP_POINT_SPRITE:
  89       return 1;
  90    case PIPE_CAP_GLSL:
  91    case PIPE_CAP_SM3:
  92       return 1;
  93    case PIPE_CAP_MAX_RENDER_TARGETS:
  94       return 8;
  95    case PIPE_CAP_OCCLUSION_QUERY:
  96       return 1;
  97    case PIPE_CAP_TIMER_QUERY:
  98    case PIPE_CAP_STREAM_OUTPUT:
  99       return 0;
 100    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 101    case PIPE_CAP_INDEP_BLEND_ENABLE:
 102    case PIPE_CAP_INDEP_BLEND_FUNC:
 103       return 1;
 104    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 105    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 106       return 1;
 107    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 108    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 109       return 0;
 110    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 111       return 0;
 112    case PIPE_CAP_PRIMITIVE_RESTART:
 113       return 1;
 114    default:
 115       NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
 116       return 0;
 117    }
 118 }
 119
 120 static int
 121 nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 122                              enum pipe_shader_cap param)
 123 {
 124    switch (shader) {
 125    case PIPE_SHADER_VERTEX:
 126       /*
 127    case PIPE_SHADER_TESSELLATION_CONTROL:
 128    case PIPE_SHADER_TESSELLATION_EVALUATION:
 129       */
 130    case PIPE_SHADER_GEOMETRY:
 131    case PIPE_SHADER_FRAGMENT:
 132       break;
 133    default:
 134       return 0;
 135    }
 136
 137    switch (param) {
 138    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 139    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 140    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 141    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 142       return 16384;
 143    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 144       return 4;
 145    case PIPE_SHADER_CAP_MAX_INPUTS:
 146       if (shader == PIPE_SHADER_VERTEX)
 147          return 32;
 148       return 0x300 / 16;
 149    case PIPE_SHADER_CAP_MAX_CONSTS:
 150       return 65536 / 16;
 151    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 152       return 14;
 153    case PIPE_SHADER_CAP_MAX_ADDRS:
 154       return 1;
 155    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 156    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 157       return shader != PIPE_SHADER_FRAGMENT;
 158    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 159    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 160       return 1;
 161    case PIPE_SHADER_CAP_MAX_PREDS:
 162       return 0;
 163    case PIPE_SHADER_CAP_MAX_TEMPS:
 164       return NVC0_CAP_MAX_PROGRAM_TEMPS;
 165    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 166       return 1;
 167    case PIPE_SHADER_CAP_SUBROUTINES:
 168       return 0; /* please inline, or provide function declarations */
 169    default:
 170       NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
 171       return 0;
 172    }
 173 }
 174
 175 static float
 176 nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
 177 {
 178    switch (param) {
 179    case PIPE_CAP_MAX_LINE_WIDTH:
 180    case PIPE_CAP_MAX_LINE_WIDTH_AA:
 181       return 10.0f;
 182    case PIPE_CAP_MAX_POINT_WIDTH:
 183    case PIPE_CAP_MAX_POINT_WIDTH_AA:
 184       return 64.0f;
 185    case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 186       return 16.0f;
 187    case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 188       return 4.0f;
 189    default:
 190       NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
 191       return 0.0f;
 192    }
 193 }
 194
 195 static void
 196 nvc0_screen_destroy(struct pipe_screen *pscreen)
 197 {
 198    struct nvc0_screen *screen = nvc0_screen(pscreen);
 199
 200    nouveau_bo_ref(NULL, &screen->text);
 201    nouveau_bo_ref(NULL, &screen->tls);
 202    nouveau_bo_ref(NULL, &screen->txc);
 203    nouveau_bo_ref(NULL, &screen->fence.bo);
 204    nouveau_bo_ref(NULL, &screen->mp_stack_bo);
 205
 206    nouveau_resource_destroy(&screen->text_heap);
 207
 208    if (screen->tic.entries)
 209       FREE(screen->tic.entries);
 210
 211    nouveau_grobj_free(&screen->fermi);
 212    nouveau_grobj_free(&screen->eng2d);
 213    nouveau_grobj_free(&screen->m2mf);
 214
 215    nouveau_screen_fini(&screen->base);
 216
 217    FREE(screen);
 218 }
 219
 220 static int
 221 nvc0_graph_set_macro(struct nvc0_screen *screen, uint32_t m, unsigned pos,
 222                      unsigned size, const uint32_t *data)
 223 {
 224    struct nouveau_channel *chan = screen->base.channel;
 225
 226    size /= 4;
 227
 228    BEGIN_RING(chan, RING_3D_(NVC0_GRAPH_MACRO_ID), 2);
 229    OUT_RING  (chan, (m - 0x3800) / 8);
 230    OUT_RING  (chan, pos);
 231    BEGIN_RING_1I(chan, RING_3D_(NVC0_GRAPH_MACRO_UPLOAD_POS), size + 1);
 232    OUT_RING  (chan, pos);
 233    OUT_RINGp (chan, data, size);
 234
 235    return pos + size;
 236 }
 237
 238 static void
 239 nvc0_screen_fence_reference(struct pipe_screen *pscreen,
 240                             struct pipe_fence_handle **ptr,
 241                             struct pipe_fence_handle *fence)
 242 {
 243    nvc0_fence_reference((struct nvc0_fence **)ptr, nvc0_fence(fence));
 244 }
 245
 246 static int
 247 nvc0_screen_fence_signalled(struct pipe_screen *pscreen,
 248                             struct pipe_fence_handle *fence,
 249                             unsigned flags)
 250 {
 251    return !(nvc0_fence_signalled(nvc0_fence(fence)));
 252 }
 253
 254 static int
 255 nvc0_screen_fence_finish(struct pipe_screen *pscreen,
 256                          struct pipe_fence_handle *fence,
 257                          unsigned flags)
 258 {
 259    return nvc0_fence_wait((struct nvc0_fence *)fence) != TRUE;
 260 }
 261
 262 static void
 263 nvc0_magic_3d_init(struct nouveau_channel *chan)
 264 {
 265    BEGIN_RING(chan, RING_3D_(0x10cc), 1);
 266    OUT_RING  (chan, 0xff);
 267    BEGIN_RING(chan, RING_3D_(0x10e0), 2);
 268    OUT_RING(chan, 0xff);
 269    OUT_RING(chan, 0xff);
 270    BEGIN_RING(chan, RING_3D_(0x10ec), 2);
 271    OUT_RING(chan, 0xff);
 272    OUT_RING(chan, 0xff);
 273    BEGIN_RING(chan, RING_3D_(0x074c), 1);
 274    OUT_RING  (chan, 0x3f);
 275
 276    BEGIN_RING(chan, RING_3D_(0x10f8), 1);
 277    OUT_RING  (chan, 0x0101);
 278
 279    BEGIN_RING(chan, RING_3D_(0x16a8), 1);
 280    OUT_RING  (chan, (3 << 16) | 3);
 281    BEGIN_RING(chan, RING_3D_(0x1794), 1);
 282    OUT_RING  (chan, (2 << 16) | 2);
 283    BEGIN_RING(chan, RING_3D_(0x0de8), 1);
 284    OUT_RING  (chan, 1);
 285    BEGIN_RING(chan, RING_3D_(0x165c), 1);
 286    OUT_RING  (chan, 0);
 287
 288    BEGIN_RING(chan, RING_3D_(0x1528), 1); /* MP poke */
 289    OUT_RING  (chan, 0);
 290
 291    BEGIN_RING(chan, RING_3D_(0x12ac), 1);
 292    OUT_RING  (chan, 0);
 293    BEGIN_RING(chan, RING_3D_(0x0218), 1);
 294    OUT_RING  (chan, 0x10);
 295    BEGIN_RING(chan, RING_3D_(0x10fc), 1);
 296    OUT_RING  (chan, 0x10);
 297    BEGIN_RING(chan, RING_3D_(0x1290), 1);
 298    OUT_RING  (chan, 0x10);
 299    BEGIN_RING(chan, RING_3D_(0x12d8), 2);
 300    OUT_RING  (chan, 0x10);
 301    OUT_RING  (chan, 0x10);
 302    BEGIN_RING(chan, RING_3D_(0x06d4), 1);
 303    OUT_RING  (chan, 8);
 304    BEGIN_RING(chan, RING_3D_(0x1140), 1);
 305    OUT_RING  (chan, 0x10);
 306    BEGIN_RING(chan, RING_3D_(0x1610), 1);
 307    OUT_RING  (chan, 0xe);
 308
 309    BEGIN_RING(chan, RING_3D_(0x164c), 1);
 310    OUT_RING  (chan, 1 << 12);
 311    BEGIN_RING(chan, RING_3D_(0x151c), 1);
 312    OUT_RING  (chan, 1);
 313    BEGIN_RING(chan, RING_3D_(0x020c), 1);
 314    OUT_RING  (chan, 1);
 315    BEGIN_RING(chan, RING_3D_(0x030c), 1);
 316    OUT_RING  (chan, 0);
 317    BEGIN_RING(chan, RING_3D_(0x0300), 1);
 318    OUT_RING  (chan, 3);
 319    BEGIN_RING(chan, RING_3D_(0x1280), 1); /* PGRAPH poke */
 320    OUT_RING  (chan, 0);
 321    BEGIN_RING(chan, RING_3D_(0x02d0), 1);
 322    OUT_RING  (chan, 0x1f40);
 323    BEGIN_RING(chan, RING_3D_(0x00fdc), 1);
 324    OUT_RING  (chan, 1);
 325    BEGIN_RING(chan, RING_3D_(0x19c0), 1);
 326    OUT_RING  (chan, 1);
 327    BEGIN_RING(chan, RING_3D_(0x075c), 1);
 328    OUT_RING  (chan, 3);
 329
 330    BEGIN_RING(chan, RING_3D_(0x0fac), 1);
 331    OUT_RING  (chan, 0);
 332    BEGIN_RING(chan, RING_3D_(0x0f90), 1);
 333    OUT_RING  (chan, 0);
 334 }
 335
 336 #define FAIL_SCREEN_INIT(str, err)                    \
 337    do {                                               \
 338       NOUVEAU_ERR(str, err);                          \
 339       nvc0_screen_destroy(pscreen);                   \
 340       return NULL;                                    \
 341    } while(0)
 342
 343 struct pipe_screen *
 344 nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 345 {
 346    struct nvc0_screen *screen;
 347    struct nouveau_channel *chan;
 348    struct pipe_screen *pscreen;
 349    int ret;
 350    unsigned i;
 351
 352    screen = CALLOC_STRUCT(nvc0_screen);
 353    if (!screen)
 354       return NULL;
 355    pscreen = &screen->base.base;
 356
 357    ret = nouveau_screen_init(&screen->base, dev);
 358    if (ret) {
 359       nvc0_screen_destroy(pscreen);
 360       return NULL;
 361    }
 362    chan = screen->base.channel;
 363
 364    pscreen->winsys = ws;
 365    pscreen->destroy = nvc0_screen_destroy;
 366    pscreen->context_create = nvc0_create;
 367    pscreen->is_format_supported = nvc0_screen_is_format_supported;
 368    pscreen->get_param = nvc0_screen_get_param;
 369    pscreen->get_shader_param = nvc0_screen_get_shader_param;
 370    pscreen->get_paramf = nvc0_screen_get_paramf;
 371    pscreen->fence_reference = nvc0_screen_fence_reference;
 372    pscreen->fence_signalled = nvc0_screen_fence_signalled;
 373    pscreen->fence_finish = nvc0_screen_fence_finish;
 374
 375    nvc0_screen_init_resource_functions(pscreen);
 376
 377    screen->base.vertex_buffer_flags = NOUVEAU_BO_GART;
 378    screen->base.index_buffer_flags = 0;
 379
 380    ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096,
 381                         &screen->fence.bo);
 382    if (ret)
 383       goto fail;
 384    nouveau_bo_map(screen->fence.bo, NOUVEAU_BO_RDWR);
 385    screen->fence.map = screen->fence.bo->map;
 386    nouveau_bo_unmap(screen->fence.bo);
 387
 388    for (i = 0; i < NVC0_SCRATCH_NR_BUFFERS; ++i) {
 389       ret = nouveau_bo_new(dev, NOUVEAU_BO_GART, 0, NVC0_SCRATCH_SIZE,
 390                            &screen->scratch.bo[i]);
 391       if (ret)
 392          goto fail;
 393    }
 394
 395    ret = nouveau_grobj_alloc(chan, 0xbeef9039, NVC0_M2MF, &screen->m2mf);
 396    if (ret)
 397       FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret);
 398
 399    BIND_RING (chan, screen->m2mf, NVC0_SUBCH_MF);
 400    BEGIN_RING(chan, RING_MF(NOTIFY_ADDRESS_HIGH), 3);
 401    OUT_RELOCh(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 402    OUT_RELOCl(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 403    OUT_RING  (chan, 0);
 404
 405    ret = nouveau_grobj_alloc(chan, 0xbeef902d, NVC0_2D, &screen->eng2d);
 406    if (ret)
 407       FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret);
 408
 409    BIND_RING (chan, screen->eng2d, NVC0_SUBCH_2D);
 410    BEGIN_RING(chan, RING_2D(OPERATION), 1);
 411    OUT_RING  (chan, NVC0_2D_OPERATION_SRCCOPY);
 412    BEGIN_RING(chan, RING_2D(CLIP_ENABLE), 1);
 413    OUT_RING  (chan, 0);
 414    BEGIN_RING(chan, RING_2D(COLOR_KEY_ENABLE), 1);
 415    OUT_RING  (chan, 0);
 416    BEGIN_RING(chan, RING_2D_(0x0884), 1);
 417    OUT_RING  (chan, 0x3f);
 418    BEGIN_RING(chan, RING_2D_(0x0888), 1);
 419    OUT_RING  (chan, 1);
 420
 421    ret = nouveau_grobj_alloc(chan, 0xbeef9097, NVC0_3D, &screen->fermi);
 422    if (ret)
 423       FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret);
 424
 425    BIND_RING (chan, screen->fermi, NVC0_SUBCH_3D);
 426    BEGIN_RING(chan, RING_3D(NOTIFY_ADDRESS_HIGH), 3);
 427    OUT_RELOCh(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 428    OUT_RELOCl(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 429    OUT_RING  (chan, 0);
 430
 431    BEGIN_RING(chan, RING_3D(COND_MODE), 1);
 432    OUT_RING  (chan, NVC0_3D_COND_MODE_ALWAYS);
 433
 434    BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
 435    OUT_RING  (chan, 1);
 436
 437    BEGIN_RING(chan, RING_3D(MULTISAMPLE_ZETA_ENABLE), 1);
 438    OUT_RING  (chan, 0);
 439    BEGIN_RING(chan, RING_3D(MULTISAMPLE_COLOR_ENABLE), 1);
 440    OUT_RING  (chan, 0);
 441    BEGIN_RING(chan, RING_3D(MULTISAMPLE_MODE), 1);
 442    OUT_RING  (chan, NVC0_3D_MULTISAMPLE_MODE_1X);
 443    BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1);
 444    OUT_RING  (chan, 0);
 445
 446    nvc0_magic_3d_init(chan);
 447
 448    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, &screen->text);
 449    if (ret)
 450       goto fail;
 451
 452    nouveau_resource_init(&screen->text_heap, 0, 1 << 20);
 453
 454    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16,
 455                         &screen->uniforms);
 456    if (ret)
 457       goto fail;
 458
 459    /* auxiliary constants (6 user clip planes, base instance id) */
 460    BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
 461    OUT_RING  (chan, 256);
 462    OUT_RELOCh(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 463    OUT_RELOCl(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 464    for (i = 0; i < 5; ++i) {
 465       BEGIN_RING(chan, RING_3D(CB_BIND(i)), 1);
 466       OUT_RING  (chan, (15 << 4) | 1);
 467    }
 468
 469    screen->tls_size = 4 * 4 * 32 * 128 * 4;
 470    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
 471                         screen->tls_size, &screen->tls);
 472    if (ret)
 473       goto fail;
 474
 475    BEGIN_RING(chan, RING_3D(CODE_ADDRESS_HIGH), 2);
 476    OUT_RELOCh(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 477    OUT_RELOCl(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 478    BEGIN_RING(chan, RING_3D(LOCAL_ADDRESS_HIGH), 4);
 479    OUT_RELOCh(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
 480    OUT_RELOCl(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
 481    OUT_RING  (chan, screen->tls_size >> 32);
 482    OUT_RING  (chan, screen->tls_size);
 483    BEGIN_RING(chan, RING_3D(LOCAL_BASE), 1);
 484    OUT_RING  (chan, 0);
 485
 486    for (i = 0; i < 5; ++i) {
 487       BEGIN_RING(chan, RING_3D(TEX_LIMITS(i)), 1);
 488       OUT_RING  (chan, 0x54);
 489    }
 490    BEGIN_RING(chan, RING_3D(LINKED_TSC), 1);
 491    OUT_RING  (chan, 0);
 492
 493    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20,
 494                         &screen->mp_stack_bo);
 495    if (ret)
 496       goto fail;
 497
 498    BEGIN_RING(chan, RING_3D_(0x17bc), 3);
 499    OUT_RELOCh(chan, screen->mp_stack_bo, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 500    OUT_RELOCl(chan, screen->mp_stack_bo, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 501    OUT_RING  (chan, 1);
 502
 503    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, &screen->txc);
 504    if (ret)
 505       goto fail;
 506
 507    BEGIN_RING(chan, RING_3D(TIC_ADDRESS_HIGH), 3);
 508    OUT_RELOCh(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 509    OUT_RELOCl(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 510    OUT_RING  (chan, NVC0_TIC_MAX_ENTRIES - 1);
 511
 512    BEGIN_RING(chan, RING_3D(TSC_ADDRESS_HIGH), 3);
 513    OUT_RELOCh(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 514    OUT_RELOCl(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 515    OUT_RING  (chan, NVC0_TSC_MAX_ENTRIES - 1);
 516
 517    BEGIN_RING(chan, RING_3D(Y_ORIGIN_BOTTOM), 1);
 518    OUT_RING  (chan, 0);
 519    BEGIN_RING(chan, RING_3D(WINDOW_OFFSET_X), 2);
 520    OUT_RING  (chan, 0);
 521    OUT_RING  (chan, 0);
 522    BEGIN_RING(chan, RING_3D_(0x1590), 1); /* deactivate ZCULL */
 523    OUT_RING  (chan, 0x3f);
 524
 525    BEGIN_RING(chan, RING_3D(VIEWPORT_CLIP_RECTS_EN), 1);
 526    OUT_RING  (chan, 0);
 527    BEGIN_RING(chan, RING_3D(CLIPID_ENABLE), 1);
 528    OUT_RING  (chan, 0);
 529
 530    BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
 531    OUT_RING  (chan, 1);
 532    BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
 533    OUT_RINGf (chan, 0.0f);
 534    OUT_RINGf (chan, 1.0f);
 535
 536    /* We use scissors instead of exact view volume clipping,
 537     * so they're always enabled.
 538     */
 539    BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 3);
 540    OUT_RING  (chan, 1);
 541    OUT_RING  (chan, 8192 << 16);
 542    OUT_RING  (chan, 8192 << 16);
 543
 544    BEGIN_RING(chan, RING_3D_(0x0fac), 1);
 545    OUT_RING  (chan, 0);
 546    BEGIN_RING(chan, RING_3D_(0x3484), 1);
 547    OUT_RING  (chan, 0);
 548    BEGIN_RING(chan, RING_3D_(0x0dbc), 1);
 549    OUT_RING  (chan, 0x00010000);
 550    BEGIN_RING(chan, RING_3D_(0x0dd8), 1);
 551    OUT_RING  (chan, 0xff800006);
 552    BEGIN_RING(chan, RING_3D_(0x3488), 1);
 553    OUT_RING  (chan, 0);
 554
 555 #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
 556
 557    i = 0;
 558    MK_MACRO(NVC0_3D_BLEND_ENABLES, nvc0_9097_blend_enables);
 559    MK_MACRO(NVC0_3D_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
 560    MK_MACRO(NVC0_3D_TEP_SELECT, nvc0_9097_tep_select);
 561    MK_MACRO(NVC0_3D_GP_SELECT, nvc0_9097_gp_select);
 562    MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
 563    MK_MACRO(NVC0_3D_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
 564    MK_MACRO(NVC0_3D_COLOR_MASK_BROADCAST, nvc0_9097_color_mask_brdc);
 565
 566    BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1);
 567    OUT_RING  (chan, 1);
 568    BEGIN_RING(chan, RING_3D(GP_SELECT), 1);
 569    OUT_RING  (chan, 0x40);
 570    BEGIN_RING(chan, RING_3D(GP_BUILTIN_RESULT_EN), 1);
 571    OUT_RING  (chan, 0);
 572    BEGIN_RING(chan, RING_3D(TEP_SELECT), 1);
 573    OUT_RING  (chan, 0x30);
 574    BEGIN_RING(chan, RING_3D(PATCH_VERTICES), 1);
 575    OUT_RING  (chan, 3);
 576    BEGIN_RING(chan, RING_3D(SP_SELECT(2)), 1);
 577    OUT_RING  (chan, 0x20);
 578    BEGIN_RING(chan, RING_3D(SP_SELECT(0)), 1);
 579    OUT_RING  (chan, 0x00);
 580
 581    BEGIN_RING(chan, RING_3D(POINT_COORD_REPLACE), 1);
 582    OUT_RING  (chan, 0);
 583
 584    BEGIN_RING(chan, RING_3D(FRAG_COLOR_CLAMP_EN), 1);
 585    OUT_RING  (chan, 0x11111111);
 586    BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1);
 587    OUT_RING  (chan, 1);
 588
 589    BEGIN_RING(chan, RING_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
 590    OUT_RING  (chan, 0xab);
 591    OUT_RING  (chan, 0x00000000);
 592
 593    FIRE_RING (chan);
 594
 595    screen->tic.entries = CALLOC(4096, sizeof(void *));
 596    screen->tsc.entries = screen->tic.entries + 2048;
 597
 598    screen->mm_GART = nvc0_mm_create(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
 599                                     0x000);
 600    screen->mm_VRAM = nvc0_mm_create(dev, NOUVEAU_BO_VRAM, 0x000);
 601    screen->mm_VRAM_fe0 = nvc0_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0);
 602
 603    nvc0_screen_fence_new(screen, &screen->fence.current, FALSE);
 604
 605    return pscreen;
 606
 607 fail:
 608    nvc0_screen_destroy(pscreen);
 609    return NULL;
 610 }
 611
 612 void
 613 nvc0_screen_make_buffers_resident(struct nvc0_screen *screen)
 614 {
 615    struct nouveau_channel *chan = screen->base.channel;
 616
 617    const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
 618
 619    nouveau_bo_validate(chan, screen->text, flags);
 620    nouveau_bo_validate(chan, screen->uniforms, flags);
 621    nouveau_bo_validate(chan, screen->txc, flags);
 622    nouveau_bo_validate(chan, screen->tls, flags);
 623    nouveau_bo_validate(chan, screen->mp_stack_bo, flags);
 624 }
 625
 626 int
 627 nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
 628 {
 629    int i = screen->tic.next;
 630
 631    while (screen->tic.lock[i / 32] & (1 << (i % 32)))
 632       i = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
 633
 634    screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
 635
 636    if (screen->tic.entries[i])
 637       nvc0_tic_entry(screen->tic.entries[i])->id = -1;
 638
 639    screen->tic.entries[i] = entry;
 640    return i;
 641 }
 642
 643 int
 644 nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
 645 {
 646    int i = screen->tsc.next;
 647
 648    while (screen->tsc.lock[i / 32] & (1 << (i % 32)))
 649       i = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
 650
 651    screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
 652
 653    if (screen->tsc.entries[i])
 654       nvc0_tsc_entry(screen->tsc.entries[i])->id = -1;
 655
 656    screen->tsc.entries[i] = entry;
 657    return i;
 658 }