src/gallium/drivers/nvc0/nvc0_screen.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "util/u_format.h"
  24 #include "util/u_format_s3tc.h"
  25 #include "pipe/p_screen.h"
  26
  27 #include "vl/vl_decoder.h"
  28 #include "vl/vl_video_buffer.h"
  29
  30 #include "nvc0_context.h"
  31 #include "nvc0_screen.h"
  32
  33 #include "nouveau/nv_object.xml.h"
  34 #include "nvc0_graph_macros.h"
  35
  36 static boolean
  37 nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
  38                                 enum pipe_format format,
  39                                 enum pipe_texture_target target,
  40                                 unsigned sample_count,
  41                                 unsigned bindings)
  42 {
  43    if (sample_count > 2 && sample_count != 4 && sample_count != 8)
  44       return FALSE;
  45
  46    if (!util_format_is_supported(format, bindings))
  47       return FALSE;
  48
  49    /* transfers & shared are always supported */
  50    bindings &= ~(PIPE_BIND_TRANSFER_READ |
  51                  PIPE_BIND_TRANSFER_WRITE |
  52                  PIPE_BIND_SHARED);
  53
  54    return (nvc0_format_table[format].usage & bindings) == bindings;
  55 }
  56
  57 static int
  58 nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  59 {
  60    switch (param) {
  61    case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  62    case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
  63       return 32;
  64    case PIPE_CAP_MAX_COMBINED_SAMPLERS:
  65       return 64;
  66    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  67       return 13;
  68    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  69       return 10;
  70    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  71       return 13;
  72    case PIPE_CAP_ARRAY_TEXTURES:
  73       return 1;
  74    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  75    case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
  76    case PIPE_CAP_TEXTURE_SWIZZLE:
  77    case PIPE_CAP_TEXTURE_SHADOW_MAP:
  78    case PIPE_CAP_NPOT_TEXTURES:
  79    case PIPE_CAP_ANISOTROPIC_FILTER:
  80    case PIPE_CAP_SEAMLESS_CUBE_MAP:
  81       return 1;
  82    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
  83       return 0;
  84    case PIPE_CAP_TWO_SIDED_STENCIL:
  85    case PIPE_CAP_DEPTH_CLAMP:
  86    case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
  87    case PIPE_CAP_POINT_SPRITE:
  88       return 1;
  89    case PIPE_CAP_GLSL:
  90    case PIPE_CAP_SM3:
  91       return 1;
  92    case PIPE_CAP_MAX_RENDER_TARGETS:
  93       return 8;
  94    case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
  95       return 1;
  96    case PIPE_CAP_TIMER_QUERY:
  97    case PIPE_CAP_OCCLUSION_QUERY:
  98       return 1;
  99    case PIPE_CAP_STREAM_OUTPUT:
 100       return 0;
 101    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 102    case PIPE_CAP_INDEP_BLEND_ENABLE:
 103    case PIPE_CAP_INDEP_BLEND_FUNC:
 104       return 1;
 105    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 106    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 107       return 1;
 108    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 109    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 110       return 0;
 111    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 112       return 0;
 113    case PIPE_CAP_PRIMITIVE_RESTART:
 114    case PIPE_CAP_TGSI_INSTANCEID:
 115    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 116    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 117       return 1;
 118    default:
 119       NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
 120       return 0;
 121    }
 122 }
 123
 124 static int
 125 nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 126                              enum pipe_shader_cap param)
 127 {
 128    switch (shader) {
 129    case PIPE_SHADER_VERTEX:
 130       /*
 131    case PIPE_SHADER_TESSELLATION_CONTROL:
 132    case PIPE_SHADER_TESSELLATION_EVALUATION:
 133       */
 134    case PIPE_SHADER_GEOMETRY:
 135    case PIPE_SHADER_FRAGMENT:
 136       break;
 137    default:
 138       return 0;
 139    }
 140
 141    switch (param) {
 142    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 143    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 144    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 145    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 146       return 16384;
 147    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 148       return 4;
 149    case PIPE_SHADER_CAP_MAX_INPUTS:
 150       if (shader == PIPE_SHADER_VERTEX)
 151          return 32;
 152       return 0x300 / 16;
 153    case PIPE_SHADER_CAP_MAX_CONSTS:
 154       return 65536 / 16;
 155    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 156       return 14;
 157    case PIPE_SHADER_CAP_MAX_ADDRS:
 158       return 1;
 159    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 160    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 161       return shader != PIPE_SHADER_FRAGMENT;
 162    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 163    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 164       return 1;
 165    case PIPE_SHADER_CAP_MAX_PREDS:
 166       return 0;
 167    case PIPE_SHADER_CAP_MAX_TEMPS:
 168       return NVC0_CAP_MAX_PROGRAM_TEMPS;
 169    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 170       return 1;
 171    case PIPE_SHADER_CAP_SUBROUTINES:
 172       return 0; /* please inline, or provide function declarations */
 173    default:
 174       NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
 175       return 0;
 176    }
 177 }
 178
 179 static float
 180 nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
 181 {
 182    switch (param) {
 183    case PIPE_CAP_MAX_LINE_WIDTH:
 184    case PIPE_CAP_MAX_LINE_WIDTH_AA:
 185       return 10.0f;
 186    case PIPE_CAP_MAX_POINT_WIDTH:
 187    case PIPE_CAP_MAX_POINT_WIDTH_AA:
 188       return 64.0f;
 189    case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 190       return 16.0f;
 191    case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 192       return 4.0f;
 193    default:
 194       NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
 195       return 0.0f;
 196    }
 197 }
 198
 199 static void
 200 nvc0_screen_destroy(struct pipe_screen *pscreen)
 201 {
 202    struct nvc0_screen *screen = nvc0_screen(pscreen);
 203
 204    if (screen->base.fence.current) {
 205       nouveau_fence_wait(screen->base.fence.current);
 206       nouveau_fence_ref(NULL, &screen->base.fence.current);
 207    }
 208    screen->base.channel->user_private = NULL;
 209
 210    nouveau_bo_ref(NULL, &screen->text);
 211    nouveau_bo_ref(NULL, &screen->tls);
 212    nouveau_bo_ref(NULL, &screen->txc);
 213    nouveau_bo_ref(NULL, &screen->fence.bo);
 214    nouveau_bo_ref(NULL, &screen->vfetch_cache);
 215
 216    nouveau_resource_destroy(&screen->text_heap);
 217
 218    if (screen->tic.entries)
 219       FREE(screen->tic.entries);
 220
 221    nouveau_mm_destroy(screen->mm_VRAM_fe0);
 222
 223    nouveau_grobj_free(&screen->fermi);
 224    nouveau_grobj_free(&screen->eng2d);
 225    nouveau_grobj_free(&screen->m2mf);
 226
 227    nouveau_screen_fini(&screen->base);
 228
 229    FREE(screen);
 230 }
 231
 232 static int
 233 nvc0_graph_set_macro(struct nvc0_screen *screen, uint32_t m, unsigned pos,
 234                      unsigned size, const uint32_t *data)
 235 {
 236    struct nouveau_channel *chan = screen->base.channel;
 237
 238    size /= 4;
 239
 240    BEGIN_RING(chan, RING_3D_(NVC0_GRAPH_MACRO_ID), 2);
 241    OUT_RING  (chan, (m - 0x3800) / 8);
 242    OUT_RING  (chan, pos);
 243    BEGIN_RING_1I(chan, RING_3D_(NVC0_GRAPH_MACRO_UPLOAD_POS), size + 1);
 244    OUT_RING  (chan, pos);
 245    OUT_RINGp (chan, data, size);
 246
 247    return pos + size;
 248 }
 249
 250 static void
 251 nvc0_magic_3d_init(struct nouveau_channel *chan)
 252 {
 253    BEGIN_RING(chan, RING_3D_(0x10cc), 1);
 254    OUT_RING  (chan, 0xff);
 255    BEGIN_RING(chan, RING_3D_(0x10e0), 2);
 256    OUT_RING(chan, 0xff);
 257    OUT_RING(chan, 0xff);
 258    BEGIN_RING(chan, RING_3D_(0x10ec), 2);
 259    OUT_RING(chan, 0xff);
 260    OUT_RING(chan, 0xff);
 261    BEGIN_RING(chan, RING_3D_(0x074c), 1);
 262    OUT_RING  (chan, 0x3f);
 263
 264    BEGIN_RING(chan, RING_3D_(0x16a8), 1);
 265    OUT_RING  (chan, (3 << 16) | 3);
 266    BEGIN_RING(chan, RING_3D_(0x1794), 1);
 267    OUT_RING  (chan, (2 << 16) | 2);
 268    BEGIN_RING(chan, RING_3D_(0x0de8), 1);
 269    OUT_RING  (chan, 1);
 270
 271 #if 0 /* software method */
 272    BEGIN_RING(chan, RING_3D_(0x1528), 1); /* MP poke */
 273    OUT_RING  (chan, 0);
 274 #endif
 275
 276    BEGIN_RING(chan, RING_3D_(0x12ac), 1);
 277    OUT_RING  (chan, 0);
 278    BEGIN_RING(chan, RING_3D_(0x0218), 1);
 279    OUT_RING  (chan, 0x10);
 280    BEGIN_RING(chan, RING_3D_(0x10fc), 1);
 281    OUT_RING  (chan, 0x10);
 282    BEGIN_RING(chan, RING_3D_(0x1290), 1);
 283    OUT_RING  (chan, 0x10);
 284    BEGIN_RING(chan, RING_3D_(0x12d8), 2);
 285    OUT_RING  (chan, 0x10);
 286    OUT_RING  (chan, 0x10);
 287    BEGIN_RING(chan, RING_3D_(0x06d4), 1);
 288    OUT_RING  (chan, 8);
 289    BEGIN_RING(chan, RING_3D_(0x1140), 1);
 290    OUT_RING  (chan, 0x10);
 291    BEGIN_RING(chan, RING_3D_(0x1610), 1);
 292    OUT_RING  (chan, 0xe);
 293
 294    BEGIN_RING(chan, RING_3D_(0x164c), 1);
 295    OUT_RING  (chan, 1 << 12);
 296    BEGIN_RING(chan, RING_3D_(0x151c), 1);
 297    OUT_RING  (chan, 1);
 298    BEGIN_RING(chan, RING_3D_(0x030c), 1);
 299    OUT_RING  (chan, 0);
 300    BEGIN_RING(chan, RING_3D_(0x0300), 1);
 301    OUT_RING  (chan, 3);
 302 #if 0 /* software method */
 303    BEGIN_RING(chan, RING_3D_(0x1280), 1); /* PGRAPH poke */
 304    OUT_RING  (chan, 0);
 305 #endif
 306    BEGIN_RING(chan, RING_3D_(0x02d0), 1);
 307    OUT_RING  (chan, 0x1f40);
 308    BEGIN_RING(chan, RING_3D_(0x00fdc), 1);
 309    OUT_RING  (chan, 1);
 310    BEGIN_RING(chan, RING_3D_(0x19c0), 1);
 311    OUT_RING  (chan, 1);
 312    BEGIN_RING(chan, RING_3D_(0x075c), 1);
 313    OUT_RING  (chan, 3);
 314 }
 315
 316 static void
 317 nvc0_screen_fence_emit(struct pipe_screen *pscreen, u32 sequence)
 318 {
 319    struct nvc0_screen *screen = nvc0_screen(pscreen);
 320    struct nouveau_channel *chan = screen->base.channel;
 321
 322    MARK_RING (chan, 5, 2);
 323    BEGIN_RING(chan, RING_3D(QUERY_ADDRESS_HIGH), 4);
 324    OUT_RELOCh(chan, screen->fence.bo, 0, NOUVEAU_BO_WR);
 325    OUT_RELOCl(chan, screen->fence.bo, 0, NOUVEAU_BO_WR);
 326    OUT_RING  (chan, sequence);
 327    OUT_RING  (chan, NVC0_3D_QUERY_GET_FENCE | NVC0_3D_QUERY_GET_SHORT |
 328               (0xf << NVC0_3D_QUERY_GET_UNIT__SHIFT));
 329 }
 330
 331 static u32
 332 nvc0_screen_fence_update(struct pipe_screen *pscreen)
 333 {
 334    struct nvc0_screen *screen = nvc0_screen(pscreen);
 335    return screen->fence.map[0];
 336 }
 337
 338 #define FAIL_SCREEN_INIT(str, err)                    \
 339    do {                                               \
 340       NOUVEAU_ERR(str, err);                          \
 341       nvc0_screen_destroy(pscreen);                   \
 342       return NULL;                                    \
 343    } while(0)
 344
 345 struct pipe_screen *
 346 nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 347 {
 348    struct nvc0_screen *screen;
 349    struct nouveau_channel *chan;
 350    struct pipe_screen *pscreen;
 351    int ret;
 352    unsigned i;
 353
 354    screen = CALLOC_STRUCT(nvc0_screen);
 355    if (!screen)
 356       return NULL;
 357    pscreen = &screen->base.base;
 358
 359    screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
 360
 361    ret = nouveau_screen_init(&screen->base, dev);
 362    if (ret) {
 363       nvc0_screen_destroy(pscreen);
 364       return NULL;
 365    }
 366    chan = screen->base.channel;
 367    chan->user_private = screen;
 368
 369    pscreen->winsys = ws;
 370    pscreen->destroy = nvc0_screen_destroy;
 371    pscreen->context_create = nvc0_create;
 372    pscreen->is_format_supported = nvc0_screen_is_format_supported;
 373    pscreen->get_param = nvc0_screen_get_param;
 374    pscreen->get_shader_param = nvc0_screen_get_shader_param;
 375    pscreen->get_paramf = nvc0_screen_get_paramf;
 376
 377    nvc0_screen_init_resource_functions(pscreen);
 378
 379    nouveau_screen_init_vdec(&screen->base);
 380
 381    ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096,
 382                         &screen->fence.bo);
 383    if (ret)
 384       goto fail;
 385    nouveau_bo_map(screen->fence.bo, NOUVEAU_BO_RDWR);
 386    screen->fence.map = screen->fence.bo->map;
 387    nouveau_bo_unmap(screen->fence.bo);
 388    screen->base.fence.emit = nvc0_screen_fence_emit;
 389    screen->base.fence.update = nvc0_screen_fence_update;
 390
 391    for (i = 0; i < NVC0_SCRATCH_NR_BUFFERS; ++i) {
 392       ret = nouveau_bo_new(dev, NOUVEAU_BO_GART, 0, NVC0_SCRATCH_SIZE,
 393                            &screen->scratch.bo[i]);
 394       if (ret)
 395          goto fail;
 396    }
 397
 398    ret = nouveau_grobj_alloc(chan, 0xbeef9039, NVC0_M2MF, &screen->m2mf);
 399    if (ret)
 400       FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret);
 401
 402    BIND_RING (chan, screen->m2mf, NVC0_SUBCH_MF);
 403    BEGIN_RING(chan, RING_MF(NOTIFY_ADDRESS_HIGH), 3);
 404    OUT_RELOCh(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 405    OUT_RELOCl(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 406    OUT_RING  (chan, 0);
 407
 408    ret = nouveau_grobj_alloc(chan, 0xbeef902d, NVC0_2D, &screen->eng2d);
 409    if (ret)
 410       FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret);
 411
 412    BIND_RING (chan, screen->eng2d, NVC0_SUBCH_2D);
 413    BEGIN_RING(chan, RING_2D(OPERATION), 1);
 414    OUT_RING  (chan, NVC0_2D_OPERATION_SRCCOPY);
 415    BEGIN_RING(chan, RING_2D(CLIP_ENABLE), 1);
 416    OUT_RING  (chan, 0);
 417    BEGIN_RING(chan, RING_2D(COLOR_KEY_ENABLE), 1);
 418    OUT_RING  (chan, 0);
 419    BEGIN_RING(chan, RING_2D_(0x0884), 1);
 420    OUT_RING  (chan, 0x3f);
 421    BEGIN_RING(chan, RING_2D_(0x0888), 1);
 422    OUT_RING  (chan, 1);
 423
 424    ret = nouveau_grobj_alloc(chan, 0xbeef9097, NVC0_3D, &screen->fermi);
 425    if (ret)
 426       FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret);
 427
 428    BIND_RING (chan, screen->fermi, NVC0_SUBCH_3D);
 429    BEGIN_RING(chan, RING_3D(NOTIFY_ADDRESS_HIGH), 3);
 430    OUT_RELOCh(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 431    OUT_RELOCl(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
 432    OUT_RING  (chan, 0);
 433
 434    BEGIN_RING(chan, RING_3D(COND_MODE), 1);
 435    OUT_RING  (chan, NVC0_3D_COND_MODE_ALWAYS);
 436
 437    BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
 438    OUT_RING  (chan, 1);
 439
 440    BEGIN_RING(chan, RING_3D(CSAA_ENABLE), 1);
 441    OUT_RING  (chan, 0);
 442    BEGIN_RING(chan, RING_3D(MULTISAMPLE_ENABLE), 1);
 443    OUT_RING  (chan, 0);
 444    BEGIN_RING(chan, RING_3D(MULTISAMPLE_MODE), 1);
 445    OUT_RING  (chan, NVC0_3D_MULTISAMPLE_MODE_MS1);
 446    BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1);
 447    OUT_RING  (chan, 0);
 448    BEGIN_RING(chan, RING_3D(LINE_WIDTH_SEPARATE), 1);
 449    OUT_RING  (chan, 1);
 450    BEGIN_RING(chan, RING_3D(LINE_LAST_PIXEL), 1);
 451    OUT_RING  (chan, 0);
 452    BEGIN_RING(chan, RING_3D(BLEND_SEPARATE_ALPHA), 1);
 453    OUT_RING  (chan, 1);
 454    BEGIN_RING(chan, RING_3D(BLEND_ENABLE_COMMON), 1);
 455    OUT_RING  (chan, 0);
 456    BEGIN_RING(chan, RING_3D(TEX_MISC), 1);
 457    OUT_RING  (chan, NVC0_3D_TEX_MISC_SEAMLESS_CUBE_MAP);
 458
 459    nvc0_magic_3d_init(chan);
 460
 461    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, &screen->text);
 462    if (ret)
 463       goto fail;
 464
 465    /* XXX: getting a page fault at the end of the code buffer every few
 466     *  launches, don't use the last 256 bytes to work around them - prefetch ?
 467     */
 468    nouveau_resource_init(&screen->text_heap, 0, (1 << 20) - 0x100);
 469
 470    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16,
 471                         &screen->uniforms);
 472    if (ret)
 473       goto fail;
 474
 475    /* auxiliary constants (6 user clip planes, base instance id) */
 476    BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
 477    OUT_RING  (chan, 256);
 478    OUT_RELOCh(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 479    OUT_RELOCl(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 480    for (i = 0; i < 5; ++i) {
 481       BEGIN_RING(chan, RING_3D(CB_BIND(i)), 1);
 482       OUT_RING  (chan, (15 << 4) | 1);
 483    }
 484
 485    screen->tls_size = (16 * 32) * (NVC0_CAP_MAX_PROGRAM_TEMPS * 16);
 486    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
 487                         screen->tls_size, &screen->tls);
 488    if (ret)
 489       goto fail;
 490
 491    BEGIN_RING(chan, RING_3D(CODE_ADDRESS_HIGH), 2);
 492    OUT_RELOCh(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 493    OUT_RELOCl(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 494    BEGIN_RING(chan, RING_3D(LOCAL_ADDRESS_HIGH), 4);
 495    OUT_RELOCh(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
 496    OUT_RELOCl(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
 497    OUT_RING  (chan, screen->tls_size >> 32);
 498    OUT_RING  (chan, screen->tls_size);
 499    BEGIN_RING(chan, RING_3D_(0x07a0), 1);
 500    OUT_RING  (chan, 0);
 501    BEGIN_RING(chan, RING_3D(LOCAL_BASE), 1);
 502    OUT_RING  (chan, 0);
 503
 504    for (i = 0; i < 5; ++i) {
 505       BEGIN_RING(chan, RING_3D(TEX_LIMITS(i)), 1);
 506       OUT_RING  (chan, 0x54);
 507    }
 508    BEGIN_RING(chan, RING_3D(LINKED_TSC), 1);
 509    OUT_RING  (chan, 0);
 510
 511    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20,
 512                         &screen->vfetch_cache);
 513    if (ret)
 514       goto fail;
 515
 516    BEGIN_RING(chan, RING_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
 517    OUT_RELOCh(chan, screen->vfetch_cache, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
 518    OUT_RELOCl(chan, screen->vfetch_cache, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
 519    OUT_RING  (chan, 3);
 520
 521    ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, &screen->txc);
 522    if (ret)
 523       goto fail;
 524
 525    BEGIN_RING(chan, RING_3D(TIC_ADDRESS_HIGH), 3);
 526    OUT_RELOCh(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 527    OUT_RELOCl(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 528    OUT_RING  (chan, NVC0_TIC_MAX_ENTRIES - 1);
 529
 530    BEGIN_RING(chan, RING_3D(TSC_ADDRESS_HIGH), 3);
 531    OUT_RELOCh(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 532    OUT_RELOCl(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
 533    OUT_RING  (chan, NVC0_TSC_MAX_ENTRIES - 1);
 534
 535    BEGIN_RING(chan, RING_3D(SCREEN_Y_CONTROL), 1);
 536    OUT_RING  (chan, 0);
 537    BEGIN_RING(chan, RING_3D(WINDOW_OFFSET_X), 2);
 538    OUT_RING  (chan, 0);
 539    OUT_RING  (chan, 0);
 540    BEGIN_RING(chan, RING_3D_(0x1590), 1); /* deactivate ZCULL */
 541    OUT_RING  (chan, 0x3f);
 542
 543    BEGIN_RING(chan, RING_3D(CLIP_RECTS_MODE), 1);
 544    OUT_RING  (chan, NVC0_3D_CLIP_RECTS_MODE_INSIDE_ANY);
 545    BEGIN_RING(chan, RING_3D(CLIP_RECT_HORIZ(0)), 8 * 2);
 546    for (i = 0; i < 8 * 2; ++i)
 547       OUT_RING(chan, 0);
 548    BEGIN_RING(chan, RING_3D(CLIP_RECTS_EN), 1);
 549    OUT_RING  (chan, 0);
 550    BEGIN_RING(chan, RING_3D(CLIPID_ENABLE), 1);
 551    OUT_RING  (chan, 0);
 552
 553    /* neither scissors, viewport nor stencil mask should affect clears */
 554    BEGIN_RING(chan, RING_3D(CLEAR_FLAGS), 1);
 555    OUT_RING  (chan, 0);
 556
 557    BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
 558    OUT_RING  (chan, 1);
 559    BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
 560    OUT_RINGf (chan, 0.0f);
 561    OUT_RINGf (chan, 1.0f);
 562    BEGIN_RING(chan, RING_3D(VIEW_VOLUME_CLIP_CTRL), 1);
 563    OUT_RING  (chan, NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1);
 564
 565    /* We use scissors instead of exact view volume clipping,
 566     * so they're always enabled.
 567     */
 568    BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 3);
 569    OUT_RING  (chan, 1);
 570    OUT_RING  (chan, 8192 << 16);
 571    OUT_RING  (chan, 8192 << 16);
 572
 573 #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
 574
 575    i = 0;
 576    MK_MACRO(NVC0_3D_BLEND_ENABLES, nvc0_9097_blend_enables);
 577    MK_MACRO(NVC0_3D_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
 578    MK_MACRO(NVC0_3D_TEP_SELECT, nvc0_9097_tep_select);
 579    MK_MACRO(NVC0_3D_GP_SELECT, nvc0_9097_gp_select);
 580    MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
 581    MK_MACRO(NVC0_3D_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
 582
 583    BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1);
 584    OUT_RING  (chan, 1);
 585    BEGIN_RING(chan, RING_3D(RT_SEPARATE_FRAG_DATA), 1);
 586    OUT_RING  (chan, 1);
 587    BEGIN_RING(chan, RING_3D(GP_SELECT), 1);
 588    OUT_RING  (chan, 0x40);
 589    BEGIN_RING(chan, RING_3D(LAYER), 1);
 590    OUT_RING  (chan, 0);
 591    BEGIN_RING(chan, RING_3D(TEP_SELECT), 1);
 592    OUT_RING  (chan, 0x30);
 593    BEGIN_RING(chan, RING_3D(PATCH_VERTICES), 1);
 594    OUT_RING  (chan, 3);
 595    BEGIN_RING(chan, RING_3D(SP_SELECT(2)), 1);
 596    OUT_RING  (chan, 0x20);
 597    BEGIN_RING(chan, RING_3D(SP_SELECT(0)), 1);
 598    OUT_RING  (chan, 0x00);
 599
 600    BEGIN_RING(chan, RING_3D(POINT_COORD_REPLACE), 1);
 601    OUT_RING  (chan, 0);
 602    BEGIN_RING(chan, RING_3D(POINT_RASTER_RULES), 1);
 603    OUT_RING  (chan, NVC0_3D_POINT_RASTER_RULES_OGL);
 604
 605    BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1);
 606    OUT_RING  (chan, 1);
 607
 608    BEGIN_RING(chan, RING_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
 609    OUT_RING  (chan, 0xab);
 610    OUT_RING  (chan, 0x00000000);
 611
 612    FIRE_RING (chan);
 613
 614    screen->tic.entries = CALLOC(4096, sizeof(void *));
 615    screen->tsc.entries = screen->tic.entries + 2048;
 616
 617    screen->mm_VRAM_fe0 = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0);
 618
 619    nouveau_fence_new(&screen->base, &screen->base.fence.current, FALSE);
 620
 621    return pscreen;
 622
 623 fail:
 624    nvc0_screen_destroy(pscreen);
 625    return NULL;
 626 }
 627
 628 void
 629 nvc0_screen_make_buffers_resident(struct nvc0_screen *screen)
 630 {
 631    struct nouveau_channel *chan = screen->base.channel;
 632
 633    const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
 634
 635    MARK_RING(chan, 5, 5);
 636    nouveau_bo_validate(chan, screen->text, flags);
 637    nouveau_bo_validate(chan, screen->uniforms, flags);
 638    nouveau_bo_validate(chan, screen->txc, flags);
 639    nouveau_bo_validate(chan, screen->vfetch_cache, flags);
 640
 641    if (screen->cur_ctx && screen->cur_ctx->state.tls_required)
 642       nouveau_bo_validate(chan, screen->tls, flags);
 643 }
 644
 645 int
 646 nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
 647 {
 648    int i = screen->tic.next;
 649
 650    while (screen->tic.lock[i / 32] & (1 << (i % 32)))
 651       i = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
 652
 653    screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
 654
 655    if (screen->tic.entries[i])
 656       nv50_tic_entry(screen->tic.entries[i])->id = -1;
 657
 658    screen->tic.entries[i] = entry;
 659    return i;
 660 }
 661
 662 int
 663 nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
 664 {
 665    int i = screen->tsc.next;
 666
 667    while (screen->tsc.lock[i / 32] & (1 << (i % 32)))
 668       i = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
 669
 670    screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
 671
 672    if (screen->tsc.entries[i])
 673       nv50_tsc_entry(screen->tsc.entries[i])->id = -1;
 674
 675    screen->tsc.entries[i] = entry;
 676    return i;
 677 }