nvc0: add MARK_RING where missing to avoid too many relocs errors
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_screen.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23 #include "util/u_format_s3tc.h"
24 #include "pipe/p_screen.h"
25
26 #include "nvc0_fence.h"
27 #include "nvc0_context.h"
28 #include "nvc0_screen.h"
29
30 #include "nouveau/nv_object.xml.h"
31 #include "nvc0_graph_macros.h"
32
33 static boolean
34 nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
35 enum pipe_format format,
36 enum pipe_texture_target target,
37 unsigned sample_count,
38 unsigned bindings, unsigned geom_flags)
39 {
40 if (sample_count > 1)
41 return FALSE;
42
43 if (!util_format_s3tc_enabled) {
44 switch (format) {
45 case PIPE_FORMAT_DXT1_RGB:
46 case PIPE_FORMAT_DXT1_RGBA:
47 case PIPE_FORMAT_DXT3_RGBA:
48 case PIPE_FORMAT_DXT5_RGBA:
49 return FALSE;
50 default:
51 break;
52 }
53 }
54
55 /* transfers & shared are always supported */
56 bindings &= ~(PIPE_BIND_TRANSFER_READ |
57 PIPE_BIND_TRANSFER_WRITE |
58 PIPE_BIND_SHARED);
59
60 return (nvc0_format_table[format].usage & bindings) == bindings;
61 }
62
63 static int
64 nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
65 {
66 switch (param) {
67 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
68 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
69 return 32;
70 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
71 return 64;
72 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
73 return 13;
74 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
75 return 10;
76 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
77 return 13;
78 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
79 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
80 case PIPE_CAP_TEXTURE_SWIZZLE:
81 case PIPE_CAP_TEXTURE_SHADOW_MAP:
82 case PIPE_CAP_NPOT_TEXTURES:
83 case PIPE_CAP_ANISOTROPIC_FILTER:
84 return 1;
85 case PIPE_CAP_TWO_SIDED_STENCIL:
86 case PIPE_CAP_DEPTH_CLAMP:
87 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
88 case PIPE_CAP_POINT_SPRITE:
89 return 1;
90 case PIPE_CAP_GLSL:
91 case PIPE_CAP_SM3:
92 return 1;
93 case PIPE_CAP_MAX_RENDER_TARGETS:
94 return 8;
95 case PIPE_CAP_TIMER_QUERY:
96 case PIPE_CAP_OCCLUSION_QUERY:
97 return 1;
98 case PIPE_CAP_STREAM_OUTPUT:
99 return 0;
100 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
101 case PIPE_CAP_INDEP_BLEND_ENABLE:
102 case PIPE_CAP_INDEP_BLEND_FUNC:
103 return 1;
104 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
105 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
106 return 1;
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
109 return 0;
110 case PIPE_CAP_SHADER_STENCIL_EXPORT:
111 return 0;
112 case PIPE_CAP_PRIMITIVE_RESTART:
113 case PIPE_CAP_INSTANCED_DRAWING:
114 return 1;
115 default:
116 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
117 return 0;
118 }
119 }
120
121 static int
122 nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
123 enum pipe_shader_cap param)
124 {
125 switch (shader) {
126 case PIPE_SHADER_VERTEX:
127 /*
128 case PIPE_SHADER_TESSELLATION_CONTROL:
129 case PIPE_SHADER_TESSELLATION_EVALUATION:
130 */
131 case PIPE_SHADER_GEOMETRY:
132 case PIPE_SHADER_FRAGMENT:
133 break;
134 default:
135 return 0;
136 }
137
138 switch (param) {
139 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
140 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
141 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
142 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
143 return 16384;
144 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
145 return 4;
146 case PIPE_SHADER_CAP_MAX_INPUTS:
147 if (shader == PIPE_SHADER_VERTEX)
148 return 32;
149 return 0x300 / 16;
150 case PIPE_SHADER_CAP_MAX_CONSTS:
151 return 65536 / 16;
152 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
153 return 14;
154 case PIPE_SHADER_CAP_MAX_ADDRS:
155 return 1;
156 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
157 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
158 return shader != PIPE_SHADER_FRAGMENT;
159 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
160 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
161 return 1;
162 case PIPE_SHADER_CAP_MAX_PREDS:
163 return 0;
164 case PIPE_SHADER_CAP_MAX_TEMPS:
165 return NVC0_CAP_MAX_PROGRAM_TEMPS;
166 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
167 return 1;
168 case PIPE_SHADER_CAP_SUBROUTINES:
169 return 0; /* please inline, or provide function declarations */
170 default:
171 NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
172 return 0;
173 }
174 }
175
176 static float
177 nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
178 {
179 switch (param) {
180 case PIPE_CAP_MAX_LINE_WIDTH:
181 case PIPE_CAP_MAX_LINE_WIDTH_AA:
182 return 10.0f;
183 case PIPE_CAP_MAX_POINT_WIDTH:
184 case PIPE_CAP_MAX_POINT_WIDTH_AA:
185 return 64.0f;
186 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
187 return 16.0f;
188 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
189 return 4.0f;
190 default:
191 NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
192 return 0.0f;
193 }
194 }
195
196 static void
197 nvc0_screen_destroy(struct pipe_screen *pscreen)
198 {
199 struct nvc0_screen *screen = nvc0_screen(pscreen);
200
201 nvc0_fence_wait(screen->fence.current);
202 nvc0_fence_reference(&screen->fence.current, NULL);
203
204 nouveau_bo_ref(NULL, &screen->text);
205 nouveau_bo_ref(NULL, &screen->tls);
206 nouveau_bo_ref(NULL, &screen->txc);
207 nouveau_bo_ref(NULL, &screen->fence.bo);
208 nouveau_bo_ref(NULL, &screen->mp_stack_bo);
209
210 nouveau_resource_destroy(&screen->text_heap);
211
212 if (screen->tic.entries)
213 FREE(screen->tic.entries);
214
215 nvc0_mm_destroy(screen->mm_GART);
216 nvc0_mm_destroy(screen->mm_VRAM);
217 nvc0_mm_destroy(screen->mm_VRAM_fe0);
218
219 nouveau_grobj_free(&screen->fermi);
220 nouveau_grobj_free(&screen->eng2d);
221 nouveau_grobj_free(&screen->m2mf);
222
223 nouveau_screen_fini(&screen->base);
224
225 FREE(screen);
226 }
227
228 static int
229 nvc0_graph_set_macro(struct nvc0_screen *screen, uint32_t m, unsigned pos,
230 unsigned size, const uint32_t *data)
231 {
232 struct nouveau_channel *chan = screen->base.channel;
233
234 size /= 4;
235
236 BEGIN_RING(chan, RING_3D_(NVC0_GRAPH_MACRO_ID), 2);
237 OUT_RING (chan, (m - 0x3800) / 8);
238 OUT_RING (chan, pos);
239 BEGIN_RING_1I(chan, RING_3D_(NVC0_GRAPH_MACRO_UPLOAD_POS), size + 1);
240 OUT_RING (chan, pos);
241 OUT_RINGp (chan, data, size);
242
243 return pos + size;
244 }
245
246 static void
247 nvc0_screen_fence_reference(struct pipe_screen *pscreen,
248 struct pipe_fence_handle **ptr,
249 struct pipe_fence_handle *fence)
250 {
251 nvc0_fence_reference((struct nvc0_fence **)ptr, nvc0_fence(fence));
252 }
253
254 static int
255 nvc0_screen_fence_signalled(struct pipe_screen *pscreen,
256 struct pipe_fence_handle *fence,
257 unsigned flags)
258 {
259 return !(nvc0_fence_signalled(nvc0_fence(fence)));
260 }
261
262 static int
263 nvc0_screen_fence_finish(struct pipe_screen *pscreen,
264 struct pipe_fence_handle *fence,
265 unsigned flags)
266 {
267 return nvc0_fence_wait((struct nvc0_fence *)fence) != TRUE;
268 }
269
270 static void
271 nvc0_magic_3d_init(struct nouveau_channel *chan)
272 {
273 BEGIN_RING(chan, RING_3D_(0x10cc), 1);
274 OUT_RING (chan, 0xff);
275 BEGIN_RING(chan, RING_3D_(0x10e0), 2);
276 OUT_RING(chan, 0xff);
277 OUT_RING(chan, 0xff);
278 BEGIN_RING(chan, RING_3D_(0x10ec), 2);
279 OUT_RING(chan, 0xff);
280 OUT_RING(chan, 0xff);
281 BEGIN_RING(chan, RING_3D_(0x074c), 1);
282 OUT_RING (chan, 0x3f);
283
284 BEGIN_RING(chan, RING_3D_(0x10f8), 1);
285 OUT_RING (chan, 0x0101);
286
287 BEGIN_RING(chan, RING_3D_(0x16a8), 1);
288 OUT_RING (chan, (3 << 16) | 3);
289 BEGIN_RING(chan, RING_3D_(0x1794), 1);
290 OUT_RING (chan, (2 << 16) | 2);
291 BEGIN_RING(chan, RING_3D_(0x0de8), 1);
292 OUT_RING (chan, 1);
293
294 #if 0 /* software method */
295 BEGIN_RING(chan, RING_3D_(0x1528), 1); /* MP poke */
296 OUT_RING (chan, 0);
297 #endif
298
299 BEGIN_RING(chan, RING_3D_(0x12ac), 1);
300 OUT_RING (chan, 0);
301 BEGIN_RING(chan, RING_3D_(0x0218), 1);
302 OUT_RING (chan, 0x10);
303 BEGIN_RING(chan, RING_3D_(0x10fc), 1);
304 OUT_RING (chan, 0x10);
305 BEGIN_RING(chan, RING_3D_(0x1290), 1);
306 OUT_RING (chan, 0x10);
307 BEGIN_RING(chan, RING_3D_(0x12d8), 2);
308 OUT_RING (chan, 0x10);
309 OUT_RING (chan, 0x10);
310 BEGIN_RING(chan, RING_3D_(0x06d4), 1);
311 OUT_RING (chan, 8);
312 BEGIN_RING(chan, RING_3D_(0x1140), 1);
313 OUT_RING (chan, 0x10);
314 BEGIN_RING(chan, RING_3D_(0x1610), 1);
315 OUT_RING (chan, 0xe);
316
317 BEGIN_RING(chan, RING_3D_(0x164c), 1);
318 OUT_RING (chan, 1 << 12);
319 BEGIN_RING(chan, RING_3D_(0x151c), 1);
320 OUT_RING (chan, 1);
321 BEGIN_RING(chan, RING_3D_(0x020c), 1);
322 OUT_RING (chan, 1);
323 BEGIN_RING(chan, RING_3D_(0x030c), 1);
324 OUT_RING (chan, 0);
325 BEGIN_RING(chan, RING_3D_(0x0300), 1);
326 OUT_RING (chan, 3);
327 #if 0 /* software method */
328 BEGIN_RING(chan, RING_3D_(0x1280), 1); /* PGRAPH poke */
329 OUT_RING (chan, 0);
330 #endif
331 BEGIN_RING(chan, RING_3D_(0x02d0), 1);
332 OUT_RING (chan, 0x1f40);
333 BEGIN_RING(chan, RING_3D_(0x00fdc), 1);
334 OUT_RING (chan, 1);
335 BEGIN_RING(chan, RING_3D_(0x19c0), 1);
336 OUT_RING (chan, 1);
337 BEGIN_RING(chan, RING_3D_(0x075c), 1);
338 OUT_RING (chan, 3);
339
340 BEGIN_RING(chan, RING_3D_(0x0fac), 1);
341 OUT_RING (chan, 0);
342 BEGIN_RING(chan, RING_3D_(0x0f90), 1);
343 OUT_RING (chan, 0);
344 }
345
346 #define FAIL_SCREEN_INIT(str, err) \
347 do { \
348 NOUVEAU_ERR(str, err); \
349 nvc0_screen_destroy(pscreen); \
350 return NULL; \
351 } while(0)
352
353 struct pipe_screen *
354 nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
355 {
356 struct nvc0_screen *screen;
357 struct nouveau_channel *chan;
358 struct pipe_screen *pscreen;
359 int ret;
360 unsigned i;
361
362 screen = CALLOC_STRUCT(nvc0_screen);
363 if (!screen)
364 return NULL;
365 pscreen = &screen->base.base;
366
367 ret = nouveau_screen_init(&screen->base, dev);
368 if (ret) {
369 nvc0_screen_destroy(pscreen);
370 return NULL;
371 }
372 chan = screen->base.channel;
373
374 pscreen->winsys = ws;
375 pscreen->destroy = nvc0_screen_destroy;
376 pscreen->context_create = nvc0_create;
377 pscreen->is_format_supported = nvc0_screen_is_format_supported;
378 pscreen->get_param = nvc0_screen_get_param;
379 pscreen->get_shader_param = nvc0_screen_get_shader_param;
380 pscreen->get_paramf = nvc0_screen_get_paramf;
381 pscreen->fence_reference = nvc0_screen_fence_reference;
382 pscreen->fence_signalled = nvc0_screen_fence_signalled;
383 pscreen->fence_finish = nvc0_screen_fence_finish;
384
385 nvc0_screen_init_resource_functions(pscreen);
386
387 screen->base.vertex_buffer_flags = NOUVEAU_BO_GART;
388 screen->base.index_buffer_flags = 0;
389
390 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096,
391 &screen->fence.bo);
392 if (ret)
393 goto fail;
394 nouveau_bo_map(screen->fence.bo, NOUVEAU_BO_RDWR);
395 screen->fence.map = screen->fence.bo->map;
396 nouveau_bo_unmap(screen->fence.bo);
397
398 for (i = 0; i < NVC0_SCRATCH_NR_BUFFERS; ++i) {
399 ret = nouveau_bo_new(dev, NOUVEAU_BO_GART, 0, NVC0_SCRATCH_SIZE,
400 &screen->scratch.bo[i]);
401 if (ret)
402 goto fail;
403 }
404
405 ret = nouveau_grobj_alloc(chan, 0xbeef9039, NVC0_M2MF, &screen->m2mf);
406 if (ret)
407 FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret);
408
409 BIND_RING (chan, screen->m2mf, NVC0_SUBCH_MF);
410 BEGIN_RING(chan, RING_MF(NOTIFY_ADDRESS_HIGH), 3);
411 OUT_RELOCh(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
412 OUT_RELOCl(chan, screen->fence.bo, 16, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
413 OUT_RING (chan, 0);
414
415 ret = nouveau_grobj_alloc(chan, 0xbeef902d, NVC0_2D, &screen->eng2d);
416 if (ret)
417 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret);
418
419 BIND_RING (chan, screen->eng2d, NVC0_SUBCH_2D);
420 BEGIN_RING(chan, RING_2D(OPERATION), 1);
421 OUT_RING (chan, NVC0_2D_OPERATION_SRCCOPY);
422 BEGIN_RING(chan, RING_2D(CLIP_ENABLE), 1);
423 OUT_RING (chan, 0);
424 BEGIN_RING(chan, RING_2D(COLOR_KEY_ENABLE), 1);
425 OUT_RING (chan, 0);
426 BEGIN_RING(chan, RING_2D_(0x0884), 1);
427 OUT_RING (chan, 0x3f);
428 BEGIN_RING(chan, RING_2D_(0x0888), 1);
429 OUT_RING (chan, 1);
430
431 ret = nouveau_grobj_alloc(chan, 0xbeef9097, NVC0_3D, &screen->fermi);
432 if (ret)
433 FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret);
434
435 BIND_RING (chan, screen->fermi, NVC0_SUBCH_3D);
436 BEGIN_RING(chan, RING_3D(NOTIFY_ADDRESS_HIGH), 3);
437 OUT_RELOCh(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
438 OUT_RELOCl(chan, screen->fence.bo, 32, NOUVEAU_BO_GART | NOUVEAU_BO_RDWR);
439 OUT_RING (chan, 0);
440
441 BEGIN_RING(chan, RING_3D(COND_MODE), 1);
442 OUT_RING (chan, NVC0_3D_COND_MODE_ALWAYS);
443
444 BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
445 OUT_RING (chan, 1);
446
447 BEGIN_RING(chan, RING_3D(CSAA_ENABLE), 1);
448 OUT_RING (chan, 0);
449 BEGIN_RING(chan, RING_3D(MULTISAMPLE_ENABLE), 1);
450 OUT_RING (chan, 0);
451 BEGIN_RING(chan, RING_3D(MULTISAMPLE_MODE), 1);
452 OUT_RING (chan, NVC0_3D_MULTISAMPLE_MODE_1X);
453 BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1);
454 OUT_RING (chan, 0);
455
456 nvc0_magic_3d_init(chan);
457
458 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, &screen->text);
459 if (ret)
460 goto fail;
461
462 nouveau_resource_init(&screen->text_heap, 0, 1 << 20);
463
464 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16,
465 &screen->uniforms);
466 if (ret)
467 goto fail;
468
469 /* auxiliary constants (6 user clip planes, base instance id) */
470 BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
471 OUT_RING (chan, 256);
472 OUT_RELOCh(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
473 OUT_RELOCl(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
474 for (i = 0; i < 5; ++i) {
475 BEGIN_RING(chan, RING_3D(CB_BIND(i)), 1);
476 OUT_RING (chan, (15 << 4) | 1);
477 }
478
479 screen->tls_size = 4 * 4 * 32 * 128 * 4;
480 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
481 screen->tls_size, &screen->tls);
482 if (ret)
483 goto fail;
484
485 BEGIN_RING(chan, RING_3D(CODE_ADDRESS_HIGH), 2);
486 OUT_RELOCh(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
487 OUT_RELOCl(chan, screen->text, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
488 BEGIN_RING(chan, RING_3D(LOCAL_ADDRESS_HIGH), 4);
489 OUT_RELOCh(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
490 OUT_RELOCl(chan, screen->tls, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
491 OUT_RING (chan, screen->tls_size >> 32);
492 OUT_RING (chan, screen->tls_size);
493 BEGIN_RING(chan, RING_3D(LOCAL_BASE), 1);
494 OUT_RING (chan, 0);
495
496 for (i = 0; i < 5; ++i) {
497 BEGIN_RING(chan, RING_3D(TEX_LIMITS(i)), 1);
498 OUT_RING (chan, 0x54);
499 }
500 BEGIN_RING(chan, RING_3D(LINKED_TSC), 1);
501 OUT_RING (chan, 0);
502
503 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20,
504 &screen->mp_stack_bo);
505 if (ret)
506 goto fail;
507
508 BEGIN_RING(chan, RING_3D_(0x17bc), 3);
509 OUT_RELOCh(chan, screen->mp_stack_bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
510 OUT_RELOCl(chan, screen->mp_stack_bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
511 OUT_RING (chan, 1);
512
513 ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, &screen->txc);
514 if (ret)
515 goto fail;
516
517 BEGIN_RING(chan, RING_3D(TIC_ADDRESS_HIGH), 3);
518 OUT_RELOCh(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
519 OUT_RELOCl(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
520 OUT_RING (chan, NVC0_TIC_MAX_ENTRIES - 1);
521
522 BEGIN_RING(chan, RING_3D(TSC_ADDRESS_HIGH), 3);
523 OUT_RELOCh(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
524 OUT_RELOCl(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
525 OUT_RING (chan, NVC0_TSC_MAX_ENTRIES - 1);
526
527 BEGIN_RING(chan, RING_3D(SCREEN_Y_CONTROL), 1);
528 OUT_RING (chan, 0);
529 BEGIN_RING(chan, RING_3D(WINDOW_OFFSET_X), 2);
530 OUT_RING (chan, 0);
531 OUT_RING (chan, 0);
532 BEGIN_RING(chan, RING_3D_(0x1590), 1); /* deactivate ZCULL */
533 OUT_RING (chan, 0x3f);
534
535 BEGIN_RING(chan, RING_3D(VIEWPORT_CLIP_RECTS_EN), 1);
536 OUT_RING (chan, 0);
537 BEGIN_RING(chan, RING_3D(CLIPID_ENABLE), 1);
538 OUT_RING (chan, 0);
539
540 BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
541 OUT_RING (chan, 1);
542 BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
543 OUT_RINGf (chan, 0.0f);
544 OUT_RINGf (chan, 1.0f);
545
546 /* We use scissors instead of exact view volume clipping,
547 * so they're always enabled.
548 */
549 BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 3);
550 OUT_RING (chan, 1);
551 OUT_RING (chan, 8192 << 16);
552 OUT_RING (chan, 8192 << 16);
553
554 BEGIN_RING(chan, RING_3D_(0x0fac), 1);
555 OUT_RING (chan, 0);
556 BEGIN_RING(chan, RING_3D_(0x3484), 1);
557 OUT_RING (chan, 0);
558 BEGIN_RING(chan, RING_3D_(0x0dbc), 1);
559 OUT_RING (chan, 0x00010000);
560 BEGIN_RING(chan, RING_3D_(0x0dd8), 1);
561 OUT_RING (chan, 0xff800006);
562 BEGIN_RING(chan, RING_3D_(0x3488), 1);
563 OUT_RING (chan, 0);
564
565 #define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
566
567 i = 0;
568 MK_MACRO(NVC0_3D_BLEND_ENABLES, nvc0_9097_blend_enables);
569 MK_MACRO(NVC0_3D_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
570 MK_MACRO(NVC0_3D_TEP_SELECT, nvc0_9097_tep_select);
571 MK_MACRO(NVC0_3D_GP_SELECT, nvc0_9097_gp_select);
572 MK_MACRO(NVC0_3D_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
573 MK_MACRO(NVC0_3D_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
574 MK_MACRO(NVC0_3D_COLOR_MASK_BROADCAST, nvc0_9097_color_mask_brdc);
575
576 BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1);
577 OUT_RING (chan, 1);
578 BEGIN_RING(chan, RING_3D(GP_SELECT), 1);
579 OUT_RING (chan, 0x40);
580 BEGIN_RING(chan, RING_3D(GP_BUILTIN_RESULT_EN), 1);
581 OUT_RING (chan, 0);
582 BEGIN_RING(chan, RING_3D(TEP_SELECT), 1);
583 OUT_RING (chan, 0x30);
584 BEGIN_RING(chan, RING_3D(PATCH_VERTICES), 1);
585 OUT_RING (chan, 3);
586 BEGIN_RING(chan, RING_3D(SP_SELECT(2)), 1);
587 OUT_RING (chan, 0x20);
588 BEGIN_RING(chan, RING_3D(SP_SELECT(0)), 1);
589 OUT_RING (chan, 0x00);
590
591 BEGIN_RING(chan, RING_3D(POINT_COORD_REPLACE), 1);
592 OUT_RING (chan, 0);
593 BEGIN_RING(chan, RING_3D(POINT_RASTER_RULES), 1);
594 OUT_RING (chan, NVC0_3D_POINT_RASTER_RULES_OGL);
595
596 BEGIN_RING(chan, RING_3D(FRAG_COLOR_CLAMP_EN), 1);
597 OUT_RING (chan, 0x11111111);
598 BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1);
599 OUT_RING (chan, 1);
600
601 BEGIN_RING(chan, RING_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
602 OUT_RING (chan, 0xab);
603 OUT_RING (chan, 0x00000000);
604
605 FIRE_RING (chan);
606
607 screen->tic.entries = CALLOC(4096, sizeof(void *));
608 screen->tsc.entries = screen->tic.entries + 2048;
609
610 screen->mm_GART = nvc0_mm_create(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
611 0x000);
612 screen->mm_VRAM = nvc0_mm_create(dev, NOUVEAU_BO_VRAM, 0x000);
613 screen->mm_VRAM_fe0 = nvc0_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0);
614
615 nvc0_screen_fence_new(screen, &screen->fence.current, FALSE);
616
617 return pscreen;
618
619 fail:
620 nvc0_screen_destroy(pscreen);
621 return NULL;
622 }
623
624 void
625 nvc0_screen_make_buffers_resident(struct nvc0_screen *screen)
626 {
627 struct nouveau_channel *chan = screen->base.channel;
628
629 const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD;
630
631 MARK_RING(chan, 5, 5);
632 nouveau_bo_validate(chan, screen->text, flags);
633 nouveau_bo_validate(chan, screen->uniforms, flags);
634 nouveau_bo_validate(chan, screen->txc, flags);
635 nouveau_bo_validate(chan, screen->tls, flags);
636 nouveau_bo_validate(chan, screen->mp_stack_bo, flags);
637 }
638
639 int
640 nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
641 {
642 int i = screen->tic.next;
643
644 while (screen->tic.lock[i / 32] & (1 << (i % 32)))
645 i = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
646
647 screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
648
649 if (screen->tic.entries[i])
650 nvc0_tic_entry(screen->tic.entries[i])->id = -1;
651
652 screen->tic.entries[i] = entry;
653 return i;
654 }
655
656 int
657 nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
658 {
659 int i = screen->tsc.next;
660
661 while (screen->tsc.lock[i / 32] & (1 << (i % 32)))
662 i = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
663
664 screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
665
666 if (screen->tsc.entries[i])
667 nvc0_tsc_entry(screen->tsc.entries[i])->id = -1;
668
669 screen->tsc.entries[i] = entry;
670 return i;
671 }