1 #ifndef __NVC0_SCREEN_H__
2 #define __NVC0_SCREEN_H__
5 #include "nouveau/nouveau_screen.h"
6 #include "nouveau/nouveau_mm.h"
7 #include "nouveau/nouveau_fence.h"
9 #include "nvc0_winsys.h"
10 #include "nvc0_stateobj.h"
12 #define NVC0_TIC_MAX_ENTRIES 2048
13 #define NVC0_TSC_MAX_ENTRIES 2048
17 #define NVC0_SCRATCH_SIZE (2 << 20)
18 #define NVC0_SCRATCH_NR_BUFFERS 2
20 #define NVC0_SCREEN_RESIDENT_BO_COUNT 5
23 struct nouveau_screen base
;
24 struct nouveau_winsys
*nvws
;
26 struct nvc0_context
*cur_ctx
;
28 struct nouveau_bo
*text
;
29 struct nouveau_bo
*uniforms
;
30 struct nouveau_bo
*tls
;
31 struct nouveau_bo
*txc
; /* TIC (offset 0) and TSC (65536) */
32 struct nouveau_bo
*vfetch_cache
;
36 struct nouveau_resource
*text_heap
;
39 struct nouveau_bo
*bo
[NVC0_SCRATCH_NR_BUFFERS
];
48 uint32_t lock
[NVC0_TIC_MAX_ENTRIES
/ 32];
54 uint32_t lock
[NVC0_TSC_MAX_ENTRIES
/ 32];
58 struct nouveau_bo
*bo
;
62 struct nouveau_mman
*mm_VRAM_fe0
;
64 struct nouveau_grobj
*fermi
;
65 struct nouveau_grobj
*eng2d
;
66 struct nouveau_grobj
*m2mf
;
69 static INLINE
struct nvc0_screen
*
70 nvc0_screen(struct pipe_screen
*screen
)
72 return (struct nvc0_screen
*)screen
;
75 void nvc0_screen_make_buffers_resident(struct nvc0_screen
*);
77 int nvc0_screen_tic_alloc(struct nvc0_screen
*, void *);
78 int nvc0_screen_tsc_alloc(struct nvc0_screen
*, void *);
81 nvc0_resource_fence(struct nv04_resource
*res
, uint32_t flags
)
83 struct nvc0_screen
*screen
= nvc0_screen(res
->base
.screen
);
86 nouveau_fence_ref(screen
->base
.fence
.current
, &res
->fence
);
88 if (flags
& NOUVEAU_BO_WR
)
89 nouveau_fence_ref(screen
->base
.fence
.current
, &res
->fence_wr
);
94 nvc0_resource_validate(struct nv04_resource
*res
, uint32_t flags
)
96 struct nvc0_screen
*screen
= nvc0_screen(res
->base
.screen
);
98 if (likely(res
->bo
)) {
99 nouveau_bo_validate(screen
->base
.channel
, res
->bo
, flags
);
101 if (flags
& NOUVEAU_BO_WR
)
102 res
->status
|= NOUVEAU_BUFFER_STATUS_GPU_WRITING
;
103 if (flags
& NOUVEAU_BO_RD
)
104 res
->status
|= NOUVEAU_BUFFER_STATUS_GPU_READING
;
106 nvc0_resource_fence(res
, flags
);
117 extern const struct nvc0_format nvc0_format_table
[];
120 nvc0_screen_tic_unlock(struct nvc0_screen
*screen
, struct nv50_tic_entry
*tic
)
123 screen
->tic
.lock
[tic
->id
/ 32] &= ~(1 << (tic
->id
% 32));
127 nvc0_screen_tsc_unlock(struct nvc0_screen
*screen
, struct nv50_tsc_entry
*tsc
)
130 screen
->tsc
.lock
[tsc
->id
/ 32] &= ~(1 << (tsc
->id
% 32));
134 nvc0_screen_tic_free(struct nvc0_screen
*screen
, struct nv50_tic_entry
*tic
)
137 screen
->tic
.entries
[tic
->id
] = NULL
;
138 screen
->tic
.lock
[tic
->id
/ 32] &= ~(1 << (tic
->id
% 32));
143 nvc0_screen_tsc_free(struct nvc0_screen
*screen
, struct nv50_tsc_entry
*tsc
)
146 screen
->tsc
.entries
[tsc
->id
] = NULL
;
147 screen
->tsc
.lock
[tsc
->id
/ 32] &= ~(1 << (tsc
->id
% 32));