Merge branch 'gallium-polygon-stipple'
[mesa.git] / src / gallium / drivers / nvc0 / nvc0_screen.h
1 #ifndef __NVC0_SCREEN_H__
2 #define __NVC0_SCREEN_H__
3
4 #define NOUVEAU_NVC0
5 #include "nouveau/nouveau_screen.h"
6 #include "nouveau/nouveau_mm.h"
7 #include "nouveau/nouveau_fence.h"
8 #undef NOUVEAU_NVC0
9 #include "nvc0_winsys.h"
10 #include "nvc0_stateobj.h"
11
12 #define NVC0_TIC_MAX_ENTRIES 2048
13 #define NVC0_TSC_MAX_ENTRIES 2048
14
15 struct nvc0_context;
16
17 #define NVC0_SCRATCH_SIZE (2 << 20)
18 #define NVC0_SCRATCH_NR_BUFFERS 2
19
20 #define NVC0_SCREEN_RESIDENT_BO_COUNT 5
21
22 struct nvc0_screen {
23 struct nouveau_screen base;
24 struct nouveau_winsys *nvws;
25
26 struct nvc0_context *cur_ctx;
27
28 struct nouveau_bo *text;
29 struct nouveau_bo *uniforms;
30 struct nouveau_bo *tls;
31 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
32 struct nouveau_bo *vfetch_cache;
33
34 uint64_t tls_size;
35
36 struct nouveau_resource *text_heap;
37
38 struct {
39 struct nouveau_bo *bo[NVC0_SCRATCH_NR_BUFFERS];
40 uint8_t *buf;
41 int index;
42 uint32_t offset;
43 } scratch;
44
45 struct {
46 void **entries;
47 int next;
48 uint32_t lock[NVC0_TIC_MAX_ENTRIES / 32];
49 } tic;
50
51 struct {
52 void **entries;
53 int next;
54 uint32_t lock[NVC0_TSC_MAX_ENTRIES / 32];
55 } tsc;
56
57 struct {
58 struct nouveau_bo *bo;
59 uint32_t *map;
60 } fence;
61
62 struct nouveau_mman *mm_VRAM_fe0;
63
64 struct nouveau_grobj *fermi;
65 struct nouveau_grobj *eng2d;
66 struct nouveau_grobj *m2mf;
67 };
68
69 static INLINE struct nvc0_screen *
70 nvc0_screen(struct pipe_screen *screen)
71 {
72 return (struct nvc0_screen *)screen;
73 }
74
75 void nvc0_screen_make_buffers_resident(struct nvc0_screen *);
76
77 int nvc0_screen_tic_alloc(struct nvc0_screen *, void *);
78 int nvc0_screen_tsc_alloc(struct nvc0_screen *, void *);
79
80 static INLINE void
81 nvc0_resource_fence(struct nv04_resource *res, uint32_t flags)
82 {
83 struct nvc0_screen *screen = nvc0_screen(res->base.screen);
84
85 if (res->mm) {
86 nouveau_fence_ref(screen->base.fence.current, &res->fence);
87
88 if (flags & NOUVEAU_BO_WR)
89 nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
90 }
91 }
92
93 static INLINE void
94 nvc0_resource_validate(struct nv04_resource *res, uint32_t flags)
95 {
96 struct nvc0_screen *screen = nvc0_screen(res->base.screen);
97
98 if (likely(res->bo)) {
99 nouveau_bo_validate(screen->base.channel, res->bo, flags);
100
101 if (flags & NOUVEAU_BO_WR)
102 res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
103 if (flags & NOUVEAU_BO_RD)
104 res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
105
106 nvc0_resource_fence(res, flags);
107 }
108 }
109
110 struct nvc0_format {
111 uint32_t rt;
112 uint32_t tic;
113 uint32_t vtx;
114 uint32_t usage;
115 };
116
117 extern const struct nvc0_format nvc0_format_table[];
118
119 static INLINE void
120 nvc0_screen_tic_unlock(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
121 {
122 if (tic->id >= 0)
123 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
124 }
125
126 static INLINE void
127 nvc0_screen_tsc_unlock(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
128 {
129 if (tsc->id >= 0)
130 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
131 }
132
133 static INLINE void
134 nvc0_screen_tic_free(struct nvc0_screen *screen, struct nv50_tic_entry *tic)
135 {
136 if (tic->id >= 0) {
137 screen->tic.entries[tic->id] = NULL;
138 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
139 }
140 }
141
142 static INLINE void
143 nvc0_screen_tsc_free(struct nvc0_screen *screen, struct nv50_tsc_entry *tsc)
144 {
145 if (tsc->id >= 0) {
146 screen->tsc.entries[tsc->id] = NULL;
147 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
148 }
149 }
150
151 #endif