src/gallium/drivers/nvc0/nvc0_state.c

   1 /*
   2  * Copyright 2010 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_defines.h"
  24 #include "util/u_inlines.h"
  25 #include "util/u_transfer.h"
  26
  27 #include "tgsi/tgsi_parse.h"
  28
  29 #include "nvc0_stateobj.h"
  30 #include "nvc0_context.h"
  31
  32 #include "nvc0_3d.xml.h"
  33 #include "nv50/nv50_texture.xml.h"
  34
  35 #include "nouveau/nouveau_gldefs.h"
  36
  37 static INLINE uint32_t
  38 nvc0_colormask(unsigned mask)
  39 {
  40     uint32_t ret = 0;
  41
  42     if (mask & PIPE_MASK_R)
  43         ret |= 0x0001;
  44     if (mask & PIPE_MASK_G)
  45         ret |= 0x0010;
  46     if (mask & PIPE_MASK_B)
  47         ret |= 0x0100;
  48     if (mask & PIPE_MASK_A)
  49         ret |= 0x1000;
  50
  51     return ret;
  52 }
  53
  54 #define NVC0_BLEND_FACTOR_CASE(a, b) \
  55    case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
  56
  57 static INLINE uint32_t
  58 nvc0_blend_fac(unsigned factor)
  59 {
  60    switch (factor) {
  61    NVC0_BLEND_FACTOR_CASE(ONE, ONE);
  62    NVC0_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
  63    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
  64    NVC0_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
  65    NVC0_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
  66    NVC0_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
  67    NVC0_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
  68    NVC0_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
  69    NVC0_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
  70    NVC0_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
  71    NVC0_BLEND_FACTOR_CASE(ZERO, ZERO);
  72    NVC0_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
  73    NVC0_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
  74    NVC0_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
  75    NVC0_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
  76    NVC0_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
  77    NVC0_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
  78    NVC0_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
  79    NVC0_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
  80    default:
  81       return NV50_3D_BLEND_FACTOR_ZERO;
  82    }
  83 }
  84
  85 static void *
  86 nvc0_blend_state_create(struct pipe_context *pipe,
  87                         const struct pipe_blend_state *cso)
  88 {
  89     struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj);
  90     int i;
  91     uint32_t ms;
  92
  93     so->pipe = *cso;
  94
  95     SB_IMMED_3D(so, BLEND_INDEPENDENT, cso->independent_blend_enable);
  96
  97     if (!cso->logicop_enable)
  98        SB_IMMED_3D(so, LOGIC_OP_ENABLE, 0);
  99
 100     if (cso->logicop_enable) {
 101        SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
 102        SB_DATA    (so, 1);
 103        SB_DATA    (so, nvgl_logicop_func(cso->logicop_func));
 104
 105        SB_IMMED_3D(so, BLEND_ENABLES, 0);
 106     } else
 107     if (!cso->independent_blend_enable) {
 108         SB_IMMED_3D(so, BLEND_ENABLES, cso->rt[0].blend_enable ? 0xff : 0);
 109
 110         if (cso->rt[0].blend_enable) {
 111             SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
 112             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
 113             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_src_factor));
 114             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].rgb_dst_factor));
 115             SB_DATA    (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
 116             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_src_factor));
 117             SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
 118             SB_DATA    (so, nvc0_blend_fac(cso->rt[0].alpha_dst_factor));
 119         }
 120
 121         SB_IMMED_3D(so, COLOR_MASK_COMMON, 1);
 122         SB_BEGIN_3D(so, COLOR_MASK(0), 1);
 123         SB_DATA    (so, nvc0_colormask(cso->rt[0].colormask));
 124     } else {
 125         uint8_t en = 0;
 126
 127         for (i = 0; i < 8; ++i) {
 128             if (!cso->rt[i].blend_enable)
 129                 continue;
 130             en |= 1 << i;
 131
 132             SB_BEGIN_3D(so, IBLEND_EQUATION_RGB(i), 6);
 133             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
 134             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_src_factor));
 135             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].rgb_dst_factor));
 136             SB_DATA    (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
 137             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_src_factor));
 138             SB_DATA    (so, nvc0_blend_fac(cso->rt[i].alpha_dst_factor));
 139         }
 140         SB_IMMED_3D(so, BLEND_ENABLES, en);
 141
 142         SB_IMMED_3D(so, COLOR_MASK_COMMON, 0);
 143         SB_BEGIN_3D(so, COLOR_MASK(0), 8);
 144         for (i = 0; i < 8; ++i)
 145             SB_DATA(so, nvc0_colormask(cso->rt[i].colormask));
 146     }
 147
 148     ms = 0;
 149     if (cso->alpha_to_coverage)
 150        ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE;
 151     if (cso->alpha_to_one)
 152        ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE;
 153
 154     SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1);
 155     SB_DATA    (so, ms);
 156
 157     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 158     return so;
 159 }
 160
 161 static void
 162 nvc0_blend_state_bind(struct pipe_context *pipe, void *hwcso)
 163 {
 164     struct nvc0_context *nvc0 = nvc0_context(pipe);
 165
 166     nvc0->blend = hwcso;
 167     nvc0->dirty |= NVC0_NEW_BLEND;
 168 }
 169
 170 static void
 171 nvc0_blend_state_delete(struct pipe_context *pipe, void *hwcso)
 172 {
 173     FREE(hwcso);
 174 }
 175
 176 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
 177 static void *
 178 nvc0_rasterizer_state_create(struct pipe_context *pipe,
 179                              const struct pipe_rasterizer_state *cso)
 180 {
 181     struct nvc0_rasterizer_stateobj *so;
 182     uint32_t reg;
 183
 184     so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
 185     if (!so)
 186         return NULL;
 187     so->pipe = *cso;
 188
 189     /* Scissor enables are handled in scissor state, we will not want to
 190      * always emit 16 commands, one for each scissor rectangle, here.
 191      */
 192
 193     SB_BEGIN_3D(so, SHADE_MODEL, 1);
 194     SB_DATA    (so, cso->flatshade ? NVC0_3D_SHADE_MODEL_FLAT :
 195                                      NVC0_3D_SHADE_MODEL_SMOOTH);
 196     SB_IMMED_3D(so, PROVOKING_VERTEX_LAST, !cso->flatshade_first);
 197     SB_IMMED_3D(so, VERTEX_TWO_SIDE_ENABLE, cso->light_twoside);
 198
 199     SB_IMMED_3D(so, VERT_COLOR_CLAMP_EN, cso->clamp_vertex_color);
 200     SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
 201     SB_DATA    (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
 202
 203     SB_IMMED_3D(so, MULTISAMPLE_ENABLE, cso->multisample);
 204
 205     SB_IMMED_3D(so, LINE_SMOOTH_ENABLE, cso->line_smooth);
 206     if (cso->line_smooth)
 207        SB_BEGIN_3D(so, LINE_WIDTH_SMOOTH, 1);
 208     else
 209        SB_BEGIN_3D(so, LINE_WIDTH_ALIASED, 1);
 210     SB_DATA    (so, fui(cso->line_width));
 211
 212     SB_IMMED_3D(so, LINE_STIPPLE_ENABLE, cso->line_stipple_enable);
 213     if (cso->line_stipple_enable) {
 214         SB_BEGIN_3D(so, LINE_STIPPLE_PATTERN, 1);
 215         SB_DATA    (so, (cso->line_stipple_pattern << 8) |
 216                          cso->line_stipple_factor);
 217
 218     }
 219
 220     SB_IMMED_3D(so, VP_POINT_SIZE_EN, cso->point_size_per_vertex);
 221     if (!cso->point_size_per_vertex) {
 222        SB_BEGIN_3D(so, POINT_SIZE, 1);
 223        SB_DATA    (so, fui(cso->point_size));
 224     }
 225
 226     reg = (cso->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT) ?
 227        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_UPPER_LEFT :
 228        NVC0_3D_POINT_COORD_REPLACE_COORD_ORIGIN_LOWER_LEFT;
 229
 230     SB_BEGIN_3D(so, POINT_COORD_REPLACE, 1);
 231     SB_DATA    (so, ((cso->sprite_coord_enable & 0xff) << 3) | reg);
 232     SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
 233     SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
 234
 235     SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 1);
 236     SB_DATA    (so, nvgl_polygon_mode(cso->fill_front));
 237     SB_BEGIN_3D(so, POLYGON_MODE_BACK, 1);
 238     SB_DATA    (so, nvgl_polygon_mode(cso->fill_back));
 239     SB_IMMED_3D(so, POLYGON_SMOOTH_ENABLE, cso->poly_smooth);
 240
 241     SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
 242     SB_DATA    (so, cso->cull_face != PIPE_FACE_NONE);
 243     SB_DATA    (so, cso->front_ccw ? NVC0_3D_FRONT_FACE_CCW :
 244                                      NVC0_3D_FRONT_FACE_CW);
 245     switch (cso->cull_face) {
 246     case PIPE_FACE_FRONT_AND_BACK:
 247        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT_AND_BACK);
 248        break;
 249     case PIPE_FACE_FRONT:
 250        SB_DATA(so, NVC0_3D_CULL_FACE_FRONT);
 251        break;
 252     case PIPE_FACE_BACK:
 253     default:
 254        SB_DATA(so, NVC0_3D_CULL_FACE_BACK);
 255        break;
 256     }
 257
 258     SB_IMMED_3D(so, POLYGON_STIPPLE_ENABLE, cso->poly_stipple_enable);
 259     SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
 260     SB_DATA    (so, cso->offset_point);
 261     SB_DATA    (so, cso->offset_line);
 262     SB_DATA    (so, cso->offset_tri);
 263
 264     if (cso->offset_point || cso->offset_line || cso->offset_tri) {
 265         SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
 266         SB_DATA    (so, fui(cso->offset_scale));
 267         SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
 268         SB_DATA    (so, fui(cso->offset_units * 2.0f));
 269     }
 270
 271     assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 272     return (void *)so;
 273 }
 274
 275 static void
 276 nvc0_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
 277 {
 278    struct nvc0_context *nvc0 = nvc0_context(pipe);
 279
 280    nvc0->rast = hwcso;
 281    nvc0->dirty |= NVC0_NEW_RASTERIZER;
 282 }
 283
 284 static void
 285 nvc0_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
 286 {
 287    FREE(hwcso);
 288 }
 289
 290 static void *
 291 nvc0_zsa_state_create(struct pipe_context *pipe,
 292                       const struct pipe_depth_stencil_alpha_state *cso)
 293 {
 294    struct nvc0_zsa_stateobj *so = CALLOC_STRUCT(nvc0_zsa_stateobj);
 295
 296    so->pipe = *cso;
 297
 298    SB_IMMED_3D(so, DEPTH_TEST_ENABLE, cso->depth.enabled);
 299    if (cso->depth.enabled) {
 300       SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
 301       SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
 302       SB_DATA    (so, nvgl_comparison_op(cso->depth.func));
 303    }
 304
 305    if (cso->stencil[0].enabled) {
 306       SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
 307       SB_DATA    (so, 1);
 308       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].fail_op));
 309       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
 310       SB_DATA    (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
 311       SB_DATA    (so, nvgl_comparison_op(cso->stencil[0].func));
 312       SB_BEGIN_3D(so, STENCIL_FRONT_FUNC_MASK, 2);
 313       SB_DATA    (so, cso->stencil[0].valuemask);
 314       SB_DATA    (so, cso->stencil[0].writemask);
 315    } else {
 316       SB_IMMED_3D(so, STENCIL_ENABLE, 0);
 317    }
 318
 319    if (cso->stencil[1].enabled) {
 320       assert(cso->stencil[0].enabled);
 321       SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
 322       SB_DATA    (so, 1);
 323       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].fail_op));
 324       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
 325       SB_DATA    (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
 326       SB_DATA    (so, nvgl_comparison_op(cso->stencil[1].func));
 327       SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
 328       SB_DATA    (so, cso->stencil[1].writemask);
 329       SB_DATA    (so, cso->stencil[1].valuemask);
 330    } else
 331    if (cso->stencil[0].enabled) {
 332       SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
 333    }
 334
 335    SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha.enabled);
 336    if (cso->alpha.enabled) {
 337       SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
 338       SB_DATA    (so, fui(cso->alpha.ref_value));
 339       SB_DATA    (so, nvgl_comparison_op(cso->alpha.func));
 340    }
 341
 342    assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
 343    return (void *)so;
 344 }
 345
 346 static void
 347 nvc0_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
 348 {
 349    struct nvc0_context *nvc0 = nvc0_context(pipe);
 350
 351    nvc0->zsa = hwcso;
 352    nvc0->dirty |= NVC0_NEW_ZSA;
 353 }
 354
 355 static void
 356 nvc0_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
 357 {
 358    FREE(hwcso);
 359 }
 360
 361 /* ====================== SAMPLERS AND TEXTURES ================================
 362  */
 363
 364 #define NV50_TSC_WRAP_CASE(n) \
 365     case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
 366
 367 static INLINE unsigned
 368 nv50_tsc_wrap_mode(unsigned wrap)
 369 {
 370    switch (wrap) {
 371    NV50_TSC_WRAP_CASE(REPEAT);
 372    NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
 373    NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
 374    NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
 375    NV50_TSC_WRAP_CASE(CLAMP);
 376    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
 377    NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
 378    NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
 379    default:
 380        NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
 381        return NV50_TSC_WRAP_REPEAT;
 382    }
 383 }
 384
 385 static void
 386 nvc0_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
 387 {
 388    unsigned s, i;
 389
 390    for (s = 0; s < 5; ++s)
 391       for (i = 0; i < nvc0_context(pipe)->num_samplers[s]; ++i)
 392          if (nvc0_context(pipe)->samplers[s][i] == hwcso)
 393             nvc0_context(pipe)->samplers[s][i] = NULL;
 394
 395    nvc0_screen_tsc_free(nvc0_context(pipe)->screen, nv50_tsc_entry(hwcso));
 396
 397    FREE(hwcso);
 398 }
 399
 400 static INLINE void
 401 nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s,
 402                                unsigned nr, void **hwcso)
 403 {
 404    unsigned i;
 405
 406    for (i = 0; i < nr; ++i) {
 407       struct nv50_tsc_entry *old = nvc0->samplers[s][i];
 408
 409       nvc0->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
 410       if (old)
 411          nvc0_screen_tsc_unlock(nvc0->screen, old);
 412    }
 413    for (; i < nvc0->num_samplers[s]; ++i)
 414       if (nvc0->samplers[s][i])
 415          nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]);
 416
 417    nvc0->num_samplers[s] = nr;
 418
 419    nvc0->dirty |= NVC0_NEW_SAMPLERS;
 420 }
 421
 422 static void
 423 nvc0_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 424 {
 425    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s);
 426 }
 427
 428 static void
 429 nvc0_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 430 {
 431    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s);
 432 }
 433
 434 static void
 435 nvc0_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
 436 {
 437    nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s);
 438 }
 439
 440 /* NOTE: only called when not referenced anywhere, won't be bound */
 441 static void
 442 nvc0_sampler_view_destroy(struct pipe_context *pipe,
 443                           struct pipe_sampler_view *view)
 444 {
 445    pipe_resource_reference(&view->texture, NULL);
 446
 447    nvc0_screen_tic_free(nvc0_context(pipe)->screen, nv50_tic_entry(view));
 448
 449    FREE(nv50_tic_entry(view));
 450 }
 451
 452 static INLINE void
 453 nvc0_stage_set_sampler_views(struct nvc0_context *nvc0, int s,
 454                              unsigned nr,
 455                              struct pipe_sampler_view **views)
 456 {
 457    unsigned i;
 458
 459    for (i = 0; i < nr; ++i) {
 460       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 461       if (old)
 462          nvc0_screen_tic_unlock(nvc0->screen, old);
 463
 464       pipe_sampler_view_reference(&nvc0->textures[s][i], views[i]);
 465    }
 466
 467    for (i = nr; i < nvc0->num_textures[s]; ++i) {
 468       struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]);
 469       if (!old)
 470          continue;
 471       nvc0_screen_tic_unlock(nvc0->screen, old);
 472
 473       pipe_sampler_view_reference(&nvc0->textures[s][i], NULL);
 474    }
 475
 476    nvc0->num_textures[s] = nr;
 477
 478    nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
 479
 480    nvc0->dirty |= NVC0_NEW_TEXTURES;
 481 }
 482
 483 static void
 484 nvc0_vp_set_sampler_views(struct pipe_context *pipe,
 485                           unsigned nr,
 486                           struct pipe_sampler_view **views)
 487 {
 488    nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views);
 489 }
 490
 491 static void
 492 nvc0_fp_set_sampler_views(struct pipe_context *pipe,
 493                           unsigned nr,
 494                           struct pipe_sampler_view **views)
 495 {
 496    nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views);
 497 }
 498
 499 static void
 500 nvc0_gp_set_sampler_views(struct pipe_context *pipe,
 501                           unsigned nr,
 502                           struct pipe_sampler_view **views)
 503 {
 504    nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views);
 505 }
 506
 507 /* ============================= SHADERS =======================================
 508  */
 509
 510 static void *
 511 nvc0_sp_state_create(struct pipe_context *pipe,
 512                      const struct pipe_shader_state *cso, unsigned type)
 513 {
 514    struct nvc0_program *prog;
 515
 516    prog = CALLOC_STRUCT(nvc0_program);
 517    if (!prog)
 518       return NULL;
 519
 520    prog->type = type;
 521    prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
 522
 523    return (void *)prog;
 524 }
 525
 526 static void
 527 nvc0_sp_state_delete(struct pipe_context *pipe, void *hwcso)
 528 {
 529    struct nvc0_program *prog = (struct nvc0_program *)hwcso;
 530
 531    nvc0_program_destroy(nvc0_context(pipe), prog);
 532
 533    FREE((void *)prog->pipe.tokens);
 534    FREE(prog);
 535 }
 536
 537 static void *
 538 nvc0_vp_state_create(struct pipe_context *pipe,
 539                      const struct pipe_shader_state *cso)
 540 {
 541    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
 542 }
 543
 544 static void
 545 nvc0_vp_state_bind(struct pipe_context *pipe, void *hwcso)
 546 {
 547     struct nvc0_context *nvc0 = nvc0_context(pipe);
 548
 549     nvc0->vertprog = hwcso;
 550     nvc0->dirty |= NVC0_NEW_VERTPROG;
 551 }
 552
 553 static void *
 554 nvc0_fp_state_create(struct pipe_context *pipe,
 555                      const struct pipe_shader_state *cso)
 556 {
 557    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
 558 }
 559
 560 static void
 561 nvc0_fp_state_bind(struct pipe_context *pipe, void *hwcso)
 562 {
 563     struct nvc0_context *nvc0 = nvc0_context(pipe);
 564
 565     nvc0->fragprog = hwcso;
 566     nvc0->dirty |= NVC0_NEW_FRAGPROG;
 567 }
 568
 569 static void *
 570 nvc0_gp_state_create(struct pipe_context *pipe,
 571                      const struct pipe_shader_state *cso)
 572 {
 573    return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
 574 }
 575
 576 static void
 577 nvc0_gp_state_bind(struct pipe_context *pipe, void *hwcso)
 578 {
 579     struct nvc0_context *nvc0 = nvc0_context(pipe);
 580
 581     nvc0->gmtyprog = hwcso;
 582     nvc0->dirty |= NVC0_NEW_GMTYPROG;
 583 }
 584
 585 static void
 586 nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
 587                          struct pipe_resource *res)
 588 {
 589    struct nvc0_context *nvc0 = nvc0_context(pipe);
 590
 591    switch (shader) {
 592    case PIPE_SHADER_VERTEX: shader = 0; break;
 593       /*
 594    case PIPE_SHADER_TESSELLATION_CONTROL: shader = 1; break;
 595    case PIPE_SHADER_TESSELLATION_EVALUATION: shader = 2; break;
 596       */
 597    case PIPE_SHADER_GEOMETRY: shader = 3; break;
 598    case PIPE_SHADER_FRAGMENT: shader = 4; break;
 599    default:
 600       assert(0);
 601       break;
 602    }
 603
 604    if (nvc0->constbuf[shader][index])
 605       nvc0_bufctx_del_resident(nvc0, NVC0_BUFCTX_CONSTANT,
 606                                nv04_resource(nvc0->constbuf[shader][index]));
 607
 608    pipe_resource_reference(&nvc0->constbuf[shader][index], res);
 609
 610    nvc0->constbuf_dirty[shader] |= 1 << index;
 611
 612    nvc0->dirty |= NVC0_NEW_CONSTBUF;
 613 }
 614
 615 /* =============================================================================
 616  */
 617
 618 static void
 619 nvc0_set_blend_color(struct pipe_context *pipe,
 620                      const struct pipe_blend_color *bcol)
 621 {
 622     struct nvc0_context *nvc0 = nvc0_context(pipe);
 623
 624     nvc0->blend_colour = *bcol;
 625     nvc0->dirty |= NVC0_NEW_BLEND_COLOUR;
 626 }
 627
 628 static void
 629 nvc0_set_stencil_ref(struct pipe_context *pipe,
 630                      const struct pipe_stencil_ref *sr)
 631 {
 632     struct nvc0_context *nvc0 = nvc0_context(pipe);
 633
 634     nvc0->stencil_ref = *sr;
 635     nvc0->dirty |= NVC0_NEW_STENCIL_REF;
 636 }
 637
 638 static void
 639 nvc0_set_clip_state(struct pipe_context *pipe,
 640                     const struct pipe_clip_state *clip)
 641 {
 642     struct nvc0_context *nvc0 = nvc0_context(pipe);
 643     const unsigned size = clip->nr * sizeof(clip->ucp[0]);
 644
 645     memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
 646     nvc0->clip.nr = clip->nr;
 647
 648     nvc0->clip.depth_clamp = clip->depth_clamp;
 649
 650     nvc0->dirty |= NVC0_NEW_CLIP;
 651 }
 652
 653 static void
 654 nvc0_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
 655 {
 656     struct nvc0_context *nvc0 = nvc0_context(pipe);
 657
 658     nvc0->sample_mask = sample_mask;
 659     nvc0->dirty |= NVC0_NEW_SAMPLE_MASK;
 660 }
 661
 662
 663 static void
 664 nvc0_set_framebuffer_state(struct pipe_context *pipe,
 665                            const struct pipe_framebuffer_state *fb)
 666 {
 667     struct nvc0_context *nvc0 = nvc0_context(pipe);
 668
 669     nvc0->framebuffer = *fb;
 670     nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
 671 }
 672
 673 static void
 674 nvc0_set_polygon_stipple(struct pipe_context *pipe,
 675                          const struct pipe_poly_stipple *stipple)
 676 {
 677     struct nvc0_context *nvc0 = nvc0_context(pipe);
 678
 679     nvc0->stipple = *stipple;
 680     nvc0->dirty |= NVC0_NEW_STIPPLE;
 681 }
 682
 683 static void
 684 nvc0_set_scissor_state(struct pipe_context *pipe,
 685                        const struct pipe_scissor_state *scissor)
 686 {
 687     struct nvc0_context *nvc0 = nvc0_context(pipe);
 688
 689     nvc0->scissor = *scissor;
 690     nvc0->dirty |= NVC0_NEW_SCISSOR;
 691 }
 692
 693 static void
 694 nvc0_set_viewport_state(struct pipe_context *pipe,
 695                         const struct pipe_viewport_state *vpt)
 696 {
 697     struct nvc0_context *nvc0 = nvc0_context(pipe);
 698
 699     nvc0->viewport = *vpt;
 700     nvc0->dirty |= NVC0_NEW_VIEWPORT;
 701 }
 702
 703 static void
 704 nvc0_set_vertex_buffers(struct pipe_context *pipe,
 705                         unsigned count,
 706                         const struct pipe_vertex_buffer *vb)
 707 {
 708     struct nvc0_context *nvc0 = nvc0_context(pipe);
 709     unsigned i;
 710
 711     for (i = 0; i < count; ++i)
 712        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, vb[i].buffer);
 713     for (; i < nvc0->num_vtxbufs; ++i)
 714        pipe_resource_reference(&nvc0->vtxbuf[i].buffer, NULL);
 715
 716     memcpy(nvc0->vtxbuf, vb, sizeof(*vb) * count);
 717     nvc0->num_vtxbufs = count;
 718
 719     nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_VERTEX);
 720
 721     nvc0->dirty |= NVC0_NEW_ARRAYS;
 722 }
 723
 724 static void
 725 nvc0_set_index_buffer(struct pipe_context *pipe,
 726                       const struct pipe_index_buffer *ib)
 727 {
 728     struct nvc0_context *nvc0 = nvc0_context(pipe);
 729
 730     if (ib) {
 731        pipe_resource_reference(&nvc0->idxbuf.buffer, ib->buffer);
 732
 733        memcpy(&nvc0->idxbuf, ib, sizeof(nvc0->idxbuf));
 734     } else {
 735        pipe_resource_reference(&nvc0->idxbuf.buffer, NULL);
 736     }
 737 }
 738
 739 static void
 740 nvc0_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
 741 {
 742     struct nvc0_context *nvc0 = nvc0_context(pipe);
 743
 744     nvc0->vertex = hwcso;
 745     nvc0->dirty |= NVC0_NEW_VERTEX;
 746 }
 747
 748 static void *
 749 nvc0_tfb_state_create(struct pipe_context *pipe,
 750                       const struct pipe_stream_output_state *pso)
 751 {
 752    struct nvc0_transform_feedback_state *so;
 753    int n = 0;
 754    int i, c, b;
 755
 756    so = MALLOC(sizeof(*so) + pso->num_outputs * 4 * sizeof(uint8_t));
 757    if (!so)
 758       return NULL;
 759
 760    for (b = 0; b < 4; ++b) {
 761       for (i = 0; i < pso->num_outputs; ++i) {
 762          if (pso->output_buffer[i] != b)
 763             continue;
 764          for (c = 0; c < 4; ++c) {
 765             if (!(pso->register_mask[i] & (1 << c)))
 766                continue;
 767             so->varying_count[b]++;
 768             so->varying_index[n++] = (pso->register_index[i] << 2) | c;
 769          }
 770       }
 771       so->stride[b] = so->varying_count[b] * 4;
 772    }
 773    if (pso->stride)
 774       so->stride[0] = pso->stride;
 775
 776    return so;
 777 }
 778
 779 static void
 780 nvc0_tfb_state_delete(struct pipe_context *pipe, void *hwcso)
 781 {
 782    FREE(hwcso);
 783 }
 784
 785 static void
 786 nvc0_tfb_state_bind(struct pipe_context *pipe, void *hwcso)
 787 {
 788    nvc0_context(pipe)->tfb = hwcso;
 789    nvc0_context(pipe)->dirty |= NVC0_NEW_TFB;
 790 }
 791
 792 static void
 793 nvc0_set_transform_feedback_buffers(struct pipe_context *pipe,
 794                                     struct pipe_resource **buffers,
 795                                     int *offsets,
 796                                     int num_buffers)
 797 {
 798    struct nvc0_context *nvc0 = nvc0_context(pipe);
 799    int i;
 800
 801    assert(num_buffers >= 0 && num_buffers <= 4); /* why signed ? */
 802
 803    for (i = 0; i < num_buffers; ++i) {
 804        assert(offsets[i] >= 0);
 805        nvc0->tfb_offset[i] = offsets[i];
 806        pipe_resource_reference(&nvc0->tfbbuf[i], buffers[i]);
 807    }
 808    for (; i < nvc0->num_tfbbufs; ++i)
 809       pipe_resource_reference(&nvc0->tfbbuf[i], NULL);
 810
 811    nvc0->num_tfbbufs = num_buffers;
 812
 813    nvc0->dirty |= NVC0_NEW_TFB_BUFFERS;
 814 }
 815
 816 void
 817 nvc0_init_state_functions(struct nvc0_context *nvc0)
 818 {
 819    struct pipe_context *pipe = &nvc0->base.pipe;
 820
 821    pipe->create_blend_state = nvc0_blend_state_create;
 822    pipe->bind_blend_state = nvc0_blend_state_bind;
 823    pipe->delete_blend_state = nvc0_blend_state_delete;
 824
 825    pipe->create_rasterizer_state = nvc0_rasterizer_state_create;
 826    pipe->bind_rasterizer_state = nvc0_rasterizer_state_bind;
 827    pipe->delete_rasterizer_state = nvc0_rasterizer_state_delete;
 828
 829    pipe->create_depth_stencil_alpha_state = nvc0_zsa_state_create;
 830    pipe->bind_depth_stencil_alpha_state = nvc0_zsa_state_bind;
 831    pipe->delete_depth_stencil_alpha_state = nvc0_zsa_state_delete;
 832
 833    pipe->create_sampler_state = nv50_sampler_state_create;
 834    pipe->delete_sampler_state = nvc0_sampler_state_delete;
 835    pipe->bind_vertex_sampler_states   = nvc0_vp_sampler_states_bind;
 836    pipe->bind_fragment_sampler_states = nvc0_fp_sampler_states_bind;
 837    pipe->bind_geometry_sampler_states = nvc0_gp_sampler_states_bind;
 838
 839    pipe->create_sampler_view = nvc0_create_sampler_view;
 840    pipe->sampler_view_destroy = nvc0_sampler_view_destroy;
 841    pipe->set_vertex_sampler_views   = nvc0_vp_set_sampler_views;
 842    pipe->set_fragment_sampler_views = nvc0_fp_set_sampler_views;
 843    pipe->set_geometry_sampler_views = nvc0_gp_set_sampler_views;
 844
 845    pipe->create_vs_state = nvc0_vp_state_create;
 846    pipe->create_fs_state = nvc0_fp_state_create;
 847    pipe->create_gs_state = nvc0_gp_state_create;
 848    pipe->bind_vs_state = nvc0_vp_state_bind;
 849    pipe->bind_fs_state = nvc0_fp_state_bind;
 850    pipe->bind_gs_state = nvc0_gp_state_bind;
 851    pipe->delete_vs_state = nvc0_sp_state_delete;
 852    pipe->delete_fs_state = nvc0_sp_state_delete;
 853    pipe->delete_gs_state = nvc0_sp_state_delete;
 854
 855    pipe->set_blend_color = nvc0_set_blend_color;
 856    pipe->set_stencil_ref = nvc0_set_stencil_ref;
 857    pipe->set_clip_state = nvc0_set_clip_state;
 858    pipe->set_sample_mask = nvc0_set_sample_mask;
 859    pipe->set_constant_buffer = nvc0_set_constant_buffer;
 860    pipe->set_framebuffer_state = nvc0_set_framebuffer_state;
 861    pipe->set_polygon_stipple = nvc0_set_polygon_stipple;
 862    pipe->set_scissor_state = nvc0_set_scissor_state;
 863    pipe->set_viewport_state = nvc0_set_viewport_state;
 864
 865    pipe->create_vertex_elements_state = nvc0_vertex_state_create;
 866    pipe->delete_vertex_elements_state = nvc0_vertex_state_delete;
 867    pipe->bind_vertex_elements_state = nvc0_vertex_state_bind;
 868
 869    pipe->set_vertex_buffers = nvc0_set_vertex_buffers;
 870    pipe->set_index_buffer = nvc0_set_index_buffer;
 871
 872    pipe->create_stream_output_state = nvc0_tfb_state_create;
 873    pipe->delete_stream_output_state = nvc0_tfb_state_delete;
 874    pipe->bind_stream_output_state = nvc0_tfb_state_bind;
 875    pipe->set_stream_output_buffers = nvc0_set_transform_feedback_buffers;
 876
 877    pipe->redefine_user_buffer = u_default_redefine_user_buffer;
 878 }
 879