Merge remote branch 'origin/master' into nv50-compiler
[mesa.git] / src / gallium / drivers / nvfx / nvfx_surface.c
1
2 /**************************************************************************
3 *
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 #include "pipe/p_context.h"
30 #include "pipe/p_format.h"
31 #include "util/u_format.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_pack_color.h"
35 #include "util/u_blitter.h"
36
37 #include "nouveau/nouveau_winsys.h"
38 #include "nouveau/nouveau_screen.h"
39 #include "nvfx_context.h"
40 #include "nvfx_screen.h"
41 #include "nvfx_resource.h"
42 #include "nv04_2d.h"
43
44 #include <nouveau/nouveau_bo.h>
45
46 static INLINE void
47 nvfx_region_set_format(struct nv04_region* rgn, enum pipe_format format)
48 {
49 unsigned bits = util_format_get_blocksizebits(format);
50 switch(bits)
51 {
52 case 8:
53 rgn->bpps = 0;
54 break;
55 case 16:
56 rgn->bpps = 1;
57 break;
58 case 32:
59 rgn->bpps = 2;
60 break;
61 default:
62 {
63 int shift;
64 assert(util_is_power_of_two(bits));
65 shift = util_logbase2(bits) - 3;
66 assert(shift >= 2);
67 rgn->bpps = 2;
68 shift -= 2;
69
70 rgn->x = util_format_get_nblocksx(format, rgn->x) << shift;
71 rgn->y = util_format_get_nblocksy(format, rgn->y);
72 }
73 }
74 }
75
76 static INLINE void
77 nvfx_region_fixup_swizzled(struct nv04_region* rgn, unsigned zslice, unsigned width, unsigned height, unsigned depth)
78 {
79 // TODO: move this code to surface creation?
80 if((depth <= 1) && (height <= 1 || width <= 2))
81 rgn->pitch = width << rgn->bpps;
82 else if(depth > 1 && height <= 2 && width <= 2)
83 {
84 rgn->pitch = width << rgn->bpps;
85 rgn->offset += (zslice * width * height) << rgn->bpps;
86 }
87 else
88 {
89 rgn->pitch = 0;
90 rgn->z = zslice;
91 rgn->w = width;
92 rgn->h = height;
93 rgn->d = depth;
94 }
95 }
96
97 static INLINE void
98 nvfx_region_init_for_surface(struct nv04_region* rgn, struct nvfx_surface* surf, unsigned x, unsigned y, bool for_write)
99 {
100 rgn->x = x;
101 rgn->y = y;
102 rgn->z = 0;
103 nvfx_region_set_format(rgn, surf->base.base.format);
104
105 if(surf->temp)
106 {
107 rgn->bo = surf->temp->base.bo;
108 rgn->offset = 0;
109 rgn->pitch = surf->temp->linear_pitch;
110
111 if(for_write)
112 util_dirty_surface_set_dirty(nvfx_surface_get_dirty_surfaces(&surf->base.base), &surf->base);
113 } else {
114 rgn->bo = ((struct nvfx_resource*)surf->base.base.texture)->bo;
115 rgn->offset = surf->base.base.offset;
116 rgn->pitch = surf->pitch;
117
118 if(!(surf->base.base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR))
119 nvfx_region_fixup_swizzled(rgn, surf->base.base.zslice, surf->base.base.width, surf->base.base.height, u_minify(surf->base.base.texture->depth0, surf->base.base.level));
120 }
121 }
122
123 static INLINE void
124 nvfx_region_init_for_subresource(struct nv04_region* rgn, struct pipe_resource* pt, struct pipe_subresource sub, unsigned x, unsigned y, unsigned z, bool for_write)
125 {
126 if(pt->target != PIPE_BUFFER)
127 {
128 struct nvfx_surface* ns = (struct nvfx_surface*)util_surfaces_peek(&((struct nvfx_miptree*)pt)->surfaces, pt, sub.face, sub.level, z);
129 if(ns && util_dirty_surface_is_dirty(&ns->base))
130 {
131 nvfx_region_init_for_surface(rgn, ns, x, y, for_write);
132 return;
133 }
134 }
135
136 rgn->bo = ((struct nvfx_resource*)pt)->bo;
137 rgn->offset = nvfx_subresource_offset(pt, sub.face, sub.level, z);
138 rgn->pitch = nvfx_subresource_pitch(pt, sub.level);
139 rgn->x = x;
140 rgn->y = y;
141 rgn->z = 0;
142
143 nvfx_region_set_format(rgn, pt->format);
144 if(!(pt->flags & NVFX_RESOURCE_FLAG_LINEAR))
145 nvfx_region_fixup_swizzled(rgn, z, u_minify(pt->width0, sub.level), u_minify(pt->height0, sub.level), u_minify(pt->depth0, sub.level));
146 }
147
148 // TODO: actually test this for all formats, it's probably wrong for some...
149
150 static INLINE int
151 nvfx_surface_format(enum pipe_format format)
152 {
153 switch(util_format_get_blocksize(format)) {
154 case 1:
155 return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8;
156 case 2:
157 //return NV04_CONTEXT_SURFACES_2D_FORMAT_Y16;
158 return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5;
159 case 4:
160 //if(format == PIPE_FORMAT_B8G8R8X8_UNORM || format == PIPE_FORMAT_B8G8R8A8_UNORM)
161 return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8;
162 //else
163 // return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32;
164 default:
165 return -1;
166 }
167 }
168
169 static INLINE int
170 nv04_scaled_image_format(enum pipe_format format)
171 {
172 switch(util_format_get_blocksize(format)) {
173 case 1:
174 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8;
175 case 2:
176 //if(format == PIPE_FORMAT_B5G5R5A1_UNORM)
177 // return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5;
178 //else
179 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5;
180 case 4:
181 if(format == PIPE_FORMAT_B8G8R8X8_UNORM)
182 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8;
183 else
184 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8;
185 default:
186 return -1;
187 }
188 }
189
190 // XXX: must save index buffer too!
191 static struct blitter_context*
192 nvfx_get_blitter(struct pipe_context* pipe, int copy)
193 {
194 struct nvfx_context* nvfx = nvfx_context(pipe);
195
196 struct blitter_context* blitter = nvfx->blitter;
197 if(!blitter)
198 nvfx->blitter = blitter = util_blitter_create(pipe);
199
200 util_blitter_save_blend(blitter, nvfx->blend);
201 util_blitter_save_depth_stencil_alpha(blitter, nvfx->zsa);
202 util_blitter_save_stencil_ref(blitter, &nvfx->stencil_ref);
203 util_blitter_save_rasterizer(blitter, nvfx->rasterizer);
204 util_blitter_save_fragment_shader(blitter, nvfx->fragprog);
205 util_blitter_save_vertex_shader(blitter, nvfx->vertprog);
206 util_blitter_save_viewport(blitter, &nvfx->viewport);
207 util_blitter_save_framebuffer(blitter, &nvfx->framebuffer);
208 util_blitter_save_clip(blitter, &nvfx->clip);
209 util_blitter_save_vertex_elements(blitter, nvfx->vtxelt);
210 util_blitter_save_vertex_buffers(blitter, nvfx->vtxbuf_nr, nvfx->vtxbuf);
211
212 if(copy)
213 {
214 util_blitter_save_fragment_sampler_states(blitter, nvfx->nr_samplers, (void**)nvfx->tex_sampler);
215 util_blitter_save_fragment_sampler_views(blitter, nvfx->nr_textures, nvfx->fragment_sampler_views);
216 }
217
218 return blitter;
219 }
220
221 static unsigned
222 nvfx_region_clone(struct nv04_2d_context* ctx, struct nv04_region* rgn, unsigned w, unsigned h, boolean for_read)
223 {
224 unsigned begin = nv04_region_begin(rgn, w, h);
225 unsigned end = nv04_region_end(rgn, w, h);
226 unsigned size = end - begin;
227 struct nouveau_bo* bo = 0;
228 nouveau_bo_new(rgn->bo->device, NOUVEAU_BO_MAP | NOUVEAU_BO_GART, 256, size, &bo);
229
230 if(for_read || (size > ((w * h) << rgn->bpps)))
231 nv04_memcpy(ctx, bo, 0, rgn->bo, rgn->offset + begin, size);
232
233 rgn->bo = bo;
234 rgn->offset = -begin;
235 return begin;
236 }
237
238 static void
239 nvfx_resource_copy_region(struct pipe_context *pipe,
240 struct pipe_resource *dstr, struct pipe_subresource subdst,
241 unsigned dstx, unsigned dsty, unsigned dstz,
242 struct pipe_resource *srcr, struct pipe_subresource subsrc,
243 unsigned srcx, unsigned srcy, unsigned srcz,
244 unsigned w, unsigned h)
245 {
246 static int copy_threshold = -1;
247 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
248 struct nv04_region dst, src;
249 int dst_to_gpu;
250 int src_on_gpu;
251 boolean small;
252 int ret;
253
254 if(!w || !h)
255 return;
256
257 if(copy_threshold < 0)
258 copy_threshold = debug_get_num_option("NOUVEAU_COPY_THRESHOLD", 4);
259
260 dst_to_gpu = dstr->usage != PIPE_USAGE_DYNAMIC && dstr->usage != PIPE_USAGE_STAGING;
261 src_on_gpu = nvfx_resource_on_gpu(srcr);
262
263 nvfx_region_init_for_subresource(&dst, dstr, subdst, dstx, dsty, dstz, TRUE);
264 nvfx_region_init_for_subresource(&src, srcr, subsrc, srcx, srcy, srcz, FALSE);
265 w = util_format_get_stride(dstr->format, w) >> dst.bpps;
266 h = util_format_get_nblocksy(dstr->format, h);
267
268 small = (w * h <= copy_threshold);
269 if((!dst_to_gpu || !src_on_gpu) && small)
270 ret = -1; /* use the CPU */
271 else
272 ret = nv04_region_copy_2d(ctx, &dst, &src, w, h,
273 dstr->target == PIPE_BUFFER ? -1 : nvfx_surface_format(dstr->format),
274 dstr->target == PIPE_BUFFER ? -1 : nv04_scaled_image_format(dstr->format),
275 dst_to_gpu, src_on_gpu);
276 if(!ret)
277 {}
278 else if(ret > 0 && dstr->bind & PIPE_BIND_RENDER_TARGET && srcr->bind & PIPE_BIND_SAMPLER_VIEW)
279 {
280 struct blitter_context* blitter = nvfx_get_blitter(pipe, 1);
281 util_blitter_copy_region(blitter, dstr, subdst, dstx, dsty, dstz, srcr, subsrc, srcx, srcy, srcz, w, h, TRUE);
282 }
283 else
284 {
285 struct nv04_region dstt = dst;
286 struct nv04_region srct = src;
287 unsigned dstbegin = 0;
288
289 if(!small)
290 {
291 if(src_on_gpu)
292 nvfx_region_clone(ctx, &srct, w, h, TRUE);
293
294 if(dst_to_gpu)
295 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
296 }
297
298 nv04_region_copy_cpu(&dstt, &srct, w, h);
299
300 if(srct.bo != src.bo)
301 nouveau_screen_bo_release(pipe->screen, srct.bo);
302
303 if(dstt.bo != dst.bo)
304 {
305 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
306 nouveau_screen_bo_release(pipe->screen, dstt.bo);
307 }
308 }
309 }
310
311 static int
312 nvfx_surface_fill(struct pipe_context* pipe, struct pipe_surface *dsts,
313 unsigned dx, unsigned dy, unsigned w, unsigned h, unsigned value)
314 {
315 struct nv04_2d_context *ctx = nvfx_screen(pipe->screen)->eng2d;
316 struct nv04_region dst;
317 int ret;
318 /* Always try to use the GPU right now, if possible
319 * If the user wanted the surface data on the CPU, he would have cleared with memset (hopefully) */
320
321 // we don't care about interior pixel order since we set all them to the same value
322 nvfx_region_init_for_surface(&dst, (struct nvfx_surface*)dsts, dx, dy, TRUE);
323
324 w = util_format_get_stride(dsts->format, w) >> dst.bpps;
325 h = util_format_get_nblocksy(dsts->format, h);
326
327 ret = nv04_region_fill_2d(ctx, &dst, w, h, value);
328 if(ret > 0 && dsts->texture->bind & PIPE_BIND_RENDER_TARGET)
329 return 1;
330 else if(ret)
331 {
332 struct nv04_region dstt = dst;
333 unsigned dstbegin = 0;
334
335 if(nvfx_resource_on_gpu(dsts->texture))
336 dstbegin = nvfx_region_clone(ctx, &dstt, w, h, FALSE);
337
338 nv04_region_fill_cpu(&dstt, w, h, value);
339
340 if(dstt.bo != dst.bo)
341 {
342 nv04_memcpy(ctx, dst.bo, dst.offset + dstbegin, dstt.bo, 0, dstt.bo->size);
343 nouveau_screen_bo_release(pipe->screen, dstt.bo);
344 }
345 }
346
347 return 0;
348 }
349
350
351 void
352 nvfx_screen_surface_takedown(struct pipe_screen *pscreen)
353 {
354 nv04_2d_context_takedown(nvfx_screen(pscreen)->eng2d);
355 nvfx_screen(pscreen)->eng2d = 0;
356 }
357
358 int
359 nvfx_screen_surface_init(struct pipe_screen *pscreen)
360 {
361 struct nv04_2d_context* ctx = nv04_2d_context_init(nouveau_screen(pscreen)->channel);
362 if(!ctx)
363 return -1;
364 nvfx_screen(pscreen)->eng2d = ctx;
365 return 0;
366 }
367
368 static void
369 nvfx_surface_copy_temp(struct pipe_context* pipe, struct pipe_surface* surf, int to_temp)
370 {
371 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
372 struct pipe_subresource tempsr, surfsr;
373 struct nvfx_context* nvfx = nvfx_context(pipe);
374
375 // TODO: we really should do this validation before setting these variable in draw calls
376 unsigned use_vertex_buffers = nvfx->use_vertex_buffers;
377 boolean use_index_buffer = nvfx->use_index_buffer;
378 unsigned base_vertex = nvfx->base_vertex;
379
380 tempsr.face = 0;
381 tempsr.level = 0;
382 surfsr.face = surf->face;
383 surfsr.level = surf->level;
384
385 if(to_temp)
386 nvfx_resource_copy_region(pipe, &ns->temp->base.base, tempsr, 0, 0, 0, surf->texture, surfsr, 0, 0, surf->zslice, surf->width, surf->height);
387 else
388 nvfx_resource_copy_region(pipe, surf->texture, surfsr, 0, 0, surf->zslice, &ns->temp->base.base, tempsr, 0, 0, 0, surf->width, surf->height);
389
390 nvfx->use_vertex_buffers = use_vertex_buffers;
391 nvfx->use_index_buffer = use_index_buffer;
392 nvfx->base_vertex = base_vertex;
393
394 nvfx->dirty |= NVFX_NEW_ARRAYS;
395 nvfx->draw_dirty |= NVFX_NEW_ARRAYS;
396 }
397
398 void
399 nvfx_surface_create_temp(struct pipe_context* pipe, struct pipe_surface* surf)
400 {
401 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
402 struct pipe_resource template;
403 memset(&template, 0, sizeof(struct pipe_resource));
404 template.target = PIPE_TEXTURE_2D;
405 template.format = surf->format;
406 template.width0 = surf->width;
407 template.height0 = surf->height;
408 template.depth0 = 1;
409 template.nr_samples = surf->texture->nr_samples;
410 template.flags = NVFX_RESOURCE_FLAG_LINEAR;
411
412 ns->temp = (struct nvfx_miptree*)nvfx_miptree_create(pipe->screen, &template);
413 nvfx_surface_copy_temp(pipe, surf, 1);
414 }
415
416 void
417 nvfx_surface_flush(struct pipe_context* pipe, struct pipe_surface* surf)
418 {
419 struct nvfx_context* nvfx = (struct nvfx_context*)pipe;
420 struct nvfx_surface* ns = (struct nvfx_surface*)surf;
421 boolean bound = FALSE;
422
423 /* must be done before the copy, otherwise the copy will use the temp as destination */
424 util_dirty_surface_set_clean(nvfx_surface_get_dirty_surfaces(surf), &ns->base);
425
426 nvfx_surface_copy_temp(pipe, surf, 0);
427
428 if(nvfx->framebuffer.zsbuf == surf)
429 bound = TRUE;
430 else
431 {
432 for(unsigned i = 0; i < nvfx->framebuffer.nr_cbufs; ++i)
433 {
434 if(nvfx->framebuffer.cbufs[i] == surf)
435 {
436 bound = TRUE;
437 break;
438 }
439 }
440 }
441
442 if(!bound)
443 pipe_resource_reference((struct pipe_resource**)&ns->temp, 0);
444 }
445
446 static void
447 nvfx_clear_render_target(struct pipe_context *pipe,
448 struct pipe_surface *dst,
449 const float *rgba,
450 unsigned dstx, unsigned dsty,
451 unsigned width, unsigned height)
452 {
453 union util_color uc;
454 util_pack_color(rgba, dst->format, &uc);
455
456 if(util_format_get_blocksizebits(dst->format) > 32
457 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, uc.ui))
458 {
459 // TODO: probably should use hardware clear here instead if possible
460 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
461 util_blitter_clear_render_target(blitter, dst, rgba, dstx, dsty, width, height);
462 }
463 }
464
465 static void
466 nvfx_clear_depth_stencil(struct pipe_context *pipe,
467 struct pipe_surface *dst,
468 unsigned clear_flags,
469 double depth,
470 unsigned stencil,
471 unsigned dstx, unsigned dsty,
472 unsigned width, unsigned height)
473 {
474 if(util_format_get_blocksizebits(dst->format) > 32
475 || nvfx_surface_fill(pipe, dst, dstx, dsty, width, height, util_pack_z_stencil(dst->format, depth, stencil)))
476 {
477 // TODO: probably should use hardware clear here instead if possible
478 struct blitter_context* blitter = nvfx_get_blitter(pipe, 0);
479 util_blitter_clear_depth_stencil(blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height);
480 }
481 }
482
483
484 void
485 nvfx_init_surface_functions(struct nvfx_context *nvfx)
486 {
487 nvfx->pipe.resource_copy_region = nvfx_resource_copy_region;
488 nvfx->pipe.clear_render_target = nvfx_clear_render_target;
489 nvfx->pipe.clear_depth_stencil = nvfx_clear_depth_stencil;
490 }