panfrost: Inline panfrost_get_default_swizzle
[mesa.git] / src / gallium / drivers / panfrost / pan_assemble.c
1 /*
2 * © Copyright 2018 Alyssa Rosenzweig
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 */
24
25 #include <stdio.h>
26 #include <stdlib.h>
27 #include <string.h>
28 #include "pan_bo.h"
29 #include "pan_context.h"
30 #include "pan_format.h"
31 #include "pan_util.h"
32
33 #include "compiler/nir/nir.h"
34 #include "nir/tgsi_to_nir.h"
35 #include "midgard/midgard_compile.h"
36 #include "util/u_dynarray.h"
37
38 #include "tgsi/tgsi_dump.h"
39
40 void
41 panfrost_shader_compile(
42 struct panfrost_context *ctx,
43 struct mali_shader_meta *meta,
44 enum pipe_shader_ir ir_type,
45 const void *ir,
46 gl_shader_stage stage,
47 struct panfrost_shader_state *state,
48 uint64_t *outputs_written)
49 {
50 struct panfrost_screen *screen = pan_screen(ctx->base.screen);
51 uint8_t *dst;
52
53 nir_shader *s;
54
55 if (ir_type == PIPE_SHADER_IR_NIR) {
56 s = nir_shader_clone(NULL, ir);
57 } else {
58 assert (ir_type == PIPE_SHADER_IR_TGSI);
59 s = tgsi_to_nir(ir, ctx->base.screen);
60 }
61
62 s->info.stage = stage;
63
64 /* Call out to Midgard compiler given the above NIR */
65
66 midgard_program program = {
67 .alpha_ref = state->alpha_state.ref_value
68 };
69
70 midgard_compile_shader_nir(s, &program, false, 0, screen->gpu_id,
71 pan_debug & PAN_DBG_PRECOMPILE);
72
73 /* Prepare the compiled binary for upload */
74 int size = program.compiled.size;
75 dst = program.compiled.data;
76
77 /* Upload the shader. The lookahead tag is ORed on as a tagged pointer.
78 * I bet someone just thought that would be a cute pun. At least,
79 * that's how I'd do it. */
80
81 if (size) {
82 state->bo = panfrost_bo_create(screen, size, PAN_BO_EXECUTE);
83 memcpy(state->bo->cpu, dst, size);
84 meta->shader = state->bo->gpu | program.first_tag;
85 } else {
86 /* no shader */
87 meta->shader = 0x0;
88 }
89
90 util_dynarray_fini(&program.compiled);
91
92 /* Sysvals are prepended */
93 program.uniform_count += program.sysval_count;
94 state->sysval_count = program.sysval_count;
95 memcpy(state->sysval, program.sysvals, sizeof(state->sysval[0]) * state->sysval_count);
96
97 meta->midgard1.uniform_count = MIN2(program.uniform_count, program.uniform_cutoff);
98 meta->midgard1.work_count = program.work_register_count;
99
100 bool vertex_id = s->info.system_values_read & (1 << SYSTEM_VALUE_VERTEX_ID);
101 bool instance_id = s->info.system_values_read & (1 << SYSTEM_VALUE_INSTANCE_ID);
102
103 switch (stage) {
104 case MESA_SHADER_VERTEX:
105 meta->attribute_count = util_bitcount64(s->info.inputs_read);
106 meta->varying_count = util_bitcount64(s->info.outputs_written);
107
108 if (vertex_id)
109 meta->attribute_count = MAX2(meta->attribute_count, PAN_VERTEX_ID + 1);
110
111 if (instance_id)
112 meta->attribute_count = MAX2(meta->attribute_count, PAN_INSTANCE_ID + 1);
113
114 break;
115 case MESA_SHADER_FRAGMENT:
116 meta->attribute_count = 0;
117 meta->varying_count = util_bitcount64(s->info.inputs_read);
118 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
119 state->writes_depth = true;
120 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL))
121 state->writes_stencil = true;
122 break;
123 case MESA_SHADER_COMPUTE:
124 /* TODO: images */
125 meta->attribute_count = 0;
126 meta->varying_count = 0;
127 break;
128 default:
129 unreachable("Unknown shader state");
130 }
131
132 state->can_discard = s->info.fs.uses_discard;
133 state->writes_point_size = program.writes_point_size;
134 state->reads_point_coord = false;
135 state->helper_invocations = s->info.fs.needs_helper_invocations;
136 state->stack_size = program.tls_size;
137
138 if (outputs_written)
139 *outputs_written = s->info.outputs_written;
140
141 /* Separate as primary uniform count is truncated */
142 state->uniform_count = program.uniform_count;
143
144 meta->midgard1.flags_hi = 8; /* XXX */
145
146 unsigned default_vec1_swizzle = panfrost_get_default_swizzle(1);
147 unsigned default_vec2_swizzle = panfrost_get_default_swizzle(2);
148 unsigned default_vec4_swizzle = panfrost_get_default_swizzle(4);
149
150 /* Iterate the varyings and emit the corresponding descriptor */
151 for (unsigned i = 0; i < meta->varying_count; ++i) {
152 unsigned location = program.varyings[i];
153
154 /* Default to a vec4 varying */
155 struct mali_attr_meta v = {
156 .format = program.varying_type[i],
157 .swizzle = default_vec4_swizzle,
158 .unknown1 = 0x2,
159 };
160
161 /* Check for special cases, otherwise assume general varying */
162
163 if (location == VARYING_SLOT_POS) {
164 if (stage == MESA_SHADER_FRAGMENT)
165 state->reads_frag_coord = true;
166 else
167 v.format = MALI_VARYING_POS;
168 } else if (location == VARYING_SLOT_PSIZ) {
169 v.format = MALI_R16F;
170 v.swizzle = default_vec1_swizzle;
171
172 state->writes_point_size = true;
173 } else if (location == VARYING_SLOT_PNTC) {
174 v.format = MALI_RG16F;
175 v.swizzle = default_vec2_swizzle;
176
177 state->reads_point_coord = true;
178 } else if (location == VARYING_SLOT_FACE) {
179 v.format = MALI_R32I;
180 v.swizzle = default_vec1_swizzle;
181
182 state->reads_face = true;
183 }
184
185 state->varyings[i] = v;
186 state->varyings_loc[i] = location;
187 }
188 }