2 * Copyright (C) 2018 Alyssa Rosenzweig
3 * Copyright (C) 2020 Collabora Ltd.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 #include "pan_allocate.h"
27 #include "pan_cmdstream.h"
28 #include "pan_context.h"
32 panfrost_emit_shader_meta(struct panfrost_batch
*batch
,
33 enum pipe_shader_type st
,
34 struct midgard_payload_vertex_tiler
*vtp
)
36 struct panfrost_context
*ctx
= batch
->ctx
;
37 struct panfrost_shader_state
*ss
= panfrost_get_shader_state(ctx
, st
);
40 vtp
->postfix
.shader
= 0;
44 /* Add the shader BO to the batch. */
45 panfrost_batch_add_bo(batch
, ss
->bo
,
46 PAN_BO_ACCESS_PRIVATE
|
48 panfrost_bo_access_for_stage(st
));
50 vtp
->postfix
.shader
= panfrost_upload_transient(batch
, ss
->tripipe
,
51 sizeof(*ss
->tripipe
));
55 panfrost_mali_viewport_init(struct panfrost_context
*ctx
,
56 struct mali_viewport
*mvp
)
58 const struct pipe_viewport_state
*vp
= &ctx
->pipe_viewport
;
60 /* Clip bounds are encoded as floats. The viewport itself is encoded as
61 * (somewhat) asymmetric ints. */
63 const struct pipe_scissor_state
*ss
= &ctx
->scissor
;
65 memset(mvp
, 0, sizeof(*mvp
));
67 /* By default, do no viewport clipping, i.e. clip to (-inf, inf) in
68 * each direction. Clipping to the viewport in theory should work, but
69 * in practice causes issues when we're not explicitly trying to
72 *mvp
= (struct mali_viewport
) {
73 .clip_minx
= -INFINITY
,
74 .clip_miny
= -INFINITY
,
75 .clip_maxx
= INFINITY
,
76 .clip_maxy
= INFINITY
,
79 /* Always scissor to the viewport by default. */
80 float vp_minx
= (int) (vp
->translate
[0] - fabsf(vp
->scale
[0]));
81 float vp_maxx
= (int) (vp
->translate
[0] + fabsf(vp
->scale
[0]));
83 float vp_miny
= (int) (vp
->translate
[1] - fabsf(vp
->scale
[1]));
84 float vp_maxy
= (int) (vp
->translate
[1] + fabsf(vp
->scale
[1]));
86 float minz
= (vp
->translate
[2] - fabsf(vp
->scale
[2]));
87 float maxz
= (vp
->translate
[2] + fabsf(vp
->scale
[2]));
89 /* Apply the scissor test */
91 unsigned minx
, miny
, maxx
, maxy
;
93 if (ss
&& ctx
->rasterizer
&& ctx
->rasterizer
->base
.scissor
) {
94 minx
= MAX2(ss
->minx
, vp_minx
);
95 miny
= MAX2(ss
->miny
, vp_miny
);
96 maxx
= MIN2(ss
->maxx
, vp_maxx
);
97 maxy
= MIN2(ss
->maxy
, vp_maxy
);
105 /* Hardware needs the min/max to be strictly ordered, so flip if we
106 * need to. The viewport transformation in the vertex shader will
107 * handle the negatives if we don't */
110 unsigned temp
= miny
;
116 unsigned temp
= minx
;
127 /* Clamp to the framebuffer size as a last check */
129 minx
= MIN2(ctx
->pipe_framebuffer
.width
, minx
);
130 maxx
= MIN2(ctx
->pipe_framebuffer
.width
, maxx
);
132 miny
= MIN2(ctx
->pipe_framebuffer
.height
, miny
);
133 maxy
= MIN2(ctx
->pipe_framebuffer
.height
, maxy
);
137 mvp
->viewport0
[0] = minx
;
138 mvp
->viewport1
[0] = MALI_POSITIVE(maxx
);
140 mvp
->viewport0
[1] = miny
;
141 mvp
->viewport1
[1] = MALI_POSITIVE(maxy
);
143 mvp
->clip_minz
= minz
;
144 mvp
->clip_maxz
= maxz
;
148 panfrost_emit_viewport(struct panfrost_batch
*batch
,
149 struct midgard_payload_vertex_tiler
*tp
)
151 struct panfrost_context
*ctx
= batch
->ctx
;
152 struct mali_viewport mvp
;
154 panfrost_mali_viewport_init(batch
->ctx
, &mvp
);
156 /* Update the job, unless we're doing wallpapering (whose lack of
157 * scissor we can ignore, since if we "miss" a tile of wallpaper, it'll
158 * just... be faster :) */
160 if (!ctx
->wallpaper_batch
)
161 panfrost_batch_union_scissor(batch
, mvp
.viewport0
[0],
163 mvp
.viewport1
[0] + 1,
164 mvp
.viewport1
[1] + 1);
166 tp
->postfix
.viewport
= panfrost_upload_transient(batch
, &mvp
,
171 panfrost_map_constant_buffer_gpu(struct panfrost_batch
*batch
,
172 enum pipe_shader_type st
,
173 struct panfrost_constant_buffer
*buf
,
176 struct pipe_constant_buffer
*cb
= &buf
->cb
[index
];
177 struct panfrost_resource
*rsrc
= pan_resource(cb
->buffer
);
180 panfrost_batch_add_bo(batch
, rsrc
->bo
,
181 PAN_BO_ACCESS_SHARED
|
183 panfrost_bo_access_for_stage(st
));
185 /* Alignment gauranteed by
186 * PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT */
187 return rsrc
->bo
->gpu
+ cb
->buffer_offset
;
188 } else if (cb
->user_buffer
) {
189 return panfrost_upload_transient(batch
,
194 unreachable("No constant buffer");
198 struct sysval_uniform
{
208 panfrost_upload_viewport_scale_sysval(struct panfrost_batch
*batch
,
209 struct sysval_uniform
*uniform
)
211 struct panfrost_context
*ctx
= batch
->ctx
;
212 const struct pipe_viewport_state
*vp
= &ctx
->pipe_viewport
;
214 uniform
->f
[0] = vp
->scale
[0];
215 uniform
->f
[1] = vp
->scale
[1];
216 uniform
->f
[2] = vp
->scale
[2];
220 panfrost_upload_viewport_offset_sysval(struct panfrost_batch
*batch
,
221 struct sysval_uniform
*uniform
)
223 struct panfrost_context
*ctx
= batch
->ctx
;
224 const struct pipe_viewport_state
*vp
= &ctx
->pipe_viewport
;
226 uniform
->f
[0] = vp
->translate
[0];
227 uniform
->f
[1] = vp
->translate
[1];
228 uniform
->f
[2] = vp
->translate
[2];
231 static void panfrost_upload_txs_sysval(struct panfrost_batch
*batch
,
232 enum pipe_shader_type st
,
233 unsigned int sysvalid
,
234 struct sysval_uniform
*uniform
)
236 struct panfrost_context
*ctx
= batch
->ctx
;
237 unsigned texidx
= PAN_SYSVAL_ID_TO_TXS_TEX_IDX(sysvalid
);
238 unsigned dim
= PAN_SYSVAL_ID_TO_TXS_DIM(sysvalid
);
239 bool is_array
= PAN_SYSVAL_ID_TO_TXS_IS_ARRAY(sysvalid
);
240 struct pipe_sampler_view
*tex
= &ctx
->sampler_views
[st
][texidx
]->base
;
243 uniform
->i
[0] = u_minify(tex
->texture
->width0
, tex
->u
.tex
.first_level
);
246 uniform
->i
[1] = u_minify(tex
->texture
->height0
,
247 tex
->u
.tex
.first_level
);
250 uniform
->i
[2] = u_minify(tex
->texture
->depth0
,
251 tex
->u
.tex
.first_level
);
254 uniform
->i
[dim
] = tex
->texture
->array_size
;
258 panfrost_upload_ssbo_sysval(struct panfrost_batch
*batch
,
259 enum pipe_shader_type st
,
261 struct sysval_uniform
*uniform
)
263 struct panfrost_context
*ctx
= batch
->ctx
;
265 assert(ctx
->ssbo_mask
[st
] & (1 << ssbo_id
));
266 struct pipe_shader_buffer sb
= ctx
->ssbo
[st
][ssbo_id
];
268 /* Compute address */
269 struct panfrost_bo
*bo
= pan_resource(sb
.buffer
)->bo
;
271 panfrost_batch_add_bo(batch
, bo
,
272 PAN_BO_ACCESS_SHARED
| PAN_BO_ACCESS_RW
|
273 panfrost_bo_access_for_stage(st
));
275 /* Upload address and size as sysval */
276 uniform
->du
[0] = bo
->gpu
+ sb
.buffer_offset
;
277 uniform
->u
[2] = sb
.buffer_size
;
281 panfrost_upload_sampler_sysval(struct panfrost_batch
*batch
,
282 enum pipe_shader_type st
,
284 struct sysval_uniform
*uniform
)
286 struct panfrost_context
*ctx
= batch
->ctx
;
287 struct pipe_sampler_state
*sampl
= &ctx
->samplers
[st
][samp_idx
]->base
;
289 uniform
->f
[0] = sampl
->min_lod
;
290 uniform
->f
[1] = sampl
->max_lod
;
291 uniform
->f
[2] = sampl
->lod_bias
;
293 /* Even without any errata, Midgard represents "no mipmapping" as
294 * fixing the LOD with the clamps; keep behaviour consistent. c.f.
295 * panfrost_create_sampler_state which also explains our choice of
296 * epsilon value (again to keep behaviour consistent) */
298 if (sampl
->min_mip_filter
== PIPE_TEX_MIPFILTER_NONE
)
299 uniform
->f
[1] = uniform
->f
[0] + (1.0/256.0);
303 panfrost_upload_num_work_groups_sysval(struct panfrost_batch
*batch
,
304 struct sysval_uniform
*uniform
)
306 struct panfrost_context
*ctx
= batch
->ctx
;
308 uniform
->u
[0] = ctx
->compute_grid
->grid
[0];
309 uniform
->u
[1] = ctx
->compute_grid
->grid
[1];
310 uniform
->u
[2] = ctx
->compute_grid
->grid
[2];
314 panfrost_upload_sysvals(struct panfrost_batch
*batch
, void *buf
,
315 struct panfrost_shader_state
*ss
,
316 enum pipe_shader_type st
)
318 struct sysval_uniform
*uniforms
= (void *)buf
;
320 for (unsigned i
= 0; i
< ss
->sysval_count
; ++i
) {
321 int sysval
= ss
->sysval
[i
];
323 switch (PAN_SYSVAL_TYPE(sysval
)) {
324 case PAN_SYSVAL_VIEWPORT_SCALE
:
325 panfrost_upload_viewport_scale_sysval(batch
,
328 case PAN_SYSVAL_VIEWPORT_OFFSET
:
329 panfrost_upload_viewport_offset_sysval(batch
,
332 case PAN_SYSVAL_TEXTURE_SIZE
:
333 panfrost_upload_txs_sysval(batch
, st
,
334 PAN_SYSVAL_ID(sysval
),
337 case PAN_SYSVAL_SSBO
:
338 panfrost_upload_ssbo_sysval(batch
, st
,
339 PAN_SYSVAL_ID(sysval
),
342 case PAN_SYSVAL_NUM_WORK_GROUPS
:
343 panfrost_upload_num_work_groups_sysval(batch
,
346 case PAN_SYSVAL_SAMPLER
:
347 panfrost_upload_sampler_sysval(batch
, st
,
348 PAN_SYSVAL_ID(sysval
),
358 panfrost_map_constant_buffer_cpu(struct panfrost_constant_buffer
*buf
,
361 struct pipe_constant_buffer
*cb
= &buf
->cb
[index
];
362 struct panfrost_resource
*rsrc
= pan_resource(cb
->buffer
);
365 return rsrc
->bo
->cpu
;
366 else if (cb
->user_buffer
)
367 return cb
->user_buffer
;
369 unreachable("No constant buffer");
373 panfrost_emit_const_buf(struct panfrost_batch
*batch
,
374 enum pipe_shader_type stage
,
375 struct midgard_payload_vertex_tiler
*vtp
)
377 struct panfrost_context
*ctx
= batch
->ctx
;
378 struct panfrost_shader_variants
*all
= ctx
->shader
[stage
];
383 struct panfrost_constant_buffer
*buf
= &ctx
->constant_buffer
[stage
];
385 struct panfrost_shader_state
*ss
= &all
->variants
[all
->active_variant
];
387 /* Uniforms are implicitly UBO #0 */
388 bool has_uniforms
= buf
->enabled_mask
& (1 << 0);
390 /* Allocate room for the sysval and the uniforms */
391 size_t sys_size
= sizeof(float) * 4 * ss
->sysval_count
;
392 size_t uniform_size
= has_uniforms
? (buf
->cb
[0].buffer_size
) : 0;
393 size_t size
= sys_size
+ uniform_size
;
394 struct panfrost_transfer transfer
= panfrost_allocate_transient(batch
,
397 /* Upload sysvals requested by the shader */
398 panfrost_upload_sysvals(batch
, transfer
.cpu
, ss
, stage
);
400 /* Upload uniforms */
401 if (has_uniforms
&& uniform_size
) {
402 const void *cpu
= panfrost_map_constant_buffer_cpu(buf
, 0);
403 memcpy(transfer
.cpu
+ sys_size
, cpu
, uniform_size
);
406 struct mali_vertex_tiler_postfix
*postfix
= &vtp
->postfix
;
408 /* Next up, attach UBOs. UBO #0 is the uniforms we just
411 unsigned ubo_count
= panfrost_ubo_count(ctx
, stage
);
412 assert(ubo_count
>= 1);
414 size_t sz
= sizeof(uint64_t) * ubo_count
;
415 uint64_t ubos
[PAN_MAX_CONST_BUFFERS
];
416 int uniform_count
= ss
->uniform_count
;
418 /* Upload uniforms as a UBO */
419 ubos
[0] = MALI_MAKE_UBO(2 + uniform_count
, transfer
.gpu
);
421 /* The rest are honest-to-goodness UBOs */
423 for (unsigned ubo
= 1; ubo
< ubo_count
; ++ubo
) {
424 size_t usz
= buf
->cb
[ubo
].buffer_size
;
425 bool enabled
= buf
->enabled_mask
& (1 << ubo
);
426 bool empty
= usz
== 0;
428 if (!enabled
|| empty
) {
429 /* Stub out disabled UBOs to catch accesses */
430 ubos
[ubo
] = MALI_MAKE_UBO(0, 0xDEAD0000);
434 mali_ptr gpu
= panfrost_map_constant_buffer_gpu(batch
, stage
,
437 unsigned bytes_per_field
= 16;
438 unsigned aligned
= ALIGN_POT(usz
, bytes_per_field
);
439 ubos
[ubo
] = MALI_MAKE_UBO(aligned
/ bytes_per_field
, gpu
);
442 mali_ptr ubufs
= panfrost_upload_transient(batch
, ubos
, sz
);
443 postfix
->uniforms
= transfer
.gpu
;
444 postfix
->uniform_buffers
= ubufs
;
450 panfrost_emit_shared_memory(struct panfrost_batch
*batch
,
451 const struct pipe_grid_info
*info
,
452 struct midgard_payload_vertex_tiler
*vtp
)
454 struct panfrost_context
*ctx
= batch
->ctx
;
455 struct panfrost_shader_variants
*all
= ctx
->shader
[PIPE_SHADER_COMPUTE
];
456 struct panfrost_shader_state
*ss
= &all
->variants
[all
->active_variant
];
457 unsigned single_size
= util_next_power_of_two(MAX2(ss
->shared_size
,
459 unsigned shared_size
= single_size
* info
->grid
[0] * info
->grid
[1] *
461 struct panfrost_bo
*bo
= panfrost_batch_get_shared_memory(batch
,
465 struct mali_shared_memory shared
= {
466 .shared_memory
= bo
->gpu
,
467 .shared_workgroup_count
=
468 util_logbase2_ceil(info
->grid
[0]) +
469 util_logbase2_ceil(info
->grid
[1]) +
470 util_logbase2_ceil(info
->grid
[2]),
472 .shared_shift
= util_logbase2(single_size
) - 1
475 vtp
->postfix
.shared_memory
= panfrost_upload_transient(batch
, &shared
,