215fe594406d4bba409c5b035090d87a4a28a2eb
[mesa.git] / src / gallium / drivers / panfrost / pan_context.c
1 /*
2 * © Copyright 2018 Alyssa Rosenzweig
3 * Copyright © 2014-2017 Broadcom
4 * Copyright (C) 2017 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 */
26
27 #include <sys/poll.h>
28 #include <errno.h>
29
30 #include "pan_bo.h"
31 #include "pan_context.h"
32 #include "pan_minmax_cache.h"
33 #include "panfrost-quirks.h"
34
35 #include "util/macros.h"
36 #include "util/format/u_format.h"
37 #include "util/u_inlines.h"
38 #include "util/u_upload_mgr.h"
39 #include "util/u_memory.h"
40 #include "util/u_vbuf.h"
41 #include "util/half_float.h"
42 #include "util/u_helpers.h"
43 #include "util/format/u_format.h"
44 #include "util/u_prim.h"
45 #include "util/u_prim_restart.h"
46 #include "indices/u_primconvert.h"
47 #include "tgsi/tgsi_parse.h"
48 #include "tgsi/tgsi_from_mesa.h"
49 #include "util/u_math.h"
50
51 #include "pan_screen.h"
52 #include "pan_blending.h"
53 #include "pan_blend_shaders.h"
54 #include "pan_cmdstream.h"
55 #include "pan_util.h"
56 #include "decode.h"
57 #include "util/pan_lower_framebuffer.h"
58
59 struct midgard_tiler_descriptor
60 panfrost_emit_midg_tiler(struct panfrost_batch *batch, unsigned vertex_count)
61 {
62 struct panfrost_device *device = pan_device(batch->ctx->base.screen);
63 bool hierarchy = !(device->quirks & MIDGARD_NO_HIER_TILING);
64 struct midgard_tiler_descriptor t = {0};
65 unsigned height = batch->key.height;
66 unsigned width = batch->key.width;
67
68 t.hierarchy_mask =
69 panfrost_choose_hierarchy_mask(width, height, vertex_count, hierarchy);
70
71 /* Compute the polygon header size and use that to offset the body */
72
73 unsigned header_size = panfrost_tiler_header_size(
74 width, height, t.hierarchy_mask, hierarchy);
75
76 t.polygon_list_size = panfrost_tiler_full_size(
77 width, height, t.hierarchy_mask, hierarchy);
78
79 if (vertex_count) {
80 t.polygon_list = panfrost_batch_get_polygon_list(batch,
81 header_size +
82 t.polygon_list_size);
83
84
85 t.heap_start = device->tiler_heap->gpu;
86 t.heap_end = device->tiler_heap->gpu + device->tiler_heap->size;
87 } else {
88 struct panfrost_bo *tiler_dummy;
89
90 tiler_dummy = panfrost_batch_get_tiler_dummy(batch);
91 header_size = MALI_TILER_MINIMUM_HEADER_SIZE;
92
93 /* The tiler is disabled, so don't allow the tiler heap */
94 t.heap_start = tiler_dummy->gpu;
95 t.heap_end = t.heap_start;
96
97 /* Use a dummy polygon list */
98 t.polygon_list = tiler_dummy->gpu;
99
100 /* Disable the tiler */
101 if (hierarchy)
102 t.hierarchy_mask |= MALI_TILER_DISABLED;
103 else {
104 t.hierarchy_mask = MALI_TILER_USER;
105 t.polygon_list_size = MALI_TILER_MINIMUM_HEADER_SIZE + 4;
106
107 /* We don't have a WRITE_VALUE job, so write the polygon list manually */
108 uint32_t *polygon_list_body = (uint32_t *) (tiler_dummy->cpu + header_size);
109 polygon_list_body[0] = 0xa0000000; /* TODO: Just that? */
110 }
111 }
112
113 t.polygon_list_body =
114 t.polygon_list + header_size;
115
116 return t;
117 }
118
119 static void
120 panfrost_clear(
121 struct pipe_context *pipe,
122 unsigned buffers,
123 const struct pipe_scissor_state *scissor_state,
124 const union pipe_color_union *color,
125 double depth, unsigned stencil)
126 {
127 struct panfrost_context *ctx = pan_context(pipe);
128
129 /* TODO: panfrost_get_fresh_batch_for_fbo() instantiates a new batch if
130 * the existing batch targeting this FBO has draws. We could probably
131 * avoid that by replacing plain clears by quad-draws with a specific
132 * color/depth/stencil value, thus avoiding the generation of extra
133 * fragment jobs.
134 */
135 struct panfrost_batch *batch = panfrost_get_fresh_batch_for_fbo(ctx);
136 panfrost_batch_clear(batch, buffers, color, depth, stencil);
137 }
138
139 bool
140 panfrost_writes_point_size(struct panfrost_context *ctx)
141 {
142 assert(ctx->shader[PIPE_SHADER_VERTEX]);
143 struct panfrost_shader_state *vs = panfrost_get_shader_state(ctx, PIPE_SHADER_VERTEX);
144
145 return vs->writes_point_size && ctx->active_prim == PIPE_PRIM_POINTS;
146 }
147
148 /* The entire frame is in memory -- send it off to the kernel! */
149
150 void
151 panfrost_flush(
152 struct pipe_context *pipe,
153 struct pipe_fence_handle **fence,
154 unsigned flags)
155 {
156 struct panfrost_context *ctx = pan_context(pipe);
157 struct panfrost_device *dev = pan_device(pipe->screen);
158 uint32_t syncobj = 0;
159
160 if (fence)
161 drmSyncobjCreate(dev->fd, 0, &syncobj);
162
163 /* Submit all pending jobs */
164 panfrost_flush_all_batches(ctx, syncobj);
165
166 if (fence) {
167 struct panfrost_fence *f = panfrost_fence_create(ctx, syncobj);
168 pipe->screen->fence_reference(pipe->screen, fence, NULL);
169 *fence = (struct pipe_fence_handle *)f;
170 }
171
172 if (dev->debug & PAN_DBG_TRACE)
173 pandecode_next_frame();
174 }
175
176 static void
177 panfrost_texture_barrier(struct pipe_context *pipe, unsigned flags)
178 {
179 struct panfrost_context *ctx = pan_context(pipe);
180 panfrost_flush_all_batches(ctx, 0);
181 }
182
183 #define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_DRAW_MODE_##c;
184
185 static int
186 g2m_draw_mode(enum pipe_prim_type mode)
187 {
188 switch (mode) {
189 DEFINE_CASE(POINTS);
190 DEFINE_CASE(LINES);
191 DEFINE_CASE(LINE_LOOP);
192 DEFINE_CASE(LINE_STRIP);
193 DEFINE_CASE(TRIANGLES);
194 DEFINE_CASE(TRIANGLE_STRIP);
195 DEFINE_CASE(TRIANGLE_FAN);
196 DEFINE_CASE(QUADS);
197 DEFINE_CASE(QUAD_STRIP);
198 DEFINE_CASE(POLYGON);
199
200 default:
201 unreachable("Invalid draw mode");
202 }
203 }
204
205 #undef DEFINE_CASE
206
207 static bool
208 panfrost_scissor_culls_everything(struct panfrost_context *ctx)
209 {
210 const struct pipe_scissor_state *ss = &ctx->scissor;
211
212 /* Check if we're scissoring at all */
213
214 if (!ctx->rasterizer->base.scissor)
215 return false;
216
217 return (ss->minx == ss->maxx) || (ss->miny == ss->maxy);
218 }
219
220 /* Count generated primitives (when there is no geom/tess shaders) for
221 * transform feedback */
222
223 static void
224 panfrost_statistics_record(
225 struct panfrost_context *ctx,
226 const struct pipe_draw_info *info)
227 {
228 if (!ctx->active_queries)
229 return;
230
231 uint32_t prims = u_prims_for_vertices(info->mode, info->count);
232 ctx->prims_generated += prims;
233
234 if (!ctx->streamout.num_targets)
235 return;
236
237 ctx->tf_prims_generated += prims;
238 }
239
240 static void
241 panfrost_update_streamout_offsets(struct panfrost_context *ctx)
242 {
243 for (unsigned i = 0; i < ctx->streamout.num_targets; ++i) {
244 unsigned count;
245
246 count = u_stream_outputs_for_vertices(ctx->active_prim,
247 ctx->vertex_count);
248 ctx->streamout.offsets[i] += count;
249 }
250 }
251
252 static void
253 panfrost_draw_vbo(
254 struct pipe_context *pipe,
255 const struct pipe_draw_info *info)
256 {
257 struct panfrost_context *ctx = pan_context(pipe);
258
259 /* First of all, check the scissor to see if anything is drawn at all.
260 * If it's not, we drop the draw (mostly a conformance issue;
261 * well-behaved apps shouldn't hit this) */
262
263 if (panfrost_scissor_culls_everything(ctx))
264 return;
265
266 int mode = info->mode;
267
268 /* Fallback unsupported restart index */
269 unsigned primitive_index = (1 << (info->index_size * 8)) - 1;
270
271 if (info->primitive_restart && info->index_size
272 && info->restart_index != primitive_index) {
273 util_draw_vbo_without_prim_restart(pipe, info);
274 return;
275 }
276
277 /* Fallback for unsupported modes */
278
279 assert(ctx->rasterizer != NULL);
280
281 if (!(ctx->draw_modes & (1 << mode))) {
282 if (info->count < 4) {
283 /* Degenerate case? */
284 return;
285 }
286
287 util_primconvert_save_rasterizer_state(ctx->primconvert, &ctx->rasterizer->base);
288 util_primconvert_draw_vbo(ctx->primconvert, info);
289 return;
290 }
291
292 /* Now that we have a guaranteed terminating path, find the job. */
293
294 struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx);
295 panfrost_batch_set_requirements(batch);
296
297 /* Take into account a negative bias */
298 ctx->vertex_count = info->count + abs(info->index_bias);
299 ctx->instance_count = info->instance_count;
300 ctx->active_prim = info->mode;
301
302 struct mali_vertex_tiler_prefix vertex_prefix, tiler_prefix;
303 struct mali_vertex_tiler_postfix vertex_postfix, tiler_postfix;
304 union midgard_primitive_size primitive_size;
305 unsigned vertex_count;
306
307 panfrost_vt_init(ctx, PIPE_SHADER_VERTEX, &vertex_prefix, &vertex_postfix);
308 panfrost_vt_init(ctx, PIPE_SHADER_FRAGMENT, &tiler_prefix, &tiler_postfix);
309
310 panfrost_vt_set_draw_info(ctx, info, g2m_draw_mode(mode),
311 &vertex_postfix, &tiler_prefix,
312 &tiler_postfix, &vertex_count,
313 &ctx->padded_count);
314
315 panfrost_statistics_record(ctx, info);
316
317 panfrost_pack_work_groups_fused(&vertex_prefix, &tiler_prefix,
318 1, vertex_count, info->instance_count,
319 1, 1, 1);
320
321 /* Emit all sort of descriptors. */
322 mali_ptr push_vert = 0, push_frag = 0;
323
324 panfrost_emit_vertex_data(batch, &vertex_postfix);
325 panfrost_emit_varying_descriptor(batch,
326 ctx->padded_count *
327 ctx->instance_count,
328 &vertex_postfix, &tiler_postfix,
329 &primitive_size);
330 vertex_postfix.sampler_descriptor = panfrost_emit_sampler_descriptors(batch, PIPE_SHADER_VERTEX);
331 tiler_postfix.sampler_descriptor = panfrost_emit_sampler_descriptors(batch, PIPE_SHADER_FRAGMENT);
332 vertex_postfix.textures = panfrost_emit_texture_descriptors(batch, PIPE_SHADER_VERTEX);
333 tiler_postfix.textures = panfrost_emit_texture_descriptors(batch, PIPE_SHADER_FRAGMENT);
334 vertex_postfix.uniform_buffers = panfrost_emit_const_buf(batch, PIPE_SHADER_VERTEX, &push_vert);
335 tiler_postfix.uniform_buffers = panfrost_emit_const_buf(batch, PIPE_SHADER_FRAGMENT, &push_frag);
336 vertex_postfix.uniforms = push_vert;
337 tiler_postfix.uniforms = push_frag;
338 tiler_postfix.viewport = panfrost_emit_viewport(batch);
339
340 vertex_postfix.shader = panfrost_emit_compute_shader_meta(batch, PIPE_SHADER_VERTEX);
341 tiler_postfix.shader = panfrost_emit_frag_shader_meta(batch);
342
343 panfrost_vt_update_primitive_size(ctx, &tiler_prefix, &primitive_size);
344
345 /* Fire off the draw itself */
346 panfrost_emit_vertex_tiler_jobs(batch, &vertex_prefix, &vertex_postfix,
347 &tiler_prefix, &tiler_postfix,
348 &primitive_size);
349
350 /* Adjust the batch stack size based on the new shader stack sizes. */
351 panfrost_batch_adjust_stack_size(batch);
352
353 /* Increment transform feedback offsets */
354 panfrost_update_streamout_offsets(ctx);
355 }
356
357 /* CSO state */
358
359 static void
360 panfrost_generic_cso_delete(struct pipe_context *pctx, void *hwcso)
361 {
362 free(hwcso);
363 }
364
365 static void *
366 panfrost_create_rasterizer_state(
367 struct pipe_context *pctx,
368 const struct pipe_rasterizer_state *cso)
369 {
370 struct panfrost_rasterizer *so = CALLOC_STRUCT(panfrost_rasterizer);
371
372 so->base = *cso;
373
374 /* Gauranteed with the core GL call, so don't expose ARB_polygon_offset */
375 assert(cso->offset_clamp == 0.0);
376
377 return so;
378 }
379
380 static void
381 panfrost_bind_rasterizer_state(
382 struct pipe_context *pctx,
383 void *hwcso)
384 {
385 struct panfrost_context *ctx = pan_context(pctx);
386
387 ctx->rasterizer = hwcso;
388
389 if (!hwcso)
390 return;
391
392 /* Point sprites are emulated */
393
394 struct panfrost_shader_state *variant = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
395
396 if (ctx->rasterizer->base.sprite_coord_enable || (variant && variant->point_sprite_mask))
397 ctx->base.bind_fs_state(&ctx->base, ctx->shader[PIPE_SHADER_FRAGMENT]);
398 }
399
400 static void *
401 panfrost_create_vertex_elements_state(
402 struct pipe_context *pctx,
403 unsigned num_elements,
404 const struct pipe_vertex_element *elements)
405 {
406 struct panfrost_vertex_state *so = CALLOC_STRUCT(panfrost_vertex_state);
407 struct panfrost_device *dev = pan_device(pctx->screen);
408
409 so->num_elements = num_elements;
410 memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
411
412 for (int i = 0; i < num_elements; ++i) {
413 enum pipe_format fmt = elements[i].src_format;
414 const struct util_format_description *desc = util_format_description(fmt);
415 unsigned swizzle = 0;
416 if (dev->quirks & HAS_SWIZZLES)
417 swizzle = panfrost_translate_swizzle_4(desc->swizzle);
418 else
419 swizzle = panfrost_bifrost_swizzle(desc->nr_channels);
420
421 enum mali_format hw_format = panfrost_pipe_format_table[desc->format].hw;
422 so->formats[i] = (hw_format << 12) | swizzle;
423 assert(hw_format);
424 }
425
426 /* Let's also prepare vertex builtins */
427 if (dev->quirks & HAS_SWIZZLES)
428 so->formats[PAN_VERTEX_ID] = (MALI_R32UI << 12) | panfrost_get_default_swizzle(1);
429 else
430 so->formats[PAN_VERTEX_ID] = (MALI_R32UI << 12) | panfrost_bifrost_swizzle(1);
431
432 if (dev->quirks & HAS_SWIZZLES)
433 so->formats[PAN_INSTANCE_ID] = (MALI_R32UI << 12) | panfrost_get_default_swizzle(1);
434 else
435 so->formats[PAN_INSTANCE_ID] = (MALI_R32UI << 12) | panfrost_bifrost_swizzle(1);
436
437 return so;
438 }
439
440 static void
441 panfrost_bind_vertex_elements_state(
442 struct pipe_context *pctx,
443 void *hwcso)
444 {
445 struct panfrost_context *ctx = pan_context(pctx);
446 ctx->vertex = hwcso;
447 }
448
449 static void *
450 panfrost_create_shader_state(
451 struct pipe_context *pctx,
452 const struct pipe_shader_state *cso,
453 enum pipe_shader_type stage)
454 {
455 struct panfrost_shader_variants *so = CALLOC_STRUCT(panfrost_shader_variants);
456 struct panfrost_device *dev = pan_device(pctx->screen);
457 so->base = *cso;
458
459 /* Token deep copy to prevent memory corruption */
460
461 if (cso->type == PIPE_SHADER_IR_TGSI)
462 so->base.tokens = tgsi_dup_tokens(so->base.tokens);
463
464 /* Precompile for shader-db if we need to */
465 if (unlikely((dev->debug & PAN_DBG_PRECOMPILE) && cso->type == PIPE_SHADER_IR_NIR)) {
466 struct panfrost_context *ctx = pan_context(pctx);
467
468 struct panfrost_shader_state state = { 0 };
469 uint64_t outputs_written;
470
471 panfrost_shader_compile(ctx, PIPE_SHADER_IR_NIR,
472 so->base.ir.nir,
473 tgsi_processor_to_shader_stage(stage),
474 &state, &outputs_written);
475 }
476
477 return so;
478 }
479
480 static void
481 panfrost_delete_shader_state(
482 struct pipe_context *pctx,
483 void *so)
484 {
485 struct panfrost_shader_variants *cso = (struct panfrost_shader_variants *) so;
486
487 if (cso->base.type == PIPE_SHADER_IR_TGSI) {
488 /* TODO: leaks TGSI tokens! */
489 }
490
491 for (unsigned i = 0; i < cso->variant_count; ++i) {
492 struct panfrost_shader_state *shader_state = &cso->variants[i];
493 panfrost_bo_unreference(shader_state->bo);
494
495 if (shader_state->upload.rsrc)
496 pipe_resource_reference(&shader_state->upload.rsrc, NULL);
497
498 shader_state->bo = NULL;
499 }
500 free(cso->variants);
501
502
503 free(so);
504 }
505
506 static void *
507 panfrost_create_sampler_state(
508 struct pipe_context *pctx,
509 const struct pipe_sampler_state *cso)
510 {
511 struct panfrost_sampler_state *so = CALLOC_STRUCT(panfrost_sampler_state);
512 struct panfrost_device *device = pan_device(pctx->screen);
513
514 so->base = *cso;
515
516 if (device->quirks & IS_BIFROST)
517 panfrost_sampler_desc_init_bifrost(cso, (struct mali_bifrost_sampler_packed *) &so->hw);
518 else
519 panfrost_sampler_desc_init(cso, &so->hw);
520
521 return so;
522 }
523
524 static void
525 panfrost_bind_sampler_states(
526 struct pipe_context *pctx,
527 enum pipe_shader_type shader,
528 unsigned start_slot, unsigned num_sampler,
529 void **sampler)
530 {
531 assert(start_slot == 0);
532
533 struct panfrost_context *ctx = pan_context(pctx);
534
535 /* XXX: Should upload, not just copy? */
536 ctx->sampler_count[shader] = num_sampler;
537 memcpy(ctx->samplers[shader], sampler, num_sampler * sizeof (void *));
538 }
539
540 static bool
541 panfrost_variant_matches(
542 struct panfrost_context *ctx,
543 struct panfrost_shader_state *variant,
544 enum pipe_shader_type type)
545 {
546 struct panfrost_device *dev = pan_device(ctx->base.screen);
547 struct pipe_rasterizer_state *rasterizer = &ctx->rasterizer->base;
548
549 bool is_fragment = (type == PIPE_SHADER_FRAGMENT);
550
551 if (variant->outputs_read) {
552 struct pipe_framebuffer_state *fb = &ctx->pipe_framebuffer;
553
554 unsigned i;
555 BITSET_FOREACH_SET(i, &variant->outputs_read, 8) {
556 enum pipe_format fmt = PIPE_FORMAT_R8G8B8A8_UNORM;
557
558 if ((fb->nr_cbufs > i) && fb->cbufs[i])
559 fmt = fb->cbufs[i]->format;
560
561 const struct util_format_description *desc =
562 util_format_description(fmt);
563
564 if (pan_format_class_load(desc, dev->quirks) == PAN_FORMAT_NATIVE)
565 fmt = PIPE_FORMAT_NONE;
566
567 if (variant->rt_formats[i] != fmt)
568 return false;
569 }
570 }
571
572 /* Point sprites TODO on bifrost, always pass */
573 if (is_fragment && rasterizer && (rasterizer->sprite_coord_enable |
574 variant->point_sprite_mask)
575 && !(dev->quirks & IS_BIFROST)) {
576 /* Ensure the same varyings are turned to point sprites */
577 if (rasterizer->sprite_coord_enable != variant->point_sprite_mask)
578 return false;
579
580 /* Ensure the orientation is correct */
581 bool upper_left =
582 rasterizer->sprite_coord_mode ==
583 PIPE_SPRITE_COORD_UPPER_LEFT;
584
585 if (variant->point_sprite_upper_left != upper_left)
586 return false;
587 }
588
589 /* Otherwise, we're good to go */
590 return true;
591 }
592
593 /**
594 * Fix an uncompiled shader's stream output info, and produce a bitmask
595 * of which VARYING_SLOT_* are captured for stream output.
596 *
597 * Core Gallium stores output->register_index as a "slot" number, where
598 * slots are assigned consecutively to all outputs in info->outputs_written.
599 * This naive packing of outputs doesn't work for us - we too have slots,
600 * but the layout is defined by the VUE map, which we won't have until we
601 * compile a specific shader variant. So, we remap these and simply store
602 * VARYING_SLOT_* in our copy's output->register_index fields.
603 *
604 * We then produce a bitmask of outputs which are used for SO.
605 *
606 * Implementation from iris.
607 */
608
609 static uint64_t
610 update_so_info(struct pipe_stream_output_info *so_info,
611 uint64_t outputs_written)
612 {
613 uint64_t so_outputs = 0;
614 uint8_t reverse_map[64] = {0};
615 unsigned slot = 0;
616
617 while (outputs_written)
618 reverse_map[slot++] = u_bit_scan64(&outputs_written);
619
620 for (unsigned i = 0; i < so_info->num_outputs; i++) {
621 struct pipe_stream_output *output = &so_info->output[i];
622
623 /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
624 output->register_index = reverse_map[output->register_index];
625
626 so_outputs |= 1ull << output->register_index;
627 }
628
629 return so_outputs;
630 }
631
632 static void
633 panfrost_bind_shader_state(
634 struct pipe_context *pctx,
635 void *hwcso,
636 enum pipe_shader_type type)
637 {
638 struct panfrost_context *ctx = pan_context(pctx);
639 struct panfrost_device *dev = pan_device(ctx->base.screen);
640 ctx->shader[type] = hwcso;
641
642 if (!hwcso) return;
643
644 /* Match the appropriate variant */
645
646 signed variant = -1;
647 struct panfrost_shader_variants *variants = (struct panfrost_shader_variants *) hwcso;
648
649 for (unsigned i = 0; i < variants->variant_count; ++i) {
650 if (panfrost_variant_matches(ctx, &variants->variants[i], type)) {
651 variant = i;
652 break;
653 }
654 }
655
656 if (variant == -1) {
657 /* No variant matched, so create a new one */
658 variant = variants->variant_count++;
659
660 if (variants->variant_count > variants->variant_space) {
661 unsigned old_space = variants->variant_space;
662
663 variants->variant_space *= 2;
664 if (variants->variant_space == 0)
665 variants->variant_space = 1;
666
667 /* Arbitrary limit to stop runaway programs from
668 * creating an unbounded number of shader variants. */
669 assert(variants->variant_space < 1024);
670
671 unsigned msize = sizeof(struct panfrost_shader_state);
672 variants->variants = realloc(variants->variants,
673 variants->variant_space * msize);
674
675 memset(&variants->variants[old_space], 0,
676 (variants->variant_space - old_space) * msize);
677 }
678
679 struct panfrost_shader_state *v =
680 &variants->variants[variant];
681
682 if (type == PIPE_SHADER_FRAGMENT) {
683 struct pipe_framebuffer_state *fb = &ctx->pipe_framebuffer;
684 for (unsigned i = 0; i < fb->nr_cbufs; ++i) {
685 enum pipe_format fmt = PIPE_FORMAT_R8G8B8A8_UNORM;
686
687 if ((fb->nr_cbufs > i) && fb->cbufs[i])
688 fmt = fb->cbufs[i]->format;
689
690 const struct util_format_description *desc =
691 util_format_description(fmt);
692
693 if (pan_format_class_load(desc, dev->quirks) == PAN_FORMAT_NATIVE)
694 fmt = PIPE_FORMAT_NONE;
695
696 v->rt_formats[i] = fmt;
697 }
698
699 /* Point sprites are TODO on Bifrost */
700 if (ctx->rasterizer && !(dev->quirks & IS_BIFROST)) {
701 v->point_sprite_mask = ctx->rasterizer->base.sprite_coord_enable;
702 v->point_sprite_upper_left =
703 ctx->rasterizer->base.sprite_coord_mode ==
704 PIPE_SPRITE_COORD_UPPER_LEFT;
705 }
706 }
707 }
708
709 /* Select this variant */
710 variants->active_variant = variant;
711
712 struct panfrost_shader_state *shader_state = &variants->variants[variant];
713 assert(panfrost_variant_matches(ctx, shader_state, type));
714
715 /* We finally have a variant, so compile it */
716
717 if (!shader_state->compiled) {
718 uint64_t outputs_written = 0;
719
720 panfrost_shader_compile(ctx, variants->base.type,
721 variants->base.type == PIPE_SHADER_IR_NIR ?
722 variants->base.ir.nir :
723 variants->base.tokens,
724 tgsi_processor_to_shader_stage(type),
725 shader_state,
726 &outputs_written);
727
728 shader_state->compiled = true;
729
730 /* Fixup the stream out information, since what Gallium returns
731 * normally is mildly insane */
732
733 shader_state->stream_output = variants->base.stream_output;
734 shader_state->so_mask =
735 update_so_info(&shader_state->stream_output, outputs_written);
736 }
737 }
738
739 static void *
740 panfrost_create_vs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso)
741 {
742 return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX);
743 }
744
745 static void *
746 panfrost_create_fs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso)
747 {
748 return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT);
749 }
750
751 static void
752 panfrost_bind_vs_state(struct pipe_context *pctx, void *hwcso)
753 {
754 panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX);
755 }
756
757 static void
758 panfrost_bind_fs_state(struct pipe_context *pctx, void *hwcso)
759 {
760 panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT);
761 }
762
763 static void
764 panfrost_set_vertex_buffers(
765 struct pipe_context *pctx,
766 unsigned start_slot,
767 unsigned num_buffers,
768 const struct pipe_vertex_buffer *buffers)
769 {
770 struct panfrost_context *ctx = pan_context(pctx);
771
772 util_set_vertex_buffers_mask(ctx->vertex_buffers, &ctx->vb_mask, buffers, start_slot, num_buffers);
773 }
774
775 static void
776 panfrost_set_constant_buffer(
777 struct pipe_context *pctx,
778 enum pipe_shader_type shader, uint index,
779 const struct pipe_constant_buffer *buf)
780 {
781 struct panfrost_context *ctx = pan_context(pctx);
782 struct panfrost_constant_buffer *pbuf = &ctx->constant_buffer[shader];
783
784 util_copy_constant_buffer(&pbuf->cb[index], buf);
785
786 unsigned mask = (1 << index);
787
788 if (unlikely(!buf)) {
789 pbuf->enabled_mask &= ~mask;
790 pbuf->dirty_mask &= ~mask;
791 return;
792 }
793
794 pbuf->enabled_mask |= mask;
795 pbuf->dirty_mask |= mask;
796 }
797
798 static void
799 panfrost_set_stencil_ref(
800 struct pipe_context *pctx,
801 const struct pipe_stencil_ref *ref)
802 {
803 struct panfrost_context *ctx = pan_context(pctx);
804 ctx->stencil_ref = *ref;
805 }
806
807 void
808 panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,
809 struct pipe_context *pctx,
810 struct pipe_resource *texture)
811 {
812 struct panfrost_device *device = pan_device(pctx->screen);
813 struct panfrost_resource *prsrc = (struct panfrost_resource *)texture;
814 enum pipe_format format = so->base.format;
815 assert(prsrc->bo);
816
817 /* Format to access the stencil portion of a Z32_S8 texture */
818 if (format == PIPE_FORMAT_X32_S8X24_UINT) {
819 assert(prsrc->separate_stencil);
820 texture = &prsrc->separate_stencil->base;
821 prsrc = (struct panfrost_resource *)texture;
822 format = texture->format;
823 }
824
825 const struct util_format_description *desc = util_format_description(format);
826
827 bool fake_rgtc = !panfrost_supports_compressed_format(device, MALI_BC4_UNORM);
828
829 if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC && fake_rgtc) {
830 if (desc->is_snorm)
831 format = PIPE_FORMAT_R8G8B8A8_SNORM;
832 else
833 format = PIPE_FORMAT_R8G8B8A8_UNORM;
834 desc = util_format_description(format);
835 }
836
837 so->texture_bo = prsrc->bo->gpu;
838 so->modifier = prsrc->modifier;
839
840 unsigned char user_swizzle[4] = {
841 so->base.swizzle_r,
842 so->base.swizzle_g,
843 so->base.swizzle_b,
844 so->base.swizzle_a
845 };
846
847 /* In the hardware, array_size refers specifically to array textures,
848 * whereas in Gallium, it also covers cubemaps */
849
850 unsigned array_size = texture->array_size;
851 unsigned depth = texture->depth0;
852
853 if (so->base.target == PIPE_TEXTURE_CUBE) {
854 /* TODO: Cubemap arrays */
855 assert(array_size == 6);
856 array_size /= 6;
857 }
858
859 /* MSAA only supported for 2D textures (and 2D texture arrays via an
860 * extension currently unimplemented */
861
862 if (so->base.target == PIPE_TEXTURE_2D) {
863 assert(depth == 1);
864 depth = texture->nr_samples;
865 } else {
866 /* MSAA only supported for 2D textures */
867 assert(texture->nr_samples <= 1);
868 }
869
870 enum mali_texture_dimension type =
871 panfrost_translate_texture_dimension(so->base.target);
872
873 if (device->quirks & IS_BIFROST) {
874 unsigned char composed_swizzle[4];
875 util_format_compose_swizzles(desc->swizzle, user_swizzle, composed_swizzle);
876
877 unsigned size = panfrost_estimate_texture_payload_size(
878 so->base.u.tex.first_level,
879 so->base.u.tex.last_level,
880 so->base.u.tex.first_layer,
881 so->base.u.tex.last_layer,
882 texture->nr_samples,
883 type, prsrc->modifier);
884
885 so->bo = panfrost_bo_create(device, size, 0);
886
887 panfrost_new_texture_bifrost(
888 &so->bifrost_descriptor,
889 texture->width0, texture->height0,
890 depth, array_size,
891 format,
892 type, prsrc->modifier,
893 so->base.u.tex.first_level,
894 so->base.u.tex.last_level,
895 so->base.u.tex.first_layer,
896 so->base.u.tex.last_layer,
897 texture->nr_samples,
898 prsrc->cubemap_stride,
899 panfrost_translate_swizzle_4(composed_swizzle),
900 prsrc->bo->gpu,
901 prsrc->slices,
902 so->bo);
903 } else {
904 unsigned size = panfrost_estimate_texture_payload_size(
905 so->base.u.tex.first_level,
906 so->base.u.tex.last_level,
907 so->base.u.tex.first_layer,
908 so->base.u.tex.last_layer,
909 texture->nr_samples,
910 type, prsrc->modifier);
911 size += MALI_MIDGARD_TEXTURE_LENGTH;
912
913 so->bo = panfrost_bo_create(device, size, 0);
914
915 panfrost_new_texture(
916 so->bo->cpu,
917 texture->width0, texture->height0,
918 depth, array_size,
919 format,
920 type, prsrc->modifier,
921 so->base.u.tex.first_level,
922 so->base.u.tex.last_level,
923 so->base.u.tex.first_layer,
924 so->base.u.tex.last_layer,
925 texture->nr_samples,
926 prsrc->cubemap_stride,
927 panfrost_translate_swizzle_4(user_swizzle),
928 prsrc->bo->gpu,
929 prsrc->slices);
930 }
931 }
932
933 static struct pipe_sampler_view *
934 panfrost_create_sampler_view(
935 struct pipe_context *pctx,
936 struct pipe_resource *texture,
937 const struct pipe_sampler_view *template)
938 {
939 struct panfrost_sampler_view *so = rzalloc(pctx, struct panfrost_sampler_view);
940
941 pipe_reference(NULL, &texture->reference);
942
943 so->base = *template;
944 so->base.texture = texture;
945 so->base.reference.count = 1;
946 so->base.context = pctx;
947
948 panfrost_create_sampler_view_bo(so, pctx, texture);
949
950 return (struct pipe_sampler_view *) so;
951 }
952
953 static void
954 panfrost_set_sampler_views(
955 struct pipe_context *pctx,
956 enum pipe_shader_type shader,
957 unsigned start_slot, unsigned num_views,
958 struct pipe_sampler_view **views)
959 {
960 struct panfrost_context *ctx = pan_context(pctx);
961 unsigned new_nr = 0;
962 unsigned i;
963
964 assert(start_slot == 0);
965
966 for (i = 0; i < num_views; ++i) {
967 if (views[i])
968 new_nr = i + 1;
969 pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i],
970 views[i]);
971 }
972
973 for (; i < ctx->sampler_view_count[shader]; i++) {
974 pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i],
975 NULL);
976 }
977 ctx->sampler_view_count[shader] = new_nr;
978 }
979
980 static void
981 panfrost_sampler_view_destroy(
982 struct pipe_context *pctx,
983 struct pipe_sampler_view *pview)
984 {
985 struct panfrost_sampler_view *view = (struct panfrost_sampler_view *) pview;
986
987 pipe_resource_reference(&pview->texture, NULL);
988 panfrost_bo_unreference(view->bo);
989 ralloc_free(view);
990 }
991
992 static void
993 panfrost_set_shader_buffers(
994 struct pipe_context *pctx,
995 enum pipe_shader_type shader,
996 unsigned start, unsigned count,
997 const struct pipe_shader_buffer *buffers,
998 unsigned writable_bitmask)
999 {
1000 struct panfrost_context *ctx = pan_context(pctx);
1001
1002 util_set_shader_buffers_mask(ctx->ssbo[shader], &ctx->ssbo_mask[shader],
1003 buffers, start, count);
1004 }
1005
1006 static void
1007 panfrost_set_framebuffer_state(struct pipe_context *pctx,
1008 const struct pipe_framebuffer_state *fb)
1009 {
1010 struct panfrost_context *ctx = pan_context(pctx);
1011
1012 util_copy_framebuffer_state(&ctx->pipe_framebuffer, fb);
1013 ctx->batch = NULL;
1014
1015 /* We may need to generate a new variant if the fragment shader is
1016 * keyed to the framebuffer format (due to EXT_framebuffer_fetch) */
1017 struct panfrost_shader_variants *fs = ctx->shader[PIPE_SHADER_FRAGMENT];
1018
1019 if (fs && fs->variant_count && fs->variants[fs->active_variant].outputs_read)
1020 ctx->base.bind_fs_state(&ctx->base, fs);
1021 }
1022
1023 static inline unsigned
1024 pan_pipe_to_stencil_op(enum pipe_stencil_op in)
1025 {
1026 switch (in) {
1027 case PIPE_STENCIL_OP_KEEP: return MALI_STENCIL_OP_KEEP;
1028 case PIPE_STENCIL_OP_ZERO: return MALI_STENCIL_OP_ZERO;
1029 case PIPE_STENCIL_OP_REPLACE: return MALI_STENCIL_OP_REPLACE;
1030 case PIPE_STENCIL_OP_INCR: return MALI_STENCIL_OP_INCR_SAT;
1031 case PIPE_STENCIL_OP_DECR: return MALI_STENCIL_OP_DECR_SAT;
1032 case PIPE_STENCIL_OP_INCR_WRAP: return MALI_STENCIL_OP_INCR_WRAP;
1033 case PIPE_STENCIL_OP_DECR_WRAP: return MALI_STENCIL_OP_DECR_WRAP;
1034 case PIPE_STENCIL_OP_INVERT: return MALI_STENCIL_OP_INVERT;
1035 default: unreachable("Invalid stencil op");
1036 }
1037 }
1038
1039 static inline void
1040 pan_pipe_to_stencil(const struct pipe_stencil_state *in, void *out)
1041 {
1042 pan_pack(out, STENCIL, cfg) {
1043 cfg.mask = in->valuemask;
1044 cfg.compare_function = panfrost_translate_compare_func(in->func);
1045 cfg.stencil_fail = pan_pipe_to_stencil_op(in->fail_op);
1046 cfg.depth_fail = pan_pipe_to_stencil_op(in->zfail_op);
1047 cfg.depth_pass = pan_pipe_to_stencil_op(in->zpass_op);
1048 }
1049 }
1050
1051 static void *
1052 panfrost_create_depth_stencil_state(struct pipe_context *pipe,
1053 const struct pipe_depth_stencil_alpha_state *zsa)
1054 {
1055 struct panfrost_zsa_state *so = CALLOC_STRUCT(panfrost_zsa_state);
1056 so->base = *zsa;
1057
1058 pan_pipe_to_stencil(&zsa->stencil[0], &so->stencil_front);
1059 so->stencil_mask_front = zsa->stencil[0].writemask;
1060
1061 if (zsa->stencil[1].enabled) {
1062 pan_pipe_to_stencil(&zsa->stencil[1], &so->stencil_back);
1063 so->stencil_mask_back = zsa->stencil[1].writemask;
1064 } else {
1065 so->stencil_back = so->stencil_front;
1066 so->stencil_mask_back = so->stencil_mask_front;
1067 }
1068
1069 /* Alpha lowered by frontend */
1070 assert(!zsa->alpha.enabled);
1071
1072 /* TODO: Bounds test should be easy */
1073 assert(!zsa->depth.bounds_test);
1074
1075 return so;
1076 }
1077
1078 static void
1079 panfrost_bind_depth_stencil_state(struct pipe_context *pipe,
1080 void *cso)
1081 {
1082 struct panfrost_context *ctx = pan_context(pipe);
1083 struct panfrost_zsa_state *zsa = cso;
1084 ctx->depth_stencil = zsa;
1085 }
1086
1087 static void
1088 panfrost_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
1089 {
1090 free( depth );
1091 }
1092
1093 static void
1094 panfrost_set_sample_mask(struct pipe_context *pipe,
1095 unsigned sample_mask)
1096 {
1097 struct panfrost_context *ctx = pan_context(pipe);
1098 ctx->sample_mask = sample_mask;
1099 }
1100
1101 static void
1102 panfrost_set_min_samples(struct pipe_context *pipe,
1103 unsigned min_samples)
1104 {
1105 struct panfrost_context *ctx = pan_context(pipe);
1106 ctx->min_samples = min_samples;
1107 }
1108
1109
1110 static void
1111 panfrost_set_clip_state(struct pipe_context *pipe,
1112 const struct pipe_clip_state *clip)
1113 {
1114 //struct panfrost_context *panfrost = pan_context(pipe);
1115 }
1116
1117 static void
1118 panfrost_set_viewport_states(struct pipe_context *pipe,
1119 unsigned start_slot,
1120 unsigned num_viewports,
1121 const struct pipe_viewport_state *viewports)
1122 {
1123 struct panfrost_context *ctx = pan_context(pipe);
1124
1125 assert(start_slot == 0);
1126 assert(num_viewports == 1);
1127
1128 ctx->pipe_viewport = *viewports;
1129 }
1130
1131 static void
1132 panfrost_set_scissor_states(struct pipe_context *pipe,
1133 unsigned start_slot,
1134 unsigned num_scissors,
1135 const struct pipe_scissor_state *scissors)
1136 {
1137 struct panfrost_context *ctx = pan_context(pipe);
1138
1139 assert(start_slot == 0);
1140 assert(num_scissors == 1);
1141
1142 ctx->scissor = *scissors;
1143 }
1144
1145 static void
1146 panfrost_set_polygon_stipple(struct pipe_context *pipe,
1147 const struct pipe_poly_stipple *stipple)
1148 {
1149 //struct panfrost_context *panfrost = pan_context(pipe);
1150 }
1151
1152 static void
1153 panfrost_set_active_query_state(struct pipe_context *pipe,
1154 bool enable)
1155 {
1156 struct panfrost_context *ctx = pan_context(pipe);
1157 ctx->active_queries = enable;
1158 }
1159
1160 static void
1161 panfrost_destroy(struct pipe_context *pipe)
1162 {
1163 struct panfrost_context *panfrost = pan_context(pipe);
1164
1165 if (panfrost->blitter)
1166 util_blitter_destroy(panfrost->blitter);
1167
1168 if (panfrost->blitter_wallpaper)
1169 util_blitter_destroy(panfrost->blitter_wallpaper);
1170
1171 util_unreference_framebuffer_state(&panfrost->pipe_framebuffer);
1172 u_upload_destroy(pipe->stream_uploader);
1173 u_upload_destroy(panfrost->state_uploader);
1174
1175 ralloc_free(pipe);
1176 }
1177
1178 static struct pipe_query *
1179 panfrost_create_query(struct pipe_context *pipe,
1180 unsigned type,
1181 unsigned index)
1182 {
1183 struct panfrost_query *q = rzalloc(pipe, struct panfrost_query);
1184
1185 q->type = type;
1186 q->index = index;
1187
1188 return (struct pipe_query *) q;
1189 }
1190
1191 static void
1192 panfrost_destroy_query(struct pipe_context *pipe, struct pipe_query *q)
1193 {
1194 struct panfrost_query *query = (struct panfrost_query *) q;
1195
1196 if (query->bo) {
1197 panfrost_bo_unreference(query->bo);
1198 query->bo = NULL;
1199 }
1200
1201 ralloc_free(q);
1202 }
1203
1204 static bool
1205 panfrost_begin_query(struct pipe_context *pipe, struct pipe_query *q)
1206 {
1207 struct panfrost_context *ctx = pan_context(pipe);
1208 struct panfrost_query *query = (struct panfrost_query *) q;
1209
1210 switch (query->type) {
1211 case PIPE_QUERY_OCCLUSION_COUNTER:
1212 case PIPE_QUERY_OCCLUSION_PREDICATE:
1213 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
1214 /* Allocate a bo for the query results to be stored */
1215 if (!query->bo) {
1216 query->bo = panfrost_bo_create(
1217 pan_device(ctx->base.screen),
1218 sizeof(unsigned), 0);
1219 }
1220
1221 unsigned *result = (unsigned *)query->bo->cpu;
1222 *result = 0; /* Default to 0 if nothing at all drawn. */
1223 ctx->occlusion_query = query;
1224 break;
1225
1226 /* Geometry statistics are computed in the driver. XXX: geom/tess
1227 * shaders.. */
1228
1229 case PIPE_QUERY_PRIMITIVES_GENERATED:
1230 query->start = ctx->prims_generated;
1231 break;
1232 case PIPE_QUERY_PRIMITIVES_EMITTED:
1233 query->start = ctx->tf_prims_generated;
1234 break;
1235
1236 default:
1237 /* TODO: timestamp queries, etc? */
1238 break;
1239 }
1240
1241 return true;
1242 }
1243
1244 static bool
1245 panfrost_end_query(struct pipe_context *pipe, struct pipe_query *q)
1246 {
1247 struct panfrost_context *ctx = pan_context(pipe);
1248 struct panfrost_query *query = (struct panfrost_query *) q;
1249
1250 switch (query->type) {
1251 case PIPE_QUERY_OCCLUSION_COUNTER:
1252 case PIPE_QUERY_OCCLUSION_PREDICATE:
1253 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
1254 ctx->occlusion_query = NULL;
1255 break;
1256 case PIPE_QUERY_PRIMITIVES_GENERATED:
1257 query->end = ctx->prims_generated;
1258 break;
1259 case PIPE_QUERY_PRIMITIVES_EMITTED:
1260 query->end = ctx->tf_prims_generated;
1261 break;
1262 }
1263
1264 return true;
1265 }
1266
1267 static bool
1268 panfrost_get_query_result(struct pipe_context *pipe,
1269 struct pipe_query *q,
1270 bool wait,
1271 union pipe_query_result *vresult)
1272 {
1273 struct panfrost_query *query = (struct panfrost_query *) q;
1274 struct panfrost_context *ctx = pan_context(pipe);
1275
1276
1277 switch (query->type) {
1278 case PIPE_QUERY_OCCLUSION_COUNTER:
1279 case PIPE_QUERY_OCCLUSION_PREDICATE:
1280 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
1281 panfrost_flush_batches_accessing_bo(ctx, query->bo, false);
1282 panfrost_bo_wait(query->bo, INT64_MAX, false);
1283
1284 /* Read back the query results */
1285 unsigned *result = (unsigned *) query->bo->cpu;
1286 unsigned passed = *result;
1287
1288 if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) {
1289 vresult->u64 = passed;
1290 } else {
1291 vresult->b = !!passed;
1292 }
1293
1294 break;
1295
1296 case PIPE_QUERY_PRIMITIVES_GENERATED:
1297 case PIPE_QUERY_PRIMITIVES_EMITTED:
1298 panfrost_flush_all_batches(ctx, 0);
1299 vresult->u64 = query->end - query->start;
1300 break;
1301
1302 default:
1303 /* TODO: more queries */
1304 break;
1305 }
1306
1307 return true;
1308 }
1309
1310 static struct pipe_stream_output_target *
1311 panfrost_create_stream_output_target(struct pipe_context *pctx,
1312 struct pipe_resource *prsc,
1313 unsigned buffer_offset,
1314 unsigned buffer_size)
1315 {
1316 struct pipe_stream_output_target *target;
1317
1318 target = rzalloc(pctx, struct pipe_stream_output_target);
1319
1320 if (!target)
1321 return NULL;
1322
1323 pipe_reference_init(&target->reference, 1);
1324 pipe_resource_reference(&target->buffer, prsc);
1325
1326 target->context = pctx;
1327 target->buffer_offset = buffer_offset;
1328 target->buffer_size = buffer_size;
1329
1330 return target;
1331 }
1332
1333 static void
1334 panfrost_stream_output_target_destroy(struct pipe_context *pctx,
1335 struct pipe_stream_output_target *target)
1336 {
1337 pipe_resource_reference(&target->buffer, NULL);
1338 ralloc_free(target);
1339 }
1340
1341 static void
1342 panfrost_set_stream_output_targets(struct pipe_context *pctx,
1343 unsigned num_targets,
1344 struct pipe_stream_output_target **targets,
1345 const unsigned *offsets)
1346 {
1347 struct panfrost_context *ctx = pan_context(pctx);
1348 struct panfrost_streamout *so = &ctx->streamout;
1349
1350 assert(num_targets <= ARRAY_SIZE(so->targets));
1351
1352 for (unsigned i = 0; i < num_targets; i++) {
1353 if (offsets[i] != -1)
1354 so->offsets[i] = offsets[i];
1355
1356 pipe_so_target_reference(&so->targets[i], targets[i]);
1357 }
1358
1359 for (unsigned i = 0; i < so->num_targets; i++)
1360 pipe_so_target_reference(&so->targets[i], NULL);
1361
1362 so->num_targets = num_targets;
1363 }
1364
1365 struct pipe_context *
1366 panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
1367 {
1368 struct panfrost_context *ctx = rzalloc(screen, struct panfrost_context);
1369 struct pipe_context *gallium = (struct pipe_context *) ctx;
1370 struct panfrost_device *dev = pan_device(screen);
1371
1372 gallium->screen = screen;
1373
1374 gallium->destroy = panfrost_destroy;
1375
1376 gallium->set_framebuffer_state = panfrost_set_framebuffer_state;
1377
1378 gallium->flush = panfrost_flush;
1379 gallium->clear = panfrost_clear;
1380 gallium->draw_vbo = panfrost_draw_vbo;
1381 gallium->texture_barrier = panfrost_texture_barrier;
1382
1383 gallium->set_vertex_buffers = panfrost_set_vertex_buffers;
1384 gallium->set_constant_buffer = panfrost_set_constant_buffer;
1385 gallium->set_shader_buffers = panfrost_set_shader_buffers;
1386
1387 gallium->set_stencil_ref = panfrost_set_stencil_ref;
1388
1389 gallium->create_sampler_view = panfrost_create_sampler_view;
1390 gallium->set_sampler_views = panfrost_set_sampler_views;
1391 gallium->sampler_view_destroy = panfrost_sampler_view_destroy;
1392
1393 gallium->create_rasterizer_state = panfrost_create_rasterizer_state;
1394 gallium->bind_rasterizer_state = panfrost_bind_rasterizer_state;
1395 gallium->delete_rasterizer_state = panfrost_generic_cso_delete;
1396
1397 gallium->create_vertex_elements_state = panfrost_create_vertex_elements_state;
1398 gallium->bind_vertex_elements_state = panfrost_bind_vertex_elements_state;
1399 gallium->delete_vertex_elements_state = panfrost_generic_cso_delete;
1400
1401 gallium->create_fs_state = panfrost_create_fs_state;
1402 gallium->delete_fs_state = panfrost_delete_shader_state;
1403 gallium->bind_fs_state = panfrost_bind_fs_state;
1404
1405 gallium->create_vs_state = panfrost_create_vs_state;
1406 gallium->delete_vs_state = panfrost_delete_shader_state;
1407 gallium->bind_vs_state = panfrost_bind_vs_state;
1408
1409 gallium->create_sampler_state = panfrost_create_sampler_state;
1410 gallium->delete_sampler_state = panfrost_generic_cso_delete;
1411 gallium->bind_sampler_states = panfrost_bind_sampler_states;
1412
1413 gallium->create_depth_stencil_alpha_state = panfrost_create_depth_stencil_state;
1414 gallium->bind_depth_stencil_alpha_state = panfrost_bind_depth_stencil_state;
1415 gallium->delete_depth_stencil_alpha_state = panfrost_delete_depth_stencil_state;
1416
1417 gallium->set_sample_mask = panfrost_set_sample_mask;
1418 gallium->set_min_samples = panfrost_set_min_samples;
1419
1420 gallium->set_clip_state = panfrost_set_clip_state;
1421 gallium->set_viewport_states = panfrost_set_viewport_states;
1422 gallium->set_scissor_states = panfrost_set_scissor_states;
1423 gallium->set_polygon_stipple = panfrost_set_polygon_stipple;
1424 gallium->set_active_query_state = panfrost_set_active_query_state;
1425
1426 gallium->create_query = panfrost_create_query;
1427 gallium->destroy_query = panfrost_destroy_query;
1428 gallium->begin_query = panfrost_begin_query;
1429 gallium->end_query = panfrost_end_query;
1430 gallium->get_query_result = panfrost_get_query_result;
1431
1432 gallium->create_stream_output_target = panfrost_create_stream_output_target;
1433 gallium->stream_output_target_destroy = panfrost_stream_output_target_destroy;
1434 gallium->set_stream_output_targets = panfrost_set_stream_output_targets;
1435
1436 panfrost_resource_context_init(gallium);
1437 panfrost_blend_context_init(gallium);
1438 panfrost_compute_context_init(gallium);
1439
1440 gallium->stream_uploader = u_upload_create_default(gallium);
1441 gallium->const_uploader = gallium->stream_uploader;
1442
1443 ctx->state_uploader = u_upload_create(gallium, 4096,
1444 PIPE_BIND_CONSTANT_BUFFER, PIPE_USAGE_DYNAMIC, 0);
1445
1446 /* All of our GPUs support ES mode. Midgard supports additionally
1447 * QUADS/QUAD_STRIPS/POLYGON. Bifrost supports just QUADS. */
1448
1449 ctx->draw_modes = (1 << (PIPE_PRIM_QUADS + 1)) - 1;
1450
1451 if (!(dev->quirks & IS_BIFROST)) {
1452 ctx->draw_modes |= (1 << PIPE_PRIM_QUAD_STRIP);
1453 ctx->draw_modes |= (1 << PIPE_PRIM_POLYGON);
1454 }
1455
1456 ctx->primconvert = util_primconvert_create(gallium, ctx->draw_modes);
1457
1458 ctx->blitter = util_blitter_create(gallium);
1459 ctx->blitter_wallpaper = util_blitter_create(gallium);
1460
1461 assert(ctx->blitter);
1462 assert(ctx->blitter_wallpaper);
1463
1464 /* Prepare for render! */
1465
1466 panfrost_batch_init(ctx);
1467
1468 if (!(dev->quirks & IS_BIFROST)) {
1469 for (unsigned c = 0; c < PIPE_MAX_COLOR_BUFS; ++c)
1470 ctx->blit_blend.rt[c].shaders = _mesa_hash_table_u64_create(ctx);
1471 }
1472
1473 /* By default mask everything on */
1474 ctx->sample_mask = ~0;
1475 ctx->active_queries = true;
1476
1477 return gallium;
1478 }