2 * © Copyright 2018 Alyssa Rosenzweig
3 * Copyright © 2014-2017 Broadcom
4 * Copyright (C) 2017 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #include "pan_context.h"
32 #include "pan_minmax_cache.h"
33 #include "panfrost-quirks.h"
35 #include "util/macros.h"
36 #include "util/format/u_format.h"
37 #include "util/u_inlines.h"
38 #include "util/u_upload_mgr.h"
39 #include "util/u_memory.h"
40 #include "util/u_vbuf.h"
41 #include "util/half_float.h"
42 #include "util/u_helpers.h"
43 #include "util/format/u_format.h"
44 #include "util/u_prim.h"
45 #include "util/u_prim_restart.h"
46 #include "indices/u_primconvert.h"
47 #include "tgsi/tgsi_parse.h"
48 #include "tgsi/tgsi_from_mesa.h"
49 #include "util/u_math.h"
51 #include "pan_screen.h"
52 #include "pan_blending.h"
53 #include "pan_blend_shaders.h"
54 #include "pan_cmdstream.h"
57 #include "util/pan_lower_framebuffer.h"
59 struct midgard_tiler_descriptor
60 panfrost_emit_midg_tiler(struct panfrost_batch
*batch
, unsigned vertex_count
)
62 struct panfrost_device
*device
= pan_device(batch
->ctx
->base
.screen
);
63 bool hierarchy
= !(device
->quirks
& MIDGARD_NO_HIER_TILING
);
64 struct midgard_tiler_descriptor t
= {0};
65 unsigned height
= batch
->key
.height
;
66 unsigned width
= batch
->key
.width
;
69 panfrost_choose_hierarchy_mask(width
, height
, vertex_count
, hierarchy
);
71 /* Compute the polygon header size and use that to offset the body */
73 unsigned header_size
= panfrost_tiler_header_size(
74 width
, height
, t
.hierarchy_mask
, hierarchy
);
76 t
.polygon_list_size
= panfrost_tiler_full_size(
77 width
, height
, t
.hierarchy_mask
, hierarchy
);
80 t
.polygon_list
= panfrost_batch_get_polygon_list(batch
,
85 t
.heap_start
= device
->tiler_heap
->gpu
;
86 t
.heap_end
= device
->tiler_heap
->gpu
+ device
->tiler_heap
->size
;
88 struct panfrost_bo
*tiler_dummy
;
90 tiler_dummy
= panfrost_batch_get_tiler_dummy(batch
);
91 header_size
= MALI_TILER_MINIMUM_HEADER_SIZE
;
93 /* The tiler is disabled, so don't allow the tiler heap */
94 t
.heap_start
= tiler_dummy
->gpu
;
95 t
.heap_end
= t
.heap_start
;
97 /* Use a dummy polygon list */
98 t
.polygon_list
= tiler_dummy
->gpu
;
100 /* Disable the tiler */
102 t
.hierarchy_mask
|= MALI_TILER_DISABLED
;
104 t
.hierarchy_mask
= MALI_TILER_USER
;
105 t
.polygon_list_size
= MALI_TILER_MINIMUM_HEADER_SIZE
+ 4;
107 /* We don't have a WRITE_VALUE job, so write the polygon list manually */
108 uint32_t *polygon_list_body
= (uint32_t *) (tiler_dummy
->cpu
+ header_size
);
109 polygon_list_body
[0] = 0xa0000000; /* TODO: Just that? */
113 t
.polygon_list_body
=
114 t
.polygon_list
+ header_size
;
121 struct pipe_context
*pipe
,
123 const struct pipe_scissor_state
*scissor_state
,
124 const union pipe_color_union
*color
,
125 double depth
, unsigned stencil
)
127 struct panfrost_context
*ctx
= pan_context(pipe
);
129 /* TODO: panfrost_get_fresh_batch_for_fbo() instantiates a new batch if
130 * the existing batch targeting this FBO has draws. We could probably
131 * avoid that by replacing plain clears by quad-draws with a specific
132 * color/depth/stencil value, thus avoiding the generation of extra
135 struct panfrost_batch
*batch
= panfrost_get_fresh_batch_for_fbo(ctx
);
136 panfrost_batch_clear(batch
, buffers
, color
, depth
, stencil
);
140 panfrost_writes_point_size(struct panfrost_context
*ctx
)
142 assert(ctx
->shader
[PIPE_SHADER_VERTEX
]);
143 struct panfrost_shader_state
*vs
= panfrost_get_shader_state(ctx
, PIPE_SHADER_VERTEX
);
145 return vs
->writes_point_size
&& ctx
->active_prim
== PIPE_PRIM_POINTS
;
148 /* The entire frame is in memory -- send it off to the kernel! */
152 struct pipe_context
*pipe
,
153 struct pipe_fence_handle
**fence
,
156 struct panfrost_context
*ctx
= pan_context(pipe
);
157 struct panfrost_device
*dev
= pan_device(pipe
->screen
);
158 uint32_t syncobj
= 0;
161 drmSyncobjCreate(dev
->fd
, 0, &syncobj
);
163 /* Submit all pending jobs */
164 panfrost_flush_all_batches(ctx
, syncobj
);
167 struct panfrost_fence
*f
= panfrost_fence_create(ctx
, syncobj
);
168 pipe
->screen
->fence_reference(pipe
->screen
, fence
, NULL
);
169 *fence
= (struct pipe_fence_handle
*)f
;
172 if (dev
->debug
& PAN_DBG_TRACE
)
173 pandecode_next_frame();
177 panfrost_texture_barrier(struct pipe_context
*pipe
, unsigned flags
)
179 struct panfrost_context
*ctx
= pan_context(pipe
);
180 panfrost_flush_all_batches(ctx
, 0);
183 #define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_DRAW_MODE_##c;
186 g2m_draw_mode(enum pipe_prim_type mode
)
191 DEFINE_CASE(LINE_LOOP
);
192 DEFINE_CASE(LINE_STRIP
);
193 DEFINE_CASE(TRIANGLES
);
194 DEFINE_CASE(TRIANGLE_STRIP
);
195 DEFINE_CASE(TRIANGLE_FAN
);
197 DEFINE_CASE(QUAD_STRIP
);
198 DEFINE_CASE(POLYGON
);
201 unreachable("Invalid draw mode");
208 panfrost_scissor_culls_everything(struct panfrost_context
*ctx
)
210 const struct pipe_scissor_state
*ss
= &ctx
->scissor
;
212 /* Check if we're scissoring at all */
214 if (!ctx
->rasterizer
->base
.scissor
)
217 return (ss
->minx
== ss
->maxx
) || (ss
->miny
== ss
->maxy
);
220 /* Count generated primitives (when there is no geom/tess shaders) for
221 * transform feedback */
224 panfrost_statistics_record(
225 struct panfrost_context
*ctx
,
226 const struct pipe_draw_info
*info
)
228 if (!ctx
->active_queries
)
231 uint32_t prims
= u_prims_for_vertices(info
->mode
, info
->count
);
232 ctx
->prims_generated
+= prims
;
234 if (!ctx
->streamout
.num_targets
)
237 ctx
->tf_prims_generated
+= prims
;
241 panfrost_update_streamout_offsets(struct panfrost_context
*ctx
)
243 for (unsigned i
= 0; i
< ctx
->streamout
.num_targets
; ++i
) {
246 count
= u_stream_outputs_for_vertices(ctx
->active_prim
,
248 ctx
->streamout
.offsets
[i
] += count
;
254 struct pipe_context
*pipe
,
255 const struct pipe_draw_info
*info
)
257 struct panfrost_context
*ctx
= pan_context(pipe
);
259 /* First of all, check the scissor to see if anything is drawn at all.
260 * If it's not, we drop the draw (mostly a conformance issue;
261 * well-behaved apps shouldn't hit this) */
263 if (panfrost_scissor_culls_everything(ctx
))
266 int mode
= info
->mode
;
268 /* Fallback unsupported restart index */
269 unsigned primitive_index
= (1 << (info
->index_size
* 8)) - 1;
271 if (info
->primitive_restart
&& info
->index_size
272 && info
->restart_index
!= primitive_index
) {
273 util_draw_vbo_without_prim_restart(pipe
, info
);
277 /* Fallback for unsupported modes */
279 assert(ctx
->rasterizer
!= NULL
);
281 if (!(ctx
->draw_modes
& (1 << mode
))) {
282 if (info
->count
< 4) {
283 /* Degenerate case? */
287 util_primconvert_save_rasterizer_state(ctx
->primconvert
, &ctx
->rasterizer
->base
);
288 util_primconvert_draw_vbo(ctx
->primconvert
, info
);
292 /* Now that we have a guaranteed terminating path, find the job. */
294 struct panfrost_batch
*batch
= panfrost_get_batch_for_fbo(ctx
);
295 panfrost_batch_set_requirements(batch
);
297 /* Take into account a negative bias */
298 ctx
->vertex_count
= info
->count
+ abs(info
->index_bias
);
299 ctx
->instance_count
= info
->instance_count
;
300 ctx
->active_prim
= info
->mode
;
302 struct mali_vertex_tiler_prefix vertex_prefix
, tiler_prefix
;
303 struct mali_vertex_tiler_postfix vertex_postfix
, tiler_postfix
;
304 union midgard_primitive_size primitive_size
;
305 unsigned vertex_count
;
307 panfrost_vt_init(ctx
, PIPE_SHADER_VERTEX
, &vertex_prefix
, &vertex_postfix
);
308 panfrost_vt_init(ctx
, PIPE_SHADER_FRAGMENT
, &tiler_prefix
, &tiler_postfix
);
310 panfrost_vt_set_draw_info(ctx
, info
, g2m_draw_mode(mode
),
311 &vertex_postfix
, &tiler_prefix
,
312 &tiler_postfix
, &vertex_count
,
315 panfrost_statistics_record(ctx
, info
);
317 panfrost_pack_work_groups_fused(&vertex_prefix
, &tiler_prefix
,
318 1, vertex_count
, info
->instance_count
,
321 /* Emit all sort of descriptors. */
322 panfrost_emit_vertex_data(batch
, &vertex_postfix
);
323 panfrost_emit_varying_descriptor(batch
,
326 &vertex_postfix
, &tiler_postfix
,
328 panfrost_emit_shader_meta(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
329 panfrost_emit_shader_meta(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
330 panfrost_emit_sampler_descriptors(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
331 panfrost_emit_sampler_descriptors(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
332 panfrost_emit_texture_descriptors(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
333 panfrost_emit_texture_descriptors(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
334 panfrost_emit_const_buf(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
335 panfrost_emit_const_buf(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
336 panfrost_emit_viewport(batch
, &tiler_postfix
);
338 panfrost_vt_update_primitive_size(ctx
, &tiler_prefix
, &primitive_size
);
340 /* Fire off the draw itself */
341 panfrost_emit_vertex_tiler_jobs(batch
, &vertex_prefix
, &vertex_postfix
,
342 &tiler_prefix
, &tiler_postfix
,
345 /* Adjust the batch stack size based on the new shader stack sizes. */
346 panfrost_batch_adjust_stack_size(batch
);
348 /* Increment transform feedback offsets */
349 panfrost_update_streamout_offsets(ctx
);
355 panfrost_generic_cso_delete(struct pipe_context
*pctx
, void *hwcso
)
361 panfrost_create_rasterizer_state(
362 struct pipe_context
*pctx
,
363 const struct pipe_rasterizer_state
*cso
)
365 struct panfrost_rasterizer
*so
= CALLOC_STRUCT(panfrost_rasterizer
);
369 /* Gauranteed with the core GL call, so don't expose ARB_polygon_offset */
370 assert(cso
->offset_clamp
== 0.0);
376 panfrost_bind_rasterizer_state(
377 struct pipe_context
*pctx
,
380 struct panfrost_context
*ctx
= pan_context(pctx
);
382 ctx
->rasterizer
= hwcso
;
387 /* Point sprites are emulated */
389 struct panfrost_shader_state
*variant
= panfrost_get_shader_state(ctx
, PIPE_SHADER_FRAGMENT
);
391 if (ctx
->rasterizer
->base
.sprite_coord_enable
|| (variant
&& variant
->point_sprite_mask
))
392 ctx
->base
.bind_fs_state(&ctx
->base
, ctx
->shader
[PIPE_SHADER_FRAGMENT
]);
396 panfrost_create_vertex_elements_state(
397 struct pipe_context
*pctx
,
398 unsigned num_elements
,
399 const struct pipe_vertex_element
*elements
)
401 struct panfrost_vertex_state
*so
= CALLOC_STRUCT(panfrost_vertex_state
);
402 struct panfrost_device
*dev
= pan_device(pctx
->screen
);
404 so
->num_elements
= num_elements
;
405 memcpy(so
->pipe
, elements
, sizeof(*elements
) * num_elements
);
407 for (int i
= 0; i
< num_elements
; ++i
) {
408 enum pipe_format fmt
= elements
[i
].src_format
;
409 const struct util_format_description
*desc
= util_format_description(fmt
);
410 unsigned swizzle
= 0;
411 if (dev
->quirks
& HAS_SWIZZLES
)
412 swizzle
= panfrost_translate_swizzle_4(desc
->swizzle
);
414 swizzle
= panfrost_bifrost_swizzle(desc
->nr_channels
);
416 enum mali_format hw_format
= panfrost_pipe_format_table
[desc
->format
].hw
;
417 so
->formats
[i
] = (hw_format
<< 12) | swizzle
;
421 /* Let's also prepare vertex builtins */
422 if (dev
->quirks
& HAS_SWIZZLES
)
423 so
->formats
[PAN_VERTEX_ID
] = (MALI_R32UI
<< 12) | panfrost_get_default_swizzle(1);
425 so
->formats
[PAN_VERTEX_ID
] = (MALI_R32UI
<< 12) | panfrost_bifrost_swizzle(1);
427 if (dev
->quirks
& HAS_SWIZZLES
)
428 so
->formats
[PAN_INSTANCE_ID
] = (MALI_R32UI
<< 12) | panfrost_get_default_swizzle(1);
430 so
->formats
[PAN_INSTANCE_ID
] = (MALI_R32UI
<< 12) | panfrost_bifrost_swizzle(1);
436 panfrost_bind_vertex_elements_state(
437 struct pipe_context
*pctx
,
440 struct panfrost_context
*ctx
= pan_context(pctx
);
445 panfrost_create_shader_state(
446 struct pipe_context
*pctx
,
447 const struct pipe_shader_state
*cso
,
448 enum pipe_shader_type stage
)
450 struct panfrost_shader_variants
*so
= CALLOC_STRUCT(panfrost_shader_variants
);
451 struct panfrost_device
*dev
= pan_device(pctx
->screen
);
454 /* Token deep copy to prevent memory corruption */
456 if (cso
->type
== PIPE_SHADER_IR_TGSI
)
457 so
->base
.tokens
= tgsi_dup_tokens(so
->base
.tokens
);
459 /* Precompile for shader-db if we need to */
460 if (unlikely((dev
->debug
& PAN_DBG_PRECOMPILE
) && cso
->type
== PIPE_SHADER_IR_NIR
)) {
461 struct panfrost_context
*ctx
= pan_context(pctx
);
463 struct panfrost_shader_state state
= { 0 };
464 uint64_t outputs_written
;
466 panfrost_shader_compile(ctx
, PIPE_SHADER_IR_NIR
,
468 tgsi_processor_to_shader_stage(stage
),
469 &state
, &outputs_written
);
476 panfrost_delete_shader_state(
477 struct pipe_context
*pctx
,
480 struct panfrost_shader_variants
*cso
= (struct panfrost_shader_variants
*) so
;
482 if (cso
->base
.type
== PIPE_SHADER_IR_TGSI
) {
483 /* TODO: leaks TGSI tokens! */
486 for (unsigned i
= 0; i
< cso
->variant_count
; ++i
) {
487 struct panfrost_shader_state
*shader_state
= &cso
->variants
[i
];
488 panfrost_bo_unreference(shader_state
->bo
);
489 shader_state
->bo
= NULL
;
497 panfrost_create_sampler_state(
498 struct pipe_context
*pctx
,
499 const struct pipe_sampler_state
*cso
)
501 struct panfrost_sampler_state
*so
= CALLOC_STRUCT(panfrost_sampler_state
);
502 struct panfrost_device
*device
= pan_device(pctx
->screen
);
506 if (device
->quirks
& IS_BIFROST
)
507 panfrost_sampler_desc_init_bifrost(cso
, (struct mali_bifrost_sampler_packed
*) &so
->hw
);
509 panfrost_sampler_desc_init(cso
, &so
->hw
);
515 panfrost_bind_sampler_states(
516 struct pipe_context
*pctx
,
517 enum pipe_shader_type shader
,
518 unsigned start_slot
, unsigned num_sampler
,
521 assert(start_slot
== 0);
523 struct panfrost_context
*ctx
= pan_context(pctx
);
525 /* XXX: Should upload, not just copy? */
526 ctx
->sampler_count
[shader
] = num_sampler
;
527 memcpy(ctx
->samplers
[shader
], sampler
, num_sampler
* sizeof (void *));
531 panfrost_variant_matches(
532 struct panfrost_context
*ctx
,
533 struct panfrost_shader_state
*variant
,
534 enum pipe_shader_type type
)
536 struct panfrost_device
*dev
= pan_device(ctx
->base
.screen
);
537 struct pipe_rasterizer_state
*rasterizer
= &ctx
->rasterizer
->base
;
539 bool is_fragment
= (type
== PIPE_SHADER_FRAGMENT
);
541 if (variant
->outputs_read
) {
542 struct pipe_framebuffer_state
*fb
= &ctx
->pipe_framebuffer
;
545 BITSET_FOREACH_SET(i
, &variant
->outputs_read
, 8) {
546 enum pipe_format fmt
= PIPE_FORMAT_R8G8B8A8_UNORM
;
548 if ((fb
->nr_cbufs
> i
) && fb
->cbufs
[i
])
549 fmt
= fb
->cbufs
[i
]->format
;
551 const struct util_format_description
*desc
=
552 util_format_description(fmt
);
554 if (pan_format_class_load(desc
, dev
->quirks
) == PAN_FORMAT_NATIVE
)
555 fmt
= PIPE_FORMAT_NONE
;
557 if (variant
->rt_formats
[i
] != fmt
)
562 /* Point sprites TODO on bifrost, always pass */
563 if (is_fragment
&& rasterizer
&& (rasterizer
->sprite_coord_enable
|
564 variant
->point_sprite_mask
)
565 && !(dev
->quirks
& IS_BIFROST
)) {
566 /* Ensure the same varyings are turned to point sprites */
567 if (rasterizer
->sprite_coord_enable
!= variant
->point_sprite_mask
)
570 /* Ensure the orientation is correct */
572 rasterizer
->sprite_coord_mode
==
573 PIPE_SPRITE_COORD_UPPER_LEFT
;
575 if (variant
->point_sprite_upper_left
!= upper_left
)
579 /* Otherwise, we're good to go */
584 * Fix an uncompiled shader's stream output info, and produce a bitmask
585 * of which VARYING_SLOT_* are captured for stream output.
587 * Core Gallium stores output->register_index as a "slot" number, where
588 * slots are assigned consecutively to all outputs in info->outputs_written.
589 * This naive packing of outputs doesn't work for us - we too have slots,
590 * but the layout is defined by the VUE map, which we won't have until we
591 * compile a specific shader variant. So, we remap these and simply store
592 * VARYING_SLOT_* in our copy's output->register_index fields.
594 * We then produce a bitmask of outputs which are used for SO.
596 * Implementation from iris.
600 update_so_info(struct pipe_stream_output_info
*so_info
,
601 uint64_t outputs_written
)
603 uint64_t so_outputs
= 0;
604 uint8_t reverse_map
[64] = {0};
607 while (outputs_written
)
608 reverse_map
[slot
++] = u_bit_scan64(&outputs_written
);
610 for (unsigned i
= 0; i
< so_info
->num_outputs
; i
++) {
611 struct pipe_stream_output
*output
= &so_info
->output
[i
];
613 /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
614 output
->register_index
= reverse_map
[output
->register_index
];
616 so_outputs
|= 1ull << output
->register_index
;
623 panfrost_bind_shader_state(
624 struct pipe_context
*pctx
,
626 enum pipe_shader_type type
)
628 struct panfrost_context
*ctx
= pan_context(pctx
);
629 struct panfrost_device
*dev
= pan_device(ctx
->base
.screen
);
630 ctx
->shader
[type
] = hwcso
;
634 /* Match the appropriate variant */
637 struct panfrost_shader_variants
*variants
= (struct panfrost_shader_variants
*) hwcso
;
639 for (unsigned i
= 0; i
< variants
->variant_count
; ++i
) {
640 if (panfrost_variant_matches(ctx
, &variants
->variants
[i
], type
)) {
647 /* No variant matched, so create a new one */
648 variant
= variants
->variant_count
++;
650 if (variants
->variant_count
> variants
->variant_space
) {
651 unsigned old_space
= variants
->variant_space
;
653 variants
->variant_space
*= 2;
654 if (variants
->variant_space
== 0)
655 variants
->variant_space
= 1;
657 /* Arbitrary limit to stop runaway programs from
658 * creating an unbounded number of shader variants. */
659 assert(variants
->variant_space
< 1024);
661 unsigned msize
= sizeof(struct panfrost_shader_state
);
662 variants
->variants
= realloc(variants
->variants
,
663 variants
->variant_space
* msize
);
665 memset(&variants
->variants
[old_space
], 0,
666 (variants
->variant_space
- old_space
) * msize
);
669 struct panfrost_shader_state
*v
=
670 &variants
->variants
[variant
];
672 if (type
== PIPE_SHADER_FRAGMENT
) {
673 struct pipe_framebuffer_state
*fb
= &ctx
->pipe_framebuffer
;
674 for (unsigned i
= 0; i
< fb
->nr_cbufs
; ++i
) {
675 enum pipe_format fmt
= PIPE_FORMAT_R8G8B8A8_UNORM
;
677 if ((fb
->nr_cbufs
> i
) && fb
->cbufs
[i
])
678 fmt
= fb
->cbufs
[i
]->format
;
680 const struct util_format_description
*desc
=
681 util_format_description(fmt
);
683 if (pan_format_class_load(desc
, dev
->quirks
) == PAN_FORMAT_NATIVE
)
684 fmt
= PIPE_FORMAT_NONE
;
686 v
->rt_formats
[i
] = fmt
;
689 /* Point sprites are TODO on Bifrost */
690 if (ctx
->rasterizer
&& !(dev
->quirks
& IS_BIFROST
)) {
691 v
->point_sprite_mask
= ctx
->rasterizer
->base
.sprite_coord_enable
;
692 v
->point_sprite_upper_left
=
693 ctx
->rasterizer
->base
.sprite_coord_mode
==
694 PIPE_SPRITE_COORD_UPPER_LEFT
;
699 /* Select this variant */
700 variants
->active_variant
= variant
;
702 struct panfrost_shader_state
*shader_state
= &variants
->variants
[variant
];
703 assert(panfrost_variant_matches(ctx
, shader_state
, type
));
705 /* We finally have a variant, so compile it */
707 if (!shader_state
->compiled
) {
708 uint64_t outputs_written
= 0;
710 panfrost_shader_compile(ctx
, variants
->base
.type
,
711 variants
->base
.type
== PIPE_SHADER_IR_NIR
?
712 variants
->base
.ir
.nir
:
713 variants
->base
.tokens
,
714 tgsi_processor_to_shader_stage(type
),
718 shader_state
->compiled
= true;
720 /* Fixup the stream out information, since what Gallium returns
721 * normally is mildly insane */
723 shader_state
->stream_output
= variants
->base
.stream_output
;
724 shader_state
->so_mask
=
725 update_so_info(&shader_state
->stream_output
, outputs_written
);
730 panfrost_create_vs_state(struct pipe_context
*pctx
, const struct pipe_shader_state
*hwcso
)
732 return panfrost_create_shader_state(pctx
, hwcso
, PIPE_SHADER_VERTEX
);
736 panfrost_create_fs_state(struct pipe_context
*pctx
, const struct pipe_shader_state
*hwcso
)
738 return panfrost_create_shader_state(pctx
, hwcso
, PIPE_SHADER_FRAGMENT
);
742 panfrost_bind_vs_state(struct pipe_context
*pctx
, void *hwcso
)
744 panfrost_bind_shader_state(pctx
, hwcso
, PIPE_SHADER_VERTEX
);
748 panfrost_bind_fs_state(struct pipe_context
*pctx
, void *hwcso
)
750 panfrost_bind_shader_state(pctx
, hwcso
, PIPE_SHADER_FRAGMENT
);
754 panfrost_set_vertex_buffers(
755 struct pipe_context
*pctx
,
757 unsigned num_buffers
,
758 const struct pipe_vertex_buffer
*buffers
)
760 struct panfrost_context
*ctx
= pan_context(pctx
);
762 util_set_vertex_buffers_mask(ctx
->vertex_buffers
, &ctx
->vb_mask
, buffers
, start_slot
, num_buffers
);
766 panfrost_set_constant_buffer(
767 struct pipe_context
*pctx
,
768 enum pipe_shader_type shader
, uint index
,
769 const struct pipe_constant_buffer
*buf
)
771 struct panfrost_context
*ctx
= pan_context(pctx
);
772 struct panfrost_constant_buffer
*pbuf
= &ctx
->constant_buffer
[shader
];
774 util_copy_constant_buffer(&pbuf
->cb
[index
], buf
);
776 unsigned mask
= (1 << index
);
778 if (unlikely(!buf
)) {
779 pbuf
->enabled_mask
&= ~mask
;
780 pbuf
->dirty_mask
&= ~mask
;
784 pbuf
->enabled_mask
|= mask
;
785 pbuf
->dirty_mask
|= mask
;
789 panfrost_set_stencil_ref(
790 struct pipe_context
*pctx
,
791 const struct pipe_stencil_ref
*ref
)
793 struct panfrost_context
*ctx
= pan_context(pctx
);
794 ctx
->stencil_ref
= *ref
;
798 panfrost_create_sampler_view_bo(struct panfrost_sampler_view
*so
,
799 struct pipe_context
*pctx
,
800 struct pipe_resource
*texture
)
802 struct panfrost_device
*device
= pan_device(pctx
->screen
);
803 struct panfrost_resource
*prsrc
= (struct panfrost_resource
*)texture
;
804 enum pipe_format format
= so
->base
.format
;
807 /* Format to access the stencil portion of a Z32_S8 texture */
808 if (format
== PIPE_FORMAT_X32_S8X24_UINT
) {
809 assert(prsrc
->separate_stencil
);
810 texture
= &prsrc
->separate_stencil
->base
;
811 prsrc
= (struct panfrost_resource
*)texture
;
812 format
= texture
->format
;
815 const struct util_format_description
*desc
= util_format_description(format
);
817 bool fake_rgtc
= !panfrost_supports_compressed_format(device
, MALI_BC4_UNORM
);
819 if (desc
->layout
== UTIL_FORMAT_LAYOUT_RGTC
&& fake_rgtc
) {
821 format
= PIPE_FORMAT_R8G8B8A8_SNORM
;
823 format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
824 desc
= util_format_description(format
);
827 so
->texture_bo
= prsrc
->bo
->gpu
;
828 so
->modifier
= prsrc
->modifier
;
830 unsigned char user_swizzle
[4] = {
837 /* In the hardware, array_size refers specifically to array textures,
838 * whereas in Gallium, it also covers cubemaps */
840 unsigned array_size
= texture
->array_size
;
841 unsigned depth
= texture
->depth0
;
843 if (so
->base
.target
== PIPE_TEXTURE_CUBE
) {
844 /* TODO: Cubemap arrays */
845 assert(array_size
== 6);
849 /* MSAA only supported for 2D textures (and 2D texture arrays via an
850 * extension currently unimplemented */
852 if (so
->base
.target
== PIPE_TEXTURE_2D
) {
854 depth
= texture
->nr_samples
;
856 /* MSAA only supported for 2D textures */
857 assert(texture
->nr_samples
<= 1);
860 enum mali_texture_dimension type
=
861 panfrost_translate_texture_dimension(so
->base
.target
);
863 if (device
->quirks
& IS_BIFROST
) {
864 unsigned char composed_swizzle
[4];
865 util_format_compose_swizzles(desc
->swizzle
, user_swizzle
, composed_swizzle
);
867 unsigned size
= panfrost_estimate_texture_payload_size(
868 so
->base
.u
.tex
.first_level
,
869 so
->base
.u
.tex
.last_level
,
870 so
->base
.u
.tex
.first_layer
,
871 so
->base
.u
.tex
.last_layer
,
873 type
, prsrc
->modifier
);
875 so
->bo
= panfrost_bo_create(device
, size
, 0);
877 panfrost_new_texture_bifrost(
878 &so
->bifrost_descriptor
,
879 texture
->width0
, texture
->height0
,
882 type
, prsrc
->modifier
,
883 so
->base
.u
.tex
.first_level
,
884 so
->base
.u
.tex
.last_level
,
885 so
->base
.u
.tex
.first_layer
,
886 so
->base
.u
.tex
.last_layer
,
888 prsrc
->cubemap_stride
,
889 panfrost_translate_swizzle_4(composed_swizzle
),
894 unsigned size
= panfrost_estimate_texture_payload_size(
895 so
->base
.u
.tex
.first_level
,
896 so
->base
.u
.tex
.last_level
,
897 so
->base
.u
.tex
.first_layer
,
898 so
->base
.u
.tex
.last_layer
,
900 type
, prsrc
->modifier
);
901 size
+= MALI_MIDGARD_TEXTURE_LENGTH
;
903 so
->bo
= panfrost_bo_create(device
, size
, 0);
905 panfrost_new_texture(
907 texture
->width0
, texture
->height0
,
910 type
, prsrc
->modifier
,
911 so
->base
.u
.tex
.first_level
,
912 so
->base
.u
.tex
.last_level
,
913 so
->base
.u
.tex
.first_layer
,
914 so
->base
.u
.tex
.last_layer
,
916 prsrc
->cubemap_stride
,
917 panfrost_translate_swizzle_4(user_swizzle
),
923 static struct pipe_sampler_view
*
924 panfrost_create_sampler_view(
925 struct pipe_context
*pctx
,
926 struct pipe_resource
*texture
,
927 const struct pipe_sampler_view
*template)
929 struct panfrost_sampler_view
*so
= rzalloc(pctx
, struct panfrost_sampler_view
);
931 pipe_reference(NULL
, &texture
->reference
);
933 so
->base
= *template;
934 so
->base
.texture
= texture
;
935 so
->base
.reference
.count
= 1;
936 so
->base
.context
= pctx
;
938 panfrost_create_sampler_view_bo(so
, pctx
, texture
);
940 return (struct pipe_sampler_view
*) so
;
944 panfrost_set_sampler_views(
945 struct pipe_context
*pctx
,
946 enum pipe_shader_type shader
,
947 unsigned start_slot
, unsigned num_views
,
948 struct pipe_sampler_view
**views
)
950 struct panfrost_context
*ctx
= pan_context(pctx
);
954 assert(start_slot
== 0);
956 for (i
= 0; i
< num_views
; ++i
) {
959 pipe_sampler_view_reference((struct pipe_sampler_view
**)&ctx
->sampler_views
[shader
][i
],
963 for (; i
< ctx
->sampler_view_count
[shader
]; i
++) {
964 pipe_sampler_view_reference((struct pipe_sampler_view
**)&ctx
->sampler_views
[shader
][i
],
967 ctx
->sampler_view_count
[shader
] = new_nr
;
971 panfrost_sampler_view_destroy(
972 struct pipe_context
*pctx
,
973 struct pipe_sampler_view
*pview
)
975 struct panfrost_sampler_view
*view
= (struct panfrost_sampler_view
*) pview
;
977 pipe_resource_reference(&pview
->texture
, NULL
);
978 panfrost_bo_unreference(view
->bo
);
983 panfrost_set_shader_buffers(
984 struct pipe_context
*pctx
,
985 enum pipe_shader_type shader
,
986 unsigned start
, unsigned count
,
987 const struct pipe_shader_buffer
*buffers
,
988 unsigned writable_bitmask
)
990 struct panfrost_context
*ctx
= pan_context(pctx
);
992 util_set_shader_buffers_mask(ctx
->ssbo
[shader
], &ctx
->ssbo_mask
[shader
],
993 buffers
, start
, count
);
997 panfrost_set_framebuffer_state(struct pipe_context
*pctx
,
998 const struct pipe_framebuffer_state
*fb
)
1000 struct panfrost_context
*ctx
= pan_context(pctx
);
1002 util_copy_framebuffer_state(&ctx
->pipe_framebuffer
, fb
);
1005 /* We may need to generate a new variant if the fragment shader is
1006 * keyed to the framebuffer format (due to EXT_framebuffer_fetch) */
1007 struct panfrost_shader_variants
*fs
= ctx
->shader
[PIPE_SHADER_FRAGMENT
];
1009 if (fs
&& fs
->variant_count
&& fs
->variants
[fs
->active_variant
].outputs_read
)
1010 ctx
->base
.bind_fs_state(&ctx
->base
, fs
);
1013 static inline unsigned
1014 pan_pipe_to_stencil_op(enum pipe_stencil_op in
)
1017 case PIPE_STENCIL_OP_KEEP
: return MALI_STENCIL_OP_KEEP
;
1018 case PIPE_STENCIL_OP_ZERO
: return MALI_STENCIL_OP_ZERO
;
1019 case PIPE_STENCIL_OP_REPLACE
: return MALI_STENCIL_OP_REPLACE
;
1020 case PIPE_STENCIL_OP_INCR
: return MALI_STENCIL_OP_INCR_SAT
;
1021 case PIPE_STENCIL_OP_DECR
: return MALI_STENCIL_OP_DECR_SAT
;
1022 case PIPE_STENCIL_OP_INCR_WRAP
: return MALI_STENCIL_OP_INCR_WRAP
;
1023 case PIPE_STENCIL_OP_DECR_WRAP
: return MALI_STENCIL_OP_DECR_WRAP
;
1024 case PIPE_STENCIL_OP_INVERT
: return MALI_STENCIL_OP_INVERT
;
1025 default: unreachable("Invalid stencil op");
1030 pan_pipe_to_stencil(const struct pipe_stencil_state
*in
, void *out
)
1032 pan_pack(out
, STENCIL
, cfg
) {
1033 cfg
.mask
= in
->valuemask
;
1034 cfg
.compare_function
= panfrost_translate_compare_func(in
->func
);
1035 cfg
.stencil_fail
= pan_pipe_to_stencil_op(in
->fail_op
);
1036 cfg
.depth_fail
= pan_pipe_to_stencil_op(in
->zfail_op
);
1037 cfg
.depth_pass
= pan_pipe_to_stencil_op(in
->zpass_op
);
1042 panfrost_create_depth_stencil_state(struct pipe_context
*pipe
,
1043 const struct pipe_depth_stencil_alpha_state
*zsa
)
1045 struct panfrost_zsa_state
*so
= CALLOC_STRUCT(panfrost_zsa_state
);
1048 pan_pipe_to_stencil(&zsa
->stencil
[0], &so
->stencil_front
);
1049 pan_pipe_to_stencil(&zsa
->stencil
[1], &so
->stencil_back
);
1051 so
->stencil_mask_front
= zsa
->stencil
[0].writemask
;
1053 if (zsa
->stencil
[1].enabled
)
1054 so
->stencil_mask_back
= zsa
->stencil
[1].writemask
;
1056 so
->stencil_mask_back
= so
->stencil_mask_front
;
1058 /* Alpha lowered by frontend */
1059 assert(!zsa
->alpha
.enabled
);
1061 /* TODO: Bounds test should be easy */
1062 assert(!zsa
->depth
.bounds_test
);
1068 panfrost_bind_depth_stencil_state(struct pipe_context
*pipe
,
1071 struct panfrost_context
*ctx
= pan_context(pipe
);
1072 struct panfrost_zsa_state
*zsa
= cso
;
1073 ctx
->depth_stencil
= zsa
;
1077 panfrost_delete_depth_stencil_state(struct pipe_context
*pipe
, void *depth
)
1083 panfrost_set_sample_mask(struct pipe_context
*pipe
,
1084 unsigned sample_mask
)
1086 struct panfrost_context
*ctx
= pan_context(pipe
);
1087 ctx
->sample_mask
= sample_mask
;
1091 panfrost_set_min_samples(struct pipe_context
*pipe
,
1092 unsigned min_samples
)
1094 struct panfrost_context
*ctx
= pan_context(pipe
);
1095 ctx
->min_samples
= min_samples
;
1100 panfrost_set_clip_state(struct pipe_context
*pipe
,
1101 const struct pipe_clip_state
*clip
)
1103 //struct panfrost_context *panfrost = pan_context(pipe);
1107 panfrost_set_viewport_states(struct pipe_context
*pipe
,
1108 unsigned start_slot
,
1109 unsigned num_viewports
,
1110 const struct pipe_viewport_state
*viewports
)
1112 struct panfrost_context
*ctx
= pan_context(pipe
);
1114 assert(start_slot
== 0);
1115 assert(num_viewports
== 1);
1117 ctx
->pipe_viewport
= *viewports
;
1121 panfrost_set_scissor_states(struct pipe_context
*pipe
,
1122 unsigned start_slot
,
1123 unsigned num_scissors
,
1124 const struct pipe_scissor_state
*scissors
)
1126 struct panfrost_context
*ctx
= pan_context(pipe
);
1128 assert(start_slot
== 0);
1129 assert(num_scissors
== 1);
1131 ctx
->scissor
= *scissors
;
1135 panfrost_set_polygon_stipple(struct pipe_context
*pipe
,
1136 const struct pipe_poly_stipple
*stipple
)
1138 //struct panfrost_context *panfrost = pan_context(pipe);
1142 panfrost_set_active_query_state(struct pipe_context
*pipe
,
1145 struct panfrost_context
*ctx
= pan_context(pipe
);
1146 ctx
->active_queries
= enable
;
1150 panfrost_destroy(struct pipe_context
*pipe
)
1152 struct panfrost_context
*panfrost
= pan_context(pipe
);
1154 if (panfrost
->blitter
)
1155 util_blitter_destroy(panfrost
->blitter
);
1157 if (panfrost
->blitter_wallpaper
)
1158 util_blitter_destroy(panfrost
->blitter_wallpaper
);
1160 util_unreference_framebuffer_state(&panfrost
->pipe_framebuffer
);
1161 u_upload_destroy(pipe
->stream_uploader
);
1162 u_upload_destroy(panfrost
->state_uploader
);
1167 static struct pipe_query
*
1168 panfrost_create_query(struct pipe_context
*pipe
,
1172 struct panfrost_query
*q
= rzalloc(pipe
, struct panfrost_query
);
1177 return (struct pipe_query
*) q
;
1181 panfrost_destroy_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1183 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1186 panfrost_bo_unreference(query
->bo
);
1194 panfrost_begin_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1196 struct panfrost_context
*ctx
= pan_context(pipe
);
1197 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1199 switch (query
->type
) {
1200 case PIPE_QUERY_OCCLUSION_COUNTER
:
1201 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1202 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1203 /* Allocate a bo for the query results to be stored */
1205 query
->bo
= panfrost_bo_create(
1206 pan_device(ctx
->base
.screen
),
1207 sizeof(unsigned), 0);
1210 unsigned *result
= (unsigned *)query
->bo
->cpu
;
1211 *result
= 0; /* Default to 0 if nothing at all drawn. */
1212 ctx
->occlusion_query
= query
;
1215 /* Geometry statistics are computed in the driver. XXX: geom/tess
1218 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1219 query
->start
= ctx
->prims_generated
;
1221 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1222 query
->start
= ctx
->tf_prims_generated
;
1226 /* TODO: timestamp queries, etc? */
1234 panfrost_end_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1236 struct panfrost_context
*ctx
= pan_context(pipe
);
1237 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1239 switch (query
->type
) {
1240 case PIPE_QUERY_OCCLUSION_COUNTER
:
1241 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1242 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1243 ctx
->occlusion_query
= NULL
;
1245 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1246 query
->end
= ctx
->prims_generated
;
1248 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1249 query
->end
= ctx
->tf_prims_generated
;
1257 panfrost_get_query_result(struct pipe_context
*pipe
,
1258 struct pipe_query
*q
,
1260 union pipe_query_result
*vresult
)
1262 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1263 struct panfrost_context
*ctx
= pan_context(pipe
);
1266 switch (query
->type
) {
1267 case PIPE_QUERY_OCCLUSION_COUNTER
:
1268 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1269 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1270 panfrost_flush_batches_accessing_bo(ctx
, query
->bo
, false);
1271 panfrost_bo_wait(query
->bo
, INT64_MAX
, false);
1273 /* Read back the query results */
1274 unsigned *result
= (unsigned *) query
->bo
->cpu
;
1275 unsigned passed
= *result
;
1277 if (query
->type
== PIPE_QUERY_OCCLUSION_COUNTER
) {
1278 vresult
->u64
= passed
;
1280 vresult
->b
= !!passed
;
1285 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1286 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1287 panfrost_flush_all_batches(ctx
, 0);
1288 vresult
->u64
= query
->end
- query
->start
;
1292 /* TODO: more queries */
1299 static struct pipe_stream_output_target
*
1300 panfrost_create_stream_output_target(struct pipe_context
*pctx
,
1301 struct pipe_resource
*prsc
,
1302 unsigned buffer_offset
,
1303 unsigned buffer_size
)
1305 struct pipe_stream_output_target
*target
;
1307 target
= rzalloc(pctx
, struct pipe_stream_output_target
);
1312 pipe_reference_init(&target
->reference
, 1);
1313 pipe_resource_reference(&target
->buffer
, prsc
);
1315 target
->context
= pctx
;
1316 target
->buffer_offset
= buffer_offset
;
1317 target
->buffer_size
= buffer_size
;
1323 panfrost_stream_output_target_destroy(struct pipe_context
*pctx
,
1324 struct pipe_stream_output_target
*target
)
1326 pipe_resource_reference(&target
->buffer
, NULL
);
1327 ralloc_free(target
);
1331 panfrost_set_stream_output_targets(struct pipe_context
*pctx
,
1332 unsigned num_targets
,
1333 struct pipe_stream_output_target
**targets
,
1334 const unsigned *offsets
)
1336 struct panfrost_context
*ctx
= pan_context(pctx
);
1337 struct panfrost_streamout
*so
= &ctx
->streamout
;
1339 assert(num_targets
<= ARRAY_SIZE(so
->targets
));
1341 for (unsigned i
= 0; i
< num_targets
; i
++) {
1342 if (offsets
[i
] != -1)
1343 so
->offsets
[i
] = offsets
[i
];
1345 pipe_so_target_reference(&so
->targets
[i
], targets
[i
]);
1348 for (unsigned i
= 0; i
< so
->num_targets
; i
++)
1349 pipe_so_target_reference(&so
->targets
[i
], NULL
);
1351 so
->num_targets
= num_targets
;
1354 struct pipe_context
*
1355 panfrost_create_context(struct pipe_screen
*screen
, void *priv
, unsigned flags
)
1357 struct panfrost_context
*ctx
= rzalloc(screen
, struct panfrost_context
);
1358 struct pipe_context
*gallium
= (struct pipe_context
*) ctx
;
1359 struct panfrost_device
*dev
= pan_device(screen
);
1361 gallium
->screen
= screen
;
1363 gallium
->destroy
= panfrost_destroy
;
1365 gallium
->set_framebuffer_state
= panfrost_set_framebuffer_state
;
1367 gallium
->flush
= panfrost_flush
;
1368 gallium
->clear
= panfrost_clear
;
1369 gallium
->draw_vbo
= panfrost_draw_vbo
;
1370 gallium
->texture_barrier
= panfrost_texture_barrier
;
1372 gallium
->set_vertex_buffers
= panfrost_set_vertex_buffers
;
1373 gallium
->set_constant_buffer
= panfrost_set_constant_buffer
;
1374 gallium
->set_shader_buffers
= panfrost_set_shader_buffers
;
1376 gallium
->set_stencil_ref
= panfrost_set_stencil_ref
;
1378 gallium
->create_sampler_view
= panfrost_create_sampler_view
;
1379 gallium
->set_sampler_views
= panfrost_set_sampler_views
;
1380 gallium
->sampler_view_destroy
= panfrost_sampler_view_destroy
;
1382 gallium
->create_rasterizer_state
= panfrost_create_rasterizer_state
;
1383 gallium
->bind_rasterizer_state
= panfrost_bind_rasterizer_state
;
1384 gallium
->delete_rasterizer_state
= panfrost_generic_cso_delete
;
1386 gallium
->create_vertex_elements_state
= panfrost_create_vertex_elements_state
;
1387 gallium
->bind_vertex_elements_state
= panfrost_bind_vertex_elements_state
;
1388 gallium
->delete_vertex_elements_state
= panfrost_generic_cso_delete
;
1390 gallium
->create_fs_state
= panfrost_create_fs_state
;
1391 gallium
->delete_fs_state
= panfrost_delete_shader_state
;
1392 gallium
->bind_fs_state
= panfrost_bind_fs_state
;
1394 gallium
->create_vs_state
= panfrost_create_vs_state
;
1395 gallium
->delete_vs_state
= panfrost_delete_shader_state
;
1396 gallium
->bind_vs_state
= panfrost_bind_vs_state
;
1398 gallium
->create_sampler_state
= panfrost_create_sampler_state
;
1399 gallium
->delete_sampler_state
= panfrost_generic_cso_delete
;
1400 gallium
->bind_sampler_states
= panfrost_bind_sampler_states
;
1402 gallium
->create_depth_stencil_alpha_state
= panfrost_create_depth_stencil_state
;
1403 gallium
->bind_depth_stencil_alpha_state
= panfrost_bind_depth_stencil_state
;
1404 gallium
->delete_depth_stencil_alpha_state
= panfrost_delete_depth_stencil_state
;
1406 gallium
->set_sample_mask
= panfrost_set_sample_mask
;
1407 gallium
->set_min_samples
= panfrost_set_min_samples
;
1409 gallium
->set_clip_state
= panfrost_set_clip_state
;
1410 gallium
->set_viewport_states
= panfrost_set_viewport_states
;
1411 gallium
->set_scissor_states
= panfrost_set_scissor_states
;
1412 gallium
->set_polygon_stipple
= panfrost_set_polygon_stipple
;
1413 gallium
->set_active_query_state
= panfrost_set_active_query_state
;
1415 gallium
->create_query
= panfrost_create_query
;
1416 gallium
->destroy_query
= panfrost_destroy_query
;
1417 gallium
->begin_query
= panfrost_begin_query
;
1418 gallium
->end_query
= panfrost_end_query
;
1419 gallium
->get_query_result
= panfrost_get_query_result
;
1421 gallium
->create_stream_output_target
= panfrost_create_stream_output_target
;
1422 gallium
->stream_output_target_destroy
= panfrost_stream_output_target_destroy
;
1423 gallium
->set_stream_output_targets
= panfrost_set_stream_output_targets
;
1425 panfrost_resource_context_init(gallium
);
1426 panfrost_blend_context_init(gallium
);
1427 panfrost_compute_context_init(gallium
);
1429 gallium
->stream_uploader
= u_upload_create_default(gallium
);
1430 gallium
->const_uploader
= gallium
->stream_uploader
;
1432 ctx
->state_uploader
= u_upload_create(gallium
, 4096,
1433 PIPE_BIND_CONSTANT_BUFFER
, PIPE_USAGE_DYNAMIC
, 0);
1435 /* All of our GPUs support ES mode. Midgard supports additionally
1436 * QUADS/QUAD_STRIPS/POLYGON. Bifrost supports just QUADS. */
1438 ctx
->draw_modes
= (1 << (PIPE_PRIM_QUADS
+ 1)) - 1;
1440 if (!(dev
->quirks
& IS_BIFROST
)) {
1441 ctx
->draw_modes
|= (1 << PIPE_PRIM_QUAD_STRIP
);
1442 ctx
->draw_modes
|= (1 << PIPE_PRIM_POLYGON
);
1445 ctx
->primconvert
= util_primconvert_create(gallium
, ctx
->draw_modes
);
1447 ctx
->blitter
= util_blitter_create(gallium
);
1448 ctx
->blitter_wallpaper
= util_blitter_create(gallium
);
1450 assert(ctx
->blitter
);
1451 assert(ctx
->blitter_wallpaper
);
1453 /* Prepare for render! */
1455 panfrost_batch_init(ctx
);
1457 if (!(dev
->quirks
& IS_BIFROST
)) {
1458 for (unsigned c
= 0; c
< PIPE_MAX_COLOR_BUFS
; ++c
)
1459 ctx
->blit_blend
.rt
[c
].shaders
= _mesa_hash_table_u64_create(ctx
);
1462 /* By default mask everything on */
1463 ctx
->sample_mask
= ~0;
1464 ctx
->active_queries
= true;