src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25  * SOFTWARE.
  26  *
  27  */
  28
  29 #include "util/u_debug.h"
  30 #include "util/u_memory.h"
  31 #include "util/format/u_format.h"
  32 #include "util/format/u_format_s3tc.h"
  33 #include "util/u_video.h"
  34 #include "util/u_screen.h"
  35 #include "util/os_time.h"
  36 #include "util/u_process.h"
  37 #include "pipe/p_defines.h"
  38 #include "pipe/p_screen.h"
  39 #include "draw/draw_context.h"
  40
  41 #include <fcntl.h>
  42
  43 #include "drm-uapi/drm_fourcc.h"
  44 #include "drm-uapi/panfrost_drm.h"
  45
  46 #include "pan_bo.h"
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51 #include "pandecode/decode.h"
  52
  53 #include "pan_context.h"
  54 #include "midgard/midgard_compile.h"
  55 #include "bifrost/bifrost_compile.h"
  56 #include "panfrost-quirks.h"
  57
  58 static const struct debug_named_value debug_options[] = {
  59         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  60         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  61         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  62         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  63         {"sync",      PAN_DBG_SYNC,     "Wait for each job's completion and check for any GPU fault"},
  64         {"precompile", PAN_DBG_PRECOMPILE, "Precompile shaders for shader-db"},
  65         {"gles3",     PAN_DBG_GLES3,    "Enable experimental GLES3 implementation"},
  66         {"fp16",     PAN_DBG_FP16,     "Enable buggy experimental (don't use!) fp16"},
  67         {"bifrost",   PAN_DBG_BIFROST, "Enable experimental Mali G31 and G52 support"},
  68         DEBUG_NAMED_VALUE_END
  69 };
  70
  71 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  72
  73 int pan_debug = 0;
  74
  75 static const char *
  76 panfrost_get_name(struct pipe_screen *screen)
  77 {
  78         return panfrost_model_name(pan_device(screen)->gpu_id);
  79 }
  80
  81 static const char *
  82 panfrost_get_vendor(struct pipe_screen *screen)
  83 {
  84         return "Panfrost";
  85 }
  86
  87 static const char *
  88 panfrost_get_device_vendor(struct pipe_screen *screen)
  89 {
  90         return "Arm";
  91 }
  92
  93 static int
  94 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  95 {
  96         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  97         bool is_deqp = pan_debug & PAN_DBG_DEQP;
  98         struct panfrost_device *dev = pan_device(screen);
  99
 100         /* Our GLES3 implementation is WIP */
 101         bool is_gles3 = pan_debug & PAN_DBG_GLES3;
 102         is_gles3 |= is_deqp;
 103
 104         switch (param) {
 105         case PIPE_CAP_NPOT_TEXTURES:
 106         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 107         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 108         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 109         case PIPE_CAP_VERTEX_SHADER_SATURATE:
 110         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 111         case PIPE_CAP_POINT_SPRITE:
 112         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 113         case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 114                 return 1;
 115
 116         case PIPE_CAP_MAX_RENDER_TARGETS:
 117                 return is_gles3 ? 4 : 1;
 118
 119         /* Throttling frames breaks pipelining */
 120         case PIPE_CAP_THROTTLE:
 121                 return 0;
 122
 123         case PIPE_CAP_OCCLUSION_QUERY:
 124                 return 1;
 125         case PIPE_CAP_QUERY_TIME_ELAPSED:
 126         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 127         case PIPE_CAP_QUERY_TIMESTAMP:
 128         case PIPE_CAP_QUERY_SO_OVERFLOW:
 129                 return 0;
 130
 131         case PIPE_CAP_TEXTURE_SWIZZLE:
 132                 return 1;
 133
 134         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 135         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 136                 return 1;
 137
 138         case PIPE_CAP_TGSI_INSTANCEID:
 139         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 140         case PIPE_CAP_PRIMITIVE_RESTART:
 141                 return 1;
 142
 143         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 144                 return is_gles3 ? 4 : 0;
 145         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 146         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 147                 return is_gles3 ? 64 : 0;
 148         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 149                 return 1;
 150
 151         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 152                 return 256;
 153
 154         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 155         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 156                 return is_gles3 ? 140 : 120;
 157         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 158                 return is_gles3 ? 300 : 120;
 159
 160         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 161                 return 16;
 162
 163         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 164                 return is_gles3;
 165
 166         /* For faking GLES 3.1 for dEQP-GLES31 */
 167         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 168         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 169         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 170         case PIPE_CAP_CUBE_MAP_ARRAY:
 171                 return is_deqp;
 172
 173         /* For faking compute shaders */
 174         case PIPE_CAP_COMPUTE:
 175                 return is_deqp;
 176
 177         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 178                 return 4096;
 179         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 180         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 181                 return 13;
 182
 183         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 184         case PIPE_CAP_INDEP_BLEND_ENABLE:
 185         case PIPE_CAP_INDEP_BLEND_FUNC:
 186                 return 1;
 187
 188         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 189                 /* Hardware is natively upper left */
 190                 return 0;
 191
 192         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 193         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 194         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 195         case PIPE_CAP_GENERATE_MIPMAP:
 196                 return 1;
 197
 198         /* We would prefer varyings on Midgard, but proper sysvals on Bifrost */
 199         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 200         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 201         case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
 202                 return dev->quirks & IS_BIFROST;
 203
 204         /* I really don't want to set this CAP but let's not swim against the
 205          * tide.. */
 206         case PIPE_CAP_TGSI_TEXCOORD:
 207                 return 1;
 208
 209         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 210         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 211                 return 1;
 212
 213         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 214                 return 0xffff;
 215
 216         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 217                 return 1;
 218
 219         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 220                 return 65536;
 221
 222         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 223                 return 0;
 224
 225         case PIPE_CAP_ENDIANNESS:
 226                 return PIPE_ENDIAN_NATIVE;
 227
 228         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 229                 return 1;
 230
 231         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 232                 return -8;
 233
 234         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 235                 return 7;
 236
 237         case PIPE_CAP_VENDOR_ID:
 238         case PIPE_CAP_DEVICE_ID:
 239                 return 0xFFFFFFFF;
 240
 241         case PIPE_CAP_ACCELERATED:
 242         case PIPE_CAP_UMA:
 243         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 244         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 245         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 246         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 247                 return 1;
 248
 249         case PIPE_CAP_VIDEO_MEMORY: {
 250                 uint64_t system_memory;
 251
 252                 if (!os_get_total_physical_memory(&system_memory))
 253                         return 0;
 254
 255                 return (int)(system_memory >> 20);
 256         }
 257
 258         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 259                 return 1;
 260
 261         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 262                 return 4;
 263
 264         case PIPE_CAP_MAX_VARYINGS:
 265                 return 16;
 266
 267         case PIPE_CAP_ALPHA_TEST:
 268         case PIPE_CAP_FLATSHADE:
 269         case PIPE_CAP_TWO_SIDED_COLOR:
 270         case PIPE_CAP_CLIP_PLANES:
 271                 return 0;
 272
 273         case PIPE_CAP_PACKED_STREAM_OUTPUT:
 274                 return 0;
 275
 276         case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED:
 277         case PIPE_CAP_PSIZ_CLAMPED:
 278                 return 1;
 279
 280         default:
 281                 return u_pipe_screen_get_param_defaults(screen, param);
 282         }
 283 }
 284
 285 static int
 286 panfrost_get_shader_param(struct pipe_screen *screen,
 287                           enum pipe_shader_type shader,
 288                           enum pipe_shader_cap param)
 289 {
 290         bool is_deqp = pan_debug & PAN_DBG_DEQP;
 291         bool is_fp16 = pan_debug & PAN_DBG_FP16;
 292         struct panfrost_device *dev = pan_device(screen);
 293
 294         if (shader != PIPE_SHADER_VERTEX &&
 295             shader != PIPE_SHADER_FRAGMENT &&
 296             !(shader == PIPE_SHADER_COMPUTE && is_deqp))
 297                 return 0;
 298
 299         /* this is probably not totally correct.. but it's a start: */
 300         switch (param) {
 301         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 302         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 303         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 304         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 305                 return 16384;
 306
 307         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 308                 return 1024;
 309
 310         case PIPE_SHADER_CAP_MAX_INPUTS:
 311                 return 16;
 312
 313         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 314                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 16;
 315
 316         case PIPE_SHADER_CAP_MAX_TEMPS:
 317                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 318
 319         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 320                 return 16 * 1024 * sizeof(float);
 321
 322         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 323                 return PAN_MAX_CONST_BUFFERS;
 324
 325         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 326                 return 0;
 327
 328         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 329                 return 1;
 330         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 331                 return 0;
 332
 333         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 334                 return 0;
 335
 336         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 337                 return 1;
 338
 339         case PIPE_SHADER_CAP_SUBROUTINES:
 340                 return 0;
 341
 342         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 343                 return 0;
 344
 345         case PIPE_SHADER_CAP_INTEGERS:
 346                 return 1;
 347
 348         case PIPE_SHADER_CAP_FP16:
 349                 return !(dev->quirks & MIDGARD_BROKEN_FP16) || is_fp16;
 350
 351         case PIPE_SHADER_CAP_FP16_DERIVATIVES:
 352         case PIPE_SHADER_CAP_INT16:
 353         case PIPE_SHADER_CAP_INT64_ATOMICS:
 354         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 355         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 356         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 357         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 358         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 359                 return 0;
 360
 361         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 362         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 363                 return 16; /* XXX: How many? */
 364
 365         case PIPE_SHADER_CAP_PREFERRED_IR:
 366                 return PIPE_SHADER_IR_NIR;
 367
 368         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 369                 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
 370
 371         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 372                 return 32;
 373
 374         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 375         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 376                 return is_deqp ? 8 : 0;
 377         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 378         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 379                 return 0;
 380
 381         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 382         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 383                 return 0;
 384
 385         default:
 386                 DBG("unknown shader param %d\n", param);
 387                 return 0;
 388         }
 389
 390         return 0;
 391 }
 392
 393 static float
 394 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 395 {
 396         switch (param) {
 397         case PIPE_CAPF_MAX_LINE_WIDTH:
 398
 399         /* fall-through */
 400         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 401                 return 255.0; /* arbitrary */
 402
 403         case PIPE_CAPF_MAX_POINT_WIDTH:
 404
 405         /* fall-through */
 406         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 407                 return 1024.0;
 408
 409         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 410                 return 16.0;
 411
 412         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 413                 return 16.0; /* arbitrary */
 414
 415         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 416         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 417         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 418                 return 0.0f;
 419
 420         default:
 421                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 422                 return 0.0;
 423         }
 424 }
 425
 426 /**
 427  * Query format support for creating a texture, drawing surface, etc.
 428  * \param format  the format to test
 429  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 430  */
 431 static bool
 432 panfrost_is_format_supported( struct pipe_screen *screen,
 433                               enum pipe_format format,
 434                               enum pipe_texture_target target,
 435                               unsigned sample_count,
 436                               unsigned storage_sample_count,
 437                               unsigned bind)
 438 {
 439         const struct util_format_description *format_desc;
 440
 441         assert(target == PIPE_BUFFER ||
 442                target == PIPE_TEXTURE_1D ||
 443                target == PIPE_TEXTURE_1D_ARRAY ||
 444                target == PIPE_TEXTURE_2D ||
 445                target == PIPE_TEXTURE_2D_ARRAY ||
 446                target == PIPE_TEXTURE_RECT ||
 447                target == PIPE_TEXTURE_3D ||
 448                target == PIPE_TEXTURE_CUBE ||
 449                target == PIPE_TEXTURE_CUBE_ARRAY);
 450
 451         format_desc = util_format_description(format);
 452
 453         if (!format_desc)
 454                 return false;
 455
 456         /* MSAA 4x supported, but no more. Technically some revisions of the
 457          * hardware can go up to 16x but we don't support higher modes yet. */
 458
 459         if (sample_count > 1 && !(pan_debug & PAN_DBG_DEQP))
 460                 return false;
 461
 462         if (sample_count > 4)
 463                 return false;
 464
 465         if (MAX2(sample_count, 1) != MAX2(storage_sample_count, 1))
 466                 return false;
 467
 468         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 469          * more alpha than they ask for */
 470
 471         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 472         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 473
 474         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 475                 return false;
 476
 477         /* Check we support the format with the given bind */
 478
 479         unsigned relevant_bind = bind &
 480                 ( PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET
 481                 | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_SAMPLER_VIEW);
 482
 483         struct panfrost_format fmt = panfrost_pipe_format_table[format];
 484         return fmt.hw && ((relevant_bind & ~fmt.bind) == 0);
 485 }
 486
 487 static int
 488 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
 489                 enum pipe_compute_cap param, void *ret)
 490 {
 491         const char * const ir = "panfrost";
 492
 493         if (!(pan_debug & PAN_DBG_DEQP))
 494                 return 0;
 495
 496 #define RET(x) do {                  \
 497    if (ret)                          \
 498       memcpy(ret, x, sizeof(x));     \
 499    return sizeof(x);                 \
 500 } while (0)
 501
 502         switch (param) {
 503         case PIPE_COMPUTE_CAP_ADDRESS_BITS:
 504                 RET((uint32_t []){ 64 });
 505
 506         case PIPE_COMPUTE_CAP_IR_TARGET:
 507                 if (ret)
 508                         sprintf(ret, "%s", ir);
 509                 return strlen(ir) * sizeof(char);
 510
 511         case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 512                 RET((uint64_t []) { 3 });
 513
 514         case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 515                 RET(((uint64_t []) { 65535, 65535, 65535 }));
 516
 517         case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 518                 RET(((uint64_t []) { 1024, 1024, 64 }));
 519
 520         case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 521                 RET((uint64_t []) { 1024 });
 522
 523         case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 524                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 525
 526         case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 527                 RET((uint64_t []) { 32768 });
 528
 529         case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 530         case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 531                 RET((uint64_t []) { 4096 });
 532
 533         case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 534                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 535
 536         case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 537                 RET((uint32_t []) { 800 /* MHz -- TODO */ });
 538
 539         case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 540                 RET((uint32_t []) { 9999 });  // TODO
 541
 542         case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 543                 RET((uint32_t []) { 1 }); // TODO
 544
 545         case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 546                 RET((uint32_t []) { 32 });  // TODO
 547
 548         case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
 549                 RET((uint64_t []) { 1024 }); // TODO
 550         }
 551
 552         return 0;
 553 }
 554
 555 static void
 556 panfrost_destroy_screen(struct pipe_screen *pscreen)
 557 {
 558         panfrost_close_device(pan_device(pscreen));
 559         ralloc_free(pscreen);
 560 }
 561
 562 static uint64_t
 563 panfrost_get_timestamp(struct pipe_screen *_screen)
 564 {
 565         return os_time_get_nano();
 566 }
 567
 568 static void
 569 panfrost_fence_reference(struct pipe_screen *pscreen,
 570                          struct pipe_fence_handle **ptr,
 571                          struct pipe_fence_handle *fence)
 572 {
 573         struct panfrost_fence **p = (struct panfrost_fence **)ptr;
 574         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 575         struct panfrost_fence *old = *p;
 576
 577         if (pipe_reference(&(*p)->reference, &f->reference)) {
 578                 util_dynarray_foreach(&old->syncfds, int, fd)
 579                         close(*fd);
 580                 util_dynarray_fini(&old->syncfds);
 581                 free(old);
 582         }
 583         *p = f;
 584 }
 585
 586 static bool
 587 panfrost_fence_finish(struct pipe_screen *pscreen,
 588                       struct pipe_context *ctx,
 589                       struct pipe_fence_handle *fence,
 590                       uint64_t timeout)
 591 {
 592         struct panfrost_device *dev = pan_device(pscreen);
 593         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 594         struct util_dynarray syncobjs;
 595         int ret;
 596
 597         /* All fences were already signaled */
 598         if (!util_dynarray_num_elements(&f->syncfds, int))
 599                 return true;
 600
 601         util_dynarray_init(&syncobjs, NULL);
 602         util_dynarray_foreach(&f->syncfds, int, fd) {
 603                 uint32_t syncobj;
 604
 605                 ret = drmSyncobjCreate(dev->fd, 0, &syncobj);
 606                 assert(!ret);
 607
 608                 ret = drmSyncobjImportSyncFile(dev->fd, syncobj, *fd);
 609                 assert(!ret);
 610                 util_dynarray_append(&syncobjs, uint32_t, syncobj);
 611         }
 612
 613         uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
 614         if (abs_timeout == OS_TIMEOUT_INFINITE)
 615                 abs_timeout = INT64_MAX;
 616
 617         ret = drmSyncobjWait(dev->fd, util_dynarray_begin(&syncobjs),
 618                              util_dynarray_num_elements(&syncobjs, uint32_t),
 619                              abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
 620                              NULL);
 621
 622         util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
 623                 drmSyncobjDestroy(dev->fd, *syncobj);
 624
 625         return ret >= 0;
 626 }
 627
 628 struct panfrost_fence *
 629 panfrost_fence_create(struct panfrost_context *ctx,
 630                       struct util_dynarray *fences)
 631 {
 632         struct panfrost_device *device = pan_device(ctx->base.screen);
 633         struct panfrost_fence *f = calloc(1, sizeof(*f));
 634         if (!f)
 635                 return NULL;
 636
 637         util_dynarray_init(&f->syncfds, NULL);
 638
 639         /* Export fences from all pending batches. */
 640         util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
 641                 int fd = -1;
 642
 643                 /* The fence is already signaled, no need to export it. */
 644                 if ((*fence)->signaled)
 645                         continue;
 646
 647                 drmSyncobjExportSyncFile(device->fd, (*fence)->syncobj, &fd);
 648                 if (fd == -1)
 649                         fprintf(stderr, "export failed: %m\n");
 650
 651                 assert(fd != -1);
 652                 util_dynarray_append(&f->syncfds, int, fd);
 653         }
 654
 655         pipe_reference_init(&f->reference, 1);
 656
 657         return f;
 658 }
 659
 660 static const void *
 661 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 662                                      enum pipe_shader_ir ir,
 663                                      enum pipe_shader_type shader)
 664 {
 665         if (pan_device(pscreen)->quirks & IS_BIFROST)
 666                 return &bifrost_nir_options;
 667         else
 668                 return &midgard_nir_options;
 669 }
 670
 671 struct pipe_screen *
 672 panfrost_create_screen(int fd, struct renderonly *ro)
 673 {
 674         pan_debug = debug_get_option_pan_debug();
 675
 676         /* Blacklist apps known to be buggy under Panfrost */
 677         const char *proc = util_get_process_name();
 678         const char *blacklist[] = {
 679                 "chromium",
 680                 "chrome",
 681         };
 682
 683         for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
 684                 if ((strcmp(blacklist[i], proc) == 0))
 685                         return NULL;
 686         }
 687
 688         /* Create the screen */
 689         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 690
 691         if (!screen)
 692                 return NULL;
 693
 694         struct panfrost_device *dev = pan_device(&screen->base);
 695         panfrost_open_device(screen, fd, dev);
 696
 697         if (ro) {
 698                 dev->ro = renderonly_dup(ro);
 699                 if (!dev->ro) {
 700                         DBG("Failed to dup renderonly object\n");
 701                         free(screen);
 702                         return NULL;
 703                 }
 704         }
 705
 706         /* Check if we're loading against a supported GPU model. */
 707
 708         switch (dev->gpu_id) {
 709         case 0x720: /* T720 */
 710         case 0x750: /* T760 */
 711         case 0x820: /* T820 */
 712         case 0x860: /* T860 */
 713                 break;
 714         case 0x7093: /* G31 */
 715         case 0x7212: /* G52 */
 716                 if (pan_debug & PAN_DBG_BIFROST)
 717                         break;
 718
 719                 /* fallthrough */
 720         default:
 721                 /* Fail to load against untested models */
 722                 debug_printf("panfrost: Unsupported model %X", dev->gpu_id);
 723                 panfrost_destroy_screen(&(screen->base));
 724                 return NULL;
 725         }
 726
 727         if (pan_debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
 728                 pandecode_initialize(!(pan_debug & PAN_DBG_TRACE));
 729
 730         screen->base.destroy = panfrost_destroy_screen;
 731
 732         screen->base.get_name = panfrost_get_name;
 733         screen->base.get_vendor = panfrost_get_vendor;
 734         screen->base.get_device_vendor = panfrost_get_device_vendor;
 735         screen->base.get_param = panfrost_get_param;
 736         screen->base.get_shader_param = panfrost_get_shader_param;
 737         screen->base.get_compute_param = panfrost_get_compute_param;
 738         screen->base.get_paramf = panfrost_get_paramf;
 739         screen->base.get_timestamp = panfrost_get_timestamp;
 740         screen->base.is_format_supported = panfrost_is_format_supported;
 741         screen->base.context_create = panfrost_create_context;
 742         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 743         screen->base.fence_reference = panfrost_fence_reference;
 744         screen->base.fence_finish = panfrost_fence_finish;
 745         screen->base.set_damage_region = panfrost_resource_set_damage_region;
 746
 747         panfrost_resource_screen_init(&screen->base);
 748
 749         return &screen->base;
 750 }