panfrost: Factor out panfrost_query_raw
[mesa.git] / src / gallium / drivers / panfrost / pan_screen.c
1 /*
2 * Copyright (C) 2008 VMware, Inc.
3 * Copyright (C) 2014 Broadcom
4 * Copyright (C) 2018 Alyssa Rosenzweig
5 * Copyright (C) 2019 Collabora, Ltd.
6 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 * SOFTWARE.
26 *
27 */
28
29 #include "util/u_debug.h"
30 #include "util/u_memory.h"
31 #include "util/format/u_format.h"
32 #include "util/format/u_format_s3tc.h"
33 #include "util/u_video.h"
34 #include "util/u_screen.h"
35 #include "util/os_time.h"
36 #include "util/u_process.h"
37 #include "pipe/p_defines.h"
38 #include "pipe/p_screen.h"
39 #include "draw/draw_context.h"
40
41 #include <fcntl.h>
42
43 #include "drm-uapi/drm_fourcc.h"
44 #include "drm-uapi/panfrost_drm.h"
45
46 #include "pan_bo.h"
47 #include "pan_screen.h"
48 #include "pan_resource.h"
49 #include "pan_public.h"
50 #include "pan_util.h"
51 #include "pandecode/decode.h"
52
53 #include "pan_context.h"
54 #include "midgard/midgard_compile.h"
55 #include "panfrost-quirks.h"
56
57 static const struct debug_named_value debug_options[] = {
58 {"msgs", PAN_DBG_MSGS, "Print debug messages"},
59 {"trace", PAN_DBG_TRACE, "Trace the command stream"},
60 {"deqp", PAN_DBG_DEQP, "Hacks for dEQP"},
61 {"afbc", PAN_DBG_AFBC, "Enable non-conformant AFBC impl"},
62 {"sync", PAN_DBG_SYNC, "Wait for each job's completion and check for any GPU fault"},
63 DEBUG_NAMED_VALUE_END
64 };
65
66 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
67
68 int pan_debug = 0;
69
70 static const char *
71 panfrost_get_name(struct pipe_screen *screen)
72 {
73 return "panfrost";
74 }
75
76 static const char *
77 panfrost_get_vendor(struct pipe_screen *screen)
78 {
79 return "panfrost";
80 }
81
82 static const char *
83 panfrost_get_device_vendor(struct pipe_screen *screen)
84 {
85 return "Arm";
86 }
87
88 static int
89 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
90 {
91 /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
92 bool is_deqp = pan_debug & PAN_DBG_DEQP;
93
94 switch (param) {
95 case PIPE_CAP_NPOT_TEXTURES:
96 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
97 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
98 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
99 case PIPE_CAP_VERTEX_SHADER_SATURATE:
100 case PIPE_CAP_POINT_SPRITE:
101 return 1;
102
103 case PIPE_CAP_MAX_RENDER_TARGETS:
104 return is_deqp ? 4 : 1;
105
106 /* Throttling frames breaks pipelining */
107 case PIPE_CAP_THROTTLE:
108 return 0;
109
110 case PIPE_CAP_OCCLUSION_QUERY:
111 return 1;
112 case PIPE_CAP_QUERY_TIME_ELAPSED:
113 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
114 case PIPE_CAP_QUERY_TIMESTAMP:
115 case PIPE_CAP_QUERY_SO_OVERFLOW:
116 return 0;
117
118 case PIPE_CAP_TEXTURE_SWIZZLE:
119 return 1;
120
121 case PIPE_CAP_TGSI_INSTANCEID:
122 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
123 return is_deqp ? 1 : 0;
124
125 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
126 return is_deqp ? 4 : 0;
127 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
128 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
129 return is_deqp ? 64 : 0;
130 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
131 return 1;
132
133 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
134 return is_deqp ? 256 : 0; /* for GL3 */
135
136 case PIPE_CAP_GLSL_FEATURE_LEVEL:
137 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
138 return is_deqp ? 140 : 120;
139 case PIPE_CAP_ESSL_FEATURE_LEVEL:
140 return is_deqp ? 300 : 120;
141
142 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
143 return is_deqp ? 16 : 0;
144
145 case PIPE_CAP_CUBE_MAP_ARRAY:
146 return is_deqp;
147
148 /* For faking GLES 3.1 for dEQP-GLES31 */
149 case PIPE_CAP_TEXTURE_MULTISAMPLE:
150 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
151 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
152 case PIPE_CAP_IMAGE_LOAD_FORMATTED:
153 return is_deqp;
154
155 /* For faking compute shaders */
156 case PIPE_CAP_COMPUTE:
157 return is_deqp;
158
159 /* TODO: Where does this req come from in practice? */
160 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
161 return 1;
162
163 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
164 return 4096;
165 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
166 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
167 return 13;
168
169 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
170 case PIPE_CAP_INDEP_BLEND_ENABLE:
171 case PIPE_CAP_INDEP_BLEND_FUNC:
172 return 1;
173
174 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
175 /* Hardware is natively upper left */
176 return 0;
177
178 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
179 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
180 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
181 case PIPE_CAP_GENERATE_MIPMAP:
182 return 1;
183
184 /* We would prefer varyings */
185 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
186 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
187 return 0;
188
189 /* I really don't want to set this CAP but let's not swim against the
190 * tide.. */
191 case PIPE_CAP_TGSI_TEXCOORD:
192 return 1;
193
194 case PIPE_CAP_SEAMLESS_CUBE_MAP:
195 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
196 return 1;
197
198 case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
199 return 0xffff;
200
201 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
202 return 1;
203
204 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
205 return 65536;
206
207 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
208 return 0;
209
210 case PIPE_CAP_ENDIANNESS:
211 return PIPE_ENDIAN_NATIVE;
212
213 case PIPE_CAP_SAMPLER_VIEW_TARGET:
214 return 1;
215
216 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
217 return -8;
218
219 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
220 return 7;
221
222 case PIPE_CAP_VENDOR_ID:
223 case PIPE_CAP_DEVICE_ID:
224 return 0xFFFFFFFF;
225
226 case PIPE_CAP_ACCELERATED:
227 case PIPE_CAP_UMA:
228 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
229 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
230 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
231 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
232 return 1;
233
234 case PIPE_CAP_VIDEO_MEMORY: {
235 uint64_t system_memory;
236
237 if (!os_get_total_physical_memory(&system_memory))
238 return 0;
239
240 return (int)(system_memory >> 20);
241 }
242
243 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
244 return 4;
245
246 case PIPE_CAP_MAX_VARYINGS:
247 return 16;
248
249 case PIPE_CAP_ALPHA_TEST:
250 return 0;
251
252 default:
253 return u_pipe_screen_get_param_defaults(screen, param);
254 }
255 }
256
257 static int
258 panfrost_get_shader_param(struct pipe_screen *screen,
259 enum pipe_shader_type shader,
260 enum pipe_shader_cap param)
261 {
262 bool is_deqp = pan_debug & PAN_DBG_DEQP;
263
264 if (shader != PIPE_SHADER_VERTEX &&
265 shader != PIPE_SHADER_FRAGMENT &&
266 !(shader == PIPE_SHADER_COMPUTE && is_deqp))
267 return 0;
268
269 /* this is probably not totally correct.. but it's a start: */
270 switch (param) {
271 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
272 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
273 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
274 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
275 return 16384;
276
277 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
278 return 1024;
279
280 case PIPE_SHADER_CAP_MAX_INPUTS:
281 return 16;
282
283 case PIPE_SHADER_CAP_MAX_OUTPUTS:
284 return shader == PIPE_SHADER_FRAGMENT ? 4 : 8;
285
286 case PIPE_SHADER_CAP_MAX_TEMPS:
287 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
288
289 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
290 return 16 * 1024 * sizeof(float);
291
292 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
293 return PAN_MAX_CONST_BUFFERS;
294
295 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
296 return 0;
297
298 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
299 return 1;
300 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
301 return 0;
302
303 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
304 return 0;
305
306 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
307 return 1;
308
309 case PIPE_SHADER_CAP_SUBROUTINES:
310 return 0;
311
312 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
313 return 0;
314
315 case PIPE_SHADER_CAP_INTEGERS:
316 return 1;
317
318 case PIPE_SHADER_CAP_INT64_ATOMICS:
319 case PIPE_SHADER_CAP_FP16:
320 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
321 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
322 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
323 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
324 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
325 return 0;
326
327 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
328 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
329 return 16; /* XXX: How many? */
330
331 case PIPE_SHADER_CAP_PREFERRED_IR:
332 return PIPE_SHADER_IR_NIR;
333
334 case PIPE_SHADER_CAP_SUPPORTED_IRS:
335 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
336
337 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
338 return 32;
339
340 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
341 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
342 return is_deqp ? 4 : 0;
343 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
344 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
345 return 0;
346
347 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
348 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
349 return 0;
350
351 default:
352 fprintf(stderr, "unknown shader param %d\n", param);
353 return 0;
354 }
355
356 return 0;
357 }
358
359 static float
360 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
361 {
362 switch (param) {
363 case PIPE_CAPF_MAX_LINE_WIDTH:
364
365 /* fall-through */
366 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
367 return 255.0; /* arbitrary */
368
369 case PIPE_CAPF_MAX_POINT_WIDTH:
370
371 /* fall-through */
372 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
373 return 1024.0;
374
375 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
376 return 16.0;
377
378 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
379 return 16.0; /* arbitrary */
380
381 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
382 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
383 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
384 return 0.0f;
385
386 default:
387 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
388 return 0.0;
389 }
390 }
391
392 /**
393 * Query format support for creating a texture, drawing surface, etc.
394 * \param format the format to test
395 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
396 */
397 static bool
398 panfrost_is_format_supported( struct pipe_screen *screen,
399 enum pipe_format format,
400 enum pipe_texture_target target,
401 unsigned sample_count,
402 unsigned storage_sample_count,
403 unsigned bind)
404 {
405 const struct util_format_description *format_desc;
406
407 assert(target == PIPE_BUFFER ||
408 target == PIPE_TEXTURE_1D ||
409 target == PIPE_TEXTURE_1D_ARRAY ||
410 target == PIPE_TEXTURE_2D ||
411 target == PIPE_TEXTURE_2D_ARRAY ||
412 target == PIPE_TEXTURE_RECT ||
413 target == PIPE_TEXTURE_3D ||
414 target == PIPE_TEXTURE_CUBE ||
415 target == PIPE_TEXTURE_CUBE_ARRAY);
416
417 format_desc = util_format_description(format);
418
419 if (!format_desc)
420 return false;
421
422 if (sample_count > 1)
423 return false;
424
425 /* Format wishlist */
426 if (format == PIPE_FORMAT_X8Z24_UNORM)
427 return false;
428
429 if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
430 return false;
431
432 /* TODO */
433 if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
434 return FALSE;
435
436 /* Don't confuse poorly written apps (workaround dEQP bug) that expect
437 * more alpha than they ask for */
438
439 bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
440 bool renderable = bind & PIPE_BIND_RENDER_TARGET;
441
442 if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
443 return false;
444
445 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&
446 format_desc->layout != UTIL_FORMAT_LAYOUT_OTHER) {
447 /* Compressed formats not yet hooked up. */
448 return false;
449 }
450
451 /* Internally, formats that are depth/stencil renderable are limited.
452 *
453 * In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
454 * rendering perspective. That is, we render to Z24S8 (which we can
455 * AFBC compress), ignore the different when texturing (who cares?),
456 * and then in the off-chance there's a CPU read we blit back to
457 * staging.
458 *
459 * ...alternatively, we can make the state tracker deal with that. */
460
461 if (bind & PIPE_BIND_DEPTH_STENCIL) {
462 switch (format) {
463 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
464 case PIPE_FORMAT_Z24X8_UNORM:
465 case PIPE_FORMAT_Z32_UNORM:
466 case PIPE_FORMAT_Z32_FLOAT:
467 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
468 return true;
469
470 default:
471 return false;
472 }
473 }
474
475 return true;
476 }
477
478 static int
479 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
480 enum pipe_compute_cap param, void *ret)
481 {
482 const char * const ir = "panfrost";
483
484 if (!(pan_debug & PAN_DBG_DEQP))
485 return 0;
486
487 #define RET(x) do { \
488 if (ret) \
489 memcpy(ret, x, sizeof(x)); \
490 return sizeof(x); \
491 } while (0)
492
493 switch (param) {
494 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
495 RET((uint32_t []){ 64 });
496
497 case PIPE_COMPUTE_CAP_IR_TARGET:
498 if (ret)
499 sprintf(ret, "%s", ir);
500 return strlen(ir) * sizeof(char);
501
502 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
503 RET((uint64_t []) { 3 });
504
505 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
506 RET(((uint64_t []) { 65535, 65535, 65535 }));
507
508 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
509 RET(((uint64_t []) { 1024, 1024, 64 }));
510
511 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
512 RET((uint64_t []) { 1024 });
513
514 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
515 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
516
517 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
518 RET((uint64_t []) { 32768 });
519
520 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
521 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
522 RET((uint64_t []) { 4096 });
523
524 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
525 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
526
527 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
528 RET((uint32_t []) { 800 /* MHz -- TODO */ });
529
530 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
531 RET((uint32_t []) { 9999 }); // TODO
532
533 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
534 RET((uint32_t []) { 1 }); // TODO
535
536 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
537 RET((uint32_t []) { 32 }); // TODO
538
539 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
540 RET((uint64_t []) { 1024 }); // TODO
541 }
542
543 return 0;
544 }
545
546 static void
547 panfrost_destroy_screen(struct pipe_screen *pscreen)
548 {
549 struct panfrost_screen *screen = pan_screen(pscreen);
550 panfrost_bo_cache_evict_all(screen);
551 pthread_mutex_destroy(&screen->bo_cache.lock);
552 pthread_mutex_destroy(&screen->active_bos_lock);
553 drmFreeVersion(screen->kernel_version);
554 ralloc_free(screen);
555 }
556
557 static void
558 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
559 struct pipe_resource *resource,
560 unsigned level, unsigned layer,
561 void *context_private,
562 struct pipe_box *sub_box)
563 {
564 /* TODO: Display target integration */
565 }
566
567 static uint64_t
568 panfrost_get_timestamp(struct pipe_screen *_screen)
569 {
570 return os_time_get_nano();
571 }
572
573 static void
574 panfrost_fence_reference(struct pipe_screen *pscreen,
575 struct pipe_fence_handle **ptr,
576 struct pipe_fence_handle *fence)
577 {
578 struct panfrost_fence **p = (struct panfrost_fence **)ptr;
579 struct panfrost_fence *f = (struct panfrost_fence *)fence;
580 struct panfrost_fence *old = *p;
581
582 if (pipe_reference(&(*p)->reference, &f->reference)) {
583 util_dynarray_foreach(&old->syncfds, int, fd)
584 close(*fd);
585 util_dynarray_fini(&old->syncfds);
586 free(old);
587 }
588 *p = f;
589 }
590
591 static bool
592 panfrost_fence_finish(struct pipe_screen *pscreen,
593 struct pipe_context *ctx,
594 struct pipe_fence_handle *fence,
595 uint64_t timeout)
596 {
597 struct panfrost_screen *screen = pan_screen(pscreen);
598 struct panfrost_fence *f = (struct panfrost_fence *)fence;
599 struct util_dynarray syncobjs;
600 int ret;
601
602 /* All fences were already signaled */
603 if (!util_dynarray_num_elements(&f->syncfds, int))
604 return true;
605
606 util_dynarray_init(&syncobjs, NULL);
607 util_dynarray_foreach(&f->syncfds, int, fd) {
608 uint32_t syncobj;
609
610 ret = drmSyncobjCreate(screen->fd, 0, &syncobj);
611 assert(!ret);
612
613 ret = drmSyncobjImportSyncFile(screen->fd, syncobj, *fd);
614 assert(!ret);
615 util_dynarray_append(&syncobjs, uint32_t, syncobj);
616 }
617
618 uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
619 if (abs_timeout == OS_TIMEOUT_INFINITE)
620 abs_timeout = INT64_MAX;
621
622 ret = drmSyncobjWait(screen->fd, util_dynarray_begin(&syncobjs),
623 util_dynarray_num_elements(&syncobjs, uint32_t),
624 abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
625 NULL);
626
627 util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
628 drmSyncobjDestroy(screen->fd, *syncobj);
629
630 return ret >= 0;
631 }
632
633 struct panfrost_fence *
634 panfrost_fence_create(struct panfrost_context *ctx,
635 struct util_dynarray *fences)
636 {
637 struct panfrost_screen *screen = pan_screen(ctx->base.screen);
638 struct panfrost_fence *f = calloc(1, sizeof(*f));
639 if (!f)
640 return NULL;
641
642 util_dynarray_init(&f->syncfds, NULL);
643
644 /* Export fences from all pending batches. */
645 util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
646 int fd = -1;
647
648 /* The fence is already signaled, no need to export it. */
649 if ((*fence)->signaled)
650 continue;
651
652 drmSyncobjExportSyncFile(screen->fd, (*fence)->syncobj, &fd);
653 if (fd == -1)
654 fprintf(stderr, "export failed: %m\n");
655
656 assert(fd != -1);
657 util_dynarray_append(&f->syncfds, int, fd);
658 }
659
660 pipe_reference_init(&f->reference, 1);
661
662 return f;
663 }
664
665 static const void *
666 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
667 enum pipe_shader_ir ir,
668 enum pipe_shader_type shader)
669 {
670 return &midgard_nir_options;
671 }
672
673 static __u64
674 panfrost_query_raw(
675 struct panfrost_screen *screen,
676 enum drm_panfrost_param param,
677 bool required)
678 {
679 struct drm_panfrost_get_param get_param = {0,};
680 ASSERTED int ret;
681
682 get_param.param = DRM_PANFROST_PARAM_GPU_PROD_ID;
683 ret = drmIoctl(screen->fd, DRM_IOCTL_PANFROST_GET_PARAM, &get_param);
684
685 assert(!(ret && required));
686
687 return get_param.value;
688 }
689
690 static unsigned
691 panfrost_query_gpu_version(struct panfrost_screen *screen)
692 {
693 return panfrost_query_raw(screen, DRM_PANFROST_PARAM_GPU_PROD_ID, true);
694 }
695
696 static uint32_t
697 panfrost_active_bos_hash(const void *key)
698 {
699 const struct panfrost_bo *bo = key;
700
701 return _mesa_hash_data(&bo->gem_handle, sizeof(bo->gem_handle));
702 }
703
704 static bool
705 panfrost_active_bos_cmp(const void *keya, const void *keyb)
706 {
707 const struct panfrost_bo *a = keya, *b = keyb;
708
709 return a->gem_handle == b->gem_handle;
710 }
711
712 struct pipe_screen *
713 panfrost_create_screen(int fd, struct renderonly *ro)
714 {
715 pan_debug = debug_get_option_pan_debug();
716
717 /* Blacklist apps known to be buggy under Panfrost */
718 const char *proc = util_get_process_name();
719 const char *blacklist[] = {
720 "chromium",
721 "chrome",
722 };
723
724 for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
725 if ((strcmp(blacklist[i], proc) == 0))
726 return NULL;
727 }
728
729 /* Create the screen */
730 struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
731
732 if (!screen)
733 return NULL;
734
735 if (ro) {
736 screen->ro = renderonly_dup(ro);
737 if (!screen->ro) {
738 fprintf(stderr, "Failed to dup renderonly object\n");
739 free(screen);
740 return NULL;
741 }
742 }
743
744 screen->fd = fd;
745
746 screen->gpu_id = panfrost_query_gpu_version(screen);
747 screen->quirks = panfrost_get_quirks(screen->gpu_id);
748 screen->kernel_version = drmGetVersion(fd);
749
750 /* Check if we're loading against a supported GPU model. */
751
752 switch (screen->gpu_id) {
753 case 0x720: /* T720 */
754 case 0x750: /* T760 */
755 case 0x820: /* T820 */
756 case 0x860: /* T860 */
757 break;
758 default:
759 /* Fail to load against untested models */
760 debug_printf("panfrost: Unsupported model %X", screen->gpu_id);
761 return NULL;
762 }
763
764 pthread_mutex_init(&screen->active_bos_lock, NULL);
765 screen->active_bos = _mesa_set_create(screen, panfrost_active_bos_hash,
766 panfrost_active_bos_cmp);
767
768 pthread_mutex_init(&screen->bo_cache.lock, NULL);
769 list_inithead(&screen->bo_cache.lru);
770 for (unsigned i = 0; i < ARRAY_SIZE(screen->bo_cache.buckets); ++i)
771 list_inithead(&screen->bo_cache.buckets[i]);
772
773 if (pan_debug & PAN_DBG_TRACE)
774 pandecode_initialize();
775
776 screen->base.destroy = panfrost_destroy_screen;
777
778 screen->base.get_name = panfrost_get_name;
779 screen->base.get_vendor = panfrost_get_vendor;
780 screen->base.get_device_vendor = panfrost_get_device_vendor;
781 screen->base.get_param = panfrost_get_param;
782 screen->base.get_shader_param = panfrost_get_shader_param;
783 screen->base.get_compute_param = panfrost_get_compute_param;
784 screen->base.get_paramf = panfrost_get_paramf;
785 screen->base.get_timestamp = panfrost_get_timestamp;
786 screen->base.is_format_supported = panfrost_is_format_supported;
787 screen->base.context_create = panfrost_create_context;
788 screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
789 screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
790 screen->base.fence_reference = panfrost_fence_reference;
791 screen->base.fence_finish = panfrost_fence_finish;
792 screen->base.set_damage_region = panfrost_resource_set_damage_region;
793
794 panfrost_resource_screen_init(screen);
795
796 return &screen->base;
797 }