panfrost: Disable some CAPs we want lowered
[mesa.git] / src / gallium / drivers / panfrost / pan_screen.c
1 /*
2 * Copyright (C) 2008 VMware, Inc.
3 * Copyright (C) 2014 Broadcom
4 * Copyright (C) 2018 Alyssa Rosenzweig
5 * Copyright (C) 2019 Collabora, Ltd.
6 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 * SOFTWARE.
26 *
27 */
28
29 #include "util/u_debug.h"
30 #include "util/u_memory.h"
31 #include "util/format/u_format.h"
32 #include "util/format/u_format_s3tc.h"
33 #include "util/u_video.h"
34 #include "util/u_screen.h"
35 #include "util/os_time.h"
36 #include "util/u_process.h"
37 #include "pipe/p_defines.h"
38 #include "pipe/p_screen.h"
39 #include "draw/draw_context.h"
40
41 #include <fcntl.h>
42
43 #include "drm-uapi/drm_fourcc.h"
44 #include "drm-uapi/panfrost_drm.h"
45
46 #include "pan_bo.h"
47 #include "pan_screen.h"
48 #include "pan_resource.h"
49 #include "pan_public.h"
50 #include "pan_util.h"
51 #include "pandecode/decode.h"
52
53 #include "pan_context.h"
54 #include "midgard/midgard_compile.h"
55 #include "panfrost-quirks.h"
56
57 static const struct debug_named_value debug_options[] = {
58 {"msgs", PAN_DBG_MSGS, "Print debug messages"},
59 {"trace", PAN_DBG_TRACE, "Trace the command stream"},
60 {"deqp", PAN_DBG_DEQP, "Hacks for dEQP"},
61 {"afbc", PAN_DBG_AFBC, "Enable non-conformant AFBC impl"},
62 {"sync", PAN_DBG_SYNC, "Wait for each job's completion and check for any GPU fault"},
63 {"precompile", PAN_DBG_PRECOMPILE, "Precompile shaders for shader-db"},
64 DEBUG_NAMED_VALUE_END
65 };
66
67 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
68
69 int pan_debug = 0;
70
71 static const char *
72 panfrost_get_name(struct pipe_screen *screen)
73 {
74 return panfrost_model_name(pan_screen(screen)->gpu_id);
75 }
76
77 static const char *
78 panfrost_get_vendor(struct pipe_screen *screen)
79 {
80 return "Panfrost";
81 }
82
83 static const char *
84 panfrost_get_device_vendor(struct pipe_screen *screen)
85 {
86 return "Arm";
87 }
88
89 static int
90 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
91 {
92 /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
93 bool is_deqp = pan_debug & PAN_DBG_DEQP;
94
95 switch (param) {
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
99 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
100 case PIPE_CAP_VERTEX_SHADER_SATURATE:
101 case PIPE_CAP_POINT_SPRITE:
102 return 1;
103
104 case PIPE_CAP_MAX_RENDER_TARGETS:
105 return is_deqp ? 4 : 1;
106
107 /* Throttling frames breaks pipelining */
108 case PIPE_CAP_THROTTLE:
109 return 0;
110
111 case PIPE_CAP_OCCLUSION_QUERY:
112 return 1;
113 case PIPE_CAP_QUERY_TIME_ELAPSED:
114 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
115 case PIPE_CAP_QUERY_TIMESTAMP:
116 case PIPE_CAP_QUERY_SO_OVERFLOW:
117 return 0;
118
119 case PIPE_CAP_TEXTURE_SWIZZLE:
120 return 1;
121
122 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
123 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
124 return 1;
125
126 case PIPE_CAP_TGSI_INSTANCEID:
127 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
128 return is_deqp ? 1 : 0;
129
130 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
131 return is_deqp ? 4 : 0;
132 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
133 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
134 return is_deqp ? 64 : 0;
135 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
136 return 1;
137
138 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
139 return is_deqp ? 256 : 0; /* for GL3 */
140
141 case PIPE_CAP_GLSL_FEATURE_LEVEL:
142 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
143 return is_deqp ? 140 : 120;
144 case PIPE_CAP_ESSL_FEATURE_LEVEL:
145 return is_deqp ? 300 : 120;
146
147 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
148 return is_deqp ? 16 : 0;
149
150 case PIPE_CAP_CUBE_MAP_ARRAY:
151 return is_deqp;
152
153 /* For faking GLES 3.1 for dEQP-GLES31 */
154 case PIPE_CAP_TEXTURE_MULTISAMPLE:
155 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
156 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
157 case PIPE_CAP_IMAGE_LOAD_FORMATTED:
158 return is_deqp;
159
160 /* For faking compute shaders */
161 case PIPE_CAP_COMPUTE:
162 return is_deqp;
163
164 /* TODO: Where does this req come from in practice? */
165 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
166 return 1;
167
168 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
169 return 4096;
170 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
171 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
172 return 13;
173
174 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
175 case PIPE_CAP_INDEP_BLEND_ENABLE:
176 case PIPE_CAP_INDEP_BLEND_FUNC:
177 return 1;
178
179 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
180 /* Hardware is natively upper left */
181 return 0;
182
183 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
184 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
185 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
186 case PIPE_CAP_GENERATE_MIPMAP:
187 return 1;
188
189 /* We would prefer varyings */
190 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
191 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
192 return 0;
193
194 /* I really don't want to set this CAP but let's not swim against the
195 * tide.. */
196 case PIPE_CAP_TGSI_TEXCOORD:
197 return 1;
198
199 case PIPE_CAP_SEAMLESS_CUBE_MAP:
200 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
201 return 1;
202
203 case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
204 return 0xffff;
205
206 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
207 return 1;
208
209 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
210 return 65536;
211
212 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
213 return 0;
214
215 case PIPE_CAP_ENDIANNESS:
216 return PIPE_ENDIAN_NATIVE;
217
218 case PIPE_CAP_SAMPLER_VIEW_TARGET:
219 return 1;
220
221 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
222 return -8;
223
224 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
225 return 7;
226
227 case PIPE_CAP_VENDOR_ID:
228 case PIPE_CAP_DEVICE_ID:
229 return 0xFFFFFFFF;
230
231 case PIPE_CAP_ACCELERATED:
232 case PIPE_CAP_UMA:
233 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
234 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
235 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
236 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
237 return 1;
238
239 case PIPE_CAP_VIDEO_MEMORY: {
240 uint64_t system_memory;
241
242 if (!os_get_total_physical_memory(&system_memory))
243 return 0;
244
245 return (int)(system_memory >> 20);
246 }
247
248 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
249 return 4;
250
251 case PIPE_CAP_MAX_VARYINGS:
252 return 16;
253
254 case PIPE_CAP_ALPHA_TEST:
255 case PIPE_CAP_FLATSHADE:
256 case PIPE_CAP_TWO_SIDED_COLOR:
257 case PIPE_CAP_CLIP_PLANES:
258 return 0;
259
260 default:
261 return u_pipe_screen_get_param_defaults(screen, param);
262 }
263 }
264
265 static int
266 panfrost_get_shader_param(struct pipe_screen *screen,
267 enum pipe_shader_type shader,
268 enum pipe_shader_cap param)
269 {
270 bool is_deqp = pan_debug & PAN_DBG_DEQP;
271
272 if (shader != PIPE_SHADER_VERTEX &&
273 shader != PIPE_SHADER_FRAGMENT &&
274 !(shader == PIPE_SHADER_COMPUTE && is_deqp))
275 return 0;
276
277 /* this is probably not totally correct.. but it's a start: */
278 switch (param) {
279 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
280 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
281 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
282 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
283 return 16384;
284
285 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
286 return 1024;
287
288 case PIPE_SHADER_CAP_MAX_INPUTS:
289 return 16;
290
291 case PIPE_SHADER_CAP_MAX_OUTPUTS:
292 return shader == PIPE_SHADER_FRAGMENT ? 4 : 16;
293
294 case PIPE_SHADER_CAP_MAX_TEMPS:
295 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
296
297 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
298 return 16 * 1024 * sizeof(float);
299
300 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
301 return PAN_MAX_CONST_BUFFERS;
302
303 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
304 return 0;
305
306 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
307 return 1;
308 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
309 return 0;
310
311 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
312 return 0;
313
314 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
315 return 1;
316
317 case PIPE_SHADER_CAP_SUBROUTINES:
318 return 0;
319
320 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
321 return 0;
322
323 case PIPE_SHADER_CAP_INTEGERS:
324 return 1;
325
326 case PIPE_SHADER_CAP_INT64_ATOMICS:
327 case PIPE_SHADER_CAP_FP16:
328 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
329 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
330 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
331 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
332 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
333 return 0;
334
335 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
336 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
337 return 16; /* XXX: How many? */
338
339 case PIPE_SHADER_CAP_PREFERRED_IR:
340 return PIPE_SHADER_IR_NIR;
341
342 case PIPE_SHADER_CAP_SUPPORTED_IRS:
343 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
344
345 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
346 return 32;
347
348 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
349 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
350 return is_deqp ? 4 : 0;
351 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
352 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
353 return 0;
354
355 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
356 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
357 return 0;
358
359 default:
360 fprintf(stderr, "unknown shader param %d\n", param);
361 return 0;
362 }
363
364 return 0;
365 }
366
367 static float
368 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
369 {
370 switch (param) {
371 case PIPE_CAPF_MAX_LINE_WIDTH:
372
373 /* fall-through */
374 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
375 return 255.0; /* arbitrary */
376
377 case PIPE_CAPF_MAX_POINT_WIDTH:
378
379 /* fall-through */
380 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
381 return 1024.0;
382
383 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
384 return 16.0;
385
386 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
387 return 16.0; /* arbitrary */
388
389 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
390 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
391 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
392 return 0.0f;
393
394 default:
395 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
396 return 0.0;
397 }
398 }
399
400 /**
401 * Query format support for creating a texture, drawing surface, etc.
402 * \param format the format to test
403 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
404 */
405 static bool
406 panfrost_is_format_supported( struct pipe_screen *screen,
407 enum pipe_format format,
408 enum pipe_texture_target target,
409 unsigned sample_count,
410 unsigned storage_sample_count,
411 unsigned bind)
412 {
413 const struct util_format_description *format_desc;
414
415 assert(target == PIPE_BUFFER ||
416 target == PIPE_TEXTURE_1D ||
417 target == PIPE_TEXTURE_1D_ARRAY ||
418 target == PIPE_TEXTURE_2D ||
419 target == PIPE_TEXTURE_2D_ARRAY ||
420 target == PIPE_TEXTURE_RECT ||
421 target == PIPE_TEXTURE_3D ||
422 target == PIPE_TEXTURE_CUBE ||
423 target == PIPE_TEXTURE_CUBE_ARRAY);
424
425 format_desc = util_format_description(format);
426
427 if (!format_desc)
428 return false;
429
430 if (sample_count > 1)
431 return false;
432
433 /* Format wishlist */
434 if (format == PIPE_FORMAT_X8Z24_UNORM)
435 return false;
436
437 if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
438 return false;
439
440 /* TODO */
441 if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
442 return FALSE;
443
444 /* Don't confuse poorly written apps (workaround dEQP bug) that expect
445 * more alpha than they ask for */
446
447 bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
448 bool renderable = bind & PIPE_BIND_RENDER_TARGET;
449
450 if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
451 return false;
452
453 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&
454 format_desc->layout != UTIL_FORMAT_LAYOUT_OTHER) {
455 /* Compressed formats not yet hooked up. */
456 return false;
457 }
458
459 /* Internally, formats that are depth/stencil renderable are limited.
460 *
461 * In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
462 * rendering perspective. That is, we render to Z24S8 (which we can
463 * AFBC compress), ignore the different when texturing (who cares?),
464 * and then in the off-chance there's a CPU read we blit back to
465 * staging.
466 *
467 * ...alternatively, we can make the state tracker deal with that. */
468
469 if (bind & PIPE_BIND_DEPTH_STENCIL) {
470 switch (format) {
471 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
472 case PIPE_FORMAT_Z24X8_UNORM:
473 case PIPE_FORMAT_Z32_UNORM:
474 case PIPE_FORMAT_Z32_FLOAT:
475 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
476 return true;
477
478 default:
479 return false;
480 }
481 }
482
483 return true;
484 }
485
486 static int
487 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
488 enum pipe_compute_cap param, void *ret)
489 {
490 const char * const ir = "panfrost";
491
492 if (!(pan_debug & PAN_DBG_DEQP))
493 return 0;
494
495 #define RET(x) do { \
496 if (ret) \
497 memcpy(ret, x, sizeof(x)); \
498 return sizeof(x); \
499 } while (0)
500
501 switch (param) {
502 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
503 RET((uint32_t []){ 64 });
504
505 case PIPE_COMPUTE_CAP_IR_TARGET:
506 if (ret)
507 sprintf(ret, "%s", ir);
508 return strlen(ir) * sizeof(char);
509
510 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
511 RET((uint64_t []) { 3 });
512
513 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
514 RET(((uint64_t []) { 65535, 65535, 65535 }));
515
516 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
517 RET(((uint64_t []) { 1024, 1024, 64 }));
518
519 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
520 RET((uint64_t []) { 1024 });
521
522 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
523 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
524
525 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
526 RET((uint64_t []) { 32768 });
527
528 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
529 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
530 RET((uint64_t []) { 4096 });
531
532 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
533 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
534
535 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
536 RET((uint32_t []) { 800 /* MHz -- TODO */ });
537
538 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
539 RET((uint32_t []) { 9999 }); // TODO
540
541 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
542 RET((uint32_t []) { 1 }); // TODO
543
544 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
545 RET((uint32_t []) { 32 }); // TODO
546
547 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
548 RET((uint64_t []) { 1024 }); // TODO
549 }
550
551 return 0;
552 }
553
554 static void
555 panfrost_destroy_screen(struct pipe_screen *pscreen)
556 {
557 struct panfrost_screen *screen = pan_screen(pscreen);
558 panfrost_bo_cache_evict_all(screen);
559 pthread_mutex_destroy(&screen->bo_cache.lock);
560 pthread_mutex_destroy(&screen->active_bos_lock);
561 drmFreeVersion(screen->kernel_version);
562 ralloc_free(screen);
563 }
564
565 static void
566 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
567 struct pipe_resource *resource,
568 unsigned level, unsigned layer,
569 void *context_private,
570 struct pipe_box *sub_box)
571 {
572 /* TODO: Display target integration */
573 }
574
575 static uint64_t
576 panfrost_get_timestamp(struct pipe_screen *_screen)
577 {
578 return os_time_get_nano();
579 }
580
581 static void
582 panfrost_fence_reference(struct pipe_screen *pscreen,
583 struct pipe_fence_handle **ptr,
584 struct pipe_fence_handle *fence)
585 {
586 struct panfrost_fence **p = (struct panfrost_fence **)ptr;
587 struct panfrost_fence *f = (struct panfrost_fence *)fence;
588 struct panfrost_fence *old = *p;
589
590 if (pipe_reference(&(*p)->reference, &f->reference)) {
591 util_dynarray_foreach(&old->syncfds, int, fd)
592 close(*fd);
593 util_dynarray_fini(&old->syncfds);
594 free(old);
595 }
596 *p = f;
597 }
598
599 static bool
600 panfrost_fence_finish(struct pipe_screen *pscreen,
601 struct pipe_context *ctx,
602 struct pipe_fence_handle *fence,
603 uint64_t timeout)
604 {
605 struct panfrost_screen *screen = pan_screen(pscreen);
606 struct panfrost_fence *f = (struct panfrost_fence *)fence;
607 struct util_dynarray syncobjs;
608 int ret;
609
610 /* All fences were already signaled */
611 if (!util_dynarray_num_elements(&f->syncfds, int))
612 return true;
613
614 util_dynarray_init(&syncobjs, NULL);
615 util_dynarray_foreach(&f->syncfds, int, fd) {
616 uint32_t syncobj;
617
618 ret = drmSyncobjCreate(screen->fd, 0, &syncobj);
619 assert(!ret);
620
621 ret = drmSyncobjImportSyncFile(screen->fd, syncobj, *fd);
622 assert(!ret);
623 util_dynarray_append(&syncobjs, uint32_t, syncobj);
624 }
625
626 uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
627 if (abs_timeout == OS_TIMEOUT_INFINITE)
628 abs_timeout = INT64_MAX;
629
630 ret = drmSyncobjWait(screen->fd, util_dynarray_begin(&syncobjs),
631 util_dynarray_num_elements(&syncobjs, uint32_t),
632 abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
633 NULL);
634
635 util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
636 drmSyncobjDestroy(screen->fd, *syncobj);
637
638 return ret >= 0;
639 }
640
641 struct panfrost_fence *
642 panfrost_fence_create(struct panfrost_context *ctx,
643 struct util_dynarray *fences)
644 {
645 struct panfrost_screen *screen = pan_screen(ctx->base.screen);
646 struct panfrost_fence *f = calloc(1, sizeof(*f));
647 if (!f)
648 return NULL;
649
650 util_dynarray_init(&f->syncfds, NULL);
651
652 /* Export fences from all pending batches. */
653 util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
654 int fd = -1;
655
656 /* The fence is already signaled, no need to export it. */
657 if ((*fence)->signaled)
658 continue;
659
660 drmSyncobjExportSyncFile(screen->fd, (*fence)->syncobj, &fd);
661 if (fd == -1)
662 fprintf(stderr, "export failed: %m\n");
663
664 assert(fd != -1);
665 util_dynarray_append(&f->syncfds, int, fd);
666 }
667
668 pipe_reference_init(&f->reference, 1);
669
670 return f;
671 }
672
673 static const void *
674 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
675 enum pipe_shader_ir ir,
676 enum pipe_shader_type shader)
677 {
678 return &midgard_nir_options;
679 }
680
681 static uint32_t
682 panfrost_active_bos_hash(const void *key)
683 {
684 const struct panfrost_bo *bo = key;
685
686 return _mesa_hash_data(&bo->gem_handle, sizeof(bo->gem_handle));
687 }
688
689 static bool
690 panfrost_active_bos_cmp(const void *keya, const void *keyb)
691 {
692 const struct panfrost_bo *a = keya, *b = keyb;
693
694 return a->gem_handle == b->gem_handle;
695 }
696
697 struct pipe_screen *
698 panfrost_create_screen(int fd, struct renderonly *ro)
699 {
700 pan_debug = debug_get_option_pan_debug();
701
702 /* Blacklist apps known to be buggy under Panfrost */
703 const char *proc = util_get_process_name();
704 const char *blacklist[] = {
705 "chromium",
706 "chrome",
707 };
708
709 for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
710 if ((strcmp(blacklist[i], proc) == 0))
711 return NULL;
712 }
713
714 /* Create the screen */
715 struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
716
717 if (!screen)
718 return NULL;
719
720 if (ro) {
721 screen->ro = renderonly_dup(ro);
722 if (!screen->ro) {
723 fprintf(stderr, "Failed to dup renderonly object\n");
724 free(screen);
725 return NULL;
726 }
727 }
728
729 screen->fd = fd;
730
731 screen->gpu_id = panfrost_query_gpu_version(screen->fd);
732 screen->core_count = panfrost_query_core_count(screen->fd);
733 screen->thread_tls_alloc = panfrost_query_thread_tls_alloc(screen->fd);
734 screen->quirks = panfrost_get_quirks(screen->gpu_id);
735 screen->kernel_version = drmGetVersion(fd);
736
737 /* Check if we're loading against a supported GPU model. */
738
739 switch (screen->gpu_id) {
740 case 0x720: /* T720 */
741 case 0x750: /* T760 */
742 case 0x820: /* T820 */
743 case 0x860: /* T860 */
744 break;
745 default:
746 /* Fail to load against untested models */
747 debug_printf("panfrost: Unsupported model %X", screen->gpu_id);
748 return NULL;
749 }
750
751 pthread_mutex_init(&screen->active_bos_lock, NULL);
752 screen->active_bos = _mesa_set_create(screen, panfrost_active_bos_hash,
753 panfrost_active_bos_cmp);
754
755 pthread_mutex_init(&screen->bo_cache.lock, NULL);
756 list_inithead(&screen->bo_cache.lru);
757 for (unsigned i = 0; i < ARRAY_SIZE(screen->bo_cache.buckets); ++i)
758 list_inithead(&screen->bo_cache.buckets[i]);
759
760 if (pan_debug & PAN_DBG_TRACE)
761 pandecode_initialize();
762
763 screen->base.destroy = panfrost_destroy_screen;
764
765 screen->base.get_name = panfrost_get_name;
766 screen->base.get_vendor = panfrost_get_vendor;
767 screen->base.get_device_vendor = panfrost_get_device_vendor;
768 screen->base.get_param = panfrost_get_param;
769 screen->base.get_shader_param = panfrost_get_shader_param;
770 screen->base.get_compute_param = panfrost_get_compute_param;
771 screen->base.get_paramf = panfrost_get_paramf;
772 screen->base.get_timestamp = panfrost_get_timestamp;
773 screen->base.is_format_supported = panfrost_is_format_supported;
774 screen->base.context_create = panfrost_create_context;
775 screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
776 screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
777 screen->base.fence_reference = panfrost_fence_reference;
778 screen->base.fence_finish = panfrost_fence_finish;
779 screen->base.set_damage_region = panfrost_resource_set_damage_region;
780
781 panfrost_resource_screen_init(screen);
782
783 return &screen->base;
784 }