src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25  * SOFTWARE.
  26  *
  27  */
  28
  29 #include "util/u_debug.h"
  30 #include "util/u_memory.h"
  31 #include "util/format/u_format.h"
  32 #include "util/format/u_format_s3tc.h"
  33 #include "util/u_video.h"
  34 #include "util/u_screen.h"
  35 #include "util/os_time.h"
  36 #include "util/u_process.h"
  37 #include "pipe/p_defines.h"
  38 #include "pipe/p_screen.h"
  39 #include "draw/draw_context.h"
  40
  41 #include <fcntl.h>
  42
  43 #include "drm-uapi/drm_fourcc.h"
  44 #include "drm-uapi/panfrost_drm.h"
  45
  46 #include "pan_bo.h"
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51 #include "pandecode/decode.h"
  52
  53 #include "pan_context.h"
  54 #include "midgard/midgard_compile.h"
  55 #include "bifrost/bifrost_compile.h"
  56 #include "panfrost-quirks.h"
  57
  58 static const struct debug_named_value debug_options[] = {
  59         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  60         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  61         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  62         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  63         {"sync",      PAN_DBG_SYNC,     "Wait for each job's completion and check for any GPU fault"},
  64         {"precompile", PAN_DBG_PRECOMPILE, "Precompile shaders for shader-db"},
  65         {"gles3",     PAN_DBG_GLES3,    "Enable experimental GLES3 implementation"},
  66         {"fp16",     PAN_DBG_FP16,     "Enable buggy experimental (don't use!) fp16"},
  67         {"bifrost",   PAN_DBG_BIFROST, "Enable experimental Mali G31 and G52 support"},
  68         {"gl3",       PAN_DBG_GL3,      "Enable experimental GL 3.x implementation, up to 3.3"},
  69         DEBUG_NAMED_VALUE_END
  70 };
  71
  72 static const char *
  73 panfrost_get_name(struct pipe_screen *screen)
  74 {
  75         return panfrost_model_name(pan_device(screen)->gpu_id);
  76 }
  77
  78 static const char *
  79 panfrost_get_vendor(struct pipe_screen *screen)
  80 {
  81         return "Panfrost";
  82 }
  83
  84 static const char *
  85 panfrost_get_device_vendor(struct pipe_screen *screen)
  86 {
  87         return "Arm";
  88 }
  89
  90 static int
  91 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  92 {
  93         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  94         struct panfrost_device *dev = pan_device(screen);
  95         bool is_deqp = dev->debug & PAN_DBG_DEQP;
  96
  97         /* Our GL 3.x implementation is WIP */
  98         bool is_gl3 = dev->debug & PAN_DBG_GL3;
  99         is_gl3 |= is_deqp;
 100
 101         /* Same with GLES 3 */
 102         bool is_gles3 = dev->debug & PAN_DBG_GLES3;
 103         is_gles3 |= is_gl3;
 104
 105         switch (param) {
 106         case PIPE_CAP_NPOT_TEXTURES:
 107         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 108         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 109         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 110         case PIPE_CAP_VERTEX_SHADER_SATURATE:
 111         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 112         case PIPE_CAP_POINT_SPRITE:
 113         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 114         case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 115                 return 1;
 116
 117         case PIPE_CAP_MAX_RENDER_TARGETS:
 118         case PIPE_CAP_FBFETCH:
 119         case PIPE_CAP_FBFETCH_COHERENT:
 120                 return is_gles3 ? 4 : 1;
 121
 122         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 123                 return 1;
 124
 125         /* Throttling frames breaks pipelining */
 126         case PIPE_CAP_THROTTLE:
 127                 return 0;
 128
 129         case PIPE_CAP_OCCLUSION_QUERY:
 130                 return 1;
 131         case PIPE_CAP_QUERY_TIME_ELAPSED:
 132         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 133         case PIPE_CAP_QUERY_SO_OVERFLOW:
 134                 return 0;
 135
 136         case PIPE_CAP_TEXTURE_SWIZZLE:
 137                 return 1;
 138
 139         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 140         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 141                 return 1;
 142
 143         case PIPE_CAP_TGSI_INSTANCEID:
 144         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 145         case PIPE_CAP_PRIMITIVE_RESTART:
 146         case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
 147                 return 1;
 148
 149         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 150                 return is_gles3 ? 4 : 0;
 151         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 152         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 153                 return is_gles3 ? 64 : 0;
 154         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 155                 return 1;
 156
 157         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 158                 return 256;
 159
 160         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 161         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 162                 return is_gl3 ? 330 : (is_gles3 ? 140 : 120);
 163         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 164                 return is_gles3 ? 300 : 120;
 165
 166         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 167                 return 16;
 168
 169         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 170                 return is_gles3;
 171
 172         /* For faking GLES 3.1 for dEQP-GLES31 */
 173         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 174         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 175         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 176         case PIPE_CAP_CUBE_MAP_ARRAY:
 177                 return is_deqp;
 178
 179         /* For faking compute shaders */
 180         case PIPE_CAP_COMPUTE:
 181                 return is_deqp;
 182
 183         case PIPE_CAP_QUERY_TIMESTAMP:
 184         case PIPE_CAP_CONDITIONAL_RENDER:
 185                 return is_gl3;
 186
 187         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 188                 return 4096;
 189         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 190         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 191                 return 13;
 192
 193         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 194         case PIPE_CAP_INDEP_BLEND_ENABLE:
 195         case PIPE_CAP_INDEP_BLEND_FUNC:
 196                 return 1;
 197
 198         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 199                 /* Hardware is natively upper left */
 200                 return 0;
 201
 202         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 203         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 204         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 205         case PIPE_CAP_GENERATE_MIPMAP:
 206                 return 1;
 207
 208         /* We would prefer varyings on Midgard, but proper sysvals on Bifrost */
 209         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 210         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 211         case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
 212                 return dev->quirks & IS_BIFROST;
 213
 214         /* I really don't want to set this CAP but let's not swim against the
 215          * tide.. */
 216         case PIPE_CAP_TGSI_TEXCOORD:
 217                 return 1;
 218
 219         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 220         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 221                 return 1;
 222
 223         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 224                 return 0xffff;
 225
 226         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 227                 return 1;
 228
 229         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 230                 return 65536;
 231
 232         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 233                 return 0;
 234
 235         case PIPE_CAP_ENDIANNESS:
 236                 return PIPE_ENDIAN_NATIVE;
 237
 238         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 239                 return 1;
 240
 241         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 242                 return -8;
 243
 244         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 245                 return 7;
 246
 247         case PIPE_CAP_VENDOR_ID:
 248         case PIPE_CAP_DEVICE_ID:
 249                 return 0xFFFFFFFF;
 250
 251         case PIPE_CAP_ACCELERATED:
 252         case PIPE_CAP_UMA:
 253         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 254         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 255         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 256         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 257                 return 1;
 258
 259         case PIPE_CAP_VIDEO_MEMORY: {
 260                 uint64_t system_memory;
 261
 262                 if (!os_get_total_physical_memory(&system_memory))
 263                         return 0;
 264
 265                 return (int)(system_memory >> 20);
 266         }
 267
 268         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 269                 return 1;
 270
 271         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 272                 return 4;
 273
 274         case PIPE_CAP_MAX_VARYINGS:
 275                 return 16;
 276
 277         case PIPE_CAP_ALPHA_TEST:
 278         case PIPE_CAP_FLATSHADE:
 279         case PIPE_CAP_TWO_SIDED_COLOR:
 280         case PIPE_CAP_CLIP_PLANES:
 281                 return 0;
 282
 283         case PIPE_CAP_PACKED_STREAM_OUTPUT:
 284                 return 0;
 285
 286         case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED:
 287         case PIPE_CAP_PSIZ_CLAMPED:
 288                 return 1;
 289
 290         default:
 291                 return u_pipe_screen_get_param_defaults(screen, param);
 292         }
 293 }
 294
 295 static int
 296 panfrost_get_shader_param(struct pipe_screen *screen,
 297                           enum pipe_shader_type shader,
 298                           enum pipe_shader_cap param)
 299 {
 300         struct panfrost_device *dev = pan_device(screen);
 301         bool is_deqp = dev->debug & PAN_DBG_DEQP;
 302         bool is_fp16 = dev->debug & PAN_DBG_FP16;
 303
 304         if (shader != PIPE_SHADER_VERTEX &&
 305             shader != PIPE_SHADER_FRAGMENT &&
 306             !(shader == PIPE_SHADER_COMPUTE && is_deqp))
 307                 return 0;
 308
 309         /* this is probably not totally correct.. but it's a start: */
 310         switch (param) {
 311         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 312         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 313         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 314         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 315                 return 16384;
 316
 317         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 318                 return 1024;
 319
 320         case PIPE_SHADER_CAP_MAX_INPUTS:
 321                 return 16;
 322
 323         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 324                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 16;
 325
 326         case PIPE_SHADER_CAP_MAX_TEMPS:
 327                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 328
 329         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 330                 return 16 * 1024 * sizeof(float);
 331
 332         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 333                 return PAN_MAX_CONST_BUFFERS;
 334
 335         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 336                 return 0;
 337
 338         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 339                 return 1;
 340         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 341                 return 0;
 342
 343         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 344                 return 0;
 345
 346         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 347                 return 1;
 348
 349         case PIPE_SHADER_CAP_SUBROUTINES:
 350                 return 0;
 351
 352         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 353                 return 0;
 354
 355         case PIPE_SHADER_CAP_INTEGERS:
 356                 return 1;
 357
 358         case PIPE_SHADER_CAP_FP16:
 359                 return !(dev->quirks & MIDGARD_BROKEN_FP16) || is_fp16;
 360
 361         case PIPE_SHADER_CAP_FP16_DERIVATIVES:
 362         case PIPE_SHADER_CAP_INT16:
 363         case PIPE_SHADER_CAP_GLSL_16BIT_TEMPS:
 364         case PIPE_SHADER_CAP_INT64_ATOMICS:
 365         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 366         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 367         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 368         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 369         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 370                 return 0;
 371
 372         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 373         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 374                 return 16; /* XXX: How many? */
 375
 376         case PIPE_SHADER_CAP_PREFERRED_IR:
 377                 return PIPE_SHADER_IR_NIR;
 378
 379         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 380                 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
 381
 382         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 383                 return 32;
 384
 385         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 386         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 387                 return is_deqp ? 8 : 0;
 388         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 389         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 390                 return 0;
 391
 392         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 393         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 394                 return 0;
 395
 396         default:
 397                 /* Other params are unknown */
 398                 return 0;
 399         }
 400
 401         return 0;
 402 }
 403
 404 static float
 405 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 406 {
 407         switch (param) {
 408         case PIPE_CAPF_MAX_LINE_WIDTH:
 409
 410         /* fall-through */
 411         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 412                 return 255.0; /* arbitrary */
 413
 414         case PIPE_CAPF_MAX_POINT_WIDTH:
 415
 416         /* fall-through */
 417         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 418                 return 1024.0;
 419
 420         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 421                 return 16.0;
 422
 423         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 424                 return 16.0; /* arbitrary */
 425
 426         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 427         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 428         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 429                 return 0.0f;
 430
 431         default:
 432                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 433                 return 0.0;
 434         }
 435 }
 436
 437 /**
 438  * Query format support for creating a texture, drawing surface, etc.
 439  * \param format  the format to test
 440  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 441  */
 442 static bool
 443 panfrost_is_format_supported( struct pipe_screen *screen,
 444                               enum pipe_format format,
 445                               enum pipe_texture_target target,
 446                               unsigned sample_count,
 447                               unsigned storage_sample_count,
 448                               unsigned bind)
 449 {
 450         struct panfrost_device *dev = pan_device(screen);
 451         const struct util_format_description *format_desc;
 452
 453         assert(target == PIPE_BUFFER ||
 454                target == PIPE_TEXTURE_1D ||
 455                target == PIPE_TEXTURE_1D_ARRAY ||
 456                target == PIPE_TEXTURE_2D ||
 457                target == PIPE_TEXTURE_2D_ARRAY ||
 458                target == PIPE_TEXTURE_RECT ||
 459                target == PIPE_TEXTURE_3D ||
 460                target == PIPE_TEXTURE_CUBE ||
 461                target == PIPE_TEXTURE_CUBE_ARRAY);
 462
 463         format_desc = util_format_description(format);
 464
 465         if (!format_desc)
 466                 return false;
 467
 468         /* MSAA 4x supported, but no more. Technically some revisions of the
 469          * hardware can go up to 16x but we don't support higher modes yet.
 470          * MSAA 2x is notably not supported and gets rounded up to MSAA 4x. */
 471
 472         if (!(sample_count == 0 || sample_count == 1 || sample_count == 4))
 473                 return false;
 474
 475         if (MAX2(sample_count, 1) != MAX2(storage_sample_count, 1))
 476                 return false;
 477
 478         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 479          * more alpha than they ask for */
 480
 481         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 482         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 483
 484         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 485                 return false;
 486
 487         if (dev->debug & (PAN_DBG_GL3 | PAN_DBG_DEQP)) {
 488                 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC)
 489                         return true;
 490         }
 491
 492         /* Check we support the format with the given bind */
 493
 494         unsigned relevant_bind = bind &
 495                 ( PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET
 496                 | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_SAMPLER_VIEW);
 497
 498         struct panfrost_format fmt = panfrost_pipe_format_table[format];
 499
 500         /* Also check that compressed texture formats are supported on this
 501          * particular chip. They may not be depending on system integration
 502          * differences. */
 503
 504         if (!panfrost_supports_compressed_format(dev, fmt.hw))
 505                 return false;
 506
 507         return fmt.hw && ((relevant_bind & ~fmt.bind) == 0);
 508 }
 509
 510 static int
 511 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
 512                 enum pipe_compute_cap param, void *ret)
 513 {
 514         struct panfrost_device *dev = pan_device(pscreen);
 515         const char * const ir = "panfrost";
 516
 517         if (!(dev->debug & PAN_DBG_DEQP))
 518                 return 0;
 519
 520 #define RET(x) do {                  \
 521    if (ret)                          \
 522       memcpy(ret, x, sizeof(x));     \
 523    return sizeof(x);                 \
 524 } while (0)
 525
 526         switch (param) {
 527         case PIPE_COMPUTE_CAP_ADDRESS_BITS:
 528                 RET((uint32_t []){ 64 });
 529
 530         case PIPE_COMPUTE_CAP_IR_TARGET:
 531                 if (ret)
 532                         sprintf(ret, "%s", ir);
 533                 return strlen(ir) * sizeof(char);
 534
 535         case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 536                 RET((uint64_t []) { 3 });
 537
 538         case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 539                 RET(((uint64_t []) { 65535, 65535, 65535 }));
 540
 541         case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 542                 RET(((uint64_t []) { 1024, 1024, 64 }));
 543
 544         case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 545                 RET((uint64_t []) { 1024 });
 546
 547         case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 548                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 549
 550         case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 551                 RET((uint64_t []) { 32768 });
 552
 553         case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 554         case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 555                 RET((uint64_t []) { 4096 });
 556
 557         case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 558                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 559
 560         case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 561                 RET((uint32_t []) { 800 /* MHz -- TODO */ });
 562
 563         case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 564                 RET((uint32_t []) { 9999 });  // TODO
 565
 566         case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 567                 RET((uint32_t []) { 1 }); // TODO
 568
 569         case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 570                 RET((uint32_t []) { 32 });  // TODO
 571
 572         case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
 573                 RET((uint64_t []) { 1024 }); // TODO
 574         }
 575
 576         return 0;
 577 }
 578
 579 static void
 580 panfrost_destroy_screen(struct pipe_screen *pscreen)
 581 {
 582         panfrost_close_device(pan_device(pscreen));
 583         ralloc_free(pscreen);
 584 }
 585
 586 static uint64_t
 587 panfrost_get_timestamp(struct pipe_screen *_screen)
 588 {
 589         return os_time_get_nano();
 590 }
 591
 592 static void
 593 panfrost_fence_reference(struct pipe_screen *pscreen,
 594                          struct pipe_fence_handle **ptr,
 595                          struct pipe_fence_handle *fence)
 596 {
 597         struct panfrost_fence **p = (struct panfrost_fence **)ptr;
 598         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 599         struct panfrost_fence *old = *p;
 600
 601         if (pipe_reference(&(*p)->reference, &f->reference)) {
 602                 util_dynarray_foreach(&old->syncfds, int, fd)
 603                         close(*fd);
 604                 util_dynarray_fini(&old->syncfds);
 605                 free(old);
 606         }
 607         *p = f;
 608 }
 609
 610 static bool
 611 panfrost_fence_finish(struct pipe_screen *pscreen,
 612                       struct pipe_context *ctx,
 613                       struct pipe_fence_handle *fence,
 614                       uint64_t timeout)
 615 {
 616         struct panfrost_device *dev = pan_device(pscreen);
 617         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 618         struct util_dynarray syncobjs;
 619         int ret;
 620
 621         /* All fences were already signaled */
 622         if (!util_dynarray_num_elements(&f->syncfds, int))
 623                 return true;
 624
 625         util_dynarray_init(&syncobjs, NULL);
 626         util_dynarray_foreach(&f->syncfds, int, fd) {
 627                 uint32_t syncobj;
 628
 629                 ret = drmSyncobjCreate(dev->fd, 0, &syncobj);
 630                 assert(!ret);
 631
 632                 ret = drmSyncobjImportSyncFile(dev->fd, syncobj, *fd);
 633                 assert(!ret);
 634                 util_dynarray_append(&syncobjs, uint32_t, syncobj);
 635         }
 636
 637         uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
 638         if (abs_timeout == OS_TIMEOUT_INFINITE)
 639                 abs_timeout = INT64_MAX;
 640
 641         ret = drmSyncobjWait(dev->fd, util_dynarray_begin(&syncobjs),
 642                              util_dynarray_num_elements(&syncobjs, uint32_t),
 643                              abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
 644                              NULL);
 645
 646         util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
 647                 drmSyncobjDestroy(dev->fd, *syncobj);
 648
 649         return ret >= 0;
 650 }
 651
 652 struct panfrost_fence *
 653 panfrost_fence_create(struct panfrost_context *ctx,
 654                       struct util_dynarray *fences)
 655 {
 656         struct panfrost_device *device = pan_device(ctx->base.screen);
 657         struct panfrost_fence *f = calloc(1, sizeof(*f));
 658         if (!f)
 659                 return NULL;
 660
 661         util_dynarray_init(&f->syncfds, NULL);
 662
 663         /* Export fences from all pending batches. */
 664         util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
 665                 int fd = -1;
 666
 667                 /* The fence is already signaled, no need to export it. */
 668                 if ((*fence)->signaled)
 669                         continue;
 670
 671                 drmSyncobjExportSyncFile(device->fd, (*fence)->syncobj, &fd);
 672                 if (fd == -1)
 673                         fprintf(stderr, "export failed: %m\n");
 674
 675                 assert(fd != -1);
 676                 util_dynarray_append(&f->syncfds, int, fd);
 677         }
 678
 679         pipe_reference_init(&f->reference, 1);
 680
 681         return f;
 682 }
 683
 684 static const void *
 685 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 686                                      enum pipe_shader_ir ir,
 687                                      enum pipe_shader_type shader)
 688 {
 689         if (pan_device(pscreen)->quirks & IS_BIFROST)
 690                 return &bifrost_nir_options;
 691         else
 692                 return &midgard_nir_options;
 693 }
 694
 695 struct pipe_screen *
 696 panfrost_create_screen(int fd, struct renderonly *ro)
 697 {
 698         /* Blacklist apps known to be buggy under Panfrost */
 699         const char *proc = util_get_process_name();
 700         const char *blacklist[] = {
 701                 "chromium",
 702                 "chrome",
 703         };
 704
 705         for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
 706                 if ((strcmp(blacklist[i], proc) == 0))
 707                         return NULL;
 708         }
 709
 710         /* Create the screen */
 711         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 712
 713         if (!screen)
 714                 return NULL;
 715
 716         struct panfrost_device *dev = pan_device(&screen->base);
 717         panfrost_open_device(screen, fd, dev);
 718
 719         dev->debug = debug_get_flags_option("PAN_MESA_DEBUG", debug_options, 0);
 720
 721         if (ro) {
 722                 dev->ro = renderonly_dup(ro);
 723                 if (!dev->ro) {
 724                         if (dev->debug & PAN_DBG_MSGS)
 725                                 fprintf(stderr, "Failed to dup renderonly object\n");
 726
 727                         free(screen);
 728                         return NULL;
 729                 }
 730         }
 731
 732         /* Check if we're loading against a supported GPU model. */
 733
 734         switch (dev->gpu_id) {
 735         case 0x720: /* T720 */
 736         case 0x750: /* T760 */
 737         case 0x820: /* T820 */
 738         case 0x860: /* T860 */
 739                 break;
 740         case 0x7093: /* G31 */
 741         case 0x7212: /* G52 */
 742                 if (dev->debug & PAN_DBG_BIFROST)
 743                         break;
 744
 745                 /* fallthrough */
 746         default:
 747                 /* Fail to load against untested models */
 748                 debug_printf("panfrost: Unsupported model %X", dev->gpu_id);
 749                 panfrost_destroy_screen(&(screen->base));
 750                 return NULL;
 751         }
 752
 753         if (dev->debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
 754                 pandecode_initialize(!(dev->debug & PAN_DBG_TRACE));
 755
 756         screen->base.destroy = panfrost_destroy_screen;
 757
 758         screen->base.get_name = panfrost_get_name;
 759         screen->base.get_vendor = panfrost_get_vendor;
 760         screen->base.get_device_vendor = panfrost_get_device_vendor;
 761         screen->base.get_param = panfrost_get_param;
 762         screen->base.get_shader_param = panfrost_get_shader_param;
 763         screen->base.get_compute_param = panfrost_get_compute_param;
 764         screen->base.get_paramf = panfrost_get_paramf;
 765         screen->base.get_timestamp = panfrost_get_timestamp;
 766         screen->base.is_format_supported = panfrost_is_format_supported;
 767         screen->base.context_create = panfrost_create_context;
 768         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 769         screen->base.fence_reference = panfrost_fence_reference;
 770         screen->base.fence_finish = panfrost_fence_finish;
 771         screen->base.set_damage_region = panfrost_resource_set_damage_region;
 772
 773         panfrost_resource_screen_init(&screen->base);
 774
 775         return &screen->base;
 776 }