src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25  * SOFTWARE.
  26  *
  27  */
  28
  29 #include "util/u_debug.h"
  30 #include "util/u_memory.h"
  31 #include "util/format/u_format.h"
  32 #include "util/format/u_format_s3tc.h"
  33 #include "util/u_video.h"
  34 #include "util/u_screen.h"
  35 #include "util/os_time.h"
  36 #include "util/u_process.h"
  37 #include "pipe/p_defines.h"
  38 #include "pipe/p_screen.h"
  39 #include "draw/draw_context.h"
  40
  41 #include <fcntl.h>
  42
  43 #include "drm-uapi/drm_fourcc.h"
  44 #include "drm-uapi/panfrost_drm.h"
  45
  46 #include "pan_bo.h"
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51 #include "pandecode/decode.h"
  52
  53 #include "pan_context.h"
  54 #include "midgard/midgard_compile.h"
  55 #include "panfrost-quirks.h"
  56
  57 static const struct debug_named_value debug_options[] = {
  58         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  59         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  60         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  61         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  62         {"sync",      PAN_DBG_SYNC,     "Wait for each job's completion and check for any GPU fault"},
  63         {"precompile", PAN_DBG_PRECOMPILE, "Precompile shaders for shader-db"},
  64         DEBUG_NAMED_VALUE_END
  65 };
  66
  67 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  68
  69 int pan_debug = 0;
  70
  71 static const char *
  72 panfrost_get_name(struct pipe_screen *screen)
  73 {
  74         return panfrost_model_name(pan_screen(screen)->gpu_id);
  75 }
  76
  77 static const char *
  78 panfrost_get_vendor(struct pipe_screen *screen)
  79 {
  80         return "Panfrost";
  81 }
  82
  83 static const char *
  84 panfrost_get_device_vendor(struct pipe_screen *screen)
  85 {
  86         return "Arm";
  87 }
  88
  89 static int
  90 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  91 {
  92         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  93         bool is_deqp = pan_debug & PAN_DBG_DEQP;
  94
  95         switch (param) {
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 100         case PIPE_CAP_VERTEX_SHADER_SATURATE:
 101         case PIPE_CAP_POINT_SPRITE:
 102                 return 1;
 103
 104         case PIPE_CAP_MAX_RENDER_TARGETS:
 105                 return is_deqp ? 4 : 1;
 106
 107         /* Throttling frames breaks pipelining */
 108         case PIPE_CAP_THROTTLE:
 109                 return 0;
 110
 111         case PIPE_CAP_OCCLUSION_QUERY:
 112                 return 1;
 113         case PIPE_CAP_QUERY_TIME_ELAPSED:
 114         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 115         case PIPE_CAP_QUERY_TIMESTAMP:
 116         case PIPE_CAP_QUERY_SO_OVERFLOW:
 117                 return 0;
 118
 119         case PIPE_CAP_TEXTURE_SWIZZLE:
 120                 return 1;
 121
 122         case PIPE_CAP_TGSI_INSTANCEID:
 123         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 124                 return is_deqp ? 1 : 0;
 125
 126         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 127                 return is_deqp ? 4 : 0;
 128         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 129         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 130                 return is_deqp ? 64 : 0;
 131         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 132                 return 1;
 133
 134         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 135                 return is_deqp ? 256 : 0; /* for GL3 */
 136
 137         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 138         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 139                 return is_deqp ? 140 : 120;
 140         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 141                 return is_deqp ? 300 : 120;
 142
 143         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 144                 return is_deqp ? 16 : 0;
 145
 146         case PIPE_CAP_CUBE_MAP_ARRAY:
 147                 return is_deqp;
 148
 149         /* For faking GLES 3.1 for dEQP-GLES31 */
 150         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 151         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 152         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 153         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 154                 return is_deqp;
 155
 156         /* For faking compute shaders */
 157         case PIPE_CAP_COMPUTE:
 158                 return is_deqp;
 159
 160         /* TODO: Where does this req come from in practice? */
 161         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 162                 return 1;
 163
 164         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 165                 return 4096;
 166         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 167         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 168                 return 13;
 169
 170         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 171         case PIPE_CAP_INDEP_BLEND_ENABLE:
 172         case PIPE_CAP_INDEP_BLEND_FUNC:
 173                 return 1;
 174
 175         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 176                 /* Hardware is natively upper left */
 177                 return 0;
 178
 179         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 180         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 181         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 182         case PIPE_CAP_GENERATE_MIPMAP:
 183                 return 1;
 184
 185         /* We would prefer varyings */
 186         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 187         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 188                 return 0;
 189
 190         /* I really don't want to set this CAP but let's not swim against the
 191          * tide.. */
 192         case PIPE_CAP_TGSI_TEXCOORD:
 193                 return 1;
 194
 195         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 196         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 197                 return 1;
 198
 199         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 200                 return 0xffff;
 201
 202         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 203                 return 1;
 204
 205         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 206                 return 65536;
 207
 208         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 209                 return 0;
 210
 211         case PIPE_CAP_ENDIANNESS:
 212                 return PIPE_ENDIAN_NATIVE;
 213
 214         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 215                 return 1;
 216
 217         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 218                 return -8;
 219
 220         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 221                 return 7;
 222
 223         case PIPE_CAP_VENDOR_ID:
 224         case PIPE_CAP_DEVICE_ID:
 225                 return 0xFFFFFFFF;
 226
 227         case PIPE_CAP_ACCELERATED:
 228         case PIPE_CAP_UMA:
 229         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 230         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 231         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 232         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 233                 return 1;
 234
 235         case PIPE_CAP_VIDEO_MEMORY: {
 236                 uint64_t system_memory;
 237
 238                 if (!os_get_total_physical_memory(&system_memory))
 239                         return 0;
 240
 241                 return (int)(system_memory >> 20);
 242         }
 243
 244         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 245                 return 4;
 246
 247         case PIPE_CAP_MAX_VARYINGS:
 248                 return 16;
 249
 250         case PIPE_CAP_ALPHA_TEST:
 251                 return 0;
 252
 253         default:
 254                 return u_pipe_screen_get_param_defaults(screen, param);
 255         }
 256 }
 257
 258 static int
 259 panfrost_get_shader_param(struct pipe_screen *screen,
 260                           enum pipe_shader_type shader,
 261                           enum pipe_shader_cap param)
 262 {
 263         bool is_deqp = pan_debug & PAN_DBG_DEQP;
 264
 265         if (shader != PIPE_SHADER_VERTEX &&
 266             shader != PIPE_SHADER_FRAGMENT &&
 267             !(shader == PIPE_SHADER_COMPUTE && is_deqp))
 268                 return 0;
 269
 270         /* this is probably not totally correct.. but it's a start: */
 271         switch (param) {
 272         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 273         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 274         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 275         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 276                 return 16384;
 277
 278         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 279                 return 1024;
 280
 281         case PIPE_SHADER_CAP_MAX_INPUTS:
 282                 return 16;
 283
 284         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 285                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 16;
 286
 287         case PIPE_SHADER_CAP_MAX_TEMPS:
 288                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 289
 290         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 291                 return 16 * 1024 * sizeof(float);
 292
 293         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 294                 return PAN_MAX_CONST_BUFFERS;
 295
 296         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 297                 return 0;
 298
 299         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 300                 return 1;
 301         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 302                 return 0;
 303
 304         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 305                 return 0;
 306
 307         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 308                 return 1;
 309
 310         case PIPE_SHADER_CAP_SUBROUTINES:
 311                 return 0;
 312
 313         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 314                 return 0;
 315
 316         case PIPE_SHADER_CAP_INTEGERS:
 317                 return 1;
 318
 319         case PIPE_SHADER_CAP_INT64_ATOMICS:
 320         case PIPE_SHADER_CAP_FP16:
 321         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 322         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 323         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 324         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 325         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 326                 return 0;
 327
 328         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 329         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 330                 return 16; /* XXX: How many? */
 331
 332         case PIPE_SHADER_CAP_PREFERRED_IR:
 333                 return PIPE_SHADER_IR_NIR;
 334
 335         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 336                 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
 337
 338         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 339                 return 32;
 340
 341         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 342         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 343                 return is_deqp ? 4 : 0;
 344         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 345         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 346                 return 0;
 347
 348         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 349         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 350                 return 0;
 351
 352         default:
 353                 fprintf(stderr, "unknown shader param %d\n", param);
 354                 return 0;
 355         }
 356
 357         return 0;
 358 }
 359
 360 static float
 361 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 362 {
 363         switch (param) {
 364         case PIPE_CAPF_MAX_LINE_WIDTH:
 365
 366         /* fall-through */
 367         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 368                 return 255.0; /* arbitrary */
 369
 370         case PIPE_CAPF_MAX_POINT_WIDTH:
 371
 372         /* fall-through */
 373         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 374                 return 1024.0;
 375
 376         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 377                 return 16.0;
 378
 379         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 380                 return 16.0; /* arbitrary */
 381
 382         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 383         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 384         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 385                 return 0.0f;
 386
 387         default:
 388                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 389                 return 0.0;
 390         }
 391 }
 392
 393 /**
 394  * Query format support for creating a texture, drawing surface, etc.
 395  * \param format  the format to test
 396  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 397  */
 398 static bool
 399 panfrost_is_format_supported( struct pipe_screen *screen,
 400                               enum pipe_format format,
 401                               enum pipe_texture_target target,
 402                               unsigned sample_count,
 403                               unsigned storage_sample_count,
 404                               unsigned bind)
 405 {
 406         const struct util_format_description *format_desc;
 407
 408         assert(target == PIPE_BUFFER ||
 409                target == PIPE_TEXTURE_1D ||
 410                target == PIPE_TEXTURE_1D_ARRAY ||
 411                target == PIPE_TEXTURE_2D ||
 412                target == PIPE_TEXTURE_2D_ARRAY ||
 413                target == PIPE_TEXTURE_RECT ||
 414                target == PIPE_TEXTURE_3D ||
 415                target == PIPE_TEXTURE_CUBE ||
 416                target == PIPE_TEXTURE_CUBE_ARRAY);
 417
 418         format_desc = util_format_description(format);
 419
 420         if (!format_desc)
 421                 return false;
 422
 423         if (sample_count > 1)
 424                 return false;
 425
 426         /* Format wishlist */
 427         if (format == PIPE_FORMAT_X8Z24_UNORM)
 428                 return false;
 429
 430         if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
 431                 return false;
 432
 433         /* TODO */
 434         if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
 435                 return FALSE;
 436
 437         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 438          * more alpha than they ask for */
 439
 440         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 441         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 442
 443         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 444                 return false;
 445
 446         if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&
 447             format_desc->layout != UTIL_FORMAT_LAYOUT_OTHER) {
 448                 /* Compressed formats not yet hooked up. */
 449                 return false;
 450         }
 451
 452         /* Internally, formats that are depth/stencil renderable are limited.
 453          *
 454          * In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
 455          * rendering perspective. That is, we render to Z24S8 (which we can
 456          * AFBC compress), ignore the different when texturing (who cares?),
 457          * and then in the off-chance there's a CPU read we blit back to
 458          * staging.
 459          *
 460          * ...alternatively, we can make the state tracker deal with that. */
 461
 462         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 463                 switch (format) {
 464                         case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 465                         case PIPE_FORMAT_Z24X8_UNORM:
 466                         case PIPE_FORMAT_Z32_UNORM:
 467                         case PIPE_FORMAT_Z32_FLOAT:
 468                         case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 469                                 return true;
 470
 471                         default:
 472                                 return false;
 473                 }
 474         }
 475
 476         return true;
 477 }
 478
 479 static int
 480 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
 481                 enum pipe_compute_cap param, void *ret)
 482 {
 483         const char * const ir = "panfrost";
 484
 485         if (!(pan_debug & PAN_DBG_DEQP))
 486                 return 0;
 487
 488 #define RET(x) do {                  \
 489    if (ret)                          \
 490       memcpy(ret, x, sizeof(x));     \
 491    return sizeof(x);                 \
 492 } while (0)
 493
 494         switch (param) {
 495         case PIPE_COMPUTE_CAP_ADDRESS_BITS:
 496                 RET((uint32_t []){ 64 });
 497
 498         case PIPE_COMPUTE_CAP_IR_TARGET:
 499                 if (ret)
 500                         sprintf(ret, "%s", ir);
 501                 return strlen(ir) * sizeof(char);
 502
 503         case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 504                 RET((uint64_t []) { 3 });
 505
 506         case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 507                 RET(((uint64_t []) { 65535, 65535, 65535 }));
 508
 509         case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 510                 RET(((uint64_t []) { 1024, 1024, 64 }));
 511
 512         case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 513                 RET((uint64_t []) { 1024 });
 514
 515         case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 516                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 517
 518         case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 519                 RET((uint64_t []) { 32768 });
 520
 521         case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 522         case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 523                 RET((uint64_t []) { 4096 });
 524
 525         case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 526                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 527
 528         case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 529                 RET((uint32_t []) { 800 /* MHz -- TODO */ });
 530
 531         case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 532                 RET((uint32_t []) { 9999 });  // TODO
 533
 534         case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 535                 RET((uint32_t []) { 1 }); // TODO
 536
 537         case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 538                 RET((uint32_t []) { 32 });  // TODO
 539
 540         case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
 541                 RET((uint64_t []) { 1024 }); // TODO
 542         }
 543
 544         return 0;
 545 }
 546
 547 static void
 548 panfrost_destroy_screen(struct pipe_screen *pscreen)
 549 {
 550         struct panfrost_screen *screen = pan_screen(pscreen);
 551         panfrost_bo_cache_evict_all(screen);
 552         pthread_mutex_destroy(&screen->bo_cache.lock);
 553         pthread_mutex_destroy(&screen->active_bos_lock);
 554         drmFreeVersion(screen->kernel_version);
 555         ralloc_free(screen);
 556 }
 557
 558 static void
 559 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 560                            struct pipe_resource *resource,
 561                            unsigned level, unsigned layer,
 562                            void *context_private,
 563                            struct pipe_box *sub_box)
 564 {
 565         /* TODO: Display target integration */
 566 }
 567
 568 static uint64_t
 569 panfrost_get_timestamp(struct pipe_screen *_screen)
 570 {
 571         return os_time_get_nano();
 572 }
 573
 574 static void
 575 panfrost_fence_reference(struct pipe_screen *pscreen,
 576                          struct pipe_fence_handle **ptr,
 577                          struct pipe_fence_handle *fence)
 578 {
 579         struct panfrost_fence **p = (struct panfrost_fence **)ptr;
 580         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 581         struct panfrost_fence *old = *p;
 582
 583         if (pipe_reference(&(*p)->reference, &f->reference)) {
 584                 util_dynarray_foreach(&old->syncfds, int, fd)
 585                         close(*fd);
 586                 util_dynarray_fini(&old->syncfds);
 587                 free(old);
 588         }
 589         *p = f;
 590 }
 591
 592 static bool
 593 panfrost_fence_finish(struct pipe_screen *pscreen,
 594                       struct pipe_context *ctx,
 595                       struct pipe_fence_handle *fence,
 596                       uint64_t timeout)
 597 {
 598         struct panfrost_screen *screen = pan_screen(pscreen);
 599         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 600         struct util_dynarray syncobjs;
 601         int ret;
 602
 603         /* All fences were already signaled */
 604         if (!util_dynarray_num_elements(&f->syncfds, int))
 605                 return true;
 606
 607         util_dynarray_init(&syncobjs, NULL);
 608         util_dynarray_foreach(&f->syncfds, int, fd) {
 609                 uint32_t syncobj;
 610
 611                 ret = drmSyncobjCreate(screen->fd, 0, &syncobj);
 612                 assert(!ret);
 613
 614                 ret = drmSyncobjImportSyncFile(screen->fd, syncobj, *fd);
 615                 assert(!ret);
 616                 util_dynarray_append(&syncobjs, uint32_t, syncobj);
 617         }
 618
 619         uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
 620         if (abs_timeout == OS_TIMEOUT_INFINITE)
 621                 abs_timeout = INT64_MAX;
 622
 623         ret = drmSyncobjWait(screen->fd, util_dynarray_begin(&syncobjs),
 624                              util_dynarray_num_elements(&syncobjs, uint32_t),
 625                              abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
 626                              NULL);
 627
 628         util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
 629                 drmSyncobjDestroy(screen->fd, *syncobj);
 630
 631         return ret >= 0;
 632 }
 633
 634 struct panfrost_fence *
 635 panfrost_fence_create(struct panfrost_context *ctx,
 636                       struct util_dynarray *fences)
 637 {
 638         struct panfrost_screen *screen = pan_screen(ctx->base.screen);
 639         struct panfrost_fence *f = calloc(1, sizeof(*f));
 640         if (!f)
 641                 return NULL;
 642
 643         util_dynarray_init(&f->syncfds, NULL);
 644
 645         /* Export fences from all pending batches. */
 646         util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
 647                 int fd = -1;
 648
 649                 /* The fence is already signaled, no need to export it. */
 650                 if ((*fence)->signaled)
 651                         continue;
 652
 653                 drmSyncobjExportSyncFile(screen->fd, (*fence)->syncobj, &fd);
 654                 if (fd == -1)
 655                         fprintf(stderr, "export failed: %m\n");
 656
 657                 assert(fd != -1);
 658                 util_dynarray_append(&f->syncfds, int, fd);
 659         }
 660
 661         pipe_reference_init(&f->reference, 1);
 662
 663         return f;
 664 }
 665
 666 static const void *
 667 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 668                                      enum pipe_shader_ir ir,
 669                                      enum pipe_shader_type shader)
 670 {
 671         return &midgard_nir_options;
 672 }
 673
 674 static uint32_t
 675 panfrost_active_bos_hash(const void *key)
 676 {
 677         const struct panfrost_bo *bo = key;
 678
 679         return _mesa_hash_data(&bo->gem_handle, sizeof(bo->gem_handle));
 680 }
 681
 682 static bool
 683 panfrost_active_bos_cmp(const void *keya, const void *keyb)
 684 {
 685         const struct panfrost_bo *a = keya, *b = keyb;
 686
 687         return a->gem_handle == b->gem_handle;
 688 }
 689
 690 struct pipe_screen *
 691 panfrost_create_screen(int fd, struct renderonly *ro)
 692 {
 693         pan_debug = debug_get_option_pan_debug();
 694
 695         /* Blacklist apps known to be buggy under Panfrost */
 696         const char *proc = util_get_process_name();
 697         const char *blacklist[] = {
 698                 "chromium",
 699                 "chrome",
 700         };
 701
 702         for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
 703                 if ((strcmp(blacklist[i], proc) == 0))
 704                         return NULL;
 705         }
 706
 707         /* Create the screen */
 708         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 709
 710         if (!screen)
 711                 return NULL;
 712
 713         if (ro) {
 714                 screen->ro = renderonly_dup(ro);
 715                 if (!screen->ro) {
 716                         fprintf(stderr, "Failed to dup renderonly object\n");
 717                         free(screen);
 718                         return NULL;
 719                 }
 720         }
 721
 722         screen->fd = fd;
 723
 724         screen->gpu_id = panfrost_query_gpu_version(screen->fd);
 725         screen->core_count = panfrost_query_core_count(screen->fd);
 726         screen->thread_tls_alloc = panfrost_query_thread_tls_alloc(screen->fd);
 727         screen->quirks = panfrost_get_quirks(screen->gpu_id);
 728         screen->kernel_version = drmGetVersion(fd);
 729
 730         /* Check if we're loading against a supported GPU model. */
 731
 732         switch (screen->gpu_id) {
 733         case 0x720: /* T720 */
 734         case 0x750: /* T760 */
 735         case 0x820: /* T820 */
 736         case 0x860: /* T860 */
 737                 break;
 738         default:
 739                 /* Fail to load against untested models */
 740                 debug_printf("panfrost: Unsupported model %X", screen->gpu_id);
 741                 return NULL;
 742         }
 743
 744         pthread_mutex_init(&screen->active_bos_lock, NULL);
 745         screen->active_bos = _mesa_set_create(screen, panfrost_active_bos_hash,
 746                                               panfrost_active_bos_cmp);
 747
 748         pthread_mutex_init(&screen->bo_cache.lock, NULL);
 749         list_inithead(&screen->bo_cache.lru);
 750         for (unsigned i = 0; i < ARRAY_SIZE(screen->bo_cache.buckets); ++i)
 751                 list_inithead(&screen->bo_cache.buckets[i]);
 752
 753         if (pan_debug & PAN_DBG_TRACE)
 754                 pandecode_initialize();
 755
 756         screen->base.destroy = panfrost_destroy_screen;
 757
 758         screen->base.get_name = panfrost_get_name;
 759         screen->base.get_vendor = panfrost_get_vendor;
 760         screen->base.get_device_vendor = panfrost_get_device_vendor;
 761         screen->base.get_param = panfrost_get_param;
 762         screen->base.get_shader_param = panfrost_get_shader_param;
 763         screen->base.get_compute_param = panfrost_get_compute_param;
 764         screen->base.get_paramf = panfrost_get_paramf;
 765         screen->base.get_timestamp = panfrost_get_timestamp;
 766         screen->base.is_format_supported = panfrost_is_format_supported;
 767         screen->base.context_create = panfrost_create_context;
 768         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 769         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 770         screen->base.fence_reference = panfrost_fence_reference;
 771         screen->base.fence_finish = panfrost_fence_finish;
 772         screen->base.set_damage_region = panfrost_resource_set_damage_region;
 773
 774         panfrost_resource_screen_init(screen);
 775
 776         return &screen->base;
 777 }