src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25  * SOFTWARE.
  26  *
  27  */
  28
  29 #include "util/u_debug.h"
  30 #include "util/u_memory.h"
  31 #include "util/format/u_format.h"
  32 #include "util/format/u_format_s3tc.h"
  33 #include "util/u_video.h"
  34 #include "util/u_screen.h"
  35 #include "util/os_time.h"
  36 #include "util/u_process.h"
  37 #include "pipe/p_defines.h"
  38 #include "pipe/p_screen.h"
  39 #include "draw/draw_context.h"
  40
  41 #include <fcntl.h>
  42
  43 #include "drm-uapi/drm_fourcc.h"
  44 #include "drm-uapi/panfrost_drm.h"
  45
  46 #include "pan_bo.h"
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51 #include "pandecode/decode.h"
  52
  53 #include "pan_context.h"
  54 #include "midgard/midgard_compile.h"
  55 #include "bifrost/bifrost_compile.h"
  56 #include "panfrost-quirks.h"
  57
  58 static const struct debug_named_value debug_options[] = {
  59         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  60         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  61         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  62         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  63         {"sync",      PAN_DBG_SYNC,     "Wait for each job's completion and check for any GPU fault"},
  64         {"precompile", PAN_DBG_PRECOMPILE, "Precompile shaders for shader-db"},
  65         {"gles3",     PAN_DBG_GLES3,    "Enable experimental GLES3 implementation"},
  66         {"fp16",     PAN_DBG_FP16,     "Enable buggy experimental (don't use!) fp16"},
  67         DEBUG_NAMED_VALUE_END
  68 };
  69
  70 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  71
  72 int pan_debug = 0;
  73
  74 static const char *
  75 panfrost_get_name(struct pipe_screen *screen)
  76 {
  77         return panfrost_model_name(pan_device(screen)->gpu_id);
  78 }
  79
  80 static const char *
  81 panfrost_get_vendor(struct pipe_screen *screen)
  82 {
  83         return "Panfrost";
  84 }
  85
  86 static const char *
  87 panfrost_get_device_vendor(struct pipe_screen *screen)
  88 {
  89         return "Arm";
  90 }
  91
  92 static int
  93 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  94 {
  95         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  96         bool is_deqp = pan_debug & PAN_DBG_DEQP;
  97         struct panfrost_device *dev = pan_device(screen);
  98
  99         /* Our GLES3 implementation is WIP */
 100         bool is_gles3 = pan_debug & PAN_DBG_GLES3;
 101         is_gles3 |= is_deqp;
 102
 103         switch (param) {
 104         case PIPE_CAP_NPOT_TEXTURES:
 105         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 106         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 107         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 108         case PIPE_CAP_VERTEX_SHADER_SATURATE:
 109         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 110         case PIPE_CAP_POINT_SPRITE:
 111                 return 1;
 112
 113         case PIPE_CAP_MAX_RENDER_TARGETS:
 114                 return is_gles3 ? 4 : 1;
 115
 116         /* Throttling frames breaks pipelining */
 117         case PIPE_CAP_THROTTLE:
 118                 return 0;
 119
 120         case PIPE_CAP_OCCLUSION_QUERY:
 121                 return 1;
 122         case PIPE_CAP_QUERY_TIME_ELAPSED:
 123         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 124         case PIPE_CAP_QUERY_TIMESTAMP:
 125         case PIPE_CAP_QUERY_SO_OVERFLOW:
 126                 return 0;
 127
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129                 return 1;
 130
 131         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 132         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 133                 return 1;
 134
 135         case PIPE_CAP_TGSI_INSTANCEID:
 136         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 137         case PIPE_CAP_PRIMITIVE_RESTART:
 138                 return 1;
 139
 140         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 141                 return is_gles3 ? 4 : 0;
 142         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 143         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 144                 return is_gles3 ? 64 : 0;
 145         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 146                 return 1;
 147
 148         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 149                 return 256;
 150
 151         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 152         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 153                 return is_gles3 ? 140 : 120;
 154         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 155                 return is_gles3 ? 300 : 120;
 156
 157         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 158                 return 16;
 159
 160         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 161                 return is_gles3;
 162
 163         /* For faking GLES 3.1 for dEQP-GLES31 */
 164         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 165         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 166         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 167         case PIPE_CAP_CUBE_MAP_ARRAY:
 168                 return is_deqp;
 169
 170         /* For faking compute shaders */
 171         case PIPE_CAP_COMPUTE:
 172                 return is_deqp;
 173
 174         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 175                 return 4096;
 176         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 177         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 178                 return 13;
 179
 180         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 181         case PIPE_CAP_INDEP_BLEND_ENABLE:
 182         case PIPE_CAP_INDEP_BLEND_FUNC:
 183                 return 1;
 184
 185         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 186                 /* Hardware is natively upper left */
 187                 return 0;
 188
 189         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 190         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 191         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 192         case PIPE_CAP_GENERATE_MIPMAP:
 193                 return 1;
 194
 195         /* We would prefer varyings on Midgard, but proper sysvals on Bifrost */
 196         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 197         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 198                 return dev->quirks & IS_BIFROST;
 199
 200         /* I really don't want to set this CAP but let's not swim against the
 201          * tide.. */
 202         case PIPE_CAP_TGSI_TEXCOORD:
 203                 return 1;
 204
 205         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 206         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 207                 return 1;
 208
 209         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 210                 return 0xffff;
 211
 212         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 213                 return 1;
 214
 215         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 216                 return 65536;
 217
 218         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 219                 return 0;
 220
 221         case PIPE_CAP_ENDIANNESS:
 222                 return PIPE_ENDIAN_NATIVE;
 223
 224         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 225                 return 1;
 226
 227         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 228                 return -8;
 229
 230         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 231                 return 7;
 232
 233         case PIPE_CAP_VENDOR_ID:
 234         case PIPE_CAP_DEVICE_ID:
 235                 return 0xFFFFFFFF;
 236
 237         case PIPE_CAP_ACCELERATED:
 238         case PIPE_CAP_UMA:
 239         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 240         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 241         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 242         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 243                 return 1;
 244
 245         case PIPE_CAP_VIDEO_MEMORY: {
 246                 uint64_t system_memory;
 247
 248                 if (!os_get_total_physical_memory(&system_memory))
 249                         return 0;
 250
 251                 return (int)(system_memory >> 20);
 252         }
 253
 254         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 255                 return 1;
 256
 257         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 258                 return 4;
 259
 260         case PIPE_CAP_MAX_VARYINGS:
 261                 return 16;
 262
 263         case PIPE_CAP_ALPHA_TEST:
 264         case PIPE_CAP_FLATSHADE:
 265         case PIPE_CAP_TWO_SIDED_COLOR:
 266         case PIPE_CAP_CLIP_PLANES:
 267                 return 0;
 268
 269         case PIPE_CAP_PACKED_STREAM_OUTPUT:
 270                 return 0;
 271
 272         case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED:
 273         case PIPE_CAP_PSIZ_CLAMPED:
 274                 return 1;
 275
 276         default:
 277                 return u_pipe_screen_get_param_defaults(screen, param);
 278         }
 279 }
 280
 281 static int
 282 panfrost_get_shader_param(struct pipe_screen *screen,
 283                           enum pipe_shader_type shader,
 284                           enum pipe_shader_cap param)
 285 {
 286         bool is_deqp = pan_debug & PAN_DBG_DEQP;
 287         bool is_fp16 = pan_debug & PAN_DBG_FP16;
 288         struct panfrost_device *dev = pan_device(screen);
 289
 290         if (shader != PIPE_SHADER_VERTEX &&
 291             shader != PIPE_SHADER_FRAGMENT &&
 292             !(shader == PIPE_SHADER_COMPUTE && is_deqp))
 293                 return 0;
 294
 295         /* this is probably not totally correct.. but it's a start: */
 296         switch (param) {
 297         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 298         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 299         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 300         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 301                 return 16384;
 302
 303         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 304                 return 1024;
 305
 306         case PIPE_SHADER_CAP_MAX_INPUTS:
 307                 return 16;
 308
 309         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 310                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 16;
 311
 312         case PIPE_SHADER_CAP_MAX_TEMPS:
 313                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 314
 315         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 316                 return 16 * 1024 * sizeof(float);
 317
 318         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 319                 return PAN_MAX_CONST_BUFFERS;
 320
 321         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 322                 return 0;
 323
 324         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 325                 return 1;
 326         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 327                 return 0;
 328
 329         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 330                 return 0;
 331
 332         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 333                 return 1;
 334
 335         case PIPE_SHADER_CAP_SUBROUTINES:
 336                 return 0;
 337
 338         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 339                 return 0;
 340
 341         case PIPE_SHADER_CAP_INTEGERS:
 342                 return 1;
 343
 344         case PIPE_SHADER_CAP_FP16:
 345                 return !(dev->quirks & MIDGARD_BROKEN_FP16) || is_fp16;
 346
 347         case PIPE_SHADER_CAP_INT64_ATOMICS:
 348         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 349         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 350         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 351         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 352         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 353                 return 0;
 354
 355         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 356         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 357                 return 16; /* XXX: How many? */
 358
 359         case PIPE_SHADER_CAP_PREFERRED_IR:
 360                 return PIPE_SHADER_IR_NIR;
 361
 362         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 363                 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
 364
 365         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 366                 return 32;
 367
 368         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 369         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 370                 return is_deqp ? 8 : 0;
 371         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 372         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 373                 return 0;
 374
 375         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 376         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 377                 return 0;
 378
 379         default:
 380                 DBG("unknown shader param %d\n", param);
 381                 return 0;
 382         }
 383
 384         return 0;
 385 }
 386
 387 static float
 388 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 389 {
 390         switch (param) {
 391         case PIPE_CAPF_MAX_LINE_WIDTH:
 392
 393         /* fall-through */
 394         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 395                 return 255.0; /* arbitrary */
 396
 397         case PIPE_CAPF_MAX_POINT_WIDTH:
 398
 399         /* fall-through */
 400         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 401                 return 1024.0;
 402
 403         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 404                 return 16.0;
 405
 406         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 407                 return 16.0; /* arbitrary */
 408
 409         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 410         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 411         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 412                 return 0.0f;
 413
 414         default:
 415                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 416                 return 0.0;
 417         }
 418 }
 419
 420 /**
 421  * Query format support for creating a texture, drawing surface, etc.
 422  * \param format  the format to test
 423  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 424  */
 425 static bool
 426 panfrost_is_format_supported( struct pipe_screen *screen,
 427                               enum pipe_format format,
 428                               enum pipe_texture_target target,
 429                               unsigned sample_count,
 430                               unsigned storage_sample_count,
 431                               unsigned bind)
 432 {
 433         const struct util_format_description *format_desc;
 434
 435         assert(target == PIPE_BUFFER ||
 436                target == PIPE_TEXTURE_1D ||
 437                target == PIPE_TEXTURE_1D_ARRAY ||
 438                target == PIPE_TEXTURE_2D ||
 439                target == PIPE_TEXTURE_2D_ARRAY ||
 440                target == PIPE_TEXTURE_RECT ||
 441                target == PIPE_TEXTURE_3D ||
 442                target == PIPE_TEXTURE_CUBE ||
 443                target == PIPE_TEXTURE_CUBE_ARRAY);
 444
 445         format_desc = util_format_description(format);
 446
 447         if (!format_desc)
 448                 return false;
 449
 450         /* MSAA 4x supported, but no more. Technically some revisions of the
 451          * hardware can go up to 16x but we don't support higher modes yet. */
 452
 453         if (sample_count > 1 && !(pan_debug & PAN_DBG_DEQP))
 454                 return false;
 455
 456         if (sample_count > 4)
 457                 return false;
 458
 459         if (MAX2(sample_count, 1) != MAX2(storage_sample_count, 1))
 460                 return false;
 461
 462         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 463          * more alpha than they ask for */
 464
 465         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 466         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 467
 468         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 469                 return false;
 470
 471         /* Check we support the format with the given bind */
 472
 473         unsigned relevant_bind = bind &
 474                 ( PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET
 475                 | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_SAMPLER_VIEW);
 476
 477         struct panfrost_format fmt = panfrost_pipe_format_table[format];
 478         return fmt.hw && ((relevant_bind & ~fmt.bind) == 0);
 479 }
 480
 481 static int
 482 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
 483                 enum pipe_compute_cap param, void *ret)
 484 {
 485         const char * const ir = "panfrost";
 486
 487         if (!(pan_debug & PAN_DBG_DEQP))
 488                 return 0;
 489
 490 #define RET(x) do {                  \
 491    if (ret)                          \
 492       memcpy(ret, x, sizeof(x));     \
 493    return sizeof(x);                 \
 494 } while (0)
 495
 496         switch (param) {
 497         case PIPE_COMPUTE_CAP_ADDRESS_BITS:
 498                 RET((uint32_t []){ 64 });
 499
 500         case PIPE_COMPUTE_CAP_IR_TARGET:
 501                 if (ret)
 502                         sprintf(ret, "%s", ir);
 503                 return strlen(ir) * sizeof(char);
 504
 505         case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 506                 RET((uint64_t []) { 3 });
 507
 508         case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 509                 RET(((uint64_t []) { 65535, 65535, 65535 }));
 510
 511         case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 512                 RET(((uint64_t []) { 1024, 1024, 64 }));
 513
 514         case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 515                 RET((uint64_t []) { 1024 });
 516
 517         case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 518                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 519
 520         case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 521                 RET((uint64_t []) { 32768 });
 522
 523         case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 524         case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 525                 RET((uint64_t []) { 4096 });
 526
 527         case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 528                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 529
 530         case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 531                 RET((uint32_t []) { 800 /* MHz -- TODO */ });
 532
 533         case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 534                 RET((uint32_t []) { 9999 });  // TODO
 535
 536         case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 537                 RET((uint32_t []) { 1 }); // TODO
 538
 539         case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 540                 RET((uint32_t []) { 32 });  // TODO
 541
 542         case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
 543                 RET((uint64_t []) { 1024 }); // TODO
 544         }
 545
 546         return 0;
 547 }
 548
 549 static void
 550 panfrost_destroy_screen(struct pipe_screen *pscreen)
 551 {
 552         panfrost_close_device(pan_device(pscreen));
 553         ralloc_free(pscreen);
 554 }
 555
 556 static uint64_t
 557 panfrost_get_timestamp(struct pipe_screen *_screen)
 558 {
 559         return os_time_get_nano();
 560 }
 561
 562 static void
 563 panfrost_fence_reference(struct pipe_screen *pscreen,
 564                          struct pipe_fence_handle **ptr,
 565                          struct pipe_fence_handle *fence)
 566 {
 567         struct panfrost_fence **p = (struct panfrost_fence **)ptr;
 568         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 569         struct panfrost_fence *old = *p;
 570
 571         if (pipe_reference(&(*p)->reference, &f->reference)) {
 572                 util_dynarray_foreach(&old->syncfds, int, fd)
 573                         close(*fd);
 574                 util_dynarray_fini(&old->syncfds);
 575                 free(old);
 576         }
 577         *p = f;
 578 }
 579
 580 static bool
 581 panfrost_fence_finish(struct pipe_screen *pscreen,
 582                       struct pipe_context *ctx,
 583                       struct pipe_fence_handle *fence,
 584                       uint64_t timeout)
 585 {
 586         struct panfrost_device *dev = pan_device(pscreen);
 587         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 588         struct util_dynarray syncobjs;
 589         int ret;
 590
 591         /* All fences were already signaled */
 592         if (!util_dynarray_num_elements(&f->syncfds, int))
 593                 return true;
 594
 595         util_dynarray_init(&syncobjs, NULL);
 596         util_dynarray_foreach(&f->syncfds, int, fd) {
 597                 uint32_t syncobj;
 598
 599                 ret = drmSyncobjCreate(dev->fd, 0, &syncobj);
 600                 assert(!ret);
 601
 602                 ret = drmSyncobjImportSyncFile(dev->fd, syncobj, *fd);
 603                 assert(!ret);
 604                 util_dynarray_append(&syncobjs, uint32_t, syncobj);
 605         }
 606
 607         uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
 608         if (abs_timeout == OS_TIMEOUT_INFINITE)
 609                 abs_timeout = INT64_MAX;
 610
 611         ret = drmSyncobjWait(dev->fd, util_dynarray_begin(&syncobjs),
 612                              util_dynarray_num_elements(&syncobjs, uint32_t),
 613                              abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
 614                              NULL);
 615
 616         util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
 617                 drmSyncobjDestroy(dev->fd, *syncobj);
 618
 619         return ret >= 0;
 620 }
 621
 622 struct panfrost_fence *
 623 panfrost_fence_create(struct panfrost_context *ctx,
 624                       struct util_dynarray *fences)
 625 {
 626         struct panfrost_device *device = pan_device(ctx->base.screen);
 627         struct panfrost_fence *f = calloc(1, sizeof(*f));
 628         if (!f)
 629                 return NULL;
 630
 631         util_dynarray_init(&f->syncfds, NULL);
 632
 633         /* Export fences from all pending batches. */
 634         util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
 635                 int fd = -1;
 636
 637                 /* The fence is already signaled, no need to export it. */
 638                 if ((*fence)->signaled)
 639                         continue;
 640
 641                 drmSyncobjExportSyncFile(device->fd, (*fence)->syncobj, &fd);
 642                 if (fd == -1)
 643                         fprintf(stderr, "export failed: %m\n");
 644
 645                 assert(fd != -1);
 646                 util_dynarray_append(&f->syncfds, int, fd);
 647         }
 648
 649         pipe_reference_init(&f->reference, 1);
 650
 651         return f;
 652 }
 653
 654 static const void *
 655 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 656                                      enum pipe_shader_ir ir,
 657                                      enum pipe_shader_type shader)
 658 {
 659         if (pan_device(pscreen)->quirks & IS_BIFROST)
 660                 return &bifrost_nir_options;
 661         else
 662                 return &midgard_nir_options;
 663 }
 664
 665 struct pipe_screen *
 666 panfrost_create_screen(int fd, struct renderonly *ro)
 667 {
 668         pan_debug = debug_get_option_pan_debug();
 669
 670         /* Blacklist apps known to be buggy under Panfrost */
 671         const char *proc = util_get_process_name();
 672         const char *blacklist[] = {
 673                 "chromium",
 674                 "chrome",
 675         };
 676
 677         for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
 678                 if ((strcmp(blacklist[i], proc) == 0))
 679                         return NULL;
 680         }
 681
 682         /* Create the screen */
 683         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 684
 685         if (!screen)
 686                 return NULL;
 687
 688         struct panfrost_device *dev = pan_device(&screen->base);
 689         panfrost_open_device(screen, fd, dev);
 690
 691         if (ro) {
 692                 dev->ro = renderonly_dup(ro);
 693                 if (!dev->ro) {
 694                         DBG("Failed to dup renderonly object\n");
 695                         free(screen);
 696                         return NULL;
 697                 }
 698         }
 699
 700         /* Check if we're loading against a supported GPU model. */
 701
 702         switch (dev->gpu_id) {
 703         case 0x720: /* T720 */
 704         case 0x750: /* T760 */
 705         case 0x820: /* T820 */
 706         case 0x860: /* T860 */
 707                 break;
 708         default:
 709                 /* Fail to load against untested models */
 710                 debug_printf("panfrost: Unsupported model %X", dev->gpu_id);
 711                 panfrost_destroy_screen(&(screen->base));
 712                 return NULL;
 713         }
 714
 715         if (pan_debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
 716                 pandecode_initialize(!(pan_debug & PAN_DBG_TRACE));
 717
 718         screen->base.destroy = panfrost_destroy_screen;
 719
 720         screen->base.get_name = panfrost_get_name;
 721         screen->base.get_vendor = panfrost_get_vendor;
 722         screen->base.get_device_vendor = panfrost_get_device_vendor;
 723         screen->base.get_param = panfrost_get_param;
 724         screen->base.get_shader_param = panfrost_get_shader_param;
 725         screen->base.get_compute_param = panfrost_get_compute_param;
 726         screen->base.get_paramf = panfrost_get_paramf;
 727         screen->base.get_timestamp = panfrost_get_timestamp;
 728         screen->base.is_format_supported = panfrost_is_format_supported;
 729         screen->base.context_create = panfrost_create_context;
 730         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 731         screen->base.fence_reference = panfrost_fence_reference;
 732         screen->base.fence_finish = panfrost_fence_finish;
 733         screen->base.set_damage_region = panfrost_resource_set_damage_region;
 734
 735         panfrost_resource_screen_init(&screen->base);
 736
 737         return &screen->base;
 738 }