src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25  * SOFTWARE.
  26  *
  27  */
  28
  29 #include "util/u_debug.h"
  30 #include "util/u_memory.h"
  31 #include "util/format/u_format.h"
  32 #include "util/format/u_format_s3tc.h"
  33 #include "util/u_video.h"
  34 #include "util/u_screen.h"
  35 #include "util/os_time.h"
  36 #include "util/u_process.h"
  37 #include "pipe/p_defines.h"
  38 #include "pipe/p_screen.h"
  39 #include "draw/draw_context.h"
  40
  41 #include <fcntl.h>
  42
  43 #include "drm-uapi/drm_fourcc.h"
  44 #include "drm-uapi/panfrost_drm.h"
  45
  46 #include "pan_bo.h"
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51 #include "pandecode/decode.h"
  52
  53 #include "pan_context.h"
  54 #include "midgard/midgard_compile.h"
  55 #include "bifrost/bifrost_compile.h"
  56 #include "panfrost-quirks.h"
  57
  58 static const struct debug_named_value debug_options[] = {
  59         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  60         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  61         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  62         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  63         {"sync",      PAN_DBG_SYNC,     "Wait for each job's completion and check for any GPU fault"},
  64         {"precompile", PAN_DBG_PRECOMPILE, "Precompile shaders for shader-db"},
  65         {"gles3",     PAN_DBG_GLES3,    "Enable experimental GLES3 implementation"},
  66         {"fp16",     PAN_DBG_FP16,     "Enable buggy experimental (don't use!) fp16"},
  67         {"bifrost",   PAN_DBG_BIFROST, "Enable experimental Mali G31 and G52 support"},
  68         {"gl3",       PAN_DBG_GL3,      "Enable experimental GL 3.x implementation, up to 3.3"},
  69         DEBUG_NAMED_VALUE_END
  70 };
  71
  72 static const char *
  73 panfrost_get_name(struct pipe_screen *screen)
  74 {
  75         return panfrost_model_name(pan_device(screen)->gpu_id);
  76 }
  77
  78 static const char *
  79 panfrost_get_vendor(struct pipe_screen *screen)
  80 {
  81         return "Panfrost";
  82 }
  83
  84 static const char *
  85 panfrost_get_device_vendor(struct pipe_screen *screen)
  86 {
  87         return "Arm";
  88 }
  89
  90 static int
  91 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  92 {
  93         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  94         struct panfrost_device *dev = pan_device(screen);
  95         bool is_deqp = dev->debug & PAN_DBG_DEQP;
  96
  97         /* Our GL 3.x implementation is WIP */
  98         bool is_gl3 = dev->debug & PAN_DBG_GL3;
  99         is_gl3 |= is_deqp;
 100
 101         /* Same with GLES 3 */
 102         bool is_gles3 = dev->debug & PAN_DBG_GLES3;
 103         is_gles3 |= is_gl3;
 104
 105         switch (param) {
 106         case PIPE_CAP_NPOT_TEXTURES:
 107         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 108         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 109         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 110         case PIPE_CAP_VERTEX_SHADER_SATURATE:
 111         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 112         case PIPE_CAP_POINT_SPRITE:
 113         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 114         case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 115                 return 1;
 116
 117         case PIPE_CAP_MAX_RENDER_TARGETS:
 118                 return is_gles3 ? 4 : 1;
 119
 120         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 121                 return is_gl3 ? 1 : 0;
 122
 123         /* Throttling frames breaks pipelining */
 124         case PIPE_CAP_THROTTLE:
 125                 return 0;
 126
 127         case PIPE_CAP_OCCLUSION_QUERY:
 128                 return 1;
 129         case PIPE_CAP_QUERY_TIME_ELAPSED:
 130         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 131         case PIPE_CAP_QUERY_SO_OVERFLOW:
 132                 return 0;
 133
 134         case PIPE_CAP_TEXTURE_SWIZZLE:
 135                 return 1;
 136
 137         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 138         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 139                 return 1;
 140
 141         case PIPE_CAP_TGSI_INSTANCEID:
 142         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 143         case PIPE_CAP_PRIMITIVE_RESTART:
 144         case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
 145                 return 1;
 146
 147         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 148                 return is_gles3 ? 4 : 0;
 149         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 150         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 151                 return is_gles3 ? 64 : 0;
 152         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 153                 return 1;
 154
 155         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 156                 return 256;
 157
 158         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 159         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 160                 return is_gl3 ? 330 : (is_gles3 ? 140 : 120);
 161         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 162                 return is_gles3 ? 300 : 120;
 163
 164         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 165                 return 16;
 166
 167         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 168                 return is_gles3;
 169
 170         /* For faking GLES 3.1 for dEQP-GLES31 */
 171         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 172         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 173         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 174         case PIPE_CAP_CUBE_MAP_ARRAY:
 175                 return is_deqp;
 176
 177         /* For faking compute shaders */
 178         case PIPE_CAP_COMPUTE:
 179                 return is_deqp;
 180
 181         case PIPE_CAP_QUERY_TIMESTAMP:
 182         case PIPE_CAP_CONDITIONAL_RENDER:
 183                 return is_gl3;
 184
 185         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 186                 return 4096;
 187         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 188         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 189                 return 13;
 190
 191         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 192         case PIPE_CAP_INDEP_BLEND_ENABLE:
 193         case PIPE_CAP_INDEP_BLEND_FUNC:
 194                 return 1;
 195
 196         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 197                 /* Hardware is natively upper left */
 198                 return 0;
 199
 200         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 201         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 202         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 203         case PIPE_CAP_GENERATE_MIPMAP:
 204                 return 1;
 205
 206         /* We would prefer varyings on Midgard, but proper sysvals on Bifrost */
 207         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 208         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 209         case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
 210                 return dev->quirks & IS_BIFROST;
 211
 212         /* I really don't want to set this CAP but let's not swim against the
 213          * tide.. */
 214         case PIPE_CAP_TGSI_TEXCOORD:
 215                 return 1;
 216
 217         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 218         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 219                 return 1;
 220
 221         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 222                 return 0xffff;
 223
 224         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 225                 return 1;
 226
 227         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 228                 return 65536;
 229
 230         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 231                 return 0;
 232
 233         case PIPE_CAP_ENDIANNESS:
 234                 return PIPE_ENDIAN_NATIVE;
 235
 236         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 237                 return 1;
 238
 239         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 240                 return -8;
 241
 242         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 243                 return 7;
 244
 245         case PIPE_CAP_VENDOR_ID:
 246         case PIPE_CAP_DEVICE_ID:
 247                 return 0xFFFFFFFF;
 248
 249         case PIPE_CAP_ACCELERATED:
 250         case PIPE_CAP_UMA:
 251         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 252         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 253         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 254         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 255                 return 1;
 256
 257         case PIPE_CAP_VIDEO_MEMORY: {
 258                 uint64_t system_memory;
 259
 260                 if (!os_get_total_physical_memory(&system_memory))
 261                         return 0;
 262
 263                 return (int)(system_memory >> 20);
 264         }
 265
 266         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 267                 return 1;
 268
 269         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 270                 return 4;
 271
 272         case PIPE_CAP_MAX_VARYINGS:
 273                 return 16;
 274
 275         case PIPE_CAP_ALPHA_TEST:
 276         case PIPE_CAP_FLATSHADE:
 277         case PIPE_CAP_TWO_SIDED_COLOR:
 278         case PIPE_CAP_CLIP_PLANES:
 279                 return 0;
 280
 281         case PIPE_CAP_PACKED_STREAM_OUTPUT:
 282                 return 0;
 283
 284         case PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED:
 285         case PIPE_CAP_PSIZ_CLAMPED:
 286                 return 1;
 287
 288         default:
 289                 return u_pipe_screen_get_param_defaults(screen, param);
 290         }
 291 }
 292
 293 static int
 294 panfrost_get_shader_param(struct pipe_screen *screen,
 295                           enum pipe_shader_type shader,
 296                           enum pipe_shader_cap param)
 297 {
 298         struct panfrost_device *dev = pan_device(screen);
 299         bool is_deqp = dev->debug & PAN_DBG_DEQP;
 300         bool is_fp16 = dev->debug & PAN_DBG_FP16;
 301
 302         if (shader != PIPE_SHADER_VERTEX &&
 303             shader != PIPE_SHADER_FRAGMENT &&
 304             !(shader == PIPE_SHADER_COMPUTE && is_deqp))
 305                 return 0;
 306
 307         /* this is probably not totally correct.. but it's a start: */
 308         switch (param) {
 309         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 310         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 311         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 312         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 313                 return 16384;
 314
 315         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 316                 return 1024;
 317
 318         case PIPE_SHADER_CAP_MAX_INPUTS:
 319                 return 16;
 320
 321         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 322                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 16;
 323
 324         case PIPE_SHADER_CAP_MAX_TEMPS:
 325                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 326
 327         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 328                 return 16 * 1024 * sizeof(float);
 329
 330         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 331                 return PAN_MAX_CONST_BUFFERS;
 332
 333         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 334                 return 0;
 335
 336         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 337                 return 1;
 338         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 339                 return 0;
 340
 341         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 342                 return 0;
 343
 344         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 345                 return 1;
 346
 347         case PIPE_SHADER_CAP_SUBROUTINES:
 348                 return 0;
 349
 350         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 351                 return 0;
 352
 353         case PIPE_SHADER_CAP_INTEGERS:
 354                 return 1;
 355
 356         case PIPE_SHADER_CAP_FP16:
 357                 return !(dev->quirks & MIDGARD_BROKEN_FP16) || is_fp16;
 358
 359         case PIPE_SHADER_CAP_FP16_DERIVATIVES:
 360         case PIPE_SHADER_CAP_INT16:
 361         case PIPE_SHADER_CAP_GLSL_16BIT_TEMPS:
 362         case PIPE_SHADER_CAP_INT64_ATOMICS:
 363         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 364         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 365         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 366         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 367         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 368                 return 0;
 369
 370         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 371         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 372                 return 16; /* XXX: How many? */
 373
 374         case PIPE_SHADER_CAP_PREFERRED_IR:
 375                 return PIPE_SHADER_IR_NIR;
 376
 377         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 378                 return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
 379
 380         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 381                 return 32;
 382
 383         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 384         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 385                 return is_deqp ? 8 : 0;
 386         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 387         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 388                 return 0;
 389
 390         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 391         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 392                 return 0;
 393
 394         default:
 395                 /* Other params are unknown */
 396                 return 0;
 397         }
 398
 399         return 0;
 400 }
 401
 402 static float
 403 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 404 {
 405         switch (param) {
 406         case PIPE_CAPF_MAX_LINE_WIDTH:
 407
 408         /* fall-through */
 409         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 410                 return 255.0; /* arbitrary */
 411
 412         case PIPE_CAPF_MAX_POINT_WIDTH:
 413
 414         /* fall-through */
 415         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 416                 return 1024.0;
 417
 418         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 419                 return 16.0;
 420
 421         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 422                 return 16.0; /* arbitrary */
 423
 424         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 425         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 426         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 427                 return 0.0f;
 428
 429         default:
 430                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 431                 return 0.0;
 432         }
 433 }
 434
 435 /**
 436  * Query format support for creating a texture, drawing surface, etc.
 437  * \param format  the format to test
 438  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 439  */
 440 static bool
 441 panfrost_is_format_supported( struct pipe_screen *screen,
 442                               enum pipe_format format,
 443                               enum pipe_texture_target target,
 444                               unsigned sample_count,
 445                               unsigned storage_sample_count,
 446                               unsigned bind)
 447 {
 448         struct panfrost_device *dev = pan_device(screen);
 449         const struct util_format_description *format_desc;
 450
 451         assert(target == PIPE_BUFFER ||
 452                target == PIPE_TEXTURE_1D ||
 453                target == PIPE_TEXTURE_1D_ARRAY ||
 454                target == PIPE_TEXTURE_2D ||
 455                target == PIPE_TEXTURE_2D_ARRAY ||
 456                target == PIPE_TEXTURE_RECT ||
 457                target == PIPE_TEXTURE_3D ||
 458                target == PIPE_TEXTURE_CUBE ||
 459                target == PIPE_TEXTURE_CUBE_ARRAY);
 460
 461         format_desc = util_format_description(format);
 462
 463         if (!format_desc)
 464                 return false;
 465
 466         /* MSAA 4x supported, but no more. Technically some revisions of the
 467          * hardware can go up to 16x but we don't support higher modes yet.
 468          * MSAA 2x is notably not supported and gets rounded up to MSAA 4x. */
 469
 470         if (!(sample_count == 0 || sample_count == 1 || sample_count == 4))
 471                 return false;
 472
 473         if (MAX2(sample_count, 1) != MAX2(storage_sample_count, 1))
 474                 return false;
 475
 476         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 477          * more alpha than they ask for */
 478
 479         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 480         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 481
 482         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 483                 return false;
 484
 485         if (dev->debug & (PAN_DBG_GL3 | PAN_DBG_DEQP)) {
 486                 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC)
 487                         return true;
 488         }
 489
 490         /* Check we support the format with the given bind */
 491
 492         unsigned relevant_bind = bind &
 493                 ( PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET
 494                 | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_SAMPLER_VIEW);
 495
 496         struct panfrost_format fmt = panfrost_pipe_format_table[format];
 497         return fmt.hw && ((relevant_bind & ~fmt.bind) == 0);
 498 }
 499
 500 static int
 501 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
 502                 enum pipe_compute_cap param, void *ret)
 503 {
 504         struct panfrost_device *dev = pan_device(pscreen);
 505         const char * const ir = "panfrost";
 506
 507         if (!(dev->debug & PAN_DBG_DEQP))
 508                 return 0;
 509
 510 #define RET(x) do {                  \
 511    if (ret)                          \
 512       memcpy(ret, x, sizeof(x));     \
 513    return sizeof(x);                 \
 514 } while (0)
 515
 516         switch (param) {
 517         case PIPE_COMPUTE_CAP_ADDRESS_BITS:
 518                 RET((uint32_t []){ 64 });
 519
 520         case PIPE_COMPUTE_CAP_IR_TARGET:
 521                 if (ret)
 522                         sprintf(ret, "%s", ir);
 523                 return strlen(ir) * sizeof(char);
 524
 525         case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 526                 RET((uint64_t []) { 3 });
 527
 528         case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 529                 RET(((uint64_t []) { 65535, 65535, 65535 }));
 530
 531         case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 532                 RET(((uint64_t []) { 1024, 1024, 64 }));
 533
 534         case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 535                 RET((uint64_t []) { 1024 });
 536
 537         case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 538                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 539
 540         case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 541                 RET((uint64_t []) { 32768 });
 542
 543         case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 544         case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 545                 RET((uint64_t []) { 4096 });
 546
 547         case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 548                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 549
 550         case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 551                 RET((uint32_t []) { 800 /* MHz -- TODO */ });
 552
 553         case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 554                 RET((uint32_t []) { 9999 });  // TODO
 555
 556         case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 557                 RET((uint32_t []) { 1 }); // TODO
 558
 559         case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 560                 RET((uint32_t []) { 32 });  // TODO
 561
 562         case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
 563                 RET((uint64_t []) { 1024 }); // TODO
 564         }
 565
 566         return 0;
 567 }
 568
 569 static void
 570 panfrost_destroy_screen(struct pipe_screen *pscreen)
 571 {
 572         panfrost_close_device(pan_device(pscreen));
 573         ralloc_free(pscreen);
 574 }
 575
 576 static uint64_t
 577 panfrost_get_timestamp(struct pipe_screen *_screen)
 578 {
 579         return os_time_get_nano();
 580 }
 581
 582 static void
 583 panfrost_fence_reference(struct pipe_screen *pscreen,
 584                          struct pipe_fence_handle **ptr,
 585                          struct pipe_fence_handle *fence)
 586 {
 587         struct panfrost_fence **p = (struct panfrost_fence **)ptr;
 588         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 589         struct panfrost_fence *old = *p;
 590
 591         if (pipe_reference(&(*p)->reference, &f->reference)) {
 592                 util_dynarray_foreach(&old->syncfds, int, fd)
 593                         close(*fd);
 594                 util_dynarray_fini(&old->syncfds);
 595                 free(old);
 596         }
 597         *p = f;
 598 }
 599
 600 static bool
 601 panfrost_fence_finish(struct pipe_screen *pscreen,
 602                       struct pipe_context *ctx,
 603                       struct pipe_fence_handle *fence,
 604                       uint64_t timeout)
 605 {
 606         struct panfrost_device *dev = pan_device(pscreen);
 607         struct panfrost_fence *f = (struct panfrost_fence *)fence;
 608         struct util_dynarray syncobjs;
 609         int ret;
 610
 611         /* All fences were already signaled */
 612         if (!util_dynarray_num_elements(&f->syncfds, int))
 613                 return true;
 614
 615         util_dynarray_init(&syncobjs, NULL);
 616         util_dynarray_foreach(&f->syncfds, int, fd) {
 617                 uint32_t syncobj;
 618
 619                 ret = drmSyncobjCreate(dev->fd, 0, &syncobj);
 620                 assert(!ret);
 621
 622                 ret = drmSyncobjImportSyncFile(dev->fd, syncobj, *fd);
 623                 assert(!ret);
 624                 util_dynarray_append(&syncobjs, uint32_t, syncobj);
 625         }
 626
 627         uint64_t abs_timeout = os_time_get_absolute_timeout(timeout);
 628         if (abs_timeout == OS_TIMEOUT_INFINITE)
 629                 abs_timeout = INT64_MAX;
 630
 631         ret = drmSyncobjWait(dev->fd, util_dynarray_begin(&syncobjs),
 632                              util_dynarray_num_elements(&syncobjs, uint32_t),
 633                              abs_timeout, DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
 634                              NULL);
 635
 636         util_dynarray_foreach(&syncobjs, uint32_t, syncobj)
 637                 drmSyncobjDestroy(dev->fd, *syncobj);
 638
 639         return ret >= 0;
 640 }
 641
 642 struct panfrost_fence *
 643 panfrost_fence_create(struct panfrost_context *ctx,
 644                       struct util_dynarray *fences)
 645 {
 646         struct panfrost_device *device = pan_device(ctx->base.screen);
 647         struct panfrost_fence *f = calloc(1, sizeof(*f));
 648         if (!f)
 649                 return NULL;
 650
 651         util_dynarray_init(&f->syncfds, NULL);
 652
 653         /* Export fences from all pending batches. */
 654         util_dynarray_foreach(fences, struct panfrost_batch_fence *, fence) {
 655                 int fd = -1;
 656
 657                 /* The fence is already signaled, no need to export it. */
 658                 if ((*fence)->signaled)
 659                         continue;
 660
 661                 drmSyncobjExportSyncFile(device->fd, (*fence)->syncobj, &fd);
 662                 if (fd == -1)
 663                         fprintf(stderr, "export failed: %m\n");
 664
 665                 assert(fd != -1);
 666                 util_dynarray_append(&f->syncfds, int, fd);
 667         }
 668
 669         pipe_reference_init(&f->reference, 1);
 670
 671         return f;
 672 }
 673
 674 static const void *
 675 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 676                                      enum pipe_shader_ir ir,
 677                                      enum pipe_shader_type shader)
 678 {
 679         if (pan_device(pscreen)->quirks & IS_BIFROST)
 680                 return &bifrost_nir_options;
 681         else
 682                 return &midgard_nir_options;
 683 }
 684
 685 struct pipe_screen *
 686 panfrost_create_screen(int fd, struct renderonly *ro)
 687 {
 688         /* Blacklist apps known to be buggy under Panfrost */
 689         const char *proc = util_get_process_name();
 690         const char *blacklist[] = {
 691                 "chromium",
 692                 "chrome",
 693         };
 694
 695         for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
 696                 if ((strcmp(blacklist[i], proc) == 0))
 697                         return NULL;
 698         }
 699
 700         /* Create the screen */
 701         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 702
 703         if (!screen)
 704                 return NULL;
 705
 706         struct panfrost_device *dev = pan_device(&screen->base);
 707         panfrost_open_device(screen, fd, dev);
 708
 709         dev->debug = debug_get_flags_option("PAN_MESA_DEBUG", debug_options, 0);
 710
 711         if (ro) {
 712                 dev->ro = renderonly_dup(ro);
 713                 if (!dev->ro) {
 714                         if (dev->debug & PAN_DBG_MSGS)
 715                                 fprintf(stderr, "Failed to dup renderonly object\n");
 716
 717                         free(screen);
 718                         return NULL;
 719                 }
 720         }
 721
 722         /* Check if we're loading against a supported GPU model. */
 723
 724         switch (dev->gpu_id) {
 725         case 0x720: /* T720 */
 726         case 0x750: /* T760 */
 727         case 0x820: /* T820 */
 728         case 0x860: /* T860 */
 729                 break;
 730         case 0x7093: /* G31 */
 731         case 0x7212: /* G52 */
 732                 if (dev->debug & PAN_DBG_BIFROST)
 733                         break;
 734
 735                 /* fallthrough */
 736         default:
 737                 /* Fail to load against untested models */
 738                 debug_printf("panfrost: Unsupported model %X", dev->gpu_id);
 739                 panfrost_destroy_screen(&(screen->base));
 740                 return NULL;
 741         }
 742
 743         if (dev->debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
 744                 pandecode_initialize(!(dev->debug & PAN_DBG_TRACE));
 745
 746         screen->base.destroy = panfrost_destroy_screen;
 747
 748         screen->base.get_name = panfrost_get_name;
 749         screen->base.get_vendor = panfrost_get_vendor;
 750         screen->base.get_device_vendor = panfrost_get_device_vendor;
 751         screen->base.get_param = panfrost_get_param;
 752         screen->base.get_shader_param = panfrost_get_shader_param;
 753         screen->base.get_compute_param = panfrost_get_compute_param;
 754         screen->base.get_paramf = panfrost_get_paramf;
 755         screen->base.get_timestamp = panfrost_get_timestamp;
 756         screen->base.is_format_supported = panfrost_is_format_supported;
 757         screen->base.context_create = panfrost_create_context;
 758         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 759         screen->base.fence_reference = panfrost_fence_reference;
 760         screen->base.fence_finish = panfrost_fence_finish;
 761         screen->base.set_damage_region = panfrost_resource_set_damage_region;
 762
 763         panfrost_resource_screen_init(&screen->base);
 764
 765         return &screen->base;
 766 }