src/gallium/drivers/r300/r300_chipset.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "r300_chipset.h"
  24
  25 #include "util/u_debug.h"
  26
  27 #include <stdio.h>
  28
  29 /* r300_chipset: A file all to itself for deducing the various properties of
  30  * Radeons. */
  31
  32 /* Parse a PCI ID and fill an r300_capabilities struct with information. */
  33 void r300_parse_chipset(struct r300_capabilities* caps)
  34 {
  35     /* Reasonable defaults */
  36     caps->num_vert_fpus = 2;
  37     caps->num_tex_units = 16;
  38     caps->has_tcl = debug_get_bool_option("RADEON_NO_TCL", FALSE) ? FALSE : TRUE;
  39     caps->is_r400 = FALSE;
  40     caps->is_r500 = FALSE;
  41     caps->high_second_pipe = FALSE;
  42
  43     /* Note: These are not ordered by PCI ID. I leave that task to GCC,
  44      * which will perform the ordering while collating jump tables. Instead,
  45      * I've tried to group them according to capabilities and age. */
  46     switch (caps->pci_id) {
  47         case 0x4144:
  48             caps->family = CHIP_FAMILY_R300;
  49             caps->high_second_pipe = TRUE;
  50             caps->num_vert_fpus = 4;
  51             break;
  52
  53         case 0x4145:
  54         case 0x4146:
  55         case 0x4147:
  56         case 0x4E44:
  57         case 0x4E45:
  58         case 0x4E46:
  59         case 0x4E47:
  60             caps->family = CHIP_FAMILY_R300;
  61             caps->high_second_pipe = TRUE;
  62             caps->num_vert_fpus = 4;
  63             break;
  64
  65         case 0x4150:
  66         case 0x4151:
  67         case 0x4152:
  68         case 0x4153:
  69         case 0x4154:
  70         case 0x4155:
  71         case 0x4156:
  72         case 0x4E50:
  73         case 0x4E51:
  74         case 0x4E52:
  75         case 0x4E53:
  76         case 0x4E54:
  77         case 0x4E56:
  78             caps->family = CHIP_FAMILY_RV350;
  79             caps->high_second_pipe = TRUE;
  80             break;
  81
  82         case 0x4148:
  83         case 0x4149:
  84         case 0x414A:
  85         case 0x414B:
  86         case 0x4E48:
  87         case 0x4E49:
  88         case 0x4E4B:
  89             caps->family = CHIP_FAMILY_R350;
  90             caps->high_second_pipe = TRUE;
  91             caps->num_vert_fpus = 4;
  92             break;
  93
  94         case 0x4E4A:
  95             caps->family = CHIP_FAMILY_R360;
  96             caps->high_second_pipe = TRUE;
  97             caps->num_vert_fpus = 4;
  98             break;
  99
 100         case 0x5460:
 101         case 0x5462:
 102         case 0x5464:
 103         case 0x5B60:
 104         case 0x5B62:
 105         case 0x5B63:
 106         case 0x5B64:
 107         case 0x5B65:
 108             caps->family = CHIP_FAMILY_RV370;
 109             caps->high_second_pipe = TRUE;
 110             break;
 111
 112         case 0x3150:
 113         case 0x3152:
 114         case 0x3154:
 115         case 0x3155:
 116         case 0x3E50:
 117         case 0x3E54:
 118             caps->family = CHIP_FAMILY_RV380;
 119             caps->high_second_pipe = TRUE;
 120             break;
 121
 122         case 0x4A48:
 123         case 0x4A49:
 124         case 0x4A4A:
 125         case 0x4A4B:
 126         case 0x4A4C:
 127         case 0x4A4D:
 128         case 0x4A4E:
 129         case 0x4A4F:
 130         case 0x4A50:
 131         case 0x4A54:
 132             caps->family = CHIP_FAMILY_R420;
 133             caps->num_vert_fpus = 6;
 134             caps->is_r400 = TRUE;
 135             break;
 136
 137         case 0x5548:
 138         case 0x5549:
 139         case 0x554A:
 140         case 0x554B:
 141         case 0x5550:
 142         case 0x5551:
 143         case 0x5552:
 144         case 0x5554:
 145         case 0x5D57:
 146             caps->family = CHIP_FAMILY_R423;
 147             caps->num_vert_fpus = 6;
 148             caps->is_r400 = TRUE;
 149             break;
 150
 151         case 0x554C:
 152         case 0x554D:
 153         case 0x554E:
 154         case 0x554F:
 155         case 0x5D48:
 156         case 0x5D49:
 157         case 0x5D4A:
 158             caps->family = CHIP_FAMILY_R430;
 159             caps->num_vert_fpus = 6;
 160             caps->is_r400 = TRUE;
 161             break;
 162
 163         case 0x5D4C:
 164         case 0x5D4D:
 165         case 0x5D4E:
 166         case 0x5D4F:
 167         case 0x5D50:
 168         case 0x5D52:
 169             caps->family = CHIP_FAMILY_R480;
 170             caps->num_vert_fpus = 6;
 171             caps->is_r400 = TRUE;
 172             break;
 173
 174         case 0x4B48:
 175         case 0x4B49:
 176         case 0x4B4A:
 177         case 0x4B4B:
 178         case 0x4B4C:
 179             caps->family = CHIP_FAMILY_R481;
 180             caps->num_vert_fpus = 6;
 181             caps->is_r400 = TRUE;
 182             break;
 183
 184         case 0x5E4C:
 185         case 0x5E4F:
 186         case 0x564A:
 187         case 0x564B:
 188         case 0x564F:
 189         case 0x5652:
 190         case 0x5653:
 191         case 0x5657:
 192         case 0x5E48:
 193         case 0x5E4A:
 194         case 0x5E4B:
 195         case 0x5E4D:
 196             caps->family = CHIP_FAMILY_RV410;
 197             caps->num_vert_fpus = 6;
 198             caps->is_r400 = TRUE;
 199             break;
 200
 201         case 0x5954:
 202         case 0x5955:
 203             caps->family = CHIP_FAMILY_RS480;
 204             caps->has_tcl = FALSE;
 205             break;
 206
 207         case 0x5974:
 208         case 0x5975:
 209             caps->family = CHIP_FAMILY_RS482;
 210             caps->has_tcl = FALSE;
 211             break;
 212
 213         case 0x5A41:
 214         case 0x5A42:
 215             caps->family = CHIP_FAMILY_RS400;
 216             caps->has_tcl = FALSE;
 217             break;
 218
 219         case 0x5A61:
 220         case 0x5A62:
 221             caps->family = CHIP_FAMILY_RC410;
 222             caps->has_tcl = FALSE;
 223             break;
 224
 225         case 0x791E:
 226         case 0x791F:
 227             caps->family = CHIP_FAMILY_RS690;
 228             caps->has_tcl = FALSE;
 229             caps->is_r400 = TRUE;
 230             break;
 231
 232         case 0x793F:
 233         case 0x7941:
 234         case 0x7942:
 235             caps->family = CHIP_FAMILY_RS600;
 236             caps->has_tcl = FALSE;
 237             caps->is_r400 = TRUE;
 238             break;
 239
 240         case 0x796C:
 241         case 0x796D:
 242         case 0x796E:
 243         case 0x796F:
 244             caps->family = CHIP_FAMILY_RS740;
 245             caps->has_tcl = FALSE;
 246             caps->is_r400 = TRUE;
 247             break;
 248
 249         case 0x7100:
 250         case 0x7101:
 251         case 0x7102:
 252         case 0x7103:
 253         case 0x7104:
 254         case 0x7105:
 255         case 0x7106:
 256         case 0x7108:
 257         case 0x7109:
 258         case 0x710A:
 259         case 0x710B:
 260         case 0x710C:
 261         case 0x710E:
 262         case 0x710F:
 263             caps->family = CHIP_FAMILY_R520;
 264             caps->num_vert_fpus = 8;
 265             caps->is_r500 = TRUE;
 266             break;
 267
 268         case 0x7140:
 269         case 0x7141:
 270         case 0x7142:
 271         case 0x7143:
 272         case 0x7144:
 273         case 0x7145:
 274         case 0x7146:
 275         case 0x7147:
 276         case 0x7149:
 277         case 0x714A:
 278         case 0x714B:
 279         case 0x714C:
 280         case 0x714D:
 281         case 0x714E:
 282         case 0x714F:
 283         case 0x7151:
 284         case 0x7152:
 285         case 0x7153:
 286         case 0x715E:
 287         case 0x715F:
 288         case 0x7180:
 289         case 0x7181:
 290         case 0x7183:
 291         case 0x7186:
 292         case 0x7187:
 293         case 0x7188:
 294         case 0x718A:
 295         case 0x718B:
 296         case 0x718C:
 297         case 0x718D:
 298         case 0x718F:
 299         case 0x7193:
 300         case 0x7196:
 301         case 0x719B:
 302         case 0x719F:
 303         case 0x7200:
 304         case 0x7210:
 305         case 0x7211:
 306             caps->family = CHIP_FAMILY_RV515;
 307             caps->num_vert_fpus = 2;
 308             caps->is_r500 = TRUE;
 309             break;
 310
 311         case 0x71C0:
 312         case 0x71C1:
 313         case 0x71C2:
 314         case 0x71C3:
 315         case 0x71C4:
 316         case 0x71C5:
 317         case 0x71C6:
 318         case 0x71C7:
 319         case 0x71CD:
 320         case 0x71CE:
 321         case 0x71D2:
 322         case 0x71D4:
 323         case 0x71D5:
 324         case 0x71D6:
 325         case 0x71DA:
 326         case 0x71DE:
 327             caps->family = CHIP_FAMILY_RV530;
 328             caps->num_vert_fpus = 5;
 329             caps->is_r500 = TRUE;
 330             break;
 331
 332         case 0x7240:
 333         case 0x7243:
 334         case 0x7244:
 335         case 0x7245:
 336         case 0x7246:
 337         case 0x7247:
 338         case 0x7248:
 339         case 0x7249:
 340         case 0x724A:
 341         case 0x724B:
 342         case 0x724C:
 343         case 0x724D:
 344         case 0x724E:
 345         case 0x724F:
 346         case 0x7284:
 347             caps->family = CHIP_FAMILY_R580;
 348             caps->num_vert_fpus = 8;
 349             caps->is_r500 = TRUE;
 350             break;
 351
 352         case 0x7280:
 353             caps->family = CHIP_FAMILY_RV570;
 354             caps->num_vert_fpus = 8;
 355             caps->is_r500 = TRUE;
 356             break;
 357
 358         case 0x7281:
 359         case 0x7283:
 360         case 0x7287:
 361         case 0x7288:
 362         case 0x7289:
 363         case 0x728B:
 364         case 0x728C:
 365         case 0x7290:
 366         case 0x7291:
 367         case 0x7293:
 368         case 0x7297:
 369             caps->family = CHIP_FAMILY_RV560;
 370             caps->num_vert_fpus = 8;
 371             caps->is_r500 = TRUE;
 372             break;
 373
 374         default:
 375             fprintf(stderr, "r300: Warning: Unknown chipset 0x%x\n",
 376                     caps->pci_id);
 377     }
 378
 379     caps->is_rv350 = caps->family >= CHIP_FAMILY_RV350;
 380 }