winsys/drm: Handle circular dependencies in Makefile.egl.
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_prim.h"
34
35 #include "r300_cs.h"
36 #include "r300_context.h"
37 #include "r300_emit.h"
38 #include "r300_reg.h"
39 #include "r300_render.h"
40 #include "r300_state_derived.h"
41
42 /* r300_render: Vertex and index buffer primitive emission. */
43 #define R300_MAX_VBO_SIZE (1024 * 1024)
44
45 /* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */
46 //#define ENABLE_ALT_NUM_VERTS
47
48 uint32_t r300_translate_primitive(unsigned prim)
49 {
50 switch (prim) {
51 case PIPE_PRIM_POINTS:
52 return R300_VAP_VF_CNTL__PRIM_POINTS;
53 case PIPE_PRIM_LINES:
54 return R300_VAP_VF_CNTL__PRIM_LINES;
55 case PIPE_PRIM_LINE_LOOP:
56 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
57 case PIPE_PRIM_LINE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
59 case PIPE_PRIM_TRIANGLES:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
61 case PIPE_PRIM_TRIANGLE_STRIP:
62 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
63 case PIPE_PRIM_TRIANGLE_FAN:
64 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
65 case PIPE_PRIM_QUADS:
66 return R300_VAP_VF_CNTL__PRIM_QUADS;
67 case PIPE_PRIM_QUAD_STRIP:
68 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
69 case PIPE_PRIM_POLYGON:
70 return R300_VAP_VF_CNTL__PRIM_POLYGON;
71 default:
72 return 0;
73 }
74 }
75
76 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
77 unsigned mode)
78 {
79 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
80 uint32_t color_control = rs->color_control;
81
82 /* By default (see r300_state.c:r300_create_rs_state) color_control is
83 * initialized to provoking the first vertex.
84 *
85 * Triangle fans must be reduced to the second vertex, not the first, in
86 * Gallium flatshade-first mode, as per the GL spec.
87 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
88 *
89 * Quads never provoke correctly in flatshade-first mode. The first
90 * vertex is never considered as provoking, so only the second, third,
91 * and fourth vertices can be selected, and both "third" and "last" modes
92 * select the fourth vertex. This is probably due to D3D lacking quads.
93 *
94 * Similarly, polygons reduce to the first, not the last, vertex, when in
95 * "last" mode, and all other modes start from the second vertex.
96 *
97 * ~ C.
98 */
99
100 if (rs->rs.flatshade_first) {
101 switch (mode) {
102 case PIPE_PRIM_TRIANGLE_FAN:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
104 break;
105 case PIPE_PRIM_QUADS:
106 case PIPE_PRIM_QUAD_STRIP:
107 case PIPE_PRIM_POLYGON:
108 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
109 break;
110 default:
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
112 break;
113 }
114 } else {
115 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
116 }
117
118 return color_control;
119 }
120
121 /* Check if the requested number of dwords is available in the CS and
122 * if not, flush. Return TRUE if the flush occured. */
123 static boolean r300_reserve_cs_space(struct r300_context *r300,
124 unsigned dwords)
125 {
126 if (!r300->winsys->check_cs(r300->winsys, dwords)) {
127 r300->context.flush(&r300->context, 0, NULL);
128 return TRUE;
129 }
130 return FALSE;
131 }
132
133 static boolean immd_is_good_idea(struct r300_context *r300,
134 unsigned count)
135 {
136 return count <= 4;
137 }
138
139 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
140 unsigned mode,
141 unsigned start,
142 unsigned count)
143 {
144 struct pipe_vertex_element* velem;
145 struct pipe_vertex_buffer* vbuf;
146 unsigned vertex_element_count = r300->vertex_element_count;
147 unsigned i, v, vbi, dw, elem_offset, dwords;
148
149 /* Size of the vertex, in dwords. */
150 unsigned vertex_size = 0;
151
152 /* Offsets of the attribute, in dwords, from the start of the vertex. */
153 unsigned offset[PIPE_MAX_ATTRIBS];
154
155 /* Size of the vertex element, in dwords. */
156 unsigned size[PIPE_MAX_ATTRIBS];
157
158 /* Stride to the same attrib in the next vertex in the vertex buffer,
159 * in dwords. */
160 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
161
162 /* Mapped vertex buffers. */
163 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
164
165 CS_LOCALS(r300);
166
167 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
168 for (i = 0; i < vertex_element_count; i++) {
169 velem = &r300->vertex_element[i];
170 offset[i] = velem->src_offset / 4;
171 size[i] = util_format_get_blocksize(velem->src_format) / 4;
172 vertex_size += size[i];
173 vbi = velem->vertex_buffer_index;
174
175 /* Map the buffer. */
176 if (!map[vbi]) {
177 vbuf = &r300->vertex_buffer[vbi];
178 map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen,
179 vbuf->buffer,
180 PIPE_BUFFER_USAGE_CPU_READ);
181 map[vbi] += vbuf->buffer_offset / 4;
182 stride[vbi] = vbuf->stride / 4;
183 }
184 }
185
186 dwords = 10 + count * vertex_size;
187
188 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
189 r300_emit_buffer_validate(r300, FALSE, NULL);
190 r300_emit_dirty_state(r300);
191
192 BEGIN_CS(dwords);
193 OUT_CS_REG(R300_GA_COLOR_CONTROL,
194 r300_provoking_vertex_fixes(r300, mode));
195 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
196 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
197 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
198 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
199 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
200 r300_translate_primitive(mode));
201
202 /* Emit vertices. */
203 for (v = 0; v < count; v++) {
204 for (i = 0; i < vertex_element_count; i++) {
205 velem = &r300->vertex_element[i];
206 vbi = velem->vertex_buffer_index;
207 elem_offset = offset[i] + stride[vbi] * (v + start);
208
209 for (dw = 0; dw < size[i]; dw++) {
210 OUT_CS(map[vbi][elem_offset + dw]);
211 }
212 }
213 }
214 END_CS;
215
216 /* Unmap buffers. */
217 for (i = 0; i < vertex_element_count; i++) {
218 vbi = r300->vertex_element[i].vertex_buffer_index;
219
220 if (map[vbi]) {
221 vbuf = &r300->vertex_buffer[vbi];
222 pipe_buffer_unmap(r300->context.screen, vbuf->buffer);
223 map[vbi] = NULL;
224 }
225 }
226 }
227
228 static void r300_emit_draw_arrays(struct r300_context *r300,
229 unsigned mode,
230 unsigned count)
231 {
232 #if defined(ENABLE_ALT_NUM_VERTS)
233 boolean alt_num_verts = count > 65535;
234 #else
235 boolean alt_num_verts = FALSE;
236 #endif
237 CS_LOCALS(r300);
238
239 if (alt_num_verts) {
240 assert(count < (1 << 24));
241 BEGIN_CS(10);
242 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
243 } else {
244 BEGIN_CS(8);
245 }
246 OUT_CS_REG(R300_GA_COLOR_CONTROL,
247 r300_provoking_vertex_fixes(r300, mode));
248 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0);
249 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
250 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
251 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
252 r300_translate_primitive(mode) |
253 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
254 END_CS;
255 }
256
257 static void r300_emit_draw_elements(struct r300_context *r300,
258 struct pipe_buffer* indexBuffer,
259 unsigned indexSize,
260 unsigned minIndex,
261 unsigned maxIndex,
262 unsigned mode,
263 unsigned start,
264 unsigned count)
265 {
266 uint32_t count_dwords;
267 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
268 #if defined(ENABLE_ALT_NUM_VERTS)
269 boolean alt_num_verts = count > 65535;
270 #else
271 boolean alt_num_verts = FALSE;
272 #endif
273 CS_LOCALS(r300);
274
275 assert((start * indexSize) % 4 == 0);
276 assert(count < (1 << 24));
277
278 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
279 count, minIndex, maxIndex);
280
281 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
282
283 if (alt_num_verts) {
284 BEGIN_CS(16);
285 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
286 } else {
287 BEGIN_CS(14);
288 }
289 OUT_CS_REG(R300_GA_COLOR_CONTROL,
290 r300_provoking_vertex_fixes(r300, mode));
291 OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, minIndex);
292 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex);
293 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
294 if (indexSize == 4) {
295 count_dwords = count;
296 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
297 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
298 r300_translate_primitive(mode) |
299 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
300 } else {
301 count_dwords = (count + 1) / 2;
302 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
303 r300_translate_primitive(mode) |
304 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
305 }
306
307 /* INDX_BUFFER is a truly special packet3.
308 * Unlike most other packet3, where the offset is after the count,
309 * the order is reversed, so the relocation ends up carrying the
310 * size of the indexbuf instead of the offset.
311 */
312 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
313 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
314 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
315 OUT_CS(offset_dwords << 2);
316 OUT_CS_RELOC(indexBuffer, count_dwords,
317 RADEON_GEM_DOMAIN_GTT, 0, 0);
318
319 END_CS;
320 }
321
322 static void r300_shorten_ubyte_elts(struct r300_context* r300,
323 struct pipe_buffer** elts,
324 unsigned count)
325 {
326 struct pipe_screen* screen = r300->context.screen;
327 struct pipe_buffer* new_elts;
328 unsigned char *in_map;
329 unsigned short *out_map;
330 unsigned i;
331
332 new_elts = screen->buffer_create(screen, 32,
333 PIPE_BUFFER_USAGE_INDEX |
334 PIPE_BUFFER_USAGE_CPU_WRITE |
335 PIPE_BUFFER_USAGE_GPU_READ,
336 2 * count);
337
338 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
339 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
340
341 for (i = 0; i < count; i++) {
342 *out_map = (unsigned short)*in_map;
343 in_map++;
344 out_map++;
345 }
346
347 pipe_buffer_unmap(screen, *elts);
348 pipe_buffer_unmap(screen, new_elts);
349
350 *elts = new_elts;
351 }
352
353 /* This is the fast-path drawing & emission for HW TCL. */
354 void r300_draw_range_elements(struct pipe_context* pipe,
355 struct pipe_buffer* indexBuffer,
356 unsigned indexSize,
357 unsigned minIndex,
358 unsigned maxIndex,
359 unsigned mode,
360 unsigned start,
361 unsigned count)
362 {
363 struct r300_context* r300 = r300_context(pipe);
364 struct pipe_buffer* orgIndexBuffer = indexBuffer;
365 #if defined(ENABLE_ALT_NUM_VERTS)
366 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
367 count > 65536;
368 #else
369 boolean alt_num_verts = FALSE;
370 #endif
371 unsigned short_count;
372
373 if (!u_trim_pipe_prim(mode, &count)) {
374 return;
375 }
376
377 if (indexSize == 1) {
378 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
379 indexSize = 2;
380 }
381
382 r300_update_derived_state(r300);
383
384 /* 128 dwords for emit_aos and emit_draw_elements */
385 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
386 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
387 r300_emit_dirty_state(r300);
388 r300_emit_aos(r300, 0);
389
390 if (alt_num_verts || count <= 65535) {
391 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
392 maxIndex, mode, start, count);
393 } else {
394 do {
395 short_count = MIN2(count, 65534);
396 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
397 maxIndex, mode, start, short_count);
398
399 start += short_count;
400 count -= short_count;
401
402 /* 16 spare dwords are enough for emit_draw_elements. */
403 if (count && r300_reserve_cs_space(r300, 16)) {
404 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
405 r300_emit_dirty_state(r300);
406 r300_emit_aos(r300, 0);
407 }
408 } while (count);
409 }
410
411 if (indexBuffer != orgIndexBuffer) {
412 pipe->screen->buffer_destroy(indexBuffer);
413 }
414 }
415
416 /* Simple helpers for context setup. Should probably be moved to util. */
417 void r300_draw_elements(struct pipe_context* pipe,
418 struct pipe_buffer* indexBuffer,
419 unsigned indexSize, unsigned mode,
420 unsigned start, unsigned count)
421 {
422 struct r300_context *r300 = r300_context(pipe);
423
424 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0,
425 r300->vertex_buffer_max_index,
426 mode, start, count);
427 }
428
429 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
430 unsigned start, unsigned count)
431 {
432 struct r300_context* r300 = r300_context(pipe);
433 #if defined(ENABLE_ALT_NUM_VERTS)
434 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
435 count > 65536;
436 #else
437 boolean alt_num_verts = FALSE;
438 #endif
439 unsigned short_count;
440
441 if (!u_trim_pipe_prim(mode, &count)) {
442 return;
443 }
444
445 r300_update_derived_state(r300);
446
447 if (immd_is_good_idea(r300, count)) {
448 r300_emit_draw_arrays_immediate(r300, mode, start, count);
449 } else {
450 /* Make sure there are at least 128 spare dwords in the command buffer.
451 * (most of it being consumed by emit_aos) */
452 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
453 r300_emit_buffer_validate(r300, TRUE, NULL);
454 r300_emit_dirty_state(r300);
455
456 if (alt_num_verts || count <= 65535) {
457 r300_emit_aos(r300, start);
458 r300_emit_draw_arrays(r300, mode, count);
459 } else {
460 do {
461 short_count = MIN2(count, 65535);
462 r300_emit_aos(r300, start);
463 r300_emit_draw_arrays(r300, mode, short_count);
464
465 start += short_count;
466 count -= short_count;
467
468 /* Again, we emit both AOS and draw_arrays so there should be
469 * at least 128 spare dwords. */
470 if (count && r300_reserve_cs_space(r300, 128)) {
471 r300_emit_buffer_validate(r300, TRUE, NULL);
472 r300_emit_dirty_state(r300);
473 }
474 } while (count);
475 }
476 }
477 }
478
479 /****************************************************************************
480 * The rest of this file is for SW TCL rendering only. Please be polite and *
481 * keep these functions separated so that they are easier to locate. ~C. *
482 ***************************************************************************/
483
484 /* SW TCL arrays, using Draw. */
485 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
486 unsigned mode,
487 unsigned start,
488 unsigned count)
489 {
490 struct r300_context* r300 = r300_context(pipe);
491 int i;
492
493 if (!u_trim_pipe_prim(mode, &count)) {
494 return;
495 }
496
497 for (i = 0; i < r300->vertex_buffer_count; i++) {
498 void* buf = pipe_buffer_map(pipe->screen,
499 r300->vertex_buffer[i].buffer,
500 PIPE_BUFFER_USAGE_CPU_READ);
501 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
502 }
503
504 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
505
506 draw_set_mapped_constant_buffer(r300->draw,
507 PIPE_SHADER_VERTEX,
508 0,
509 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
510 r300->shader_constants[PIPE_SHADER_VERTEX].count *
511 (sizeof(float) * 4));
512
513 draw_arrays(r300->draw, mode, start, count);
514
515 for (i = 0; i < r300->vertex_buffer_count; i++) {
516 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
517 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
518 }
519 }
520
521 /* SW TCL elements, using Draw. */
522 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
523 struct pipe_buffer* indexBuffer,
524 unsigned indexSize,
525 unsigned minIndex,
526 unsigned maxIndex,
527 unsigned mode,
528 unsigned start,
529 unsigned count)
530 {
531 struct r300_context* r300 = r300_context(pipe);
532 int i;
533 void* indices;
534
535 if (!u_trim_pipe_prim(mode, &count)) {
536 return;
537 }
538
539 for (i = 0; i < r300->vertex_buffer_count; i++) {
540 void* buf = pipe_buffer_map(pipe->screen,
541 r300->vertex_buffer[i].buffer,
542 PIPE_BUFFER_USAGE_CPU_READ);
543 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
544 }
545
546 indices = pipe_buffer_map(pipe->screen, indexBuffer,
547 PIPE_BUFFER_USAGE_CPU_READ);
548 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
549 minIndex, maxIndex, indices);
550
551 draw_set_mapped_constant_buffer(r300->draw,
552 PIPE_SHADER_VERTEX,
553 0,
554 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
555 r300->shader_constants[PIPE_SHADER_VERTEX].count *
556 (sizeof(float) * 4));
557
558 draw_arrays(r300->draw, mode, start, count);
559
560 for (i = 0; i < r300->vertex_buffer_count; i++) {
561 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
562 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
563 }
564
565 pipe_buffer_unmap(pipe->screen, indexBuffer);
566 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
567 start + count - 1, NULL);
568 }
569
570 /* Object for rendering using Draw. */
571 struct r300_render {
572 /* Parent class */
573 struct vbuf_render base;
574
575 /* Pipe context */
576 struct r300_context* r300;
577
578 /* Vertex information */
579 size_t vertex_size;
580 unsigned prim;
581 unsigned hwprim;
582
583 /* VBO */
584 struct pipe_buffer* vbo;
585 size_t vbo_size;
586 size_t vbo_offset;
587 size_t vbo_max_used;
588 void * vbo_ptr;
589 };
590
591 static INLINE struct r300_render*
592 r300_render(struct vbuf_render* render)
593 {
594 return (struct r300_render*)render;
595 }
596
597 static const struct vertex_info*
598 r300_render_get_vertex_info(struct vbuf_render* render)
599 {
600 struct r300_render* r300render = r300_render(render);
601 struct r300_context* r300 = r300render->r300;
602
603 r300_update_derived_state(r300);
604
605 return &r300->vertex_info;
606 }
607
608 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
609 ushort vertex_size,
610 ushort count)
611 {
612 struct r300_render* r300render = r300_render(render);
613 struct r300_context* r300 = r300render->r300;
614 struct pipe_screen* screen = r300->context.screen;
615 size_t size = (size_t)vertex_size * (size_t)count;
616
617 if (size + r300render->vbo_offset > r300render->vbo_size)
618 {
619 pipe_buffer_reference(&r300->vbo, NULL);
620 r300render->vbo = pipe_buffer_create(screen,
621 64,
622 PIPE_BUFFER_USAGE_VERTEX,
623 R300_MAX_VBO_SIZE);
624 r300render->vbo_offset = 0;
625 r300render->vbo_size = R300_MAX_VBO_SIZE;
626 }
627
628 r300render->vertex_size = vertex_size;
629 r300->vbo = r300render->vbo;
630 r300->vbo_offset = r300render->vbo_offset;
631
632 return (r300render->vbo) ? TRUE : FALSE;
633 }
634
635 static void* r300_render_map_vertices(struct vbuf_render* render)
636 {
637 struct r300_render* r300render = r300_render(render);
638 struct pipe_screen* screen = r300render->r300->context.screen;
639
640 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
641 PIPE_BUFFER_USAGE_CPU_WRITE);
642
643 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
644 }
645
646 static void r300_render_unmap_vertices(struct vbuf_render* render,
647 ushort min,
648 ushort max)
649 {
650 struct r300_render* r300render = r300_render(render);
651 struct pipe_screen* screen = r300render->r300->context.screen;
652 CS_LOCALS(r300render->r300);
653 BEGIN_CS(2);
654 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
655 END_CS;
656
657 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
658 r300render->vertex_size * (max + 1));
659 pipe_buffer_unmap(screen, r300render->vbo);
660 }
661
662 static void r300_render_release_vertices(struct vbuf_render* render)
663 {
664 struct r300_render* r300render = r300_render(render);
665
666 r300render->vbo_offset += r300render->vbo_max_used;
667 r300render->vbo_max_used = 0;
668 }
669
670 static boolean r300_render_set_primitive(struct vbuf_render* render,
671 unsigned prim)
672 {
673 struct r300_render* r300render = r300_render(render);
674
675 r300render->prim = prim;
676 r300render->hwprim = r300_translate_primitive(prim);
677
678 return TRUE;
679 }
680
681 static void r300_render_draw_arrays(struct vbuf_render* render,
682 unsigned start,
683 unsigned count)
684 {
685 struct r300_render* r300render = r300_render(render);
686 struct r300_context* r300 = r300render->r300;
687
688 CS_LOCALS(r300);
689
690 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2);
691 r300_emit_buffer_validate(r300, FALSE, NULL);
692 r300_emit_dirty_state(r300);
693
694 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
695
696 BEGIN_CS(2);
697 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
698 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
699 r300render->hwprim);
700 END_CS;
701 }
702
703 static void r300_render_draw(struct vbuf_render* render,
704 const ushort* indices,
705 uint count)
706 {
707 struct r300_render* r300render = r300_render(render);
708 struct r300_context* r300 = r300render->r300;
709 int i;
710 unsigned dwords = 2 + (count+1)/2;
711
712 CS_LOCALS(r300);
713
714 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
715 r300_emit_buffer_validate(r300, FALSE, NULL);
716 r300_emit_dirty_state(r300);
717
718 BEGIN_CS(dwords);
719 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
720 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
721 r300render->hwprim);
722 for (i = 0; i < count-1; i += 2) {
723 OUT_CS(indices[i+1] << 16 | indices[i]);
724 }
725 if (count % 2) {
726 OUT_CS(indices[count-1]);
727 }
728 END_CS;
729 }
730
731 static void r300_render_destroy(struct vbuf_render* render)
732 {
733 FREE(render);
734 }
735
736 static struct vbuf_render* r300_render_create(struct r300_context* r300)
737 {
738 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
739
740 r300render->r300 = r300;
741
742 /* XXX find real numbers plz */
743 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
744 r300render->base.max_indices = 16 * 1024;
745
746 r300render->base.get_vertex_info = r300_render_get_vertex_info;
747 r300render->base.allocate_vertices = r300_render_allocate_vertices;
748 r300render->base.map_vertices = r300_render_map_vertices;
749 r300render->base.unmap_vertices = r300_render_unmap_vertices;
750 r300render->base.set_primitive = r300_render_set_primitive;
751 r300render->base.draw = r300_render_draw;
752 r300render->base.draw_arrays = r300_render_draw_arrays;
753 r300render->base.release_vertices = r300_render_release_vertices;
754 r300render->base.destroy = r300_render_destroy;
755
756 r300render->vbo = NULL;
757 r300render->vbo_size = 0;
758 r300render->vbo_offset = 0;
759
760 return &r300render->base;
761 }
762
763 struct draw_stage* r300_draw_stage(struct r300_context* r300)
764 {
765 struct vbuf_render* render;
766 struct draw_stage* stage;
767
768 render = r300_render_create(r300);
769
770 if (!render) {
771 return NULL;
772 }
773
774 stage = draw_vbuf_stage(r300->draw, render);
775
776 if (!stage) {
777 render->destroy(render);
778 return NULL;
779 }
780
781 draw_set_render(r300->draw, render);
782
783 return stage;
784 }