src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "util/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_TWO_SIDED_STENCIL:
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101         case PIPE_CAP_POINT_SPRITE:
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 104         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 105         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 107         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 108         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 109         case PIPE_CAP_CONDITIONAL_RENDER:
 110         case PIPE_CAP_TEXTURE_BARRIER:
 111         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 117             return 1;
 118
 119         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 120             return R300_BUFFER_ALIGNMENT;
 121
 122         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 123             return 16;
 124
 125         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 126             return 120;
 127
 128         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 129         case PIPE_CAP_TEXTURE_SWIZZLE:
 130             return r300screen->caps.dxtc_swizzle;
 131
 132         /* We don't support color clamping on r500, so that we can use color
 133          * intepolators for generic varyings. */
 134         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 135             return !is_r500;
 136
 137         /* Supported on r500 only. */
 138         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 139         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 140         case PIPE_CAP_SM3:
 141             return is_r500 ? 1 : 0;
 142
 143         /* Unsupported features. */
 144         case PIPE_CAP_QUERY_TIME_ELAPSED:
 145         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 146         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 147         case PIPE_CAP_INDEP_BLEND_ENABLE:
 148         case PIPE_CAP_INDEP_BLEND_FUNC:
 149         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 150         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 151         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 152         case PIPE_CAP_TGSI_INSTANCEID:
 153         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 154         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 156         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 157         case PIPE_CAP_MIN_TEXEL_OFFSET:
 158         case PIPE_CAP_MAX_TEXEL_OFFSET:
 159         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 163         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 164         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 165         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 166         case PIPE_CAP_MAX_VERTEX_STREAMS:
 167         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 168         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 169         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 170         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 171         case PIPE_CAP_COMPUTE:
 172         case PIPE_CAP_START_INSTANCE:
 173         case PIPE_CAP_QUERY_TIMESTAMP:
 174         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 175         case PIPE_CAP_CUBE_MAP_ARRAY:
 176         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 177         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 178         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 179         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 180         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 181         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 182         case PIPE_CAP_TEXTURE_GATHER_SM5:
 183         case PIPE_CAP_TEXTURE_QUERY_LOD:
 184         case PIPE_CAP_FAKE_SW_MSAA:
 185         case PIPE_CAP_SAMPLE_SHADING:
 186         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 187         case PIPE_CAP_DRAW_INDIRECT:
 188         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 189         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 190         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 191         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 192         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 193         case PIPE_CAP_VERTEXID_NOBASE:
 194         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 195         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 196         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 197         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 198         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 199         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 200         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 201         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 202         case PIPE_CAP_TGSI_TXQS:
 203         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 204         case PIPE_CAP_SHAREABLE_SHADERS:
 205         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 206         case PIPE_CAP_CLEAR_TEXTURE:
 207         case PIPE_CAP_DRAW_PARAMETERS:
 208         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 209         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 210         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 211         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 212         case PIPE_CAP_INVALIDATE_BUFFER:
 213         case PIPE_CAP_GENERATE_MIPMAP:
 214         case PIPE_CAP_STRING_MARKER:
 215         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 216         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 217         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 218         case PIPE_CAP_QUERY_MEMORY_INFO:
 219         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 220         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 221         case PIPE_CAP_CULL_DISTANCE:
 222         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 223         case PIPE_CAP_TGSI_VOTE:
 224         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 225         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 226         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 227         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 228         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 229         case PIPE_CAP_NATIVE_FENCE_FD:
 230         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 231         case PIPE_CAP_TGSI_FS_FBFETCH:
 232         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 233         case PIPE_CAP_DOUBLES:
 234         case PIPE_CAP_INT64:
 235         case PIPE_CAP_INT64_DIVMOD:
 236         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 237         case PIPE_CAP_TGSI_CLOCK:
 238         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 239         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 240         case PIPE_CAP_TGSI_BALLOT:
 241         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 242         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 243         case PIPE_CAP_POST_DEPTH_COVERAGE:
 244         case PIPE_CAP_BINDLESS_TEXTURE:
 245         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 246         case PIPE_CAP_QUERY_SO_OVERFLOW:
 247         case PIPE_CAP_MEMOBJ:
 248         case PIPE_CAP_LOAD_CONSTBUF:
 249         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 250         case PIPE_CAP_TILE_RASTER_ORDER:
 251         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 252         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 253             return 0;
 254
 255         /* SWTCL-only features. */
 256         case PIPE_CAP_PRIMITIVE_RESTART:
 257         case PIPE_CAP_USER_VERTEX_BUFFERS:
 258         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 259             return !r300screen->caps.has_tcl;
 260
 261         /* HWTCL-only features / limitations. */
 262         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 263         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 264         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 265             return r300screen->caps.has_tcl;
 266         case PIPE_CAP_TGSI_TEXCOORD:
 267             return 0;
 268
 269         /* Texturing. */
 270         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 271         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 272         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 273             /* 13 == 4096, 12 == 2048 */
 274             return is_r500 ? 13 : 12;
 275
 276         /* Render targets. */
 277         case PIPE_CAP_MAX_RENDER_TARGETS:
 278             return 4;
 279         case PIPE_CAP_ENDIANNESS:
 280             return PIPE_ENDIAN_LITTLE;
 281
 282         case PIPE_CAP_MAX_VIEWPORTS:
 283             return 1;
 284
 285         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 286             return 2048;
 287
 288         case PIPE_CAP_VENDOR_ID:
 289                 return 0x1002;
 290         case PIPE_CAP_DEVICE_ID:
 291                 return r300screen->info.pci_id;
 292         case PIPE_CAP_ACCELERATED:
 293                 return 1;
 294         case PIPE_CAP_VIDEO_MEMORY:
 295                 return r300screen->info.vram_size >> 20;
 296         case PIPE_CAP_UMA:
 297                 return 0;
 298         case PIPE_CAP_PCI_GROUP:
 299             return r300screen->info.pci_domain;
 300         case PIPE_CAP_PCI_BUS:
 301             return r300screen->info.pci_bus;
 302         case PIPE_CAP_PCI_DEVICE:
 303             return r300screen->info.pci_dev;
 304         case PIPE_CAP_PCI_FUNCTION:
 305             return r300screen->info.pci_func;
 306     }
 307     return 0;
 308 }
 309
 310 static int r300_get_shader_param(struct pipe_screen *pscreen,
 311                                  enum pipe_shader_type shader,
 312                                  enum pipe_shader_cap param)
 313 {
 314    struct r300_screen* r300screen = r300_screen(pscreen);
 315    boolean is_r400 = r300screen->caps.is_r400;
 316    boolean is_r500 = r300screen->caps.is_r500;
 317
 318    switch (shader) {
 319     case PIPE_SHADER_FRAGMENT:
 320         switch (param)
 321         {
 322         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 323             return is_r500 || is_r400 ? 512 : 96;
 324         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 325             return is_r500 || is_r400 ? 512 : 64;
 326         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 327             return is_r500 || is_r400 ? 512 : 32;
 328         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 329             return is_r500 ? 511 : 4;
 330         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 331             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 332             /* Fragment shader limits. */
 333         case PIPE_SHADER_CAP_MAX_INPUTS:
 334             /* 2 colors + 8 texcoords are always supported
 335              * (minus fog and wpos).
 336              *
 337              * R500 has the ability to turn 3rd and 4th color into
 338              * additional texcoords but there is no two-sided color
 339              * selection then. However the facing bit can be used instead. */
 340             return 10;
 341         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 342             return 4;
 343         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 344             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 345         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 346         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 347             return 1;
 348         case PIPE_SHADER_CAP_MAX_TEMPS:
 349             return is_r500 ? 128 : is_r400 ? 64 : 32;
 350         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 351         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 352            return r300screen->caps.num_tex_units;
 353         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 354         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 355         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 356         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 357         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 358         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 359         case PIPE_SHADER_CAP_SUBROUTINES:
 360         case PIPE_SHADER_CAP_INTEGERS:
 361         case PIPE_SHADER_CAP_INT64_ATOMICS:
 362         case PIPE_SHADER_CAP_FP16:
 363         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 364         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 365         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 366         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 367         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 368         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 369         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 370         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 371             return 0;
 372         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 373             return 32;
 374         case PIPE_SHADER_CAP_PREFERRED_IR:
 375             return PIPE_SHADER_IR_TGSI;
 376         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 377             return 0;
 378         }
 379         break;
 380     case PIPE_SHADER_VERTEX:
 381         switch (param)
 382         {
 383         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 384         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 385         case PIPE_SHADER_CAP_SUBROUTINES:
 386             return 0;
 387         default:;
 388         }
 389
 390         if (!r300screen->caps.has_tcl) {
 391             return draw_get_shader_param(shader, param);
 392         }
 393
 394         switch (param)
 395         {
 396         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 397         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 398             return is_r500 ? 1024 : 256;
 399         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 400             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 401         case PIPE_SHADER_CAP_MAX_INPUTS:
 402             return 16;
 403         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 404             return 10;
 405         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 406             return 256 * sizeof(float[4]);
 407         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 408             return 1;
 409         case PIPE_SHADER_CAP_MAX_TEMPS:
 410             return 32;
 411         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 412         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 413             return 1;
 414         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 415         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 416         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 417         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 418         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 419         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 420         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 421         case PIPE_SHADER_CAP_SUBROUTINES:
 422         case PIPE_SHADER_CAP_INTEGERS:
 423         case PIPE_SHADER_CAP_FP16:
 424         case PIPE_SHADER_CAP_INT64_ATOMICS:
 425         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 426         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 427         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 428         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 429         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 430         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 431         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 432         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 433         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 434         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 435             return 0;
 436         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 437             return 32;
 438         case PIPE_SHADER_CAP_PREFERRED_IR:
 439             return PIPE_SHADER_IR_TGSI;
 440         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 441             return 0;
 442         }
 443         break;
 444     default:
 445         ; /* nothing */
 446     }
 447     return 0;
 448 }
 449
 450 static float r300_get_paramf(struct pipe_screen* pscreen,
 451                              enum pipe_capf param)
 452 {
 453     struct r300_screen* r300screen = r300_screen(pscreen);
 454
 455     switch (param) {
 456         case PIPE_CAPF_MAX_LINE_WIDTH:
 457         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 458         case PIPE_CAPF_MAX_POINT_WIDTH:
 459         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 460             /* The maximum dimensions of the colorbuffer are our practical
 461              * rendering limits. 2048 pixels should be enough for anybody. */
 462             if (r300screen->caps.is_r500) {
 463                 return 4096.0f;
 464             } else if (r300screen->caps.is_r400) {
 465                 return 4021.0f;
 466             } else {
 467                 return 2560.0f;
 468             }
 469         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 470             return 16.0f;
 471         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 472             return 16.0f;
 473         case PIPE_CAPF_GUARD_BAND_LEFT:
 474         case PIPE_CAPF_GUARD_BAND_TOP:
 475         case PIPE_CAPF_GUARD_BAND_RIGHT:
 476         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 477             return 0.0f;
 478         default:
 479             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 480                          param);
 481             return 0.0f;
 482     }
 483 }
 484
 485 static int r300_get_video_param(struct pipe_screen *screen,
 486                                 enum pipe_video_profile profile,
 487                                 enum pipe_video_entrypoint entrypoint,
 488                                 enum pipe_video_cap param)
 489 {
 490    switch (param) {
 491       case PIPE_VIDEO_CAP_SUPPORTED:
 492          return vl_profile_supported(screen, profile, entrypoint);
 493       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 494          return 0;
 495       case PIPE_VIDEO_CAP_MAX_WIDTH:
 496       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 497          return vl_video_buffer_max_size(screen);
 498       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 499          return PIPE_FORMAT_NV12;
 500       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 501          return false;
 502       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 503          return false;
 504       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 505          return true;
 506       case PIPE_VIDEO_CAP_MAX_LEVEL:
 507          return vl_level_supported(screen, profile);
 508       default:
 509          return 0;
 510    }
 511 }
 512
 513 /**
 514  * Whether the format matches:
 515  *   PIPE_FORMAT_?10?10?10?2_UNORM
 516  */
 517 static inline boolean
 518 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 519 {
 520    static const unsigned size[4] = {10, 10, 10, 2};
 521    unsigned chan;
 522
 523    if (desc->block.width != 1 ||
 524        desc->block.height != 1 ||
 525        desc->block.bits != 32)
 526       return FALSE;
 527
 528    for (chan = 0; chan < 4; ++chan) {
 529       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 530          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 531          return FALSE;
 532       if (desc->channel[chan].size != size[chan])
 533          return FALSE;
 534    }
 535
 536    return TRUE;
 537 }
 538
 539 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 540                                        enum pipe_format format)
 541 {
 542     int c;
 543     const struct util_format_description *desc =
 544         util_format_description(format);
 545
 546     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 547         return false;
 548
 549     c = util_format_get_first_non_void_channel(format);
 550
 551     /* RGBA16F */
 552     if (rscreen->caps.is_r500 &&
 553         desc->nr_channels == 4 &&
 554         desc->channel[c].size == 16 &&
 555         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 556         return true;
 557
 558     if (desc->channel[c].normalized &&
 559         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 560         desc->channel[c].size >= 4 &&
 561         desc->channel[c].size <= 10) {
 562         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 563         if (desc->nr_channels >= 3)
 564             return true;
 565
 566         if (format == PIPE_FORMAT_R8G8_UNORM)
 567             return true;
 568
 569         /* R8, I8, L8, A8 */
 570         if (desc->nr_channels == 1)
 571             return true;
 572     }
 573
 574     return false;
 575 }
 576
 577 static boolean r300_is_format_supported(struct pipe_screen* screen,
 578                                         enum pipe_format format,
 579                                         enum pipe_texture_target target,
 580                                         unsigned sample_count,
 581                                         unsigned usage)
 582 {
 583     uint32_t retval = 0;
 584     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 585     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 586     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 587                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 588                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 589                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 590                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 591     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 592                        format == PIPE_FORMAT_RGTC1_SNORM ||
 593                        format == PIPE_FORMAT_LATC1_UNORM ||
 594                        format == PIPE_FORMAT_LATC1_SNORM;
 595     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 596                        format == PIPE_FORMAT_RGTC2_SNORM ||
 597                        format == PIPE_FORMAT_LATC2_UNORM ||
 598                        format == PIPE_FORMAT_LATC2_SNORM;
 599     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 600                             format == PIPE_FORMAT_R16G16_FLOAT ||
 601                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 602                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 603                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 604     const struct util_format_description *desc;
 605
 606     if (!util_format_is_supported(format, usage))
 607        return FALSE;
 608
 609     /* Check multisampling support. */
 610     switch (sample_count) {
 611         case 0:
 612         case 1:
 613             break;
 614         case 2:
 615         case 4:
 616         case 6:
 617             /* No texturing and scanout. */
 618             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 619                          PIPE_BIND_DISPLAY_TARGET |
 620                          PIPE_BIND_SCANOUT)) {
 621                 return FALSE;
 622             }
 623
 624             desc = util_format_description(format);
 625
 626             if (is_r500) {
 627                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 628                 if (!util_format_is_depth_or_stencil(format) &&
 629                     !util_format_is_rgba8_variant(desc) &&
 630                     !util_format_is_rgba1010102_variant(desc) &&
 631                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 632                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 633                     return FALSE;
 634                 }
 635             } else {
 636                 /* Only allow depth/stencil, RGBA8. */
 637                 if (!util_format_is_depth_or_stencil(format) &&
 638                     !util_format_is_rgba8_variant(desc)) {
 639                     return FALSE;
 640                 }
 641             }
 642             break;
 643         default:
 644             return FALSE;
 645     }
 646
 647     /* Check sampler format support. */
 648     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 649         /* these two are broken for an unknown reason */
 650         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 651         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 652         /* ATI1N is r5xx-only. */
 653         (is_r500 || !is_ati1n) &&
 654         /* ATI2N is supported on r4xx-r5xx. */
 655         (is_r400 || is_r500 || !is_ati2n) &&
 656         r300_is_sampler_format_supported(format)) {
 657         retval |= PIPE_BIND_SAMPLER_VIEW;
 658     }
 659
 660     /* Check colorbuffer format support. */
 661     if ((usage & (PIPE_BIND_RENDER_TARGET |
 662                   PIPE_BIND_DISPLAY_TARGET |
 663                   PIPE_BIND_SCANOUT |
 664                   PIPE_BIND_SHARED |
 665                   PIPE_BIND_BLENDABLE)) &&
 666         /* 2101010 cannot be rendered to on non-r5xx. */
 667         (!is_color2101010 || is_r500) &&
 668         r300_is_colorbuffer_format_supported(format)) {
 669         retval |= usage &
 670             (PIPE_BIND_RENDER_TARGET |
 671              PIPE_BIND_DISPLAY_TARGET |
 672              PIPE_BIND_SCANOUT |
 673              PIPE_BIND_SHARED);
 674
 675         if (r300_is_blending_supported(r300_screen(screen), format)) {
 676             retval |= usage & PIPE_BIND_BLENDABLE;
 677         }
 678     }
 679
 680     /* Check depth-stencil format support. */
 681     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 682         r300_is_zs_format_supported(format)) {
 683         retval |= PIPE_BIND_DEPTH_STENCIL;
 684     }
 685
 686     /* Check vertex buffer format support. */
 687     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 688         if (r300_screen(screen)->caps.has_tcl) {
 689             /* Half float is supported on >= R400. */
 690             if ((is_r400 || is_r500 || !is_half_float) &&
 691                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 692                 retval |= PIPE_BIND_VERTEX_BUFFER;
 693             }
 694         } else {
 695             /* SW TCL */
 696             if (!util_format_is_pure_integer(format)) {
 697                 retval |= PIPE_BIND_VERTEX_BUFFER;
 698             }
 699         }
 700     }
 701
 702     return retval == usage;
 703 }
 704
 705 static void r300_destroy_screen(struct pipe_screen* pscreen)
 706 {
 707     struct r300_screen* r300screen = r300_screen(pscreen);
 708     struct radeon_winsys *rws = radeon_winsys(pscreen);
 709
 710     if (rws && !rws->unref(rws))
 711       return;
 712
 713     mtx_destroy(&r300screen->cmask_mutex);
 714     slab_destroy_parent(&r300screen->pool_transfers);
 715
 716     if (rws)
 717       rws->destroy(rws);
 718
 719     FREE(r300screen);
 720 }
 721
 722 static void r300_fence_reference(struct pipe_screen *screen,
 723                                  struct pipe_fence_handle **ptr,
 724                                  struct pipe_fence_handle *fence)
 725 {
 726     struct radeon_winsys *rws = r300_screen(screen)->rws;
 727
 728     rws->fence_reference(ptr, fence);
 729 }
 730
 731 static boolean r300_fence_finish(struct pipe_screen *screen,
 732                                  struct pipe_context *ctx,
 733                                  struct pipe_fence_handle *fence,
 734                                  uint64_t timeout)
 735 {
 736     struct radeon_winsys *rws = r300_screen(screen)->rws;
 737
 738     return rws->fence_wait(rws, fence, timeout);
 739 }
 740
 741 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 742                                        const struct pipe_screen_config *config)
 743 {
 744     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 745
 746     if (!r300screen) {
 747         FREE(r300screen);
 748         return NULL;
 749     }
 750
 751     rws->query_info(rws, &r300screen->info);
 752
 753     r300_init_debug(r300screen);
 754     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 755
 756     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 757         r300screen->caps.zmask_ram = 0;
 758     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 759         r300screen->caps.hiz_ram = 0;
 760
 761     r300screen->rws = rws;
 762     r300screen->screen.destroy = r300_destroy_screen;
 763     r300screen->screen.get_name = r300_get_name;
 764     r300screen->screen.get_vendor = r300_get_vendor;
 765     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 766     r300screen->screen.get_param = r300_get_param;
 767     r300screen->screen.get_shader_param = r300_get_shader_param;
 768     r300screen->screen.get_paramf = r300_get_paramf;
 769     r300screen->screen.get_video_param = r300_get_video_param;
 770     r300screen->screen.is_format_supported = r300_is_format_supported;
 771     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 772     r300screen->screen.context_create = r300_create_context;
 773     r300screen->screen.fence_reference = r300_fence_reference;
 774     r300screen->screen.fence_finish = r300_fence_finish;
 775
 776     r300_init_screen_resource_functions(r300screen);
 777
 778     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 779
 780     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 781
 782     return &r300screen->screen;
 783 }