Merge branch '7.8'
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "pipe/p_config.h"
33
34 #include "r300_context.h"
35 #include "r300_emit.h"
36 #include "r300_reg.h"
37 #include "r300_screen.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_state_inlines.h"
40 #include "r300_fs.h"
41 #include "r300_texture.h"
42 #include "r300_vs.h"
43 #include "r300_winsys.h"
44
45 /* r300_state: Functions used to intialize state context by translating
46 * Gallium state objects into semi-native r300 state objects. */
47
48 #define UPDATE_STATE(cso, atom) \
49 if (cso != atom.state) { \
50 atom.state = cso; \
51 atom.dirty = TRUE; \
52 }
53
54 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
55 unsigned dstRGB, unsigned dstA)
56 {
57 /* If the blend equation is ADD or REVERSE_SUBTRACT,
58 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
59 * will not be changed.
60 * Notice that the dst factors are the src factors inverted. */
61 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
62 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
63 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
64 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
65 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
67 srcA == PIPE_BLENDFACTOR_ZERO) &&
68 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
69 dstRGB == PIPE_BLENDFACTOR_ONE) &&
70 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
71 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
72 dstA == PIPE_BLENDFACTOR_ONE);
73 }
74
75 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
76 unsigned dstRGB, unsigned dstA)
77 {
78 /* If the blend equation is ADD or REVERSE_SUBTRACT,
79 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
80 * will not be changed.
81 * Notice that the dst factors are the src factors inverted. */
82 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
83 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
84 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
85 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
86 srcA == PIPE_BLENDFACTOR_ZERO) &&
87 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
88 dstRGB == PIPE_BLENDFACTOR_ONE) &&
89 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
90 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
91 dstA == PIPE_BLENDFACTOR_ONE);
92 }
93
94 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
95 unsigned dstRGB, unsigned dstA)
96 {
97 /* If the blend equation is ADD or REVERSE_SUBTRACT,
98 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
99 * will not be changed.
100 * Notice that the dst factors are the src factors inverted. */
101 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
102 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
103 (srcA == PIPE_BLENDFACTOR_ZERO) &&
104 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
105 dstRGB == PIPE_BLENDFACTOR_ONE) &&
106 (dstA == PIPE_BLENDFACTOR_ONE);
107 }
108
109 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
110 unsigned dstRGB, unsigned dstA)
111 {
112 /* If the blend equation is ADD or REVERSE_SUBTRACT,
113 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
114 * will not be changed.
115 * Notice that the dst factors are the src factors inverted. */
116 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
117 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
118 (srcA == PIPE_BLENDFACTOR_ZERO) &&
119 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
120 dstRGB == PIPE_BLENDFACTOR_ONE) &&
121 (dstA == PIPE_BLENDFACTOR_ONE);
122 }
123
124 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
125 unsigned dstRGB, unsigned dstA)
126 {
127 /* If the blend equation is ADD or REVERSE_SUBTRACT,
128 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
129 * the colorbuffer will not be changed.
130 * Notice that the dst factors are the src factors inverted. */
131 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
132 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
134 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
135 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
136 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
138 srcA == PIPE_BLENDFACTOR_ZERO) &&
139 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
140 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
141 dstRGB == PIPE_BLENDFACTOR_ONE) &&
142 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
143 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
144 dstA == PIPE_BLENDFACTOR_ONE);
145 }
146
147 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
148 unsigned dstRGB, unsigned dstA)
149 {
150 /* If the blend equation is ADD or REVERSE_SUBTRACT,
151 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
152 * the colorbuffer will not be changed.
153 * Notice that the dst factors are the src factors inverted. */
154 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
155 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
156 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
157 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
158 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
159 srcA == PIPE_BLENDFACTOR_ZERO) &&
160 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
161 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
162 dstRGB == PIPE_BLENDFACTOR_ONE) &&
163 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
164 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
165 dstA == PIPE_BLENDFACTOR_ONE);
166 }
167
168 static unsigned bgra_cmask(unsigned mask)
169 {
170 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
171
172 return ((mask & PIPE_MASK_R) << 2) |
173 ((mask & PIPE_MASK_B) >> 2) |
174 (mask & (PIPE_MASK_G | PIPE_MASK_A));
175 }
176
177 /* Create a new blend state based on the CSO blend state.
178 *
179 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
180 static void* r300_create_blend_state(struct pipe_context* pipe,
181 const struct pipe_blend_state* state)
182 {
183 struct r300_screen* r300screen = r300_screen(pipe->screen);
184 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
185
186 if (state->rt[0].blend_enable)
187 {
188 unsigned eqRGB = state->rt[0].rgb_func;
189 unsigned srcRGB = state->rt[0].rgb_src_factor;
190 unsigned dstRGB = state->rt[0].rgb_dst_factor;
191
192 unsigned eqA = state->rt[0].alpha_func;
193 unsigned srcA = state->rt[0].alpha_src_factor;
194 unsigned dstA = state->rt[0].alpha_dst_factor;
195
196 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
197 * this is just the crappy D3D naming */
198 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
199 r300_translate_blend_function(eqRGB) |
200 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
201 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
202
203 /* Optimization: some operations do not require the destination color.
204 *
205 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
206 * otherwise blending gives incorrect results. It seems to be
207 * a hardware bug. */
208 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
209 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
210 dstRGB != PIPE_BLENDFACTOR_ZERO ||
211 dstA != PIPE_BLENDFACTOR_ZERO ||
212 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
213 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
214 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
215 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
216 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
217 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
218 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
219 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
220 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
221 /* Enable reading from the colorbuffer. */
222 blend->blend_control |= R300_READ_ENABLE;
223
224 if (r300screen->caps.is_r500) {
225 /* Optimization: Depending on incoming pixels, we can
226 * conditionally disable the reading in hardware... */
227 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
228 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
229 /* Disable reading if SRC_ALPHA == 0. */
230 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
231 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
232 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
233 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
234 dstA == PIPE_BLENDFACTOR_ZERO)) {
235 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ;
236 }
237
238 /* Disable reading if SRC_ALPHA == 1. */
239 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
240 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
241 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
242 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
243 dstA == PIPE_BLENDFACTOR_ZERO)) {
244 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ;
245 }
246 }
247 }
248 }
249
250 /* Optimization: discard pixels which don't change the colorbuffer.
251 *
252 * The code below is non-trivial and some math is involved.
253 *
254 * Discarding pixels must be disabled when FP16 AA is enabled.
255 * This is a hardware bug. Also, this implementation wouldn't work
256 * with FP blending enabled and equation clamping disabled.
257 *
258 * Equations other than ADD are rarely used and therefore won't be
259 * optimized. */
260 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
261 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
262 /* ADD: X+Y
263 * REVERSE_SUBTRACT: Y-X
264 *
265 * The idea is:
266 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
267 * then CB will not be changed.
268 *
269 * Given the srcFactor and dstFactor variables, we can derive
270 * what src and dst should be equal to and discard appropriate
271 * pixels.
272 */
273 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
274 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
275 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
276 dstRGB, dstA)) {
277 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
278 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
279 dstRGB, dstA)) {
280 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
281 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
282 dstRGB, dstA)) {
283 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
284 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
285 dstRGB, dstA)) {
286 blend->blend_control |=
287 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
288 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
289 dstRGB, dstA)) {
290 blend->blend_control |=
291 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
292 }
293 }
294
295 /* separate alpha */
296 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
297 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
298 blend->alpha_blend_control =
299 r300_translate_blend_function(eqA) |
300 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
301 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
302 }
303 }
304
305 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
306 if (state->logicop_enable) {
307 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
308 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
309 }
310
311 /* Color channel masks for all MRTs. */
312 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask);
313 if (r300screen->caps.is_r500 && state->independent_blend_enable) {
314 if (state->rt[1].blend_enable) {
315 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
316 }
317 if (state->rt[2].blend_enable) {
318 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
319 }
320 if (state->rt[3].blend_enable) {
321 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
322 }
323 }
324
325 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
326 * state. Since it's an optional implementation detail, we can leave it
327 * out and never dither.
328 *
329 * This could be revisited if we ever get quality or conformance hints.
330 *
331 if (state->dither) {
332 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
333 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
334 }
335 */
336
337 return (void*)blend;
338 }
339
340 /* Bind blend state. */
341 static void r300_bind_blend_state(struct pipe_context* pipe,
342 void* state)
343 {
344 struct r300_context* r300 = r300_context(pipe);
345
346 UPDATE_STATE(state, r300->blend_state);
347 }
348
349 /* Free blend state. */
350 static void r300_delete_blend_state(struct pipe_context* pipe,
351 void* state)
352 {
353 FREE(state);
354 }
355
356 /* Convert float to 10bit integer */
357 static unsigned float_to_fixed10(float f)
358 {
359 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
360 }
361
362 /* Set blend color.
363 * Setup both R300 and R500 registers, figure out later which one to write. */
364 static void r300_set_blend_color(struct pipe_context* pipe,
365 const struct pipe_blend_color* color)
366 {
367 struct r300_context* r300 = r300_context(pipe);
368 struct r300_blend_color_state* state =
369 (struct r300_blend_color_state*)r300->blend_color_state.state;
370 union util_color uc;
371
372 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
373 state->blend_color = uc.ui;
374
375 /* XXX if FP16 blending is enabled, we should use the FP16 format */
376 state->blend_color_red_alpha =
377 float_to_fixed10(color->color[0]) |
378 (float_to_fixed10(color->color[3]) << 16);
379 state->blend_color_green_blue =
380 float_to_fixed10(color->color[2]) |
381 (float_to_fixed10(color->color[1]) << 16);
382
383 r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2;
384 r300->blend_color_state.dirty = TRUE;
385 }
386
387 static void r300_set_clip_state(struct pipe_context* pipe,
388 const struct pipe_clip_state* state)
389 {
390 struct r300_context* r300 = r300_context(pipe);
391
392 r300->clip = *state;
393
394 if (r300->screen->caps.has_tcl) {
395 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state));
396 r300->clip_state.size = 29;
397 } else {
398 draw_flush(r300->draw);
399 draw_set_clip_state(r300->draw, state);
400 r300->clip_state.size = 2;
401 }
402
403 r300->clip_state.dirty = TRUE;
404 }
405
406 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
407 *
408 * This contains the depth buffer, stencil buffer, alpha test, and such.
409 * On the Radeon, depth and stencil buffer setup are intertwined, which is
410 * the reason for some of the strange-looking assignments across registers. */
411 static void*
412 r300_create_dsa_state(struct pipe_context* pipe,
413 const struct pipe_depth_stencil_alpha_state* state)
414 {
415 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps;
416 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
417
418 /* Depth test setup. */
419 if (state->depth.enabled) {
420 dsa->z_buffer_control |= R300_Z_ENABLE;
421
422 if (state->depth.writemask) {
423 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
424 }
425
426 dsa->z_stencil_control |=
427 (r300_translate_depth_stencil_function(state->depth.func) <<
428 R300_Z_FUNC_SHIFT);
429 }
430
431 /* Stencil buffer setup. */
432 if (state->stencil[0].enabled) {
433 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
434 dsa->z_stencil_control |=
435 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
436 R300_S_FRONT_FUNC_SHIFT) |
437 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
438 R300_S_FRONT_SFAIL_OP_SHIFT) |
439 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
440 R300_S_FRONT_ZPASS_OP_SHIFT) |
441 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
442 R300_S_FRONT_ZFAIL_OP_SHIFT);
443
444 dsa->stencil_ref_mask =
445 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
446 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
447
448 if (state->stencil[1].enabled) {
449 dsa->two_sided = TRUE;
450
451 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
452 dsa->z_stencil_control |=
453 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
454 R300_S_BACK_FUNC_SHIFT) |
455 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
456 R300_S_BACK_SFAIL_OP_SHIFT) |
457 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
458 R300_S_BACK_ZPASS_OP_SHIFT) |
459 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
460 R300_S_BACK_ZFAIL_OP_SHIFT);
461
462 dsa->stencil_ref_bf =
463 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
464 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
465
466 if (caps->is_r500) {
467 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
468 } else {
469 dsa->stencil_ref_bf_fallback =
470 (state->stencil[0].valuemask != state->stencil[1].valuemask ||
471 state->stencil[0].writemask != state->stencil[1].writemask);
472 }
473 }
474 }
475
476 /* Alpha test setup. */
477 if (state->alpha.enabled) {
478 dsa->alpha_function =
479 r300_translate_alpha_function(state->alpha.func) |
480 R300_FG_ALPHA_FUNC_ENABLE;
481
482 /* We could use 10bit alpha ref but who needs that? */
483 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
484
485 if (caps->is_r500)
486 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
487 }
488
489 return (void*)dsa;
490 }
491
492 static void r300_update_stencil_ref_fallback_status(struct r300_context *r300)
493 {
494 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state;
495
496 if (r300->screen->caps.is_r500) {
497 return;
498 }
499
500 r300->stencil_ref_bf_fallback =
501 dsa->stencil_ref_bf_fallback ||
502 (dsa->two_sided &&
503 r300->stencil_ref.ref_value[0] != r300->stencil_ref.ref_value[1]);
504 }
505
506 /* Bind DSA state. */
507 static void r300_bind_dsa_state(struct pipe_context* pipe,
508 void* state)
509 {
510 struct r300_context* r300 = r300_context(pipe);
511
512 if (!state) {
513 return;
514 }
515
516 UPDATE_STATE(state, r300->dsa_state);
517
518 r300_update_stencil_ref_fallback_status(r300);
519 }
520
521 /* Free DSA state. */
522 static void r300_delete_dsa_state(struct pipe_context* pipe,
523 void* state)
524 {
525 FREE(state);
526 }
527
528 static void r300_set_stencil_ref(struct pipe_context* pipe,
529 const struct pipe_stencil_ref* sr)
530 {
531 struct r300_context* r300 = r300_context(pipe);
532
533 r300->stencil_ref = *sr;
534 r300->dsa_state.dirty = TRUE;
535
536 r300_update_stencil_ref_fallback_status(r300);
537 }
538
539 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
540 static void r300_fb_update_tiling_flags(struct r300_context *r300,
541 const struct pipe_framebuffer_state *old_state,
542 const struct pipe_framebuffer_state *new_state)
543 {
544 struct r300_texture *tex;
545 unsigned i, j, level;
546
547 /* Reset tiling flags for old surfaces to default values. */
548 for (i = 0; i < old_state->nr_cbufs; i++) {
549 for (j = 0; j < new_state->nr_cbufs; j++) {
550 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) {
551 break;
552 }
553 }
554 /* If not binding the surface again... */
555 if (j != new_state->nr_cbufs) {
556 continue;
557 }
558
559 tex = r300_texture(old_state->cbufs[i]->texture);
560
561 if (tex) {
562 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
563 tex->pitch[0],
564 tex->microtile,
565 tex->macrotile);
566 }
567 }
568 if (old_state->zsbuf &&
569 (!new_state->zsbuf ||
570 old_state->zsbuf->texture != new_state->zsbuf->texture)) {
571 tex = r300_texture(old_state->zsbuf->texture);
572
573 if (tex) {
574 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
575 tex->pitch[0],
576 tex->microtile,
577 tex->macrotile);
578 }
579 }
580
581 /* Set tiling flags for new surfaces. */
582 for (i = 0; i < new_state->nr_cbufs; i++) {
583 tex = r300_texture(new_state->cbufs[i]->texture);
584 level = new_state->cbufs[i]->level;
585
586 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
587 tex->pitch[level],
588 tex->microtile,
589 tex->mip_macrotile[level]);
590 }
591 if (new_state->zsbuf) {
592 tex = r300_texture(new_state->zsbuf->texture);
593 level = new_state->zsbuf->level;
594
595 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
596 tex->pitch[level],
597 tex->microtile,
598 tex->mip_macrotile[level]);
599 }
600 }
601
602 static void
603 r300_set_framebuffer_state(struct pipe_context* pipe,
604 const struct pipe_framebuffer_state* state)
605 {
606 struct r300_context* r300 = r300_context(pipe);
607 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
608 unsigned max_width, max_height;
609 uint32_t zbuffer_bpp = 0;
610
611 if (state->nr_cbufs > 4) {
612 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, "
613 "refusing to bind framebuffer state!\n", __FUNCTION__);
614 return;
615 }
616
617 if (r300->screen->caps.is_r500) {
618 max_width = max_height = 4096;
619 } else if (r300->screen->caps.is_r400) {
620 max_width = max_height = 4021;
621 } else {
622 max_width = max_height = 2560;
623 }
624
625 if (state->width > max_width || state->height > max_height) {
626 fprintf(stderr, "r300: Implementation error: Render targets are too "
627 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
628 return;
629 }
630
631 if (r300->draw) {
632 draw_flush(r300->draw);
633 }
634
635 r300->fb_state.dirty = TRUE;
636
637 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
638 if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
639 r300->blend_state.dirty = TRUE;
640 }
641 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
642 if (!!old_state->zsbuf != !!state->zsbuf) {
643 r300->dsa_state.dirty = TRUE;
644 }
645
646 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state);
647
648 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
649
650 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
651 (state->zsbuf ? 10 : 0) + 11;
652
653 /* Polygon offset depends on the zbuffer bit depth. */
654 if (state->zsbuf && r300->polygon_offset_enabled) {
655 switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
656 case 2:
657 zbuffer_bpp = 16;
658 break;
659 case 4:
660 zbuffer_bpp = 24;
661 break;
662 }
663
664 if (r300->zbuffer_bpp != zbuffer_bpp) {
665 r300->zbuffer_bpp = zbuffer_bpp;
666 r300->rs_state.dirty = TRUE;
667 }
668 }
669 }
670
671 /* Create fragment shader state. */
672 static void* r300_create_fs_state(struct pipe_context* pipe,
673 const struct pipe_shader_state* shader)
674 {
675 struct r300_fragment_shader* fs = NULL;
676
677 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
678
679 /* Copy state directly into shader. */
680 fs->state = *shader;
681 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
682
683 return (void*)fs;
684 }
685
686 static void r300_mark_fs_code_dirty(struct r300_context *r300)
687 {
688 struct r300_fragment_shader* fs = r300_fs(r300);
689
690 r300->fs.dirty = TRUE;
691 r300->fs_rc_constant_state.dirty = TRUE;
692 r300->fs_constants.dirty = TRUE;
693
694 if (r300->screen->caps.is_r500) {
695 r300->fs.size = r500_get_fs_atom_size(r300);
696 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
697 r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
698 } else {
699 r300->fs.size = r300_get_fs_atom_size(r300);
700 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
701 r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
702 }
703 }
704
705 /* Bind fragment shader state. */
706 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
707 {
708 struct r300_context* r300 = r300_context(pipe);
709 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
710
711 if (fs == NULL) {
712 r300->fs.state = NULL;
713 return;
714 }
715
716 r300->fs.state = fs;
717 r300_pick_fragment_shader(r300);
718 r300_mark_fs_code_dirty(r300);
719
720 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
721
722 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) {
723 r300->vap_output_state.dirty = TRUE;
724 }
725 }
726
727 /* Delete fragment shader state. */
728 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
729 {
730 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
731 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
732
733 while (ptr) {
734 tmp = ptr;
735 ptr = ptr->next;
736 rc_constants_destroy(&tmp->code.constants);
737 FREE(tmp);
738 }
739 FREE((void*)fs->state.tokens);
740 FREE(shader);
741 }
742
743 static void r300_set_polygon_stipple(struct pipe_context* pipe,
744 const struct pipe_poly_stipple* state)
745 {
746 /* XXX no idea how to set this up, but not terribly important */
747 }
748
749 /* Create a new rasterizer state based on the CSO rasterizer state.
750 *
751 * This is a very large chunk of state, and covers most of the graphics
752 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
753 *
754 * In a not entirely unironic sidenote, this state has nearly nothing to do
755 * with the actual block on the Radeon called the rasterizer (RS). */
756 static void* r300_create_rs_state(struct pipe_context* pipe,
757 const struct pipe_rasterizer_state* state)
758 {
759 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
760 int i;
761
762 /* Copy rasterizer state for Draw. */
763 rs->rs = *state;
764
765 #ifdef PIPE_ARCH_LITTLE_ENDIAN
766 rs->vap_control_status = R300_VC_NO_SWAP;
767 #else
768 rs->vap_control_status = R300_VC_32BIT_SWAP;
769 #endif
770
771 /* If no TCL engine is present, turn off the HW TCL. */
772 if (!r300_screen(pipe->screen)->caps.has_tcl) {
773 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
774 }
775
776 rs->point_size = pack_float_16_6x(state->point_size) |
777 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
778
779 rs->line_control = pack_float_16_6x(state->line_width) |
780 R300_GA_LINE_CNTL_END_TYPE_COMP;
781
782 /* Enable polygon mode */
783 if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
784 state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
785 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
786 }
787
788 /* Radeons don't think in "CW/CCW", they think in "front/back". */
789 if (state->front_winding == PIPE_WINDING_CW) {
790 rs->cull_mode = R300_FRONT_FACE_CW;
791
792 /* Polygon offset */
793 if (state->offset_cw) {
794 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
795 }
796 if (state->offset_ccw) {
797 rs->polygon_offset_enable |= R300_BACK_ENABLE;
798 }
799
800 /* Polygon mode */
801 if (rs->polygon_mode) {
802 rs->polygon_mode |=
803 r300_translate_polygon_mode_front(state->fill_cw);
804 rs->polygon_mode |=
805 r300_translate_polygon_mode_back(state->fill_ccw);
806 }
807 } else {
808 rs->cull_mode = R300_FRONT_FACE_CCW;
809
810 /* Polygon offset */
811 if (state->offset_ccw) {
812 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
813 }
814 if (state->offset_cw) {
815 rs->polygon_offset_enable |= R300_BACK_ENABLE;
816 }
817
818 /* Polygon mode */
819 if (rs->polygon_mode) {
820 rs->polygon_mode |=
821 r300_translate_polygon_mode_front(state->fill_ccw);
822 rs->polygon_mode |=
823 r300_translate_polygon_mode_back(state->fill_cw);
824 }
825 }
826 if (state->front_winding & state->cull_mode) {
827 rs->cull_mode |= R300_CULL_FRONT;
828 }
829 if (~(state->front_winding) & state->cull_mode) {
830 rs->cull_mode |= R300_CULL_BACK;
831 }
832
833 if (rs->polygon_offset_enable) {
834 rs->depth_offset = state->offset_units;
835 rs->depth_scale = state->offset_scale;
836 }
837
838 if (state->line_stipple_enable) {
839 rs->line_stipple_config =
840 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
841 (fui((float)state->line_stipple_factor) &
842 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
843 /* XXX this might need to be scaled up */
844 rs->line_stipple_value = state->line_stipple_pattern;
845 }
846
847 if (state->flatshade) {
848 rs->color_control = R300_SHADE_MODEL_FLAT;
849 } else {
850 rs->color_control = R300_SHADE_MODEL_SMOOTH;
851 }
852
853 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
854
855 /* Point sprites */
856 if (state->sprite_coord_enable) {
857 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE;
858 for (i = 0; i < 8; i++) {
859 if (state->sprite_coord_enable & (1 << i))
860 rs->stuffing_enable |=
861 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2));
862 }
863
864 rs->point_texcoord_left = 0.0f;
865 rs->point_texcoord_right = 1.0f;
866
867 switch (state->sprite_coord_mode) {
868 case PIPE_SPRITE_COORD_UPPER_LEFT:
869 rs->point_texcoord_top = 0.0f;
870 rs->point_texcoord_bottom = 1.0f;
871 break;
872 case PIPE_SPRITE_COORD_LOWER_LEFT:
873 rs->point_texcoord_top = 1.0f;
874 rs->point_texcoord_bottom = 0.0f;
875 break;
876 }
877 }
878
879 return (void*)rs;
880 }
881
882 /* Bind rasterizer state. */
883 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
884 {
885 struct r300_context* r300 = r300_context(pipe);
886 struct r300_rs_state* rs = (struct r300_rs_state*)state;
887 int last_sprite_coord_enable = r300->sprite_coord_enable;
888
889 if (r300->draw) {
890 draw_flush(r300->draw);
891 draw_set_rasterizer_state(r300->draw, &rs->rs);
892 }
893
894 if (rs) {
895 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw;
896 r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
897 } else {
898 r300->polygon_offset_enabled = FALSE;
899 r300->sprite_coord_enable = 0;
900 }
901
902 UPDATE_STATE(state, r300->rs_state);
903 r300->rs_state.size = 26 + (r300->polygon_offset_enabled ? 5 : 0);
904
905 if (last_sprite_coord_enable != r300->sprite_coord_enable) {
906 r300->rs_block_state.dirty = TRUE;
907 }
908 }
909
910 /* Free rasterizer state. */
911 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
912 {
913 FREE(state);
914 }
915
916 static void*
917 r300_create_sampler_state(struct pipe_context* pipe,
918 const struct pipe_sampler_state* state)
919 {
920 struct r300_context* r300 = r300_context(pipe);
921 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
922 boolean is_r500 = r300->screen->caps.is_r500;
923 int lod_bias;
924 union util_color uc;
925
926 sampler->state = *state;
927
928 sampler->filter0 |=
929 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
930 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
931 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
932
933 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
934 state->mag_img_filter,
935 state->min_mip_filter,
936 state->max_anisotropy > 0);
937
938 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
939
940 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
941 /* We must pass these to the merge function to clamp them properly. */
942 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
943 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
944
945 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
946
947 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
948
949 /* This is very high quality anisotropic filtering for R5xx.
950 * It's good for benchmarking the performance of texturing but
951 * in practice we don't want to slow down the driver because it's
952 * a pretty good performance killer. Feel free to play with it. */
953 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
954 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
955 }
956
957 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
958 sampler->border_color = uc.ui;
959
960 /* R500-specific fixups and optimizations */
961 if (r300->screen->caps.is_r500) {
962 sampler->filter1 |= R500_BORDER_FIX;
963 }
964
965 return (void*)sampler;
966 }
967
968 static void r300_bind_sampler_states(struct pipe_context* pipe,
969 unsigned count,
970 void** states)
971 {
972 struct r300_context* r300 = r300_context(pipe);
973 struct r300_textures_state* state =
974 (struct r300_textures_state*)r300->textures_state.state;
975 unsigned tex_units = r300->screen->caps.num_tex_units;
976
977 if (count > tex_units) {
978 return;
979 }
980
981 memcpy(state->sampler_states, states, sizeof(void*) * count);
982 state->sampler_state_count = count;
983
984 r300->textures_state.dirty = TRUE;
985
986 /* Pick a fragment shader based on the texture compare state. */
987 if (r300->fs.state && count) {
988 if (r300_pick_fragment_shader(r300)) {
989 r300_mark_fs_code_dirty(r300);
990 }
991 }
992 }
993
994 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
995 unsigned count,
996 void** states)
997 {
998 }
999
1000 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1001 {
1002 FREE(state);
1003 }
1004
1005 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
1006 unsigned count,
1007 struct pipe_sampler_view** views)
1008 {
1009 struct r300_context* r300 = r300_context(pipe);
1010 struct r300_textures_state* state =
1011 (struct r300_textures_state*)r300->textures_state.state;
1012 struct r300_texture *texture;
1013 unsigned i;
1014 unsigned tex_units = r300->screen->caps.num_tex_units;
1015 boolean is_r500 = r300->screen->caps.is_r500;
1016 boolean dirty_tex = FALSE;
1017
1018 if (count > tex_units) {
1019 return;
1020 }
1021
1022 for (i = 0; i < count; i++) {
1023 if (&state->sampler_views[i]->base != views[i]) {
1024 pipe_sampler_view_reference(
1025 (struct pipe_sampler_view**)&state->sampler_views[i],
1026 views[i]);
1027
1028 if (!views[i]) {
1029 continue;
1030 }
1031
1032 /* A new sampler view (= texture)... */
1033 dirty_tex = TRUE;
1034
1035 /* R300-specific - set the texrect factor in the fragment shader */
1036 texture = r300_texture(views[i]->texture);
1037 if (!is_r500 && texture->uses_pitch) {
1038 r300->fs_rc_constant_state.dirty = TRUE;
1039 }
1040 }
1041 }
1042
1043 for (i = count; i < tex_units; i++) {
1044 if (state->sampler_views[i]) {
1045 pipe_sampler_view_reference(
1046 (struct pipe_sampler_view**)&state->sampler_views[i],
1047 NULL);
1048 }
1049 }
1050
1051 state->sampler_view_count = count;
1052
1053 r300->textures_state.dirty = TRUE;
1054
1055 if (dirty_tex) {
1056 r300->texture_cache_inval.dirty = TRUE;
1057 }
1058 }
1059
1060 static struct pipe_sampler_view *
1061 r300_create_sampler_view(struct pipe_context *pipe,
1062 struct pipe_resource *texture,
1063 const struct pipe_sampler_view *templ)
1064 {
1065 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1066 struct r300_texture *tex = r300_texture(texture);
1067 unsigned char swizzle[4];
1068
1069 if (view) {
1070 view->base = *templ;
1071 view->base.reference.count = 1;
1072 view->base.context = pipe;
1073 view->base.texture = NULL;
1074 pipe_resource_reference(&view->base.texture, texture);
1075
1076 swizzle[0] = templ->swizzle_r;
1077 swizzle[1] = templ->swizzle_g;
1078 swizzle[2] = templ->swizzle_b;
1079 swizzle[3] = templ->swizzle_a;
1080
1081 /* XXX Enable swizzles when they become supported. Now we get RGBA
1082 * everywhere. And do testing! */
1083 view->format = tex->tx_format;
1084 view->format.format1 |= r300_translate_texformat(templ->format,
1085 0); /*swizzle);*/
1086 if (r300_screen(pipe->screen)->caps.is_r500) {
1087 view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1088 }
1089 }
1090
1091 return (struct pipe_sampler_view*)view;
1092 }
1093
1094 static void
1095 r300_sampler_view_destroy(struct pipe_context *pipe,
1096 struct pipe_sampler_view *view)
1097 {
1098 pipe_resource_reference(&view->texture, NULL);
1099 FREE(view);
1100 }
1101
1102 static void r300_set_scissor_state(struct pipe_context* pipe,
1103 const struct pipe_scissor_state* state)
1104 {
1105 struct r300_context* r300 = r300_context(pipe);
1106
1107 memcpy(r300->scissor_state.state, state,
1108 sizeof(struct pipe_scissor_state));
1109
1110 r300->scissor_state.dirty = TRUE;
1111 }
1112
1113 static void r300_set_viewport_state(struct pipe_context* pipe,
1114 const struct pipe_viewport_state* state)
1115 {
1116 struct r300_context* r300 = r300_context(pipe);
1117 struct r300_viewport_state* viewport =
1118 (struct r300_viewport_state*)r300->viewport_state.state;
1119
1120 r300->viewport = *state;
1121
1122 /* Do the transform in HW. */
1123 viewport->vte_control = R300_VTX_W0_FMT;
1124
1125 if (state->scale[0] != 1.0f) {
1126 viewport->xscale = state->scale[0];
1127 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1128 }
1129 if (state->scale[1] != 1.0f) {
1130 viewport->yscale = state->scale[1];
1131 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1132 }
1133 if (state->scale[2] != 1.0f) {
1134 viewport->zscale = state->scale[2];
1135 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1136 }
1137 if (state->translate[0] != 0.0f) {
1138 viewport->xoffset = state->translate[0];
1139 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1140 }
1141 if (state->translate[1] != 0.0f) {
1142 viewport->yoffset = state->translate[1];
1143 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1144 }
1145 if (state->translate[2] != 0.0f) {
1146 viewport->zoffset = state->translate[2];
1147 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1148 }
1149
1150 r300->viewport_state.dirty = TRUE;
1151 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1152 r300->fs_rc_constant_state.dirty = TRUE;
1153 }
1154 }
1155
1156 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1157 unsigned count,
1158 const struct pipe_vertex_buffer* buffers)
1159 {
1160 struct r300_context* r300 = r300_context(pipe);
1161 struct pipe_vertex_buffer *vbo;
1162 unsigned i, max_index = (1 << 24) - 1;
1163 boolean any_user_buffer = FALSE;
1164
1165 if (count == r300->vertex_buffer_count &&
1166 memcmp(r300->vertex_buffer, buffers,
1167 sizeof(struct pipe_vertex_buffer) * count) == 0) {
1168 return;
1169 }
1170
1171 /* Check if the stride is aligned to the size of DWORD. */
1172 for (i = 0; i < count; i++) {
1173 if (buffers[i].buffer) {
1174 if (buffers[i].stride % 4 != 0) {
1175 // XXX Shouldn't we align the buffer?
1176 fprintf(stderr, "r300: set_vertex_buffers: "
1177 "Unaligned buffer stride %i isn't supported.\n",
1178 buffers[i].stride);
1179 abort();
1180 }
1181 }
1182 }
1183
1184 for (i = 0; i < count; i++) {
1185 /* Why, yes, I AM casting away constness. How did you know? */
1186 vbo = (struct pipe_vertex_buffer*)&buffers[i];
1187
1188 /* Reference our buffer. */
1189 pipe_resource_reference(&r300->vertex_buffer[i].buffer, vbo->buffer);
1190
1191 /* Skip NULL buffers */
1192 if (!buffers[i].buffer) {
1193 continue;
1194 }
1195
1196 if (r300_buffer_is_user_buffer(vbo->buffer)) {
1197 any_user_buffer = TRUE;
1198 }
1199
1200 if (vbo->max_index == ~0) {
1201 /* Bogus value from broken state tracker; hax it. */
1202 /* TODO - more hax - fixes doom3 from almos on irc */
1203 if (!vbo->stride) {
1204 fprintf(stderr, "r300: got a VBO with stride 0 fixing up to stide 4\n");
1205 vbo->stride = 4;
1206 }
1207 vbo->max_index =
1208 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride;
1209 }
1210
1211 max_index = MIN2(vbo->max_index, max_index);
1212 }
1213
1214 for (; i < r300->vertex_buffer_count; i++) {
1215 /* Dereference any old buffers. */
1216 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL);
1217 }
1218
1219 memcpy(r300->vertex_buffer, buffers,
1220 sizeof(struct pipe_vertex_buffer) * count);
1221
1222 r300->vertex_buffer_count = count;
1223 r300->vertex_buffer_max_index = max_index;
1224 r300->any_user_vbs = any_user_buffer;
1225
1226 if (r300->draw) {
1227 draw_flush(r300->draw);
1228 draw_set_vertex_buffers(r300->draw, count, buffers);
1229 }
1230 }
1231
1232 /* Update the PSC tables. */
1233 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1234 {
1235 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1236 uint16_t type, swizzle;
1237 enum pipe_format format;
1238 unsigned i;
1239
1240 if (velems->count > 16) {
1241 fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1242 " requested %i, using 16.\n", velems->count);
1243 velems->count = 16;
1244 }
1245
1246 /* Vertex shaders have no semantics on their inputs,
1247 * so PSC should just route stuff based on the vertex elements,
1248 * and not on attrib information. */
1249 for (i = 0; i < velems->count; i++) {
1250 format = velems->velem[i].src_format;
1251
1252 type = r300_translate_vertex_data_type(format) |
1253 (i << R300_DST_VEC_LOC_SHIFT);
1254 swizzle = r300_translate_vertex_data_swizzle(format);
1255
1256 if (i & 1) {
1257 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1258 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1259 } else {
1260 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1261 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1262 }
1263 }
1264
1265 /* Set the last vector in the PSC. */
1266 if (i) {
1267 i -= 1;
1268 }
1269 vstream->vap_prog_stream_cntl[i >> 1] |=
1270 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1271
1272 vstream->count = (i >> 1) + 1;
1273 }
1274
1275 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1276 unsigned count,
1277 const struct pipe_vertex_element* attribs)
1278 {
1279 struct r300_vertex_element_state *velems;
1280 unsigned i, size;
1281
1282 assert(count <= PIPE_MAX_ATTRIBS);
1283 velems = CALLOC_STRUCT(r300_vertex_element_state);
1284 if (velems != NULL) {
1285 velems->count = count;
1286 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1287
1288 if (r300_screen(pipe->screen)->caps.has_tcl) {
1289 /* Check if the format is aligned to the size of DWORD. */
1290 for (i = 0; i < count; i++) {
1291 size = util_format_get_blocksize(attribs[i].src_format);
1292
1293 if (size % 4 != 0) {
1294 /* XXX Shouldn't we align the format? */
1295 fprintf(stderr, "r300_create_vertex_elements_state: "
1296 "Unaligned format %s:%i isn't supported\n",
1297 util_format_name(attribs[i].src_format), size);
1298 assert(0);
1299 abort();
1300 }
1301 }
1302
1303 r300_vertex_psc(velems);
1304 }
1305 }
1306 return velems;
1307 }
1308
1309 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1310 void *state)
1311 {
1312 struct r300_context *r300 = r300_context(pipe);
1313 struct r300_vertex_element_state *velems = state;
1314
1315 if (velems == NULL) {
1316 return;
1317 }
1318
1319 r300->velems = velems;
1320
1321 if (r300->draw) {
1322 draw_flush(r300->draw);
1323 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1324 }
1325
1326 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1327 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1328 }
1329
1330 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1331 {
1332 FREE(state);
1333 }
1334
1335 static void* r300_create_vs_state(struct pipe_context* pipe,
1336 const struct pipe_shader_state* shader)
1337 {
1338 struct r300_context* r300 = r300_context(pipe);
1339
1340 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1341
1342 /* Copy state directly into shader. */
1343 vs->state = *shader;
1344 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1345
1346 if (r300->screen->caps.has_tcl) {
1347 r300_translate_vertex_shader(r300, vs, vs->state.tokens);
1348 } else {
1349 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader);
1350 }
1351
1352 return vs;
1353 }
1354
1355 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1356 {
1357 struct r300_context* r300 = r300_context(pipe);
1358 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1359
1360 if (vs == NULL) {
1361 r300->vs_state.state = NULL;
1362 return;
1363 }
1364 if (vs == r300->vs_state.state) {
1365 return;
1366 }
1367 r300->vs_state.state = vs;
1368
1369 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block
1370 if (r300->fs.state) {
1371 r300_vertex_shader_setup_wpos(r300);
1372 }
1373 memcpy(r300->vap_output_state.state, &vs->vap_out,
1374 sizeof(struct r300_vap_output_state));
1375 r300->vap_output_state.dirty = TRUE;
1376
1377 /* The majority of the RS block bits is dependent on the vertex shader. */
1378 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
1379
1380 if (r300->screen->caps.has_tcl) {
1381 r300->vs_state.dirty = TRUE;
1382 r300->vs_state.size = vs->code.length + 9;
1383
1384 r300->pvs_flush.dirty = TRUE;
1385
1386 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1387 } else {
1388 draw_flush(r300->draw);
1389 draw_bind_vertex_shader(r300->draw,
1390 (struct draw_vertex_shader*)vs->draw_vs);
1391 }
1392 }
1393
1394 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1395 {
1396 struct r300_context* r300 = r300_context(pipe);
1397 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1398
1399 if (r300->screen->caps.has_tcl) {
1400 rc_constants_destroy(&vs->code.constants);
1401 } else {
1402 draw_delete_vertex_shader(r300->draw,
1403 (struct draw_vertex_shader*)vs->draw_vs);
1404 }
1405
1406 FREE((void*)vs->state.tokens);
1407 FREE(shader);
1408 }
1409
1410 static void r300_set_constant_buffer(struct pipe_context *pipe,
1411 uint shader, uint index,
1412 struct pipe_resource *buf)
1413 {
1414 struct r300_context* r300 = r300_context(pipe);
1415 struct r300_constant_buffer *cbuf;
1416 struct pipe_transfer *tr;
1417 void *mapped;
1418 int max_size = 0;
1419
1420 switch (shader) {
1421 case PIPE_SHADER_VERTEX:
1422 cbuf = &r300->shader_constants[PIPE_SHADER_VERTEX];
1423 max_size = 256;
1424 break;
1425 case PIPE_SHADER_FRAGMENT:
1426 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
1427 if (r300->screen->caps.is_r500) {
1428 max_size = 256;
1429 } else {
1430 max_size = 32;
1431 }
1432 break;
1433 default:
1434 assert(0);
1435 cbuf = NULL;
1436 }
1437
1438 if (buf == NULL || buf->width0 == 0 ||
1439 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL)
1440 {
1441 cbuf->count = 0;
1442 return;
1443 }
1444
1445 assert((buf->width0 % 4 * sizeof(float)) == 0);
1446
1447 /* Check the size of the constant buffer. */
1448 /* XXX Subtract immediates and RC_STATE_* variables. */
1449 if (buf->width0 > (sizeof(float) * 4 * max_size)) {
1450 fprintf(stderr, "r300: Max size of the constant buffer is "
1451 "%i*4 floats.\n", max_size);
1452 abort();
1453 }
1454
1455 memcpy(cbuf->constants, mapped, buf->width0);
1456 cbuf->count = buf->width0 / (4 * sizeof(float));
1457 pipe_buffer_unmap(pipe, buf, tr);
1458
1459 if (shader == PIPE_SHADER_VERTEX) {
1460 if (r300->screen->caps.has_tcl) {
1461 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1462 r300->pvs_flush.dirty = TRUE;
1463 } else if (r300->draw) {
1464 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1465 0, cbuf->constants,
1466 buf->width0);
1467 }
1468 } else if (shader == PIPE_SHADER_FRAGMENT) {
1469 r300->fs_constants.dirty = TRUE;
1470 }
1471 }
1472
1473 void r300_init_state_functions(struct r300_context* r300)
1474 {
1475 r300->context.create_blend_state = r300_create_blend_state;
1476 r300->context.bind_blend_state = r300_bind_blend_state;
1477 r300->context.delete_blend_state = r300_delete_blend_state;
1478
1479 r300->context.set_blend_color = r300_set_blend_color;
1480
1481 r300->context.set_clip_state = r300_set_clip_state;
1482
1483 r300->context.set_constant_buffer = r300_set_constant_buffer;
1484
1485 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1486 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1487 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1488
1489 r300->context.set_stencil_ref = r300_set_stencil_ref;
1490
1491 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1492
1493 r300->context.create_fs_state = r300_create_fs_state;
1494 r300->context.bind_fs_state = r300_bind_fs_state;
1495 r300->context.delete_fs_state = r300_delete_fs_state;
1496
1497 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1498
1499 r300->context.create_rasterizer_state = r300_create_rs_state;
1500 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1501 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1502
1503 r300->context.create_sampler_state = r300_create_sampler_state;
1504 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1505 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1506 r300->context.delete_sampler_state = r300_delete_sampler_state;
1507
1508 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1509 r300->context.create_sampler_view = r300_create_sampler_view;
1510 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1511
1512 r300->context.set_scissor_state = r300_set_scissor_state;
1513
1514 r300->context.set_viewport_state = r300_set_viewport_state;
1515
1516 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1517
1518 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1519 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1520 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1521
1522 r300->context.create_vs_state = r300_create_vs_state;
1523 r300->context.bind_vs_state = r300_bind_vs_state;
1524 r300->context.delete_vs_state = r300_delete_vs_state;
1525 }