2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
24 #include "draw/draw_context.h"
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
29 #include "r300_context.h"
31 #include "r300_hyperz.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state.h"
35 #include "r300_state_derived.h"
36 #include "r300_state_inlines.h"
39 /* r300_state_derived: Various bits of state which are dependent upon
40 * currently bound CSO data. */
42 enum r300_rs_swizzle
{
48 static void r300_draw_emit_attrib(struct r300_context
* r300
,
49 enum attrib_emit emit
,
50 enum interp_mode interp
,
53 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
54 struct tgsi_shader_info
* info
= &vs
->info
;
57 output
= draw_find_shader_output(r300
->draw
,
58 info
->output_semantic_name
[index
],
59 info
->output_semantic_index
[index
]);
60 draw_emit_vertex_attr(&r300
->vertex_info
, emit
, interp
, output
);
63 static void r300_draw_emit_all_attribs(struct r300_context
* r300
)
65 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
66 struct r300_shader_semantics
* vs_outputs
= &vs
->outputs
;
70 if (vs_outputs
->pos
!= ATTR_UNUSED
) {
71 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
78 if (vs_outputs
->psize
!= ATTR_UNUSED
) {
79 r300_draw_emit_attrib(r300
, EMIT_1F_PSIZE
, INTERP_POS
,
84 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
85 if (vs_outputs
->color
[i
] != ATTR_UNUSED
) {
86 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_LINEAR
,
87 vs_outputs
->color
[i
]);
91 /* XXX Back-face colors. */
93 /* Texture coordinates. */
94 /* Only 8 generic vertex attributes can be used. If there are more,
95 * they won't be rasterized. */
97 for (i
= 0; i
< ATTR_GENERIC_COUNT
&& gen_count
< 8; i
++) {
98 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
) {
99 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
100 vs_outputs
->generic
[i
]);
105 /* Fog coordinates. */
106 if (gen_count
< 8 && vs_outputs
->fog
!= ATTR_UNUSED
) {
107 r300_draw_emit_attrib(r300
, EMIT_4F
, INTERP_PERSPECTIVE
,
113 /* Update the PSC tables for SW TCL, using Draw. */
114 static void r300_swtcl_vertex_psc(struct r300_context
*r300
)
116 struct r300_vertex_stream_state
*vstream
= r300
->vertex_stream_state
.state
;
117 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
118 struct vertex_info
* vinfo
= &r300
->vertex_info
;
119 uint16_t type
, swizzle
;
120 enum pipe_format format
;
121 unsigned i
, attrib_count
;
122 int* vs_output_tab
= vs
->stream_loc_notcl
;
125 memset(vstream
, 0, sizeof(struct r300_vertex_stream_state
));
127 /* For each Draw attribute, route it to the fragment shader according
128 * to the vs_output_tab. */
129 attrib_count
= vinfo
->num_attribs
;
130 DBG(r300
, DBG_DRAW
, "r300: attrib count: %d\n", attrib_count
);
131 for (i
= 0; i
< attrib_count
; i
++) {
132 DBG(r300
, DBG_DRAW
, "r300: attrib: offset %d, interp %d, size %d,"
133 " vs_output_tab %d\n", vinfo
->attrib
[i
].src_index
,
134 vinfo
->attrib
[i
].interp_mode
, vinfo
->attrib
[i
].emit
,
137 /* Make sure we have a proper destination for our attribute. */
138 assert(vs_output_tab
[i
] != -1);
140 format
= draw_translate_vinfo_format(vinfo
->attrib
[i
].emit
);
142 /* Obtain the type of data in this attribute. */
143 type
= r300_translate_vertex_data_type(format
) |
144 vs_output_tab
[i
] << R300_DST_VEC_LOC_SHIFT
;
146 /* Obtain the swizzle for this attribute. Note that the default
147 * swizzle in the hardware is not XYZW! */
148 swizzle
= r300_translate_vertex_data_swizzle(format
);
150 /* Add the attribute to the PSC table. */
152 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
<< 16;
153 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
<< 16;
155 vstream
->vap_prog_stream_cntl
[i
>> 1] |= type
;
156 vstream
->vap_prog_stream_cntl_ext
[i
>> 1] |= swizzle
;
160 /* Set the last vector in the PSC. */
164 vstream
->vap_prog_stream_cntl
[i
>> 1] |=
165 (R300_LAST_VEC
<< (i
& 1 ? 16 : 0));
167 vstream
->count
= (i
>> 1) + 1;
168 r300
->vertex_stream_state
.dirty
= TRUE
;
169 r300
->vertex_stream_state
.size
= (1 + vstream
->count
) * 2;
172 static void r300_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
173 boolean swizzle_0001
)
175 rs
->ip
[id
] |= R300_RS_COL_PTR(ptr
);
177 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
179 rs
->ip
[id
] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
181 rs
->inst
[id
] |= R300_RS_INST_COL_ID(id
);
184 static void r300_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
186 rs
->inst
[id
] |= R300_RS_INST_COL_CN_WRITE
|
187 R300_RS_INST_COL_ADDR(fp_offset
);
190 static void r300_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
191 enum r300_rs_swizzle swiz
)
193 if (swiz
== SWIZ_X001
) {
194 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
195 R300_RS_SEL_S(R300_RS_SEL_C0
) |
196 R300_RS_SEL_T(R300_RS_SEL_K0
) |
197 R300_RS_SEL_R(R300_RS_SEL_K0
) |
198 R300_RS_SEL_Q(R300_RS_SEL_K1
);
199 } else if (swiz
== SWIZ_XY01
) {
200 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
201 R300_RS_SEL_S(R300_RS_SEL_C0
) |
202 R300_RS_SEL_T(R300_RS_SEL_C1
) |
203 R300_RS_SEL_R(R300_RS_SEL_K0
) |
204 R300_RS_SEL_Q(R300_RS_SEL_K1
);
206 rs
->ip
[id
] |= R300_RS_TEX_PTR(ptr
*4) |
207 R300_RS_SEL_S(R300_RS_SEL_C0
) |
208 R300_RS_SEL_T(R300_RS_SEL_C1
) |
209 R300_RS_SEL_R(R300_RS_SEL_C2
) |
210 R300_RS_SEL_Q(R300_RS_SEL_C3
);
212 rs
->inst
[id
] |= R300_RS_INST_TEX_ID(id
);
215 static void r300_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
217 rs
->inst
[id
] |= R300_RS_INST_TEX_CN_WRITE
|
218 R300_RS_INST_TEX_ADDR(fp_offset
);
221 static void r500_rs_col(struct r300_rs_block
* rs
, int id
, int ptr
,
222 boolean swizzle_0001
)
224 rs
->ip
[id
] |= R500_RS_COL_PTR(ptr
);
226 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
228 rs
->ip
[id
] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA
);
230 rs
->inst
[id
] |= R500_RS_INST_COL_ID(id
);
233 static void r500_rs_col_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
235 rs
->inst
[id
] |= R500_RS_INST_COL_CN_WRITE
|
236 R500_RS_INST_COL_ADDR(fp_offset
);
239 static void r500_rs_tex(struct r300_rs_block
* rs
, int id
, int ptr
,
240 enum r300_rs_swizzle swiz
)
242 int rs_tex_comp
= ptr
*4;
244 if (swiz
== SWIZ_X001
) {
245 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
246 R500_RS_SEL_T(R500_RS_IP_PTR_K0
) |
247 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
248 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
249 } else if (swiz
== SWIZ_XY01
) {
250 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
251 R500_RS_SEL_T(rs_tex_comp
+ 1) |
252 R500_RS_SEL_R(R500_RS_IP_PTR_K0
) |
253 R500_RS_SEL_Q(R500_RS_IP_PTR_K1
);
255 rs
->ip
[id
] |= R500_RS_SEL_S(rs_tex_comp
) |
256 R500_RS_SEL_T(rs_tex_comp
+ 1) |
257 R500_RS_SEL_R(rs_tex_comp
+ 2) |
258 R500_RS_SEL_Q(rs_tex_comp
+ 3);
260 rs
->inst
[id
] |= R500_RS_INST_TEX_ID(id
);
263 static void r500_rs_tex_write(struct r300_rs_block
* rs
, int id
, int fp_offset
)
265 rs
->inst
[id
] |= R500_RS_INST_TEX_CN_WRITE
|
266 R500_RS_INST_TEX_ADDR(fp_offset
);
269 /* Set up the RS block.
271 * This is the part of the chipset that actually does the rasterization
272 * of vertices into fragments. This is also the part of the chipset that
273 * locks up if any part of it is even slightly wrong. */
274 static void r300_update_rs_block(struct r300_context
* r300
,
275 struct r300_shader_semantics
* vs_outputs
,
276 struct r300_shader_semantics
* fs_inputs
)
278 struct r300_rs_block rs
= { { 0 } };
279 int i
, col_count
= 0, tex_count
= 0, fp_offset
= 0, count
;
280 void (*rX00_rs_col
)(struct r300_rs_block
*, int, int, boolean
);
281 void (*rX00_rs_col_write
)(struct r300_rs_block
*, int, int);
282 void (*rX00_rs_tex
)(struct r300_rs_block
*, int, int, enum r300_rs_swizzle
);
283 void (*rX00_rs_tex_write
)(struct r300_rs_block
*, int, int);
284 boolean any_bcolor_used
= vs_outputs
->bcolor
[0] != ATTR_UNUSED
||
285 vs_outputs
->bcolor
[1] != ATTR_UNUSED
;
287 if (r300
->screen
->caps
.is_r500
) {
288 rX00_rs_col
= r500_rs_col
;
289 rX00_rs_col_write
= r500_rs_col_write
;
290 rX00_rs_tex
= r500_rs_tex
;
291 rX00_rs_tex_write
= r500_rs_tex_write
;
293 rX00_rs_col
= r300_rs_col
;
294 rX00_rs_col_write
= r300_rs_col_write
;
295 rX00_rs_tex
= r300_rs_tex
;
296 rX00_rs_tex_write
= r300_rs_tex_write
;
299 /* Rasterize colors. */
300 for (i
= 0; i
< ATTR_COLOR_COUNT
; i
++) {
301 if (vs_outputs
->color
[i
] != ATTR_UNUSED
|| any_bcolor_used
||
302 vs_outputs
->color
[1] != ATTR_UNUSED
) {
303 /* Always rasterize if it's written by the VS,
304 * otherwise it locks up. */
305 rX00_rs_col(&rs
, col_count
, i
, FALSE
);
307 /* Write it to the FS input register if it's used by the FS. */
308 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
309 rX00_rs_col_write(&rs
, col_count
, fp_offset
);
314 /* Skip the FS input register, leave it uninitialized. */
315 /* If we try to set it to (0,0,0,1), it will lock up. */
316 if (fs_inputs
->color
[i
] != ATTR_UNUSED
) {
322 /* Rasterize texture coordinates. */
323 for (i
= 0; i
< ATTR_GENERIC_COUNT
; i
++) {
324 bool sprite_coord
= !!(r300
->sprite_coord_enable
& (1 << i
));
326 if (vs_outputs
->generic
[i
] != ATTR_UNUSED
|| sprite_coord
) {
327 /* Always rasterize if it's written by the VS,
328 * otherwise it locks up. */
329 rX00_rs_tex(&rs
, tex_count
, tex_count
,
330 sprite_coord
? SWIZ_XY01
: SWIZ_XYZW
);
332 /* Write it to the FS input register if it's used by the FS. */
333 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
334 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
336 debug_printf("r300: SpriteCoord (generic index %i) is being written to reg %i\n", i
, fp_offset
);
341 /* Skip the FS input register, leave it uninitialized. */
342 /* If we try to set it to (0,0,0,1), it will lock up. */
343 if (fs_inputs
->generic
[i
] != ATTR_UNUSED
) {
349 /* Rasterize fog coordinates. */
350 if (vs_outputs
->fog
!= ATTR_UNUSED
) {
351 /* Always rasterize if it's written by the VS,
352 * otherwise it locks up. */
353 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_X001
);
355 /* Write it to the FS input register if it's used by the FS. */
356 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
357 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
362 /* Skip the FS input register, leave it uninitialized. */
363 /* If we try to set it to (0,0,0,1), it will lock up. */
364 if (fs_inputs
->fog
!= ATTR_UNUSED
) {
369 /* Rasterize WPOS. */
370 /* If the FS doesn't need it, it's not written by the VS. */
371 if (vs_outputs
->wpos
!= ATTR_UNUSED
&& fs_inputs
->wpos
!= ATTR_UNUSED
) {
372 rX00_rs_tex(&rs
, tex_count
, tex_count
, SWIZ_XYZW
);
373 rX00_rs_tex_write(&rs
, tex_count
, fp_offset
);
379 /* Rasterize at least one color, or bad things happen. */
380 if (col_count
== 0 && tex_count
== 0) {
381 rX00_rs_col(&rs
, 0, 0, TRUE
);
385 rs
.count
= (tex_count
*4) | (col_count
<< R300_IC_COUNT_SHIFT
) |
388 count
= MAX3(col_count
, tex_count
, 1);
389 rs
.inst_count
= count
- 1;
391 /* Now, after all that, see if we actually need to update the state. */
392 if (memcmp(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
))) {
393 memcpy(r300
->rs_block_state
.state
, &rs
, sizeof(struct r300_rs_block
));
394 r300
->rs_block_state
.size
= 5 + count
*2;
398 /* Update the shader-dependant states. */
399 static void r300_update_derived_shader_state(struct r300_context
* r300
)
401 struct r300_vertex_shader
* vs
= r300
->vs_state
.state
;
403 r300_update_rs_block(r300
, &vs
->outputs
, &r300_fs(r300
)->shader
->inputs
);
406 static void r300_merge_textures_and_samplers(struct r300_context
* r300
)
408 struct r300_textures_state
*state
=
409 (struct r300_textures_state
*)r300
->textures_state
.state
;
410 struct r300_texture_sampler_state
*texstate
;
411 struct r300_sampler_state
*sampler
;
412 struct r300_sampler_view
*view
;
413 struct r300_texture
*tex
;
414 unsigned min_level
, max_level
, i
, size
;
415 unsigned count
= MIN2(state
->sampler_view_count
,
416 state
->sampler_state_count
);
418 state
->tx_enable
= 0;
422 for (i
= 0; i
< count
; i
++) {
423 if (state
->sampler_views
[i
] && state
->sampler_states
[i
]) {
424 state
->tx_enable
|= 1 << i
;
426 view
= state
->sampler_views
[i
];
427 tex
= r300_texture(view
->base
.texture
);
428 sampler
= state
->sampler_states
[i
];
430 texstate
= &state
->regs
[i
];
431 texstate
->format
= view
->format
;
432 texstate
->filter0
= sampler
->filter0
;
433 texstate
->filter1
= sampler
->filter1
;
434 texstate
->border_color
= sampler
->border_color
;
436 /* to emulate 1D textures through 2D ones correctly */
437 if (tex
->b
.b
.target
== PIPE_TEXTURE_1D
) {
438 texstate
->filter0
&= ~R300_TX_WRAP_T_MASK
;
439 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
442 if (tex
->uses_pitch
) {
443 /* NPOT textures don't support mip filter, unfortunately.
444 * This prevents incorrect rendering. */
445 texstate
->filter0
&= ~R300_TX_MIN_FILTER_MIP_MASK
;
447 /* Mask out the mirrored flag. */
448 if (texstate
->filter0
& R300_TX_WRAP_S(R300_TX_MIRRORED
)) {
449 texstate
->filter0
&= ~R300_TX_WRAP_S(R300_TX_MIRRORED
);
451 if (texstate
->filter0
& R300_TX_WRAP_T(R300_TX_MIRRORED
)) {
452 texstate
->filter0
&= ~R300_TX_WRAP_T(R300_TX_MIRRORED
);
455 /* Change repeat to clamp-to-edge.
456 * (the repeat bit has a value of 0, no masking needed). */
457 if ((texstate
->filter0
& R300_TX_WRAP_S_MASK
) ==
458 R300_TX_WRAP_S(R300_TX_REPEAT
)) {
459 texstate
->filter0
|= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE
);
461 if ((texstate
->filter0
& R300_TX_WRAP_T_MASK
) ==
462 R300_TX_WRAP_T(R300_TX_REPEAT
)) {
463 texstate
->filter0
|= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE
);
466 /* determine min/max levels */
467 /* the MAX_MIP level is the largest (finest) one */
468 max_level
= MIN3(sampler
->max_lod
+ view
->base
.first_level
,
469 tex
->b
.b
.last_level
, view
->base
.last_level
);
470 min_level
= MIN2(sampler
->min_lod
+ view
->base
.first_level
,
472 texstate
->format
.format0
|= R300_TX_NUM_LEVELS(max_level
);
473 texstate
->filter0
|= R300_TX_MAX_MIP_LEVEL(min_level
);
476 texstate
->filter0
|= i
<< 28;
483 r300
->textures_state
.size
= size
;
485 /* Pick a fragment shader based on either the texture compare state
486 * or the uses_pitch flag. */
487 if (r300
->fs
.state
&& count
) {
488 if (r300_pick_fragment_shader(r300
)) {
489 r300_mark_fs_code_dirty(r300
);
494 void r300_update_derived_state(struct r300_context
* r300
)
496 if (r300
->textures_state
.dirty
) {
497 r300_merge_textures_and_samplers(r300
);
500 if (r300
->rs_block_state
.dirty
) {
501 r300_update_derived_shader_state(r300
);
505 memset(&r300
->vertex_info
, 0, sizeof(struct vertex_info
));
506 r300_draw_emit_all_attribs(r300
);
507 draw_compute_vertex_size(&r300
->vertex_info
);
508 r300_swtcl_vertex_psc(r300
);
511 r300_update_hyperz_state(r300
);