src/gallium/drivers/r300/r300_state_derived.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "draw/draw_context.h"
  25
  26 #include "util/u_math.h"
  27 #include "util/u_memory.h"
  28
  29 #include "r300_context.h"
  30 #include "r300_fs.h"
  31 #include "r300_screen.h"
  32 #include "r300_shader_semantics.h"
  33 #include "r300_state_derived.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_vs.h"
  36
  37 /* r300_state_derived: Various bits of state which are dependent upon
  38  * currently bound CSO data. */
  39
  40 static void r300_draw_emit_attrib(struct r300_context* r300,
  41                                   enum attrib_emit emit,
  42                                   enum interp_mode interp,
  43                                   int index)
  44 {
  45     struct r300_vertex_shader* vs = r300->vs_state.state;
  46     struct tgsi_shader_info* info = &vs->info;
  47     int output;
  48
  49     output = draw_find_shader_output(r300->draw,
  50                                      info->output_semantic_name[index],
  51                                      info->output_semantic_index[index]);
  52     draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output);
  53 }
  54
  55 static void r300_draw_emit_all_attribs(struct r300_context* r300)
  56 {
  57     struct r300_vertex_shader* vs = r300->vs_state.state;
  58     struct r300_shader_semantics* vs_outputs = &vs->outputs;
  59     int i, gen_count;
  60
  61     /* Position. */
  62     if (vs_outputs->pos != ATTR_UNUSED) {
  63         r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
  64                               vs_outputs->pos);
  65     } else {
  66         assert(0);
  67     }
  68
  69     /* Point size. */
  70     if (vs_outputs->psize != ATTR_UNUSED) {
  71         r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
  72                               vs_outputs->psize);
  73     }
  74
  75     /* Colors. */
  76     for (i = 0; i < ATTR_COLOR_COUNT; i++) {
  77         if (vs_outputs->color[i] != ATTR_UNUSED) {
  78             r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
  79                                   vs_outputs->color[i]);
  80         }
  81     }
  82
  83     /* XXX Back-face colors. */
  84
  85     /* Texture coordinates. */
  86     gen_count = 0;
  87     for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
  88         if (vs_outputs->generic[i] != ATTR_UNUSED) {
  89             r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
  90                                   vs_outputs->generic[i]);
  91             gen_count++;
  92         }
  93     }
  94
  95     /* Fog coordinates. */
  96     if (vs_outputs->fog != ATTR_UNUSED) {
  97         r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
  98                               vs_outputs->fog);
  99         gen_count++;
 100     }
 101
 102     assert(gen_count <= 8);
 103 }
 104
 105 /* Update the PSC tables for SW TCL, using Draw. */
 106 static void r300_swtcl_vertex_psc(struct r300_context *r300)
 107 {
 108     struct r300_vertex_stream_state *vstream = r300->vertex_stream_state.state;
 109     struct r300_vertex_shader* vs = r300->vs_state.state;
 110     struct vertex_info* vinfo = &r300->vertex_info;
 111     uint16_t type, swizzle;
 112     enum pipe_format format;
 113     unsigned i, attrib_count;
 114     int* vs_output_tab = vs->stream_loc_notcl;
 115
 116     /* XXX hax */
 117     memset(vstream, 0, sizeof(struct r300_vertex_stream_state));
 118
 119     /* For each Draw attribute, route it to the fragment shader according
 120      * to the vs_output_tab. */
 121     attrib_count = vinfo->num_attribs;
 122     DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
 123     for (i = 0; i < attrib_count; i++) {
 124         DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
 125                " vs_output_tab %d\n", vinfo->attrib[i].src_index,
 126                vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
 127                vs_output_tab[i]);
 128
 129         /* Make sure we have a proper destination for our attribute. */
 130         assert(vs_output_tab[i] != -1);
 131
 132         format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
 133
 134         /* Obtain the type of data in this attribute. */
 135         type = r300_translate_vertex_data_type(format) |
 136             vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
 137
 138         /* Obtain the swizzle for this attribute. Note that the default
 139          * swizzle in the hardware is not XYZW! */
 140         swizzle = r300_translate_vertex_data_swizzle(format);
 141
 142         /* Add the attribute to the PSC table. */
 143         if (i & 1) {
 144             vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
 145             vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
 146         } else {
 147             vstream->vap_prog_stream_cntl[i >> 1] |= type;
 148             vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
 149         }
 150     }
 151
 152     /* Set the last vector in the PSC. */
 153     if (i) {
 154         i -= 1;
 155     }
 156     vstream->vap_prog_stream_cntl[i >> 1] |=
 157         (R300_LAST_VEC << (i & 1 ? 16 : 0));
 158
 159     vstream->count = (i >> 1) + 1;
 160     r300->vertex_stream_state.dirty = TRUE;
 161     r300->vertex_stream_state.size = (1 + vstream->count) * 2;
 162 }
 163
 164 static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
 165                         boolean swizzle_0001)
 166 {
 167     rs->ip[id] |= R300_RS_COL_PTR(ptr);
 168     if (swizzle_0001) {
 169         rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
 170     } else {
 171         rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
 172     }
 173     rs->inst[id] |= R300_RS_INST_COL_ID(id);
 174 }
 175
 176 static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
 177 {
 178     rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
 179                     R300_RS_INST_COL_ADDR(fp_offset);
 180 }
 181
 182 static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
 183                         boolean swizzle_X001)
 184 {
 185     if (swizzle_X001) {
 186         rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
 187                       R300_RS_SEL_S(R300_RS_SEL_C0) |
 188                       R300_RS_SEL_T(R300_RS_SEL_K0) |
 189                       R300_RS_SEL_R(R300_RS_SEL_K0) |
 190                       R300_RS_SEL_Q(R300_RS_SEL_K1);
 191     } else {
 192         rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
 193                       R300_RS_SEL_S(R300_RS_SEL_C0) |
 194                       R300_RS_SEL_T(R300_RS_SEL_C1) |
 195                       R300_RS_SEL_R(R300_RS_SEL_C2) |
 196                       R300_RS_SEL_Q(R300_RS_SEL_C3);
 197     }
 198     rs->inst[id] |= R300_RS_INST_TEX_ID(id);
 199 }
 200
 201 static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
 202 {
 203     rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
 204                     R300_RS_INST_TEX_ADDR(fp_offset);
 205 }
 206
 207 static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
 208                         boolean swizzle_0001)
 209 {
 210     rs->ip[id] |= R500_RS_COL_PTR(ptr);
 211     if (swizzle_0001) {
 212         rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
 213     } else {
 214         rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
 215     }
 216     rs->inst[id] |= R500_RS_INST_COL_ID(id);
 217 }
 218
 219 static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
 220 {
 221     rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
 222                     R500_RS_INST_COL_ADDR(fp_offset);
 223 }
 224
 225 static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
 226                         boolean swizzle_X001)
 227 {
 228     int rs_tex_comp = ptr*4;
 229
 230     if (swizzle_X001) {
 231         rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
 232                       R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
 233                       R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
 234                       R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
 235     } else {
 236         rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
 237                       R500_RS_SEL_T(rs_tex_comp + 1) |
 238                       R500_RS_SEL_R(rs_tex_comp + 2) |
 239                       R500_RS_SEL_Q(rs_tex_comp + 3);
 240     }
 241     rs->inst[id] |= R500_RS_INST_TEX_ID(id);
 242 }
 243
 244 static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
 245 {
 246     rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
 247                     R500_RS_INST_TEX_ADDR(fp_offset);
 248 }
 249
 250 /* Set up the RS block.
 251  *
 252  * This is the part of the chipset that actually does the rasterization
 253  * of vertices into fragments. This is also the part of the chipset that
 254  * locks up if any part of it is even slightly wrong. */
 255 static void r300_update_rs_block(struct r300_context* r300,
 256                                  struct r300_shader_semantics* vs_outputs,
 257                                  struct r300_shader_semantics* fs_inputs)
 258 {
 259     struct r300_rs_block rs = { { 0 } };
 260     int i, col_count = 0, tex_count = 0, fp_offset = 0, count;
 261     void (*rX00_rs_col)(struct r300_rs_block*, int, int, boolean);
 262     void (*rX00_rs_col_write)(struct r300_rs_block*, int, int);
 263     void (*rX00_rs_tex)(struct r300_rs_block*, int, int, boolean);
 264     void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
 265     boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED ||
 266                               vs_outputs->bcolor[1] != ATTR_UNUSED;
 267
 268     if (r300->screen->caps.is_r500) {
 269         rX00_rs_col       = r500_rs_col;
 270         rX00_rs_col_write = r500_rs_col_write;
 271         rX00_rs_tex       = r500_rs_tex;
 272         rX00_rs_tex_write = r500_rs_tex_write;
 273     } else {
 274         rX00_rs_col       = r300_rs_col;
 275         rX00_rs_col_write = r300_rs_col_write;
 276         rX00_rs_tex       = r300_rs_tex;
 277         rX00_rs_tex_write = r300_rs_tex_write;
 278     }
 279
 280     /* Rasterize colors. */
 281     for (i = 0; i < ATTR_COLOR_COUNT; i++) {
 282         if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used ||
 283             vs_outputs->color[1] != ATTR_UNUSED) {
 284             /* Always rasterize if it's written by the VS,
 285              * otherwise it locks up. */
 286             rX00_rs_col(&rs, col_count, i, FALSE);
 287
 288             /* Write it to the FS input register if it's used by the FS. */
 289             if (fs_inputs->color[i] != ATTR_UNUSED) {
 290                 rX00_rs_col_write(&rs, col_count, fp_offset);
 291                 fp_offset++;
 292             }
 293             col_count++;
 294         } else {
 295             /* Skip the FS input register, leave it uninitialized. */
 296             /* If we try to set it to (0,0,0,1), it will lock up. */
 297             if (fs_inputs->color[i] != ATTR_UNUSED) {
 298                 fp_offset++;
 299             }
 300         }
 301     }
 302
 303     /* Rasterize texture coordinates. */
 304     for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
 305         if (vs_outputs->generic[i] != ATTR_UNUSED) {
 306             /* Always rasterize if it's written by the VS,
 307              * otherwise it locks up. */
 308             rX00_rs_tex(&rs, tex_count, tex_count, FALSE);
 309
 310             /* Write it to the FS input register if it's used by the FS. */
 311             if (fs_inputs->generic[i] != ATTR_UNUSED) {
 312                 rX00_rs_tex_write(&rs, tex_count, fp_offset);
 313                 fp_offset++;
 314             }
 315             tex_count++;
 316         } else {
 317             /* Skip the FS input register, leave it uninitialized. */
 318             /* If we try to set it to (0,0,0,1), it will lock up. */
 319             if (fs_inputs->generic[i] != ATTR_UNUSED) {
 320                 fp_offset++;
 321             }
 322         }
 323     }
 324
 325     /* Rasterize fog coordinates. */
 326     if (vs_outputs->fog != ATTR_UNUSED) {
 327         /* Always rasterize if it's written by the VS,
 328          * otherwise it locks up. */
 329         rX00_rs_tex(&rs, tex_count, tex_count, TRUE);
 330
 331         /* Write it to the FS input register if it's used by the FS. */
 332         if (fs_inputs->fog != ATTR_UNUSED) {
 333             rX00_rs_tex_write(&rs, tex_count, fp_offset);
 334             fp_offset++;
 335         }
 336         tex_count++;
 337     } else {
 338         /* Skip the FS input register, leave it uninitialized. */
 339         /* If we try to set it to (0,0,0,1), it will lock up. */
 340         if (fs_inputs->fog != ATTR_UNUSED) {
 341             fp_offset++;
 342         }
 343     }
 344
 345     /* Rasterize WPOS. */
 346     /* If the FS doesn't need it, it's not written by the VS. */
 347     if (fs_inputs->wpos != ATTR_UNUSED) {
 348         rX00_rs_tex(&rs, tex_count, tex_count, FALSE);
 349         rX00_rs_tex_write(&rs, tex_count, fp_offset);
 350
 351         fp_offset++;
 352         tex_count++;
 353     }
 354
 355     /* Rasterize at least one color, or bad things happen. */
 356     if (col_count == 0 && tex_count == 0) {
 357         rX00_rs_col(&rs, 0, 0, TRUE);
 358         col_count++;
 359     }
 360
 361     rs.count = (tex_count*4) | (col_count << R300_IC_COUNT_SHIFT) |
 362         R300_HIRES_EN;
 363
 364     count = MAX3(col_count, tex_count, 1);
 365     rs.inst_count = count - 1;
 366
 367     /* Now, after all that, see if we actually need to update the state. */
 368     if (memcmp(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block))) {
 369         memcpy(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block));
 370         r300->rs_block_state.size = 5 + count*2;
 371     }
 372 }
 373
 374 /* Update the shader-dependant states. */
 375 static void r300_update_derived_shader_state(struct r300_context* r300)
 376 {
 377     struct r300_vertex_shader* vs = r300->vs_state.state;
 378
 379     r300_update_rs_block(r300, &vs->outputs, &r300->fs->inputs);
 380 }
 381
 382 static boolean r300_dsa_writes_depth_stencil(struct r300_dsa_state* dsa)
 383 {
 384     /* We are interested only in the cases when a new depth or stencil value
 385      * can be written and changed. */
 386
 387     /* We might optionally check for [Z func: never] and inspect the stencil
 388      * state in a similar fashion, but it's not terribly important. */
 389     return (dsa->z_buffer_control & R300_Z_WRITE_ENABLE) ||
 390            (dsa->stencil_ref_mask & R300_STENCILWRITEMASK_MASK) ||
 391            ((dsa->z_buffer_control & R500_STENCIL_REFMASK_FRONT_BACK) &&
 392             (dsa->stencil_ref_bf & R300_STENCILWRITEMASK_MASK));
 393 }
 394
 395 static boolean r300_dsa_alpha_test_enabled(struct r300_dsa_state* dsa)
 396 {
 397     /* We are interested only in the cases when alpha testing can kill
 398      * a fragment. */
 399     uint32_t af = dsa->alpha_function;
 400
 401     return (af & R300_FG_ALPHA_FUNC_ENABLE) &&
 402            (af & R300_FG_ALPHA_FUNC_ALWAYS) != R300_FG_ALPHA_FUNC_ALWAYS;
 403 }
 404
 405 static void r300_update_ztop(struct r300_context* r300)
 406 {
 407     struct r300_ztop_state* ztop_state =
 408         (struct r300_ztop_state*)r300->ztop_state.state;
 409
 410     /* This is important enough that I felt it warranted a comment.
 411      *
 412      * According to the docs, these are the conditions where ZTOP must be
 413      * disabled:
 414      * 1) Alpha testing enabled
 415      * 2) Texture kill instructions in fragment shader
 416      * 3) Chroma key culling enabled
 417      * 4) W-buffering enabled
 418      *
 419      * The docs claim that for the first three cases, if no ZS writes happen,
 420      * then ZTOP can be used.
 421      *
 422      * (3) will never apply since we do not support chroma-keyed operations.
 423      * (4) will need to be re-examined (and this comment updated) if/when
 424      * Hyper-Z becomes supported.
 425      *
 426      * Additionally, the following conditions require disabled ZTOP:
 427      * 5) Depth writes in fragment shader
 428      * 6) Outstanding occlusion queries
 429      *
 430      * This register causes stalls all the way from SC to CB when changed,
 431      * but it is buffered on-chip so it does not hurt to write it if it has
 432      * not changed.
 433      *
 434      * ~C.
 435      */
 436
 437     /* ZS writes */
 438     if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) &&
 439            (r300_dsa_alpha_test_enabled(r300->dsa_state.state) ||/* (1) */
 440             r300->fs->info.uses_kill)) {                         /* (2) */
 441         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 442     } else if (r300_fragment_shader_writes_depth(r300->fs)) {    /* (5) */
 443         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 444     } else if (r300->query_current) {                            /* (6) */
 445         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 446     } else {
 447         ztop_state->z_buffer_top = R300_ZTOP_ENABLE;
 448     }
 449
 450     r300->ztop_state.dirty = TRUE;
 451 }
 452
 453 static void r300_merge_textures_and_samplers(struct r300_context* r300)
 454 {
 455     struct r300_textures_state *state =
 456         (struct r300_textures_state*)r300->textures_state.state;
 457     struct r300_texture_sampler_state *texstate;
 458     struct r300_sampler_state *sampler;
 459     struct pipe_sampler_view *view;
 460     struct r300_texture *tex;
 461     unsigned min_level, max_level, i, size;
 462     unsigned count = MIN2(state->texture_count, state->sampler_count);
 463
 464     state->tx_enable = 0;
 465     state->count = 0;
 466     size = 2;
 467
 468     for (i = 0; i < count; i++) {
 469         if (state->fragment_sampler_views[i] && state->sampler_states[i]) {
 470             state->tx_enable |= 1 << i;
 471
 472             view = state->fragment_sampler_views[i];
 473             tex = r300_texture(view->texture);
 474             sampler = state->sampler_states[i];
 475
 476             assert(view->format == tex->tex.format);
 477
 478             texstate = &state->regs[i];
 479             memcpy(texstate->format, &tex->state, sizeof(uint32_t)*3);
 480             texstate->filter[0] = sampler->filter0;
 481             texstate->filter[1] = sampler->filter1;
 482             texstate->border_color = sampler->border_color;
 483             texstate->tile_config = R300_TXO_MACRO_TILE(tex->macrotile) |
 484                                     R300_TXO_MICRO_TILE(tex->microtile);
 485
 486             /* to emulate 1D textures through 2D ones correctly */
 487             if (tex->tex.target == PIPE_TEXTURE_1D) {
 488                 texstate->filter[0] &= ~R300_TX_WRAP_T_MASK;
 489                 texstate->filter[0] |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
 490             }
 491
 492             if (tex->uses_pitch) {
 493                 /* NPOT textures don't support mip filter, unfortunately.
 494                  * This prevents incorrect rendering. */
 495                 texstate->filter[0] &= ~R300_TX_MIN_FILTER_MIP_MASK;
 496             } else {
 497                 /* determine min/max levels */
 498                 /* the MAX_MIP level is the largest (finest) one */
 499                 max_level = MIN3(sampler->max_lod + view->first_level,
 500                                  tex->tex.last_level, view->last_level);
 501                 min_level = MIN2(sampler->min_lod + view->first_level,
 502                                  max_level);
 503                 texstate->format[0] |= R300_TX_NUM_LEVELS(max_level);
 504                 texstate->filter[0] |= R300_TX_MAX_MIP_LEVEL(min_level);
 505             }
 506
 507             texstate->filter[0] |= i << 28;
 508
 509             size += 16;
 510             state->count = i+1;
 511         }
 512     }
 513
 514     r300->textures_state.size = size;
 515 }
 516
 517 void r300_update_derived_state(struct r300_context* r300)
 518 {
 519     if (r300->rs_block_state.dirty) {
 520         r300_update_derived_shader_state(r300);
 521     }
 522
 523     if (r300->textures_state.dirty) {
 524         r300_merge_textures_and_samplers(r300);
 525     }
 526
 527     if (r300->draw) {
 528         memset(&r300->vertex_info, 0, sizeof(struct vertex_info));
 529         r300_draw_emit_all_attribs(r300);
 530         draw_compute_vertex_size(&r300->vertex_info);
 531         r300_swtcl_vertex_psc(r300);
 532     }
 533
 534     r300_update_ztop(r300);
 535 }