src/gallium/drivers/r600/eg_asm.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include "util/u_memory.h"
  26 #include "r600_pipe.h"
  27 #include "r600_asm.h"
  28 #include "eg_sq.h"
  29 #include "r600_opcodes.h"
  30 #include "evergreend.h"
  31
  32 int eg_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
  33 {
  34         unsigned id = cf->id;
  35
  36         switch (cf->inst) {
  37         case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
  38         case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
  39         case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
  40         case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
  41                 bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
  42                         S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
  43                         S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
  44                         S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
  45                 bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(cf->inst >> 3) |
  46                         S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
  47                         S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
  48                         S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
  49                                         S_SQ_CF_ALU_WORD1_BARRIER(1) |
  50                                         S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
  51                 break;
  52         case EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX:
  53         case EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX:
  54                 bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
  55                 bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
  56                                         S_SQ_CF_WORD1_BARRIER(1) |
  57                                         S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
  58                 break;
  59         case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
  60         case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
  61                 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
  62                         S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
  63                         S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
  64                         S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type);
  65                 bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) |
  66                         S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
  67                         S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
  68                         S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
  69                         S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
  70                         S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst) |
  71                         S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program);
  72                 break;
  73         case EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
  74         case EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
  75         case EG_V_SQ_CF_WORD1_SQ_CF_INST_POP:
  76         case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
  77         case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
  78         case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
  79         case EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
  80         case EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
  81         case EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
  82                 bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
  83                 bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
  84                                         S_SQ_CF_WORD1_BARRIER(1) |
  85                                         S_SQ_CF_WORD1_COND(cf->cond) |
  86                                         S_SQ_CF_WORD1_POP_COUNT(cf->pop_count);
  87
  88                 break;
  89         default:
  90                 R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
  91                 return -EINVAL;
  92         }
  93         return 0;
  94 }
  95
  96 void eg_cf_vtx(struct r600_vertex_element *ve, u32 *bytecode, unsigned count)
  97 {
  98         struct r600_pipe_state *rstate;
  99         unsigned i = 0;
 100
 101         if (count > 8) {
 102                 bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
 103                 bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
 104                                 S_SQ_CF_WORD1_BARRIER(1) |
 105                                 S_SQ_CF_WORD1_COUNT(8 - 1);
 106                 bytecode[i++] = S_SQ_CF_WORD0_ADDR(40 >> 1);
 107                 bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
 108                                 S_SQ_CF_WORD1_BARRIER(1) |
 109                                 S_SQ_CF_WORD1_COUNT(count - 8 - 1);
 110         } else {
 111                 bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
 112                 bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
 113                                 S_SQ_CF_WORD1_BARRIER(1) |
 114                                 S_SQ_CF_WORD1_COUNT(count - 1);
 115         }
 116         bytecode[i++] = S_SQ_CF_WORD0_ADDR(0);
 117         bytecode[i++] = S_SQ_CF_WORD1_CF_INST(EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN) |
 118                         S_SQ_CF_WORD1_BARRIER(1);
 119
 120         rstate = &ve->rstate;
 121         rstate->id = R600_PIPE_STATE_FETCH_SHADER;
 122         rstate->nregs = 0;
 123         r600_pipe_state_add_reg(rstate, R_0288A8_SQ_PGM_RESOURCES_FS,
 124                                 0x00000000, 0xFFFFFFFF, NULL);
 125         r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_START_FS,
 126                                 (r600_bo_offset(ve->fetch_shader)) >> 8,
 127                                 0xFFFFFFFF, ve->fetch_shader);
 128 }