Added few more stubs so that control reaches to DestroyDevice().
[mesa.git] / src / gallium / drivers / r600 / r600_formats.h
1 #ifndef R600_FORMATS_H
2 #define R600_FORMATS_H
3
4 #include "util/format/u_format.h"
5 #include "r600_pipe.h"
6
7 /* list of formats from R700 ISA document - apply across GPUs in different registers */
8 #define FMT_INVALID 0x00000000
9 #define FMT_8 0x00000001
10 #define FMT_4_4 0x00000002
11 #define FMT_3_3_2 0x00000003
12 #define FMT_16 0x00000005
13 #define FMT_16_FLOAT 0x00000006
14 #define FMT_8_8 0x00000007
15 #define FMT_5_6_5 0x00000008
16 #define FMT_6_5_5 0x00000009
17 #define FMT_1_5_5_5 0x0000000A
18 #define FMT_4_4_4_4 0x0000000B
19 #define FMT_5_5_5_1 0x0000000C
20 #define FMT_32 0x0000000D
21 #define FMT_32_FLOAT 0x0000000E
22 #define FMT_16_16 0x0000000F
23 #define FMT_16_16_FLOAT 0x00000010
24 #define FMT_8_24 0x00000011
25 #define FMT_8_24_FLOAT 0x00000012
26 #define FMT_24_8 0x00000013
27 #define FMT_24_8_FLOAT 0x00000014
28 #define FMT_10_11_11 0x00000015
29 #define FMT_10_11_11_FLOAT 0x00000016
30 #define FMT_11_11_10 0x00000017
31 #define FMT_11_11_10_FLOAT 0x00000018
32 #define FMT_2_10_10_10 0x00000019
33 #define FMT_8_8_8_8 0x0000001A
34 #define FMT_10_10_10_2 0x0000001B
35 #define FMT_X24_8_32_FLOAT 0x0000001C
36 #define FMT_32_32 0x0000001D
37 #define FMT_32_32_FLOAT 0x0000001E
38 #define FMT_16_16_16_16 0x0000001F
39 #define FMT_16_16_16_16_FLOAT 0x00000020
40 #define FMT_32_32_32_32 0x00000022
41 #define FMT_32_32_32_32_FLOAT 0x00000023
42 #define FMT_1 0x00000025
43 #define FMT_GB_GR 0x00000027
44 #define FMT_BG_RG 0x00000028
45 #define FMT_32_AS_8 0x00000029
46 #define FMT_32_AS_8_8 0x0000002a
47 #define FMT_5_9_9_9_SHAREDEXP 0x0000002b
48 #define FMT_8_8_8 0x0000002c
49 #define FMT_16_16_16 0x0000002d
50 #define FMT_16_16_16_FLOAT 0x0000002e
51 #define FMT_32_32_32 0x0000002f
52 #define FMT_32_32_32_FLOAT 0x00000030
53 #define FMT_BC1 0x00000031
54 #define FMT_BC2 0x00000032
55 #define FMT_BC3 0x00000033
56 #define FMT_BC4 0x00000034
57 #define FMT_BC5 0x00000035
58 #define FMT_BC6 0x00000036
59 #define FMT_BC7 0x00000037
60 #define FMT_32_AS_32_32_32_32 0x00000038
61
62 #define ENDIAN_NONE 0
63 #define ENDIAN_8IN16 1
64 #define ENDIAN_8IN32 2
65 #define ENDIAN_8IN64 3
66
67 static inline unsigned r600_endian_swap(unsigned size)
68 {
69 if (R600_BIG_ENDIAN) {
70 switch (size) {
71 case 64:
72 return ENDIAN_8IN64;
73 case 32:
74 return ENDIAN_8IN32;
75 case 16:
76 return ENDIAN_8IN16;
77 default:
78 return ENDIAN_NONE;
79 }
80 } else {
81 return ENDIAN_NONE;
82 }
83 }
84
85 static inline bool r600_is_vertex_format_supported(enum pipe_format format)
86 {
87 const struct util_format_description *desc = util_format_description(format);
88 unsigned i;
89
90 if (format == PIPE_FORMAT_R11G11B10_FLOAT)
91 return true;
92
93 if (!desc)
94 return false;
95
96 /* Find the first non-VOID channel. */
97 for (i = 0; i < 4; i++) {
98 if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID)
99 break;
100 }
101 if (i == 4)
102 return false;
103
104 /* No fixed, no double. */
105 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN ||
106 (desc->channel[i].size == 64 &&
107 desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT) ||
108 desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
109 return false;
110
111 /* No scaled/norm formats with 32 bits per channel. */
112 if (desc->channel[i].size == 32 &&
113 !desc->channel[i].pure_integer &&
114 (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED ||
115 desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED))
116 return false;
117
118 /* No 8 bit 3 channel formats */
119 if (desc->channel[i].size == 8 && desc->nr_channels == 3)
120 return false;
121
122 return true;
123 }
124
125 #endif