src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_format_s3tc.h>
  34 #include <util/u_transfer.h>
  35 #include <util/u_surface.h>
  36 #include <util/u_pack_color.h>
  37 #include <util/u_memory.h>
  38 #include <util/u_inlines.h>
  39 #include "util/u_upload_mgr.h"
  40 #include <pipebuffer/pb_buffer.h>
  41 #include "r600.h"
  42 #include "r600d.h"
  43 #include "r600_resource.h"
  44 #include "r600_shader.h"
  45 #include "r600_pipe.h"
  46 #include "r600_state_inlines.h"
  47 #include "r600_video_context.h"
  48
  49 /*
  50  * pipe_context
  51  */
  52 static void r600_flush(struct pipe_context *ctx, unsigned flags,
  53                         struct pipe_fence_handle **fence)
  54 {
  55         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  56 #if 0
  57         static int dc = 0;
  58         char dname[256];
  59 #endif
  60
  61         if (!rctx->ctx.pm4_cdwords)
  62                 return;
  63
  64 #if 0
  65         sprintf(dname, "gallium-%08d.bof", dc);
  66         if (dc < 20) {
  67                 r600_context_dump_bof(&rctx->ctx, dname);
  68                 R600_ERR("dumped %s\n", dname);
  69         }
  70         dc++;
  71 #endif
  72         r600_context_flush(&rctx->ctx);
  73
  74         /* XXX This shouldn't be really necessary, but removing it breaks some tests.
  75          * Needless buffer reallocations may significantly increase memory consumption,
  76          * so getting rid of this call is important. */
  77         u_upload_flush(rctx->vbuf_mgr->uploader);
  78 }
  79
  80 static void r600_update_num_contexts(struct r600_screen *rscreen,
  81                                      int diff)
  82 {
  83         pipe_mutex_lock(rscreen->mutex_num_contexts);
  84         if (diff > 0) {
  85                 rscreen->num_contexts++;
  86
  87                 if (rscreen->num_contexts > 1)
  88                         util_slab_set_thread_safety(&rscreen->pool_buffers,
  89                                                     UTIL_SLAB_MULTITHREADED);
  90         } else {
  91                 rscreen->num_contexts--;
  92
  93                 if (rscreen->num_contexts <= 1)
  94                         util_slab_set_thread_safety(&rscreen->pool_buffers,
  95                                                     UTIL_SLAB_SINGLETHREADED);
  96         }
  97         pipe_mutex_unlock(rscreen->mutex_num_contexts);
  98 }
  99
 100 static void r600_destroy_context(struct pipe_context *context)
 101 {
 102         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 103
 104         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 105
 106         r600_context_fini(&rctx->ctx);
 107
 108         util_blitter_destroy(rctx->blitter);
 109
 110         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 111                 free(rctx->states[i]);
 112         }
 113
 114         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 115         util_slab_destroy(&rctx->pool_transfers);
 116
 117         r600_update_num_contexts(rctx->screen, -1);
 118
 119         FREE(rctx);
 120 }
 121
 122 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 123 {
 124         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 125         struct r600_screen* rscreen = (struct r600_screen *)screen;
 126         enum chip_class class;
 127
 128         if (rctx == NULL)
 129                 return NULL;
 130
 131         r600_update_num_contexts(rscreen, 1);
 132
 133         rctx->context.winsys = rscreen->screen.winsys;
 134         rctx->context.screen = screen;
 135         rctx->context.priv = priv;
 136         rctx->context.destroy = r600_destroy_context;
 137         rctx->context.flush = r600_flush;
 138
 139         /* Easy accessing of screen/winsys. */
 140         rctx->screen = rscreen;
 141         rctx->radeon = rscreen->radeon;
 142         rctx->family = r600_get_family(rctx->radeon);
 143
 144         r600_init_blit_functions(rctx);
 145         r600_init_query_functions(rctx);
 146         r600_init_context_resource_functions(rctx);
 147         r600_init_surface_functions(rctx);
 148         rctx->context.draw_vbo = r600_draw_vbo;
 149
 150         switch (r600_get_family(rctx->radeon)) {
 151         case CHIP_R600:
 152         case CHIP_RV610:
 153         case CHIP_RV630:
 154         case CHIP_RV670:
 155         case CHIP_RV620:
 156         case CHIP_RV635:
 157         case CHIP_RS780:
 158         case CHIP_RS880:
 159         case CHIP_RV770:
 160         case CHIP_RV730:
 161         case CHIP_RV710:
 162         case CHIP_RV740:
 163                 r600_init_state_functions(rctx);
 164                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 165                         r600_destroy_context(&rctx->context);
 166                         return NULL;
 167                 }
 168                 r600_init_config(rctx);
 169                 break;
 170         case CHIP_CEDAR:
 171         case CHIP_REDWOOD:
 172         case CHIP_JUNIPER:
 173         case CHIP_CYPRESS:
 174         case CHIP_HEMLOCK:
 175         case CHIP_PALM:
 176         case CHIP_BARTS:
 177         case CHIP_TURKS:
 178         case CHIP_CAICOS:
 179                 evergreen_init_state_functions(rctx);
 180                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 181                         r600_destroy_context(&rctx->context);
 182                         return NULL;
 183                 }
 184                 evergreen_init_config(rctx);
 185                 break;
 186         default:
 187                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 188                 r600_destroy_context(&rctx->context);
 189                 return NULL;
 190         }
 191
 192         util_slab_create(&rctx->pool_transfers,
 193                          sizeof(struct pipe_transfer), 64,
 194                          UTIL_SLAB_SINGLETHREADED);
 195
 196         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 197                                            PIPE_BIND_VERTEX_BUFFER |
 198                                            PIPE_BIND_INDEX_BUFFER |
 199                                            PIPE_BIND_CONSTANT_BUFFER,
 200                                            U_VERTEX_FETCH_DWORD_ALIGNED);
 201         if (!rctx->vbuf_mgr) {
 202                 r600_destroy_context(&rctx->context);
 203                 return NULL;
 204         }
 205
 206         rctx->blitter = util_blitter_create(&rctx->context);
 207         if (rctx->blitter == NULL) {
 208                 r600_destroy_context(&rctx->context);
 209                 return NULL;
 210         }
 211
 212         class = r600_get_family_class(rctx->radeon);
 213         if (class == R600 || class == R700)
 214                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 215         else
 216                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 217
 218         return &rctx->context;
 219 }
 220
 221 /*
 222  * pipe_screen
 223  */
 224 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 225 {
 226         return "X.Org";
 227 }
 228
 229 static const char *r600_get_family_name(enum radeon_family family)
 230 {
 231         switch(family) {
 232         case CHIP_R600: return "AMD R600";
 233         case CHIP_RV610: return "AMD RV610";
 234         case CHIP_RV630: return "AMD RV630";
 235         case CHIP_RV670: return "AMD RV670";
 236         case CHIP_RV620: return "AMD RV620";
 237         case CHIP_RV635: return "AMD RV635";
 238         case CHIP_RS780: return "AMD RS780";
 239         case CHIP_RS880: return "AMD RS880";
 240         case CHIP_RV770: return "AMD RV770";
 241         case CHIP_RV730: return "AMD RV730";
 242         case CHIP_RV710: return "AMD RV710";
 243         case CHIP_RV740: return "AMD RV740";
 244         case CHIP_CEDAR: return "AMD CEDAR";
 245         case CHIP_REDWOOD: return "AMD REDWOOD";
 246         case CHIP_JUNIPER: return "AMD JUNIPER";
 247         case CHIP_CYPRESS: return "AMD CYPRESS";
 248         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 249         case CHIP_PALM: return "AMD PALM";
 250         case CHIP_BARTS: return "AMD BARTS";
 251         case CHIP_TURKS: return "AMD TURKS";
 252         case CHIP_CAICOS: return "AMD CAICOS";
 253         default: return "AMD unknown";
 254         }
 255 }
 256
 257 static const char* r600_get_name(struct pipe_screen* pscreen)
 258 {
 259         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 260         enum radeon_family family = r600_get_family(rscreen->radeon);
 261
 262         return r600_get_family_name(family);
 263 }
 264
 265 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 266 {
 267         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 268         enum radeon_family family = r600_get_family(rscreen->radeon);
 269
 270         switch (param) {
 271         /* Supported features (boolean caps). */
 272         case PIPE_CAP_NPOT_TEXTURES:
 273         case PIPE_CAP_TWO_SIDED_STENCIL:
 274         case PIPE_CAP_GLSL:
 275         case PIPE_CAP_DUAL_SOURCE_BLEND:
 276         case PIPE_CAP_ANISOTROPIC_FILTER:
 277         case PIPE_CAP_POINT_SPRITE:
 278         case PIPE_CAP_OCCLUSION_QUERY:
 279         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 280         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 281         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 282         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 283         case PIPE_CAP_SM3:
 284         case PIPE_CAP_TEXTURE_SWIZZLE:
 285         case PIPE_CAP_INDEP_BLEND_ENABLE:
 286         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 287         case PIPE_CAP_DEPTH_CLAMP:
 288         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 289                 return 1;
 290
 291         /* Unsupported features (boolean caps). */
 292         case PIPE_CAP_STREAM_OUTPUT:
 293         case PIPE_CAP_PRIMITIVE_RESTART:
 294         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 295         case PIPE_CAP_INSTANCED_DRAWING:
 296                 return 0;
 297
 298         case PIPE_CAP_ARRAY_TEXTURES:
 299                 /* fix once the CS checker upstream is fixed */
 300                 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 301
 302         /* Texturing. */
 303         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 304         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 305         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 306                 if (family >= CHIP_CEDAR)
 307                         return 15;
 308                 else
 309                         return 14;
 310         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 311                 /* FIXME allow this once infrastructure is there */
 312                 return 16;
 313         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 314         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 315                 return 16;
 316
 317         /* Render targets. */
 318         case PIPE_CAP_MAX_RENDER_TARGETS:
 319                 /* FIXME some r6xx are buggy and can only do 4 */
 320                 return 8;
 321
 322         /* Fragment coordinate conventions. */
 323         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 324         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 325                 return 1;
 326         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 327         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 328                 return 0;
 329
 330         /* Timer queries, present when the clock frequency is non zero. */
 331         case PIPE_CAP_TIMER_QUERY:
 332                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 333
 334         default:
 335                 R600_ERR("r600: unknown param %d\n", param);
 336                 return 0;
 337         }
 338 }
 339
 340 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 341 {
 342         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 343         enum radeon_family family = r600_get_family(rscreen->radeon);
 344
 345         switch (param) {
 346         case PIPE_CAP_MAX_LINE_WIDTH:
 347         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 348         case PIPE_CAP_MAX_POINT_WIDTH:
 349         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 350                 if (family >= CHIP_CEDAR)
 351                         return 16384.0f;
 352                 else
 353                         return 8192.0f;
 354         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 355                 return 16.0f;
 356         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 357                 return 16.0f;
 358         default:
 359                 R600_ERR("r600: unsupported paramf %d\n", param);
 360                 return 0.0f;
 361         }
 362 }
 363
 364 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 365 {
 366         switch(shader)
 367         {
 368         case PIPE_SHADER_FRAGMENT:
 369         case PIPE_SHADER_VERTEX:
 370                 break;
 371         case PIPE_SHADER_GEOMETRY:
 372                 /* TODO: support and enable geometry programs */
 373                 return 0;
 374         default:
 375                 /* TODO: support tessellation on Evergreen */
 376                 return 0;
 377         }
 378
 379         /* TODO: all these should be fixed, since r600 surely supports much more! */
 380         switch (param) {
 381         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 382         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 383         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 384         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 385                 return 16384;
 386         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 387                 return 8; /* FIXME */
 388         case PIPE_SHADER_CAP_MAX_INPUTS:
 389                 if(shader == PIPE_SHADER_FRAGMENT)
 390                         return 10;
 391                 else
 392                         return 16;
 393         case PIPE_SHADER_CAP_MAX_TEMPS:
 394                 return 256; //max native temporaries
 395         case PIPE_SHADER_CAP_MAX_ADDRS:
 396                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 397         case PIPE_SHADER_CAP_MAX_CONSTS:
 398                 return 256; //max native parameters
 399         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 400                 return R600_MAX_CONST_BUFFERS;
 401         case PIPE_SHADER_CAP_MAX_PREDS:
 402                 return 0; /* FIXME */
 403         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 404                 return 1;
 405         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 406         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 407         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 408         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 409                 return 1;
 410         case PIPE_SHADER_CAP_SUBROUTINES:
 411                 return 0;
 412         default:
 413                 return 0;
 414         }
 415 }
 416
 417 static boolean r600_is_format_supported(struct pipe_screen* screen,
 418                                         enum pipe_format format,
 419                                         enum pipe_texture_target target,
 420                                         unsigned sample_count,
 421                                         unsigned usage,
 422                                         unsigned geom_flags)
 423 {
 424         unsigned retval = 0;
 425         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 426                 R600_ERR("r600: unsupported texture type %d\n", target);
 427                 return FALSE;
 428         }
 429
 430         /* Multisample */
 431         if (sample_count > 1)
 432                 return FALSE;
 433
 434         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 435             r600_is_sampler_format_supported(format)) {
 436                 retval |= PIPE_BIND_SAMPLER_VIEW;
 437         }
 438
 439         if ((usage & (PIPE_BIND_RENDER_TARGET |
 440                         PIPE_BIND_DISPLAY_TARGET |
 441                         PIPE_BIND_SCANOUT |
 442                         PIPE_BIND_SHARED)) &&
 443                         r600_is_colorbuffer_format_supported(format)) {
 444                 retval |= usage &
 445                         (PIPE_BIND_RENDER_TARGET |
 446                          PIPE_BIND_DISPLAY_TARGET |
 447                          PIPE_BIND_SCANOUT |
 448                          PIPE_BIND_SHARED);
 449         }
 450
 451         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 452             r600_is_zs_format_supported(format)) {
 453                 retval |= PIPE_BIND_DEPTH_STENCIL;
 454         }
 455
 456         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 457                 struct r600_screen *rscreen = (struct r600_screen *)screen;
 458                 enum radeon_family family = r600_get_family(rscreen->radeon);
 459
 460                 if (r600_is_vertex_format_supported(format, family)) {
 461                         retval |= PIPE_BIND_VERTEX_BUFFER;
 462                 }
 463         }
 464
 465         if (usage & PIPE_BIND_TRANSFER_READ)
 466                 retval |= PIPE_BIND_TRANSFER_READ;
 467         if (usage & PIPE_BIND_TRANSFER_WRITE)
 468                 retval |= PIPE_BIND_TRANSFER_WRITE;
 469
 470         return retval == usage;
 471 }
 472
 473 static void r600_destroy_screen(struct pipe_screen* pscreen)
 474 {
 475         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 476
 477         if (rscreen == NULL)
 478                 return;
 479
 480         radeon_decref(rscreen->radeon);
 481
 482         util_slab_destroy(&rscreen->pool_buffers);
 483         pipe_mutex_destroy(rscreen->mutex_num_contexts);
 484         FREE(rscreen);
 485 }
 486
 487
 488 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 489 {
 490         struct r600_screen *rscreen;
 491
 492         rscreen = CALLOC_STRUCT(r600_screen);
 493         if (rscreen == NULL) {
 494                 return NULL;
 495         }
 496
 497         rscreen->radeon = radeon;
 498         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 499         rscreen->screen.destroy = r600_destroy_screen;
 500         rscreen->screen.get_name = r600_get_name;
 501         rscreen->screen.get_vendor = r600_get_vendor;
 502         rscreen->screen.get_param = r600_get_param;
 503         rscreen->screen.get_shader_param = r600_get_shader_param;
 504         rscreen->screen.get_paramf = r600_get_paramf;
 505         rscreen->screen.is_format_supported = r600_is_format_supported;
 506         rscreen->screen.context_create = r600_create_context;
 507         rscreen->screen.video_context_create = r600_video_create;
 508         r600_init_screen_resource_functions(&rscreen->screen);
 509
 510         rscreen->tiling_info = r600_get_tiling_info(radeon);
 511         util_format_s3tc_init();
 512
 513         util_slab_create(&rscreen->pool_buffers,
 514                          sizeof(struct r600_resource_buffer), 64,
 515                          UTIL_SLAB_SINGLETHREADED);
 516
 517         pipe_mutex_init(rscreen->mutex_num_contexts);
 518
 519         return &rscreen->screen;
 520 }