src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include "util/u_format.h"
  34 #include <util/u_format_s3tc.h>
  35 #include <util/u_transfer.h>
  36 #include <util/u_surface.h>
  37 #include <util/u_pack_color.h>
  38 #include <util/u_memory.h>
  39 #include <util/u_inlines.h>
  40 #include "util/u_upload_mgr.h"
  41 #include <vl/vl_decoder.h>
  42 #include <vl/vl_video_buffer.h>
  43 #include "os/os_time.h"
  44 #include <pipebuffer/pb_buffer.h>
  45 #include "r600.h"
  46 #include "r600d.h"
  47 #include "r600_resource.h"
  48 #include "r600_shader.h"
  49 #include "r600_pipe.h"
  50
  51 /*
  52  * pipe_context
  53  */
  54 static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
  55 {
  56         struct r600_fence *fence = NULL;
  57
  58         if (!ctx->fences.bo) {
  59                 /* Create the shared buffer object */
  60                 ctx->fences.bo = r600_bo(ctx->radeon, 4096, 0, 0, 0);
  61                 if (!ctx->fences.bo) {
  62                         R600_ERR("r600: failed to create bo for fence objects\n");
  63                         return NULL;
  64                 }
  65                 ctx->fences.data = r600_bo_map(ctx->radeon, ctx->fences.bo, PIPE_TRANSFER_UNSYNCHRONIZED, NULL);
  66         }
  67
  68         if (!LIST_IS_EMPTY(&ctx->fences.pool)) {
  69                 struct r600_fence *entry;
  70
  71                 /* Try to find a freed fence that has been signalled */
  72                 LIST_FOR_EACH_ENTRY(entry, &ctx->fences.pool, head) {
  73                         if (ctx->fences.data[entry->index] != 0) {
  74                                 LIST_DELINIT(&entry->head);
  75                                 fence = entry;
  76                                 break;
  77                         }
  78                 }
  79         }
  80
  81         if (!fence) {
  82                 /* Allocate a new fence */
  83                 struct r600_fence_block *block;
  84                 unsigned index;
  85
  86                 if ((ctx->fences.next_index + 1) >= 1024) {
  87                         R600_ERR("r600: too many concurrent fences\n");
  88                         return NULL;
  89                 }
  90
  91                 index = ctx->fences.next_index++;
  92
  93                 if (!(index % FENCE_BLOCK_SIZE)) {
  94                         /* Allocate a new block */
  95                         block = CALLOC_STRUCT(r600_fence_block);
  96                         if (block == NULL)
  97                                 return NULL;
  98
  99                         LIST_ADD(&block->head, &ctx->fences.blocks);
 100                 } else {
 101                         block = LIST_ENTRY(struct r600_fence_block, ctx->fences.blocks.next, head);
 102                 }
 103
 104                 fence = &block->fences[index % FENCE_BLOCK_SIZE];
 105                 fence->ctx = ctx;
 106                 fence->index = index;
 107         }
 108
 109         pipe_reference_init(&fence->reference, 1);
 110
 111         ctx->fences.data[fence->index] = 0;
 112         r600_context_emit_fence(&ctx->ctx, ctx->fences.bo, fence->index, 1);
 113         return fence;
 114 }
 115
 116 static void r600_flush(struct pipe_context *ctx,
 117                         struct pipe_fence_handle **fence)
 118 {
 119         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 120         struct r600_fence **rfence = (struct r600_fence**)fence;
 121
 122 #if 0
 123         static int dc = 0;
 124         char dname[256];
 125 #endif
 126
 127         if (rfence)
 128                 *rfence = r600_create_fence(rctx);
 129
 130 #if 0
 131         sprintf(dname, "gallium-%08d.bof", dc);
 132         if (dc < 20) {
 133                 r600_context_dump_bof(&rctx->ctx, dname);
 134                 R600_ERR("dumped %s\n", dname);
 135         }
 136         dc++;
 137 #endif
 138         r600_context_flush(&rctx->ctx);
 139 }
 140
 141 static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
 142 {
 143         pipe_mutex_lock(rscreen->mutex_num_contexts);
 144         if (diff > 0) {
 145                 rscreen->num_contexts++;
 146
 147                 if (rscreen->num_contexts > 1)
 148                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 149                                                     UTIL_SLAB_MULTITHREADED);
 150         } else {
 151                 rscreen->num_contexts--;
 152
 153                 if (rscreen->num_contexts <= 1)
 154                         util_slab_set_thread_safety(&rscreen->pool_buffers,
 155                                                     UTIL_SLAB_SINGLETHREADED);
 156         }
 157         pipe_mutex_unlock(rscreen->mutex_num_contexts);
 158 }
 159
 160 static void r600_destroy_context(struct pipe_context *context)
 161 {
 162         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 163
 164         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 165         util_unreference_framebuffer_state(&rctx->framebuffer);
 166
 167         r600_context_fini(&rctx->ctx);
 168
 169         util_blitter_destroy(rctx->blitter);
 170
 171         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 172                 free(rctx->states[i]);
 173         }
 174
 175         u_vbuf_mgr_destroy(rctx->vbuf_mgr);
 176         util_slab_destroy(&rctx->pool_transfers);
 177
 178         if (rctx->fences.bo) {
 179                 struct r600_fence_block *entry, *tmp;
 180
 181                 LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rctx->fences.blocks, head) {
 182                         LIST_DEL(&entry->head);
 183                         FREE(entry);
 184                 }
 185
 186                 r600_bo_unmap(rctx->radeon, rctx->fences.bo);
 187                 r600_bo_reference(rctx->radeon, &rctx->fences.bo, NULL);
 188         }
 189
 190         r600_update_num_contexts(rctx->screen, -1);
 191
 192         FREE(rctx);
 193 }
 194
 195 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 196 {
 197         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 198         struct r600_screen* rscreen = (struct r600_screen *)screen;
 199
 200         if (rctx == NULL)
 201                 return NULL;
 202
 203         r600_update_num_contexts(rscreen, 1);
 204
 205         rctx->context.winsys = rscreen->screen.winsys;
 206         rctx->context.screen = screen;
 207         rctx->context.priv = priv;
 208         rctx->context.destroy = r600_destroy_context;
 209         rctx->context.flush = r600_flush;
 210
 211         /* Easy accessing of screen/winsys. */
 212         rctx->screen = rscreen;
 213         rctx->radeon = rscreen->radeon;
 214         rctx->family = r600_get_family(rctx->radeon);
 215         rctx->chip_class = r600_get_family_class(rctx->radeon);
 216
 217         rctx->fences.bo = NULL;
 218         rctx->fences.data = NULL;
 219         rctx->fences.next_index = 0;
 220         LIST_INITHEAD(&rctx->fences.pool);
 221         LIST_INITHEAD(&rctx->fences.blocks);
 222
 223         r600_init_blit_functions(rctx);
 224         r600_init_query_functions(rctx);
 225         r600_init_context_resource_functions(rctx);
 226         r600_init_surface_functions(rctx);
 227         rctx->context.draw_vbo = r600_draw_vbo;
 228
 229         rctx->context.create_video_decoder = vl_create_decoder;
 230         rctx->context.create_video_buffer = vl_video_buffer_create;
 231
 232         switch (rctx->chip_class) {
 233         case R600:
 234         case R700:
 235                 r600_init_state_functions(rctx);
 236                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 237                         r600_destroy_context(&rctx->context);
 238                         return NULL;
 239                 }
 240                 r600_init_config(rctx);
 241                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 242                 break;
 243         case EVERGREEN:
 244         case CAYMAN:
 245                 evergreen_init_state_functions(rctx);
 246                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 247                         r600_destroy_context(&rctx->context);
 248                         return NULL;
 249                 }
 250                 evergreen_init_config(rctx);
 251                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 252                 break;
 253         default:
 254                 R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
 255                 r600_destroy_context(&rctx->context);
 256                 return NULL;
 257         }
 258
 259         util_slab_create(&rctx->pool_transfers,
 260                          sizeof(struct pipe_transfer), 64,
 261                          UTIL_SLAB_SINGLETHREADED);
 262
 263         rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
 264                                            PIPE_BIND_VERTEX_BUFFER |
 265                                            PIPE_BIND_INDEX_BUFFER |
 266                                            PIPE_BIND_CONSTANT_BUFFER,
 267                                            U_VERTEX_FETCH_DWORD_ALIGNED);
 268         if (!rctx->vbuf_mgr) {
 269                 r600_destroy_context(&rctx->context);
 270                 return NULL;
 271         }
 272
 273         rctx->blitter = util_blitter_create(&rctx->context);
 274         if (rctx->blitter == NULL) {
 275                 r600_destroy_context(&rctx->context);
 276                 return NULL;
 277         }
 278
 279         return &rctx->context;
 280 }
 281
 282 /*
 283  * pipe_screen
 284  */
 285 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 286 {
 287         return "X.Org";
 288 }
 289
 290 static const char *r600_get_family_name(enum radeon_family family)
 291 {
 292         switch(family) {
 293         case CHIP_R600: return "AMD R600";
 294         case CHIP_RV610: return "AMD RV610";
 295         case CHIP_RV630: return "AMD RV630";
 296         case CHIP_RV670: return "AMD RV670";
 297         case CHIP_RV620: return "AMD RV620";
 298         case CHIP_RV635: return "AMD RV635";
 299         case CHIP_RS780: return "AMD RS780";
 300         case CHIP_RS880: return "AMD RS880";
 301         case CHIP_RV770: return "AMD RV770";
 302         case CHIP_RV730: return "AMD RV730";
 303         case CHIP_RV710: return "AMD RV710";
 304         case CHIP_RV740: return "AMD RV740";
 305         case CHIP_CEDAR: return "AMD CEDAR";
 306         case CHIP_REDWOOD: return "AMD REDWOOD";
 307         case CHIP_JUNIPER: return "AMD JUNIPER";
 308         case CHIP_CYPRESS: return "AMD CYPRESS";
 309         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 310         case CHIP_PALM: return "AMD PALM";
 311         case CHIP_SUMO: return "AMD SUMO";
 312         case CHIP_SUMO2: return "AMD SUMO2";
 313         case CHIP_BARTS: return "AMD BARTS";
 314         case CHIP_TURKS: return "AMD TURKS";
 315         case CHIP_CAICOS: return "AMD CAICOS";
 316         case CHIP_CAYMAN: return "AMD CAYMAN";
 317         default: return "AMD unknown";
 318         }
 319 }
 320
 321 static const char* r600_get_name(struct pipe_screen* pscreen)
 322 {
 323         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 324         enum radeon_family family = r600_get_family(rscreen->radeon);
 325
 326         return r600_get_family_name(family);
 327 }
 328
 329 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 330 {
 331         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 332         enum radeon_family family = r600_get_family(rscreen->radeon);
 333
 334         switch (param) {
 335         /* Supported features (boolean caps). */
 336         case PIPE_CAP_NPOT_TEXTURES:
 337         case PIPE_CAP_TWO_SIDED_STENCIL:
 338         case PIPE_CAP_GLSL:
 339         case PIPE_CAP_DUAL_SOURCE_BLEND:
 340         case PIPE_CAP_ANISOTROPIC_FILTER:
 341         case PIPE_CAP_POINT_SPRITE:
 342         case PIPE_CAP_OCCLUSION_QUERY:
 343         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 344         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 345         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 346         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 347         case PIPE_CAP_TEXTURE_SWIZZLE:
 348         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 349         case PIPE_CAP_DEPTH_CLAMP:
 350         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 351         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 352         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 353         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 354         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 355         case PIPE_CAP_SM3:
 356         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 357         case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
 358                 return 1;
 359
 360         /* Supported except the original R600. */
 361         case PIPE_CAP_INDEP_BLEND_ENABLE:
 362         case PIPE_CAP_INDEP_BLEND_FUNC:
 363                 /* R600 doesn't support per-MRT blends */
 364                 return family == CHIP_R600 ? 0 : 1;
 365
 366         /* Supported on Evergreen. */
 367         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 368                 return family >= CHIP_CEDAR ? 1 : 0;
 369
 370         /* Unsupported features. */
 371         case PIPE_CAP_STREAM_OUTPUT:
 372         case PIPE_CAP_PRIMITIVE_RESTART:
 373         case PIPE_CAP_TGSI_INSTANCEID:
 374         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 375         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 376                 return 0;
 377
 378         case PIPE_CAP_ARRAY_TEXTURES:
 379                 /* fix once the CS checker upstream is fixed */
 380                 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE);
 381
 382         /* Texturing. */
 383         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 384         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 385         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 386                 if (family >= CHIP_CEDAR)
 387                         return 15;
 388                 else
 389                         return 14;
 390         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 391         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 392                 return 16;
 393         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 394                 return 32;
 395
 396         /* Render targets. */
 397         case PIPE_CAP_MAX_RENDER_TARGETS:
 398                 /* FIXME some r6xx are buggy and can only do 4 */
 399                 return 8;
 400
 401         /* Timer queries, present when the clock frequency is non zero. */
 402         case PIPE_CAP_TIMER_QUERY:
 403                 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
 404
 405         default:
 406                 R600_ERR("r600: unknown param %d\n", param);
 407                 return 0;
 408         }
 409 }
 410
 411 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 412 {
 413         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 414         enum radeon_family family = r600_get_family(rscreen->radeon);
 415
 416         switch (param) {
 417         case PIPE_CAP_MAX_LINE_WIDTH:
 418         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 419         case PIPE_CAP_MAX_POINT_WIDTH:
 420         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 421                 if (family >= CHIP_CEDAR)
 422                         return 16384.0f;
 423                 else
 424                         return 8192.0f;
 425         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 426                 return 16.0f;
 427         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 428                 return 16.0f;
 429         default:
 430                 R600_ERR("r600: unsupported paramf %d\n", param);
 431                 return 0.0f;
 432         }
 433 }
 434
 435 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 436 {
 437         switch(shader)
 438         {
 439         case PIPE_SHADER_FRAGMENT:
 440         case PIPE_SHADER_VERTEX:
 441                 break;
 442         case PIPE_SHADER_GEOMETRY:
 443                 /* TODO: support and enable geometry programs */
 444                 return 0;
 445         default:
 446                 /* TODO: support tessellation on Evergreen */
 447                 return 0;
 448         }
 449
 450         /* TODO: all these should be fixed, since r600 surely supports much more! */
 451         switch (param) {
 452         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 453         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 454         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 455         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 456                 return 16384;
 457         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 458                 return 8; /* FIXME */
 459         case PIPE_SHADER_CAP_MAX_INPUTS:
 460                 if(shader == PIPE_SHADER_FRAGMENT)
 461                         return 34;
 462                 else
 463                         return 32;
 464         case PIPE_SHADER_CAP_MAX_TEMPS:
 465                 return 256; /* Max native temporaries. */
 466         case PIPE_SHADER_CAP_MAX_ADDRS:
 467                 /* FIXME Isn't this equal to TEMPS? */
 468                 return 1; /* Max native address registers */
 469         case PIPE_SHADER_CAP_MAX_CONSTS:
 470                 return R600_MAX_CONST_BUFFER_SIZE;
 471         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 472                 return R600_MAX_CONST_BUFFERS;
 473         case PIPE_SHADER_CAP_MAX_PREDS:
 474                 return 0; /* FIXME */
 475         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 476                 return 1;
 477         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 478         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 479         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 480         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 481                 return 1;
 482         case PIPE_SHADER_CAP_SUBROUTINES:
 483                 return 0;
 484         default:
 485                 return 0;
 486         }
 487 }
 488
 489 static int r600_get_video_param(struct pipe_screen *screen,
 490                                 enum pipe_video_profile profile,
 491                                 enum pipe_video_cap param)
 492 {
 493         switch (param) {
 494         case PIPE_VIDEO_CAP_SUPPORTED:
 495                 return vl_profile_supported(screen, profile);
 496         case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 497                 return 1;
 498         case PIPE_VIDEO_CAP_MAX_WIDTH:
 499         case PIPE_VIDEO_CAP_MAX_HEIGHT:
 500                 return vl_video_buffer_max_size(screen);
 501         default:
 502                 return 0;
 503         }
 504 }
 505
 506 static void r600_destroy_screen(struct pipe_screen* pscreen)
 507 {
 508         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 509
 510         if (rscreen == NULL)
 511                 return;
 512
 513         radeon_decref(rscreen->radeon);
 514
 515         util_slab_destroy(&rscreen->pool_buffers);
 516         pipe_mutex_destroy(rscreen->mutex_num_contexts);
 517         FREE(rscreen);
 518 }
 519
 520 static void r600_fence_reference(struct pipe_screen *pscreen,
 521                                  struct pipe_fence_handle **ptr,
 522                                  struct pipe_fence_handle *fence)
 523 {
 524         struct r600_fence **oldf = (struct r600_fence**)ptr;
 525         struct r600_fence *newf = (struct r600_fence*)fence;
 526
 527         if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
 528                 struct r600_pipe_context *ctx = (*oldf)->ctx;
 529                 LIST_ADDTAIL(&(*oldf)->head, &ctx->fences.pool);
 530         }
 531
 532         *ptr = fence;
 533 }
 534
 535 static boolean r600_fence_signalled(struct pipe_screen *pscreen,
 536                                     struct pipe_fence_handle *fence)
 537 {
 538         struct r600_fence *rfence = (struct r600_fence*)fence;
 539         struct r600_pipe_context *ctx = rfence->ctx;
 540
 541         return ctx->fences.data[rfence->index];
 542 }
 543
 544 static boolean r600_fence_finish(struct pipe_screen *pscreen,
 545                                  struct pipe_fence_handle *fence,
 546                                  uint64_t timeout)
 547 {
 548         struct r600_fence *rfence = (struct r600_fence*)fence;
 549         struct r600_pipe_context *ctx = rfence->ctx;
 550         int64_t start_time = 0;
 551         unsigned spins = 0;
 552
 553         if (timeout != PIPE_TIMEOUT_INFINITE) {
 554                 start_time = os_time_get();
 555
 556                 /* Convert to microseconds. */
 557                 timeout /= 1000;
 558         }
 559
 560         while (ctx->fences.data[rfence->index] == 0) {
 561                 if (++spins % 256)
 562                         continue;
 563 #ifdef PIPE_OS_UNIX
 564                 sched_yield();
 565 #else
 566                 os_time_sleep(10);
 567 #endif
 568                 if (timeout != PIPE_TIMEOUT_INFINITE &&
 569                     os_time_get() - start_time >= timeout) {
 570                         return FALSE;
 571                 }
 572         }
 573
 574         return TRUE;
 575 }
 576
 577 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 578 {
 579         struct r600_screen *rscreen;
 580
 581         rscreen = CALLOC_STRUCT(r600_screen);
 582         if (rscreen == NULL) {
 583                 return NULL;
 584         }
 585
 586         rscreen->radeon = radeon;
 587         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 588         rscreen->screen.destroy = r600_destroy_screen;
 589         rscreen->screen.get_name = r600_get_name;
 590         rscreen->screen.get_vendor = r600_get_vendor;
 591         rscreen->screen.get_param = r600_get_param;
 592         rscreen->screen.get_shader_param = r600_get_shader_param;
 593         rscreen->screen.get_paramf = r600_get_paramf;
 594         rscreen->screen.get_video_param = r600_get_video_param;
 595         if (r600_get_family_class(radeon) >= EVERGREEN) {
 596                 rscreen->screen.is_format_supported = evergreen_is_format_supported;
 597         } else {
 598                 rscreen->screen.is_format_supported = r600_is_format_supported;
 599         }
 600         rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 601         rscreen->screen.context_create = r600_create_context;
 602         rscreen->screen.fence_reference = r600_fence_reference;
 603         rscreen->screen.fence_signalled = r600_fence_signalled;
 604         rscreen->screen.fence_finish = r600_fence_finish;
 605         r600_init_screen_resource_functions(&rscreen->screen);
 606
 607         rscreen->tiling_info = r600_get_tiling_info(radeon);
 608         util_format_s3tc_init();
 609
 610         util_slab_create(&rscreen->pool_buffers,
 611                          sizeof(struct r600_resource_buffer), 64,
 612                          UTIL_SLAB_SINGLETHREADED);
 613
 614         pipe_mutex_init(rscreen->mutex_num_contexts);
 615
 616         return &rscreen->screen;
 617 }