2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <pipe/p_defines.h>
26 #include <pipe/p_state.h>
27 #include <pipe/p_context.h>
28 #include <tgsi/tgsi_scan.h>
29 #include <tgsi/tgsi_parse.h>
30 #include <tgsi/tgsi_util.h>
31 #include <util/u_blitter.h>
32 #include <util/u_double_list.h>
33 #include <util/u_transfer.h>
34 #include <util/u_surface.h>
35 #include <util/u_pack_color.h>
36 #include <util/u_memory.h>
37 #include <util/u_inlines.h>
38 #include <util/u_upload_mgr.h>
39 #include <pipebuffer/pb_buffer.h>
42 #include "r600_resource.h"
43 #include "r600_shader.h"
44 #include "r600_pipe.h"
45 #include "r600_state_inlines.h"
46 #include "r600_video_context.h"
51 static void r600_flush(struct pipe_context
*ctx
, unsigned flags
,
52 struct pipe_fence_handle
**fence
)
54 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)ctx
;
60 if (!rctx
->ctx
.pm4_cdwords
)
63 u_upload_flush(rctx
->upload_vb
);
64 u_upload_flush(rctx
->upload_ib
);
67 sprintf(dname
, "gallium-%08d.bof", dc
);
69 r600_context_dump_bof(&rctx
->ctx
, dname
);
70 R600_ERR("dumped %s\n", dname
);
74 r600_context_flush(&rctx
->ctx
);
77 static void r600_destroy_context(struct pipe_context
*context
)
79 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)context
;
81 r600_context_fini(&rctx
->ctx
);
82 for (int i
= 0; i
< R600_PIPE_NSTATES
; i
++) {
83 free(rctx
->states
[i
]);
86 util_blitter_destroy(rctx
->blitter
);
88 u_upload_destroy(rctx
->upload_vb
);
89 u_upload_destroy(rctx
->upload_ib
);
91 if (rctx
->tran
.translate_cache
)
92 translate_cache_destroy(rctx
->tran
.translate_cache
);
94 FREE(rctx
->ps_resource
);
95 FREE(rctx
->vs_resource
);
99 static struct pipe_context
*r600_create_context(struct pipe_screen
*screen
, void *priv
)
101 struct r600_pipe_context
*rctx
= CALLOC_STRUCT(r600_pipe_context
);
102 struct r600_screen
* rscreen
= (struct r600_screen
*)screen
;
103 enum chip_class
class;
107 rctx
->context
.winsys
= rscreen
->screen
.winsys
;
108 rctx
->context
.screen
= screen
;
109 rctx
->context
.priv
= priv
;
110 rctx
->context
.destroy
= r600_destroy_context
;
111 rctx
->context
.flush
= r600_flush
;
113 /* Easy accessing of screen/winsys. */
114 rctx
->screen
= rscreen
;
115 rctx
->radeon
= rscreen
->radeon
;
116 rctx
->family
= r600_get_family(rctx
->radeon
);
118 r600_init_blit_functions(rctx
);
119 r600_init_query_functions(rctx
);
120 r600_init_context_resource_functions(rctx
);
122 switch (r600_get_family(rctx
->radeon
)) {
135 rctx
->context
.draw_vbo
= r600_draw_vbo
;
136 r600_init_state_functions(rctx
);
137 if (r600_context_init(&rctx
->ctx
, rctx
->radeon
)) {
138 r600_destroy_context(&rctx
->context
);
141 r600_init_config(rctx
);
148 rctx
->context
.draw_vbo
= evergreen_draw
;
149 evergreen_init_state_functions(rctx
);
150 if (evergreen_context_init(&rctx
->ctx
, rctx
->radeon
)) {
151 r600_destroy_context(&rctx
->context
);
154 evergreen_init_config(rctx
);
157 R600_ERR("unsupported family %d\n", r600_get_family(rctx
->radeon
));
158 r600_destroy_context(&rctx
->context
);
162 rctx
->upload_ib
= u_upload_create(&rctx
->context
, 32 * 1024, 16,
163 PIPE_BIND_INDEX_BUFFER
);
164 if (rctx
->upload_ib
== NULL
) {
165 r600_destroy_context(&rctx
->context
);
169 rctx
->upload_vb
= u_upload_create(&rctx
->context
, 128 * 1024, 16,
170 PIPE_BIND_VERTEX_BUFFER
);
171 if (rctx
->upload_vb
== NULL
) {
172 r600_destroy_context(&rctx
->context
);
176 rctx
->blitter
= util_blitter_create(&rctx
->context
);
177 if (rctx
->blitter
== NULL
) {
182 rctx
->tran
.translate_cache
= translate_cache_create();
183 if (rctx
->tran
.translate_cache
== NULL
) {
188 rctx
->vs_resource
= CALLOC(R600_RESOURCE_ARRAY_SIZE
, sizeof(struct r600_pipe_state
));
189 if (!rctx
->vs_resource
) {
194 rctx
->ps_resource
= CALLOC(R600_RESOURCE_ARRAY_SIZE
, sizeof(struct r600_pipe_state
));
195 if (!rctx
->ps_resource
) {
200 class = r600_get_family_class(rctx
->radeon
);
201 if (class == R600
|| class == R700
)
202 rctx
->custom_dsa_flush
= r600_create_db_flush_dsa(rctx
);
204 rctx
->custom_dsa_flush
= evergreen_create_db_flush_dsa(rctx
);
206 r600_blit_uncompress_depth_ptr
= r600_blit_uncompress_depth
;
208 return &rctx
->context
;
214 static const char* r600_get_vendor(struct pipe_screen
* pscreen
)
219 static const char *r600_get_family_name(enum radeon_family family
)
222 case CHIP_R600
: return "R600";
223 case CHIP_RV610
: return "RV610";
224 case CHIP_RV630
: return "RV630";
225 case CHIP_RV670
: return "RV670";
226 case CHIP_RV620
: return "RV620";
227 case CHIP_RV635
: return "RV635";
228 case CHIP_RS780
: return "RS780";
229 case CHIP_RS880
: return "RS880";
230 case CHIP_RV770
: return "RV770";
231 case CHIP_RV730
: return "RV730";
232 case CHIP_RV710
: return "RV710";
233 case CHIP_RV740
: return "RV740";
234 case CHIP_CEDAR
: return "CEDAR";
235 case CHIP_REDWOOD
: return "REDWOOD";
236 case CHIP_JUNIPER
: return "JUNIPER";
237 case CHIP_CYPRESS
: return "CYPRESS";
238 case CHIP_HEMLOCK
: return "HEMLOCK";
239 default: return "unknown";
243 static const char* r600_get_name(struct pipe_screen
* pscreen
)
245 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
246 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
248 return r600_get_family_name(family
);
251 static int r600_get_param(struct pipe_screen
* pscreen
, enum pipe_cap param
)
254 /* Supported features (boolean caps). */
255 case PIPE_CAP_NPOT_TEXTURES
:
256 case PIPE_CAP_TWO_SIDED_STENCIL
:
258 case PIPE_CAP_DUAL_SOURCE_BLEND
:
259 case PIPE_CAP_ANISOTROPIC_FILTER
:
260 case PIPE_CAP_POINT_SPRITE
:
261 case PIPE_CAP_OCCLUSION_QUERY
:
262 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
263 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
264 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
265 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
267 case PIPE_CAP_TEXTURE_SWIZZLE
:
268 case PIPE_CAP_INDEP_BLEND_ENABLE
:
269 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
:
270 case PIPE_CAP_DEPTH_CLAMP
:
271 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
274 /* Unsupported features (boolean caps). */
275 case PIPE_CAP_TIMER_QUERY
:
276 case PIPE_CAP_STREAM_OUTPUT
:
277 case PIPE_CAP_INDEP_BLEND_FUNC
: /* FIXME allow this */
281 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
282 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
283 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
285 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
286 /* FIXME allow this once infrastructure is there */
288 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
289 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
292 /* Render targets. */
293 case PIPE_CAP_MAX_RENDER_TARGETS
:
294 /* FIXME some r6xx are buggy and can only do 4 */
297 /* Fragment coordinate conventions. */
298 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
299 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
301 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
302 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
306 R600_ERR("r600: unknown param %d\n", param
);
311 static float r600_get_paramf(struct pipe_screen
* pscreen
, enum pipe_cap param
)
314 case PIPE_CAP_MAX_LINE_WIDTH
:
315 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
316 case PIPE_CAP_MAX_POINT_WIDTH
:
317 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
319 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
321 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
324 R600_ERR("r600: unsupported paramf %d\n", param
);
329 static int r600_get_shader_param(struct pipe_screen
* pscreen
, unsigned shader
, enum pipe_shader_cap param
)
333 case PIPE_SHADER_FRAGMENT
:
334 case PIPE_SHADER_VERTEX
:
336 case PIPE_SHADER_GEOMETRY
:
337 /* TODO: support and enable geometry programs */
340 /* TODO: support tessellation on Evergreen */
344 /* TODO: all these should be fixed, since r600 surely supports much more! */
346 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
347 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
348 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
349 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
351 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
352 return 8; /* FIXME */
353 case PIPE_SHADER_CAP_MAX_INPUTS
:
354 if(shader
== PIPE_SHADER_FRAGMENT
)
358 case PIPE_SHADER_CAP_MAX_TEMPS
:
359 return 256; //max native temporaries
360 case PIPE_SHADER_CAP_MAX_ADDRS
:
361 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
362 case PIPE_SHADER_CAP_MAX_CONSTS
:
363 return 256; //max native parameters
364 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
366 case PIPE_SHADER_CAP_MAX_PREDS
:
367 return 0; /* FIXME */
368 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
375 static boolean
r600_is_format_supported(struct pipe_screen
* screen
,
376 enum pipe_format format
,
377 enum pipe_texture_target target
,
378 unsigned sample_count
,
383 if (target
>= PIPE_MAX_TEXTURE_TYPES
) {
384 R600_ERR("r600: unsupported texture type %d\n", target
);
389 if (sample_count
> 1)
392 if ((usage
& PIPE_BIND_SAMPLER_VIEW
) &&
393 r600_is_sampler_format_supported(format
)) {
394 retval
|= PIPE_BIND_SAMPLER_VIEW
;
397 if ((usage
& (PIPE_BIND_RENDER_TARGET
|
398 PIPE_BIND_DISPLAY_TARGET
|
400 PIPE_BIND_SHARED
)) &&
401 r600_is_colorbuffer_format_supported(format
)) {
403 (PIPE_BIND_RENDER_TARGET
|
404 PIPE_BIND_DISPLAY_TARGET
|
409 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
410 r600_is_zs_format_supported(format
)) {
411 retval
|= PIPE_BIND_DEPTH_STENCIL
;
414 if ((usage
& PIPE_BIND_VERTEX_BUFFER
) &&
415 r600_is_vertex_format_supported(format
))
416 retval
|= PIPE_BIND_VERTEX_BUFFER
;
418 if (usage
& PIPE_BIND_TRANSFER_READ
)
419 retval
|= PIPE_BIND_TRANSFER_READ
;
420 if (usage
& PIPE_BIND_TRANSFER_WRITE
)
421 retval
|= PIPE_BIND_TRANSFER_WRITE
;
423 return retval
== usage
;
426 static void r600_destroy_screen(struct pipe_screen
* pscreen
)
428 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
436 struct pipe_screen
*r600_screen_create(struct radeon
*radeon
)
438 struct r600_screen
*rscreen
;
440 rscreen
= CALLOC_STRUCT(r600_screen
);
441 if (rscreen
== NULL
) {
445 rscreen
->radeon
= radeon
;
446 rscreen
->screen
.winsys
= (struct pipe_winsys
*)radeon
;
447 rscreen
->screen
.destroy
= r600_destroy_screen
;
448 rscreen
->screen
.get_name
= r600_get_name
;
449 rscreen
->screen
.get_vendor
= r600_get_vendor
;
450 rscreen
->screen
.get_param
= r600_get_param
;
451 rscreen
->screen
.get_shader_param
= r600_get_shader_param
;
452 rscreen
->screen
.get_paramf
= r600_get_paramf
;
453 rscreen
->screen
.is_format_supported
= r600_is_format_supported
;
454 rscreen
->screen
.context_create
= r600_create_context
;
455 rscreen
->screen
.video_context_create
= r600_video_create
;
456 r600_init_screen_texture_functions(&rscreen
->screen
);
457 r600_init_screen_resource_functions(&rscreen
->screen
);
459 rscreen
->tiling_info
= r600_get_tiling_info(radeon
);
461 return &rscreen
->screen
;