2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <pipe/p_defines.h>
26 #include <pipe/p_state.h>
27 #include <pipe/p_context.h>
28 #include <tgsi/tgsi_scan.h>
29 #include <tgsi/tgsi_parse.h>
30 #include <tgsi/tgsi_util.h>
31 #include <util/u_blitter.h>
32 #include <util/u_double_list.h>
33 #include "util/u_format.h"
34 #include <util/u_format_s3tc.h>
35 #include <util/u_transfer.h>
36 #include <util/u_surface.h>
37 #include <util/u_pack_color.h>
38 #include <util/u_memory.h>
39 #include <util/u_inlines.h>
40 #include "util/u_upload_mgr.h"
41 #include "os/os_time.h"
42 #include <pipebuffer/pb_buffer.h>
45 #include "r600_resource.h"
46 #include "r600_shader.h"
47 #include "r600_pipe.h"
48 #include "r600_state_inlines.h"
49 #include "r600_video_context.h"
54 static struct r600_fence
*r600_create_fence(struct r600_pipe_context
*ctx
)
56 struct r600_fence
*fence
= NULL
;
58 if (!ctx
->fences
.bo
) {
59 /* Create the shared buffer object */
60 ctx
->fences
.bo
= r600_bo(ctx
->radeon
, 4096, 0, 0, 0);
61 if (!ctx
->fences
.bo
) {
62 R600_ERR("r600: failed to create bo for fence objects\n");
65 ctx
->fences
.data
= r600_bo_map(ctx
->radeon
, ctx
->fences
.bo
, PB_USAGE_UNSYNCHRONIZED
, NULL
);
68 if (!LIST_IS_EMPTY(&ctx
->fences
.pool
)) {
69 struct r600_fence
*entry
;
71 /* Try to find a freed fence that has been signalled */
72 LIST_FOR_EACH_ENTRY(entry
, &ctx
->fences
.pool
, head
) {
73 if (ctx
->fences
.data
[entry
->index
] != 0) {
74 LIST_DELINIT(&entry
->head
);
82 /* Allocate a new fence */
83 struct r600_fence_block
*block
;
86 if ((ctx
->fences
.next_index
+ 1) >= 1024) {
87 R600_ERR("r600: too many concurrent fences\n");
91 index
= ctx
->fences
.next_index
++;
93 if (!(index
% FENCE_BLOCK_SIZE
)) {
94 /* Allocate a new block */
95 block
= CALLOC_STRUCT(r600_fence_block
);
99 LIST_ADD(&block
->head
, &ctx
->fences
.blocks
);
101 block
= LIST_ENTRY(struct r600_fence_block
, ctx
->fences
.blocks
.next
, head
);
104 fence
= &block
->fences
[index
% FENCE_BLOCK_SIZE
];
106 fence
->index
= index
;
109 pipe_reference_init(&fence
->reference
, 1);
111 ctx
->fences
.data
[fence
->index
] = 0;
112 r600_context_emit_fence(&ctx
->ctx
, ctx
->fences
.bo
, fence
->index
, 1);
116 static void r600_flush(struct pipe_context
*ctx
,
117 struct pipe_fence_handle
**fence
)
119 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)ctx
;
120 struct r600_fence
**rfence
= (struct r600_fence
**)fence
;
128 *rfence
= r600_create_fence(rctx
);
130 if (!rctx
->ctx
.pm4_cdwords
)
134 sprintf(dname
, "gallium-%08d.bof", dc
);
136 r600_context_dump_bof(&rctx
->ctx
, dname
);
137 R600_ERR("dumped %s\n", dname
);
141 r600_context_flush(&rctx
->ctx
);
143 /* XXX This shouldn't be really necessary, but removing it breaks some tests.
144 * Needless buffer reallocations may significantly increase memory consumption,
145 * so getting rid of this call is important. */
146 u_upload_flush(rctx
->vbuf_mgr
->uploader
);
149 static void r600_update_num_contexts(struct r600_screen
*rscreen
, int diff
)
151 pipe_mutex_lock(rscreen
->mutex_num_contexts
);
153 rscreen
->num_contexts
++;
155 if (rscreen
->num_contexts
> 1)
156 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
157 UTIL_SLAB_MULTITHREADED
);
159 rscreen
->num_contexts
--;
161 if (rscreen
->num_contexts
<= 1)
162 util_slab_set_thread_safety(&rscreen
->pool_buffers
,
163 UTIL_SLAB_SINGLETHREADED
);
165 pipe_mutex_unlock(rscreen
->mutex_num_contexts
);
168 static void r600_destroy_context(struct pipe_context
*context
)
170 struct r600_pipe_context
*rctx
= (struct r600_pipe_context
*)context
;
172 rctx
->context
.delete_depth_stencil_alpha_state(&rctx
->context
, rctx
->custom_dsa_flush
);
173 util_unreference_framebuffer_state(&rctx
->framebuffer
);
175 r600_context_fini(&rctx
->ctx
);
177 util_blitter_destroy(rctx
->blitter
);
179 for (int i
= 0; i
< R600_PIPE_NSTATES
; i
++) {
180 free(rctx
->states
[i
]);
183 u_vbuf_mgr_destroy(rctx
->vbuf_mgr
);
184 util_slab_destroy(&rctx
->pool_transfers
);
186 if (rctx
->fences
.bo
) {
187 struct r600_fence_block
*entry
, *tmp
;
189 LIST_FOR_EACH_ENTRY_SAFE(entry
, tmp
, &rctx
->fences
.blocks
, head
) {
190 LIST_DEL(&entry
->head
);
194 r600_bo_unmap(rctx
->radeon
, rctx
->fences
.bo
);
195 r600_bo_reference(rctx
->radeon
, &rctx
->fences
.bo
, NULL
);
198 r600_update_num_contexts(rctx
->screen
, -1);
203 static struct pipe_context
*r600_create_context(struct pipe_screen
*screen
, void *priv
)
205 struct r600_pipe_context
*rctx
= CALLOC_STRUCT(r600_pipe_context
);
206 struct r600_screen
* rscreen
= (struct r600_screen
*)screen
;
207 enum chip_class
class;
212 r600_update_num_contexts(rscreen
, 1);
214 rctx
->context
.winsys
= rscreen
->screen
.winsys
;
215 rctx
->context
.screen
= screen
;
216 rctx
->context
.priv
= priv
;
217 rctx
->context
.destroy
= r600_destroy_context
;
218 rctx
->context
.flush
= r600_flush
;
220 /* Easy accessing of screen/winsys. */
221 rctx
->screen
= rscreen
;
222 rctx
->radeon
= rscreen
->radeon
;
223 rctx
->family
= r600_get_family(rctx
->radeon
);
225 rctx
->fences
.bo
= NULL
;
226 rctx
->fences
.data
= NULL
;
227 rctx
->fences
.next_index
= 0;
228 LIST_INITHEAD(&rctx
->fences
.pool
);
229 LIST_INITHEAD(&rctx
->fences
.blocks
);
231 r600_init_blit_functions(rctx
);
232 r600_init_query_functions(rctx
);
233 r600_init_context_resource_functions(rctx
);
234 r600_init_surface_functions(rctx
);
235 rctx
->context
.draw_vbo
= r600_draw_vbo
;
237 switch (r600_get_family(rctx
->radeon
)) {
250 r600_init_state_functions(rctx
);
251 if (r600_context_init(&rctx
->ctx
, rctx
->radeon
)) {
252 r600_destroy_context(&rctx
->context
);
255 r600_init_config(rctx
);
266 evergreen_init_state_functions(rctx
);
267 if (evergreen_context_init(&rctx
->ctx
, rctx
->radeon
)) {
268 r600_destroy_context(&rctx
->context
);
271 evergreen_init_config(rctx
);
274 R600_ERR("unsupported family %d\n", r600_get_family(rctx
->radeon
));
275 r600_destroy_context(&rctx
->context
);
279 util_slab_create(&rctx
->pool_transfers
,
280 sizeof(struct pipe_transfer
), 64,
281 UTIL_SLAB_SINGLETHREADED
);
283 rctx
->vbuf_mgr
= u_vbuf_mgr_create(&rctx
->context
, 1024 * 1024, 256,
284 PIPE_BIND_VERTEX_BUFFER
|
285 PIPE_BIND_INDEX_BUFFER
|
286 PIPE_BIND_CONSTANT_BUFFER
,
287 U_VERTEX_FETCH_DWORD_ALIGNED
);
288 if (!rctx
->vbuf_mgr
) {
289 r600_destroy_context(&rctx
->context
);
293 rctx
->blitter
= util_blitter_create(&rctx
->context
);
294 if (rctx
->blitter
== NULL
) {
295 r600_destroy_context(&rctx
->context
);
299 class = r600_get_family_class(rctx
->radeon
);
300 if (class == R600
|| class == R700
)
301 rctx
->custom_dsa_flush
= r600_create_db_flush_dsa(rctx
);
303 rctx
->custom_dsa_flush
= evergreen_create_db_flush_dsa(rctx
);
305 return &rctx
->context
;
311 static const char* r600_get_vendor(struct pipe_screen
* pscreen
)
316 static const char *r600_get_family_name(enum radeon_family family
)
319 case CHIP_R600
: return "AMD R600";
320 case CHIP_RV610
: return "AMD RV610";
321 case CHIP_RV630
: return "AMD RV630";
322 case CHIP_RV670
: return "AMD RV670";
323 case CHIP_RV620
: return "AMD RV620";
324 case CHIP_RV635
: return "AMD RV635";
325 case CHIP_RS780
: return "AMD RS780";
326 case CHIP_RS880
: return "AMD RS880";
327 case CHIP_RV770
: return "AMD RV770";
328 case CHIP_RV730
: return "AMD RV730";
329 case CHIP_RV710
: return "AMD RV710";
330 case CHIP_RV740
: return "AMD RV740";
331 case CHIP_CEDAR
: return "AMD CEDAR";
332 case CHIP_REDWOOD
: return "AMD REDWOOD";
333 case CHIP_JUNIPER
: return "AMD JUNIPER";
334 case CHIP_CYPRESS
: return "AMD CYPRESS";
335 case CHIP_HEMLOCK
: return "AMD HEMLOCK";
336 case CHIP_PALM
: return "AMD PALM";
337 case CHIP_BARTS
: return "AMD BARTS";
338 case CHIP_TURKS
: return "AMD TURKS";
339 case CHIP_CAICOS
: return "AMD CAICOS";
340 default: return "AMD unknown";
344 static const char* r600_get_name(struct pipe_screen
* pscreen
)
346 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
347 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
349 return r600_get_family_name(family
);
352 static int r600_get_param(struct pipe_screen
* pscreen
, enum pipe_cap param
)
354 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
355 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
358 /* Supported features (boolean caps). */
359 case PIPE_CAP_NPOT_TEXTURES
:
360 case PIPE_CAP_TWO_SIDED_STENCIL
:
362 case PIPE_CAP_DUAL_SOURCE_BLEND
:
363 case PIPE_CAP_ANISOTROPIC_FILTER
:
364 case PIPE_CAP_POINT_SPRITE
:
365 case PIPE_CAP_OCCLUSION_QUERY
:
366 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
367 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
368 case PIPE_CAP_TEXTURE_MIRROR_REPEAT
:
369 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
371 case PIPE_CAP_TEXTURE_SWIZZLE
:
372 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE
:
373 case PIPE_CAP_DEPTH_CLAMP
:
374 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
375 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
376 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
377 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
378 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
381 /* Supported except the original R600. */
382 case PIPE_CAP_INDEP_BLEND_ENABLE
:
383 case PIPE_CAP_INDEP_BLEND_FUNC
:
384 /* R600 doesn't support per-MRT blends */
385 return family
== CHIP_R600
? 0 : 1;
387 /* Supported on Evergreen. */
388 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
389 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
390 return family
>= CHIP_CEDAR
? 1 : 0;
392 /* Unsupported features. */
393 case PIPE_CAP_STREAM_OUTPUT
:
394 case PIPE_CAP_PRIMITIVE_RESTART
:
395 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL
:
396 case PIPE_CAP_TGSI_INSTANCEID
:
397 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
398 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
401 case PIPE_CAP_ARRAY_TEXTURES
:
402 /* fix once the CS checker upstream is fixed */
403 return debug_get_bool_option("R600_ARRAY_TEXTURE", FALSE
);
406 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
407 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
408 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
409 if (family
>= CHIP_CEDAR
)
413 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
:
414 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
416 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
419 /* Render targets. */
420 case PIPE_CAP_MAX_RENDER_TARGETS
:
421 /* FIXME some r6xx are buggy and can only do 4 */
424 /* Timer queries, present when the clock frequency is non zero. */
425 case PIPE_CAP_TIMER_QUERY
:
426 return r600_get_clock_crystal_freq(rscreen
->radeon
) != 0;
429 R600_ERR("r600: unknown param %d\n", param
);
434 static float r600_get_paramf(struct pipe_screen
* pscreen
, enum pipe_cap param
)
436 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
437 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
440 case PIPE_CAP_MAX_LINE_WIDTH
:
441 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
442 case PIPE_CAP_MAX_POINT_WIDTH
:
443 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
444 if (family
>= CHIP_CEDAR
)
448 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
450 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
453 R600_ERR("r600: unsupported paramf %d\n", param
);
458 static int r600_get_shader_param(struct pipe_screen
* pscreen
, unsigned shader
, enum pipe_shader_cap param
)
462 case PIPE_SHADER_FRAGMENT
:
463 case PIPE_SHADER_VERTEX
:
465 case PIPE_SHADER_GEOMETRY
:
466 /* TODO: support and enable geometry programs */
469 /* TODO: support tessellation on Evergreen */
473 /* TODO: all these should be fixed, since r600 surely supports much more! */
475 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
476 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
477 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
478 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
480 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
481 return 8; /* FIXME */
482 case PIPE_SHADER_CAP_MAX_INPUTS
:
483 if(shader
== PIPE_SHADER_FRAGMENT
)
487 case PIPE_SHADER_CAP_MAX_TEMPS
:
488 return 256; /* Max native temporaries. */
489 case PIPE_SHADER_CAP_MAX_ADDRS
:
490 /* FIXME Isn't this equal to TEMPS? */
491 return 1; /* Max native address registers */
492 case PIPE_SHADER_CAP_MAX_CONSTS
:
493 return R600_MAX_CONST_BUFFER_SIZE
;
494 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
495 return R600_MAX_CONST_BUFFERS
;
496 case PIPE_SHADER_CAP_MAX_PREDS
:
497 return 0; /* FIXME */
498 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
500 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
501 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
502 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
503 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
505 case PIPE_SHADER_CAP_SUBROUTINES
:
512 static boolean
r600_is_format_supported(struct pipe_screen
* screen
,
513 enum pipe_format format
,
514 enum pipe_texture_target target
,
515 unsigned sample_count
,
519 if (target
>= PIPE_MAX_TEXTURE_TYPES
) {
520 R600_ERR("r600: unsupported texture type %d\n", target
);
524 if (!util_format_is_supported(format
, usage
))
528 if (sample_count
> 1)
531 if ((usage
& PIPE_BIND_SAMPLER_VIEW
) &&
532 r600_is_sampler_format_supported(screen
, format
)) {
533 retval
|= PIPE_BIND_SAMPLER_VIEW
;
536 if ((usage
& (PIPE_BIND_RENDER_TARGET
|
537 PIPE_BIND_DISPLAY_TARGET
|
539 PIPE_BIND_SHARED
)) &&
540 r600_is_colorbuffer_format_supported(format
)) {
542 (PIPE_BIND_RENDER_TARGET
|
543 PIPE_BIND_DISPLAY_TARGET
|
548 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
549 r600_is_zs_format_supported(format
)) {
550 retval
|= PIPE_BIND_DEPTH_STENCIL
;
553 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
554 struct r600_screen
*rscreen
= (struct r600_screen
*)screen
;
555 enum radeon_family family
= r600_get_family(rscreen
->radeon
);
557 if (r600_is_vertex_format_supported(format
, family
)) {
558 retval
|= PIPE_BIND_VERTEX_BUFFER
;
562 if (usage
& PIPE_BIND_TRANSFER_READ
)
563 retval
|= PIPE_BIND_TRANSFER_READ
;
564 if (usage
& PIPE_BIND_TRANSFER_WRITE
)
565 retval
|= PIPE_BIND_TRANSFER_WRITE
;
567 return retval
== usage
;
570 static void r600_destroy_screen(struct pipe_screen
* pscreen
)
572 struct r600_screen
*rscreen
= (struct r600_screen
*)pscreen
;
577 radeon_decref(rscreen
->radeon
);
579 util_slab_destroy(&rscreen
->pool_buffers
);
580 pipe_mutex_destroy(rscreen
->mutex_num_contexts
);
584 static void r600_fence_reference(struct pipe_screen
*pscreen
,
585 struct pipe_fence_handle
**ptr
,
586 struct pipe_fence_handle
*fence
)
588 struct r600_fence
**oldf
= (struct r600_fence
**)ptr
;
589 struct r600_fence
*newf
= (struct r600_fence
*)fence
;
591 if (pipe_reference(&(*oldf
)->reference
, &newf
->reference
)) {
592 struct r600_pipe_context
*ctx
= (*oldf
)->ctx
;
593 LIST_ADDTAIL(&(*oldf
)->head
, &ctx
->fences
.pool
);
599 static boolean
r600_fence_signalled(struct pipe_screen
*pscreen
,
600 struct pipe_fence_handle
*fence
)
602 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
603 struct r600_pipe_context
*ctx
= rfence
->ctx
;
605 return ctx
->fences
.data
[rfence
->index
];
608 static boolean
r600_fence_finish(struct pipe_screen
*pscreen
,
609 struct pipe_fence_handle
*fence
,
612 struct r600_fence
*rfence
= (struct r600_fence
*)fence
;
613 struct r600_pipe_context
*ctx
= rfence
->ctx
;
614 int64_t start_time
= 0;
617 if (timeout
!= PIPE_TIMEOUT_INFINITE
) {
618 start_time
= os_time_get();
620 /* Convert to microseconds. */
624 while (ctx
->fences
.data
[rfence
->index
] == 0) {
632 if (timeout
!= PIPE_TIMEOUT_INFINITE
&&
633 os_time_get() - start_time
>= timeout
) {
641 struct pipe_screen
*r600_screen_create(struct radeon
*radeon
)
643 struct r600_screen
*rscreen
;
645 rscreen
= CALLOC_STRUCT(r600_screen
);
646 if (rscreen
== NULL
) {
650 rscreen
->radeon
= radeon
;
651 rscreen
->screen
.winsys
= (struct pipe_winsys
*)radeon
;
652 rscreen
->screen
.destroy
= r600_destroy_screen
;
653 rscreen
->screen
.get_name
= r600_get_name
;
654 rscreen
->screen
.get_vendor
= r600_get_vendor
;
655 rscreen
->screen
.get_param
= r600_get_param
;
656 rscreen
->screen
.get_shader_param
= r600_get_shader_param
;
657 rscreen
->screen
.get_paramf
= r600_get_paramf
;
658 rscreen
->screen
.is_format_supported
= r600_is_format_supported
;
659 rscreen
->screen
.context_create
= r600_create_context
;
660 rscreen
->screen
.video_context_create
= r600_video_create
;
661 rscreen
->screen
.fence_reference
= r600_fence_reference
;
662 rscreen
->screen
.fence_signalled
= r600_fence_signalled
;
663 rscreen
->screen
.fence_finish
= r600_fence_finish
;
664 r600_init_screen_resource_functions(&rscreen
->screen
);
666 rscreen
->tiling_info
= r600_get_tiling_info(radeon
);
667 util_format_s3tc_init();
669 util_slab_create(&rscreen
->pool_buffers
,
670 sizeof(struct r600_resource_buffer
), 64,
671 UTIL_SLAB_SINGLETHREADED
);
673 pipe_mutex_init(rscreen
->mutex_num_contexts
);
675 return &rscreen
->screen
;