src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_transfer.h>
  34 #include <util/u_surface.h>
  35 #include <util/u_pack_color.h>
  36 #include <util/u_memory.h>
  37 #include <util/u_inlines.h>
  38 #include <util/u_upload_mgr.h>
  39 #include <util/u_index_modify.h>
  40 #include <pipebuffer/pb_buffer.h>
  41 #include "r600.h"
  42 #include "r600d.h"
  43 #include "r700_sq.h"
  44 #include "r600_resource.h"
  45 #include "r600_shader.h"
  46 #include "r600_pipe.h"
  47 #include "r600_state_inlines.h"
  48
  49 /*
  50  * pipe_context
  51  */
  52 static void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx)
  53 {
  54         struct pipe_depth_stencil_alpha_state dsa;
  55         struct r600_pipe_state *rstate;
  56         boolean quirk = false;
  57
  58         if (rctx->family == CHIP_RV610 || rctx->family == CHIP_RV630 ||
  59                 rctx->family == CHIP_RV620 || rctx->family == CHIP_RV635)
  60                 quirk = true;
  61
  62         memset(&dsa, 0, sizeof(dsa));
  63
  64         if (quirk) {
  65                 dsa.depth.enabled = 1;
  66                 dsa.depth.func = PIPE_FUNC_LEQUAL;
  67                 dsa.stencil[0].enabled = 1;
  68                 dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
  69                 dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_KEEP;
  70                 dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_INCR;
  71                 dsa.stencil[0].writemask = 0xff;
  72         }
  73
  74         rstate = rctx->context.create_depth_stencil_alpha_state(&rctx->context, &dsa);
  75         r600_pipe_state_add_reg(rstate,
  76                                 R_02880C_DB_SHADER_CONTROL,
  77                                 0x0,
  78                                 S_02880C_DUAL_EXPORT_ENABLE(1), NULL);
  79         r600_pipe_state_add_reg(rstate,
  80                                 R_028D0C_DB_RENDER_CONTROL,
  81                                 S_028D0C_DEPTH_COPY_ENABLE(1) |
  82                                 S_028D0C_STENCIL_COPY_ENABLE(1) |
  83                                 S_028D0C_COPY_CENTROID(1),
  84                                 S_028D0C_DEPTH_COPY_ENABLE(1) |
  85                                 S_028D0C_STENCIL_COPY_ENABLE(1) |
  86                                 S_028D0C_COPY_CENTROID(1), NULL);
  87         return rstate;
  88 }
  89
  90 static void r600_flush2(struct pipe_context *ctx, unsigned flags,
  91                         struct pipe_fence_handle **fence)
  92 {
  93         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  94 #if 0
  95         static int dc = 0;
  96         char dname[256];
  97 #endif
  98
  99         if (!rctx->ctx.pm4_cdwords)
 100                 return;
 101
 102         u_upload_flush(rctx->upload_vb);
 103         u_upload_flush(rctx->upload_ib);
 104
 105 #if 0
 106         sprintf(dname, "gallium-%08d.bof", dc);
 107         if (dc < 20) {
 108                 r600_context_dump_bof(&rctx->ctx, dname);
 109                 R600_ERR("dumped %s\n", dname);
 110         }
 111         dc++;
 112 #endif
 113         r600_context_flush(&rctx->ctx);
 114 }
 115
 116 static void r600_destroy_context(struct pipe_context *context)
 117 {
 118         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
 119
 120         r600_context_fini(&rctx->ctx);
 121         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
 122                 free(rctx->states[i]);
 123         }
 124
 125         u_upload_destroy(rctx->upload_vb);
 126         u_upload_destroy(rctx->upload_ib);
 127
 128         FREE(rctx);
 129 }
 130
 131 static struct pipe_context *r600_create_context2(struct pipe_screen *screen, void *priv)
 132 {
 133         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 134         struct r600_screen* rscreen = (struct r600_screen *)screen;
 135
 136         if (rctx == NULL)
 137                 return NULL;
 138         rctx->context.winsys = rscreen->screen.winsys;
 139         rctx->context.screen = screen;
 140         rctx->context.priv = priv;
 141         rctx->context.destroy = r600_destroy_context;
 142         rctx->context.flush = r600_flush2;
 143
 144         /* Easy accessing of screen/winsys. */
 145         rctx->screen = rscreen;
 146         rctx->radeon = rscreen->radeon;
 147         rctx->family = r600_get_family(rctx->radeon);
 148
 149         r600_init_blit_functions2(rctx);
 150         r600_init_query_functions2(rctx);
 151         r600_init_context_resource_functions2(rctx);
 152
 153         switch (r600_get_family(rctx->radeon)) {
 154         case CHIP_R600:
 155         case CHIP_RV610:
 156         case CHIP_RV630:
 157         case CHIP_RV670:
 158         case CHIP_RV620:
 159         case CHIP_RV635:
 160         case CHIP_RS780:
 161         case CHIP_RS880:
 162         case CHIP_RV770:
 163         case CHIP_RV730:
 164         case CHIP_RV710:
 165         case CHIP_RV740:
 166                 rctx->context.draw_vbo = r600_draw_vbo2;
 167                 r600_init_state_functions2(rctx);
 168                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 169                         r600_destroy_context(&rctx->context);
 170                         return NULL;
 171                 }
 172                 r600_init_config2(rctx);
 173                 break;
 174         case CHIP_CEDAR:
 175         case CHIP_REDWOOD:
 176         case CHIP_JUNIPER:
 177         case CHIP_CYPRESS:
 178         case CHIP_HEMLOCK:
 179                 rctx->context.draw_vbo = evergreen_draw;
 180                 evergreen_init_state_functions2(rctx);
 181                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 182                         r600_destroy_context(&rctx->context);
 183                         return NULL;
 184                 }
 185                 evergreen_init_config2(rctx);
 186                 break;
 187         default:
 188                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 189                 r600_destroy_context(&rctx->context);
 190                 return NULL;
 191         }
 192
 193         rctx->upload_ib = u_upload_create(&rctx->context, 32 * 1024, 16,
 194                                           PIPE_BIND_INDEX_BUFFER);
 195         if (rctx->upload_ib == NULL) {
 196                 r600_destroy_context(&rctx->context);
 197                 return NULL;
 198         }
 199
 200         rctx->upload_vb = u_upload_create(&rctx->context, 128 * 1024, 16,
 201                                           PIPE_BIND_VERTEX_BUFFER);
 202         if (rctx->upload_vb == NULL) {
 203                 r600_destroy_context(&rctx->context);
 204                 return NULL;
 205         }
 206
 207         rctx->blitter = util_blitter_create(&rctx->context);
 208         if (rctx->blitter == NULL) {
 209                 FREE(rctx);
 210                 return NULL;
 211         }
 212
 213         LIST_INITHEAD(&rctx->query_list);
 214         rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 215
 216         r600_blit_uncompress_depth_ptr = r600_blit_uncompress_depth2;
 217
 218         return &rctx->context;
 219 }
 220
 221 /*
 222  * pipe_screen
 223  */
 224 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 225 {
 226         return "X.Org";
 227 }
 228
 229 static const char* r600_get_name(struct pipe_screen* pscreen)
 230 {
 231         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 232         enum radeon_family family = r600_get_family(rscreen->radeon);
 233
 234         if (family >= CHIP_R600 && family < CHIP_RV770)
 235                 return "R600 (HD2XXX,HD3XXX)";
 236         else if (family < CHIP_CEDAR)
 237                 return "R700 (HD4XXX)";
 238         else
 239                 return "EVERGREEN";
 240 }
 241
 242 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 243 {
 244         switch (param) {
 245         /* Supported features (boolean caps). */
 246         case PIPE_CAP_NPOT_TEXTURES:
 247         case PIPE_CAP_TWO_SIDED_STENCIL:
 248         case PIPE_CAP_GLSL:
 249         case PIPE_CAP_DUAL_SOURCE_BLEND:
 250         case PIPE_CAP_ANISOTROPIC_FILTER:
 251         case PIPE_CAP_POINT_SPRITE:
 252         case PIPE_CAP_OCCLUSION_QUERY:
 253         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 254         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 255         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 256         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 257         case PIPE_CAP_SM3:
 258         case PIPE_CAP_TEXTURE_SWIZZLE:
 259         case PIPE_CAP_INDEP_BLEND_ENABLE:
 260         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 261         case PIPE_CAP_DEPTH_CLAMP:
 262                 return 1;
 263
 264         /* Unsupported features (boolean caps). */
 265         case PIPE_CAP_TIMER_QUERY:
 266         case PIPE_CAP_STREAM_OUTPUT:
 267         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 268                 return 0;
 269
 270         /* Texturing. */
 271         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 272         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 273         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 274                 return 14;
 275         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 276                 /* FIXME allow this once infrastructure is there */
 277                 return 0;
 278         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 279         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 280                 return 16;
 281
 282         /* Render targets. */
 283         case PIPE_CAP_MAX_RENDER_TARGETS:
 284                 /* FIXME some r6xx are buggy and can only do 4 */
 285                 return 8;
 286
 287         /* Fragment coordinate conventions. */
 288         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 289         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 290                 return 1;
 291         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 292         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 293                 return 0;
 294
 295         default:
 296                 R600_ERR("r600: unknown param %d\n", param);
 297                 return 0;
 298         }
 299 }
 300
 301 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 302 {
 303         switch (param) {
 304         case PIPE_CAP_MAX_LINE_WIDTH:
 305         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 306         case PIPE_CAP_MAX_POINT_WIDTH:
 307         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 308                 return 8192.0f;
 309         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 310                 return 16.0f;
 311         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 312                 return 16.0f;
 313         default:
 314                 R600_ERR("r600: unsupported paramf %d\n", param);
 315                 return 0.0f;
 316         }
 317 }
 318
 319 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 320 {
 321         switch(shader)
 322         {
 323         case PIPE_SHADER_FRAGMENT:
 324         case PIPE_SHADER_VERTEX:
 325                 break;
 326         case PIPE_SHADER_GEOMETRY:
 327                 /* TODO: support and enable geometry programs */
 328                 return 0;
 329         default:
 330                 /* TODO: support tessellation on Evergreen */
 331                 return 0;
 332         }
 333
 334         /* TODO: all these should be fixed, since r600 surely supports much more! */
 335         switch (param) {
 336         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 337         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 338         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 339         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 340                 return 16384;
 341         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 342                 return 8; /* FIXME */
 343         case PIPE_SHADER_CAP_MAX_INPUTS:
 344                 if(shader == PIPE_SHADER_FRAGMENT)
 345                         return 10;
 346                 else
 347                         return 16;
 348         case PIPE_SHADER_CAP_MAX_TEMPS:
 349                 return 256; //max native temporaries
 350         case PIPE_SHADER_CAP_MAX_ADDRS:
 351                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 352         case PIPE_SHADER_CAP_MAX_CONSTS:
 353                 return 256; //max native parameters
 354         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 355                 return 1;
 356         case PIPE_SHADER_CAP_MAX_PREDS:
 357                 return 0; /* FIXME */
 358         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 359                 return 1;
 360         default:
 361                 return 0;
 362         }
 363 }
 364
 365 static boolean r600_is_format_supported(struct pipe_screen* screen,
 366                                         enum pipe_format format,
 367                                         enum pipe_texture_target target,
 368                                         unsigned sample_count,
 369                                         unsigned usage,
 370                                         unsigned geom_flags)
 371 {
 372         unsigned retval = 0;
 373         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 374                 R600_ERR("r600: unsupported texture type %d\n", target);
 375                 return FALSE;
 376         }
 377
 378         /* Multisample */
 379         if (sample_count > 1)
 380                 return FALSE;
 381
 382         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 383             r600_is_sampler_format_supported(format)) {
 384                 retval |= PIPE_BIND_SAMPLER_VIEW;
 385         }
 386
 387         if ((usage & (PIPE_BIND_RENDER_TARGET |
 388                   PIPE_BIND_DISPLAY_TARGET |
 389                   PIPE_BIND_SCANOUT |
 390                   PIPE_BIND_SHARED)) &&
 391             r600_is_colorbuffer_format_supported(format)) {
 392                 retval |= usage &
 393                         (PIPE_BIND_RENDER_TARGET |
 394                          PIPE_BIND_DISPLAY_TARGET |
 395                          PIPE_BIND_SCANOUT |
 396                          PIPE_BIND_SHARED);
 397         }
 398
 399         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 400             r600_is_zs_format_supported(format)) {
 401                 retval |= PIPE_BIND_DEPTH_STENCIL;
 402         }
 403
 404         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 405             r600_is_vertex_format_supported(format))
 406                 retval |= PIPE_BIND_VERTEX_BUFFER;
 407
 408         if (usage & PIPE_BIND_TRANSFER_READ)
 409                 retval |= PIPE_BIND_TRANSFER_READ;
 410         if (usage & PIPE_BIND_TRANSFER_WRITE)
 411                 retval |= PIPE_BIND_TRANSFER_WRITE;
 412
 413         return retval == usage;
 414 }
 415
 416 static void r600_destroy_screen(struct pipe_screen* pscreen)
 417 {
 418         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 419
 420         if (rscreen == NULL)
 421                 return;
 422         FREE(rscreen);
 423 }
 424
 425
 426 struct pipe_screen *r600_screen_create2(struct radeon *radeon)
 427 {
 428         struct r600_screen *rscreen;
 429
 430         rscreen = CALLOC_STRUCT(r600_screen);
 431         if (rscreen == NULL) {
 432                 return NULL;
 433         }
 434
 435         rscreen->radeon = radeon;
 436         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 437         rscreen->screen.destroy = r600_destroy_screen;
 438         rscreen->screen.get_name = r600_get_name;
 439         rscreen->screen.get_vendor = r600_get_vendor;
 440         rscreen->screen.get_param = r600_get_param;
 441         rscreen->screen.get_shader_param = r600_get_shader_param;
 442         rscreen->screen.get_paramf = r600_get_paramf;
 443         rscreen->screen.is_format_supported = r600_is_format_supported;
 444         rscreen->screen.context_create = r600_create_context2;
 445         r600_init_screen_texture_functions(&rscreen->screen);
 446         r600_init_screen_resource_functions(&rscreen->screen);
 447
 448         return &rscreen->screen;
 449 }