r600g: Remove unnecessary headers.
[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include <stdio.h>
24 #include <errno.h>
25 #include <pipe/p_defines.h>
26 #include <pipe/p_state.h>
27 #include <pipe/p_context.h>
28 #include <tgsi/tgsi_scan.h>
29 #include <tgsi/tgsi_parse.h>
30 #include <tgsi/tgsi_util.h>
31 #include <util/u_blitter.h>
32 #include <util/u_double_list.h>
33 #include <util/u_transfer.h>
34 #include <util/u_surface.h>
35 #include <util/u_pack_color.h>
36 #include <util/u_memory.h>
37 #include <util/u_inlines.h>
38 #include <util/u_upload_mgr.h>
39 #include <pipebuffer/pb_buffer.h>
40 #include "r600.h"
41 #include "r600d.h"
42 #include "r600_resource.h"
43 #include "r600_shader.h"
44 #include "r600_pipe.h"
45 #include "r600_state_inlines.h"
46
47 /*
48 * pipe_context
49 */
50 static void r600_flush(struct pipe_context *ctx, unsigned flags,
51 struct pipe_fence_handle **fence)
52 {
53 struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
54 #if 0
55 static int dc = 0;
56 char dname[256];
57 #endif
58
59 if (!rctx->ctx.pm4_cdwords)
60 return;
61
62 u_upload_flush(rctx->upload_vb);
63 u_upload_flush(rctx->upload_ib);
64
65 #if 0
66 sprintf(dname, "gallium-%08d.bof", dc);
67 if (dc < 20) {
68 r600_context_dump_bof(&rctx->ctx, dname);
69 R600_ERR("dumped %s\n", dname);
70 }
71 dc++;
72 #endif
73 r600_context_flush(&rctx->ctx);
74 }
75
76 static void r600_destroy_context(struct pipe_context *context)
77 {
78 struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
79
80 r600_context_fini(&rctx->ctx);
81 for (int i = 0; i < R600_PIPE_NSTATES; i++) {
82 free(rctx->states[i]);
83 }
84
85 u_upload_destroy(rctx->upload_vb);
86 u_upload_destroy(rctx->upload_ib);
87
88 FREE(rctx);
89 }
90
91 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
92 {
93 struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
94 struct r600_screen* rscreen = (struct r600_screen *)screen;
95 enum chip_class class;
96
97 if (rctx == NULL)
98 return NULL;
99 rctx->context.winsys = rscreen->screen.winsys;
100 rctx->context.screen = screen;
101 rctx->context.priv = priv;
102 rctx->context.destroy = r600_destroy_context;
103 rctx->context.flush = r600_flush;
104
105 /* Easy accessing of screen/winsys. */
106 rctx->screen = rscreen;
107 rctx->radeon = rscreen->radeon;
108 rctx->family = r600_get_family(rctx->radeon);
109
110 r600_init_blit_functions(rctx);
111 r600_init_query_functions(rctx);
112 r600_init_context_resource_functions(rctx);
113
114 switch (r600_get_family(rctx->radeon)) {
115 case CHIP_R600:
116 case CHIP_RV610:
117 case CHIP_RV630:
118 case CHIP_RV670:
119 case CHIP_RV620:
120 case CHIP_RV635:
121 case CHIP_RS780:
122 case CHIP_RS880:
123 case CHIP_RV770:
124 case CHIP_RV730:
125 case CHIP_RV710:
126 case CHIP_RV740:
127 rctx->context.draw_vbo = r600_draw_vbo;
128 r600_init_state_functions(rctx);
129 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
130 r600_destroy_context(&rctx->context);
131 return NULL;
132 }
133 r600_init_config(rctx);
134 break;
135 case CHIP_CEDAR:
136 case CHIP_REDWOOD:
137 case CHIP_JUNIPER:
138 case CHIP_CYPRESS:
139 case CHIP_HEMLOCK:
140 rctx->context.draw_vbo = evergreen_draw;
141 evergreen_init_state_functions(rctx);
142 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
143 r600_destroy_context(&rctx->context);
144 return NULL;
145 }
146 evergreen_init_config(rctx);
147 break;
148 default:
149 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
150 r600_destroy_context(&rctx->context);
151 return NULL;
152 }
153
154 rctx->upload_ib = u_upload_create(&rctx->context, 32 * 1024, 16,
155 PIPE_BIND_INDEX_BUFFER);
156 if (rctx->upload_ib == NULL) {
157 r600_destroy_context(&rctx->context);
158 return NULL;
159 }
160
161 rctx->upload_vb = u_upload_create(&rctx->context, 128 * 1024, 16,
162 PIPE_BIND_VERTEX_BUFFER);
163 if (rctx->upload_vb == NULL) {
164 r600_destroy_context(&rctx->context);
165 return NULL;
166 }
167
168 rctx->blitter = util_blitter_create(&rctx->context);
169 if (rctx->blitter == NULL) {
170 FREE(rctx);
171 return NULL;
172 }
173
174 class = r600_get_family_class(rctx->radeon);
175 if (class == R600 || class == R700)
176 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
177 else
178 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
179
180 r600_blit_uncompress_depth_ptr = r600_blit_uncompress_depth;
181
182 return &rctx->context;
183 }
184
185 /*
186 * pipe_screen
187 */
188 static const char* r600_get_vendor(struct pipe_screen* pscreen)
189 {
190 return "X.Org";
191 }
192
193 static const char *r600_get_family_name(enum radeon_family family)
194 {
195 switch(family) {
196 case CHIP_R600: return "R600";
197 case CHIP_RV610: return "RV610";
198 case CHIP_RV630: return "RV630";
199 case CHIP_RV670: return "RV670";
200 case CHIP_RV620: return "RV620";
201 case CHIP_RV635: return "RV635";
202 case CHIP_RS780: return "RS780";
203 case CHIP_RS880: return "RS880";
204 case CHIP_RV770: return "RV770";
205 case CHIP_RV730: return "RV730";
206 case CHIP_RV710: return "RV710";
207 case CHIP_RV740: return "RV740";
208 case CHIP_CEDAR: return "CEDAR";
209 case CHIP_REDWOOD: return "REDWOOD";
210 case CHIP_JUNIPER: return "JUNIPER";
211 case CHIP_CYPRESS: return "CYPRESS";
212 case CHIP_HEMLOCK: return "HEMLOCK";
213 default: return "unknown";
214 }
215 }
216
217 static const char* r600_get_name(struct pipe_screen* pscreen)
218 {
219 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
220 enum radeon_family family = r600_get_family(rscreen->radeon);
221
222 return r600_get_family_name(family);
223 }
224
225 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
226 {
227 switch (param) {
228 /* Supported features (boolean caps). */
229 case PIPE_CAP_NPOT_TEXTURES:
230 case PIPE_CAP_TWO_SIDED_STENCIL:
231 case PIPE_CAP_GLSL:
232 case PIPE_CAP_DUAL_SOURCE_BLEND:
233 case PIPE_CAP_ANISOTROPIC_FILTER:
234 case PIPE_CAP_POINT_SPRITE:
235 case PIPE_CAP_OCCLUSION_QUERY:
236 case PIPE_CAP_TEXTURE_SHADOW_MAP:
237 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
238 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
239 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
240 case PIPE_CAP_SM3:
241 case PIPE_CAP_TEXTURE_SWIZZLE:
242 case PIPE_CAP_INDEP_BLEND_ENABLE:
243 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
244 case PIPE_CAP_DEPTH_CLAMP:
245 return 1;
246
247 /* Unsupported features (boolean caps). */
248 case PIPE_CAP_TIMER_QUERY:
249 case PIPE_CAP_STREAM_OUTPUT:
250 case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
251 return 0;
252
253 /* Texturing. */
254 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
255 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
256 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
257 return 14;
258 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
259 /* FIXME allow this once infrastructure is there */
260 return 0;
261 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
262 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
263 return 16;
264
265 /* Render targets. */
266 case PIPE_CAP_MAX_RENDER_TARGETS:
267 /* FIXME some r6xx are buggy and can only do 4 */
268 return 8;
269
270 /* Fragment coordinate conventions. */
271 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
272 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
273 return 1;
274 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
275 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
276 return 0;
277
278 default:
279 R600_ERR("r600: unknown param %d\n", param);
280 return 0;
281 }
282 }
283
284 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
285 {
286 switch (param) {
287 case PIPE_CAP_MAX_LINE_WIDTH:
288 case PIPE_CAP_MAX_LINE_WIDTH_AA:
289 case PIPE_CAP_MAX_POINT_WIDTH:
290 case PIPE_CAP_MAX_POINT_WIDTH_AA:
291 return 8192.0f;
292 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
293 return 16.0f;
294 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
295 return 16.0f;
296 default:
297 R600_ERR("r600: unsupported paramf %d\n", param);
298 return 0.0f;
299 }
300 }
301
302 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
303 {
304 switch(shader)
305 {
306 case PIPE_SHADER_FRAGMENT:
307 case PIPE_SHADER_VERTEX:
308 break;
309 case PIPE_SHADER_GEOMETRY:
310 /* TODO: support and enable geometry programs */
311 return 0;
312 default:
313 /* TODO: support tessellation on Evergreen */
314 return 0;
315 }
316
317 /* TODO: all these should be fixed, since r600 surely supports much more! */
318 switch (param) {
319 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
320 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
321 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
322 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
323 return 16384;
324 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
325 return 8; /* FIXME */
326 case PIPE_SHADER_CAP_MAX_INPUTS:
327 if(shader == PIPE_SHADER_FRAGMENT)
328 return 10;
329 else
330 return 16;
331 case PIPE_SHADER_CAP_MAX_TEMPS:
332 return 256; //max native temporaries
333 case PIPE_SHADER_CAP_MAX_ADDRS:
334 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
335 case PIPE_SHADER_CAP_MAX_CONSTS:
336 return 256; //max native parameters
337 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
338 return 1;
339 case PIPE_SHADER_CAP_MAX_PREDS:
340 return 0; /* FIXME */
341 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
342 return 1;
343 default:
344 return 0;
345 }
346 }
347
348 static boolean r600_is_format_supported(struct pipe_screen* screen,
349 enum pipe_format format,
350 enum pipe_texture_target target,
351 unsigned sample_count,
352 unsigned usage,
353 unsigned geom_flags)
354 {
355 unsigned retval = 0;
356 if (target >= PIPE_MAX_TEXTURE_TYPES) {
357 R600_ERR("r600: unsupported texture type %d\n", target);
358 return FALSE;
359 }
360
361 /* Multisample */
362 if (sample_count > 1)
363 return FALSE;
364
365 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
366 r600_is_sampler_format_supported(format)) {
367 retval |= PIPE_BIND_SAMPLER_VIEW;
368 }
369
370 if ((usage & (PIPE_BIND_RENDER_TARGET |
371 PIPE_BIND_DISPLAY_TARGET |
372 PIPE_BIND_SCANOUT |
373 PIPE_BIND_SHARED)) &&
374 r600_is_colorbuffer_format_supported(format)) {
375 retval |= usage &
376 (PIPE_BIND_RENDER_TARGET |
377 PIPE_BIND_DISPLAY_TARGET |
378 PIPE_BIND_SCANOUT |
379 PIPE_BIND_SHARED);
380 }
381
382 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
383 r600_is_zs_format_supported(format)) {
384 retval |= PIPE_BIND_DEPTH_STENCIL;
385 }
386
387 if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
388 r600_is_vertex_format_supported(format))
389 retval |= PIPE_BIND_VERTEX_BUFFER;
390
391 if (usage & PIPE_BIND_TRANSFER_READ)
392 retval |= PIPE_BIND_TRANSFER_READ;
393 if (usage & PIPE_BIND_TRANSFER_WRITE)
394 retval |= PIPE_BIND_TRANSFER_WRITE;
395
396 return retval == usage;
397 }
398
399 static void r600_destroy_screen(struct pipe_screen* pscreen)
400 {
401 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
402
403 if (rscreen == NULL)
404 return;
405 FREE(rscreen);
406 }
407
408
409 struct pipe_screen *r600_screen_create(struct radeon *radeon)
410 {
411 struct r600_screen *rscreen;
412
413 rscreen = CALLOC_STRUCT(r600_screen);
414 if (rscreen == NULL) {
415 return NULL;
416 }
417
418 rscreen->radeon = radeon;
419 rscreen->screen.winsys = (struct pipe_winsys*)radeon;
420 rscreen->screen.destroy = r600_destroy_screen;
421 rscreen->screen.get_name = r600_get_name;
422 rscreen->screen.get_vendor = r600_get_vendor;
423 rscreen->screen.get_param = r600_get_param;
424 rscreen->screen.get_shader_param = r600_get_shader_param;
425 rscreen->screen.get_paramf = r600_get_paramf;
426 rscreen->screen.is_format_supported = r600_is_format_supported;
427 rscreen->screen.context_create = r600_create_context;
428 r600_init_screen_texture_functions(&rscreen->screen);
429 r600_init_screen_resource_functions(&rscreen->screen);
430
431 return &rscreen->screen;
432 }