src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_transfer.h>
  34 #include <util/u_surface.h>
  35 #include <util/u_pack_color.h>
  36 #include <util/u_memory.h>
  37 #include <util/u_inlines.h>
  38 #include <util/u_upload_mgr.h>
  39 #include <pipebuffer/pb_buffer.h>
  40 #include "r600.h"
  41 #include "r600d.h"
  42 #include "r600_resource.h"
  43 #include "r600_shader.h"
  44 #include "r600_pipe.h"
  45 #include "r600_state_inlines.h"
  46
  47 /*
  48  * pipe_context
  49  */
  50 static void r600_flush(struct pipe_context *ctx, unsigned flags,
  51                         struct pipe_fence_handle **fence)
  52 {
  53         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  54 #if 0
  55         static int dc = 0;
  56         char dname[256];
  57 #endif
  58
  59         if (!rctx->ctx.pm4_cdwords)
  60                 return;
  61
  62         u_upload_flush(rctx->upload_vb);
  63         u_upload_flush(rctx->upload_ib);
  64
  65 #if 0
  66         sprintf(dname, "gallium-%08d.bof", dc);
  67         if (dc < 20) {
  68                 r600_context_dump_bof(&rctx->ctx, dname);
  69                 R600_ERR("dumped %s\n", dname);
  70         }
  71         dc++;
  72 #endif
  73         r600_context_flush(&rctx->ctx);
  74 }
  75
  76 static void r600_destroy_context(struct pipe_context *context)
  77 {
  78         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
  79
  80         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
  81
  82         r600_context_fini(&rctx->ctx);
  83
  84         util_blitter_destroy(rctx->blitter);
  85
  86         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
  87                 free(rctx->states[i]);
  88         }
  89
  90         u_upload_destroy(rctx->upload_vb);
  91         u_upload_destroy(rctx->upload_ib);
  92
  93         if (rctx->tran.translate_cache)
  94                 translate_cache_destroy(rctx->tran.translate_cache);
  95
  96         FREE(rctx->ps_resource);
  97         FREE(rctx->vs_resource);
  98         FREE(rctx);
  99 }
 100
 101 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 102 {
 103         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 104         struct r600_screen* rscreen = (struct r600_screen *)screen;
 105         enum chip_class class;
 106
 107         if (rctx == NULL)
 108                 return NULL;
 109         rctx->context.winsys = rscreen->screen.winsys;
 110         rctx->context.screen = screen;
 111         rctx->context.priv = priv;
 112         rctx->context.destroy = r600_destroy_context;
 113         rctx->context.flush = r600_flush;
 114
 115         /* Easy accessing of screen/winsys. */
 116         rctx->screen = rscreen;
 117         rctx->radeon = rscreen->radeon;
 118         rctx->family = r600_get_family(rctx->radeon);
 119
 120         r600_init_blit_functions(rctx);
 121         r600_init_query_functions(rctx);
 122         r600_init_context_resource_functions(rctx);
 123
 124         switch (r600_get_family(rctx->radeon)) {
 125         case CHIP_R600:
 126         case CHIP_RV610:
 127         case CHIP_RV630:
 128         case CHIP_RV670:
 129         case CHIP_RV620:
 130         case CHIP_RV635:
 131         case CHIP_RS780:
 132         case CHIP_RS880:
 133         case CHIP_RV770:
 134         case CHIP_RV730:
 135         case CHIP_RV710:
 136         case CHIP_RV740:
 137                 rctx->context.draw_vbo = r600_draw_vbo;
 138                 r600_init_state_functions(rctx);
 139                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 140                         r600_destroy_context(&rctx->context);
 141                         return NULL;
 142                 }
 143                 r600_init_config(rctx);
 144                 break;
 145         case CHIP_CEDAR:
 146         case CHIP_REDWOOD:
 147         case CHIP_JUNIPER:
 148         case CHIP_CYPRESS:
 149         case CHIP_HEMLOCK:
 150                 rctx->context.draw_vbo = evergreen_draw;
 151                 evergreen_init_state_functions(rctx);
 152                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 153                         r600_destroy_context(&rctx->context);
 154                         return NULL;
 155                 }
 156                 evergreen_init_config(rctx);
 157                 break;
 158         default:
 159                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 160                 r600_destroy_context(&rctx->context);
 161                 return NULL;
 162         }
 163
 164         rctx->upload_ib = u_upload_create(&rctx->context, 32 * 1024, 16,
 165                                           PIPE_BIND_INDEX_BUFFER);
 166         if (rctx->upload_ib == NULL) {
 167                 r600_destroy_context(&rctx->context);
 168                 return NULL;
 169         }
 170
 171         rctx->upload_vb = u_upload_create(&rctx->context, 128 * 1024, 16,
 172                                           PIPE_BIND_VERTEX_BUFFER);
 173         if (rctx->upload_vb == NULL) {
 174                 r600_destroy_context(&rctx->context);
 175                 return NULL;
 176         }
 177
 178         rctx->blitter = util_blitter_create(&rctx->context);
 179         if (rctx->blitter == NULL) {
 180                 FREE(rctx);
 181                 return NULL;
 182         }
 183
 184         rctx->tran.translate_cache = translate_cache_create();
 185         if (rctx->tran.translate_cache == NULL) {
 186                 FREE(rctx);
 187                 return NULL;
 188         }
 189
 190         rctx->vs_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 191         if (!rctx->vs_resource) {
 192                 FREE(rctx);
 193                 return NULL;
 194         }
 195
 196         rctx->ps_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 197         if (!rctx->ps_resource) {
 198                 FREE(rctx);
 199                 return NULL;
 200         }
 201
 202         class = r600_get_family_class(rctx->radeon);
 203         if (class == R600 || class == R700)
 204                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 205         else
 206                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 207
 208         r600_blit_uncompress_depth_ptr = r600_blit_uncompress_depth;
 209
 210         return &rctx->context;
 211 }
 212
 213 /*
 214  * pipe_screen
 215  */
 216 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 217 {
 218         return "X.Org";
 219 }
 220
 221 static const char *r600_get_family_name(enum radeon_family family)
 222 {
 223         switch(family) {
 224         case CHIP_R600: return "AMD R600";
 225         case CHIP_RV610: return "AMD RV610";
 226         case CHIP_RV630: return "AMD RV630";
 227         case CHIP_RV670: return "AMD RV670";
 228         case CHIP_RV620: return "AMD RV620";
 229         case CHIP_RV635: return "AMD RV635";
 230         case CHIP_RS780: return "AMD RS780";
 231         case CHIP_RS880: return "AMD RS880";
 232         case CHIP_RV770: return "AMD RV770";
 233         case CHIP_RV730: return "AMD RV730";
 234         case CHIP_RV710: return "AMD RV710";
 235         case CHIP_RV740: return "AMD RV740";
 236         case CHIP_CEDAR: return "AMD CEDAR";
 237         case CHIP_REDWOOD: return "AMD REDWOOD";
 238         case CHIP_JUNIPER: return "AMD JUNIPER";
 239         case CHIP_CYPRESS: return "AMD CYPRESS";
 240         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 241         default: return "AMD unknown";
 242         }
 243 }
 244
 245 static const char* r600_get_name(struct pipe_screen* pscreen)
 246 {
 247         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 248         enum radeon_family family = r600_get_family(rscreen->radeon);
 249
 250         return r600_get_family_name(family);
 251 }
 252
 253 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 254 {
 255         switch (param) {
 256         /* Supported features (boolean caps). */
 257         case PIPE_CAP_NPOT_TEXTURES:
 258         case PIPE_CAP_TWO_SIDED_STENCIL:
 259         case PIPE_CAP_GLSL:
 260         case PIPE_CAP_DUAL_SOURCE_BLEND:
 261         case PIPE_CAP_ANISOTROPIC_FILTER:
 262         case PIPE_CAP_POINT_SPRITE:
 263         case PIPE_CAP_OCCLUSION_QUERY:
 264         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 265         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 266         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 267         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 268         case PIPE_CAP_SM3:
 269         case PIPE_CAP_TEXTURE_SWIZZLE:
 270         case PIPE_CAP_INDEP_BLEND_ENABLE:
 271         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 272         case PIPE_CAP_DEPTH_CLAMP:
 273         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 274                 return 1;
 275
 276         /* Unsupported features (boolean caps). */
 277         case PIPE_CAP_TIMER_QUERY:
 278         case PIPE_CAP_STREAM_OUTPUT:
 279         case PIPE_CAP_PRIMITIVE_RESTART:
 280         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 281                 return 0;
 282
 283         /* Texturing. */
 284         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 285         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 286         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 287                 return 14;
 288         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 289                 /* FIXME allow this once infrastructure is there */
 290                 return 16;
 291         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 292         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 293                 return 16;
 294
 295         /* Render targets. */
 296         case PIPE_CAP_MAX_RENDER_TARGETS:
 297                 /* FIXME some r6xx are buggy and can only do 4 */
 298                 return 8;
 299
 300         /* Fragment coordinate conventions. */
 301         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 302         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 303                 return 1;
 304         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 305         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 306                 return 0;
 307
 308         default:
 309                 R600_ERR("r600: unknown param %d\n", param);
 310                 return 0;
 311         }
 312 }
 313
 314 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 315 {
 316         switch (param) {
 317         case PIPE_CAP_MAX_LINE_WIDTH:
 318         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 319         case PIPE_CAP_MAX_POINT_WIDTH:
 320         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 321                 return 8192.0f;
 322         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 323                 return 16.0f;
 324         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 325                 return 16.0f;
 326         default:
 327                 R600_ERR("r600: unsupported paramf %d\n", param);
 328                 return 0.0f;
 329         }
 330 }
 331
 332 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 333 {
 334         switch(shader)
 335         {
 336         case PIPE_SHADER_FRAGMENT:
 337         case PIPE_SHADER_VERTEX:
 338                 break;
 339         case PIPE_SHADER_GEOMETRY:
 340                 /* TODO: support and enable geometry programs */
 341                 return 0;
 342         default:
 343                 /* TODO: support tessellation on Evergreen */
 344                 return 0;
 345         }
 346
 347         /* TODO: all these should be fixed, since r600 surely supports much more! */
 348         switch (param) {
 349         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 350         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 351         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 352         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 353                 return 16384;
 354         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 355                 return 8; /* FIXME */
 356         case PIPE_SHADER_CAP_MAX_INPUTS:
 357                 if(shader == PIPE_SHADER_FRAGMENT)
 358                         return 10;
 359                 else
 360                         return 16;
 361         case PIPE_SHADER_CAP_MAX_TEMPS:
 362                 return 256; //max native temporaries
 363         case PIPE_SHADER_CAP_MAX_ADDRS:
 364                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 365         case PIPE_SHADER_CAP_MAX_CONSTS:
 366                 return 256; //max native parameters
 367         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 368                 return 1;
 369         case PIPE_SHADER_CAP_MAX_PREDS:
 370                 return 0; /* FIXME */
 371         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 372                 return 1;
 373         default:
 374                 return 0;
 375         }
 376 }
 377
 378 static boolean r600_is_format_supported(struct pipe_screen* screen,
 379                                         enum pipe_format format,
 380                                         enum pipe_texture_target target,
 381                                         unsigned sample_count,
 382                                         unsigned usage,
 383                                         unsigned geom_flags)
 384 {
 385         unsigned retval = 0;
 386         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 387                 R600_ERR("r600: unsupported texture type %d\n", target);
 388                 return FALSE;
 389         }
 390
 391         /* Multisample */
 392         if (sample_count > 1)
 393                 return FALSE;
 394
 395         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 396             r600_is_sampler_format_supported(format)) {
 397                 retval |= PIPE_BIND_SAMPLER_VIEW;
 398         }
 399
 400         if ((usage & (PIPE_BIND_RENDER_TARGET |
 401                   PIPE_BIND_DISPLAY_TARGET |
 402                   PIPE_BIND_SCANOUT |
 403                   PIPE_BIND_SHARED)) &&
 404             r600_is_colorbuffer_format_supported(format)) {
 405                 retval |= usage &
 406                         (PIPE_BIND_RENDER_TARGET |
 407                          PIPE_BIND_DISPLAY_TARGET |
 408                          PIPE_BIND_SCANOUT |
 409                          PIPE_BIND_SHARED);
 410         }
 411
 412         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 413             r600_is_zs_format_supported(format)) {
 414                 retval |= PIPE_BIND_DEPTH_STENCIL;
 415         }
 416
 417         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 418             r600_is_vertex_format_supported(format))
 419                 retval |= PIPE_BIND_VERTEX_BUFFER;
 420
 421         if (usage & PIPE_BIND_TRANSFER_READ)
 422                 retval |= PIPE_BIND_TRANSFER_READ;
 423         if (usage & PIPE_BIND_TRANSFER_WRITE)
 424                 retval |= PIPE_BIND_TRANSFER_WRITE;
 425
 426         return retval == usage;
 427 }
 428
 429 static void r600_destroy_screen(struct pipe_screen* pscreen)
 430 {
 431         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 432
 433         if (rscreen == NULL)
 434                 return;
 435
 436         radeon_decref(rscreen->radeon);
 437
 438         FREE(rscreen);
 439 }
 440
 441
 442 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 443 {
 444         struct r600_screen *rscreen;
 445
 446         rscreen = CALLOC_STRUCT(r600_screen);
 447         if (rscreen == NULL) {
 448                 return NULL;
 449         }
 450
 451         rscreen->radeon = radeon;
 452         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 453         rscreen->screen.destroy = r600_destroy_screen;
 454         rscreen->screen.get_name = r600_get_name;
 455         rscreen->screen.get_vendor = r600_get_vendor;
 456         rscreen->screen.get_param = r600_get_param;
 457         rscreen->screen.get_shader_param = r600_get_shader_param;
 458         rscreen->screen.get_paramf = r600_get_paramf;
 459         rscreen->screen.is_format_supported = r600_is_format_supported;
 460         rscreen->screen.context_create = r600_create_context;
 461         r600_init_screen_texture_functions(&rscreen->screen);
 462         r600_init_screen_resource_functions(&rscreen->screen);
 463
 464         rscreen->tiling_info = r600_get_tiling_info(radeon);
 465
 466         return &rscreen->screen;
 467 }