Merge branch 'xa_branch'
[mesa.git] / src / gallium / drivers / r600 / r600_state_inlines.h
1 /*
2 * Copyright 2010 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #ifndef R600_STATE_INLINES_H
24 #define R600_STATE_INLINES_H
25
26 #include "util/u_format.h"
27 #include "r600d.h"
28 #include "r600_formats.h"
29
30 static INLINE uint32_t r600_translate_blend_function(int blend_func)
31 {
32 switch (blend_func) {
33 case PIPE_BLEND_ADD:
34 return V_028804_COMB_DST_PLUS_SRC;
35 case PIPE_BLEND_SUBTRACT:
36 return V_028804_COMB_SRC_MINUS_DST;
37 case PIPE_BLEND_REVERSE_SUBTRACT:
38 return V_028804_COMB_DST_MINUS_SRC;
39 case PIPE_BLEND_MIN:
40 return V_028804_COMB_MIN_DST_SRC;
41 case PIPE_BLEND_MAX:
42 return V_028804_COMB_MAX_DST_SRC;
43 default:
44 R600_ERR("Unknown blend function %d\n", blend_func);
45 assert(0);
46 break;
47 }
48 return 0;
49 }
50
51 static INLINE uint32_t r600_translate_blend_factor(int blend_fact)
52 {
53 switch (blend_fact) {
54 case PIPE_BLENDFACTOR_ONE:
55 return V_028804_BLEND_ONE;
56 case PIPE_BLENDFACTOR_SRC_COLOR:
57 return V_028804_BLEND_SRC_COLOR;
58 case PIPE_BLENDFACTOR_SRC_ALPHA:
59 return V_028804_BLEND_SRC_ALPHA;
60 case PIPE_BLENDFACTOR_DST_ALPHA:
61 return V_028804_BLEND_DST_ALPHA;
62 case PIPE_BLENDFACTOR_DST_COLOR:
63 return V_028804_BLEND_DST_COLOR;
64 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
65 return V_028804_BLEND_SRC_ALPHA_SATURATE;
66 case PIPE_BLENDFACTOR_CONST_COLOR:
67 return V_028804_BLEND_CONST_COLOR;
68 case PIPE_BLENDFACTOR_CONST_ALPHA:
69 return V_028804_BLEND_CONST_ALPHA;
70 case PIPE_BLENDFACTOR_ZERO:
71 return V_028804_BLEND_ZERO;
72 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
73 return V_028804_BLEND_ONE_MINUS_SRC_COLOR;
74 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
75 return V_028804_BLEND_ONE_MINUS_SRC_ALPHA;
76 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
77 return V_028804_BLEND_ONE_MINUS_DST_ALPHA;
78 case PIPE_BLENDFACTOR_INV_DST_COLOR:
79 return V_028804_BLEND_ONE_MINUS_DST_COLOR;
80 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
81 return V_028804_BLEND_ONE_MINUS_CONST_COLOR;
82 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
83 return V_028804_BLEND_ONE_MINUS_CONST_ALPHA;
84 case PIPE_BLENDFACTOR_SRC1_COLOR:
85 return V_028804_BLEND_SRC1_COLOR;
86 case PIPE_BLENDFACTOR_SRC1_ALPHA:
87 return V_028804_BLEND_SRC1_ALPHA;
88 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
89 return V_028804_BLEND_INV_SRC1_COLOR;
90 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
91 return V_028804_BLEND_INV_SRC1_ALPHA;
92 default:
93 R600_ERR("Bad blend factor %d not supported!\n", blend_fact);
94 assert(0);
95 break;
96 }
97 return 0;
98 }
99
100 static INLINE uint32_t r600_translate_stencil_op(int s_op)
101 {
102 switch (s_op) {
103 case PIPE_STENCIL_OP_KEEP:
104 return V_028800_STENCIL_KEEP;
105 case PIPE_STENCIL_OP_ZERO:
106 return V_028800_STENCIL_ZERO;
107 case PIPE_STENCIL_OP_REPLACE:
108 return V_028800_STENCIL_REPLACE;
109 case PIPE_STENCIL_OP_INCR:
110 return V_028800_STENCIL_INCR;
111 case PIPE_STENCIL_OP_DECR:
112 return V_028800_STENCIL_DECR;
113 case PIPE_STENCIL_OP_INCR_WRAP:
114 return V_028800_STENCIL_INCR_WRAP;
115 case PIPE_STENCIL_OP_DECR_WRAP:
116 return V_028800_STENCIL_DECR_WRAP;
117 case PIPE_STENCIL_OP_INVERT:
118 return V_028800_STENCIL_INVERT;
119 default:
120 R600_ERR("Unknown stencil op %d", s_op);
121 assert(0);
122 break;
123 }
124 return 0;
125 }
126
127 static INLINE uint32_t r600_translate_fill(uint32_t func)
128 {
129 switch(func) {
130 case PIPE_POLYGON_MODE_FILL:
131 return 2;
132 case PIPE_POLYGON_MODE_LINE:
133 return 1;
134 case PIPE_POLYGON_MODE_POINT:
135 return 0;
136 default:
137 assert(0);
138 return 0;
139 }
140 }
141
142 /* translates straight */
143 static INLINE uint32_t r600_translate_ds_func(int func)
144 {
145 return func;
146 }
147
148 static inline unsigned r600_tex_wrap(unsigned wrap)
149 {
150 switch (wrap) {
151 default:
152 case PIPE_TEX_WRAP_REPEAT:
153 return V_03C000_SQ_TEX_WRAP;
154 case PIPE_TEX_WRAP_CLAMP:
155 return V_03C000_SQ_TEX_CLAMP_HALF_BORDER;
156 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
157 return V_03C000_SQ_TEX_CLAMP_LAST_TEXEL;
158 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
159 return V_03C000_SQ_TEX_CLAMP_BORDER;
160 case PIPE_TEX_WRAP_MIRROR_REPEAT:
161 return V_03C000_SQ_TEX_MIRROR;
162 case PIPE_TEX_WRAP_MIRROR_CLAMP:
163 return V_03C000_SQ_TEX_MIRROR_ONCE_HALF_BORDER;
164 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
165 return V_03C000_SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
166 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
167 return V_03C000_SQ_TEX_MIRROR_ONCE_BORDER;
168 }
169 }
170
171 static inline unsigned r600_tex_filter(unsigned filter)
172 {
173 switch (filter) {
174 default:
175 case PIPE_TEX_FILTER_NEAREST:
176 return V_03C000_SQ_TEX_XY_FILTER_POINT;
177 case PIPE_TEX_FILTER_LINEAR:
178 return V_03C000_SQ_TEX_XY_FILTER_BILINEAR;
179 }
180 }
181
182 static inline unsigned r600_tex_mipfilter(unsigned filter)
183 {
184 switch (filter) {
185 case PIPE_TEX_MIPFILTER_NEAREST:
186 return V_03C000_SQ_TEX_Z_FILTER_POINT;
187 case PIPE_TEX_MIPFILTER_LINEAR:
188 return V_03C000_SQ_TEX_Z_FILTER_LINEAR;
189 default:
190 case PIPE_TEX_MIPFILTER_NONE:
191 return V_03C000_SQ_TEX_Z_FILTER_NONE;
192 }
193 }
194
195 static inline unsigned r600_tex_compare(unsigned compare)
196 {
197 switch (compare) {
198 default:
199 case PIPE_FUNC_NEVER:
200 return V_03C000_SQ_TEX_DEPTH_COMPARE_NEVER;
201 case PIPE_FUNC_LESS:
202 return V_03C000_SQ_TEX_DEPTH_COMPARE_LESS;
203 case PIPE_FUNC_EQUAL:
204 return V_03C000_SQ_TEX_DEPTH_COMPARE_EQUAL;
205 case PIPE_FUNC_LEQUAL:
206 return V_03C000_SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
207 case PIPE_FUNC_GREATER:
208 return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATER;
209 case PIPE_FUNC_NOTEQUAL:
210 return V_03C000_SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
211 case PIPE_FUNC_GEQUAL:
212 return V_03C000_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
213 case PIPE_FUNC_ALWAYS:
214 return V_03C000_SQ_TEX_DEPTH_COMPARE_ALWAYS;
215 }
216 }
217
218 static inline unsigned r600_tex_swizzle(unsigned swizzle)
219 {
220 switch (swizzle) {
221 case PIPE_SWIZZLE_RED:
222 return V_038010_SQ_SEL_X;
223 case PIPE_SWIZZLE_GREEN:
224 return V_038010_SQ_SEL_Y;
225 case PIPE_SWIZZLE_BLUE:
226 return V_038010_SQ_SEL_Z;
227 case PIPE_SWIZZLE_ALPHA:
228 return V_038010_SQ_SEL_W;
229 case PIPE_SWIZZLE_ZERO:
230 return V_038010_SQ_SEL_0;
231 default:
232 case PIPE_SWIZZLE_ONE:
233 return V_038010_SQ_SEL_1;
234 }
235 }
236
237 static inline unsigned r600_format_type(unsigned format_type)
238 {
239 switch (format_type) {
240 default:
241 case UTIL_FORMAT_TYPE_UNSIGNED:
242 return V_038010_SQ_FORMAT_COMP_UNSIGNED;
243 case UTIL_FORMAT_TYPE_SIGNED:
244 return V_038010_SQ_FORMAT_COMP_SIGNED;
245 case UTIL_FORMAT_TYPE_FIXED:
246 return V_038010_SQ_FORMAT_COMP_UNSIGNED_BIASED;
247 }
248 }
249
250 static inline unsigned r600_tex_dim(unsigned dim)
251 {
252 switch (dim) {
253 default:
254 case PIPE_TEXTURE_1D:
255 return V_038000_SQ_TEX_DIM_1D;
256 case PIPE_TEXTURE_1D_ARRAY:
257 return V_038000_SQ_TEX_DIM_1D_ARRAY;
258 case PIPE_TEXTURE_2D:
259 case PIPE_TEXTURE_RECT:
260 return V_038000_SQ_TEX_DIM_2D;
261 case PIPE_TEXTURE_2D_ARRAY:
262 return V_038000_SQ_TEX_DIM_2D_ARRAY;
263 case PIPE_TEXTURE_3D:
264 return V_038000_SQ_TEX_DIM_3D;
265 case PIPE_TEXTURE_CUBE:
266 return V_038000_SQ_TEX_DIM_CUBEMAP;
267 }
268 }
269
270 static inline uint32_t r600_translate_dbformat(enum pipe_format format)
271 {
272 switch (format) {
273 case PIPE_FORMAT_Z16_UNORM:
274 return V_028010_DEPTH_16;
275 case PIPE_FORMAT_Z24X8_UNORM:
276 return V_028010_DEPTH_X8_24;
277 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
278 return V_028010_DEPTH_8_24;
279 default:
280 return ~0;
281 }
282 }
283
284 static inline uint32_t r600_translate_colorswap(enum pipe_format format)
285 {
286 switch (format) {
287 /* 8-bit buffers. */
288 case PIPE_FORMAT_A8_UNORM:
289 return V_0280A0_SWAP_ALT_REV;
290 case PIPE_FORMAT_I8_UNORM:
291 case PIPE_FORMAT_L8_UNORM:
292 case PIPE_FORMAT_L8_SRGB:
293 case PIPE_FORMAT_R8_UNORM:
294 case PIPE_FORMAT_R8_SNORM:
295 return V_0280A0_SWAP_STD;
296
297 case PIPE_FORMAT_L4A4_UNORM:
298 return V_0280A0_SWAP_ALT;
299
300 /* 16-bit buffers. */
301 case PIPE_FORMAT_B5G6R5_UNORM:
302 return V_0280A0_SWAP_STD_REV;
303
304 case PIPE_FORMAT_B5G5R5A1_UNORM:
305 case PIPE_FORMAT_B5G5R5X1_UNORM:
306 return V_0280A0_SWAP_ALT;
307
308 case PIPE_FORMAT_B4G4R4A4_UNORM:
309 case PIPE_FORMAT_B4G4R4X4_UNORM:
310 return V_0280A0_SWAP_ALT;
311
312 case PIPE_FORMAT_Z16_UNORM:
313 return V_0280A0_SWAP_STD;
314
315 case PIPE_FORMAT_L8A8_UNORM:
316 case PIPE_FORMAT_L8A8_SRGB:
317 return V_0280A0_SWAP_ALT;
318 case PIPE_FORMAT_R8G8_UNORM:
319 return V_0280A0_SWAP_STD;
320
321 case PIPE_FORMAT_R16_UNORM:
322 case PIPE_FORMAT_R16_FLOAT:
323 return V_0280A0_SWAP_STD;
324
325 /* 32-bit buffers. */
326
327 case PIPE_FORMAT_A8B8G8R8_SRGB:
328 return V_0280A0_SWAP_STD_REV;
329 case PIPE_FORMAT_B8G8R8A8_SRGB:
330 return V_0280A0_SWAP_ALT;
331
332 case PIPE_FORMAT_B8G8R8A8_UNORM:
333 case PIPE_FORMAT_B8G8R8X8_UNORM:
334 return V_0280A0_SWAP_ALT;
335
336 case PIPE_FORMAT_A8R8G8B8_UNORM:
337 case PIPE_FORMAT_X8R8G8B8_UNORM:
338 return V_0280A0_SWAP_ALT_REV;
339 case PIPE_FORMAT_R8G8B8A8_SNORM:
340 case PIPE_FORMAT_R8G8B8A8_UNORM:
341 case PIPE_FORMAT_R8G8B8X8_UNORM:
342 return V_0280A0_SWAP_STD;
343
344 case PIPE_FORMAT_A8B8G8R8_UNORM:
345 case PIPE_FORMAT_X8B8G8R8_UNORM:
346 /* case PIPE_FORMAT_R8SG8SB8UX8U_NORM: */
347 return V_0280A0_SWAP_STD_REV;
348
349 case PIPE_FORMAT_Z24X8_UNORM:
350 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
351 return V_0280A0_SWAP_STD;
352
353 case PIPE_FORMAT_X8Z24_UNORM:
354 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
355 return V_0280A0_SWAP_STD;
356
357 case PIPE_FORMAT_R10G10B10A2_UNORM:
358 case PIPE_FORMAT_R10G10B10X2_SNORM:
359 case PIPE_FORMAT_R10SG10SB10SA2U_NORM:
360 return V_0280A0_SWAP_STD;
361
362 case PIPE_FORMAT_B10G10R10A2_UNORM:
363 return V_0280A0_SWAP_ALT;
364
365 case PIPE_FORMAT_R11G11B10_FLOAT:
366 case PIPE_FORMAT_R16G16_UNORM:
367 case PIPE_FORMAT_R16G16_FLOAT:
368 case PIPE_FORMAT_R32_FLOAT:
369 return V_0280A0_SWAP_STD;
370
371 /* 64-bit buffers. */
372 case PIPE_FORMAT_R32G32_FLOAT:
373 case PIPE_FORMAT_R16G16B16A16_UNORM:
374 case PIPE_FORMAT_R16G16B16A16_SNORM:
375 case PIPE_FORMAT_R16G16B16A16_FLOAT:
376
377 /* 128-bit buffers. */
378 case PIPE_FORMAT_R32G32B32A32_FLOAT:
379 case PIPE_FORMAT_R32G32B32A32_SNORM:
380 case PIPE_FORMAT_R32G32B32A32_UNORM:
381 return V_0280A0_SWAP_STD;
382 default:
383 R600_ERR("unsupported colorswap format %d\n", format);
384 return ~0;
385 }
386 return ~0;
387 }
388
389 static INLINE uint32_t r600_translate_colorformat(enum pipe_format format)
390 {
391 switch (format) {
392 case PIPE_FORMAT_L4A4_UNORM:
393 return V_0280A0_COLOR_4_4;
394
395 /* 8-bit buffers. */
396 case PIPE_FORMAT_A8_UNORM:
397 case PIPE_FORMAT_I8_UNORM:
398 case PIPE_FORMAT_L8_UNORM:
399 case PIPE_FORMAT_L8_SRGB:
400 case PIPE_FORMAT_R8_UNORM:
401 case PIPE_FORMAT_R8_SNORM:
402 return V_0280A0_COLOR_8;
403
404 /* 16-bit buffers. */
405 case PIPE_FORMAT_B5G6R5_UNORM:
406 return V_0280A0_COLOR_5_6_5;
407
408 case PIPE_FORMAT_B5G5R5A1_UNORM:
409 case PIPE_FORMAT_B5G5R5X1_UNORM:
410 return V_0280A0_COLOR_1_5_5_5;
411
412 case PIPE_FORMAT_B4G4R4A4_UNORM:
413 case PIPE_FORMAT_B4G4R4X4_UNORM:
414 return V_0280A0_COLOR_4_4_4_4;
415
416 case PIPE_FORMAT_Z16_UNORM:
417 return V_0280A0_COLOR_16;
418
419 case PIPE_FORMAT_L8A8_UNORM:
420 case PIPE_FORMAT_L8A8_SRGB:
421 case PIPE_FORMAT_R8G8_UNORM:
422 return V_0280A0_COLOR_8_8;
423
424 case PIPE_FORMAT_R16_UNORM:
425 return V_0280A0_COLOR_16;
426
427 case PIPE_FORMAT_R16_FLOAT:
428 return V_0280A0_COLOR_16_FLOAT;
429
430 /* 32-bit buffers. */
431 case PIPE_FORMAT_A8B8G8R8_SRGB:
432 case PIPE_FORMAT_A8B8G8R8_UNORM:
433 case PIPE_FORMAT_A8R8G8B8_UNORM:
434 case PIPE_FORMAT_B8G8R8A8_SRGB:
435 case PIPE_FORMAT_B8G8R8A8_UNORM:
436 case PIPE_FORMAT_B8G8R8X8_UNORM:
437 case PIPE_FORMAT_R8G8B8A8_SNORM:
438 case PIPE_FORMAT_R8G8B8A8_UNORM:
439 case PIPE_FORMAT_R8G8B8X8_UNORM:
440 case PIPE_FORMAT_R8SG8SB8UX8U_NORM:
441 case PIPE_FORMAT_X8B8G8R8_UNORM:
442 case PIPE_FORMAT_X8R8G8B8_UNORM:
443 case PIPE_FORMAT_R8G8B8_UNORM:
444 return V_0280A0_COLOR_8_8_8_8;
445
446 case PIPE_FORMAT_R10G10B10A2_UNORM:
447 case PIPE_FORMAT_R10G10B10X2_SNORM:
448 case PIPE_FORMAT_B10G10R10A2_UNORM:
449 case PIPE_FORMAT_R10SG10SB10SA2U_NORM:
450 return V_0280A0_COLOR_2_10_10_10;
451
452 case PIPE_FORMAT_Z24X8_UNORM:
453 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
454 return V_0280A0_COLOR_8_24;
455
456 case PIPE_FORMAT_X8Z24_UNORM:
457 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
458 return V_0280A0_COLOR_24_8;
459
460 case PIPE_FORMAT_R32_FLOAT:
461 return V_0280A0_COLOR_32_FLOAT;
462
463 case PIPE_FORMAT_R16G16_FLOAT:
464 return V_0280A0_COLOR_16_16_FLOAT;
465
466 case PIPE_FORMAT_R16G16_SSCALED:
467 case PIPE_FORMAT_R16G16_UNORM:
468 return V_0280A0_COLOR_16_16;
469
470 case PIPE_FORMAT_R11G11B10_FLOAT:
471 return V_0280A0_COLOR_10_11_11_FLOAT;
472
473 /* 64-bit buffers. */
474 case PIPE_FORMAT_R16G16B16_USCALED:
475 case PIPE_FORMAT_R16G16B16A16_USCALED:
476 case PIPE_FORMAT_R16G16B16_SSCALED:
477 case PIPE_FORMAT_R16G16B16A16_SSCALED:
478 case PIPE_FORMAT_R16G16B16A16_UNORM:
479 case PIPE_FORMAT_R16G16B16A16_SNORM:
480 return V_0280A0_COLOR_16_16_16_16;
481
482 case PIPE_FORMAT_R16G16B16_FLOAT:
483 case PIPE_FORMAT_R16G16B16A16_FLOAT:
484 return V_0280A0_COLOR_16_16_16_16_FLOAT;
485
486 case PIPE_FORMAT_R32G32_FLOAT:
487 return V_0280A0_COLOR_32_32_FLOAT;
488
489 case PIPE_FORMAT_R32G32_USCALED:
490 case PIPE_FORMAT_R32G32_SSCALED:
491 return V_0280A0_COLOR_32_32;
492
493 /* 96-bit buffers. */
494 case PIPE_FORMAT_R32G32B32_FLOAT:
495 return V_0280A0_COLOR_32_32_32_FLOAT;
496
497 /* 128-bit buffers. */
498 case PIPE_FORMAT_R32G32B32A32_FLOAT:
499 return V_0280A0_COLOR_32_32_32_32_FLOAT;
500 case PIPE_FORMAT_R32G32B32A32_SNORM:
501 case PIPE_FORMAT_R32G32B32A32_UNORM:
502 return V_0280A0_COLOR_32_32_32_32;
503
504 /* YUV buffers. */
505 case PIPE_FORMAT_UYVY:
506 case PIPE_FORMAT_YUYV:
507 default:
508 return ~0; /* Unsupported. */
509 }
510 }
511
512 static INLINE uint32_t r600_colorformat_endian_swap(uint32_t colorformat)
513 {
514 if (R600_BIG_ENDIAN) {
515 switch(colorformat) {
516 case V_0280A0_COLOR_4_4:
517 return(ENDIAN_NONE);
518
519 /* 8-bit buffers. */
520 case V_0280A0_COLOR_8:
521 return(ENDIAN_NONE);
522
523 /* 16-bit buffers. */
524 case V_0280A0_COLOR_5_6_5:
525 case V_0280A0_COLOR_1_5_5_5:
526 case V_0280A0_COLOR_4_4_4_4:
527 case V_0280A0_COLOR_16:
528 case V_0280A0_COLOR_8_8:
529 return(ENDIAN_8IN16);
530
531 /* 32-bit buffers. */
532 case V_0280A0_COLOR_8_8_8_8:
533 case V_0280A0_COLOR_2_10_10_10:
534 case V_0280A0_COLOR_8_24:
535 case V_0280A0_COLOR_24_8:
536 case V_0280A0_COLOR_32_FLOAT:
537 case V_0280A0_COLOR_16_16_FLOAT:
538 case V_0280A0_COLOR_16_16:
539 return(ENDIAN_8IN32);
540
541 /* 64-bit buffers. */
542 case V_0280A0_COLOR_16_16_16_16:
543 case V_0280A0_COLOR_16_16_16_16_FLOAT:
544 return(ENDIAN_8IN16);
545
546 case V_0280A0_COLOR_32_32_FLOAT:
547 case V_0280A0_COLOR_32_32:
548 return(ENDIAN_8IN32);
549
550 /* 128-bit buffers. */
551 case V_0280A0_COLOR_32_32_32_FLOAT:
552 case V_0280A0_COLOR_32_32_32_32_FLOAT:
553 case V_0280A0_COLOR_32_32_32_32:
554 return(ENDIAN_8IN32);
555 default:
556 return ENDIAN_NONE; /* Unsupported. */
557 }
558 } else {
559 return ENDIAN_NONE;
560 }
561 }
562
563 static INLINE boolean r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format)
564 {
565 return r600_translate_texformat(screen, format, NULL, NULL, NULL) != ~0;
566 }
567
568 static INLINE boolean r600_is_colorbuffer_format_supported(enum pipe_format format)
569 {
570 return r600_translate_colorformat(format) != ~0 &&
571 r600_translate_colorswap(format) != ~0;
572 }
573
574 static INLINE boolean r600_is_zs_format_supported(enum pipe_format format)
575 {
576 return r600_translate_dbformat(format) != ~0;
577 }
578
579 static INLINE boolean r600_is_vertex_format_supported(enum pipe_format format,
580 enum radeon_family family)
581 {
582 unsigned i;
583 const struct util_format_description *desc = util_format_description(format);
584 if (!desc)
585 return FALSE;
586
587 /* Find the first non-VOID channel. */
588 for (i = 0; i < 4; i++) {
589 if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
590 break;
591 }
592 }
593 if (i == 4)
594 return FALSE;
595
596 /* No fixed, no double. */
597 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN ||
598 desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED ||
599 (desc->channel[i].size == 64 &&
600 desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT))
601 return FALSE;
602
603 /* No scaled/norm formats with 32 bits per channel. */
604 if (desc->channel[i].size == 32 &&
605 (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED ||
606 desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED))
607 return FALSE;
608
609 return TRUE;
610 }
611
612 #endif