src/gallium/drivers/radeonsi/radeonsi_pipe.h

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  */
  26 #ifndef RADEONSI_PIPE_H
  27 #define RADEONSI_PIPE_H
  28
  29 #include "../../winsys/radeon/drm/radeon_winsys.h"
  30
  31 #include "pipe/p_state.h"
  32 #include "pipe/p_screen.h"
  33 #include "pipe/p_context.h"
  34 #include "util/u_format.h"
  35 #include "util/u_math.h"
  36 #include "util/u_slab.h"
  37 #include "r600.h"
  38 #include "radeonsi_public.h"
  39 #include "r600_resource.h"
  40 #include "sid.h"
  41
  42 #define R600_MAX_CONST_BUFFERS 1
  43 #define R600_MAX_CONST_BUFFER_SIZE 4096
  44
  45 #ifdef PIPE_ARCH_BIG_ENDIAN
  46 #define R600_BIG_ENDIAN 1
  47 #else
  48 #define R600_BIG_ENDIAN 0
  49 #endif
  50
  51 enum r600_atom_flags {
  52         /* When set, atoms are added at the beginning of the dirty list
  53          * instead of the end. */
  54         EMIT_EARLY = (1 << 0)
  55 };
  56
  57 /* This encapsulates a state or an operation which can emitted into the GPU
  58  * command stream. It's not limited to states only, it can be used for anything
  59  * that wants to write commands into the CS (e.g. cache flushes). */
  60 struct r600_atom {
  61         void (*emit)(struct r600_context *ctx, struct r600_atom *state);
  62
  63         unsigned                num_dw;
  64         enum r600_atom_flags    flags;
  65         bool                    dirty;
  66
  67         struct list_head        head;
  68 };
  69
  70 struct r600_atom_surface_sync {
  71         struct r600_atom atom;
  72         unsigned flush_flags; /* CP_COHER_CNTL */
  73 };
  74
  75 enum r600_pipe_state_id {
  76         R600_PIPE_STATE_BLEND = 0,
  77         R600_PIPE_STATE_BLEND_COLOR,
  78         R600_PIPE_STATE_CONFIG,
  79         R600_PIPE_STATE_SEAMLESS_CUBEMAP,
  80         R600_PIPE_STATE_CLIP,
  81         R600_PIPE_STATE_SCISSOR,
  82         R600_PIPE_STATE_VIEWPORT,
  83         R600_PIPE_STATE_RASTERIZER,
  84         R600_PIPE_STATE_VGT,
  85         R600_PIPE_STATE_FRAMEBUFFER,
  86         R600_PIPE_STATE_DSA,
  87         R600_PIPE_STATE_STENCIL_REF,
  88         R600_PIPE_STATE_PS_SHADER,
  89         R600_PIPE_STATE_VS_SHADER,
  90         R600_PIPE_STATE_CONSTANT,
  91         R600_PIPE_STATE_SAMPLER,
  92         R600_PIPE_STATE_RESOURCE,
  93         R600_PIPE_STATE_POLYGON_OFFSET,
  94         R600_PIPE_NSTATES
  95 };
  96
  97 struct r600_pipe_fences {
  98         struct r600_resource            *bo;
  99         unsigned                        *data;
 100         unsigned                        next_index;
 101         /* linked list of preallocated blocks */
 102         struct list_head                blocks;
 103         /* linked list of freed fences */
 104         struct list_head                pool;
 105         pipe_mutex                      mutex;
 106 };
 107
 108 struct r600_screen {
 109         struct pipe_screen              screen;
 110         struct radeon_winsys            *ws;
 111         unsigned                        family;
 112         enum chip_class                 chip_class;
 113         struct radeon_info              info;
 114         struct r600_tiling_info         tiling_info;
 115         struct util_slab_mempool        pool_buffers;
 116         struct r600_pipe_fences         fences;
 117
 118         unsigned                        num_contexts;
 119
 120         /* for thread-safe write accessing to num_contexts */
 121         pipe_mutex                      mutex_num_contexts;
 122 };
 123
 124 struct si_pipe_sampler_view {
 125         struct pipe_sampler_view        base;
 126         uint32_t                        state[8];
 127 };
 128
 129 struct si_pipe_sampler_state {
 130         uint32_t                        val[4];
 131 };
 132
 133 struct r600_pipe_rasterizer {
 134         struct r600_pipe_state          rstate;
 135         boolean                         flatshade;
 136         unsigned                        sprite_coord_enable;
 137         unsigned                        pa_sc_line_stipple;
 138         unsigned                        pa_su_sc_mode_cntl;
 139         unsigned                        pa_cl_clip_cntl;
 140         unsigned                        pa_cl_vs_out_cntl;
 141         float                           offset_units;
 142         float                           offset_scale;
 143 };
 144
 145 struct r600_pipe_blend {
 146         struct r600_pipe_state          rstate;
 147         unsigned                        cb_target_mask;
 148         unsigned                        cb_color_control;
 149 };
 150
 151 struct r600_pipe_dsa {
 152         struct r600_pipe_state          rstate;
 153         unsigned                        alpha_ref;
 154         unsigned                        db_render_override;
 155         unsigned                        db_render_control;
 156         ubyte                           valuemask[2];
 157         ubyte                           writemask[2];
 158 };
 159
 160 struct r600_vertex_element
 161 {
 162         unsigned                        count;
 163         struct pipe_vertex_element      elements[PIPE_MAX_ATTRIBS];
 164         unsigned                        fs_size;
 165         struct r600_pipe_state          rstate;
 166         /* if offset is to big for fetch instructio we need to alterate
 167          * offset of vertex buffer, record here the offset need to add
 168          */
 169         unsigned                        vbuffer_need_offset;
 170         unsigned                        vbuffer_offset[PIPE_MAX_ATTRIBS];
 171 };
 172
 173 struct r600_shader_io {
 174         unsigned                name;
 175         unsigned                gpr;
 176         unsigned                done;
 177         int                     sid;
 178         unsigned                interpolate;
 179         boolean                 centroid;
 180         unsigned                lds_pos; /* for evergreen */
 181 };
 182
 183 struct r600_shader {
 184         unsigned                ninput;
 185         unsigned                noutput;
 186         struct r600_shader_io   input[32];
 187         struct r600_shader_io   output[32];
 188         boolean                 uses_kill;
 189         boolean                 fs_write_all;
 190         unsigned                nr_cbufs;
 191 };
 192
 193 struct si_pipe_shader {
 194         struct r600_shader              shader;
 195         struct r600_pipe_state          rstate;
 196         struct r600_resource            *bo;
 197         struct r600_vertex_element      vertex_elements;
 198         struct tgsi_token               *tokens;
 199         unsigned                        num_sgprs;
 200         unsigned                        num_vgprs;
 201         unsigned                        spi_ps_input_ena;
 202         unsigned        sprite_coord_enable;
 203         struct pipe_stream_output_info  so;
 204         unsigned                        so_strides[4];
 205 };
 206
 207 /* needed for blitter save */
 208 #define NUM_TEX_UNITS 16
 209
 210 struct r600_textures_info {
 211         struct r600_pipe_state          rstate;
 212         struct si_pipe_sampler_view     *views[NUM_TEX_UNITS];
 213         struct si_pipe_sampler_state    *samplers[NUM_TEX_UNITS];
 214         unsigned                        n_views;
 215         unsigned                        n_samplers;
 216         bool                            samplers_dirty;
 217         bool                            is_array_sampler[NUM_TEX_UNITS];
 218 };
 219
 220 struct r600_fence {
 221         struct pipe_reference           reference;
 222         unsigned                        index; /* in the shared bo */
 223         struct r600_resource            *sleep_bo;
 224         struct list_head                head;
 225 };
 226
 227 #define FENCE_BLOCK_SIZE 16
 228
 229 struct r600_fence_block {
 230         struct r600_fence               fences[FENCE_BLOCK_SIZE];
 231         struct list_head                head;
 232 };
 233
 234 #define R600_CONSTANT_ARRAY_SIZE 256
 235 #define R600_RESOURCE_ARRAY_SIZE 160
 236
 237 struct r600_stencil_ref
 238 {
 239         ubyte ref_value[2];
 240         ubyte valuemask[2];
 241         ubyte writemask[2];
 242 };
 243
 244 struct r600_context {
 245         struct pipe_context             context;
 246         struct blitter_context          *blitter;
 247         enum radeon_family              family;
 248         enum chip_class                 chip_class;
 249         void                            *custom_dsa_flush;
 250         struct r600_screen              *screen;
 251         struct radeon_winsys            *ws;
 252         struct r600_pipe_state          *states[R600_PIPE_NSTATES];
 253         struct r600_vertex_element      *vertex_elements;
 254         struct pipe_framebuffer_state   framebuffer;
 255         unsigned                        cb_target_mask;
 256         unsigned                        cb_color_control;
 257         unsigned                        pa_sc_line_stipple;
 258         unsigned                        pa_su_sc_mode_cntl;
 259         unsigned                        pa_cl_clip_cntl;
 260         unsigned                        pa_cl_vs_out_cntl;
 261         /* for saving when using blitter */
 262         struct pipe_stencil_ref         stencil_ref;
 263         struct pipe_viewport_state      viewport;
 264         struct pipe_clip_state          clip;
 265         struct r600_pipe_state          config;
 266         struct si_pipe_shader   *ps_shader;
 267         struct si_pipe_shader   *vs_shader;
 268         struct r600_pipe_state          vs_const_buffer;
 269         struct r600_pipe_state          vs_user_data;
 270         struct r600_pipe_state          ps_const_buffer;
 271         struct r600_pipe_rasterizer     *rasterizer;
 272         struct r600_pipe_state          vgt;
 273         struct r600_pipe_state          spi;
 274         struct pipe_query               *current_render_cond;
 275         unsigned                        current_render_cond_mode;
 276         struct pipe_query               *saved_render_cond;
 277         unsigned                        saved_render_cond_mode;
 278         /* shader information */
 279         unsigned                        sprite_coord_enable;
 280         boolean                         export_16bpc;
 281         unsigned                        alpha_ref;
 282         boolean                         alpha_ref_dirty;
 283         unsigned                        nr_cbufs;
 284         struct r600_textures_info       vs_samplers;
 285         struct r600_textures_info       ps_samplers;
 286         boolean                         shader_dirty;
 287
 288         struct u_upload_mgr             *uploader;
 289         struct util_slab_mempool        pool_transfers;
 290         boolean                         have_depth_texture, have_depth_fb;
 291
 292         unsigned default_ps_gprs, default_vs_gprs;
 293
 294         /* States based on r600_state. */
 295         struct list_head                dirty_states;
 296         struct r600_atom_surface_sync   atom_surface_sync;
 297         struct r600_atom                atom_r6xx_flush_and_inv;
 298
 299         /* Below are variables from the old r600_context.
 300          */
 301         struct radeon_winsys_cs *cs;
 302
 303         struct r600_range       *range;
 304         unsigned                nblocks;
 305         struct r600_block       **blocks;
 306         struct list_head        dirty;
 307         struct list_head        enable_list;
 308         unsigned                pm4_dirty_cdwords;
 309         unsigned                ctx_pm4_ndwords;
 310         unsigned                init_dwords;
 311
 312         /* The list of active queries. Only one query of each type can be active. */
 313         struct list_head        active_query_list;
 314         unsigned                num_cs_dw_queries_suspend;
 315         unsigned                num_cs_dw_streamout_end;
 316
 317         unsigned                backend_mask;
 318         unsigned                max_db; /* for OQ */
 319         unsigned                flags;
 320         boolean                 predicate_drawing;
 321
 322         unsigned                num_so_targets;
 323         struct r600_so_target   *so_targets[PIPE_MAX_SO_BUFFERS];
 324         boolean                 streamout_start;
 325         unsigned                streamout_append_bitmask;
 326         unsigned                *vs_so_stride_in_dw;
 327         unsigned                *vs_shader_so_strides;
 328
 329         /* Vertex and index buffers. */
 330         bool                    vertex_buffers_dirty;
 331         struct pipe_index_buffer index_buffer;
 332         struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
 333         unsigned                nr_vertex_buffers;
 334 };
 335
 336 static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)
 337 {
 338         atom->emit(rctx, atom);
 339         atom->dirty = false;
 340         if (atom->head.next && atom->head.prev)
 341                 LIST_DELINIT(&atom->head);
 342 }
 343
 344 static INLINE void r600_atom_dirty(struct r600_context *rctx, struct r600_atom *state)
 345 {
 346         if (!state->dirty) {
 347                 if (state->flags & EMIT_EARLY) {
 348                         LIST_ADD(&state->head, &rctx->dirty_states);
 349                 } else {
 350                         LIST_ADDTAIL(&state->head, &rctx->dirty_states);
 351                 }
 352                 state->dirty = true;
 353         }
 354 }
 355
 356 /* evergreen_state.c */
 357 void cayman_init_state_functions(struct r600_context *rctx);
 358 void si_init_config(struct r600_context *rctx);
 359 void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader);
 360 void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader);
 361 void si_update_spi_map(struct r600_context *rctx);
 362 void *cayman_create_db_flush_dsa(struct r600_context *rctx);
 363 void cayman_polygon_offset_update(struct r600_context *rctx);
 364 uint32_t si_translate_vertexformat(struct pipe_screen *screen,
 365                                    enum pipe_format format,
 366                                    const struct util_format_description *desc,
 367                                    int first_non_void);
 368 boolean si_is_format_supported(struct pipe_screen *screen,
 369                                enum pipe_format format,
 370                                enum pipe_texture_target target,
 371                                unsigned sample_count,
 372                                unsigned usage);
 373
 374 /* r600_blit.c */
 375 void r600_init_blit_functions(struct r600_context *rctx);
 376 void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
 377 void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
 378 void r600_flush_depth_textures(struct r600_context *rctx);
 379
 380 /* r600_buffer.c */
 381 bool r600_init_resource(struct r600_screen *rscreen,
 382                         struct r600_resource *res,
 383                         unsigned size, unsigned alignment,
 384                         unsigned bind, unsigned usage);
 385 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
 386                                          const struct pipe_resource *templ);
 387 struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
 388                                               void *ptr, unsigned bytes,
 389                                               unsigned bind);
 390 void r600_upload_index_buffer(struct r600_context *rctx,
 391                               struct pipe_index_buffer *ib, unsigned count);
 392
 393
 394 /* r600_pipe.c */
 395 void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
 396                     unsigned flags);
 397
 398 /* r600_query.c */
 399 void r600_init_query_functions(struct r600_context *rctx);
 400
 401 /* r600_resource.c */
 402 void r600_init_context_resource_functions(struct r600_context *r600);
 403
 404 /* radeonsi_shader.c */
 405 int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
 406 void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader);
 407
 408 /* r600_texture.c */
 409 void r600_init_screen_texture_functions(struct pipe_screen *screen);
 410 void r600_init_surface_functions(struct r600_context *r600);
 411 unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
 412                                         unsigned level, unsigned layer);
 413
 414 /* r600_translate.c */
 415 void r600_translate_index_buffer(struct r600_context *r600,
 416                                  struct pipe_index_buffer *ib,
 417                                  unsigned count);
 418
 419 /* r600_state_common.c */
 420 void r600_init_common_atoms(struct r600_context *rctx);
 421 unsigned r600_get_cb_flush_flags(struct r600_context *rctx);
 422 void r600_texture_barrier(struct pipe_context *ctx);
 423 void r600_set_index_buffer(struct pipe_context *ctx,
 424                            const struct pipe_index_buffer *ib);
 425 void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
 426                              const struct pipe_vertex_buffer *buffers);
 427 void *si_create_vertex_elements(struct pipe_context *ctx,
 428                                 unsigned count,
 429                                 const struct pipe_vertex_element *elements);
 430 void r600_delete_vertex_element(struct pipe_context *ctx, void *state);
 431 void r600_bind_blend_state(struct pipe_context *ctx, void *state);
 432 void r600_bind_dsa_state(struct pipe_context *ctx, void *state);
 433 void r600_bind_rs_state(struct pipe_context *ctx, void *state);
 434 void r600_delete_rs_state(struct pipe_context *ctx, void *state);
 435 void r600_sampler_view_destroy(struct pipe_context *ctx,
 436                                struct pipe_sampler_view *state);
 437 void r600_delete_state(struct pipe_context *ctx, void *state);
 438 void r600_bind_vertex_elements(struct pipe_context *ctx, void *state);
 439 void *si_create_shader_state(struct pipe_context *ctx,
 440                              const struct pipe_shader_state *state);
 441 void r600_bind_ps_shader(struct pipe_context *ctx, void *state);
 442 void r600_bind_vs_shader(struct pipe_context *ctx, void *state);
 443 void r600_delete_ps_shader(struct pipe_context *ctx, void *state);
 444 void r600_delete_vs_shader(struct pipe_context *ctx, void *state);
 445 void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
 446                               struct pipe_constant_buffer *cb);
 447 struct pipe_stream_output_target *
 448 r600_create_so_target(struct pipe_context *ctx,
 449                       struct pipe_resource *buffer,
 450                       unsigned buffer_offset,
 451                       unsigned buffer_size);
 452 void r600_so_target_destroy(struct pipe_context *ctx,
 453                             struct pipe_stream_output_target *target);
 454 void r600_set_so_targets(struct pipe_context *ctx,
 455                          unsigned num_targets,
 456                          struct pipe_stream_output_target **targets,
 457                          unsigned append_bitmask);
 458 void r600_set_pipe_stencil_ref(struct pipe_context *ctx,
 459                                const struct pipe_stencil_ref *state);
 460 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
 461
 462 /*
 463  * common helpers
 464  */
 465 static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
 466 {
 467         return value * (1 << frac_bits);
 468 }
 469 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 470
 471 static INLINE unsigned si_map_swizzle(unsigned swizzle)
 472 {
 473         switch (swizzle) {
 474         case UTIL_FORMAT_SWIZZLE_Y:
 475                 return V_008F0C_SQ_SEL_Y;
 476         case UTIL_FORMAT_SWIZZLE_Z:
 477                 return V_008F0C_SQ_SEL_Z;
 478         case UTIL_FORMAT_SWIZZLE_W:
 479                 return V_008F0C_SQ_SEL_W;
 480         case UTIL_FORMAT_SWIZZLE_0:
 481                 return V_008F0C_SQ_SEL_0;
 482         case UTIL_FORMAT_SWIZZLE_1:
 483                 return V_008F0C_SQ_SEL_1;
 484         default: /* UTIL_FORMAT_SWIZZLE_X */
 485                 return V_008F0C_SQ_SEL_X;
 486         }
 487 }
 488
 489 static inline unsigned r600_tex_aniso_filter(unsigned filter)
 490 {
 491         if (filter <= 1)   return 0;
 492         if (filter <= 2)   return 1;
 493         if (filter <= 4)   return 2;
 494         if (filter <= 8)   return 3;
 495          /* else */        return 4;
 496 }
 497
 498 /* 12.4 fixed-point */
 499 static INLINE unsigned r600_pack_float_12p4(float x)
 500 {
 501         return x <= 0    ? 0 :
 502                x >= 4096 ? 0xffff : x * 16;
 503 }
 504
 505 static INLINE uint64_t r600_resource_va(struct pipe_screen *screen, struct pipe_resource *resource)
 506 {
 507         struct r600_screen *rscreen = (struct r600_screen*)screen;
 508         struct r600_resource *rresource = (struct r600_resource*)resource;
 509
 510         return rscreen->ws->buffer_get_virtual_address(rresource->cs_buf);
 511 }
 512
 513 #endif