2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_strings.h"
29 #include "tgsi/tgsi_util.h"
30 #include "tgsi/tgsi_dump.h"
31 #include "tgsi/tgsi_from_mesa.h"
33 #include "ac_binary.h"
34 #include "ac_exp_param.h"
35 #include "ac_shader_util.h"
37 #include "ac_llvm_util.h"
38 #include "si_shader_internal.h"
42 #include "compiler/nir/nir.h"
44 static const char scratch_rsrc_dword0_symbol
[] =
45 "SCRATCH_RSRC_DWORD0";
47 static const char scratch_rsrc_dword1_symbol
[] =
48 "SCRATCH_RSRC_DWORD1";
50 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
51 struct si_screen
*sscreen
,
52 struct ac_llvm_compiler
*compiler
,
56 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
57 struct lp_build_tgsi_context
*bld_base
,
58 struct lp_build_emit_data
*emit_data
);
60 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
62 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
63 union si_shader_part_key
*key
);
64 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
65 union si_shader_part_key
*key
);
66 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
67 union si_shader_part_key
*key
);
68 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
69 union si_shader_part_key
*key
);
70 static void si_fix_resource_usage(struct si_screen
*sscreen
,
71 struct si_shader
*shader
);
73 /* Ideally pass the sample mask input to the PS epilog as v14, which
74 * is its usual location, so that the shader doesn't have to add v_mov.
76 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
78 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
81 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
87 /** Whether the shader runs as a combination of multiple API shaders */
88 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
90 if (ctx
->screen
->info
.chip_class
<= GFX8
)
93 return ctx
->shader
->key
.as_ls
||
94 ctx
->shader
->key
.as_es
||
95 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
96 ctx
->type
== PIPE_SHADER_GEOMETRY
;
99 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
100 static bool is_merged_shader(struct si_shader_context
*ctx
)
102 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
105 void si_init_function_info(struct si_function_info
*fninfo
)
107 fninfo
->num_params
= 0;
108 fninfo
->num_sgpr_params
= 0;
111 unsigned add_arg_assign(struct si_function_info
*fninfo
,
112 enum si_arg_regfile regfile
, LLVMTypeRef type
,
113 LLVMValueRef
*assign
)
115 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
117 unsigned idx
= fninfo
->num_params
++;
118 assert(idx
< ARRAY_SIZE(fninfo
->types
));
120 if (regfile
== ARG_SGPR
)
121 fninfo
->num_sgpr_params
= fninfo
->num_params
;
123 fninfo
->types
[idx
] = type
;
124 fninfo
->assign
[idx
] = assign
;
128 static unsigned add_arg(struct si_function_info
*fninfo
,
129 enum si_arg_regfile regfile
, LLVMTypeRef type
)
131 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
134 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
135 enum si_arg_regfile regfile
, LLVMTypeRef type
,
136 LLVMValueRef
*assign
, unsigned idx
)
138 ASSERTED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
139 assert(actual
== idx
);
142 static void add_arg_checked(struct si_function_info
*fninfo
,
143 enum si_arg_regfile regfile
, LLVMTypeRef type
,
146 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
150 * Returns a unique index for a per-patch semantic name and index. The index
151 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
154 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
156 switch (semantic_name
) {
157 case TGSI_SEMANTIC_TESSOUTER
:
159 case TGSI_SEMANTIC_TESSINNER
:
161 case TGSI_SEMANTIC_PATCH
:
166 assert(!"invalid semantic name");
172 * Returns a unique index for a semantic name and index. The index must be
173 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
176 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
179 switch (semantic_name
) {
180 case TGSI_SEMANTIC_POSITION
:
182 case TGSI_SEMANTIC_GENERIC
:
183 /* Since some shader stages use the the highest used IO index
184 * to determine the size to allocate for inputs/outputs
185 * (in LDS, tess and GS rings). GENERIC should be placed right
186 * after POSITION to make that size as small as possible.
188 if (index
< SI_MAX_IO_GENERIC
)
191 assert(!"invalid generic index");
193 case TGSI_SEMANTIC_FOG
:
194 return SI_MAX_IO_GENERIC
+ 1;
195 case TGSI_SEMANTIC_COLOR
:
197 return SI_MAX_IO_GENERIC
+ 2 + index
;
198 case TGSI_SEMANTIC_BCOLOR
:
200 /* If it's a varying, COLOR and BCOLOR alias. */
202 return SI_MAX_IO_GENERIC
+ 2 + index
;
204 return SI_MAX_IO_GENERIC
+ 4 + index
;
205 case TGSI_SEMANTIC_TEXCOORD
:
207 return SI_MAX_IO_GENERIC
+ 6 + index
;
209 /* These are rarely used between LS and HS or ES and GS. */
210 case TGSI_SEMANTIC_CLIPDIST
:
212 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
213 case TGSI_SEMANTIC_CLIPVERTEX
:
214 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
215 case TGSI_SEMANTIC_PSIZE
:
216 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
218 /* These can't be written by LS, HS, and ES. */
219 case TGSI_SEMANTIC_LAYER
:
220 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
221 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
222 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
223 case TGSI_SEMANTIC_PRIMID
:
224 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
225 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
227 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
228 assert(!"invalid semantic name");
234 * Get the value of a shader input parameter and extract a bitfield.
236 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
237 LLVMValueRef value
, unsigned rshift
,
240 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
241 value
= ac_to_integer(&ctx
->ac
, value
);
244 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
245 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
247 if (rshift
+ bitwidth
< 32) {
248 unsigned mask
= (1 << bitwidth
) - 1;
249 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
250 LLVMConstInt(ctx
->i32
, mask
, 0), "");
256 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
257 unsigned param
, unsigned rshift
,
260 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
262 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
265 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
268 case PIPE_SHADER_TESS_CTRL
:
269 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
271 case PIPE_SHADER_TESS_EVAL
:
272 return LLVMGetParam(ctx
->main_fn
,
273 ctx
->param_tes_rel_patch_id
);
281 /* Tessellation shaders pass outputs to the next shader using LDS.
283 * LS outputs = TCS inputs
284 * TCS outputs = TES inputs
287 * - TCS inputs for patch 0
288 * - TCS inputs for patch 1
289 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
291 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
292 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
293 * - TCS outputs for patch 1
294 * - Per-patch TCS outputs for patch 1
295 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
296 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
299 * All three shaders VS(LS), TCS, TES share the same LDS space.
303 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
305 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
308 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
310 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
312 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
313 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
315 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
318 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
320 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
322 return LLVMConstInt(ctx
->i32
, stride
, 0);
325 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
327 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
328 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
330 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
331 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
332 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
333 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
334 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
335 num_patch_outputs
* 4;
336 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
340 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
342 return LLVMBuildMul(ctx
->ac
.builder
,
344 ctx
->param_tcs_out_lds_offsets
,
346 LLVMConstInt(ctx
->i32
, 4, 0), "");
350 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
352 return LLVMBuildMul(ctx
->ac
.builder
,
354 ctx
->param_tcs_out_lds_offsets
,
356 LLVMConstInt(ctx
->i32
, 4, 0), "");
360 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
362 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
363 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
365 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
369 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
371 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
372 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
373 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
375 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
379 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
381 LLVMValueRef patch0_patch_data_offset
=
382 get_tcs_out_patch0_patch_data_offset(ctx
);
383 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
384 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
386 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
389 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
391 unsigned tcs_out_vertices
=
392 ctx
->shader
->selector
?
393 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
395 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
396 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
397 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
399 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
402 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
407 case PIPE_SHADER_VERTEX
:
408 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
409 return LLVMConstInt(ctx
->i32
, stride
, 0);
411 case PIPE_SHADER_TESS_CTRL
:
412 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
413 ctx
->shader
->is_monolithic
) {
414 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
415 return LLVMConstInt(ctx
->i32
, stride
, 0);
417 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
425 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
426 LLVMValueRef i32
, unsigned index
)
431 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
432 LLVMConstInt(ctx
->i32
, 16, 0), "");
434 return LLVMBuildSExt(ctx
->ac
.builder
,
435 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
440 void si_llvm_load_input_vs(
441 struct si_shader_context
*ctx
,
442 unsigned input_index
,
445 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
446 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
448 if (vs_blit_property
) {
449 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
450 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
451 LLVMIntULE
, vertex_id
,
453 /* Use LLVMIntNE, because we have 3 vertices and only
454 * the middle one should use y2.
456 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
457 LLVMIntNE
, vertex_id
,
460 if (input_index
== 0) {
462 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
463 ctx
->param_vs_blit_inputs
);
464 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
465 ctx
->param_vs_blit_inputs
+ 1);
467 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
468 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
469 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
470 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
472 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
474 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
477 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
478 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
479 out
[2] = LLVMGetParam(ctx
->main_fn
,
480 ctx
->param_vs_blit_inputs
+ 2);
481 out
[3] = ctx
->ac
.f32_1
;
485 /* Color or texture coordinates: */
486 assert(input_index
== 1);
488 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
489 for (int i
= 0; i
< 4; i
++) {
490 out
[i
] = LLVMGetParam(ctx
->main_fn
,
491 ctx
->param_vs_blit_inputs
+ 3 + i
);
494 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
495 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
496 ctx
->param_vs_blit_inputs
+ 3);
497 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
498 ctx
->param_vs_blit_inputs
+ 4);
499 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
500 ctx
->param_vs_blit_inputs
+ 5);
501 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
502 ctx
->param_vs_blit_inputs
+ 6);
504 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
506 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
508 out
[2] = LLVMGetParam(ctx
->main_fn
,
509 ctx
->param_vs_blit_inputs
+ 7);
510 out
[3] = LLVMGetParam(ctx
->main_fn
,
511 ctx
->param_vs_blit_inputs
+ 8);
516 union si_vs_fix_fetch fix_fetch
;
517 LLVMValueRef t_list_ptr
;
518 LLVMValueRef t_offset
;
520 LLVMValueRef vertex_index
;
523 /* Load the T list */
524 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
526 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
528 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
530 vertex_index
= LLVMGetParam(ctx
->main_fn
,
531 ctx
->param_vertex_index0
+
534 /* Use the open-coded implementation for all loads of doubles and
535 * of dword-sized data that needs fixups. We need to insert conversion
536 * code anyway, and the amd/common code does it for us.
538 * Note: On LLVM <= 8, we can only open-code formats with
539 * channel size >= 4 bytes.
541 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
542 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
544 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
545 (fix_fetch
.u
.log_size
== 2)) {
546 tmp
= ac_build_opencoded_load_format(
547 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
548 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
549 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
550 for (unsigned i
= 0; i
< 4; ++i
)
551 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
555 /* Do multiple loads for special formats. */
556 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
557 LLVMValueRef fetches
[4];
558 unsigned num_fetches
;
559 unsigned fetch_stride
;
560 unsigned channels_per_fetch
;
562 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
563 num_fetches
= MIN2(required_channels
, 3);
564 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
565 channels_per_fetch
= 1;
569 channels_per_fetch
= required_channels
;
572 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
573 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
574 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
575 channels_per_fetch
, 0, true);
578 if (num_fetches
== 1 && channels_per_fetch
> 1) {
579 LLVMValueRef fetch
= fetches
[0];
580 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
581 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
582 fetches
[i
] = LLVMBuildExtractElement(
583 ctx
->ac
.builder
, fetch
, tmp
, "");
585 num_fetches
= channels_per_fetch
;
586 channels_per_fetch
= 1;
589 for (unsigned i
= num_fetches
; i
< 4; ++i
)
590 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
592 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
593 required_channels
== 4) {
594 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
595 fetches
[3] = ctx
->ac
.i32_1
;
597 fetches
[3] = ctx
->ac
.f32_1
;
598 } else if (fix_fetch
.u
.log_size
== 3 &&
599 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
600 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
601 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
602 required_channels
== 4) {
603 /* For 2_10_10_10, the hardware returns an unsigned value;
604 * convert it to a signed one.
606 LLVMValueRef tmp
= fetches
[3];
607 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
609 /* First, recover the sign-extended signed integer value. */
610 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
611 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
613 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
615 /* For the integer-like cases, do a natural sign extension.
617 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
618 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
621 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
622 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
623 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
624 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
626 /* Convert back to the right type. */
627 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
629 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
630 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
631 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
632 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
633 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
634 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
640 for (unsigned i
= 0; i
< 4; ++i
)
641 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
644 static void declare_input_vs(
645 struct si_shader_context
*ctx
,
646 unsigned input_index
,
647 const struct tgsi_full_declaration
*decl
,
650 si_llvm_load_input_vs(ctx
, input_index
, out
);
653 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
660 case PIPE_SHADER_VERTEX
:
661 return LLVMGetParam(ctx
->main_fn
,
662 ctx
->param_vs_prim_id
);
663 case PIPE_SHADER_TESS_CTRL
:
664 return ctx
->abi
.tcs_patch_id
;
665 case PIPE_SHADER_TESS_EVAL
:
666 return ctx
->abi
.tes_patch_id
;
667 case PIPE_SHADER_GEOMETRY
:
668 return ctx
->abi
.gs_prim_id
;
676 * Return the value of tgsi_ind_register for indexing.
677 * This is the indirect index with the constant offset added to it.
679 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
680 const struct tgsi_ind_register
*ind
,
686 if (ind
->File
== TGSI_FILE_ADDRESS
) {
687 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
688 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
690 struct tgsi_full_src_register src
= {};
692 src
.Register
.File
= ind
->File
;
693 src
.Register
.Index
= ind
->Index
;
695 /* Set the second index to 0 for constants. */
696 if (ind
->File
== TGSI_FILE_CONSTANT
)
697 src
.Register
.Dimension
= 1;
699 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
702 result
= ac_to_integer(&ctx
->ac
, result
);
705 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
706 LLVMConstInt(ctx
->i32
, rel_index
, 0));
710 * Like si_get_indirect_index, but restricts the return value to a (possibly
711 * undefined) value inside [0..num).
713 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
714 const struct tgsi_ind_register
*ind
,
715 int rel_index
, unsigned num
)
717 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
719 return si_llvm_bound_index(ctx
, result
, num
);
722 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
723 LLVMValueRef vertex_dw_stride
,
724 LLVMValueRef base_addr
,
725 LLVMValueRef vertex_index
,
726 LLVMValueRef param_index
,
727 unsigned input_index
,
732 if (vertex_dw_stride
) {
733 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
734 vertex_dw_stride
, base_addr
);
738 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
739 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
742 int param
= is_patch
?
743 si_shader_io_get_unique_index_patch(name
[input_index
],
744 index
[input_index
]) :
745 si_shader_io_get_unique_index(name
[input_index
],
746 index
[input_index
], false);
748 /* Add the base address of the element. */
749 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
750 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
754 * Calculate a dword address given an input or output register and a stride.
756 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
757 const struct tgsi_full_dst_register
*dst
,
758 const struct tgsi_full_src_register
*src
,
759 LLVMValueRef vertex_dw_stride
,
760 LLVMValueRef base_addr
)
762 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
763 ubyte
*name
, *index
, *array_first
;
765 struct tgsi_full_dst_register reg
;
766 LLVMValueRef vertex_index
= NULL
;
767 LLVMValueRef ind_index
= NULL
;
769 /* Set the register description. The address computation is the same
770 * for sources and destinations. */
772 reg
.Register
.File
= src
->Register
.File
;
773 reg
.Register
.Index
= src
->Register
.Index
;
774 reg
.Register
.Indirect
= src
->Register
.Indirect
;
775 reg
.Register
.Dimension
= src
->Register
.Dimension
;
776 reg
.Indirect
= src
->Indirect
;
777 reg
.Dimension
= src
->Dimension
;
778 reg
.DimIndirect
= src
->DimIndirect
;
782 /* If the register is 2-dimensional (e.g. an array of vertices
783 * in a primitive), calculate the base address of the vertex. */
784 if (reg
.Register
.Dimension
) {
785 if (reg
.Dimension
.Indirect
)
786 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
787 1, reg
.Dimension
.Index
);
789 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
792 /* Get information about the register. */
793 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
794 name
= info
->input_semantic_name
;
795 index
= info
->input_semantic_index
;
796 array_first
= info
->input_array_first
;
797 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
798 name
= info
->output_semantic_name
;
799 index
= info
->output_semantic_index
;
800 array_first
= info
->output_array_first
;
806 if (reg
.Register
.Indirect
) {
807 /* Add the relative address of the element. */
808 if (reg
.Indirect
.ArrayID
)
809 input_index
= array_first
[reg
.Indirect
.ArrayID
];
811 input_index
= reg
.Register
.Index
;
813 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
814 1, reg
.Register
.Index
- input_index
);
816 input_index
= reg
.Register
.Index
;
819 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
820 base_addr
, vertex_index
,
821 ind_index
, input_index
,
823 !reg
.Register
.Dimension
);
826 /* The offchip buffer layout for TCS->TES is
828 * - attribute 0 of patch 0 vertex 0
829 * - attribute 0 of patch 0 vertex 1
830 * - attribute 0 of patch 0 vertex 2
832 * - attribute 0 of patch 1 vertex 0
833 * - attribute 0 of patch 1 vertex 1
835 * - attribute 1 of patch 0 vertex 0
836 * - attribute 1 of patch 0 vertex 1
838 * - per patch attribute 0 of patch 0
839 * - per patch attribute 0 of patch 1
842 * Note that every attribute has 4 components.
844 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
845 LLVMValueRef rel_patch_id
,
846 LLVMValueRef vertex_index
,
847 LLVMValueRef param_index
)
849 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
850 LLVMValueRef param_stride
, constant16
;
852 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
853 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
854 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
857 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
859 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
860 vertices_per_patch
, vertex_index
);
861 param_stride
= total_vertices
;
863 base_addr
= rel_patch_id
;
864 param_stride
= num_patches
;
867 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
868 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
871 LLVMValueRef patch_data_offset
=
872 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
874 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
875 patch_data_offset
, "");
880 /* This is a generic helper that can be shared by the NIR and TGSI backends */
881 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
882 struct si_shader_context
*ctx
,
883 LLVMValueRef vertex_index
,
884 LLVMValueRef param_index
,
890 unsigned param_index_base
;
892 param_index_base
= is_patch
?
893 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
894 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
897 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
898 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
901 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
904 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
905 vertex_index
, param_index
);
908 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
909 struct si_shader_context
*ctx
,
910 const struct tgsi_full_dst_register
*dst
,
911 const struct tgsi_full_src_register
*src
)
913 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
914 ubyte
*name
, *index
, *array_first
;
915 struct tgsi_full_src_register reg
;
916 LLVMValueRef vertex_index
= NULL
;
917 LLVMValueRef param_index
= NULL
;
920 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
922 if (reg
.Register
.Dimension
) {
924 if (reg
.Dimension
.Indirect
)
925 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
926 1, reg
.Dimension
.Index
);
928 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
931 /* Get information about the register. */
932 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
933 name
= info
->input_semantic_name
;
934 index
= info
->input_semantic_index
;
935 array_first
= info
->input_array_first
;
936 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
937 name
= info
->output_semantic_name
;
938 index
= info
->output_semantic_index
;
939 array_first
= info
->output_array_first
;
945 if (reg
.Register
.Indirect
) {
946 if (reg
.Indirect
.ArrayID
)
947 param_base
= array_first
[reg
.Indirect
.ArrayID
];
949 param_base
= reg
.Register
.Index
;
951 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
952 1, reg
.Register
.Index
- param_base
);
955 param_base
= reg
.Register
.Index
;
958 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
959 param_index
, param_base
,
960 name
, index
, !reg
.Register
.Dimension
);
963 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
964 LLVMTypeRef type
, unsigned swizzle
,
965 LLVMValueRef buffer
, LLVMValueRef offset
,
966 LLVMValueRef base
, bool can_speculate
)
968 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
969 LLVMValueRef value
, value2
;
970 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
973 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
974 0, ac_glc
, can_speculate
, false);
976 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
979 if (!llvm_type_is_64bit(ctx
, type
)) {
980 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
981 0, ac_glc
, can_speculate
, false);
983 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
984 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
985 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
988 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
989 swizzle
* 4, ac_glc
, can_speculate
, false);
991 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
992 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
994 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
998 * Load from LSHS LDS storage.
1000 * \param type output value type
1001 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1002 * \param dw_addr address in dwords
1004 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
1005 LLVMTypeRef type
, unsigned swizzle
,
1006 LLVMValueRef dw_addr
)
1008 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1011 if (swizzle
== ~0) {
1012 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1014 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1015 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
1017 return ac_build_gather_values(&ctx
->ac
, values
,
1021 /* Split 64-bit loads. */
1022 if (llvm_type_is_64bit(ctx
, type
)) {
1023 LLVMValueRef lo
, hi
;
1025 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1026 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1027 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1030 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1031 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1033 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1035 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1039 * Store to LSHS LDS storage.
1041 * \param swizzle offset (typically 0..3)
1042 * \param dw_addr address in dwords
1043 * \param value value to store
1045 static void lshs_lds_store(struct si_shader_context
*ctx
,
1046 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1049 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1050 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1052 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1057 TESS_OFFCHIP_RING_TCS
,
1058 TESS_OFFCHIP_RING_TES
,
1061 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1062 enum si_tess_ring ring
)
1064 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1065 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1066 ctx
->param_tcs_out_lds_layout
;
1067 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1069 /* TCS only receives high 13 bits of the address. */
1070 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1071 addr
= LLVMBuildAnd(builder
, addr
,
1072 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1075 if (ring
== TCS_FACTOR_RING
) {
1076 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1077 addr
= LLVMBuildAdd(builder
, addr
,
1078 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1081 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1082 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1083 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1084 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1086 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1087 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1088 S_008F0C_OOB_SELECT(3) |
1089 S_008F0C_RESOURCE_LEVEL(1);
1091 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1092 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1094 LLVMValueRef desc
[4];
1096 desc
[1] = LLVMConstInt(ctx
->i32
,
1097 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1098 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1099 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1101 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1104 static LLVMValueRef
fetch_input_tcs(
1105 struct lp_build_tgsi_context
*bld_base
,
1106 const struct tgsi_full_src_register
*reg
,
1107 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1109 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1110 LLVMValueRef dw_addr
, stride
;
1111 unsigned swizzle
= swizzle_in
& 0xffff;
1112 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1113 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1114 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1116 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1119 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1121 LLVMValueRef vertex_index
,
1122 LLVMValueRef param_index
,
1123 unsigned const_index
,
1125 unsigned driver_location
,
1127 unsigned num_components
,
1132 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1133 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1134 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1135 LLVMValueRef dw_addr
, stride
;
1137 driver_location
= driver_location
/ 4;
1140 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1141 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1145 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1147 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1148 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1153 /* Add the constant index to the indirect index */
1154 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1155 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1157 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1163 names
= info
->input_semantic_name
;
1164 indices
= info
->input_semantic_index
;
1166 names
= info
->output_semantic_name
;
1167 indices
= info
->output_semantic_index
;
1170 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1171 vertex_index
, param_index
,
1176 LLVMValueRef value
[4];
1177 for (unsigned i
= 0; i
< num_components
; i
++) {
1178 unsigned offset
= i
;
1179 if (llvm_type_is_64bit(ctx
, type
))
1182 offset
+= component
;
1183 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1186 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1189 static LLVMValueRef
fetch_output_tcs(
1190 struct lp_build_tgsi_context
*bld_base
,
1191 const struct tgsi_full_src_register
*reg
,
1192 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1194 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1195 LLVMValueRef dw_addr
, stride
;
1196 unsigned swizzle
= (swizzle_in
& 0xffff);
1198 if (reg
->Register
.Dimension
) {
1199 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1200 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1201 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1203 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1204 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1207 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1210 static LLVMValueRef
fetch_input_tes(
1211 struct lp_build_tgsi_context
*bld_base
,
1212 const struct tgsi_full_src_register
*reg
,
1213 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1215 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1216 LLVMValueRef base
, addr
;
1217 unsigned swizzle
= (swizzle_in
& 0xffff);
1219 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1220 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1222 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1223 ctx
->tess_offchip_ring
, base
, addr
, true);
1226 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1228 LLVMValueRef vertex_index
,
1229 LLVMValueRef param_index
,
1230 unsigned const_index
,
1232 unsigned driver_location
,
1234 unsigned num_components
,
1239 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1240 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1241 LLVMValueRef base
, addr
;
1243 driver_location
= driver_location
/ 4;
1245 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1248 /* Add the constant index to the indirect index */
1249 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1250 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1252 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1255 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1256 param_index
, driver_location
,
1257 info
->input_semantic_name
,
1258 info
->input_semantic_index
,
1261 /* TODO: This will generate rather ordinary llvm code, although it
1262 * should be easy for the optimiser to fix up. In future we might want
1263 * to refactor buffer_load(), but for now this maximises code sharing
1264 * between the NIR and TGSI backends.
1266 LLVMValueRef value
[4];
1267 for (unsigned i
= 0; i
< num_components
; i
++) {
1268 unsigned offset
= i
;
1269 if (llvm_type_is_64bit(ctx
, type
)) {
1272 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1275 driver_location
+ 1,
1276 info
->input_semantic_name
,
1277 info
->input_semantic_index
,
1281 offset
= offset
% 4;
1284 offset
+= component
;
1285 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1286 ctx
->tess_offchip_ring
, base
, addr
, true);
1289 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1292 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1293 const struct tgsi_full_instruction
*inst
,
1294 const struct tgsi_opcode_info
*info
,
1296 LLVMValueRef dst
[4])
1298 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1299 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1300 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1301 unsigned chan_index
;
1302 LLVMValueRef dw_addr
, stride
;
1303 LLVMValueRef buffer
, base
, buf_addr
;
1304 LLVMValueRef values
[4];
1305 bool skip_lds_store
;
1306 bool is_tess_factor
= false, is_tess_inner
= false;
1308 /* Only handle per-patch and per-vertex outputs here.
1309 * Vectors will be lowered to scalars and this function will be called again.
1311 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1312 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1313 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1317 if (reg
->Register
.Dimension
) {
1318 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1319 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1320 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1321 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1323 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1324 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1325 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1327 if (!reg
->Register
.Indirect
) {
1328 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1330 /* Always write tess factors into LDS for the TCS epilog. */
1331 if (name
== TGSI_SEMANTIC_TESSINNER
||
1332 name
== TGSI_SEMANTIC_TESSOUTER
) {
1333 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1334 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1335 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1336 is_tess_factor
= true;
1337 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1342 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1344 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1345 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1347 uint32_t writemask
= reg
->Register
.WriteMask
;
1349 chan_index
= u_bit_scan(&writemask
);
1350 LLVMValueRef value
= dst
[chan_index
];
1352 if (inst
->Instruction
.Saturate
)
1353 value
= ac_build_clamp(&ctx
->ac
, value
);
1355 /* Skip LDS stores if there is no LDS read of this output. */
1356 if (!skip_lds_store
)
1357 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1359 value
= ac_to_integer(&ctx
->ac
, value
);
1360 values
[chan_index
] = value
;
1362 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1363 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1365 4 * chan_index
, ac_glc
, false);
1368 /* Write tess factors into VGPRs for the epilog. */
1369 if (is_tess_factor
&&
1370 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1371 if (!is_tess_inner
) {
1372 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1373 ctx
->invoc0_tess_factors
[chan_index
]);
1374 } else if (chan_index
< 2) {
1375 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1376 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1381 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1382 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1384 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1385 base
, 0, ac_glc
, false);
1389 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1390 const struct nir_variable
*var
,
1391 LLVMValueRef vertex_index
,
1392 LLVMValueRef param_index
,
1393 unsigned const_index
,
1397 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1398 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1399 const unsigned component
= var
->data
.location_frac
;
1400 const bool is_patch
= var
->data
.patch
;
1401 unsigned driver_location
= var
->data
.driver_location
;
1402 LLVMValueRef dw_addr
, stride
;
1403 LLVMValueRef buffer
, base
, addr
;
1404 LLVMValueRef values
[8];
1405 bool skip_lds_store
;
1406 bool is_tess_factor
= false, is_tess_inner
= false;
1408 driver_location
= driver_location
/ 4;
1411 /* Add the constant index to the indirect index */
1412 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1413 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1415 if (const_index
!= 0)
1416 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1420 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1421 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1422 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1423 vertex_index
, param_index
,
1425 info
->output_semantic_name
,
1426 info
->output_semantic_index
,
1429 skip_lds_store
= !info
->reads_pervertex_outputs
;
1431 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1432 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1433 vertex_index
, param_index
,
1435 info
->output_semantic_name
,
1436 info
->output_semantic_index
,
1439 skip_lds_store
= !info
->reads_perpatch_outputs
;
1442 int name
= info
->output_semantic_name
[driver_location
];
1444 /* Always write tess factors into LDS for the TCS epilog. */
1445 if (name
== TGSI_SEMANTIC_TESSINNER
||
1446 name
== TGSI_SEMANTIC_TESSOUTER
) {
1447 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1448 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1449 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1450 is_tess_factor
= true;
1451 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1456 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1458 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1460 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1461 param_index
, driver_location
,
1462 info
->output_semantic_name
,
1463 info
->output_semantic_index
,
1466 for (unsigned chan
= 0; chan
< 8; chan
++) {
1467 if (!(writemask
& (1 << chan
)))
1469 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1471 unsigned buffer_store_offset
= chan
% 4;
1473 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1476 driver_location
+ 1,
1477 info
->output_semantic_name
,
1478 info
->output_semantic_index
,
1482 /* Skip LDS stores if there is no LDS read of this output. */
1483 if (!skip_lds_store
)
1484 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1486 value
= ac_to_integer(&ctx
->ac
, value
);
1487 values
[chan
] = value
;
1489 if (writemask
!= 0xF && !is_tess_factor
) {
1490 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1492 4 * buffer_store_offset
,
1496 /* Write tess factors into VGPRs for the epilog. */
1497 if (is_tess_factor
&&
1498 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1499 if (!is_tess_inner
) {
1500 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1501 ctx
->invoc0_tess_factors
[chan
]);
1502 } else if (chan
< 2) {
1503 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1504 ctx
->invoc0_tess_factors
[4 + chan
]);
1509 if (writemask
== 0xF && !is_tess_factor
) {
1510 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1512 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1513 base
, 0, ac_glc
, false);
1517 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1518 unsigned input_index
,
1519 unsigned vtx_offset_param
,
1523 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1524 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1525 struct si_shader
*shader
= ctx
->shader
;
1526 LLVMValueRef vtx_offset
, soffset
;
1527 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1528 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1529 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1533 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1535 /* GFX9 has the ESGS ring in LDS. */
1536 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1537 unsigned index
= vtx_offset_param
;
1539 switch (index
/ 2) {
1541 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1542 index
% 2 ? 16 : 0, 16);
1545 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1546 index
% 2 ? 16 : 0, 16);
1549 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1550 index
% 2 ? 16 : 0, 16);
1557 unsigned offset
= param
* 4 + swizzle
;
1558 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1559 LLVMConstInt(ctx
->i32
, offset
, false), "");
1561 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1562 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1563 if (llvm_type_is_64bit(ctx
, type
)) {
1564 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1565 &ctx
->ac
.i32_1
, 1, "");
1566 LLVMValueRef values
[2] = {
1568 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1570 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1572 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1575 /* GFX6: input load from the ESGS ring in memory. */
1576 if (swizzle
== ~0) {
1577 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1579 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1580 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1583 return ac_build_gather_values(&ctx
->ac
, values
,
1587 /* Get the vertex offset parameter on GFX6. */
1588 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1590 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1591 LLVMConstInt(ctx
->i32
, 4, 0), "");
1593 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1595 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1596 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1597 if (llvm_type_is_64bit(ctx
, type
)) {
1598 LLVMValueRef value2
;
1599 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1601 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1602 ctx
->i32_0
, vtx_offset
, soffset
,
1603 0, ac_glc
, true, false);
1604 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1606 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1609 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1611 unsigned driver_location
,
1613 unsigned num_components
,
1614 unsigned vertex_index
,
1615 unsigned const_index
,
1618 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1620 LLVMValueRef value
[4];
1621 for (unsigned i
= 0; i
< num_components
; i
++) {
1622 unsigned offset
= i
;
1623 if (llvm_type_is_64bit(ctx
, type
))
1626 offset
+= component
;
1627 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1628 vertex_index
, type
, offset
);
1631 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1634 static LLVMValueRef
fetch_input_gs(
1635 struct lp_build_tgsi_context
*bld_base
,
1636 const struct tgsi_full_src_register
*reg
,
1637 enum tgsi_opcode_type type
,
1638 unsigned swizzle_in
)
1640 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1641 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1642 unsigned swizzle
= swizzle_in
& 0xffff;
1644 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1645 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1646 return si_get_primitive_id(ctx
, swizzle
);
1648 if (!reg
->Register
.Dimension
)
1651 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1652 reg
->Dimension
.Index
,
1653 tgsi2llvmtype(bld_base
, type
),
1657 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1659 switch (interpolate
) {
1660 case TGSI_INTERPOLATE_CONSTANT
:
1663 case TGSI_INTERPOLATE_LINEAR
:
1664 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1665 return SI_PARAM_LINEAR_SAMPLE
;
1666 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1667 return SI_PARAM_LINEAR_CENTROID
;
1669 return SI_PARAM_LINEAR_CENTER
;
1671 case TGSI_INTERPOLATE_COLOR
:
1672 case TGSI_INTERPOLATE_PERSPECTIVE
:
1673 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1674 return SI_PARAM_PERSP_SAMPLE
;
1675 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1676 return SI_PARAM_PERSP_CENTROID
;
1678 return SI_PARAM_PERSP_CENTER
;
1681 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1686 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1687 unsigned attr_index
, unsigned chan
,
1688 LLVMValueRef prim_mask
,
1689 LLVMValueRef i
, LLVMValueRef j
)
1692 return ac_build_fs_interp(&ctx
->ac
,
1693 LLVMConstInt(ctx
->i32
, chan
, 0),
1694 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1697 return ac_build_fs_interp_mov(&ctx
->ac
,
1698 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1699 LLVMConstInt(ctx
->i32
, chan
, 0),
1700 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1705 * Interpolate a fragment shader input.
1707 * @param ctx context
1708 * @param input_index index of the input in hardware
1709 * @param semantic_name TGSI_SEMANTIC_*
1710 * @param semantic_index semantic index
1711 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1712 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1713 * @param interp_param interpolation weights (i,j)
1714 * @param prim_mask SI_PARAM_PRIM_MASK
1715 * @param face SI_PARAM_FRONT_FACE
1716 * @param result the return value (4 components)
1718 static void interp_fs_input(struct si_shader_context
*ctx
,
1719 unsigned input_index
,
1720 unsigned semantic_name
,
1721 unsigned semantic_index
,
1722 unsigned num_interp_inputs
,
1723 unsigned colors_read_mask
,
1724 LLVMValueRef interp_param
,
1725 LLVMValueRef prim_mask
,
1727 LLVMValueRef result
[4])
1729 LLVMValueRef i
= NULL
, j
= NULL
;
1732 /* fs.constant returns the param from the middle vertex, so it's not
1733 * really useful for flat shading. It's meant to be used for custom
1734 * interpolation (but the intrinsic can't fetch from the other two
1737 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1738 * to do the right thing. The only reason we use fs.constant is that
1739 * fs.interp cannot be used on integers, because they can be equal
1742 * When interp is false we will use fs.constant or for newer llvm,
1743 * amdgcn.interp.mov.
1745 bool interp
= interp_param
!= NULL
;
1748 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1749 LLVMVectorType(ctx
->f32
, 2), "");
1751 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1753 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1757 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1758 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1759 LLVMValueRef is_face_positive
;
1761 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1762 * otherwise it's at offset "num_inputs".
1764 unsigned back_attr_offset
= num_interp_inputs
;
1765 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1766 back_attr_offset
+= 1;
1768 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1769 face
, ctx
->i32_0
, "");
1771 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1772 LLVMValueRef front
, back
;
1774 front
= si_build_fs_interp(ctx
,
1777 back
= si_build_fs_interp(ctx
,
1778 back_attr_offset
, chan
,
1781 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1787 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1788 result
[0] = si_build_fs_interp(ctx
, input_index
,
1789 0, prim_mask
, i
, j
);
1791 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1792 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1794 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1795 result
[chan
] = si_build_fs_interp(ctx
,
1802 void si_llvm_load_input_fs(
1803 struct si_shader_context
*ctx
,
1804 unsigned input_index
,
1805 LLVMValueRef out
[4])
1807 struct si_shader
*shader
= ctx
->shader
;
1808 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1809 LLVMValueRef main_fn
= ctx
->main_fn
;
1810 LLVMValueRef interp_param
= NULL
;
1811 int interp_param_idx
;
1812 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1813 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1814 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1815 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1817 /* Get colors from input VGPRs (set by the prolog). */
1818 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1819 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1820 unsigned mask
= colors_read
>> (semantic_index
* 4);
1821 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1822 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1823 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1825 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1826 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1827 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1828 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1832 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1833 if (interp_param_idx
== -1)
1835 else if (interp_param_idx
) {
1836 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1839 interp_fs_input(ctx
, input_index
, semantic_name
,
1840 semantic_index
, 0, /* this param is unused */
1841 shader
->selector
->info
.colors_read
, interp_param
,
1843 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1847 static void declare_input_fs(
1848 struct si_shader_context
*ctx
,
1849 unsigned input_index
,
1850 const struct tgsi_full_declaration
*decl
,
1851 LLVMValueRef out
[4])
1853 si_llvm_load_input_fs(ctx
, input_index
, out
);
1856 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1858 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1861 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1863 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1865 /* For non-indexed draws, the base vertex set by the driver
1866 * (for direct draws) or the CP (for indirect draws) is the
1867 * first vertex ID, but GLSL expects 0 to be returned.
1869 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1870 ctx
->param_vs_state_bits
);
1871 LLVMValueRef indexed
;
1873 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1874 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1876 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1880 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1882 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1884 LLVMValueRef values
[3];
1885 LLVMValueRef result
;
1887 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1889 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1890 unsigned sizes
[3] = {
1891 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1892 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1893 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1896 for (i
= 0; i
< 3; ++i
)
1897 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1899 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1901 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1908 * Load a dword from a constant buffer.
1910 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1911 LLVMValueRef resource
,
1912 LLVMValueRef offset
)
1914 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1918 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1920 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1921 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1922 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1923 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1925 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1926 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1927 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1929 LLVMValueRef pos
[4] = {
1930 buffer_load_const(ctx
, resource
, offset0
),
1931 buffer_load_const(ctx
, resource
, offset1
),
1932 LLVMConstReal(ctx
->f32
, 0),
1933 LLVMConstReal(ctx
->f32
, 0)
1936 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1939 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1941 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1942 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1945 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1947 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1948 LLVMValueRef coord
[4] = {
1949 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1950 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1955 /* For triangles, the vector should be (u, v, 1-u-v). */
1956 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1957 PIPE_PRIM_TRIANGLES
) {
1958 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1959 LLVMBuildFAdd(ctx
->ac
.builder
,
1960 coord
[0], coord
[1], ""), "");
1962 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1965 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1966 unsigned semantic_name
)
1968 LLVMValueRef base
, addr
;
1970 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1972 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1973 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1974 LLVMConstInt(ctx
->i32
, param
, 0));
1976 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1977 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1981 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1982 unsigned semantic_name
)
1984 LLVMValueRef buf
, slot
, val
[4];
1987 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1988 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1989 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1990 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1992 for (i
= 0; i
< 4; i
++)
1993 val
[i
] = buffer_load_const(ctx
, buf
,
1994 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1995 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1998 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1999 unsigned varying_id
,
2000 bool load_default_state
)
2002 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2003 unsigned semantic_name
;
2005 if (load_default_state
) {
2006 switch (varying_id
) {
2007 case VARYING_SLOT_TESS_LEVEL_INNER
:
2008 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
2010 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2011 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
2014 unreachable("unknown tess level");
2016 return load_tess_level_default(ctx
, semantic_name
);
2019 switch (varying_id
) {
2020 case VARYING_SLOT_TESS_LEVEL_INNER
:
2021 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2023 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2024 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2027 unreachable("unknown tess level");
2030 return load_tess_level(ctx
, semantic_name
);
2034 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2036 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2037 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2038 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2039 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2040 return get_num_tcs_out_vertices(ctx
);
2042 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2045 void si_load_system_value(struct si_shader_context
*ctx
,
2047 const struct tgsi_full_declaration
*decl
)
2049 LLVMValueRef value
= 0;
2051 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2053 switch (decl
->Semantic
.Name
) {
2054 case TGSI_SEMANTIC_INSTANCEID
:
2055 value
= ctx
->abi
.instance_id
;
2058 case TGSI_SEMANTIC_VERTEXID
:
2059 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2061 ctx
->abi
.base_vertex
, "");
2064 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2065 /* Unused. Clarify the meaning in indexed vs. non-indexed
2066 * draws if this is ever used again. */
2070 case TGSI_SEMANTIC_BASEVERTEX
:
2071 value
= get_base_vertex(&ctx
->abi
);
2074 case TGSI_SEMANTIC_BASEINSTANCE
:
2075 value
= ctx
->abi
.start_instance
;
2078 case TGSI_SEMANTIC_DRAWID
:
2079 value
= ctx
->abi
.draw_id
;
2082 case TGSI_SEMANTIC_INVOCATIONID
:
2083 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2084 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2085 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2086 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2087 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2088 ctx
->abi
.gs_invocation_id
,
2089 LLVMConstInt(ctx
->i32
, 127, 0), "");
2091 value
= ctx
->abi
.gs_invocation_id
;
2094 assert(!"INVOCATIONID not implemented");
2098 case TGSI_SEMANTIC_POSITION
:
2100 LLVMValueRef pos
[4] = {
2101 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2102 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2103 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2104 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2105 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2107 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2111 case TGSI_SEMANTIC_FACE
:
2112 value
= ctx
->abi
.front_face
;
2115 case TGSI_SEMANTIC_SAMPLEID
:
2116 value
= si_get_sample_id(ctx
);
2119 case TGSI_SEMANTIC_SAMPLEPOS
: {
2120 LLVMValueRef pos
[4] = {
2121 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2122 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2123 LLVMConstReal(ctx
->f32
, 0),
2124 LLVMConstReal(ctx
->f32
, 0)
2126 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2127 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2128 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2132 case TGSI_SEMANTIC_SAMPLEMASK
:
2133 /* This can only occur with the OpenGL Core profile, which
2134 * doesn't support smoothing.
2136 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2139 case TGSI_SEMANTIC_TESSCOORD
:
2140 value
= si_load_tess_coord(&ctx
->abi
);
2143 case TGSI_SEMANTIC_VERTICESIN
:
2144 value
= si_load_patch_vertices_in(&ctx
->abi
);
2147 case TGSI_SEMANTIC_TESSINNER
:
2148 case TGSI_SEMANTIC_TESSOUTER
:
2149 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2152 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2153 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2154 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2157 case TGSI_SEMANTIC_PRIMID
:
2158 value
= si_get_primitive_id(ctx
, 0);
2161 case TGSI_SEMANTIC_GRID_SIZE
:
2162 value
= ctx
->abi
.num_work_groups
;
2165 case TGSI_SEMANTIC_BLOCK_SIZE
:
2166 value
= get_block_size(&ctx
->abi
);
2169 case TGSI_SEMANTIC_BLOCK_ID
:
2171 LLVMValueRef values
[3];
2173 for (int i
= 0; i
< 3; i
++) {
2174 values
[i
] = ctx
->i32_0
;
2175 if (ctx
->abi
.workgroup_ids
[i
]) {
2176 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2179 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2183 case TGSI_SEMANTIC_THREAD_ID
:
2184 value
= ctx
->abi
.local_invocation_ids
;
2187 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2188 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2191 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2192 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2195 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2196 value
= ac_get_thread_id(&ctx
->ac
);
2199 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2201 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2202 if (ctx
->ac
.wave_size
== 64)
2203 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2204 value
= LLVMBuildShl(ctx
->ac
.builder
,
2205 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2206 if (ctx
->ac
.wave_size
== 32)
2207 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2208 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2212 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2213 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2214 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2215 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2217 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2218 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2219 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2220 /* All bits set except LSB */
2221 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2224 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2226 if (ctx
->ac
.wave_size
== 64)
2227 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2228 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2229 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2230 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2231 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2232 if (ctx
->ac
.wave_size
== 32)
2233 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2234 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2238 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2239 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2243 assert(!"unknown system value");
2247 ctx
->system_values
[index
] = value
;
2250 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2252 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2253 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2255 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2258 assert(!ctx
->ac
.lds
);
2260 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2261 LLVMArrayType(ctx
->i8
, lds_size
),
2264 LLVMSetAlignment(var
, 64 * 1024);
2266 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2269 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2270 const struct tgsi_full_declaration
*decl
)
2272 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2273 assert(decl
->Range
.First
== decl
->Range
.Last
);
2275 si_declare_compute_memory(ctx
);
2278 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2281 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2282 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2284 /* Do the bounds checking with a descriptor, because
2285 * doing computation and manual bounds checking of 64-bit
2286 * addresses generates horrible VALU code with very high
2287 * VGPR usage and very low SIMD occupancy.
2289 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2291 LLVMValueRef desc0
, desc1
;
2293 desc1
= LLVMConstInt(ctx
->i32
,
2294 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2296 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2297 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2298 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2299 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2301 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2302 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2303 S_008F0C_OOB_SELECT(3) |
2304 S_008F0C_RESOURCE_LEVEL(1);
2306 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2307 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2309 LLVMValueRef desc_elems
[] = {
2312 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2313 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2316 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2319 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2321 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2322 ctx
->param_const_and_shader_buffers
);
2324 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2325 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2328 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2330 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2331 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2333 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2335 if (sel
->info
.const_buffers_declared
== 1 &&
2336 sel
->info
.shader_buffers_declared
== 0) {
2337 return load_const_buffer_desc_fast_path(ctx
);
2340 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2341 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2342 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2344 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2348 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2350 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2351 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2352 ctx
->param_const_and_shader_buffers
);
2354 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2355 index
= LLVMBuildSub(ctx
->ac
.builder
,
2356 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2359 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2362 static LLVMValueRef
fetch_constant(
2363 struct lp_build_tgsi_context
*bld_base
,
2364 const struct tgsi_full_src_register
*reg
,
2365 enum tgsi_opcode_type type
,
2366 unsigned swizzle_in
)
2368 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2369 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2370 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2372 unsigned swizzle
= swizzle_in
& 0xffff;
2374 LLVMValueRef addr
, bufp
;
2376 if (swizzle_in
== LP_CHAN_ALL
) {
2378 LLVMValueRef values
[4];
2379 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2380 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2382 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2385 /* Split 64-bit loads. */
2386 if (tgsi_type_is_64bit(type
)) {
2387 LLVMValueRef lo
, hi
;
2389 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2390 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2391 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2395 idx
= reg
->Register
.Index
* 4 + swizzle
;
2396 if (reg
->Register
.Indirect
) {
2397 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2399 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2402 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2403 if (sel
->info
.const_buffers_declared
== 1 &&
2404 sel
->info
.shader_buffers_declared
== 0) {
2405 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2406 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2407 return bitcast(bld_base
, type
, result
);
2410 assert(reg
->Register
.Dimension
);
2411 buf
= reg
->Dimension
.Index
;
2413 if (reg
->Dimension
.Indirect
) {
2414 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2416 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2417 reg
->Dimension
.Index
,
2418 ctx
->num_const_buffers
);
2419 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2420 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2421 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2423 bufp
= load_const_buffer_desc(ctx
, buf
);
2425 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2428 /* Initialize arguments for the shader export intrinsic */
2429 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2430 LLVMValueRef
*values
,
2432 struct ac_export_args
*args
)
2434 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2435 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2437 bool is_int8
, is_int10
;
2439 /* Default is 0xf. Adjusted below depending on the format. */
2440 args
->enabled_channels
= 0xf; /* writemask */
2442 /* Specify whether the EXEC mask represents the valid mask */
2443 args
->valid_mask
= 0;
2445 /* Specify whether this is the last export */
2448 /* Specify the target we are exporting */
2449 args
->target
= target
;
2451 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2452 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2453 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2454 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2456 assert(cbuf
>= 0 && cbuf
< 8);
2457 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2458 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2459 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2462 args
->compr
= false;
2463 args
->out
[0] = f32undef
;
2464 args
->out
[1] = f32undef
;
2465 args
->out
[2] = f32undef
;
2466 args
->out
[3] = f32undef
;
2468 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2469 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2470 unsigned bits
, bool hi
) = NULL
;
2472 switch (spi_shader_col_format
) {
2473 case V_028714_SPI_SHADER_ZERO
:
2474 args
->enabled_channels
= 0; /* writemask */
2475 args
->target
= V_008DFC_SQ_EXP_NULL
;
2478 case V_028714_SPI_SHADER_32_R
:
2479 args
->enabled_channels
= 1; /* writemask */
2480 args
->out
[0] = values
[0];
2483 case V_028714_SPI_SHADER_32_GR
:
2484 args
->enabled_channels
= 0x3; /* writemask */
2485 args
->out
[0] = values
[0];
2486 args
->out
[1] = values
[1];
2489 case V_028714_SPI_SHADER_32_AR
:
2490 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2491 args
->enabled_channels
= 0x3; /* writemask */
2492 args
->out
[0] = values
[0];
2493 args
->out
[1] = values
[3];
2495 args
->enabled_channels
= 0x9; /* writemask */
2496 args
->out
[0] = values
[0];
2497 args
->out
[3] = values
[3];
2501 case V_028714_SPI_SHADER_FP16_ABGR
:
2502 packf
= ac_build_cvt_pkrtz_f16
;
2505 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2506 packf
= ac_build_cvt_pknorm_u16
;
2509 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2510 packf
= ac_build_cvt_pknorm_i16
;
2513 case V_028714_SPI_SHADER_UINT16_ABGR
:
2514 packi
= ac_build_cvt_pk_u16
;
2517 case V_028714_SPI_SHADER_SINT16_ABGR
:
2518 packi
= ac_build_cvt_pk_i16
;
2521 case V_028714_SPI_SHADER_32_ABGR
:
2522 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2526 /* Pack f16 or norm_i16/u16. */
2528 for (chan
= 0; chan
< 2; chan
++) {
2529 LLVMValueRef pack_args
[2] = {
2531 values
[2 * chan
+ 1]
2533 LLVMValueRef packed
;
2535 packed
= packf(&ctx
->ac
, pack_args
);
2536 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2538 args
->compr
= 1; /* COMPR flag */
2542 for (chan
= 0; chan
< 2; chan
++) {
2543 LLVMValueRef pack_args
[2] = {
2544 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2545 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2547 LLVMValueRef packed
;
2549 packed
= packi(&ctx
->ac
, pack_args
,
2550 is_int8
? 8 : is_int10
? 10 : 16,
2552 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2554 args
->compr
= 1; /* COMPR flag */
2558 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2561 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2563 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2564 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2565 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2566 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2567 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2568 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2569 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2570 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2572 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2575 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2576 SI_PARAM_ALPHA_REF
);
2577 LLVMValueRef alpha_pass
=
2578 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2579 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2581 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2585 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2587 unsigned samplemask_param
)
2589 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2590 LLVMValueRef coverage
;
2592 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2593 coverage
= LLVMGetParam(ctx
->main_fn
,
2595 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2597 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2599 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2601 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2604 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2605 LLVMConstReal(ctx
->f32
,
2606 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2608 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2611 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2612 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2616 unsigned const_chan
;
2617 LLVMValueRef base_elt
;
2618 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2619 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2620 SI_VS_CONST_CLIP_PLANES
, 0);
2621 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2623 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2624 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2629 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2631 /* Compute dot products of position and user clip plane vectors */
2632 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2633 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2635 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2636 const_chan
) * 4, 0);
2637 base_elt
= buffer_load_const(ctx
, const_resource
,
2639 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2640 out_elts
[const_chan
], args
->out
[chan
]);
2644 args
->enabled_channels
= 0xf;
2645 args
->valid_mask
= 0;
2647 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2652 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2656 if (so
->num_outputs
)
2657 fprintf(stderr
, "STREAMOUT\n");
2659 for (i
= 0; i
< so
->num_outputs
; i
++) {
2660 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2661 so
->output
[i
].start_component
;
2662 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2663 i
, so
->output
[i
].output_buffer
,
2664 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2665 so
->output
[i
].register_index
,
2666 mask
& 1 ? "x" : "",
2667 mask
& 2 ? "y" : "",
2668 mask
& 4 ? "z" : "",
2669 mask
& 8 ? "w" : "");
2673 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2674 LLVMValueRef
const *so_buffers
,
2675 LLVMValueRef
const *so_write_offsets
,
2676 struct pipe_stream_output
*stream_out
,
2677 struct si_shader_output_values
*shader_out
)
2679 unsigned buf_idx
= stream_out
->output_buffer
;
2680 unsigned start
= stream_out
->start_component
;
2681 unsigned num_comps
= stream_out
->num_components
;
2682 LLVMValueRef out
[4];
2684 assert(num_comps
&& num_comps
<= 4);
2685 if (!num_comps
|| num_comps
> 4)
2688 /* Load the output as int. */
2689 for (int j
= 0; j
< num_comps
; j
++) {
2690 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2692 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2695 /* Pack the output. */
2696 LLVMValueRef vdata
= NULL
;
2698 switch (num_comps
) {
2699 case 1: /* as i32 */
2702 case 2: /* as v2i32 */
2703 case 3: /* as v3i32 */
2704 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2705 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2708 /* as v4i32 (aligned to 4) */
2709 out
[3] = LLVMGetUndef(ctx
->i32
);
2711 case 4: /* as v4i32 */
2712 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2716 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2718 so_write_offsets
[buf_idx
],
2720 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
, false);
2724 * Write streamout data to buffers for vertex stream @p stream (different
2725 * vertex streams can occur for GS copy shaders).
2727 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2728 struct si_shader_output_values
*outputs
,
2729 unsigned noutput
, unsigned stream
)
2731 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2732 struct pipe_stream_output_info
*so
= &sel
->so
;
2733 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2736 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2737 LLVMValueRef so_vtx_count
=
2738 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2740 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2742 /* can_emit = tid < so_vtx_count; */
2743 LLVMValueRef can_emit
=
2744 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2746 /* Emit the streamout code conditionally. This actually avoids
2747 * out-of-bounds buffer access. The hw tells us via the SGPR
2748 * (so_vtx_count) which threads are allowed to emit streamout data. */
2749 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2751 /* The buffer offset is computed as follows:
2752 * ByteOffset = streamout_offset[buffer_id]*4 +
2753 * (streamout_write_index + thread_id)*stride[buffer_id] +
2757 LLVMValueRef so_write_index
=
2758 LLVMGetParam(ctx
->main_fn
,
2759 ctx
->param_streamout_write_index
);
2761 /* Compute (streamout_write_index + thread_id). */
2762 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2764 /* Load the descriptor and compute the write offset for each
2765 * enabled buffer. */
2766 LLVMValueRef so_write_offset
[4] = {};
2767 LLVMValueRef so_buffers
[4];
2768 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2769 ctx
->param_rw_buffers
);
2771 for (i
= 0; i
< 4; i
++) {
2775 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2776 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2778 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2780 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2781 ctx
->param_streamout_offset
[i
]);
2782 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2784 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2785 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2789 /* Write streamout data. */
2790 for (i
= 0; i
< so
->num_outputs
; i
++) {
2791 unsigned reg
= so
->output
[i
].register_index
;
2796 if (stream
!= so
->output
[i
].stream
)
2799 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2800 &so
->output
[i
], &outputs
[reg
]);
2803 ac_build_endif(&ctx
->ac
, 6501);
2806 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2807 LLVMValueRef
*values
)
2809 struct ac_export_args args
;
2811 si_llvm_init_export_args(ctx
, values
,
2812 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2813 ac_build_export(&ctx
->ac
, &args
);
2816 static void si_build_param_exports(struct si_shader_context
*ctx
,
2817 struct si_shader_output_values
*outputs
,
2820 struct si_shader
*shader
= ctx
->shader
;
2821 unsigned param_count
= 0;
2823 for (unsigned i
= 0; i
< noutput
; i
++) {
2824 unsigned semantic_name
= outputs
[i
].semantic_name
;
2825 unsigned semantic_index
= outputs
[i
].semantic_index
;
2827 if (outputs
[i
].vertex_stream
[0] != 0 &&
2828 outputs
[i
].vertex_stream
[1] != 0 &&
2829 outputs
[i
].vertex_stream
[2] != 0 &&
2830 outputs
[i
].vertex_stream
[3] != 0)
2833 switch (semantic_name
) {
2834 case TGSI_SEMANTIC_LAYER
:
2835 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2836 case TGSI_SEMANTIC_CLIPDIST
:
2837 case TGSI_SEMANTIC_COLOR
:
2838 case TGSI_SEMANTIC_BCOLOR
:
2839 case TGSI_SEMANTIC_PRIMID
:
2840 case TGSI_SEMANTIC_FOG
:
2841 case TGSI_SEMANTIC_TEXCOORD
:
2842 case TGSI_SEMANTIC_GENERIC
:
2848 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2849 semantic_index
< SI_MAX_IO_GENERIC
) &&
2850 shader
->key
.opt
.kill_outputs
&
2851 (1ull << si_shader_io_get_unique_index(semantic_name
,
2852 semantic_index
, true)))
2855 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2857 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2858 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2861 shader
->info
.nr_param_exports
= param_count
;
2865 * Vertex color clamping.
2867 * This uses a state constant loaded in a user data SGPR and
2868 * an IF statement is added that clamps all colors if the constant
2871 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2872 struct si_shader_output_values
*outputs
,
2875 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2876 bool has_colors
= false;
2878 /* Store original colors to alloca variables. */
2879 for (unsigned i
= 0; i
< noutput
; i
++) {
2880 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2881 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2884 for (unsigned j
= 0; j
< 4; j
++) {
2885 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2886 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2894 /* The state is in the first bit of the user SGPR. */
2895 LLVMValueRef cond
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2896 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2898 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2900 /* Store clamped colors to alloca variables within the conditional block. */
2901 for (unsigned i
= 0; i
< noutput
; i
++) {
2902 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2903 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2906 for (unsigned j
= 0; j
< 4; j
++) {
2907 LLVMBuildStore(ctx
->ac
.builder
,
2908 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2912 ac_build_endif(&ctx
->ac
, 6502);
2914 /* Load clamped colors */
2915 for (unsigned i
= 0; i
< noutput
; i
++) {
2916 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2917 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2920 for (unsigned j
= 0; j
< 4; j
++) {
2921 outputs
[i
].values
[j
] =
2922 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2927 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2928 * (position and parameter data only).
2930 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2931 struct si_shader_output_values
*outputs
,
2934 struct si_shader
*shader
= ctx
->shader
;
2935 struct ac_export_args pos_args
[4] = {};
2936 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2940 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2942 /* Build position exports. */
2943 for (i
= 0; i
< noutput
; i
++) {
2944 switch (outputs
[i
].semantic_name
) {
2945 case TGSI_SEMANTIC_POSITION
:
2946 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2947 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2949 case TGSI_SEMANTIC_PSIZE
:
2950 psize_value
= outputs
[i
].values
[0];
2952 case TGSI_SEMANTIC_LAYER
:
2953 layer_value
= outputs
[i
].values
[0];
2955 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2956 viewport_index_value
= outputs
[i
].values
[0];
2958 case TGSI_SEMANTIC_EDGEFLAG
:
2959 edgeflag_value
= outputs
[i
].values
[0];
2961 case TGSI_SEMANTIC_CLIPDIST
:
2962 if (!shader
->key
.opt
.clip_disable
) {
2963 unsigned index
= 2 + outputs
[i
].semantic_index
;
2964 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2965 V_008DFC_SQ_EXP_POS
+ index
,
2969 case TGSI_SEMANTIC_CLIPVERTEX
:
2970 if (!shader
->key
.opt
.clip_disable
) {
2971 si_llvm_emit_clipvertex(ctx
, pos_args
,
2978 /* We need to add the position output manually if it's missing. */
2979 if (!pos_args
[0].out
[0]) {
2980 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2981 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2982 pos_args
[0].done
= 0; /* last export? */
2983 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2984 pos_args
[0].compr
= 0; /* COMPR flag */
2985 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2986 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2987 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2988 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2991 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2992 if (shader
->selector
->info
.writes_psize
||
2993 shader
->selector
->pos_writes_edgeflag
||
2994 shader
->selector
->info
.writes_viewport_index
||
2995 shader
->selector
->info
.writes_layer
) {
2996 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2997 (shader
->selector
->pos_writes_edgeflag
<< 1) |
2998 (shader
->selector
->info
.writes_layer
<< 2);
3000 pos_args
[1].valid_mask
= 0; /* EXEC mask */
3001 pos_args
[1].done
= 0; /* last export? */
3002 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
3003 pos_args
[1].compr
= 0; /* COMPR flag */
3004 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
3005 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
3006 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
3007 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
3009 if (shader
->selector
->info
.writes_psize
)
3010 pos_args
[1].out
[0] = psize_value
;
3012 if (shader
->selector
->pos_writes_edgeflag
) {
3013 /* The output is a float, but the hw expects an integer
3014 * with the first bit containing the edge flag. */
3015 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
3018 edgeflag_value
= ac_build_umin(&ctx
->ac
,
3022 /* The LLVM intrinsic expects a float. */
3023 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
3026 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3027 /* GFX9 has the layer in out.z[10:0] and the viewport
3028 * index in out.z[19:16].
3030 if (shader
->selector
->info
.writes_layer
)
3031 pos_args
[1].out
[2] = layer_value
;
3033 if (shader
->selector
->info
.writes_viewport_index
) {
3034 LLVMValueRef v
= viewport_index_value
;
3036 v
= ac_to_integer(&ctx
->ac
, v
);
3037 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3038 LLVMConstInt(ctx
->i32
, 16, 0), "");
3039 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3040 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3041 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3042 pos_args
[1].enabled_channels
|= 1 << 2;
3045 if (shader
->selector
->info
.writes_layer
)
3046 pos_args
[1].out
[2] = layer_value
;
3048 if (shader
->selector
->info
.writes_viewport_index
) {
3049 pos_args
[1].out
[3] = viewport_index_value
;
3050 pos_args
[1].enabled_channels
|= 1 << 3;
3055 for (i
= 0; i
< 4; i
++)
3056 if (pos_args
[i
].out
[0])
3057 shader
->info
.nr_pos_exports
++;
3059 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3060 * Setting valid_mask=1 prevents it and has no other effect.
3062 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3063 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3064 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3065 pos_args
[0].valid_mask
= 1;
3068 for (i
= 0; i
< 4; i
++) {
3069 if (!pos_args
[i
].out
[0])
3072 /* Specify the target we are exporting */
3073 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3075 if (pos_idx
== shader
->info
.nr_pos_exports
)
3076 /* Specify that this is the last export */
3077 pos_args
[i
].done
= 1;
3079 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3082 /* Build parameter exports. */
3083 si_build_param_exports(ctx
, outputs
, noutput
);
3087 * Forward all outputs from the vertex shader to the TES. This is only used
3088 * for the fixed function TCS.
3090 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3092 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3093 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3094 LLVMValueRef lds_vertex_stride
, lds_base
;
3097 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3098 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3099 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3101 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3102 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3103 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3106 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3108 unsigned i
= u_bit_scan64(&inputs
);
3110 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3111 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3114 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3115 get_rel_patch_id(ctx
),
3117 LLVMConstInt(ctx
->i32
, i
, 0));
3119 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3121 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3122 buffer_offset
, 0, ac_glc
, false);
3126 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3127 LLVMValueRef rel_patch_id
,
3128 LLVMValueRef invocation_id
,
3129 LLVMValueRef tcs_out_current_patch_data_offset
,
3130 LLVMValueRef invoc0_tf_outer
[4],
3131 LLVMValueRef invoc0_tf_inner
[2])
3133 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3134 struct si_shader
*shader
= ctx
->shader
;
3135 unsigned tess_inner_index
, tess_outer_index
;
3136 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3137 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3138 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3140 /* Add a barrier before loading tess factors from LDS. */
3141 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3142 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3144 /* Do this only for invocation 0, because the tess levels are per-patch,
3147 * This can't jump, because invocation 0 executes this. It should
3148 * at least mask out the loads and stores for other invocations.
3150 ac_build_ifcc(&ctx
->ac
,
3151 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3152 invocation_id
, ctx
->i32_0
, ""), 6503);
3154 /* Determine the layout of one tess factor element in the buffer. */
3155 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3156 case PIPE_PRIM_LINES
:
3157 stride
= 2; /* 2 dwords, 1 vec2 store */
3161 case PIPE_PRIM_TRIANGLES
:
3162 stride
= 4; /* 4 dwords, 1 vec4 store */
3166 case PIPE_PRIM_QUADS
:
3167 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3176 for (i
= 0; i
< 4; i
++) {
3177 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3178 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3181 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3182 /* Tess factors are in VGPRs. */
3183 for (i
= 0; i
< outer_comps
; i
++)
3184 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3185 for (i
= 0; i
< inner_comps
; i
++)
3186 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3188 /* Load tess_inner and tess_outer from LDS.
3189 * Any invocation can write them, so we can't get them from a temporary.
3191 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3192 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3194 lds_base
= tcs_out_current_patch_data_offset
;
3195 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3196 LLVMConstInt(ctx
->i32
,
3197 tess_inner_index
* 4, 0), "");
3198 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3199 LLVMConstInt(ctx
->i32
,
3200 tess_outer_index
* 4, 0), "");
3202 for (i
= 0; i
< outer_comps
; i
++) {
3204 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3206 for (i
= 0; i
< inner_comps
; i
++) {
3207 inner
[i
] = out
[outer_comps
+i
] =
3208 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3212 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3213 /* For isolines, the hardware expects tess factors in the
3214 * reverse order from what GLSL / TGSI specify.
3216 LLVMValueRef tmp
= out
[0];
3221 /* Convert the outputs to vectors for stores. */
3222 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3226 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3228 /* Get the buffer. */
3229 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3231 /* Get the offset. */
3232 tf_base
= LLVMGetParam(ctx
->main_fn
,
3233 ctx
->param_tcs_factor_offset
);
3234 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3235 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3237 ac_build_ifcc(&ctx
->ac
,
3238 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3239 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3241 /* Store the dynamic HS control word. */
3243 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3244 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3245 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3246 1, ctx
->i32_0
, tf_base
,
3247 offset
, ac_glc
, false);
3251 ac_build_endif(&ctx
->ac
, 6504);
3253 /* Store the tessellation factors. */
3254 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3255 MIN2(stride
, 4), byteoffset
, tf_base
,
3256 offset
, ac_glc
, false);
3259 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3260 stride
- 4, byteoffset
, tf_base
,
3261 offset
, ac_glc
, false);
3263 /* Store the tess factors into the offchip buffer if TES reads them. */
3264 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3265 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3266 LLVMValueRef tf_inner_offset
;
3267 unsigned param_outer
, param_inner
;
3269 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3270 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3272 param_outer
= si_shader_io_get_unique_index_patch(
3273 TGSI_SEMANTIC_TESSOUTER
, 0);
3274 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3275 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3277 unsigned outer_vec_size
=
3278 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3279 outer_comps
: util_next_power_of_two(outer_comps
);
3280 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3282 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3283 outer_comps
, tf_outer_offset
,
3284 base
, 0, ac_glc
, false);
3286 param_inner
= si_shader_io_get_unique_index_patch(
3287 TGSI_SEMANTIC_TESSINNER
, 0);
3288 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3289 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3291 inner_vec
= inner_comps
== 1 ? inner
[0] :
3292 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3293 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3294 inner_comps
, tf_inner_offset
,
3295 base
, 0, ac_glc
, false);
3299 ac_build_endif(&ctx
->ac
, 6503);
3303 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3304 unsigned param
, unsigned return_index
)
3306 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3307 LLVMGetParam(ctx
->main_fn
, param
),
3312 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3313 unsigned param
, unsigned return_index
)
3315 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3316 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3318 return LLVMBuildInsertValue(builder
, ret
,
3319 ac_to_float(&ctx
->ac
, p
),
3324 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3325 unsigned param
, unsigned return_index
)
3327 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3328 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3329 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3330 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3333 /* This only writes the tessellation factor levels. */
3334 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3335 unsigned max_outputs
,
3336 LLVMValueRef
*addrs
)
3338 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3339 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3340 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3341 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3343 si_copy_tcs_inputs(bld_base
);
3345 rel_patch_id
= get_rel_patch_id(ctx
);
3346 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3347 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3349 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3350 LLVMBasicBlockRef blocks
[2] = {
3351 LLVMGetInsertBlock(builder
),
3352 ctx
->merged_wrap_if_entry_block
3354 LLVMValueRef values
[2];
3356 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3358 values
[0] = rel_patch_id
;
3359 values
[1] = LLVMGetUndef(ctx
->i32
);
3360 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3362 values
[0] = tf_lds_offset
;
3363 values
[1] = LLVMGetUndef(ctx
->i32
);
3364 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3366 values
[0] = invocation_id
;
3367 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3368 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3371 /* Return epilog parameters from this function. */
3372 LLVMValueRef ret
= ctx
->return_value
;
3375 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3376 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3377 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3378 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3379 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3380 /* Tess offchip and tess factor offsets are at the beginning. */
3381 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3382 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3383 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3385 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3386 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3387 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3388 GFX6_SGPR_TCS_OUT_LAYOUT
);
3389 /* Tess offchip and tess factor offsets are after user SGPRs. */
3390 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3391 GFX6_TCS_NUM_USER_SGPR
);
3392 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3393 GFX6_TCS_NUM_USER_SGPR
+ 1);
3394 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3398 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3399 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3400 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3402 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3403 * the invocation_id output does not alias the tcs_rel_ids input,
3404 * which saves a V_MOV on gfx9.
3408 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3409 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3411 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3412 vgpr
++; /* skip the tess factor LDS offset */
3413 for (unsigned i
= 0; i
< 6; i
++) {
3414 LLVMValueRef value
=
3415 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3416 value
= ac_to_float(&ctx
->ac
, value
);
3417 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3420 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3422 ctx
->return_value
= ret
;
3425 /* Pass TCS inputs from LS to TCS on GFX9. */
3426 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3428 LLVMValueRef ret
= ctx
->return_value
;
3430 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3431 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3432 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3433 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3434 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3435 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3437 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3438 8 + SI_SGPR_RW_BUFFERS
);
3439 ret
= si_insert_input_ptr(ctx
, ret
,
3440 ctx
->param_bindless_samplers_and_images
,
3441 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3443 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3444 8 + SI_SGPR_VS_STATE_BITS
);
3446 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3447 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3448 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3449 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3450 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3451 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3453 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3454 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3455 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3457 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3458 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3460 ctx
->return_value
= ret
;
3463 /* Pass GS inputs from ES to GS on GFX9. */
3464 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3466 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3467 LLVMValueRef ret
= ctx
->return_value
;
3469 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3470 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3471 if (ctx
->shader
->key
.as_ngg
)
3472 ret
= LLVMBuildInsertValue(builder
, ret
, ctx
->gs_tg_info
, 2, "");
3474 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3475 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3476 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3478 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3479 8 + SI_SGPR_RW_BUFFERS
);
3480 ret
= si_insert_input_ptr(ctx
, ret
,
3481 ctx
->param_bindless_samplers_and_images
,
3482 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3483 if (ctx
->screen
->use_ngg
) {
3484 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
,
3485 8 + SI_SGPR_VS_STATE_BITS
);
3489 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3490 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3492 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3494 for (unsigned i
= 0; i
< 5; i
++) {
3495 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3496 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3498 ctx
->return_value
= ret
;
3501 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3502 unsigned max_outputs
,
3503 LLVMValueRef
*addrs
)
3505 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3506 struct si_shader
*shader
= ctx
->shader
;
3507 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3509 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3510 ctx
->param_rel_auto_id
);
3511 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3512 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3513 vertex_dw_stride
, "");
3515 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3516 * its inputs from it. */
3517 for (i
= 0; i
< info
->num_outputs
; i
++) {
3518 unsigned name
= info
->output_semantic_name
[i
];
3519 unsigned index
= info
->output_semantic_index
[i
];
3521 /* The ARB_shader_viewport_layer_array spec contains the
3524 * 2) What happens if gl_ViewportIndex or gl_Layer is
3525 * written in the vertex shader and a geometry shader is
3528 * RESOLVED: The value written by the last vertex processing
3529 * stage is used. If the last vertex processing stage
3530 * (vertex, tessellation evaluation or geometry) does not
3531 * statically assign to gl_ViewportIndex or gl_Layer, index
3532 * or layer zero is assumed.
3534 * So writes to those outputs in VS-as-LS are simply ignored.
3536 if (name
== TGSI_SEMANTIC_LAYER
||
3537 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3540 int param
= si_shader_io_get_unique_index(name
, index
, false);
3541 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3542 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3544 for (chan
= 0; chan
< 4; chan
++) {
3545 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3548 lshs_lds_store(ctx
, chan
, dw_addr
,
3549 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3553 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3554 si_set_ls_return_value_for_tcs(ctx
);
3557 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3558 unsigned max_outputs
,
3559 LLVMValueRef
*addrs
)
3561 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3562 struct si_shader
*es
= ctx
->shader
;
3563 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3564 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3565 ctx
->param_es2gs_offset
);
3566 LLVMValueRef lds_base
= NULL
;
3570 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3571 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3572 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3573 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3574 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3575 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3576 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3577 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3578 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3581 for (i
= 0; i
< info
->num_outputs
; i
++) {
3584 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3585 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3588 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3589 info
->output_semantic_index
[i
], false);
3591 for (chan
= 0; chan
< 4; chan
++) {
3592 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3595 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3596 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3598 /* GFX9 has the ESGS ring in LDS. */
3599 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3600 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3601 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3602 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3606 ac_build_buffer_store_dword(&ctx
->ac
,
3608 out_val
, 1, NULL
, soffset
,
3609 (4 * param
+ chan
) * 4,
3610 ac_glc
| ac_slc
, true);
3614 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3615 si_set_es_return_value_for_gs(ctx
);
3618 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3620 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3621 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3623 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3626 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3628 if (ctx
->shader
->key
.as_ngg
) {
3629 gfx10_ngg_gs_emit_epilogue(ctx
);
3633 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3634 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3636 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3637 si_get_gs_wave_id(ctx
));
3639 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3640 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3643 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3644 unsigned max_outputs
,
3645 LLVMValueRef
*addrs
)
3647 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3648 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3650 assert(info
->num_outputs
<= max_outputs
);
3652 emit_gs_epilogue(ctx
);
3655 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3657 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3658 emit_gs_epilogue(ctx
);
3661 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3662 unsigned max_outputs
,
3663 LLVMValueRef
*addrs
)
3665 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3666 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3667 struct si_shader_output_values
*outputs
= NULL
;
3670 assert(!ctx
->shader
->is_gs_copy_shader
);
3671 assert(info
->num_outputs
<= max_outputs
);
3673 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3675 for (i
= 0; i
< info
->num_outputs
; i
++) {
3676 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3677 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3679 for (j
= 0; j
< 4; j
++) {
3680 outputs
[i
].values
[j
] =
3681 LLVMBuildLoad(ctx
->ac
.builder
,
3684 outputs
[i
].vertex_stream
[j
] =
3685 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3689 if (!ctx
->screen
->use_ngg_streamout
&&
3690 ctx
->shader
->selector
->so
.num_outputs
)
3691 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3693 /* Export PrimitiveID. */
3694 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3695 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3696 outputs
[i
].semantic_index
= 0;
3697 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3698 for (j
= 1; j
< 4; j
++)
3699 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3701 memset(outputs
[i
].vertex_stream
, 0,
3702 sizeof(outputs
[i
].vertex_stream
));
3706 si_llvm_export_vs(ctx
, outputs
, i
);
3710 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3711 unsigned max_outputs
,
3712 LLVMValueRef
*addrs
)
3714 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3715 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3716 LLVMValueRef pos
[4] = {};
3718 assert(info
->num_outputs
<= max_outputs
);
3720 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3721 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3724 for (unsigned chan
= 0; chan
< 4; chan
++)
3725 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3728 assert(pos
[0] != NULL
);
3730 /* Return the position output. */
3731 LLVMValueRef ret
= ctx
->return_value
;
3732 for (unsigned chan
= 0; chan
< 4; chan
++)
3733 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3734 ctx
->return_value
= ret
;
3737 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3739 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3741 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3742 &ctx
->outputs
[0][0]);
3745 struct si_ps_exports
{
3747 struct ac_export_args args
[10];
3750 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3751 LLVMValueRef depth
, LLVMValueRef stencil
,
3752 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3754 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3755 struct ac_export_args args
;
3757 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3759 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3762 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3763 LLVMValueRef
*color
, unsigned index
,
3764 unsigned samplemask_param
,
3765 bool is_last
, struct si_ps_exports
*exp
)
3767 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3771 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3772 for (i
= 0; i
< 4; i
++)
3773 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3776 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3777 color
[3] = ctx
->ac
.f32_1
;
3781 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3782 si_alpha_test(bld_base
, color
[3]);
3784 /* Line & polygon smoothing */
3785 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3786 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3789 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3790 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3791 struct ac_export_args args
[8];
3794 /* Get the export arguments, also find out what the last one is. */
3795 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3796 si_llvm_init_export_args(ctx
, color
,
3797 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3798 if (args
[c
].enabled_channels
)
3802 /* Emit all exports. */
3803 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3804 if (is_last
&& last
== c
) {
3805 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3806 args
[c
].done
= 1; /* DONE bit */
3807 } else if (!args
[c
].enabled_channels
)
3808 continue; /* unnecessary NULL export */
3810 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3813 struct ac_export_args args
;
3816 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3819 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3820 args
.done
= 1; /* DONE bit */
3821 } else if (!args
.enabled_channels
)
3822 return; /* unnecessary NULL export */
3824 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3828 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3829 struct si_ps_exports
*exp
)
3831 for (unsigned i
= 0; i
< exp
->num
; i
++)
3832 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3836 * Return PS outputs in this order:
3838 * v[0:3] = color0.xyzw
3839 * v[4:7] = color1.xyzw
3844 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3846 * The alpha-ref SGPR is returned via its original location.
3848 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3849 unsigned max_outputs
,
3850 LLVMValueRef
*addrs
)
3852 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3853 struct si_shader
*shader
= ctx
->shader
;
3854 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3855 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3856 unsigned i
, j
, first_vgpr
, vgpr
;
3858 LLVMValueRef color
[8][4] = {};
3859 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3862 if (ctx
->postponed_kill
)
3863 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3865 /* Read the output values. */
3866 for (i
= 0; i
< info
->num_outputs
; i
++) {
3867 unsigned semantic_name
= info
->output_semantic_name
[i
];
3868 unsigned semantic_index
= info
->output_semantic_index
[i
];
3870 switch (semantic_name
) {
3871 case TGSI_SEMANTIC_COLOR
:
3872 assert(semantic_index
< 8);
3873 for (j
= 0; j
< 4; j
++) {
3874 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3875 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3876 color
[semantic_index
][j
] = result
;
3879 case TGSI_SEMANTIC_POSITION
:
3880 depth
= LLVMBuildLoad(builder
,
3881 addrs
[4 * i
+ 2], "");
3883 case TGSI_SEMANTIC_STENCIL
:
3884 stencil
= LLVMBuildLoad(builder
,
3885 addrs
[4 * i
+ 1], "");
3887 case TGSI_SEMANTIC_SAMPLEMASK
:
3888 samplemask
= LLVMBuildLoad(builder
,
3889 addrs
[4 * i
+ 0], "");
3892 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3897 /* Fill the return structure. */
3898 ret
= ctx
->return_value
;
3901 ret
= LLVMBuildInsertValue(builder
, ret
,
3902 ac_to_integer(&ctx
->ac
,
3903 LLVMGetParam(ctx
->main_fn
,
3904 SI_PARAM_ALPHA_REF
)),
3905 SI_SGPR_ALPHA_REF
, "");
3908 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3909 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3913 for (j
= 0; j
< 4; j
++)
3914 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3917 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3919 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3921 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3923 /* Add the input sample mask for smoothing at the end. */
3924 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3925 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3926 ret
= LLVMBuildInsertValue(builder
, ret
,
3927 LLVMGetParam(ctx
->main_fn
,
3928 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3930 ctx
->return_value
= ret
;
3933 static void membar_emit(
3934 const struct lp_build_tgsi_action
*action
,
3935 struct lp_build_tgsi_context
*bld_base
,
3936 struct lp_build_emit_data
*emit_data
)
3938 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3939 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3940 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3941 unsigned wait_flags
= 0;
3943 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3944 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3946 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3947 TGSI_MEMBAR_SHADER_BUFFER
|
3948 TGSI_MEMBAR_SHADER_IMAGE
))
3949 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3951 if (flags
& TGSI_MEMBAR_SHARED
)
3952 wait_flags
|= AC_WAIT_LGKM
;
3954 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3957 static void clock_emit(
3958 const struct lp_build_tgsi_action
*action
,
3959 struct lp_build_tgsi_context
*bld_base
,
3960 struct lp_build_emit_data
*emit_data
)
3962 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3963 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3965 emit_data
->output
[0] =
3966 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3967 emit_data
->output
[1] =
3968 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3971 static void si_llvm_emit_ddxy(
3972 const struct lp_build_tgsi_action
*action
,
3973 struct lp_build_tgsi_context
*bld_base
,
3974 struct lp_build_emit_data
*emit_data
)
3976 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3977 unsigned opcode
= emit_data
->info
->opcode
;
3982 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3983 mask
= AC_TID_MASK_LEFT
;
3984 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3985 mask
= AC_TID_MASK_TOP
;
3987 mask
= AC_TID_MASK_TOP_LEFT
;
3989 /* for DDX we want to next X pixel, DDY next Y pixel. */
3990 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3992 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3993 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3994 emit_data
->output
[emit_data
->chan
] = val
;
3997 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3998 struct lp_build_tgsi_context
*bld_base
,
3999 struct lp_build_emit_data
*emit_data
)
4001 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4002 struct si_shader
*shader
= ctx
->shader
;
4003 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4004 LLVMValueRef interp_param
;
4005 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4006 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4007 int input_base
, input_array_size
;
4010 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
4011 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
4012 int interp_param_idx
;
4016 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4017 /* offset is in second src, first two channels */
4018 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4020 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4022 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4023 LLVMValueRef sample_position
;
4024 LLVMValueRef sample_id
;
4025 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4027 /* fetch sample ID, then fetch its sample position,
4028 * and place into first two channels.
4030 sample_id
= lp_build_emit_fetch(bld_base
,
4031 emit_data
->inst
, 1, TGSI_CHAN_X
);
4032 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4034 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4035 * Language 4.50 spec says about interpolateAtSample:
4037 * "Returns the value of the input interpolant variable at
4038 * the location of sample number sample. If multisample
4039 * buffers are not available, the input variable will be
4040 * evaluated at the center of the pixel. If sample sample
4041 * does not exist, the position used to interpolate the
4042 * input variable is undefined."
4044 * This means that sample_id values outside of the valid are
4045 * in fact valid input, and the usual mechanism for loading the
4046 * sample position doesn't work.
4048 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4049 LLVMValueRef center
[4] = {
4050 LLVMConstReal(ctx
->f32
, 0.5),
4051 LLVMConstReal(ctx
->f32
, 0.5),
4056 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4058 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4061 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4064 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4065 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4067 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4070 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4072 if (input
->Register
.Indirect
) {
4073 unsigned array_id
= input
->Indirect
.ArrayID
;
4076 input_base
= info
->input_array_first
[array_id
];
4077 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4079 input_base
= inst
->Src
[0].Register
.Index
;
4080 input_array_size
= info
->num_inputs
- input_base
;
4083 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4084 1, input
->Register
.Index
- input_base
);
4086 input_base
= inst
->Src
[0].Register
.Index
;
4087 input_array_size
= 1;
4088 array_idx
= ctx
->i32_0
;
4091 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4093 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4094 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4095 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4097 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4099 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4100 if (interp_param_idx
== -1)
4102 else if (interp_param_idx
)
4103 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4105 interp_param
= NULL
;
4107 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4108 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4109 LLVMValueRef ij_out
[2];
4110 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4113 * take the I then J parameters, and the DDX/Y for it, and
4114 * calculate the IJ inputs for the interpolator.
4115 * temp1 = ddx * offset/sample.x + I;
4116 * interp_param.I = ddy * offset/sample.y + temp1;
4117 * temp1 = ddx * offset/sample.x + J;
4118 * interp_param.J = ddy * offset/sample.y + temp1;
4120 for (i
= 0; i
< 2; i
++) {
4121 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4122 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4123 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4124 ddxy_out
, ix_ll
, "");
4125 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4126 ddxy_out
, iy_ll
, "");
4127 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4128 interp_param
, ix_ll
, "");
4131 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4133 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4134 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4136 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4140 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4142 for (chan
= 0; chan
< 4; chan
++) {
4143 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4144 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4146 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4147 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4150 i
= LLVMBuildExtractElement(
4151 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4152 j
= LLVMBuildExtractElement(
4153 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4155 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4158 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4159 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4162 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4163 ctx
->ac
.builder
, gather
, array_idx
, "");
4167 static void vote_all_emit(
4168 const struct lp_build_tgsi_action
*action
,
4169 struct lp_build_tgsi_context
*bld_base
,
4170 struct lp_build_emit_data
*emit_data
)
4172 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4174 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4175 emit_data
->output
[emit_data
->chan
] =
4176 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4179 static void vote_any_emit(
4180 const struct lp_build_tgsi_action
*action
,
4181 struct lp_build_tgsi_context
*bld_base
,
4182 struct lp_build_emit_data
*emit_data
)
4184 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4186 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4187 emit_data
->output
[emit_data
->chan
] =
4188 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4191 static void vote_eq_emit(
4192 const struct lp_build_tgsi_action
*action
,
4193 struct lp_build_tgsi_context
*bld_base
,
4194 struct lp_build_emit_data
*emit_data
)
4196 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4198 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4199 emit_data
->output
[emit_data
->chan
] =
4200 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4203 static void ballot_emit(
4204 const struct lp_build_tgsi_action
*action
,
4205 struct lp_build_tgsi_context
*bld_base
,
4206 struct lp_build_emit_data
*emit_data
)
4208 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4209 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4212 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4213 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4215 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4217 if (ctx
->ac
.wave_size
== 32) {
4218 emit_data
->output
[1] = ctx
->i32_0
;
4220 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4221 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4225 static void read_lane_emit(
4226 const struct lp_build_tgsi_action
*action
,
4227 struct lp_build_tgsi_context
*bld_base
,
4228 struct lp_build_emit_data
*emit_data
)
4230 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4232 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4233 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4234 0, emit_data
->src_chan
);
4236 /* Always read the source invocation (= lane) from the X channel. */
4237 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4239 emit_data
->arg_count
= 2;
4242 /* We currently have no other way to prevent LLVM from lifting the icmp
4243 * calls to a dominating basic block.
4245 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4247 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4248 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4250 emit_data
->output
[emit_data
->chan
] =
4251 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4252 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4253 AC_FUNC_ATTR_READNONE
|
4254 AC_FUNC_ATTR_CONVERGENT
);
4257 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4258 struct lp_build_emit_data
*emit_data
)
4260 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4261 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4265 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4267 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4268 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4272 /* Emit one vertex from the geometry shader */
4273 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4275 LLVMValueRef
*addrs
)
4277 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4279 if (ctx
->shader
->key
.as_ngg
) {
4280 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4284 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4285 struct si_shader
*shader
= ctx
->shader
;
4286 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4287 ctx
->param_gs2vs_offset
);
4288 LLVMValueRef gs_next_vertex
;
4289 LLVMValueRef can_emit
;
4290 unsigned chan
, offset
;
4293 /* Write vertex attribute values to GSVS ring */
4294 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4295 ctx
->gs_next_vertex
[stream
],
4298 /* If this thread has already emitted the declared maximum number of
4299 * vertices, skip the write: excessive vertex emissions are not
4300 * supposed to have any effect.
4302 * If the shader has no writes to memory, kill it instead. This skips
4303 * further memory loads and may allow LLVM to skip to the end
4306 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4307 LLVMConstInt(ctx
->i32
,
4308 shader
->selector
->gs_max_out_vertices
, 0), "");
4310 bool use_kill
= !info
->writes_memory
;
4312 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4314 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4318 for (i
= 0; i
< info
->num_outputs
; i
++) {
4319 for (chan
= 0; chan
< 4; chan
++) {
4320 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4321 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4324 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4325 LLVMValueRef voffset
=
4326 LLVMConstInt(ctx
->i32
, offset
*
4327 shader
->selector
->gs_max_out_vertices
, 0);
4330 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4331 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4332 LLVMConstInt(ctx
->i32
, 4, 0), "");
4334 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4336 ac_build_buffer_store_dword(&ctx
->ac
,
4337 ctx
->gsvs_ring
[stream
],
4339 voffset
, soffset
, 0,
4340 ac_glc
| ac_slc
, true);
4344 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4345 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4347 /* Signal vertex emission if vertex data was written. */
4349 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4350 si_get_gs_wave_id(ctx
));
4354 ac_build_endif(&ctx
->ac
, 6505);
4357 /* Emit one vertex from the geometry shader */
4358 static void si_tgsi_emit_vertex(
4359 const struct lp_build_tgsi_action
*action
,
4360 struct lp_build_tgsi_context
*bld_base
,
4361 struct lp_build_emit_data
*emit_data
)
4363 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4364 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4366 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4369 /* Cut one primitive from the geometry shader */
4370 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4373 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4375 if (ctx
->shader
->key
.as_ngg
) {
4376 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4380 /* Signal primitive cut */
4381 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4382 si_get_gs_wave_id(ctx
));
4385 /* Cut one primitive from the geometry shader */
4386 static void si_tgsi_emit_primitive(
4387 const struct lp_build_tgsi_action
*action
,
4388 struct lp_build_tgsi_context
*bld_base
,
4389 struct lp_build_emit_data
*emit_data
)
4391 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4393 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4396 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4397 struct lp_build_tgsi_context
*bld_base
,
4398 struct lp_build_emit_data
*emit_data
)
4400 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4402 /* GFX6 only (thanks to a hw bug workaround):
4403 * The real barrier instruction isn’t needed, because an entire patch
4404 * always fits into a single wave.
4406 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4407 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4408 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4412 ac_build_s_barrier(&ctx
->ac
);
4415 void si_create_function(struct si_shader_context
*ctx
,
4417 LLVMTypeRef
*returns
, unsigned num_returns
,
4418 struct si_function_info
*fninfo
,
4419 unsigned max_workgroup_size
)
4423 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4424 fninfo
->types
, fninfo
->num_params
);
4425 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4427 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4428 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4430 /* The combination of:
4434 * allows the optimization passes to move loads and reduces
4435 * SGPR spilling significantly.
4437 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4438 AC_FUNC_ATTR_INREG
);
4440 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4441 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4442 AC_FUNC_ATTR_NOALIAS
);
4443 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4447 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4448 if (fninfo
->assign
[i
])
4449 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4452 if (ctx
->screen
->info
.address32_hi
) {
4453 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4454 "amdgpu-32bit-address-high-bits",
4455 ctx
->screen
->info
.address32_hi
);
4458 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4460 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4461 "no-signed-zeros-fp-math",
4465 static void declare_streamout_params(struct si_shader_context
*ctx
,
4466 struct pipe_stream_output_info
*so
,
4467 struct si_function_info
*fninfo
)
4469 if (ctx
->screen
->use_ngg_streamout
)
4472 /* Streamout SGPRs. */
4473 if (so
->num_outputs
) {
4474 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4475 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4477 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4479 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4481 /* A streamout buffer offset is loaded if the stride is non-zero. */
4482 for (int i
= 0; i
< 4; i
++) {
4486 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4490 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4492 switch (shader
->selector
->type
) {
4493 case PIPE_SHADER_VERTEX
:
4494 case PIPE_SHADER_TESS_EVAL
:
4495 return shader
->key
.as_ngg
? 128 : 0;
4497 case PIPE_SHADER_TESS_CTRL
:
4498 /* Return this so that LLVM doesn't remove s_barrier
4499 * instructions on chips where we use s_barrier. */
4500 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4502 case PIPE_SHADER_GEOMETRY
:
4503 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4505 case PIPE_SHADER_COMPUTE
:
4506 break; /* see below */
4512 const unsigned *properties
= shader
->selector
->info
.properties
;
4513 unsigned max_work_group_size
=
4514 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4515 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4516 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4518 if (!max_work_group_size
) {
4519 /* This is a variable group size compute shader,
4520 * compile it for the maximum possible group size.
4522 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4524 return max_work_group_size
;
4527 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4528 struct si_function_info
*fninfo
,
4531 LLVMTypeRef const_shader_buf_type
;
4533 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4534 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4535 const_shader_buf_type
= ctx
->f32
;
4537 const_shader_buf_type
= ctx
->v4i32
;
4539 unsigned const_and_shader_buffers
=
4540 add_arg(fninfo
, ARG_SGPR
,
4541 ac_array_in_const32_addr_space(const_shader_buf_type
));
4544 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4547 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4548 struct si_function_info
*fninfo
,
4551 unsigned samplers_and_images
=
4552 add_arg(fninfo
, ARG_SGPR
,
4553 ac_array_in_const32_addr_space(ctx
->v8i32
));
4556 ctx
->param_samplers_and_images
= samplers_and_images
;
4559 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4560 struct si_function_info
*fninfo
,
4563 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4564 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4567 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4568 struct si_function_info
*fninfo
)
4570 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4571 ac_array_in_const32_addr_space(ctx
->v4i32
));
4572 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4573 ac_array_in_const32_addr_space(ctx
->v8i32
));
4576 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4577 struct si_function_info
*fninfo
)
4579 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4580 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4581 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4582 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4585 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4586 struct si_function_info
*fninfo
,
4587 unsigned *num_prolog_vgprs
)
4589 struct si_shader
*shader
= ctx
->shader
;
4591 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4592 if (shader
->key
.as_ls
) {
4593 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4594 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4595 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user VGPR */
4596 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4598 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4599 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4601 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4602 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr */
4603 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr or PrimID (legacy) */
4604 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4606 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4607 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4608 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4611 if (!shader
->is_gs_copy_shader
) {
4612 /* Vertex load indices. */
4613 ctx
->param_vertex_index0
= fninfo
->num_params
;
4614 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4615 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4616 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4620 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4621 struct si_function_info
*fninfo
,
4622 unsigned vs_blit_property
)
4624 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4625 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4626 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4627 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4629 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4630 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4631 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4632 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4633 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4634 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4635 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4636 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4637 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4638 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4639 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4640 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4644 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4645 struct si_function_info
*fninfo
)
4647 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4648 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4649 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4650 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4654 /* Convenient merged shader definitions. */
4655 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4656 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4659 static void create_function(struct si_shader_context
*ctx
)
4661 struct si_shader
*shader
= ctx
->shader
;
4662 struct si_function_info fninfo
;
4663 LLVMTypeRef returns
[16+32*4];
4664 unsigned i
, num_return_sgprs
;
4665 unsigned num_returns
= 0;
4666 unsigned num_prolog_vgprs
= 0;
4667 unsigned type
= ctx
->type
;
4668 unsigned vs_blit_property
=
4669 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4671 si_init_function_info(&fninfo
);
4673 /* Set MERGED shaders. */
4674 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4675 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4676 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4677 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4678 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4681 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4684 case PIPE_SHADER_VERTEX
:
4685 declare_global_desc_pointers(ctx
, &fninfo
);
4687 if (vs_blit_property
) {
4688 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4691 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4695 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4696 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4697 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4698 ac_array_in_const32_addr_space(ctx
->v4i32
));
4700 if (shader
->key
.as_es
) {
4701 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4702 } else if (shader
->key
.as_ls
) {
4703 /* no extra parameters */
4705 if (shader
->is_gs_copy_shader
) {
4706 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4707 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4710 /* The locations of the other parameters are assigned dynamically. */
4711 declare_streamout_params(ctx
, &shader
->selector
->so
,
4716 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4719 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4720 for (i
= 0; i
< 4; i
++)
4721 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4725 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4726 declare_global_desc_pointers(ctx
, &fninfo
);
4727 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4728 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4729 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4730 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4731 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4732 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4733 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4736 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4737 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4739 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4740 * placed after the user SGPRs.
4742 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4743 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4744 for (i
= 0; i
< 11; i
++)
4745 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4748 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4749 /* Merged stages have 8 system SGPRs at the beginning. */
4750 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4751 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4752 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4753 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4754 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4755 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4756 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4757 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4758 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4760 declare_global_desc_pointers(ctx
, &fninfo
);
4761 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4762 ctx
->type
== PIPE_SHADER_VERTEX
);
4763 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4765 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4766 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4767 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4768 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4769 ac_array_in_const32_addr_space(ctx
->v4i32
));
4771 /* VGPRs (first TCS, then VS) */
4772 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4773 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4775 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4776 declare_vs_input_vgprs(ctx
, &fninfo
,
4779 /* LS return values are inputs to the TCS main shader part. */
4780 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4781 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4782 for (i
= 0; i
< 2; i
++)
4783 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4785 /* TCS return values are inputs to the TCS epilog.
4787 * param_tcs_offchip_offset, param_tcs_factor_offset,
4788 * param_tcs_offchip_layout, and param_rw_buffers
4789 * should be passed to the epilog.
4791 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4792 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4793 for (i
= 0; i
< 11; i
++)
4794 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4798 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4799 /* Merged stages have 8 system SGPRs at the beginning. */
4800 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4801 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4802 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4804 if (ctx
->shader
->key
.as_ngg
)
4805 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->gs_tg_info
);
4807 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4809 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4810 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4811 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4812 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4813 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4815 declare_global_desc_pointers(ctx
, &fninfo
);
4816 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4817 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4818 (ctx
->type
== PIPE_SHADER_VERTEX
||
4819 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4822 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4823 if (vs_blit_property
)
4824 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4826 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4828 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4829 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4830 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4831 /* Declare as many input SGPRs as the VS has. */
4834 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4835 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4836 ac_array_in_const32_addr_space(ctx
->v4i32
));
4839 /* VGPRs (first GS, then VS/TES) */
4840 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4841 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4842 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4843 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4844 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4846 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4847 declare_vs_input_vgprs(ctx
, &fninfo
,
4849 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4850 declare_tes_input_vgprs(ctx
, &fninfo
);
4853 if (ctx
->shader
->key
.as_es
&&
4854 (ctx
->type
== PIPE_SHADER_VERTEX
||
4855 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4856 unsigned num_user_sgprs
;
4858 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4859 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4861 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4863 /* ES return values are inputs to GS. */
4864 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4865 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4866 for (i
= 0; i
< 5; i
++)
4867 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4871 case PIPE_SHADER_TESS_EVAL
:
4872 declare_global_desc_pointers(ctx
, &fninfo
);
4873 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4874 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4875 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4876 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4878 if (shader
->key
.as_es
) {
4879 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4880 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4881 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4883 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4884 declare_streamout_params(ctx
, &shader
->selector
->so
,
4886 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4890 declare_tes_input_vgprs(ctx
, &fninfo
);
4893 case PIPE_SHADER_GEOMETRY
:
4894 declare_global_desc_pointers(ctx
, &fninfo
);
4895 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4896 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4897 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4900 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4901 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4902 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4903 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4904 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4905 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4906 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4907 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4910 case PIPE_SHADER_FRAGMENT
:
4911 declare_global_desc_pointers(ctx
, &fninfo
);
4912 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4913 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4914 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4915 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4917 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4918 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4919 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4920 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4921 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4922 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4923 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4924 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4925 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4926 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4927 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4928 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4929 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4930 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4931 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4932 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4933 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4934 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4935 shader
->info
.face_vgpr_index
= 20;
4936 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4937 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4938 shader
->info
.ancillary_vgpr_index
= 21;
4939 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4940 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4941 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4943 /* Color inputs from the prolog. */
4944 if (shader
->selector
->info
.colors_read
) {
4945 unsigned num_color_elements
=
4946 util_bitcount(shader
->selector
->info
.colors_read
);
4948 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4949 for (i
= 0; i
< num_color_elements
; i
++)
4950 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4952 num_prolog_vgprs
+= num_color_elements
;
4955 /* Outputs for the epilog. */
4956 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4959 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4960 shader
->selector
->info
.writes_z
+
4961 shader
->selector
->info
.writes_stencil
+
4962 shader
->selector
->info
.writes_samplemask
+
4963 1 /* SampleMaskIn */;
4965 num_returns
= MAX2(num_returns
,
4967 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4969 for (i
= 0; i
< num_return_sgprs
; i
++)
4970 returns
[i
] = ctx
->i32
;
4971 for (; i
< num_returns
; i
++)
4972 returns
[i
] = ctx
->f32
;
4975 case PIPE_SHADER_COMPUTE
:
4976 declare_global_desc_pointers(ctx
, &fninfo
);
4977 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4978 if (shader
->selector
->info
.uses_grid_size
)
4979 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4980 if (shader
->selector
->info
.uses_block_size
&&
4981 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4982 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4984 unsigned cs_user_data_dwords
=
4985 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
4986 if (cs_user_data_dwords
) {
4987 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
4988 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
4991 for (i
= 0; i
< 3; i
++) {
4992 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4993 if (shader
->selector
->info
.uses_block_id
[i
])
4994 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4997 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
5000 assert(0 && "unimplemented shader");
5004 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
5005 si_get_max_workgroup_size(shader
));
5007 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5008 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
5009 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
5010 "InitialPSInputAddr",
5011 S_0286D0_PERSP_SAMPLE_ENA(1) |
5012 S_0286D0_PERSP_CENTER_ENA(1) |
5013 S_0286D0_PERSP_CENTROID_ENA(1) |
5014 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5015 S_0286D0_LINEAR_CENTER_ENA(1) |
5016 S_0286D0_LINEAR_CENTROID_ENA(1) |
5017 S_0286D0_FRONT_FACE_ENA(1) |
5018 S_0286D0_ANCILLARY_ENA(1) |
5019 S_0286D0_POS_FIXED_PT_ENA(1));
5022 shader
->info
.num_input_sgprs
= 0;
5023 shader
->info
.num_input_vgprs
= 0;
5025 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5026 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5028 for (; i
< fninfo
.num_params
; ++i
)
5029 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5031 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5032 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5034 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5035 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5036 /* The LSHS size is not known until draw time, so we append it
5037 * at the end of whatever LDS use there may be in the rest of
5038 * the shader (currently none, unless LLVM decides to do its
5039 * own LDS-based lowering).
5041 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
5042 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5043 "__lds_end", AC_ADDR_SPACE_LDS
);
5044 LLVMSetAlignment(ctx
->ac
.lds
, 256);
5046 ac_declare_lds_as_pointer(&ctx
->ac
);
5051 /* Ensure that the esgs ring is declared.
5053 * We declare it with 64KB alignment as a hint that the
5054 * pointer value will always be 0.
5056 static void declare_esgs_ring(struct si_shader_context
*ctx
)
5061 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
5063 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
5064 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5067 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
5068 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
5072 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5075 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5077 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5079 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5080 ctx
->param_rw_buffers
);
5082 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5083 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5085 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5087 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5090 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5092 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5093 /* Declare the ESGS ring as an explicit LDS symbol. */
5094 declare_esgs_ring(ctx
);
5096 ac_declare_lds_as_pointer(&ctx
->ac
);
5097 ctx
->esgs_ring
= ctx
->ac
.lds
;
5102 if (ctx
->shader
->is_gs_copy_shader
) {
5103 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5106 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5107 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5108 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5109 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5110 LLVMValueRef base_ring
;
5112 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5114 /* The conceptual layout of the GSVS ring is
5115 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5116 * but the real memory layout is swizzled across
5118 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5120 * Override the buffer descriptor accordingly.
5122 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5123 uint64_t stream_offset
= 0;
5125 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5126 unsigned num_components
;
5128 unsigned num_records
;
5129 LLVMValueRef ring
, tmp
;
5131 num_components
= sel
->info
.num_stream_output_components
[stream
];
5132 if (!num_components
)
5135 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5137 /* Limit on the stride field for <= GFX7. */
5138 assert(stride
< (1 << 14));
5140 num_records
= ctx
->ac
.wave_size
;
5142 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5143 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5144 tmp
= LLVMBuildAdd(builder
, tmp
,
5145 LLVMConstInt(ctx
->i64
,
5146 stream_offset
, 0), "");
5147 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5149 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5150 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5151 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5152 tmp
= LLVMBuildOr(builder
, tmp
,
5153 LLVMConstInt(ctx
->i32
,
5154 S_008F04_STRIDE(stride
) |
5155 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5156 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5157 ring
= LLVMBuildInsertElement(builder
, ring
,
5158 LLVMConstInt(ctx
->i32
, num_records
, 0),
5159 LLVMConstInt(ctx
->i32
, 2, 0), "");
5162 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5163 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5164 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5165 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5166 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5167 S_008F0C_ADD_TID_ENABLE(1);
5169 if (ctx
->ac
.chip_class
>= GFX10
) {
5170 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5171 S_008F0C_OOB_SELECT(2) |
5172 S_008F0C_RESOURCE_LEVEL(1);
5174 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5175 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5176 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5179 ring
= LLVMBuildInsertElement(builder
, ring
,
5180 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5181 LLVMConstInt(ctx
->i32
, 3, 0), "");
5183 ctx
->gsvs_ring
[stream
] = ring
;
5185 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5186 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5190 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5191 LLVMValueRef param_rw_buffers
,
5192 unsigned param_pos_fixed_pt
)
5194 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5195 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5197 /* Use the fixed-point gl_FragCoord input.
5198 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5199 * per coordinate to get the repeating effect.
5201 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5202 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5204 /* Load the buffer descriptor. */
5205 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5206 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5208 /* The stipple pattern is 32x32, each row has 32 bits. */
5209 offset
= LLVMBuildMul(builder
, address
[1],
5210 LLVMConstInt(ctx
->i32
, 4, 0), "");
5211 row
= buffer_load_const(ctx
, desc
, offset
);
5212 row
= ac_to_integer(&ctx
->ac
, row
);
5213 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5214 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5215 ac_build_kill_if_false(&ctx
->ac
, bit
);
5218 /* For the UMR disassembler. */
5219 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5220 #define DEBUGGER_NUM_MARKERS 5
5222 static bool si_shader_binary_open(struct si_screen
*screen
,
5223 struct si_shader
*shader
,
5224 struct ac_rtld_binary
*rtld
)
5226 const struct si_shader_selector
*sel
= shader
->selector
;
5227 const char *part_elfs
[5];
5228 size_t part_sizes
[5];
5229 unsigned num_parts
= 0;
5231 #define add_part(shader_or_part) \
5232 if (shader_or_part) { \
5233 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5234 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5238 add_part(shader
->prolog
);
5239 add_part(shader
->previous_stage
);
5240 add_part(shader
->prolog2
);
5242 add_part(shader
->epilog
);
5246 struct ac_rtld_symbol lds_symbols
[2];
5247 unsigned num_lds_symbols
= 0;
5249 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5250 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5251 /* We add this symbol even on LLVM <= 8 to ensure that
5252 * shader->config.lds_size is set correctly below.
5254 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5255 sym
->name
= "esgs_ring";
5256 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5257 sym
->align
= 64 * 1024;
5260 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5261 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5262 sym
->name
= "ngg_emit";
5263 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5267 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5268 .info
= &screen
->info
,
5270 .halt_at_entry
= screen
->options
.halt_shaders
,
5272 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5273 .wave_size
= si_get_shader_wave_size(shader
),
5274 .num_parts
= num_parts
,
5275 .elf_ptrs
= part_elfs
,
5276 .elf_sizes
= part_sizes
,
5277 .num_shared_lds_symbols
= num_lds_symbols
,
5278 .shared_lds_symbols
= lds_symbols
});
5280 if (rtld
->lds_size
> 0) {
5281 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5282 shader
->config
.lds_size
=
5283 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5289 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5291 struct ac_rtld_binary rtld
;
5292 si_shader_binary_open(screen
, shader
, &rtld
);
5293 return rtld
.rx_size
;
5296 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5298 uint64_t *scratch_va
= data
;
5300 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5301 *value
= (uint32_t)*scratch_va
;
5304 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5305 /* Enable scratch coalescing. */
5306 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5307 S_008F04_SWIZZLE_ENABLE(1);
5308 if (HAVE_LLVM
< 0x0800) {
5309 /* Old LLVM created an R_ABS32_HI relocation for
5319 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5320 uint64_t scratch_va
)
5322 struct ac_rtld_binary binary
;
5323 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5326 si_resource_reference(&shader
->bo
, NULL
);
5327 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5328 sscreen
->cpdma_prefetch_writes_memory
?
5329 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5330 PIPE_USAGE_IMMUTABLE
,
5331 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5337 struct ac_rtld_upload_info u
= {};
5339 u
.get_external_symbol
= si_get_external_symbol
;
5340 u
.cb_data
= &scratch_va
;
5341 u
.rx_va
= shader
->bo
->gpu_address
;
5342 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5343 PIPE_TRANSFER_READ_WRITE
|
5344 PIPE_TRANSFER_UNSYNCHRONIZED
|
5345 RADEON_TRANSFER_TEMPORARY
);
5349 bool ok
= ac_rtld_upload(&u
);
5351 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5352 ac_rtld_close(&binary
);
5357 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5358 const struct si_shader_binary
*binary
,
5359 enum pipe_shader_type shader_type
,
5361 struct pipe_debug_callback
*debug
,
5362 const char *name
, FILE *file
)
5364 struct ac_rtld_binary rtld_binary
;
5366 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5367 .info
= &screen
->info
,
5368 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5369 .wave_size
= wave_size
,
5371 .elf_ptrs
= &binary
->elf_buffer
,
5372 .elf_sizes
= &binary
->elf_size
}))
5378 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5381 if (nbytes
> INT_MAX
)
5384 if (debug
&& debug
->debug_message
) {
5385 /* Very long debug messages are cut off, so send the
5386 * disassembly one line at a time. This causes more
5387 * overhead, but on the plus side it simplifies
5388 * parsing of resulting logs.
5390 pipe_debug_message(debug
, SHADER_INFO
,
5391 "Shader Disassembly Begin");
5394 while (line
< nbytes
) {
5395 int count
= nbytes
- line
;
5396 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5398 count
= nl
- (disasm
+ line
);
5401 pipe_debug_message(debug
, SHADER_INFO
,
5402 "%.*s", count
, disasm
+ line
);
5408 pipe_debug_message(debug
, SHADER_INFO
,
5409 "Shader Disassembly End");
5413 fprintf(file
, "Shader %s disassembly:\n", name
);
5414 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5418 ac_rtld_close(&rtld_binary
);
5421 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5423 struct si_screen
*sscreen
= shader
->selector
->screen
;
5424 struct ac_shader_config
*conf
= &shader
->config
;
5425 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5426 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5427 unsigned lds_per_wave
= 0;
5428 unsigned max_simd_waves
;
5430 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5432 /* Compute LDS usage for PS. */
5433 switch (shader
->selector
->type
) {
5434 case PIPE_SHADER_FRAGMENT
:
5435 /* The minimum usage per wave is (num_inputs * 48). The maximum
5436 * usage is (num_inputs * 48 * 16).
5437 * We can get anything in between and it varies between waves.
5439 * The 48 bytes per input for a single primitive is equal to
5440 * 4 bytes/component * 4 components/input * 3 points.
5442 * Other stages don't know the size at compile time or don't
5443 * allocate LDS per wave, but instead they do it per thread group.
5445 lds_per_wave
= conf
->lds_size
* lds_increment
+
5446 align(num_inputs
* 48, lds_increment
);
5448 case PIPE_SHADER_COMPUTE
:
5449 if (shader
->selector
) {
5450 unsigned max_workgroup_size
=
5451 si_get_max_workgroup_size(shader
);
5452 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5453 DIV_ROUND_UP(max_workgroup_size
,
5454 sscreen
->compute_wave_size
);
5460 /* Compute the per-SIMD wave counts. */
5461 if (conf
->num_sgprs
) {
5463 MIN2(max_simd_waves
,
5464 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5467 if (conf
->num_vgprs
)
5468 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5470 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5471 * 16KB makes some SIMDs unoccupied). */
5473 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5475 shader
->info
.max_simd_waves
= max_simd_waves
;
5478 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5479 struct si_shader
*shader
,
5480 struct pipe_debug_callback
*debug
)
5482 const struct ac_shader_config
*conf
= &shader
->config
;
5484 if (screen
->options
.debug_disassembly
)
5485 si_shader_dump_disassembly(screen
, &shader
->binary
,
5486 shader
->selector
->type
,
5487 si_get_shader_wave_size(shader
),
5488 debug
, "main", NULL
);
5490 pipe_debug_message(debug
, SHADER_INFO
,
5491 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5492 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5493 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5494 conf
->num_sgprs
, conf
->num_vgprs
,
5495 si_get_shader_binary_size(screen
, shader
),
5496 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5497 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5498 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5501 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5502 struct si_shader
*shader
,
5504 bool check_debug_option
)
5506 const struct ac_shader_config
*conf
= &shader
->config
;
5508 if (!check_debug_option
||
5509 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5510 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5511 fprintf(file
, "*** SHADER CONFIG ***\n"
5512 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5513 "SPI_PS_INPUT_ENA = 0x%04x\n",
5514 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5517 fprintf(file
, "*** SHADER STATS ***\n"
5520 "Spilled SGPRs: %d\n"
5521 "Spilled VGPRs: %d\n"
5522 "Private memory VGPRs: %d\n"
5523 "Code Size: %d bytes\n"
5525 "Scratch: %d bytes per wave\n"
5527 "********************\n\n\n",
5528 conf
->num_sgprs
, conf
->num_vgprs
,
5529 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5530 shader
->info
.private_mem_vgprs
,
5531 si_get_shader_binary_size(sscreen
, shader
),
5532 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5533 shader
->info
.max_simd_waves
);
5537 const char *si_get_shader_name(const struct si_shader
*shader
)
5539 switch (shader
->selector
->type
) {
5540 case PIPE_SHADER_VERTEX
:
5541 if (shader
->key
.as_es
)
5542 return "Vertex Shader as ES";
5543 else if (shader
->key
.as_ls
)
5544 return "Vertex Shader as LS";
5545 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5546 return "Vertex Shader as Primitive Discard CS";
5547 else if (shader
->key
.as_ngg
)
5548 return "Vertex Shader as ESGS";
5550 return "Vertex Shader as VS";
5551 case PIPE_SHADER_TESS_CTRL
:
5552 return "Tessellation Control Shader";
5553 case PIPE_SHADER_TESS_EVAL
:
5554 if (shader
->key
.as_es
)
5555 return "Tessellation Evaluation Shader as ES";
5556 else if (shader
->key
.as_ngg
)
5557 return "Tessellation Evaluation Shader as ESGS";
5559 return "Tessellation Evaluation Shader as VS";
5560 case PIPE_SHADER_GEOMETRY
:
5561 if (shader
->is_gs_copy_shader
)
5562 return "GS Copy Shader as VS";
5564 return "Geometry Shader";
5565 case PIPE_SHADER_FRAGMENT
:
5566 return "Pixel Shader";
5567 case PIPE_SHADER_COMPUTE
:
5568 return "Compute Shader";
5570 return "Unknown Shader";
5574 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5575 struct pipe_debug_callback
*debug
,
5576 FILE *file
, bool check_debug_option
)
5578 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5580 if (!check_debug_option
||
5581 si_can_dump_shader(sscreen
, shader_type
))
5582 si_dump_shader_key(shader
, file
);
5584 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5585 if (shader
->previous_stage
&&
5586 shader
->previous_stage
->binary
.llvm_ir_string
) {
5587 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5588 si_get_shader_name(shader
));
5589 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5592 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5593 si_get_shader_name(shader
));
5594 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5597 if (!check_debug_option
||
5598 (si_can_dump_shader(sscreen
, shader_type
) &&
5599 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5600 unsigned wave_size
= si_get_shader_wave_size(shader
);
5602 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5605 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5606 shader_type
, wave_size
, debug
, "prolog", file
);
5607 if (shader
->previous_stage
)
5608 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5609 shader_type
, wave_size
, debug
, "previous stage", file
);
5610 if (shader
->prolog2
)
5611 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5612 shader_type
, wave_size
, debug
, "prolog2", file
);
5614 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5615 wave_size
, debug
, "main", file
);
5618 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5619 shader_type
, wave_size
, debug
, "epilog", file
);
5620 fprintf(file
, "\n");
5623 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5626 static int si_compile_llvm(struct si_screen
*sscreen
,
5627 struct si_shader_binary
*binary
,
5628 struct ac_shader_config
*conf
,
5629 struct ac_llvm_compiler
*compiler
,
5631 struct pipe_debug_callback
*debug
,
5632 enum pipe_shader_type shader_type
,
5635 bool less_optimized
)
5637 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5639 if (si_can_dump_shader(sscreen
, shader_type
)) {
5640 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5642 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5643 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5644 ac_dump_module(mod
);
5645 fprintf(stderr
, "\n");
5649 if (sscreen
->record_llvm_ir
) {
5650 char *ir
= LLVMPrintModuleToString(mod
);
5651 binary
->llvm_ir_string
= strdup(ir
);
5652 LLVMDisposeMessage(ir
);
5655 if (!si_replace_shader(count
, binary
)) {
5656 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5657 less_optimized
, wave_size
);
5662 struct ac_rtld_binary rtld
;
5663 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5664 .info
= &sscreen
->info
,
5665 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5666 .wave_size
= wave_size
,
5668 .elf_ptrs
= &binary
->elf_buffer
,
5669 .elf_sizes
= &binary
->elf_size
}))
5672 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5673 ac_rtld_close(&rtld
);
5677 /* Enable 64-bit and 16-bit denormals, because there is no performance
5680 * If denormals are enabled, all floating-point output modifiers are
5683 * Don't enable denormals for 32-bit floats, because:
5684 * - Floating-point output modifiers would be ignored by the hw.
5685 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5686 * have to stop using those.
5687 * - GFX6 & GFX7 would be very slow.
5689 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5694 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5696 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5697 LLVMBuildRetVoid(ctx
->ac
.builder
);
5699 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5702 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5704 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5705 struct ac_llvm_compiler
*compiler
,
5706 struct si_shader_selector
*gs_selector
,
5707 struct pipe_debug_callback
*debug
)
5709 struct si_shader_context ctx
;
5710 struct si_shader
*shader
;
5711 LLVMBuilderRef builder
;
5712 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5713 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5717 shader
= CALLOC_STRUCT(si_shader
);
5721 /* We can leave the fence as permanently signaled because the GS copy
5722 * shader only becomes visible globally after it has been compiled. */
5723 util_queue_fence_init(&shader
->ready
);
5725 shader
->selector
= gs_selector
;
5726 shader
->is_gs_copy_shader
= true;
5728 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5729 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false),
5731 ctx
.shader
= shader
;
5732 ctx
.type
= PIPE_SHADER_VERTEX
;
5734 builder
= ctx
.ac
.builder
;
5736 create_function(&ctx
);
5737 preload_ring_buffers(&ctx
);
5739 LLVMValueRef voffset
=
5740 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5741 LLVMConstInt(ctx
.i32
, 4, 0), "");
5743 /* Fetch the vertex stream ID.*/
5744 LLVMValueRef stream_id
;
5746 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5747 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5749 stream_id
= ctx
.i32_0
;
5751 /* Fill in output information. */
5752 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5753 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5754 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5756 for (int chan
= 0; chan
< 4; chan
++) {
5757 outputs
[i
].vertex_stream
[chan
] =
5758 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5762 LLVMBasicBlockRef end_bb
;
5763 LLVMValueRef switch_inst
;
5765 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5766 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5768 for (int stream
= 0; stream
< 4; stream
++) {
5769 LLVMBasicBlockRef bb
;
5772 if (!gsinfo
->num_stream_output_components
[stream
])
5775 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5778 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5779 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5780 LLVMPositionBuilderAtEnd(builder
, bb
);
5782 /* Fetch vertex data from GSVS ring */
5784 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5785 for (unsigned chan
= 0; chan
< 4; chan
++) {
5786 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5787 outputs
[i
].vertex_stream
[chan
] != stream
) {
5788 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5792 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5793 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5796 outputs
[i
].values
[chan
] =
5797 ac_build_buffer_load(&ctx
.ac
,
5798 ctx
.gsvs_ring
[0], 1,
5800 soffset
, 0, ac_glc
| ac_slc
,
5805 /* Streamout and exports. */
5806 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5807 si_llvm_emit_streamout(&ctx
, outputs
,
5808 gsinfo
->num_outputs
,
5813 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5815 LLVMBuildBr(builder
, end_bb
);
5818 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5820 LLVMBuildRetVoid(ctx
.ac
.builder
);
5822 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5823 si_llvm_optimize_module(&ctx
);
5826 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5827 &ctx
.shader
->config
, ctx
.compiler
,
5829 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5830 "GS Copy Shader", false) == 0) {
5831 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5832 fprintf(stderr
, "GS Copy Shader:\n");
5833 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5835 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5836 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5841 si_llvm_dispose(&ctx
);
5847 si_fix_resource_usage(sscreen
, shader
);
5852 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5853 const struct si_vs_prolog_bits
*prolog
,
5854 const char *prefix
, FILE *f
)
5856 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5857 prefix
, prolog
->instance_divisor_is_one
);
5858 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5859 prefix
, prolog
->instance_divisor_is_fetched
);
5860 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5861 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5862 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5863 prefix
, prolog
->ls_vgpr_fix
);
5865 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5866 fprintf(f
, " mono.vs.fix_fetch = {");
5867 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5868 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5874 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5875 fix
.u
.num_channels_m1
, fix
.u
.format
);
5880 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5882 const struct si_shader_key
*key
= &shader
->key
;
5883 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5885 fprintf(f
, "SHADER KEY\n");
5887 switch (shader_type
) {
5888 case PIPE_SHADER_VERTEX
:
5889 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5890 "part.vs.prolog", f
);
5891 fprintf(f
, " as_es = %u\n", key
->as_es
);
5892 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5893 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5894 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5895 key
->mono
.u
.vs_export_prim_id
);
5896 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5897 key
->opt
.vs_as_prim_discard_cs
);
5898 fprintf(f
, " opt.cs_prim_type = %s\n",
5899 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5900 fprintf(f
, " opt.cs_indexed = %u\n",
5901 key
->opt
.cs_indexed
);
5902 fprintf(f
, " opt.cs_instancing = %u\n",
5903 key
->opt
.cs_instancing
);
5904 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5905 key
->opt
.cs_primitive_restart
);
5906 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5907 key
->opt
.cs_provoking_vertex_first
);
5908 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5909 key
->opt
.cs_need_correct_orientation
);
5910 fprintf(f
, " opt.cs_cull_front = %u\n",
5911 key
->opt
.cs_cull_front
);
5912 fprintf(f
, " opt.cs_cull_back = %u\n",
5913 key
->opt
.cs_cull_back
);
5914 fprintf(f
, " opt.cs_cull_z = %u\n",
5915 key
->opt
.cs_cull_z
);
5916 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5917 key
->opt
.cs_halfz_clip_space
);
5920 case PIPE_SHADER_TESS_CTRL
:
5921 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5922 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5923 "part.tcs.ls_prolog", f
);
5925 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5926 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5929 case PIPE_SHADER_TESS_EVAL
:
5930 fprintf(f
, " as_es = %u\n", key
->as_es
);
5931 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5932 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5933 key
->mono
.u
.vs_export_prim_id
);
5936 case PIPE_SHADER_GEOMETRY
:
5937 if (shader
->is_gs_copy_shader
)
5940 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5941 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5942 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5943 "part.gs.vs_prolog", f
);
5945 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5946 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5947 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5950 case PIPE_SHADER_COMPUTE
:
5953 case PIPE_SHADER_FRAGMENT
:
5954 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5955 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5956 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5957 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5958 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5959 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5960 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5961 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5962 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5963 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5964 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5965 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5966 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5967 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5968 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5969 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5970 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5971 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5972 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5973 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5974 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5975 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5982 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5983 shader_type
== PIPE_SHADER_TESS_EVAL
||
5984 shader_type
== PIPE_SHADER_VERTEX
) &&
5985 !key
->as_es
&& !key
->as_ls
) {
5986 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5987 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5991 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5992 struct si_screen
*sscreen
,
5993 struct ac_llvm_compiler
*compiler
,
5997 struct lp_build_tgsi_context
*bld_base
;
5999 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
,
6000 nir
? 64 : wave_size
);
6002 bld_base
= &ctx
->bld_base
;
6003 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6005 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
6006 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
6007 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
6009 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6011 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
6013 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6014 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6015 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6016 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6018 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
6019 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
6020 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
6021 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
6022 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
6023 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
6024 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
6025 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
6027 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
6028 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
6029 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6032 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
6034 struct si_shader
*shader
= ctx
->shader
;
6035 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6037 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
6038 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
6039 shader
->key
.as_ls
||
6043 ac_optimize_vs_outputs(&ctx
->ac
,
6045 shader
->info
.vs_output_param_offset
,
6047 &shader
->info
.nr_param_exports
);
6050 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6051 unsigned param
, unsigned bitoffset
)
6053 LLVMValueRef args
[] = {
6054 LLVMGetParam(ctx
->main_fn
, param
),
6055 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6057 ac_build_intrinsic(&ctx
->ac
,
6058 "llvm.amdgcn.init.exec.from.input",
6059 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
6062 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6063 const struct si_vs_prolog_bits
*key
)
6065 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6067 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6070 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
6072 struct si_shader
*shader
= ctx
->shader
;
6073 struct si_shader_selector
*sel
= shader
->selector
;
6074 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6076 // TODO clean all this up!
6077 switch (ctx
->type
) {
6078 case PIPE_SHADER_VERTEX
:
6079 ctx
->load_input
= declare_input_vs
;
6080 if (shader
->key
.as_ls
)
6081 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6082 else if (shader
->key
.as_es
)
6083 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6084 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6085 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6086 else if (shader
->key
.as_ngg
)
6087 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6089 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6090 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6091 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6093 case PIPE_SHADER_TESS_CTRL
:
6094 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6095 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6096 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6097 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6098 bld_base
->emit_store
= store_output_tcs
;
6099 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6100 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6101 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6102 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6104 case PIPE_SHADER_TESS_EVAL
:
6105 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6106 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6107 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6108 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6109 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6110 if (shader
->key
.as_es
)
6111 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6112 else if (shader
->key
.as_ngg
)
6113 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6115 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6116 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6118 case PIPE_SHADER_GEOMETRY
:
6119 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6120 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6121 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6122 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6123 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6124 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6126 case PIPE_SHADER_FRAGMENT
:
6127 ctx
->load_input
= declare_input_fs
;
6128 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6129 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6130 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6131 ctx
->abi
.load_sample_position
= load_sample_position
;
6132 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6133 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6134 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6136 case PIPE_SHADER_COMPUTE
:
6137 ctx
->abi
.load_local_group_size
= get_block_size
;
6140 assert(!"Unsupported shader type");
6144 ctx
->abi
.load_ubo
= load_ubo
;
6145 ctx
->abi
.load_ssbo
= load_ssbo
;
6147 create_function(ctx
);
6148 preload_ring_buffers(ctx
);
6150 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6151 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6152 for (unsigned i
= 0; i
< 6; i
++) {
6153 ctx
->invoc0_tess_factors
[i
] =
6154 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6158 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6159 for (unsigned i
= 0; i
< 4; i
++) {
6160 ctx
->gs_next_vertex
[i
] =
6161 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6163 if (shader
->key
.as_ngg
) {
6164 for (unsigned i
= 0; i
< 4; ++i
) {
6165 ctx
->gs_curprim_verts
[i
] =
6166 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6167 ctx
->gs_generated_prims
[i
] =
6168 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6171 unsigned scratch_size
= 8;
6172 if (sel
->so
.num_outputs
)
6175 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6176 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6177 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6178 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6179 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6181 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6182 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6183 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6184 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6188 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6189 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6190 /* Unconditionally declare scratch space base for streamout and
6191 * vertex compaction. Whether space is actually allocated is
6192 * determined during linking / PM4 creation.
6194 * Add an extra dword per vertex to ensure an odd stride, which
6195 * avoids bank conflicts for SoA accesses.
6197 declare_esgs_ring(ctx
);
6199 /* This is really only needed when streamout and / or vertex
6200 * compaction is enabled.
6202 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6203 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6204 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6205 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6206 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6209 /* For GFX9 merged shaders:
6210 * - Set EXEC for the first shader. If the prolog is present, set
6211 * EXEC there instead.
6212 * - Add a barrier before the second shader.
6213 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6214 * an if-statement. This is required for correctness in geometry
6215 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6218 * For monolithic merged shaders, the first shader is wrapped in an
6219 * if-block together with its prolog in si_build_wrapper_function.
6221 * NGG vertex and tess eval shaders running as the last
6222 * vertex/geometry stage handle execution explicitly using
6225 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6226 if (!shader
->is_monolithic
&&
6227 sel
->info
.num_instructions
> 1 && /* not empty shader */
6228 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6229 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6230 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6231 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6232 si_init_exec_from_input(ctx
,
6233 ctx
->param_merged_wave_info
, 0);
6234 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6235 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6236 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6237 LLVMValueRef num_threads
;
6238 bool nested_barrier
;
6240 if (!shader
->is_monolithic
||
6241 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6242 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6243 ac_init_exec_full_mask(&ctx
->ac
);
6245 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6246 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6247 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6248 gfx10_ngg_gs_emit_prologue(ctx
);
6249 nested_barrier
= false;
6251 nested_barrier
= true;
6254 /* Number of patches / primitives */
6255 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6257 /* Number of vertices */
6258 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 0, 8);
6259 nested_barrier
= false;
6263 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6264 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6266 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6267 ctx
->merged_wrap_if_label
= 11500;
6268 ac_build_ifcc(&ctx
->ac
, ena
, ctx
->merged_wrap_if_label
);
6270 if (nested_barrier
) {
6271 /* Execute a barrier before the second shader in
6274 * Execute the barrier inside the conditional block,
6275 * so that empty waves can jump directly to s_endpgm,
6276 * which will also signal the barrier.
6278 * This is possible in gfx9, because an empty wave
6279 * for the second shader does not participate in
6280 * the epilogue. With NGG, empty waves may still
6281 * be required to export data (e.g. GS output vertices),
6282 * so we cannot let them exit early.
6284 * If the shader is TCS and the TCS epilog is present
6285 * and contains a barrier, it will wait there and then
6288 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6293 if (sel
->force_correct_derivs_after_kill
) {
6294 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6295 /* true = don't kill. */
6296 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6297 ctx
->postponed_kill
);
6301 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6302 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6306 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6307 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6312 si_llvm_build_ret(ctx
, ctx
->return_value
);
6317 * Compute the VS prolog key, which contains all the information needed to
6318 * build the VS prolog function, and set shader->info bits where needed.
6320 * \param info Shader info of the vertex shader.
6321 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6322 * \param prolog_key Key of the VS prolog
6323 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6324 * \param key Output shader part key.
6326 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6327 unsigned num_input_sgprs
,
6328 const struct si_vs_prolog_bits
*prolog_key
,
6329 struct si_shader
*shader_out
,
6330 union si_shader_part_key
*key
)
6332 memset(key
, 0, sizeof(*key
));
6333 key
->vs_prolog
.states
= *prolog_key
;
6334 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6335 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6336 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6337 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6338 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6340 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6341 key
->vs_prolog
.as_ls
= 1;
6342 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6343 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6344 key
->vs_prolog
.as_es
= 1;
6345 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6346 } else if (shader_out
->key
.as_ngg
) {
6347 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6350 /* Enable loading the InstanceID VGPR. */
6351 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6353 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6354 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6355 shader_out
->info
.uses_instanceid
= true;
6359 * Compute the PS prolog key, which contains all the information needed to
6360 * build the PS prolog function, and set related bits in shader->config.
6362 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6363 union si_shader_part_key
*key
,
6364 bool separate_prolog
)
6366 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6368 memset(key
, 0, sizeof(*key
));
6369 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6370 key
->ps_prolog
.colors_read
= info
->colors_read
;
6371 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6372 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6373 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6374 (key
->ps_prolog
.colors_read
||
6375 key
->ps_prolog
.states
.force_persp_sample_interp
||
6376 key
->ps_prolog
.states
.force_linear_sample_interp
||
6377 key
->ps_prolog
.states
.force_persp_center_interp
||
6378 key
->ps_prolog
.states
.force_linear_center_interp
||
6379 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6380 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6381 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6383 if (info
->colors_read
) {
6384 unsigned *color
= shader
->selector
->color_attr_index
;
6386 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6387 /* BCOLORs are stored after the last input. */
6388 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6389 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6390 if (separate_prolog
)
6391 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6394 for (unsigned i
= 0; i
< 2; i
++) {
6395 unsigned interp
= info
->input_interpolate
[color
[i
]];
6396 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6398 if (!(info
->colors_read
& (0xf << i
*4)))
6401 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6403 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6404 interp
== TGSI_INTERPOLATE_COLOR
)
6405 interp
= TGSI_INTERPOLATE_CONSTANT
;
6408 case TGSI_INTERPOLATE_CONSTANT
:
6409 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6411 case TGSI_INTERPOLATE_PERSPECTIVE
:
6412 case TGSI_INTERPOLATE_COLOR
:
6413 /* Force the interpolation location for colors here. */
6414 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6415 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6416 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6417 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6420 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6421 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6422 if (separate_prolog
) {
6423 shader
->config
.spi_ps_input_ena
|=
6424 S_0286CC_PERSP_SAMPLE_ENA(1);
6427 case TGSI_INTERPOLATE_LOC_CENTER
:
6428 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6429 if (separate_prolog
) {
6430 shader
->config
.spi_ps_input_ena
|=
6431 S_0286CC_PERSP_CENTER_ENA(1);
6434 case TGSI_INTERPOLATE_LOC_CENTROID
:
6435 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6436 if (separate_prolog
) {
6437 shader
->config
.spi_ps_input_ena
|=
6438 S_0286CC_PERSP_CENTROID_ENA(1);
6445 case TGSI_INTERPOLATE_LINEAR
:
6446 /* Force the interpolation location for colors here. */
6447 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6448 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6449 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6450 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6452 /* The VGPR assignment for non-monolithic shaders
6453 * works because InitialPSInputAddr is set on the
6454 * main shader and PERSP_PULL_MODEL is never used.
6457 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6458 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6459 separate_prolog
? 6 : 9;
6460 if (separate_prolog
) {
6461 shader
->config
.spi_ps_input_ena
|=
6462 S_0286CC_LINEAR_SAMPLE_ENA(1);
6465 case TGSI_INTERPOLATE_LOC_CENTER
:
6466 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6467 separate_prolog
? 8 : 11;
6468 if (separate_prolog
) {
6469 shader
->config
.spi_ps_input_ena
|=
6470 S_0286CC_LINEAR_CENTER_ENA(1);
6473 case TGSI_INTERPOLATE_LOC_CENTROID
:
6474 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6475 separate_prolog
? 10 : 13;
6476 if (separate_prolog
) {
6477 shader
->config
.spi_ps_input_ena
|=
6478 S_0286CC_LINEAR_CENTROID_ENA(1);
6493 * Check whether a PS prolog is required based on the key.
6495 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6497 return key
->ps_prolog
.colors_read
||
6498 key
->ps_prolog
.states
.force_persp_sample_interp
||
6499 key
->ps_prolog
.states
.force_linear_sample_interp
||
6500 key
->ps_prolog
.states
.force_persp_center_interp
||
6501 key
->ps_prolog
.states
.force_linear_center_interp
||
6502 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6503 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6504 key
->ps_prolog
.states
.poly_stipple
||
6505 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6509 * Compute the PS epilog key, which contains all the information needed to
6510 * build the PS epilog function.
6512 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6513 union si_shader_part_key
*key
)
6515 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6516 memset(key
, 0, sizeof(*key
));
6517 key
->ps_epilog
.colors_written
= info
->colors_written
;
6518 key
->ps_epilog
.writes_z
= info
->writes_z
;
6519 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6520 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6521 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6525 * Build the GS prolog function. Rotate the input vertices for triangle strips
6528 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6529 union si_shader_part_key
*key
)
6531 unsigned num_sgprs
, num_vgprs
;
6532 struct si_function_info fninfo
;
6533 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6534 LLVMTypeRef returns
[48];
6535 LLVMValueRef func
, ret
;
6537 si_init_function_info(&fninfo
);
6539 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6540 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6541 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6543 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6544 num_vgprs
= 5; /* ES inputs are not needed by GS */
6546 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6550 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6551 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6552 returns
[i
] = ctx
->i32
;
6555 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6556 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6557 returns
[num_sgprs
+ i
] = ctx
->f32
;
6560 /* Create the function. */
6561 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6563 func
= ctx
->main_fn
;
6565 /* Set the full EXEC mask for the prolog, because we are only fiddling
6566 * with registers here. The main shader part will set the correct EXEC
6569 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6570 ac_init_exec_full_mask(&ctx
->ac
);
6572 /* Copy inputs to outputs. This should be no-op, as the registers match,
6573 * but it will prevent the compiler from overwriting them unintentionally.
6575 ret
= ctx
->return_value
;
6576 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6577 LLVMValueRef p
= LLVMGetParam(func
, i
);
6578 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6580 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6581 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6582 p
= ac_to_float(&ctx
->ac
, p
);
6583 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6586 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6587 /* Remap the input vertices for every other primitive. */
6588 const unsigned gfx6_vtx_params
[6] = {
6596 const unsigned gfx9_vtx_params
[3] = {
6601 LLVMValueRef vtx_in
[6], vtx_out
[6];
6602 LLVMValueRef prim_id
, rotate
;
6604 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6605 for (unsigned i
= 0; i
< 3; i
++) {
6606 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6607 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6610 for (unsigned i
= 0; i
< 6; i
++)
6611 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6614 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6615 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6617 for (unsigned i
= 0; i
< 6; ++i
) {
6618 LLVMValueRef base
, rotated
;
6620 rotated
= vtx_in
[(i
+ 4) % 6];
6621 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6624 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6625 for (unsigned i
= 0; i
< 3; i
++) {
6626 LLVMValueRef hi
, out
;
6628 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6629 LLVMConstInt(ctx
->i32
, 16, 0), "");
6630 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6631 out
= ac_to_float(&ctx
->ac
, out
);
6632 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6633 gfx9_vtx_params
[i
], "");
6636 for (unsigned i
= 0; i
< 6; i
++) {
6639 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6640 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6641 gfx6_vtx_params
[i
], "");
6646 LLVMBuildRet(builder
, ret
);
6650 * Given a list of shader part functions, build a wrapper function that
6651 * runs them in sequence to form a monolithic shader.
6653 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6654 LLVMValueRef
*parts
,
6657 unsigned next_shader_first_part
)
6659 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6660 /* PS epilog has one arg per color component; gfx9 merged shader
6661 * prologs need to forward 32 user SGPRs.
6663 struct si_function_info fninfo
;
6664 LLVMValueRef initial
[64], out
[64];
6665 LLVMTypeRef function_type
;
6666 unsigned num_first_params
;
6667 unsigned num_out
, initial_num_out
;
6668 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6669 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6670 unsigned num_sgprs
, num_vgprs
;
6673 si_init_function_info(&fninfo
);
6675 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6676 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6677 AC_FUNC_ATTR_ALWAYSINLINE
);
6678 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6681 /* The parameters of the wrapper function correspond to those of the
6682 * first part in terms of SGPRs and VGPRs, but we use the types of the
6683 * main part to get the right types. This is relevant for the
6684 * dereferenceable attribute on descriptor table pointers.
6689 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6690 num_first_params
= LLVMCountParamTypes(function_type
);
6692 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6693 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6695 if (ac_is_sgpr_param(param
)) {
6696 assert(num_vgprs
== 0);
6697 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6699 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6704 while (gprs
< num_sgprs
+ num_vgprs
) {
6705 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6706 LLVMTypeRef type
= LLVMTypeOf(param
);
6707 unsigned size
= ac_get_type_size(type
) / 4;
6709 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6711 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6712 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6713 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6718 /* Prepare the return type. */
6719 unsigned num_returns
= 0;
6720 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6722 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6723 return_type
= LLVMGetReturnType(last_func_type
);
6725 switch (LLVMGetTypeKind(return_type
)) {
6726 case LLVMStructTypeKind
:
6727 num_returns
= LLVMCountStructElementTypes(return_type
);
6728 assert(num_returns
<= ARRAY_SIZE(returns
));
6729 LLVMGetStructElementTypes(return_type
, returns
);
6731 case LLVMVoidTypeKind
:
6734 unreachable("unexpected type");
6737 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6738 si_get_max_workgroup_size(ctx
->shader
));
6740 if (is_merged_shader(ctx
))
6741 ac_init_exec_full_mask(&ctx
->ac
);
6743 /* Record the arguments of the function as if they were an output of
6749 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6750 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6751 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6752 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6753 unsigned size
= ac_get_type_size(param_type
) / 4;
6756 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6757 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6758 param_type
= ctx
->i32
;
6761 if (param_type
!= out_type
)
6762 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6763 out
[num_out
++] = param
;
6765 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6767 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6768 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6769 param_type
= ctx
->i64
;
6772 if (param_type
!= vector_type
)
6773 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6775 for (unsigned j
= 0; j
< size
; ++j
)
6776 out
[num_out
++] = LLVMBuildExtractElement(
6777 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6780 if (i
< fninfo
.num_sgpr_params
)
6781 num_out_sgpr
= num_out
;
6784 memcpy(initial
, out
, sizeof(out
));
6785 initial_num_out
= num_out
;
6786 initial_num_out_sgpr
= num_out_sgpr
;
6788 /* Now chain the parts. */
6789 LLVMValueRef ret
= NULL
;
6790 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6791 LLVMValueRef in
[48];
6792 LLVMTypeRef ret_type
;
6793 unsigned out_idx
= 0;
6794 unsigned num_params
= LLVMCountParams(parts
[part
]);
6796 /* Merged shaders are executed conditionally depending
6797 * on the number of enabled threads passed in the input SGPRs. */
6798 if (is_multi_part_shader(ctx
) && part
== 0) {
6799 LLVMValueRef ena
, count
= initial
[3];
6801 count
= LLVMBuildAnd(builder
, count
,
6802 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6803 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6804 ac_get_thread_id(&ctx
->ac
), count
, "");
6805 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6808 /* Derive arguments for the next part from outputs of the
6811 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6813 LLVMTypeRef param_type
;
6815 unsigned param_size
;
6816 LLVMValueRef arg
= NULL
;
6818 param
= LLVMGetParam(parts
[part
], param_idx
);
6819 param_type
= LLVMTypeOf(param
);
6820 param_size
= ac_get_type_size(param_type
) / 4;
6821 is_sgpr
= ac_is_sgpr_param(param
);
6824 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6825 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6826 } else if (out_idx
< num_out_sgpr
) {
6827 /* Skip returned SGPRs the current part doesn't
6828 * declare on the input. */
6829 out_idx
= num_out_sgpr
;
6832 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6834 if (param_size
== 1)
6837 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6839 if (LLVMTypeOf(arg
) != param_type
) {
6840 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6841 if (LLVMGetPointerAddressSpace(param_type
) ==
6842 AC_ADDR_SPACE_CONST_32BIT
) {
6843 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6844 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6846 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6847 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6850 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6854 in
[param_idx
] = arg
;
6855 out_idx
+= param_size
;
6858 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6860 if (is_multi_part_shader(ctx
) &&
6861 part
+ 1 == next_shader_first_part
) {
6862 ac_build_endif(&ctx
->ac
, 6506);
6864 /* The second half of the merged shader should use
6865 * the inputs from the toplevel (wrapper) function,
6866 * not the return value from the last call.
6868 * That's because the last call was executed condi-
6869 * tionally, so we can't consume it in the main
6872 memcpy(out
, initial
, sizeof(initial
));
6873 num_out
= initial_num_out
;
6874 num_out_sgpr
= initial_num_out_sgpr
;
6878 /* Extract the returned GPRs. */
6879 ret_type
= LLVMTypeOf(ret
);
6883 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6884 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6886 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6888 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6890 LLVMBuildExtractValue(builder
, ret
, i
, "");
6892 assert(num_out
< ARRAY_SIZE(out
));
6893 out
[num_out
++] = val
;
6895 if (LLVMTypeOf(val
) == ctx
->i32
) {
6896 assert(num_out_sgpr
+ 1 == num_out
);
6897 num_out_sgpr
= num_out
;
6903 /* Return the value from the last part. */
6904 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6905 LLVMBuildRetVoid(builder
);
6907 LLVMBuildRet(builder
, ret
);
6910 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6911 struct si_shader_selector
*sel
)
6913 if (!compiler
->low_opt_passes
)
6916 /* Assume a slow CPU. */
6917 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6918 sel
->screen
->info
.chip_class
<= GFX8
);
6920 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6922 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6923 sel
->info
.num_memory_instructions
> 1000;
6926 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6927 struct ac_llvm_compiler
*compiler
,
6928 struct si_shader
*shader
,
6929 struct pipe_debug_callback
*debug
)
6931 struct si_shader_selector
*sel
= shader
->selector
;
6932 struct si_shader_context ctx
;
6935 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6936 * conversion fails. */
6937 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6938 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6940 tgsi_dump(sel
->tokens
, 0);
6942 nir_print_shader(sel
->nir
, stderr
);
6943 si_dump_streamout(&sel
->so
);
6946 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
),
6948 si_llvm_context_set_ir(&ctx
, shader
);
6950 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6951 sizeof(shader
->info
.vs_output_param_offset
));
6953 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6955 if (!si_compile_tgsi_main(&ctx
)) {
6956 si_llvm_dispose(&ctx
);
6960 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6961 LLVMValueRef parts
[2];
6962 bool need_prolog
= sel
->vs_needs_prolog
;
6964 parts
[1] = ctx
.main_fn
;
6967 union si_shader_part_key prolog_key
;
6968 si_get_vs_prolog_key(&sel
->info
,
6969 shader
->info
.num_input_sgprs
,
6970 &shader
->key
.part
.vs
.prolog
,
6971 shader
, &prolog_key
);
6972 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6973 parts
[0] = ctx
.main_fn
;
6976 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6977 1 + need_prolog
, need_prolog
, 0);
6979 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6980 si_build_prim_discard_compute_shader(&ctx
);
6981 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6982 if (sscreen
->info
.chip_class
>= GFX9
) {
6983 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6984 LLVMValueRef parts
[4];
6985 bool vs_needs_prolog
=
6986 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6989 parts
[2] = ctx
.main_fn
;
6992 union si_shader_part_key tcs_epilog_key
;
6993 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6994 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6995 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6996 parts
[3] = ctx
.main_fn
;
6998 /* VS as LS main part */
6999 struct si_shader shader_ls
= {};
7000 shader_ls
.selector
= ls
;
7001 shader_ls
.key
.as_ls
= 1;
7002 shader_ls
.key
.mono
= shader
->key
.mono
;
7003 shader_ls
.key
.opt
= shader
->key
.opt
;
7004 shader_ls
.is_monolithic
= true;
7005 si_llvm_context_set_ir(&ctx
, &shader_ls
);
7007 if (!si_compile_tgsi_main(&ctx
)) {
7008 si_llvm_dispose(&ctx
);
7011 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
7012 parts
[1] = ctx
.main_fn
;
7015 if (vs_needs_prolog
) {
7016 union si_shader_part_key vs_prolog_key
;
7017 si_get_vs_prolog_key(&ls
->info
,
7018 shader_ls
.info
.num_input_sgprs
,
7019 &shader
->key
.part
.tcs
.ls_prolog
,
7020 shader
, &vs_prolog_key
);
7021 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7022 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7023 parts
[0] = ctx
.main_fn
;
7026 /* Reset the shader context. */
7027 ctx
.shader
= shader
;
7028 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
7030 si_build_wrapper_function(&ctx
,
7031 parts
+ !vs_needs_prolog
,
7032 4 - !vs_needs_prolog
, vs_needs_prolog
,
7033 vs_needs_prolog
? 2 : 1);
7035 LLVMValueRef parts
[2];
7036 union si_shader_part_key epilog_key
;
7038 parts
[0] = ctx
.main_fn
;
7040 memset(&epilog_key
, 0, sizeof(epilog_key
));
7041 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7042 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7043 parts
[1] = ctx
.main_fn
;
7045 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7047 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7048 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7049 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7050 LLVMValueRef es_prolog
= NULL
;
7051 LLVMValueRef es_main
= NULL
;
7052 LLVMValueRef gs_prolog
= NULL
;
7053 LLVMValueRef gs_main
= ctx
.main_fn
;
7056 union si_shader_part_key gs_prolog_key
;
7057 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7058 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7059 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7060 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7061 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7062 gs_prolog
= ctx
.main_fn
;
7065 struct si_shader shader_es
= {};
7066 shader_es
.selector
= es
;
7067 shader_es
.key
.as_es
= 1;
7068 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7069 shader_es
.key
.mono
= shader
->key
.mono
;
7070 shader_es
.key
.opt
= shader
->key
.opt
;
7071 shader_es
.is_monolithic
= true;
7072 si_llvm_context_set_ir(&ctx
, &shader_es
);
7074 if (!si_compile_tgsi_main(&ctx
)) {
7075 si_llvm_dispose(&ctx
);
7078 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7079 es_main
= ctx
.main_fn
;
7082 if (es
->vs_needs_prolog
) {
7083 union si_shader_part_key vs_prolog_key
;
7084 si_get_vs_prolog_key(&es
->info
,
7085 shader_es
.info
.num_input_sgprs
,
7086 &shader
->key
.part
.gs
.vs_prolog
,
7087 shader
, &vs_prolog_key
);
7088 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7089 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7090 es_prolog
= ctx
.main_fn
;
7093 /* Reset the shader context. */
7094 ctx
.shader
= shader
;
7095 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7097 /* Prepare the array of shader parts. */
7098 LLVMValueRef parts
[4];
7099 unsigned num_parts
= 0, main_part
, next_first_part
;
7102 parts
[num_parts
++] = es_prolog
;
7104 parts
[main_part
= num_parts
++] = es_main
;
7105 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7106 parts
[num_parts
++] = gs_main
;
7108 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7109 main_part
, next_first_part
);
7111 LLVMValueRef parts
[2];
7112 union si_shader_part_key prolog_key
;
7114 parts
[1] = ctx
.main_fn
;
7116 memset(&prolog_key
, 0, sizeof(prolog_key
));
7117 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7118 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7119 parts
[0] = ctx
.main_fn
;
7121 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7123 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7124 LLVMValueRef parts
[3];
7125 union si_shader_part_key prolog_key
;
7126 union si_shader_part_key epilog_key
;
7129 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7130 need_prolog
= si_need_ps_prolog(&prolog_key
);
7132 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7135 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7136 parts
[0] = ctx
.main_fn
;
7139 si_get_ps_epilog_key(shader
, &epilog_key
);
7140 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7141 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7143 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7144 need_prolog
? 1 : 0, 0);
7147 si_llvm_optimize_module(&ctx
);
7149 /* Post-optimization transformations and analysis. */
7150 si_optimize_vs_outputs(&ctx
);
7152 if ((debug
&& debug
->debug_message
) ||
7153 si_can_dump_shader(sscreen
, ctx
.type
)) {
7154 ctx
.shader
->info
.private_mem_vgprs
=
7155 ac_count_scratch_private_memory(ctx
.main_fn
);
7158 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7159 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7160 LLVMPointerTypeKind
);
7162 /* Compile to bytecode. */
7163 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7164 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7165 si_get_shader_name(shader
),
7166 si_should_optimize_less(compiler
, shader
->selector
));
7167 si_llvm_dispose(&ctx
);
7169 fprintf(stderr
, "LLVM failed to compile shader\n");
7173 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7174 * LLVM 3.9svn has this bug.
7176 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7177 unsigned wave_size
= sscreen
->compute_wave_size
;
7178 unsigned max_vgprs
= 256;
7179 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
7180 unsigned max_sgprs_per_wave
= 128;
7181 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7182 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7183 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7185 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7186 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7188 if (shader
->config
.num_sgprs
> max_sgprs
||
7189 shader
->config
.num_vgprs
> max_vgprs
) {
7190 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7191 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7192 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7193 max_sgprs
, max_vgprs
);
7195 /* Just terminate the process, because dependent
7196 * shaders can hang due to bad input data, but use
7197 * the env var to allow shader-db to work.
7199 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7204 /* Add the scratch offset to input SGPRs. */
7205 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7206 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7208 /* Calculate the number of fragment input VGPRs. */
7209 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7210 shader
->info
.num_input_vgprs
= 0;
7211 shader
->info
.face_vgpr_index
= -1;
7212 shader
->info
.ancillary_vgpr_index
= -1;
7214 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7215 shader
->info
.num_input_vgprs
+= 2;
7216 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7217 shader
->info
.num_input_vgprs
+= 2;
7218 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7219 shader
->info
.num_input_vgprs
+= 2;
7220 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7221 shader
->info
.num_input_vgprs
+= 3;
7222 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7223 shader
->info
.num_input_vgprs
+= 2;
7224 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7225 shader
->info
.num_input_vgprs
+= 2;
7226 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7227 shader
->info
.num_input_vgprs
+= 2;
7228 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7229 shader
->info
.num_input_vgprs
+= 1;
7230 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7231 shader
->info
.num_input_vgprs
+= 1;
7232 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7233 shader
->info
.num_input_vgprs
+= 1;
7234 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7235 shader
->info
.num_input_vgprs
+= 1;
7236 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7237 shader
->info
.num_input_vgprs
+= 1;
7238 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7239 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7240 shader
->info
.num_input_vgprs
+= 1;
7242 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7243 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7244 shader
->info
.num_input_vgprs
+= 1;
7246 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7247 shader
->info
.num_input_vgprs
+= 1;
7248 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7249 shader
->info
.num_input_vgprs
+= 1;
7252 si_calculate_max_simd_waves(shader
);
7253 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7258 * Create, compile and return a shader part (prolog or epilog).
7260 * \param sscreen screen
7261 * \param list list of shader parts of the same category
7262 * \param type shader type
7263 * \param key shader part key
7264 * \param prolog whether the part being requested is a prolog
7265 * \param tm LLVM target machine
7266 * \param debug debug callback
7267 * \param build the callback responsible for building the main function
7268 * \return non-NULL on success
7270 static struct si_shader_part
*
7271 si_get_shader_part(struct si_screen
*sscreen
,
7272 struct si_shader_part
**list
,
7273 enum pipe_shader_type type
,
7275 union si_shader_part_key
*key
,
7276 struct ac_llvm_compiler
*compiler
,
7277 struct pipe_debug_callback
*debug
,
7278 void (*build
)(struct si_shader_context
*,
7279 union si_shader_part_key
*),
7282 struct si_shader_part
*result
;
7284 mtx_lock(&sscreen
->shader_parts_mutex
);
7286 /* Find existing. */
7287 for (result
= *list
; result
; result
= result
->next
) {
7288 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7289 mtx_unlock(&sscreen
->shader_parts_mutex
);
7294 /* Compile a new one. */
7295 result
= CALLOC_STRUCT(si_shader_part
);
7298 struct si_shader shader
= {};
7301 case PIPE_SHADER_VERTEX
:
7302 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7303 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7304 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7306 case PIPE_SHADER_TESS_CTRL
:
7308 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7310 case PIPE_SHADER_GEOMETRY
:
7312 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7314 case PIPE_SHADER_FRAGMENT
:
7316 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7318 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7321 unreachable("bad shader part");
7324 struct si_shader_context ctx
;
7325 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7326 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7329 ctx
.shader
= &shader
;
7335 si_llvm_optimize_module(&ctx
);
7337 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7338 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7345 result
->next
= *list
;
7349 si_llvm_dispose(&ctx
);
7350 mtx_unlock(&sscreen
->shader_parts_mutex
);
7354 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7356 LLVMValueRef ptr
[2], list
;
7357 bool merged_shader
= is_merged_shader(ctx
);
7359 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7360 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7361 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7366 * Build the vertex shader prolog function.
7368 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7369 * All inputs are returned unmodified. The vertex load indices are
7370 * stored after them, which will be used by the API VS for fetching inputs.
7372 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7377 * (VertexID + BaseVertex),
7378 * (InstanceID + StartInstance),
7379 * (InstanceID / 2 + StartInstance)
7381 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7382 union si_shader_part_key
*key
)
7384 struct si_function_info fninfo
;
7385 LLVMTypeRef
*returns
;
7386 LLVMValueRef ret
, func
;
7388 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7389 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7390 LLVMValueRef input_vgprs
[9];
7391 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7393 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7395 si_init_function_info(&fninfo
);
7397 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7398 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7399 sizeof(LLVMTypeRef
));
7402 /* Declare input and output SGPRs. */
7403 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7404 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7405 returns
[num_returns
++] = ctx
->i32
;
7408 /* Preloaded VGPRs (outputs must be floats) */
7409 for (i
= 0; i
< num_input_vgprs
; i
++) {
7410 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7411 returns
[num_returns
++] = ctx
->f32
;
7414 /* Vertex load indices. */
7415 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7416 returns
[num_returns
++] = ctx
->f32
;
7418 /* Create the function. */
7419 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7420 func
= ctx
->main_fn
;
7422 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7423 if (!key
->vs_prolog
.is_monolithic
)
7424 si_init_exec_from_input(ctx
, 3, 0);
7426 if (key
->vs_prolog
.as_ls
&&
7427 ctx
->screen
->has_ls_vgpr_init_bug
) {
7428 /* If there are no HS threads, SPI loads the LS VGPRs
7429 * starting at VGPR 0. Shift them back to where they
7432 LLVMValueRef has_hs_threads
=
7433 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7434 si_unpack_param(ctx
, 3, 8, 8),
7437 for (i
= 4; i
> 0; --i
) {
7438 input_vgprs
[i
+ 1] =
7439 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7441 input_vgprs
[i
- 1], "");
7446 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7447 unsigned instance_id_vgpr
=
7448 ctx
->screen
->info
.chip_class
>= GFX10
?
7450 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7452 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7453 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7455 /* InstanceID = VertexID >> 16;
7456 * VertexID = VertexID & 0xffff;
7458 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7459 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7460 LLVMConstInt(ctx
->i32
, 16, 0), "");
7461 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7462 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7465 /* Copy inputs to outputs. This should be no-op, as the registers match,
7466 * but it will prevent the compiler from overwriting them unintentionally.
7468 ret
= ctx
->return_value
;
7469 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7470 LLVMValueRef p
= LLVMGetParam(func
, i
);
7471 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7473 for (i
= 0; i
< num_input_vgprs
; i
++) {
7474 LLVMValueRef p
= input_vgprs
[i
];
7476 if (i
== vertex_id_vgpr
)
7477 p
= ctx
->abi
.vertex_id
;
7478 else if (i
== instance_id_vgpr
)
7479 p
= ctx
->abi
.instance_id
;
7481 p
= ac_to_float(&ctx
->ac
, p
);
7482 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7483 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7486 LLVMValueRef original_ret
= ret
;
7487 bool wrapped
= false;
7488 LLVMBasicBlockRef if_entry_block
= NULL
;
7490 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7491 LLVMValueRef num_threads
;
7494 num_threads
= si_unpack_param(ctx
, 3, 0, 8);
7495 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7496 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7497 if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
7498 ac_build_ifcc(&ctx
->ac
, ena
, 11501);
7502 /* Compute vertex load indices from instance divisors. */
7503 LLVMValueRef instance_divisor_constbuf
= NULL
;
7505 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7506 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7507 LLVMValueRef buf_index
=
7508 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7509 instance_divisor_constbuf
=
7510 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7513 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7514 bool divisor_is_one
=
7515 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7516 bool divisor_is_fetched
=
7517 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7518 LLVMValueRef index
= NULL
;
7520 if (divisor_is_one
) {
7521 index
= ctx
->abi
.instance_id
;
7522 } else if (divisor_is_fetched
) {
7523 LLVMValueRef udiv_factors
[4];
7525 for (unsigned j
= 0; j
< 4; j
++) {
7527 buffer_load_const(ctx
, instance_divisor_constbuf
,
7528 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7529 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7531 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7532 * Such InstanceID might not be achievable in a reasonable time though.
7534 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7535 udiv_factors
[0], udiv_factors
[1],
7536 udiv_factors
[2], udiv_factors
[3]);
7539 if (divisor_is_one
|| divisor_is_fetched
) {
7540 /* Add StartInstance. */
7541 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7542 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7543 SI_SGPR_START_INSTANCE
), "");
7545 /* VertexID + BaseVertex */
7546 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7548 LLVMGetParam(func
, user_sgpr_base
+
7549 SI_SGPR_BASE_VERTEX
), "");
7552 index
= ac_to_float(&ctx
->ac
, index
);
7553 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7554 fninfo
.num_params
+ i
, "");
7558 LLVMBasicBlockRef bbs
[2] = {
7559 LLVMGetInsertBlock(ctx
->ac
.builder
),
7562 ac_build_endif(&ctx
->ac
, 11501);
7564 LLVMValueRef values
[2] = {
7568 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7571 si_llvm_build_ret(ctx
, ret
);
7574 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7575 struct ac_llvm_compiler
*compiler
,
7576 struct si_shader
*shader
,
7577 struct pipe_debug_callback
*debug
,
7578 struct si_shader
*main_part
,
7579 const struct si_vs_prolog_bits
*key
)
7581 struct si_shader_selector
*vs
= main_part
->selector
;
7583 if (!si_vs_needs_prolog(vs
, key
))
7586 /* Get the prolog. */
7587 union si_shader_part_key prolog_key
;
7588 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7589 key
, shader
, &prolog_key
);
7592 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7593 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7594 debug
, si_build_vs_prolog_function
,
7595 "Vertex Shader Prolog");
7596 return shader
->prolog
!= NULL
;
7600 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7602 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7603 struct ac_llvm_compiler
*compiler
,
7604 struct si_shader
*shader
,
7605 struct pipe_debug_callback
*debug
)
7607 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7608 &shader
->key
.part
.vs
.prolog
);
7612 * Compile the TCS epilog function. This writes tesselation factors to memory
7613 * based on the output primitive type of the tesselator (determined by TES).
7615 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7616 union si_shader_part_key
*key
)
7618 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7619 struct si_function_info fninfo
;
7622 si_init_function_info(&fninfo
);
7624 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7625 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7626 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7627 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7628 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7629 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7630 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7631 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7632 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7633 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7634 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7635 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7636 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7637 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7638 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7639 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7640 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7641 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7642 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7643 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7645 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7646 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7647 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7648 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7649 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7650 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7651 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7652 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7653 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7654 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7657 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7658 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7659 unsigned tess_factors_idx
=
7660 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7661 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7662 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7664 for (unsigned i
= 0; i
< 6; i
++)
7665 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7667 /* Create the function. */
7668 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7669 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7670 ac_declare_lds_as_pointer(&ctx
->ac
);
7671 func
= ctx
->main_fn
;
7673 LLVMValueRef invoc0_tess_factors
[6];
7674 for (unsigned i
= 0; i
< 6; i
++)
7675 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7677 si_write_tess_factors(bld_base
,
7678 LLVMGetParam(func
, tess_factors_idx
),
7679 LLVMGetParam(func
, tess_factors_idx
+ 1),
7680 LLVMGetParam(func
, tess_factors_idx
+ 2),
7681 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7683 LLVMBuildRetVoid(ctx
->ac
.builder
);
7687 * Select and compile (or reuse) TCS parts (epilog).
7689 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7690 struct ac_llvm_compiler
*compiler
,
7691 struct si_shader
*shader
,
7692 struct pipe_debug_callback
*debug
)
7694 if (sscreen
->info
.chip_class
>= GFX9
) {
7695 struct si_shader
*ls_main_part
=
7696 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7698 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7699 &shader
->key
.part
.tcs
.ls_prolog
))
7702 shader
->previous_stage
= ls_main_part
;
7705 /* Get the epilog. */
7706 union si_shader_part_key epilog_key
;
7707 memset(&epilog_key
, 0, sizeof(epilog_key
));
7708 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7710 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7711 PIPE_SHADER_TESS_CTRL
, false,
7712 &epilog_key
, compiler
, debug
,
7713 si_build_tcs_epilog_function
,
7714 "Tessellation Control Shader Epilog");
7715 return shader
->epilog
!= NULL
;
7719 * Select and compile (or reuse) GS parts (prolog).
7721 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7722 struct ac_llvm_compiler
*compiler
,
7723 struct si_shader
*shader
,
7724 struct pipe_debug_callback
*debug
)
7726 if (sscreen
->info
.chip_class
>= GFX9
) {
7727 struct si_shader
*es_main_part
;
7728 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7730 if (es_type
== PIPE_SHADER_TESS_EVAL
&& shader
->key
.as_ngg
)
7731 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7733 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7735 if (es_type
== PIPE_SHADER_VERTEX
&&
7736 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7737 &shader
->key
.part
.gs
.vs_prolog
))
7740 shader
->previous_stage
= es_main_part
;
7743 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7746 union si_shader_part_key prolog_key
;
7747 memset(&prolog_key
, 0, sizeof(prolog_key
));
7748 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7749 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7751 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7752 PIPE_SHADER_GEOMETRY
, true,
7753 &prolog_key
, compiler
, debug
,
7754 si_build_gs_prolog_function
,
7755 "Geometry Shader Prolog");
7756 return shader
->prolog2
!= NULL
;
7760 * Build the pixel shader prolog function. This handles:
7761 * - two-side color selection and interpolation
7762 * - overriding interpolation parameters for the API PS
7763 * - polygon stippling
7765 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7766 * overriden by other states. (e.g. per-sample interpolation)
7767 * Interpolated colors are stored after the preloaded VGPRs.
7769 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7770 union si_shader_part_key
*key
)
7772 struct si_function_info fninfo
;
7773 LLVMValueRef ret
, func
;
7774 int num_returns
, i
, num_color_channels
;
7776 assert(si_need_ps_prolog(key
));
7778 si_init_function_info(&fninfo
);
7780 /* Declare inputs. */
7781 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7782 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7784 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7785 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7787 /* Declare outputs (same as inputs + add colors if needed) */
7788 num_returns
= fninfo
.num_params
;
7789 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7790 for (i
= 0; i
< num_color_channels
; i
++)
7791 fninfo
.types
[num_returns
++] = ctx
->f32
;
7793 /* Create the function. */
7794 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7796 func
= ctx
->main_fn
;
7798 /* Copy inputs to outputs. This should be no-op, as the registers match,
7799 * but it will prevent the compiler from overwriting them unintentionally.
7801 ret
= ctx
->return_value
;
7802 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7803 LLVMValueRef p
= LLVMGetParam(func
, i
);
7804 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7807 /* Polygon stippling. */
7808 if (key
->ps_prolog
.states
.poly_stipple
) {
7809 /* POS_FIXED_PT is always last. */
7810 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7811 key
->ps_prolog
.num_input_vgprs
- 1;
7812 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7814 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7817 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7818 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7819 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7820 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7822 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7823 * The hw doesn't compute CENTROID if the whole wave only
7824 * contains fully-covered quads.
7826 * PRIM_MASK is after user SGPRs.
7828 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7829 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7830 LLVMConstInt(ctx
->i32
, 31, 0), "");
7831 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7834 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7835 /* Read PERSP_CENTER. */
7836 for (i
= 0; i
< 2; i
++)
7837 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7838 /* Read PERSP_CENTROID. */
7839 for (i
= 0; i
< 2; i
++)
7840 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7841 /* Select PERSP_CENTROID. */
7842 for (i
= 0; i
< 2; i
++) {
7843 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7844 center
[i
], centroid
[i
], "");
7845 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7846 tmp
, base
+ 4 + i
, "");
7849 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7850 /* Read LINEAR_CENTER. */
7851 for (i
= 0; i
< 2; i
++)
7852 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7853 /* Read LINEAR_CENTROID. */
7854 for (i
= 0; i
< 2; i
++)
7855 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7856 /* Select LINEAR_CENTROID. */
7857 for (i
= 0; i
< 2; i
++) {
7858 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7859 center
[i
], centroid
[i
], "");
7860 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7861 tmp
, base
+ 10 + i
, "");
7866 /* Force per-sample interpolation. */
7867 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7868 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7869 LLVMValueRef persp_sample
[2];
7871 /* Read PERSP_SAMPLE. */
7872 for (i
= 0; i
< 2; i
++)
7873 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7874 /* Overwrite PERSP_CENTER. */
7875 for (i
= 0; i
< 2; i
++)
7876 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7877 persp_sample
[i
], base
+ 2 + i
, "");
7878 /* Overwrite PERSP_CENTROID. */
7879 for (i
= 0; i
< 2; i
++)
7880 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7881 persp_sample
[i
], base
+ 4 + i
, "");
7883 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7884 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7885 LLVMValueRef linear_sample
[2];
7887 /* Read LINEAR_SAMPLE. */
7888 for (i
= 0; i
< 2; i
++)
7889 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7890 /* Overwrite LINEAR_CENTER. */
7891 for (i
= 0; i
< 2; i
++)
7892 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7893 linear_sample
[i
], base
+ 8 + i
, "");
7894 /* Overwrite LINEAR_CENTROID. */
7895 for (i
= 0; i
< 2; i
++)
7896 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7897 linear_sample
[i
], base
+ 10 + i
, "");
7900 /* Force center interpolation. */
7901 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7902 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7903 LLVMValueRef persp_center
[2];
7905 /* Read PERSP_CENTER. */
7906 for (i
= 0; i
< 2; i
++)
7907 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7908 /* Overwrite PERSP_SAMPLE. */
7909 for (i
= 0; i
< 2; i
++)
7910 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7911 persp_center
[i
], base
+ i
, "");
7912 /* Overwrite PERSP_CENTROID. */
7913 for (i
= 0; i
< 2; i
++)
7914 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7915 persp_center
[i
], base
+ 4 + i
, "");
7917 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7918 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7919 LLVMValueRef linear_center
[2];
7921 /* Read LINEAR_CENTER. */
7922 for (i
= 0; i
< 2; i
++)
7923 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7924 /* Overwrite LINEAR_SAMPLE. */
7925 for (i
= 0; i
< 2; i
++)
7926 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7927 linear_center
[i
], base
+ 6 + i
, "");
7928 /* Overwrite LINEAR_CENTROID. */
7929 for (i
= 0; i
< 2; i
++)
7930 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7931 linear_center
[i
], base
+ 10 + i
, "");
7934 /* Interpolate colors. */
7935 unsigned color_out_idx
= 0;
7936 for (i
= 0; i
< 2; i
++) {
7937 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7938 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7939 key
->ps_prolog
.face_vgpr_index
;
7940 LLVMValueRef interp
[2], color
[4];
7941 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7946 /* If the interpolation qualifier is not CONSTANT (-1). */
7947 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7948 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7949 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7951 /* Get the (i,j) updated by bc_optimize handling. */
7952 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7954 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7955 interp_vgpr
+ 1, "");
7956 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7959 /* Use the absolute location of the input. */
7960 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7962 if (key
->ps_prolog
.states
.color_two_side
) {
7963 face
= LLVMGetParam(func
, face_vgpr
);
7964 face
= ac_to_integer(&ctx
->ac
, face
);
7967 interp_fs_input(ctx
,
7968 key
->ps_prolog
.color_attr_index
[i
],
7969 TGSI_SEMANTIC_COLOR
, i
,
7970 key
->ps_prolog
.num_interp_inputs
,
7971 key
->ps_prolog
.colors_read
, interp_ij
,
7972 prim_mask
, face
, color
);
7975 unsigned chan
= u_bit_scan(&writemask
);
7976 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7977 fninfo
.num_params
+ color_out_idx
++, "");
7981 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7984 * "When per-sample shading is active due to the use of a fragment
7985 * input qualified by sample or due to the use of the gl_SampleID
7986 * or gl_SamplePosition variables, only the bit for the current
7987 * sample is set in gl_SampleMaskIn. When state specifies multiple
7988 * fragment shader invocations for a given fragment, the sample
7989 * mask for any single fragment shader invocation may specify a
7990 * subset of the covered samples for the fragment. In this case,
7991 * the bit corresponding to each covered sample will be set in
7992 * exactly one fragment shader invocation."
7994 * The samplemask loaded by hardware is always the coverage of the
7995 * entire pixel/fragment, so mask bits out based on the sample ID.
7997 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7998 /* The bit pattern matches that used by fixed function fragment
8000 static const uint16_t ps_iter_masks
[] = {
8001 0xffff, /* not used */
8007 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
8009 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
8010 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8011 key
->ps_prolog
.ancillary_vgpr_index
;
8012 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
8013 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
8015 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
8016 samplemask
= LLVMBuildAnd(
8019 LLVMBuildShl(ctx
->ac
.builder
,
8020 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
8023 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
8025 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
8026 ancillary_vgpr
+ 1, "");
8029 /* Tell LLVM to insert WQM instruction sequence when needed. */
8030 if (key
->ps_prolog
.wqm
) {
8031 LLVMAddTargetDependentFunctionAttr(func
,
8032 "amdgpu-ps-wqm-outputs", "");
8035 si_llvm_build_ret(ctx
, ret
);
8039 * Build the pixel shader epilog function. This handles everything that must be
8040 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8042 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8043 union si_shader_part_key
*key
)
8045 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8046 struct si_function_info fninfo
;
8047 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8049 struct si_ps_exports exp
= {};
8051 si_init_function_info(&fninfo
);
8053 /* Declare input SGPRs. */
8054 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8055 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8056 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8057 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8058 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
8060 /* Declare input VGPRs. */
8061 unsigned required_num_params
=
8062 fninfo
.num_sgpr_params
+
8063 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8064 key
->ps_epilog
.writes_z
+
8065 key
->ps_epilog
.writes_stencil
+
8066 key
->ps_epilog
.writes_samplemask
;
8068 required_num_params
= MAX2(required_num_params
,
8069 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8071 while (fninfo
.num_params
< required_num_params
)
8072 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
8074 /* Create the function. */
8075 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
8076 /* Disable elimination of unused inputs. */
8077 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8078 "InitialPSInputAddr", 0xffffff);
8080 /* Process colors. */
8081 unsigned vgpr
= fninfo
.num_sgpr_params
;
8082 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8083 int last_color_export
= -1;
8085 /* Find the last color export. */
8086 if (!key
->ps_epilog
.writes_z
&&
8087 !key
->ps_epilog
.writes_stencil
&&
8088 !key
->ps_epilog
.writes_samplemask
) {
8089 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8091 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8092 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8093 /* Just set this if any of the colorbuffers are enabled. */
8095 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8096 last_color_export
= 0;
8098 for (i
= 0; i
< 8; i
++)
8099 if (colors_written
& (1 << i
) &&
8100 (spi_format
>> (i
* 4)) & 0xf)
8101 last_color_export
= i
;
8105 while (colors_written
) {
8106 LLVMValueRef color
[4];
8107 int mrt
= u_bit_scan(&colors_written
);
8109 for (i
= 0; i
< 4; i
++)
8110 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8112 si_export_mrt_color(bld_base
, color
, mrt
,
8113 fninfo
.num_params
- 1,
8114 mrt
== last_color_export
, &exp
);
8117 /* Process depth, stencil, samplemask. */
8118 if (key
->ps_epilog
.writes_z
)
8119 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8120 if (key
->ps_epilog
.writes_stencil
)
8121 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8122 if (key
->ps_epilog
.writes_samplemask
)
8123 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8125 if (depth
|| stencil
|| samplemask
)
8126 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8127 else if (last_color_export
== -1)
8128 ac_build_export_null(&ctx
->ac
);
8131 si_emit_ps_exports(ctx
, &exp
);
8134 LLVMBuildRetVoid(ctx
->ac
.builder
);
8138 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8140 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8141 struct ac_llvm_compiler
*compiler
,
8142 struct si_shader
*shader
,
8143 struct pipe_debug_callback
*debug
)
8145 union si_shader_part_key prolog_key
;
8146 union si_shader_part_key epilog_key
;
8148 /* Get the prolog. */
8149 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8151 /* The prolog is a no-op if these aren't set. */
8152 if (si_need_ps_prolog(&prolog_key
)) {
8154 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8155 PIPE_SHADER_FRAGMENT
, true,
8156 &prolog_key
, compiler
, debug
,
8157 si_build_ps_prolog_function
,
8158 "Fragment Shader Prolog");
8159 if (!shader
->prolog
)
8163 /* Get the epilog. */
8164 si_get_ps_epilog_key(shader
, &epilog_key
);
8167 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8168 PIPE_SHADER_FRAGMENT
, false,
8169 &epilog_key
, compiler
, debug
,
8170 si_build_ps_epilog_function
,
8171 "Fragment Shader Epilog");
8172 if (!shader
->epilog
)
8175 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8176 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8177 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8178 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8181 /* Set up the enable bits for per-sample shading if needed. */
8182 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8183 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8184 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8185 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8186 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8187 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8189 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8190 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8191 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8192 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8193 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8194 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8196 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8197 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8198 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8199 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8200 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8201 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8203 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8204 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8205 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8206 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8207 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8208 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8211 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8212 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8213 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8214 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8215 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8218 /* At least one pair of interpolation weights must be enabled. */
8219 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8220 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8221 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8224 /* Samplemask fixup requires the sample ID. */
8225 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8226 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8227 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8230 /* The sample mask input is always enabled, because the API shader always
8231 * passes it through to the epilog. Disable it here if it's unused.
8233 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8234 !shader
->selector
->info
.reads_samplemask
)
8235 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8240 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8243 /* If tessellation is all offchip and on-chip GS isn't used, this
8244 * workaround is not needed.
8248 /* SPI barrier management bug:
8249 * Make sure we have at least 4k of LDS in use to avoid the bug.
8250 * It applies to workgroup sizes of more than one wavefront.
8252 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8253 sscreen
->info
.family
== CHIP_KABINI
)
8254 *lds_size
= MAX2(*lds_size
, 8);
8257 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8258 struct si_shader
*shader
)
8260 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8262 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8264 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8265 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8266 si_multiwave_lds_size_workaround(sscreen
,
8267 &shader
->config
.lds_size
);
8271 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8272 struct si_shader
*shader
,
8273 struct pipe_debug_callback
*debug
)
8275 struct si_shader_selector
*sel
= shader
->selector
;
8276 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8279 /* LS, ES, VS are compiled on demand if the main part hasn't been
8280 * compiled for that stage.
8282 * GS are compiled on demand if the main part hasn't been compiled
8283 * for the chosen NGG-ness.
8285 * Vertex shaders are compiled on demand when a vertex fetch
8286 * workaround must be applied.
8288 if (shader
->is_monolithic
) {
8289 /* Monolithic shader (compiled as a whole, has many variants,
8290 * may take a long time to compile).
8292 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8296 /* The shader consists of several parts:
8298 * - the middle part is the user shader, it has 1 variant only
8299 * and it was compiled during the creation of the shader
8301 * - the prolog part is inserted at the beginning
8302 * - the epilog part is inserted at the end
8304 * The prolog and epilog have many (but simple) variants.
8306 * Starting with gfx9, geometry and tessellation control
8307 * shaders also contain the prolog and user shader parts of
8308 * the previous shader stage.
8314 /* Copy the compiled TGSI shader data over. */
8315 shader
->is_binary_shared
= true;
8316 shader
->binary
= mainp
->binary
;
8317 shader
->config
= mainp
->config
;
8318 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8319 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8320 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8321 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8322 memcpy(shader
->info
.vs_output_param_offset
,
8323 mainp
->info
.vs_output_param_offset
,
8324 sizeof(mainp
->info
.vs_output_param_offset
));
8325 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8326 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8327 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8329 /* Select prologs and/or epilogs. */
8330 switch (sel
->type
) {
8331 case PIPE_SHADER_VERTEX
:
8332 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8335 case PIPE_SHADER_TESS_CTRL
:
8336 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8339 case PIPE_SHADER_TESS_EVAL
:
8341 case PIPE_SHADER_GEOMETRY
:
8342 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8345 case PIPE_SHADER_FRAGMENT
:
8346 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8349 /* Make sure we have at least as many VGPRs as there
8350 * are allocated inputs.
8352 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8353 shader
->info
.num_input_vgprs
);
8358 /* Update SGPR and VGPR counts. */
8359 if (shader
->prolog
) {
8360 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8361 shader
->prolog
->config
.num_sgprs
);
8362 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8363 shader
->prolog
->config
.num_vgprs
);
8365 if (shader
->previous_stage
) {
8366 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8367 shader
->previous_stage
->config
.num_sgprs
);
8368 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8369 shader
->previous_stage
->config
.num_vgprs
);
8370 shader
->config
.spilled_sgprs
=
8371 MAX2(shader
->config
.spilled_sgprs
,
8372 shader
->previous_stage
->config
.spilled_sgprs
);
8373 shader
->config
.spilled_vgprs
=
8374 MAX2(shader
->config
.spilled_vgprs
,
8375 shader
->previous_stage
->config
.spilled_vgprs
);
8376 shader
->info
.private_mem_vgprs
=
8377 MAX2(shader
->info
.private_mem_vgprs
,
8378 shader
->previous_stage
->info
.private_mem_vgprs
);
8379 shader
->config
.scratch_bytes_per_wave
=
8380 MAX2(shader
->config
.scratch_bytes_per_wave
,
8381 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8382 shader
->info
.uses_instanceid
|=
8383 shader
->previous_stage
->info
.uses_instanceid
;
8385 if (shader
->prolog2
) {
8386 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8387 shader
->prolog2
->config
.num_sgprs
);
8388 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8389 shader
->prolog2
->config
.num_vgprs
);
8391 if (shader
->epilog
) {
8392 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8393 shader
->epilog
->config
.num_sgprs
);
8394 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8395 shader
->epilog
->config
.num_vgprs
);
8397 si_calculate_max_simd_waves(shader
);
8400 if (shader
->key
.as_ngg
) {
8401 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8402 gfx10_ngg_calculate_subgroup_info(shader
);
8403 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8404 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8407 si_fix_resource_usage(sscreen
, shader
);
8408 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8411 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8412 fprintf(stderr
, "LLVM failed to upload shader\n");
8419 void si_shader_destroy(struct si_shader
*shader
)
8421 if (shader
->scratch_bo
)
8422 si_resource_reference(&shader
->scratch_bo
, NULL
);
8424 si_resource_reference(&shader
->bo
, NULL
);
8426 if (!shader
->is_binary_shared
)
8427 si_shader_binary_clean(&shader
->binary
);
8429 free(shader
->shader_log
);