2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <llvm/Config/llvm-config.h>
27 #include "util/u_memory.h"
28 #include "util/u_string.h"
29 #include "tgsi/tgsi_build.h"
30 #include "tgsi/tgsi_strings.h"
31 #include "tgsi/tgsi_util.h"
32 #include "tgsi/tgsi_dump.h"
33 #include "tgsi/tgsi_from_mesa.h"
35 #include "ac_binary.h"
36 #include "ac_exp_param.h"
37 #include "ac_shader_util.h"
39 #include "ac_llvm_util.h"
40 #include "si_shader_internal.h"
44 #include "compiler/nir/nir.h"
45 #include "compiler/nir/nir_serialize.h"
47 static const char scratch_rsrc_dword0_symbol
[] =
48 "SCRATCH_RSRC_DWORD0";
50 static const char scratch_rsrc_dword1_symbol
[] =
51 "SCRATCH_RSRC_DWORD1";
53 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
54 struct si_screen
*sscreen
,
55 struct ac_llvm_compiler
*compiler
,
59 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
60 struct lp_build_tgsi_context
*bld_base
,
61 struct lp_build_emit_data
*emit_data
);
63 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
65 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
70 union si_shader_part_key
*key
);
71 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
72 union si_shader_part_key
*key
);
73 static void si_fix_resource_usage(struct si_screen
*sscreen
,
74 struct si_shader
*shader
);
76 /* Ideally pass the sample mask input to the PS epilog as v14, which
77 * is its usual location, so that the shader doesn't have to add v_mov.
79 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
81 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
84 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
90 /** Whether the shader runs as a combination of multiple API shaders */
91 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
93 if (ctx
->screen
->info
.chip_class
<= GFX8
)
96 return ctx
->shader
->key
.as_ls
||
97 ctx
->shader
->key
.as_es
||
98 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
99 ctx
->type
== PIPE_SHADER_GEOMETRY
;
102 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
103 static bool is_merged_shader(struct si_shader_context
*ctx
)
105 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
109 * Returns a unique index for a per-patch semantic name and index. The index
110 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
113 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
115 switch (semantic_name
) {
116 case TGSI_SEMANTIC_TESSOUTER
:
118 case TGSI_SEMANTIC_TESSINNER
:
120 case TGSI_SEMANTIC_PATCH
:
125 assert(!"invalid semantic name");
131 * Returns a unique index for a semantic name and index. The index must be
132 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
135 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
138 switch (semantic_name
) {
139 case TGSI_SEMANTIC_POSITION
:
141 case TGSI_SEMANTIC_GENERIC
:
142 /* Since some shader stages use the the highest used IO index
143 * to determine the size to allocate for inputs/outputs
144 * (in LDS, tess and GS rings). GENERIC should be placed right
145 * after POSITION to make that size as small as possible.
147 if (index
< SI_MAX_IO_GENERIC
)
150 assert(!"invalid generic index");
152 case TGSI_SEMANTIC_FOG
:
153 return SI_MAX_IO_GENERIC
+ 1;
154 case TGSI_SEMANTIC_COLOR
:
156 return SI_MAX_IO_GENERIC
+ 2 + index
;
157 case TGSI_SEMANTIC_BCOLOR
:
159 /* If it's a varying, COLOR and BCOLOR alias. */
161 return SI_MAX_IO_GENERIC
+ 2 + index
;
163 return SI_MAX_IO_GENERIC
+ 4 + index
;
164 case TGSI_SEMANTIC_TEXCOORD
:
166 return SI_MAX_IO_GENERIC
+ 6 + index
;
168 /* These are rarely used between LS and HS or ES and GS. */
169 case TGSI_SEMANTIC_CLIPDIST
:
171 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
172 case TGSI_SEMANTIC_CLIPVERTEX
:
173 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
174 case TGSI_SEMANTIC_PSIZE
:
175 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
177 /* These can't be written by LS, HS, and ES. */
178 case TGSI_SEMANTIC_LAYER
:
179 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
180 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
181 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
182 case TGSI_SEMANTIC_PRIMID
:
183 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
184 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
186 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
187 assert(!"invalid semantic name");
193 * Get the value of a shader input parameter and extract a bitfield.
195 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
196 LLVMValueRef value
, unsigned rshift
,
199 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
200 value
= ac_to_integer(&ctx
->ac
, value
);
203 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
204 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
206 if (rshift
+ bitwidth
< 32) {
207 unsigned mask
= (1 << bitwidth
) - 1;
208 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
209 LLVMConstInt(ctx
->i32
, mask
, 0), "");
215 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
216 struct ac_arg param
, unsigned rshift
,
219 LLVMValueRef value
= ac_get_arg(&ctx
->ac
, param
);
221 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
224 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
227 case PIPE_SHADER_TESS_CTRL
:
228 return si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 0, 8);
230 case PIPE_SHADER_TESS_EVAL
:
231 return ac_get_arg(&ctx
->ac
, ctx
->tes_rel_patch_id
);
239 /* Tessellation shaders pass outputs to the next shader using LDS.
241 * LS outputs = TCS inputs
242 * TCS outputs = TES inputs
245 * - TCS inputs for patch 0
246 * - TCS inputs for patch 1
247 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
249 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
250 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
251 * - TCS outputs for patch 1
252 * - Per-patch TCS outputs for patch 1
253 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
254 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
257 * All three shaders VS(LS), TCS, TES share the same LDS space.
261 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
263 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 8, 13);
266 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
268 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
270 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
271 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
273 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
276 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
278 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
280 return LLVMConstInt(ctx
->i32
, stride
, 0);
283 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
285 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
286 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 0, 13);
288 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
289 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
290 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
291 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
292 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
293 num_patch_outputs
* 4;
294 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
298 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
300 return LLVMBuildMul(ctx
->ac
.builder
,
301 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 0, 16),
302 LLVMConstInt(ctx
->i32
, 4, 0), "");
306 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
308 return LLVMBuildMul(ctx
->ac
.builder
,
309 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 16, 16),
310 LLVMConstInt(ctx
->i32
, 4, 0), "");
314 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
316 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
317 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
319 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
323 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
325 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
326 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
327 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
329 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
333 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
335 LLVMValueRef patch0_patch_data_offset
=
336 get_tcs_out_patch0_patch_data_offset(ctx
);
337 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
338 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
340 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
343 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
345 unsigned tcs_out_vertices
=
346 ctx
->shader
->selector
?
347 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
349 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
350 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
351 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
353 return si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 6, 6);
356 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
361 case PIPE_SHADER_VERTEX
:
362 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
363 return LLVMConstInt(ctx
->i32
, stride
, 0);
365 case PIPE_SHADER_TESS_CTRL
:
366 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
367 ctx
->shader
->is_monolithic
) {
368 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
369 return LLVMConstInt(ctx
->i32
, stride
, 0);
371 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 24, 8);
379 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
380 LLVMValueRef i32
, unsigned index
)
385 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
386 LLVMConstInt(ctx
->i32
, 16, 0), "");
388 return LLVMBuildSExt(ctx
->ac
.builder
,
389 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
394 void si_llvm_load_input_vs(
395 struct si_shader_context
*ctx
,
396 unsigned input_index
,
399 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
400 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
402 if (vs_blit_property
) {
403 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
404 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
405 LLVMIntULE
, vertex_id
,
407 /* Use LLVMIntNE, because we have 3 vertices and only
408 * the middle one should use y2.
410 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
411 LLVMIntNE
, vertex_id
,
414 unsigned param_vs_blit_inputs
= ctx
->vs_blit_inputs
.arg_index
;
415 if (input_index
== 0) {
417 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
418 param_vs_blit_inputs
);
419 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
420 param_vs_blit_inputs
+ 1);
422 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
423 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
424 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
425 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
427 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
429 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
432 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
433 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
434 out
[2] = LLVMGetParam(ctx
->main_fn
,
435 param_vs_blit_inputs
+ 2);
436 out
[3] = ctx
->ac
.f32_1
;
440 /* Color or texture coordinates: */
441 assert(input_index
== 1);
443 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
444 for (int i
= 0; i
< 4; i
++) {
445 out
[i
] = LLVMGetParam(ctx
->main_fn
,
446 param_vs_blit_inputs
+ 3 + i
);
449 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
450 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
451 param_vs_blit_inputs
+ 3);
452 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
453 param_vs_blit_inputs
+ 4);
454 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
455 param_vs_blit_inputs
+ 5);
456 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
457 param_vs_blit_inputs
+ 6);
459 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
461 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
463 out
[2] = LLVMGetParam(ctx
->main_fn
,
464 param_vs_blit_inputs
+ 7);
465 out
[3] = LLVMGetParam(ctx
->main_fn
,
466 param_vs_blit_inputs
+ 8);
471 union si_vs_fix_fetch fix_fetch
;
472 LLVMValueRef t_list_ptr
;
473 LLVMValueRef t_offset
;
475 LLVMValueRef vertex_index
;
478 /* Load the T list */
479 t_list_ptr
= ac_get_arg(&ctx
->ac
, ctx
->vertex_buffers
);
481 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
483 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
485 vertex_index
= LLVMGetParam(ctx
->main_fn
,
486 ctx
->vertex_index0
.arg_index
+
489 /* Use the open-coded implementation for all loads of doubles and
490 * of dword-sized data that needs fixups. We need to insert conversion
491 * code anyway, and the amd/common code does it for us.
493 * Note: On LLVM <= 8, we can only open-code formats with
494 * channel size >= 4 bytes.
496 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
497 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
499 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
500 (fix_fetch
.u
.log_size
== 2)) {
501 tmp
= ac_build_opencoded_load_format(
502 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
503 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
504 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
505 for (unsigned i
= 0; i
< 4; ++i
)
506 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
510 /* Do multiple loads for special formats. */
511 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
512 LLVMValueRef fetches
[4];
513 unsigned num_fetches
;
514 unsigned fetch_stride
;
515 unsigned channels_per_fetch
;
517 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
518 num_fetches
= MIN2(required_channels
, 3);
519 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
520 channels_per_fetch
= 1;
524 channels_per_fetch
= required_channels
;
527 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
528 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
529 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
530 channels_per_fetch
, 0, true);
533 if (num_fetches
== 1 && channels_per_fetch
> 1) {
534 LLVMValueRef fetch
= fetches
[0];
535 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
536 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
537 fetches
[i
] = LLVMBuildExtractElement(
538 ctx
->ac
.builder
, fetch
, tmp
, "");
540 num_fetches
= channels_per_fetch
;
541 channels_per_fetch
= 1;
544 for (unsigned i
= num_fetches
; i
< 4; ++i
)
545 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
547 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
548 required_channels
== 4) {
549 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
550 fetches
[3] = ctx
->ac
.i32_1
;
552 fetches
[3] = ctx
->ac
.f32_1
;
553 } else if (fix_fetch
.u
.log_size
== 3 &&
554 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
555 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
556 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
557 required_channels
== 4) {
558 /* For 2_10_10_10, the hardware returns an unsigned value;
559 * convert it to a signed one.
561 LLVMValueRef tmp
= fetches
[3];
562 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
564 /* First, recover the sign-extended signed integer value. */
565 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
566 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
568 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
570 /* For the integer-like cases, do a natural sign extension.
572 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
573 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
576 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
577 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
578 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
579 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
581 /* Convert back to the right type. */
582 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
584 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
585 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
586 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
587 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
588 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
589 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
595 for (unsigned i
= 0; i
< 4; ++i
)
596 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
599 static void declare_input_vs(
600 struct si_shader_context
*ctx
,
601 unsigned input_index
,
602 const struct tgsi_full_declaration
*decl
,
605 si_llvm_load_input_vs(ctx
, input_index
, out
);
608 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
615 case PIPE_SHADER_VERTEX
:
616 return ac_get_arg(&ctx
->ac
, ctx
->vs_prim_id
);
617 case PIPE_SHADER_TESS_CTRL
:
618 return ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
);
619 case PIPE_SHADER_TESS_EVAL
:
620 return ac_get_arg(&ctx
->ac
, ctx
->args
.tes_patch_id
);
621 case PIPE_SHADER_GEOMETRY
:
622 return ac_get_arg(&ctx
->ac
, ctx
->args
.gs_prim_id
);
630 * Return the value of tgsi_ind_register for indexing.
631 * This is the indirect index with the constant offset added to it.
633 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
634 const struct tgsi_ind_register
*ind
,
640 if (ind
->File
== TGSI_FILE_ADDRESS
) {
641 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
642 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
644 struct tgsi_full_src_register src
= {};
646 src
.Register
.File
= ind
->File
;
647 src
.Register
.Index
= ind
->Index
;
649 /* Set the second index to 0 for constants. */
650 if (ind
->File
== TGSI_FILE_CONSTANT
)
651 src
.Register
.Dimension
= 1;
653 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
656 result
= ac_to_integer(&ctx
->ac
, result
);
659 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
660 LLVMConstInt(ctx
->i32
, rel_index
, 0));
664 * Like si_get_indirect_index, but restricts the return value to a (possibly
665 * undefined) value inside [0..num).
667 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
668 const struct tgsi_ind_register
*ind
,
669 int rel_index
, unsigned num
)
671 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
673 return si_llvm_bound_index(ctx
, result
, num
);
676 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
677 LLVMValueRef vertex_dw_stride
,
678 LLVMValueRef base_addr
,
679 LLVMValueRef vertex_index
,
680 LLVMValueRef param_index
,
681 ubyte name
, ubyte index
)
683 if (vertex_dw_stride
) {
684 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
685 vertex_dw_stride
, base_addr
);
689 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
690 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
693 int param
= name
== TGSI_SEMANTIC_PATCH
||
694 name
== TGSI_SEMANTIC_TESSINNER
||
695 name
== TGSI_SEMANTIC_TESSOUTER
?
696 si_shader_io_get_unique_index_patch(name
, index
) :
697 si_shader_io_get_unique_index(name
, index
, false);
699 /* Add the base address of the element. */
700 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
701 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
705 * Calculate a dword address given an input or output register and a stride.
707 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
708 const struct tgsi_full_dst_register
*dst
,
709 const struct tgsi_full_src_register
*src
,
710 LLVMValueRef vertex_dw_stride
,
711 LLVMValueRef base_addr
)
713 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
714 ubyte
*name
, *index
, *array_first
;
716 struct tgsi_full_dst_register reg
;
717 LLVMValueRef vertex_index
= NULL
;
718 LLVMValueRef ind_index
= NULL
;
720 /* Set the register description. The address computation is the same
721 * for sources and destinations. */
723 reg
.Register
.File
= src
->Register
.File
;
724 reg
.Register
.Index
= src
->Register
.Index
;
725 reg
.Register
.Indirect
= src
->Register
.Indirect
;
726 reg
.Register
.Dimension
= src
->Register
.Dimension
;
727 reg
.Indirect
= src
->Indirect
;
728 reg
.Dimension
= src
->Dimension
;
729 reg
.DimIndirect
= src
->DimIndirect
;
733 /* If the register is 2-dimensional (e.g. an array of vertices
734 * in a primitive), calculate the base address of the vertex. */
735 if (reg
.Register
.Dimension
) {
736 if (reg
.Dimension
.Indirect
)
737 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
738 1, reg
.Dimension
.Index
);
740 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
743 /* Get information about the register. */
744 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
745 name
= info
->input_semantic_name
;
746 index
= info
->input_semantic_index
;
747 array_first
= info
->input_array_first
;
748 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
749 name
= info
->output_semantic_name
;
750 index
= info
->output_semantic_index
;
751 array_first
= info
->output_array_first
;
757 if (reg
.Register
.Indirect
) {
758 /* Add the relative address of the element. */
759 if (reg
.Indirect
.ArrayID
)
760 input_index
= array_first
[reg
.Indirect
.ArrayID
];
762 input_index
= reg
.Register
.Index
;
764 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
765 1, reg
.Register
.Index
- input_index
);
767 input_index
= reg
.Register
.Index
;
770 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
771 base_addr
, vertex_index
,
772 ind_index
, name
[input_index
],
776 /* The offchip buffer layout for TCS->TES is
778 * - attribute 0 of patch 0 vertex 0
779 * - attribute 0 of patch 0 vertex 1
780 * - attribute 0 of patch 0 vertex 2
782 * - attribute 0 of patch 1 vertex 0
783 * - attribute 0 of patch 1 vertex 1
785 * - attribute 1 of patch 0 vertex 0
786 * - attribute 1 of patch 0 vertex 1
788 * - per patch attribute 0 of patch 0
789 * - per patch attribute 0 of patch 1
792 * Note that every attribute has 4 components.
794 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
795 LLVMValueRef rel_patch_id
,
796 LLVMValueRef vertex_index
,
797 LLVMValueRef param_index
)
799 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
800 LLVMValueRef param_stride
, constant16
;
802 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
803 num_patches
= si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 6);
804 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
807 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
809 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
810 vertices_per_patch
, vertex_index
);
811 param_stride
= total_vertices
;
813 base_addr
= rel_patch_id
;
814 param_stride
= num_patches
;
817 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
818 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
821 LLVMValueRef patch_data_offset
=
822 si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 12, 20);
824 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
825 patch_data_offset
, "");
830 /* This is a generic helper that can be shared by the NIR and TGSI backends */
831 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
832 struct si_shader_context
*ctx
,
833 LLVMValueRef vertex_index
,
834 LLVMValueRef param_index
,
835 ubyte name
, ubyte index
)
837 unsigned param_index_base
;
839 param_index_base
= name
== TGSI_SEMANTIC_PATCH
||
840 name
== TGSI_SEMANTIC_TESSINNER
||
841 name
== TGSI_SEMANTIC_TESSOUTER
?
842 si_shader_io_get_unique_index_patch(name
, index
) :
843 si_shader_io_get_unique_index(name
, index
, false);
846 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
847 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
850 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
853 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
854 vertex_index
, param_index
);
857 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
858 struct si_shader_context
*ctx
,
859 const struct tgsi_full_dst_register
*dst
,
860 const struct tgsi_full_src_register
*src
)
862 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
863 ubyte
*name
, *index
, *array_first
;
864 struct tgsi_full_src_register reg
;
865 LLVMValueRef vertex_index
= NULL
;
866 LLVMValueRef param_index
= NULL
;
869 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
871 if (reg
.Register
.Dimension
) {
872 if (reg
.Dimension
.Indirect
)
873 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
874 1, reg
.Dimension
.Index
);
876 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
879 /* Get information about the register. */
880 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
881 name
= info
->input_semantic_name
;
882 index
= info
->input_semantic_index
;
883 array_first
= info
->input_array_first
;
884 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
885 name
= info
->output_semantic_name
;
886 index
= info
->output_semantic_index
;
887 array_first
= info
->output_array_first
;
893 if (reg
.Register
.Indirect
) {
894 if (reg
.Indirect
.ArrayID
)
895 param_base
= array_first
[reg
.Indirect
.ArrayID
];
897 param_base
= reg
.Register
.Index
;
899 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
900 1, reg
.Register
.Index
- param_base
);
902 param_base
= reg
.Register
.Index
;
905 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
906 param_index
, name
[param_base
],
910 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
911 LLVMTypeRef type
, unsigned swizzle
,
912 LLVMValueRef buffer
, LLVMValueRef offset
,
913 LLVMValueRef base
, bool can_speculate
)
915 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
916 LLVMValueRef value
, value2
;
917 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
920 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
921 0, ac_glc
, can_speculate
, false);
923 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
926 if (!llvm_type_is_64bit(ctx
, type
)) {
927 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
928 0, ac_glc
, can_speculate
, false);
930 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
931 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
932 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
935 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
936 swizzle
* 4, ac_glc
, can_speculate
, false);
938 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
939 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
941 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
945 * Load from LSHS LDS storage.
947 * \param type output value type
948 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
949 * \param dw_addr address in dwords
951 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
952 LLVMTypeRef type
, unsigned swizzle
,
953 LLVMValueRef dw_addr
)
955 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
959 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
961 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
962 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
964 return ac_build_gather_values(&ctx
->ac
, values
,
968 /* Split 64-bit loads. */
969 if (llvm_type_is_64bit(ctx
, type
)) {
972 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
973 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
974 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
977 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
978 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
980 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
982 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
986 * Store to LSHS LDS storage.
988 * \param swizzle offset (typically 0..3)
989 * \param dw_addr address in dwords
990 * \param value value to store
992 static void lshs_lds_store(struct si_shader_context
*ctx
,
993 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
996 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
997 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
999 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1004 TESS_OFFCHIP_RING_TCS
,
1005 TESS_OFFCHIP_RING_TES
,
1008 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1009 enum si_tess_ring ring
)
1011 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1012 LLVMValueRef addr
= ac_get_arg(&ctx
->ac
,
1013 ring
== TESS_OFFCHIP_RING_TES
?
1014 ctx
->tes_offchip_addr
:
1015 ctx
->tcs_out_lds_layout
);
1017 /* TCS only receives high 13 bits of the address. */
1018 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1019 addr
= LLVMBuildAnd(builder
, addr
,
1020 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1023 if (ring
== TCS_FACTOR_RING
) {
1024 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1025 addr
= LLVMBuildAdd(builder
, addr
,
1026 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1029 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1030 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1031 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1032 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1034 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1035 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1036 S_008F0C_OOB_SELECT(3) |
1037 S_008F0C_RESOURCE_LEVEL(1);
1039 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1040 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1042 LLVMValueRef desc
[4];
1044 desc
[1] = LLVMConstInt(ctx
->i32
,
1045 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1046 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1047 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1049 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1052 static LLVMValueRef
fetch_input_tcs(
1053 struct lp_build_tgsi_context
*bld_base
,
1054 const struct tgsi_full_src_register
*reg
,
1055 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1057 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1058 LLVMValueRef dw_addr
, stride
;
1059 unsigned swizzle
= swizzle_in
& 0xffff;
1060 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1061 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1062 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1064 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1067 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1069 LLVMValueRef vertex_index
,
1070 LLVMValueRef param_index
,
1071 unsigned const_index
,
1073 unsigned driver_location
,
1075 unsigned num_components
,
1080 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1081 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1082 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1083 LLVMValueRef dw_addr
, stride
;
1086 driver_location
= driver_location
/ 4;
1089 name
= info
->input_semantic_name
[driver_location
];
1090 index
= info
->input_semantic_index
[driver_location
];
1092 name
= info
->output_semantic_name
[driver_location
];
1093 index
= info
->output_semantic_index
[driver_location
];
1096 assert((name
== TGSI_SEMANTIC_PATCH
||
1097 name
== TGSI_SEMANTIC_TESSINNER
||
1098 name
== TGSI_SEMANTIC_TESSOUTER
) == is_patch
);
1101 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1102 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1106 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1108 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1109 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1114 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1117 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1118 vertex_index
, param_index
,
1121 LLVMValueRef value
[4];
1122 for (unsigned i
= 0; i
< num_components
; i
++) {
1123 unsigned offset
= i
;
1124 if (llvm_type_is_64bit(ctx
, type
))
1127 offset
+= component
;
1128 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1131 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1134 static LLVMValueRef
fetch_output_tcs(
1135 struct lp_build_tgsi_context
*bld_base
,
1136 const struct tgsi_full_src_register
*reg
,
1137 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1139 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1140 LLVMValueRef dw_addr
, stride
;
1141 unsigned swizzle
= (swizzle_in
& 0xffff);
1143 if (reg
->Register
.Dimension
) {
1144 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1145 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1146 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1148 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1149 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1152 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1155 static LLVMValueRef
fetch_input_tes(
1156 struct lp_build_tgsi_context
*bld_base
,
1157 const struct tgsi_full_src_register
*reg
,
1158 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1160 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1161 LLVMValueRef base
, addr
;
1162 unsigned swizzle
= (swizzle_in
& 0xffff);
1164 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1165 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1167 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1168 ctx
->tess_offchip_ring
, base
, addr
, true);
1171 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1173 LLVMValueRef vertex_index
,
1174 LLVMValueRef param_index
,
1175 unsigned const_index
,
1177 unsigned driver_location
,
1179 unsigned num_components
,
1184 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1185 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1186 LLVMValueRef base
, addr
;
1188 driver_location
= driver_location
/ 4;
1189 ubyte name
= info
->input_semantic_name
[driver_location
];
1190 ubyte index
= info
->input_semantic_index
[driver_location
];
1192 assert((name
== TGSI_SEMANTIC_PATCH
||
1193 name
== TGSI_SEMANTIC_TESSINNER
||
1194 name
== TGSI_SEMANTIC_TESSOUTER
) == is_patch
);
1196 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1199 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1202 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1206 /* TODO: This will generate rather ordinary llvm code, although it
1207 * should be easy for the optimiser to fix up. In future we might want
1208 * to refactor buffer_load(), but for now this maximises code sharing
1209 * between the NIR and TGSI backends.
1211 LLVMValueRef value
[4];
1212 for (unsigned i
= 0; i
< num_components
; i
++) {
1213 unsigned offset
= i
;
1214 if (llvm_type_is_64bit(ctx
, type
)) {
1217 ubyte name
= info
->input_semantic_name
[driver_location
+ 1];
1218 ubyte index
= info
->input_semantic_index
[driver_location
+ 1];
1219 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1225 offset
= offset
% 4;
1228 offset
+= component
;
1229 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1230 ctx
->tess_offchip_ring
, base
, addr
, true);
1233 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1236 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1237 const struct tgsi_full_instruction
*inst
,
1238 const struct tgsi_opcode_info
*info
,
1240 LLVMValueRef dst
[4])
1242 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1243 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1244 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1245 unsigned chan_index
;
1246 LLVMValueRef dw_addr
, stride
;
1247 LLVMValueRef buffer
, base
, buf_addr
;
1248 LLVMValueRef values
[4];
1249 bool skip_lds_store
;
1250 bool is_tess_factor
= false, is_tess_inner
= false;
1252 /* Only handle per-patch and per-vertex outputs here.
1253 * Vectors will be lowered to scalars and this function will be called again.
1255 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1256 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1257 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1261 if (reg
->Register
.Dimension
) {
1262 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1263 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1264 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1265 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1267 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1268 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1269 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1271 if (!reg
->Register
.Indirect
) {
1272 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1274 /* Always write tess factors into LDS for the TCS epilog. */
1275 if (name
== TGSI_SEMANTIC_TESSINNER
||
1276 name
== TGSI_SEMANTIC_TESSOUTER
) {
1277 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1278 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1279 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1280 is_tess_factor
= true;
1281 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1286 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1288 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1289 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1291 uint32_t writemask
= reg
->Register
.WriteMask
;
1293 chan_index
= u_bit_scan(&writemask
);
1294 LLVMValueRef value
= dst
[chan_index
];
1296 if (inst
->Instruction
.Saturate
)
1297 value
= ac_build_clamp(&ctx
->ac
, value
);
1299 /* Skip LDS stores if there is no LDS read of this output. */
1300 if (!skip_lds_store
)
1301 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1303 value
= ac_to_integer(&ctx
->ac
, value
);
1304 values
[chan_index
] = value
;
1306 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1307 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1309 4 * chan_index
, ac_glc
);
1312 /* Write tess factors into VGPRs for the epilog. */
1313 if (is_tess_factor
&&
1314 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1315 if (!is_tess_inner
) {
1316 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1317 ctx
->invoc0_tess_factors
[chan_index
]);
1318 } else if (chan_index
< 2) {
1319 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1320 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1325 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1326 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1328 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1333 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1334 const struct nir_variable
*var
,
1335 LLVMValueRef vertex_index
,
1336 LLVMValueRef param_index
,
1337 unsigned const_index
,
1341 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1342 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1343 const unsigned component
= var
->data
.location_frac
;
1344 unsigned driver_location
= var
->data
.driver_location
;
1345 LLVMValueRef dw_addr
, stride
;
1346 LLVMValueRef buffer
, base
, addr
;
1347 LLVMValueRef values
[8];
1348 bool skip_lds_store
;
1349 bool is_tess_factor
= false, is_tess_inner
= false;
1351 driver_location
= driver_location
/ 4;
1352 ubyte name
= info
->output_semantic_name
[driver_location
];
1353 ubyte index
= info
->output_semantic_index
[driver_location
];
1355 bool is_const
= !param_index
;
1357 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1359 const bool is_patch
= var
->data
.patch
||
1360 var
->data
.location
== VARYING_SLOT_TESS_LEVEL_INNER
||
1361 var
->data
.location
== VARYING_SLOT_TESS_LEVEL_OUTER
;
1363 assert((name
== TGSI_SEMANTIC_PATCH
||
1364 name
== TGSI_SEMANTIC_TESSINNER
||
1365 name
== TGSI_SEMANTIC_TESSOUTER
) == is_patch
);
1368 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1369 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1370 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1371 vertex_index
, param_index
,
1374 skip_lds_store
= !info
->reads_pervertex_outputs
;
1376 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1377 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1378 vertex_index
, param_index
,
1381 skip_lds_store
= !info
->reads_perpatch_outputs
;
1383 if (is_const
&& const_index
== 0) {
1384 int name
= info
->output_semantic_name
[driver_location
];
1386 /* Always write tess factors into LDS for the TCS epilog. */
1387 if (name
== TGSI_SEMANTIC_TESSINNER
||
1388 name
== TGSI_SEMANTIC_TESSOUTER
) {
1389 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1390 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1391 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1392 is_tess_factor
= true;
1393 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1398 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1400 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1402 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1403 param_index
, name
, index
);
1405 for (unsigned chan
= component
; chan
< 8; chan
++) {
1406 if (!(writemask
& (1 << chan
)))
1408 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1410 unsigned buffer_store_offset
= chan
% 4;
1412 ubyte name
= info
->output_semantic_name
[driver_location
+ 1];
1413 ubyte index
= info
->output_semantic_index
[driver_location
+ 1];
1414 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1420 /* Skip LDS stores if there is no LDS read of this output. */
1421 if (!skip_lds_store
)
1422 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1424 value
= ac_to_integer(&ctx
->ac
, value
);
1425 values
[chan
] = value
;
1427 if (writemask
!= 0xF && !is_tess_factor
) {
1428 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1430 4 * buffer_store_offset
,
1434 /* Write tess factors into VGPRs for the epilog. */
1435 if (is_tess_factor
&&
1436 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1437 if (!is_tess_inner
) {
1438 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1439 ctx
->invoc0_tess_factors
[chan
]);
1440 } else if (chan
< 2) {
1441 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1442 ctx
->invoc0_tess_factors
[4 + chan
]);
1447 if (writemask
== 0xF && !is_tess_factor
) {
1448 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1450 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1455 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1456 unsigned input_index
,
1457 unsigned vtx_offset_param
,
1461 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1462 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1463 struct si_shader
*shader
= ctx
->shader
;
1464 LLVMValueRef vtx_offset
, soffset
;
1465 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1466 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1467 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1471 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1473 /* GFX9 has the ESGS ring in LDS. */
1474 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1475 unsigned index
= vtx_offset_param
;
1477 switch (index
/ 2) {
1479 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx01_offset
,
1480 index
% 2 ? 16 : 0, 16);
1483 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx23_offset
,
1484 index
% 2 ? 16 : 0, 16);
1487 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx45_offset
,
1488 index
% 2 ? 16 : 0, 16);
1495 unsigned offset
= param
* 4 + swizzle
;
1496 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1497 LLVMConstInt(ctx
->i32
, offset
, false), "");
1499 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1500 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1501 if (llvm_type_is_64bit(ctx
, type
)) {
1502 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1503 &ctx
->ac
.i32_1
, 1, "");
1504 LLVMValueRef values
[2] = {
1506 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1508 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1510 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1513 /* GFX6: input load from the ESGS ring in memory. */
1514 if (swizzle
== ~0) {
1515 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1517 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1518 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1521 return ac_build_gather_values(&ctx
->ac
, values
,
1525 /* Get the vertex offset parameter on GFX6. */
1526 LLVMValueRef gs_vtx_offset
= ac_get_arg(&ctx
->ac
,
1527 ctx
->gs_vtx_offset
[vtx_offset_param
]);
1529 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1530 LLVMConstInt(ctx
->i32
, 4, 0), "");
1532 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1534 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1535 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1536 if (llvm_type_is_64bit(ctx
, type
)) {
1537 LLVMValueRef value2
;
1538 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1540 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1541 ctx
->i32_0
, vtx_offset
, soffset
,
1542 0, ac_glc
, true, false);
1543 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1545 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1548 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1550 unsigned driver_location
,
1552 unsigned num_components
,
1553 unsigned vertex_index
,
1554 unsigned const_index
,
1557 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1559 LLVMValueRef value
[4];
1560 for (unsigned i
= 0; i
< num_components
; i
++) {
1561 unsigned offset
= i
;
1562 if (llvm_type_is_64bit(ctx
, type
))
1565 offset
+= component
;
1566 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4 + const_index
,
1567 vertex_index
, type
, offset
);
1570 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1573 static LLVMValueRef
fetch_input_gs(
1574 struct lp_build_tgsi_context
*bld_base
,
1575 const struct tgsi_full_src_register
*reg
,
1576 enum tgsi_opcode_type type
,
1577 unsigned swizzle_in
)
1579 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1580 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1581 unsigned swizzle
= swizzle_in
& 0xffff;
1583 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1584 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1585 return si_get_primitive_id(ctx
, swizzle
);
1587 if (!reg
->Register
.Dimension
)
1590 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1591 reg
->Dimension
.Index
,
1592 tgsi2llvmtype(bld_base
, type
),
1596 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1598 switch (interpolate
) {
1599 case TGSI_INTERPOLATE_CONSTANT
:
1602 case TGSI_INTERPOLATE_LINEAR
:
1603 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1604 return SI_PARAM_LINEAR_SAMPLE
;
1605 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1606 return SI_PARAM_LINEAR_CENTROID
;
1608 return SI_PARAM_LINEAR_CENTER
;
1610 case TGSI_INTERPOLATE_COLOR
:
1611 case TGSI_INTERPOLATE_PERSPECTIVE
:
1612 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1613 return SI_PARAM_PERSP_SAMPLE
;
1614 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1615 return SI_PARAM_PERSP_CENTROID
;
1617 return SI_PARAM_PERSP_CENTER
;
1620 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1625 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1626 unsigned attr_index
, unsigned chan
,
1627 LLVMValueRef prim_mask
,
1628 LLVMValueRef i
, LLVMValueRef j
)
1631 return ac_build_fs_interp(&ctx
->ac
,
1632 LLVMConstInt(ctx
->i32
, chan
, 0),
1633 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1636 return ac_build_fs_interp_mov(&ctx
->ac
,
1637 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1638 LLVMConstInt(ctx
->i32
, chan
, 0),
1639 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1644 * Interpolate a fragment shader input.
1646 * @param ctx context
1647 * @param input_index index of the input in hardware
1648 * @param semantic_name TGSI_SEMANTIC_*
1649 * @param semantic_index semantic index
1650 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1651 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1652 * @param interp_param interpolation weights (i,j)
1653 * @param prim_mask SI_PARAM_PRIM_MASK
1654 * @param face SI_PARAM_FRONT_FACE
1655 * @param result the return value (4 components)
1657 static void interp_fs_input(struct si_shader_context
*ctx
,
1658 unsigned input_index
,
1659 unsigned semantic_name
,
1660 unsigned semantic_index
,
1661 unsigned num_interp_inputs
,
1662 unsigned colors_read_mask
,
1663 LLVMValueRef interp_param
,
1664 LLVMValueRef prim_mask
,
1666 LLVMValueRef result
[4])
1668 LLVMValueRef i
= NULL
, j
= NULL
;
1671 /* fs.constant returns the param from the middle vertex, so it's not
1672 * really useful for flat shading. It's meant to be used for custom
1673 * interpolation (but the intrinsic can't fetch from the other two
1676 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1677 * to do the right thing. The only reason we use fs.constant is that
1678 * fs.interp cannot be used on integers, because they can be equal
1681 * When interp is false we will use fs.constant or for newer llvm,
1682 * amdgcn.interp.mov.
1684 bool interp
= interp_param
!= NULL
;
1687 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1688 LLVMVectorType(ctx
->f32
, 2), "");
1690 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1692 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1696 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1697 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1698 LLVMValueRef is_face_positive
;
1700 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1701 * otherwise it's at offset "num_inputs".
1703 unsigned back_attr_offset
= num_interp_inputs
;
1704 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1705 back_attr_offset
+= 1;
1707 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1708 face
, ctx
->i32_0
, "");
1710 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1711 LLVMValueRef front
, back
;
1713 front
= si_build_fs_interp(ctx
,
1716 back
= si_build_fs_interp(ctx
,
1717 back_attr_offset
, chan
,
1720 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1726 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1727 result
[0] = si_build_fs_interp(ctx
, input_index
,
1728 0, prim_mask
, i
, j
);
1730 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1731 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1733 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1734 result
[chan
] = si_build_fs_interp(ctx
,
1741 void si_llvm_load_input_fs(
1742 struct si_shader_context
*ctx
,
1743 unsigned input_index
,
1744 LLVMValueRef out
[4])
1746 struct si_shader
*shader
= ctx
->shader
;
1747 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1748 LLVMValueRef main_fn
= ctx
->main_fn
;
1749 LLVMValueRef interp_param
= NULL
;
1750 int interp_param_idx
;
1751 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1752 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1753 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1754 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1756 /* Get colors from input VGPRs (set by the prolog). */
1757 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1758 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1759 unsigned mask
= colors_read
>> (semantic_index
* 4);
1760 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1761 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1762 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1764 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1765 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1766 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1767 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1771 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1772 if (interp_param_idx
== -1)
1774 else if (interp_param_idx
) {
1775 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1778 interp_fs_input(ctx
, input_index
, semantic_name
,
1779 semantic_index
, 0, /* this param is unused */
1780 shader
->selector
->info
.colors_read
, interp_param
,
1781 ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
),
1782 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1786 static void declare_input_fs(
1787 struct si_shader_context
*ctx
,
1788 unsigned input_index
,
1789 const struct tgsi_full_declaration
*decl
,
1790 LLVMValueRef out
[4])
1792 si_llvm_load_input_fs(ctx
, input_index
, out
);
1795 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1797 return si_unpack_param(ctx
, ctx
->args
.ancillary
, 8, 4);
1800 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1802 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1804 /* For non-indexed draws, the base vertex set by the driver
1805 * (for direct draws) or the CP (for indirect draws) is the
1806 * first vertex ID, but GLSL expects 0 to be returned.
1808 LLVMValueRef vs_state
= ac_get_arg(&ctx
->ac
,
1809 ctx
->vs_state_bits
);
1810 LLVMValueRef indexed
;
1812 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1813 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1815 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
1816 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
),
1820 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1822 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1824 LLVMValueRef values
[3];
1825 LLVMValueRef result
;
1827 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1829 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1830 unsigned sizes
[3] = {
1831 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1832 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1833 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1836 for (i
= 0; i
< 3; ++i
)
1837 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1839 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1841 result
= ac_get_arg(&ctx
->ac
, ctx
->block_size
);
1848 * Load a dword from a constant buffer.
1850 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1851 LLVMValueRef resource
,
1852 LLVMValueRef offset
)
1854 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1858 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1860 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1861 LLVMValueRef desc
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1862 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1863 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1865 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1866 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1867 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1869 LLVMValueRef pos
[4] = {
1870 buffer_load_const(ctx
, resource
, offset0
),
1871 buffer_load_const(ctx
, resource
, offset1
),
1872 LLVMConstReal(ctx
->f32
, 0),
1873 LLVMConstReal(ctx
->f32
, 0)
1876 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1879 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1881 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1882 return ac_to_integer(&ctx
->ac
, ac_get_arg(&ctx
->ac
, ctx
->args
.sample_coverage
));
1885 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1887 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1888 LLVMValueRef coord
[4] = {
1889 ac_get_arg(&ctx
->ac
, ctx
->tes_u
),
1890 ac_get_arg(&ctx
->ac
, ctx
->tes_v
),
1895 /* For triangles, the vector should be (u, v, 1-u-v). */
1896 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1897 PIPE_PRIM_TRIANGLES
) {
1898 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1899 LLVMBuildFAdd(ctx
->ac
.builder
,
1900 coord
[0], coord
[1], ""), "");
1902 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1905 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1906 unsigned semantic_name
)
1908 LLVMValueRef base
, addr
;
1910 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1912 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1913 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1914 LLVMConstInt(ctx
->i32
, param
, 0));
1916 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1917 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1921 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1922 unsigned semantic_name
)
1924 LLVMValueRef buf
, slot
, val
[4];
1927 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1928 buf
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1929 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1930 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1932 for (i
= 0; i
< 4; i
++)
1933 val
[i
] = buffer_load_const(ctx
, buf
,
1934 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1935 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1938 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1939 unsigned varying_id
,
1940 bool load_default_state
)
1942 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1943 unsigned semantic_name
;
1945 if (load_default_state
) {
1946 switch (varying_id
) {
1947 case VARYING_SLOT_TESS_LEVEL_INNER
:
1948 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
1950 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1951 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
1954 unreachable("unknown tess level");
1956 return load_tess_level_default(ctx
, semantic_name
);
1959 switch (varying_id
) {
1960 case VARYING_SLOT_TESS_LEVEL_INNER
:
1961 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1963 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1964 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1967 unreachable("unknown tess level");
1970 return load_tess_level(ctx
, semantic_name
);
1974 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1976 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1977 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1978 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 13, 6);
1979 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1980 return get_num_tcs_out_vertices(ctx
);
1982 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1985 void si_load_system_value(struct si_shader_context
*ctx
,
1987 const struct tgsi_full_declaration
*decl
)
1989 LLVMValueRef value
= 0;
1991 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1993 switch (decl
->Semantic
.Name
) {
1994 case TGSI_SEMANTIC_INSTANCEID
:
1995 value
= ctx
->abi
.instance_id
;
1998 case TGSI_SEMANTIC_VERTEXID
:
1999 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2001 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
), "");
2004 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2005 /* Unused. Clarify the meaning in indexed vs. non-indexed
2006 * draws if this is ever used again. */
2010 case TGSI_SEMANTIC_BASEVERTEX
:
2011 value
= get_base_vertex(&ctx
->abi
);
2014 case TGSI_SEMANTIC_BASEINSTANCE
:
2015 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.start_instance
);
2018 case TGSI_SEMANTIC_DRAWID
:
2019 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.draw_id
);
2022 case TGSI_SEMANTIC_INVOCATIONID
:
2023 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2024 value
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
2025 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2026 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2027 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2028 ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
),
2029 LLVMConstInt(ctx
->i32
, 127, 0), "");
2031 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
);
2034 assert(!"INVOCATIONID not implemented");
2038 case TGSI_SEMANTIC_POSITION
:
2040 LLVMValueRef pos
[4] = {
2041 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2042 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2043 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2044 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2045 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2047 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2051 case TGSI_SEMANTIC_FACE
:
2052 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.front_face
);
2055 case TGSI_SEMANTIC_SAMPLEID
:
2056 value
= si_get_sample_id(ctx
);
2059 case TGSI_SEMANTIC_SAMPLEPOS
: {
2060 LLVMValueRef pos
[4] = {
2061 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2062 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2063 LLVMConstReal(ctx
->f32
, 0),
2064 LLVMConstReal(ctx
->f32
, 0)
2066 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2067 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2068 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2072 case TGSI_SEMANTIC_SAMPLEMASK
:
2073 /* This can only occur with the OpenGL Core profile, which
2074 * doesn't support smoothing.
2076 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2079 case TGSI_SEMANTIC_TESSCOORD
:
2080 value
= si_load_tess_coord(&ctx
->abi
);
2083 case TGSI_SEMANTIC_VERTICESIN
:
2084 value
= si_load_patch_vertices_in(&ctx
->abi
);
2087 case TGSI_SEMANTIC_TESSINNER
:
2088 case TGSI_SEMANTIC_TESSOUTER
:
2089 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2092 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2093 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2094 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2097 case TGSI_SEMANTIC_PRIMID
:
2098 value
= si_get_primitive_id(ctx
, 0);
2101 case TGSI_SEMANTIC_GRID_SIZE
:
2102 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.num_work_groups
);
2105 case TGSI_SEMANTIC_BLOCK_SIZE
:
2106 value
= get_block_size(&ctx
->abi
);
2109 case TGSI_SEMANTIC_BLOCK_ID
:
2111 LLVMValueRef values
[3];
2113 for (int i
= 0; i
< 3; i
++) {
2114 values
[i
] = ctx
->i32_0
;
2115 if (ctx
->args
.workgroup_ids
[i
].used
) {
2116 values
[i
] = ac_get_arg(&ctx
->ac
, ctx
->args
.workgroup_ids
[i
]);
2119 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2123 case TGSI_SEMANTIC_THREAD_ID
:
2124 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.local_invocation_ids
);
2127 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2128 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2131 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2132 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2135 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2136 value
= ac_get_thread_id(&ctx
->ac
);
2139 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2141 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2142 if (ctx
->ac
.wave_size
== 64)
2143 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2144 value
= LLVMBuildShl(ctx
->ac
.builder
,
2145 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2146 if (ctx
->ac
.wave_size
== 32)
2147 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2148 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2152 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2153 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2154 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2155 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2157 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2158 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2159 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2160 /* All bits set except LSB */
2161 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2164 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2166 if (ctx
->ac
.wave_size
== 64)
2167 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2168 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2169 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2170 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2171 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2172 if (ctx
->ac
.wave_size
== 32)
2173 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2174 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2178 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2179 value
= ac_get_arg(&ctx
->ac
, ctx
->cs_user_data
);
2183 assert(!"unknown system value");
2187 ctx
->system_values
[index
] = value
;
2190 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2192 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2193 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2195 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2198 assert(!ctx
->ac
.lds
);
2200 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2201 LLVMArrayType(ctx
->i8
, lds_size
),
2204 LLVMSetAlignment(var
, 64 * 1024);
2206 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2209 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2210 const struct tgsi_full_declaration
*decl
)
2212 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2213 assert(decl
->Range
.First
== decl
->Range
.Last
);
2215 si_declare_compute_memory(ctx
);
2218 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2221 ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2222 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2224 /* Do the bounds checking with a descriptor, because
2225 * doing computation and manual bounds checking of 64-bit
2226 * addresses generates horrible VALU code with very high
2227 * VGPR usage and very low SIMD occupancy.
2229 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2231 LLVMValueRef desc0
, desc1
;
2233 desc1
= LLVMConstInt(ctx
->i32
,
2234 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2236 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2237 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2238 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2239 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2241 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2242 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2243 S_008F0C_OOB_SELECT(3) |
2244 S_008F0C_RESOURCE_LEVEL(1);
2246 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2247 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2249 LLVMValueRef desc_elems
[] = {
2252 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2253 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2256 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2259 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2261 LLVMValueRef list_ptr
= ac_get_arg(&ctx
->ac
,
2262 ctx
->const_and_shader_buffers
);
2264 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2265 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2268 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2270 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2271 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2273 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2275 if (sel
->info
.const_buffers_declared
== 1 &&
2276 sel
->info
.shader_buffers_declared
== 0) {
2277 return load_const_buffer_desc_fast_path(ctx
);
2280 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2281 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2282 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2284 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2288 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2290 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2291 LLVMValueRef rsrc_ptr
= ac_get_arg(&ctx
->ac
,
2292 ctx
->const_and_shader_buffers
);
2294 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2295 index
= LLVMBuildSub(ctx
->ac
.builder
,
2296 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2299 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2302 static LLVMValueRef
fetch_constant(
2303 struct lp_build_tgsi_context
*bld_base
,
2304 const struct tgsi_full_src_register
*reg
,
2305 enum tgsi_opcode_type type
,
2306 unsigned swizzle_in
)
2308 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2309 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2310 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2312 unsigned swizzle
= swizzle_in
& 0xffff;
2314 LLVMValueRef addr
, bufp
;
2316 if (swizzle_in
== LP_CHAN_ALL
) {
2318 LLVMValueRef values
[4];
2319 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2320 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2322 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2325 /* Split 64-bit loads. */
2326 if (tgsi_type_is_64bit(type
)) {
2327 LLVMValueRef lo
, hi
;
2329 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2330 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2331 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2335 idx
= reg
->Register
.Index
* 4 + swizzle
;
2336 if (reg
->Register
.Indirect
) {
2337 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2339 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2342 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2343 if (sel
->info
.const_buffers_declared
== 1 &&
2344 sel
->info
.shader_buffers_declared
== 0) {
2345 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2346 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2347 return bitcast(bld_base
, type
, result
);
2350 assert(reg
->Register
.Dimension
);
2351 buf
= reg
->Dimension
.Index
;
2353 if (reg
->Dimension
.Indirect
) {
2354 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2356 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2357 reg
->Dimension
.Index
,
2358 ctx
->num_const_buffers
);
2359 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2360 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2361 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2363 bufp
= load_const_buffer_desc(ctx
, buf
);
2365 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2368 /* Initialize arguments for the shader export intrinsic */
2369 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2370 LLVMValueRef
*values
,
2372 struct ac_export_args
*args
)
2374 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2375 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2377 bool is_int8
, is_int10
;
2379 /* Default is 0xf. Adjusted below depending on the format. */
2380 args
->enabled_channels
= 0xf; /* writemask */
2382 /* Specify whether the EXEC mask represents the valid mask */
2383 args
->valid_mask
= 0;
2385 /* Specify whether this is the last export */
2388 /* Specify the target we are exporting */
2389 args
->target
= target
;
2391 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2392 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2393 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2394 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2396 assert(cbuf
>= 0 && cbuf
< 8);
2397 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2398 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2399 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2402 args
->compr
= false;
2403 args
->out
[0] = f32undef
;
2404 args
->out
[1] = f32undef
;
2405 args
->out
[2] = f32undef
;
2406 args
->out
[3] = f32undef
;
2408 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2409 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2410 unsigned bits
, bool hi
) = NULL
;
2412 switch (spi_shader_col_format
) {
2413 case V_028714_SPI_SHADER_ZERO
:
2414 args
->enabled_channels
= 0; /* writemask */
2415 args
->target
= V_008DFC_SQ_EXP_NULL
;
2418 case V_028714_SPI_SHADER_32_R
:
2419 args
->enabled_channels
= 1; /* writemask */
2420 args
->out
[0] = values
[0];
2423 case V_028714_SPI_SHADER_32_GR
:
2424 args
->enabled_channels
= 0x3; /* writemask */
2425 args
->out
[0] = values
[0];
2426 args
->out
[1] = values
[1];
2429 case V_028714_SPI_SHADER_32_AR
:
2430 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2431 args
->enabled_channels
= 0x3; /* writemask */
2432 args
->out
[0] = values
[0];
2433 args
->out
[1] = values
[3];
2435 args
->enabled_channels
= 0x9; /* writemask */
2436 args
->out
[0] = values
[0];
2437 args
->out
[3] = values
[3];
2441 case V_028714_SPI_SHADER_FP16_ABGR
:
2442 packf
= ac_build_cvt_pkrtz_f16
;
2445 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2446 packf
= ac_build_cvt_pknorm_u16
;
2449 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2450 packf
= ac_build_cvt_pknorm_i16
;
2453 case V_028714_SPI_SHADER_UINT16_ABGR
:
2454 packi
= ac_build_cvt_pk_u16
;
2457 case V_028714_SPI_SHADER_SINT16_ABGR
:
2458 packi
= ac_build_cvt_pk_i16
;
2461 case V_028714_SPI_SHADER_32_ABGR
:
2462 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2466 /* Pack f16 or norm_i16/u16. */
2468 for (chan
= 0; chan
< 2; chan
++) {
2469 LLVMValueRef pack_args
[2] = {
2471 values
[2 * chan
+ 1]
2473 LLVMValueRef packed
;
2475 packed
= packf(&ctx
->ac
, pack_args
);
2476 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2478 args
->compr
= 1; /* COMPR flag */
2482 for (chan
= 0; chan
< 2; chan
++) {
2483 LLVMValueRef pack_args
[2] = {
2484 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2485 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2487 LLVMValueRef packed
;
2489 packed
= packi(&ctx
->ac
, pack_args
,
2490 is_int8
? 8 : is_int10
? 10 : 16,
2492 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2494 args
->compr
= 1; /* COMPR flag */
2498 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2501 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2503 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2504 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2505 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2506 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2507 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2508 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2509 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2510 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2512 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2515 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2516 SI_PARAM_ALPHA_REF
);
2517 LLVMValueRef alpha_pass
=
2518 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2519 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2521 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2525 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2527 unsigned samplemask_param
)
2529 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2530 LLVMValueRef coverage
;
2532 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2533 coverage
= LLVMGetParam(ctx
->main_fn
,
2535 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2537 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2539 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2541 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2544 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2545 LLVMConstReal(ctx
->f32
,
2546 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2548 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2551 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2552 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2556 unsigned const_chan
;
2557 LLVMValueRef base_elt
;
2558 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
2559 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2560 SI_VS_CONST_CLIP_PLANES
, 0);
2561 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2563 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2564 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2569 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2571 /* Compute dot products of position and user clip plane vectors */
2572 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2573 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2575 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2576 const_chan
) * 4, 0);
2577 base_elt
= buffer_load_const(ctx
, const_resource
,
2579 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2580 out_elts
[const_chan
], args
->out
[chan
]);
2584 args
->enabled_channels
= 0xf;
2585 args
->valid_mask
= 0;
2587 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2592 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2596 if (so
->num_outputs
)
2597 fprintf(stderr
, "STREAMOUT\n");
2599 for (i
= 0; i
< so
->num_outputs
; i
++) {
2600 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2601 so
->output
[i
].start_component
;
2602 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2603 i
, so
->output
[i
].output_buffer
,
2604 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2605 so
->output
[i
].register_index
,
2606 mask
& 1 ? "x" : "",
2607 mask
& 2 ? "y" : "",
2608 mask
& 4 ? "z" : "",
2609 mask
& 8 ? "w" : "");
2613 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2614 LLVMValueRef
const *so_buffers
,
2615 LLVMValueRef
const *so_write_offsets
,
2616 struct pipe_stream_output
*stream_out
,
2617 struct si_shader_output_values
*shader_out
)
2619 unsigned buf_idx
= stream_out
->output_buffer
;
2620 unsigned start
= stream_out
->start_component
;
2621 unsigned num_comps
= stream_out
->num_components
;
2622 LLVMValueRef out
[4];
2624 assert(num_comps
&& num_comps
<= 4);
2625 if (!num_comps
|| num_comps
> 4)
2628 /* Load the output as int. */
2629 for (int j
= 0; j
< num_comps
; j
++) {
2630 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2632 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2635 /* Pack the output. */
2636 LLVMValueRef vdata
= NULL
;
2638 switch (num_comps
) {
2639 case 1: /* as i32 */
2642 case 2: /* as v2i32 */
2643 case 3: /* as v3i32 */
2644 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2645 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2648 /* as v4i32 (aligned to 4) */
2649 out
[3] = LLVMGetUndef(ctx
->i32
);
2651 case 4: /* as v4i32 */
2652 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2656 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2658 so_write_offsets
[buf_idx
],
2660 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
);
2664 * Write streamout data to buffers for vertex stream @p stream (different
2665 * vertex streams can occur for GS copy shaders).
2667 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2668 struct si_shader_output_values
*outputs
,
2669 unsigned noutput
, unsigned stream
)
2671 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2672 struct pipe_stream_output_info
*so
= &sel
->so
;
2673 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2676 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2677 LLVMValueRef so_vtx_count
=
2678 si_unpack_param(ctx
, ctx
->streamout_config
, 16, 7);
2680 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2682 /* can_emit = tid < so_vtx_count; */
2683 LLVMValueRef can_emit
=
2684 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2686 /* Emit the streamout code conditionally. This actually avoids
2687 * out-of-bounds buffer access. The hw tells us via the SGPR
2688 * (so_vtx_count) which threads are allowed to emit streamout data. */
2689 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2691 /* The buffer offset is computed as follows:
2692 * ByteOffset = streamout_offset[buffer_id]*4 +
2693 * (streamout_write_index + thread_id)*stride[buffer_id] +
2697 LLVMValueRef so_write_index
=
2698 ac_get_arg(&ctx
->ac
,
2699 ctx
->streamout_write_index
);
2701 /* Compute (streamout_write_index + thread_id). */
2702 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2704 /* Load the descriptor and compute the write offset for each
2705 * enabled buffer. */
2706 LLVMValueRef so_write_offset
[4] = {};
2707 LLVMValueRef so_buffers
[4];
2708 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
,
2711 for (i
= 0; i
< 4; i
++) {
2715 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2716 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2718 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2720 LLVMValueRef so_offset
= ac_get_arg(&ctx
->ac
,
2721 ctx
->streamout_offset
[i
]);
2722 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2724 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2725 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2729 /* Write streamout data. */
2730 for (i
= 0; i
< so
->num_outputs
; i
++) {
2731 unsigned reg
= so
->output
[i
].register_index
;
2736 if (stream
!= so
->output
[i
].stream
)
2739 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2740 &so
->output
[i
], &outputs
[reg
]);
2743 ac_build_endif(&ctx
->ac
, 6501);
2746 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2747 LLVMValueRef
*values
)
2749 struct ac_export_args args
;
2751 si_llvm_init_export_args(ctx
, values
,
2752 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2753 ac_build_export(&ctx
->ac
, &args
);
2756 static void si_build_param_exports(struct si_shader_context
*ctx
,
2757 struct si_shader_output_values
*outputs
,
2760 struct si_shader
*shader
= ctx
->shader
;
2761 unsigned param_count
= 0;
2763 for (unsigned i
= 0; i
< noutput
; i
++) {
2764 unsigned semantic_name
= outputs
[i
].semantic_name
;
2765 unsigned semantic_index
= outputs
[i
].semantic_index
;
2767 if (outputs
[i
].vertex_stream
[0] != 0 &&
2768 outputs
[i
].vertex_stream
[1] != 0 &&
2769 outputs
[i
].vertex_stream
[2] != 0 &&
2770 outputs
[i
].vertex_stream
[3] != 0)
2773 switch (semantic_name
) {
2774 case TGSI_SEMANTIC_LAYER
:
2775 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2776 case TGSI_SEMANTIC_CLIPDIST
:
2777 case TGSI_SEMANTIC_COLOR
:
2778 case TGSI_SEMANTIC_BCOLOR
:
2779 case TGSI_SEMANTIC_PRIMID
:
2780 case TGSI_SEMANTIC_FOG
:
2781 case TGSI_SEMANTIC_TEXCOORD
:
2782 case TGSI_SEMANTIC_GENERIC
:
2788 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2789 semantic_index
< SI_MAX_IO_GENERIC
) &&
2790 shader
->key
.opt
.kill_outputs
&
2791 (1ull << si_shader_io_get_unique_index(semantic_name
,
2792 semantic_index
, true)))
2795 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2797 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2798 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2801 shader
->info
.nr_param_exports
= param_count
;
2805 * Vertex color clamping.
2807 * This uses a state constant loaded in a user data SGPR and
2808 * an IF statement is added that clamps all colors if the constant
2811 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2812 struct si_shader_output_values
*outputs
,
2815 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2816 bool has_colors
= false;
2818 /* Store original colors to alloca variables. */
2819 for (unsigned i
= 0; i
< noutput
; i
++) {
2820 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2821 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2824 for (unsigned j
= 0; j
< 4; j
++) {
2825 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2826 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2834 /* The state is in the first bit of the user SGPR. */
2835 LLVMValueRef cond
= ac_get_arg(&ctx
->ac
, ctx
->vs_state_bits
);
2836 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2838 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2840 /* Store clamped colors to alloca variables within the conditional block. */
2841 for (unsigned i
= 0; i
< noutput
; i
++) {
2842 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2843 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2846 for (unsigned j
= 0; j
< 4; j
++) {
2847 LLVMBuildStore(ctx
->ac
.builder
,
2848 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2852 ac_build_endif(&ctx
->ac
, 6502);
2854 /* Load clamped colors */
2855 for (unsigned i
= 0; i
< noutput
; i
++) {
2856 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2857 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2860 for (unsigned j
= 0; j
< 4; j
++) {
2861 outputs
[i
].values
[j
] =
2862 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2867 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2868 * (position and parameter data only).
2870 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2871 struct si_shader_output_values
*outputs
,
2874 struct si_shader
*shader
= ctx
->shader
;
2875 struct ac_export_args pos_args
[4] = {};
2876 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2880 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2882 /* Build position exports. */
2883 for (i
= 0; i
< noutput
; i
++) {
2884 switch (outputs
[i
].semantic_name
) {
2885 case TGSI_SEMANTIC_POSITION
:
2886 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2887 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2889 case TGSI_SEMANTIC_PSIZE
:
2890 psize_value
= outputs
[i
].values
[0];
2892 case TGSI_SEMANTIC_LAYER
:
2893 layer_value
= outputs
[i
].values
[0];
2895 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2896 viewport_index_value
= outputs
[i
].values
[0];
2898 case TGSI_SEMANTIC_EDGEFLAG
:
2899 edgeflag_value
= outputs
[i
].values
[0];
2901 case TGSI_SEMANTIC_CLIPDIST
:
2902 if (!shader
->key
.opt
.clip_disable
) {
2903 unsigned index
= 2 + outputs
[i
].semantic_index
;
2904 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2905 V_008DFC_SQ_EXP_POS
+ index
,
2909 case TGSI_SEMANTIC_CLIPVERTEX
:
2910 if (!shader
->key
.opt
.clip_disable
) {
2911 si_llvm_emit_clipvertex(ctx
, pos_args
,
2918 /* We need to add the position output manually if it's missing. */
2919 if (!pos_args
[0].out
[0]) {
2920 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2921 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2922 pos_args
[0].done
= 0; /* last export? */
2923 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2924 pos_args
[0].compr
= 0; /* COMPR flag */
2925 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2926 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2927 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2928 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2931 bool pos_writes_edgeflag
= shader
->selector
->info
.writes_edgeflag
&&
2932 !shader
->key
.as_ngg
;
2934 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2935 if (shader
->selector
->info
.writes_psize
||
2936 pos_writes_edgeflag
||
2937 shader
->selector
->info
.writes_viewport_index
||
2938 shader
->selector
->info
.writes_layer
) {
2939 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2940 (pos_writes_edgeflag
<< 1) |
2941 (shader
->selector
->info
.writes_layer
<< 2);
2943 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2944 pos_args
[1].done
= 0; /* last export? */
2945 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2946 pos_args
[1].compr
= 0; /* COMPR flag */
2947 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2948 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2949 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2950 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2952 if (shader
->selector
->info
.writes_psize
)
2953 pos_args
[1].out
[0] = psize_value
;
2955 if (pos_writes_edgeflag
) {
2956 /* The output is a float, but the hw expects an integer
2957 * with the first bit containing the edge flag. */
2958 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2961 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2965 /* The LLVM intrinsic expects a float. */
2966 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2969 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2970 /* GFX9 has the layer in out.z[10:0] and the viewport
2971 * index in out.z[19:16].
2973 if (shader
->selector
->info
.writes_layer
)
2974 pos_args
[1].out
[2] = layer_value
;
2976 if (shader
->selector
->info
.writes_viewport_index
) {
2977 LLVMValueRef v
= viewport_index_value
;
2979 v
= ac_to_integer(&ctx
->ac
, v
);
2980 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2981 LLVMConstInt(ctx
->i32
, 16, 0), "");
2982 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2983 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2984 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2985 pos_args
[1].enabled_channels
|= 1 << 2;
2988 if (shader
->selector
->info
.writes_layer
)
2989 pos_args
[1].out
[2] = layer_value
;
2991 if (shader
->selector
->info
.writes_viewport_index
) {
2992 pos_args
[1].out
[3] = viewport_index_value
;
2993 pos_args
[1].enabled_channels
|= 1 << 3;
2998 for (i
= 0; i
< 4; i
++)
2999 if (pos_args
[i
].out
[0])
3000 shader
->info
.nr_pos_exports
++;
3002 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3003 * Setting valid_mask=1 prevents it and has no other effect.
3005 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3006 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3007 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3008 pos_args
[0].valid_mask
= 1;
3011 for (i
= 0; i
< 4; i
++) {
3012 if (!pos_args
[i
].out
[0])
3015 /* Specify the target we are exporting */
3016 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3018 if (pos_idx
== shader
->info
.nr_pos_exports
)
3019 /* Specify that this is the last export */
3020 pos_args
[i
].done
= 1;
3022 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3025 /* Build parameter exports. */
3026 si_build_param_exports(ctx
, outputs
, noutput
);
3030 * Forward all outputs from the vertex shader to the TES. This is only used
3031 * for the fixed function TCS.
3033 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3035 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3036 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3037 LLVMValueRef lds_vertex_stride
, lds_base
;
3040 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3041 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3042 buffer_offset
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3044 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3045 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3046 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3049 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3051 unsigned i
= u_bit_scan64(&inputs
);
3053 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3054 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3057 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3058 get_rel_patch_id(ctx
),
3060 LLVMConstInt(ctx
->i32
, i
, 0));
3062 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3064 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3065 buffer_offset
, 0, ac_glc
);
3069 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3070 LLVMValueRef rel_patch_id
,
3071 LLVMValueRef invocation_id
,
3072 LLVMValueRef tcs_out_current_patch_data_offset
,
3073 LLVMValueRef invoc0_tf_outer
[4],
3074 LLVMValueRef invoc0_tf_inner
[2])
3076 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3077 struct si_shader
*shader
= ctx
->shader
;
3078 unsigned tess_inner_index
, tess_outer_index
;
3079 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3080 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3081 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3083 /* Add a barrier before loading tess factors from LDS. */
3084 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3085 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3087 /* Do this only for invocation 0, because the tess levels are per-patch,
3090 * This can't jump, because invocation 0 executes this. It should
3091 * at least mask out the loads and stores for other invocations.
3093 ac_build_ifcc(&ctx
->ac
,
3094 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3095 invocation_id
, ctx
->i32_0
, ""), 6503);
3097 /* Determine the layout of one tess factor element in the buffer. */
3098 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3099 case PIPE_PRIM_LINES
:
3100 stride
= 2; /* 2 dwords, 1 vec2 store */
3104 case PIPE_PRIM_TRIANGLES
:
3105 stride
= 4; /* 4 dwords, 1 vec4 store */
3109 case PIPE_PRIM_QUADS
:
3110 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3119 for (i
= 0; i
< 4; i
++) {
3120 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3121 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3124 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3125 /* Tess factors are in VGPRs. */
3126 for (i
= 0; i
< outer_comps
; i
++)
3127 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3128 for (i
= 0; i
< inner_comps
; i
++)
3129 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3131 /* Load tess_inner and tess_outer from LDS.
3132 * Any invocation can write them, so we can't get them from a temporary.
3134 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3135 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3137 lds_base
= tcs_out_current_patch_data_offset
;
3138 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3139 LLVMConstInt(ctx
->i32
,
3140 tess_inner_index
* 4, 0), "");
3141 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3142 LLVMConstInt(ctx
->i32
,
3143 tess_outer_index
* 4, 0), "");
3145 for (i
= 0; i
< outer_comps
; i
++) {
3147 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3149 for (i
= 0; i
< inner_comps
; i
++) {
3150 inner
[i
] = out
[outer_comps
+i
] =
3151 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3155 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3156 /* For isolines, the hardware expects tess factors in the
3157 * reverse order from what GLSL / TGSI specify.
3159 LLVMValueRef tmp
= out
[0];
3164 /* Convert the outputs to vectors for stores. */
3165 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3169 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3171 /* Get the buffer. */
3172 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3174 /* Get the offset. */
3175 tf_base
= ac_get_arg(&ctx
->ac
,
3176 ctx
->tcs_factor_offset
);
3177 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3178 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3180 ac_build_ifcc(&ctx
->ac
,
3181 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3182 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3184 /* Store the dynamic HS control word. */
3186 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3187 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3188 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3189 1, ctx
->i32_0
, tf_base
,
3194 ac_build_endif(&ctx
->ac
, 6504);
3196 /* Store the tessellation factors. */
3197 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3198 MIN2(stride
, 4), byteoffset
, tf_base
,
3202 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3203 stride
- 4, byteoffset
, tf_base
,
3206 /* Store the tess factors into the offchip buffer if TES reads them. */
3207 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3208 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3209 LLVMValueRef tf_inner_offset
;
3210 unsigned param_outer
, param_inner
;
3212 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3213 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3215 param_outer
= si_shader_io_get_unique_index_patch(
3216 TGSI_SEMANTIC_TESSOUTER
, 0);
3217 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3218 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3220 unsigned outer_vec_size
=
3221 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3222 outer_comps
: util_next_power_of_two(outer_comps
);
3223 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3225 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3226 outer_comps
, tf_outer_offset
,
3229 param_inner
= si_shader_io_get_unique_index_patch(
3230 TGSI_SEMANTIC_TESSINNER
, 0);
3231 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3232 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3234 inner_vec
= inner_comps
== 1 ? inner
[0] :
3235 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3236 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3237 inner_comps
, tf_inner_offset
,
3242 ac_build_endif(&ctx
->ac
, 6503);
3246 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3247 struct ac_arg param
, unsigned return_index
)
3249 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3250 ac_get_arg(&ctx
->ac
, param
),
3255 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3256 struct ac_arg param
, unsigned return_index
)
3258 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3259 LLVMValueRef p
= ac_get_arg(&ctx
->ac
, param
);
3261 return LLVMBuildInsertValue(builder
, ret
,
3262 ac_to_float(&ctx
->ac
, p
),
3267 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3268 struct ac_arg param
, unsigned return_index
)
3270 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3271 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, param
);
3272 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3273 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3276 /* This only writes the tessellation factor levels. */
3277 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3278 unsigned max_outputs
,
3279 LLVMValueRef
*addrs
)
3281 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3282 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3283 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3284 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3286 si_copy_tcs_inputs(bld_base
);
3288 rel_patch_id
= get_rel_patch_id(ctx
);
3289 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3290 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3292 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3293 LLVMBasicBlockRef blocks
[2] = {
3294 LLVMGetInsertBlock(builder
),
3295 ctx
->merged_wrap_if_entry_block
3297 LLVMValueRef values
[2];
3299 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3301 values
[0] = rel_patch_id
;
3302 values
[1] = LLVMGetUndef(ctx
->i32
);
3303 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3305 values
[0] = tf_lds_offset
;
3306 values
[1] = LLVMGetUndef(ctx
->i32
);
3307 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3309 values
[0] = invocation_id
;
3310 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3311 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3314 /* Return epilog parameters from this function. */
3315 LLVMValueRef ret
= ctx
->return_value
;
3318 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3319 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3320 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3321 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3322 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3323 /* Tess offchip and tess factor offsets are at the beginning. */
3324 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3325 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3326 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3328 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3329 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3330 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3331 GFX6_SGPR_TCS_OUT_LAYOUT
);
3332 /* Tess offchip and tess factor offsets are after user SGPRs. */
3333 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
,
3334 GFX6_TCS_NUM_USER_SGPR
);
3335 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
,
3336 GFX6_TCS_NUM_USER_SGPR
+ 1);
3337 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3341 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3342 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3343 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3345 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3346 * the invocation_id output does not alias the tcs_rel_ids input,
3347 * which saves a V_MOV on gfx9.
3351 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3352 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3354 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3355 vgpr
++; /* skip the tess factor LDS offset */
3356 for (unsigned i
= 0; i
< 6; i
++) {
3357 LLVMValueRef value
=
3358 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3359 value
= ac_to_float(&ctx
->ac
, value
);
3360 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3363 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3365 ctx
->return_value
= ret
;
3368 /* Pass TCS inputs from LS to TCS on GFX9. */
3369 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3371 LLVMValueRef ret
= ctx
->return_value
;
3373 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3374 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3375 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3376 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3377 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3378 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3380 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3381 8 + SI_SGPR_RW_BUFFERS
);
3382 ret
= si_insert_input_ptr(ctx
, ret
,
3383 ctx
->bindless_samplers_and_images
,
3384 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3386 ret
= si_insert_input_ret(ctx
, ret
, ctx
->vs_state_bits
,
3387 8 + SI_SGPR_VS_STATE_BITS
);
3389 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3390 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3391 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_offsets
,
3392 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3393 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3394 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3396 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3397 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3398 ac_to_float(&ctx
->ac
,
3399 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
)),
3401 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3402 ac_to_float(&ctx
->ac
,
3403 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_rel_ids
)),
3405 ctx
->return_value
= ret
;
3408 /* Pass GS inputs from ES to GS on GFX9. */
3409 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3411 LLVMValueRef ret
= ctx
->return_value
;
3413 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3414 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3415 if (ctx
->shader
->key
.as_ngg
)
3416 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->gs_tg_info
, 2);
3418 ret
= si_insert_input_ret(ctx
, ret
, ctx
->gs2vs_offset
, 2);
3419 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3420 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3422 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3423 8 + SI_SGPR_RW_BUFFERS
);
3424 ret
= si_insert_input_ptr(ctx
, ret
,
3425 ctx
->bindless_samplers_and_images
,
3426 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3427 if (ctx
->screen
->use_ngg
) {
3428 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->vs_state_bits
,
3429 8 + SI_SGPR_VS_STATE_BITS
);
3433 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3434 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3436 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3438 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx01_offset
, vgpr
++);
3439 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx23_offset
, vgpr
++);
3440 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_prim_id
, vgpr
++);
3441 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_invocation_id
, vgpr
++);
3442 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx45_offset
, vgpr
++);
3443 ctx
->return_value
= ret
;
3446 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3447 unsigned max_outputs
,
3448 LLVMValueRef
*addrs
)
3450 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3451 struct si_shader
*shader
= ctx
->shader
;
3452 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3454 LLVMValueRef vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->rel_auto_id
);
3455 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3456 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3457 vertex_dw_stride
, "");
3459 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3460 * its inputs from it. */
3461 for (i
= 0; i
< info
->num_outputs
; i
++) {
3462 unsigned name
= info
->output_semantic_name
[i
];
3463 unsigned index
= info
->output_semantic_index
[i
];
3465 /* The ARB_shader_viewport_layer_array spec contains the
3468 * 2) What happens if gl_ViewportIndex or gl_Layer is
3469 * written in the vertex shader and a geometry shader is
3472 * RESOLVED: The value written by the last vertex processing
3473 * stage is used. If the last vertex processing stage
3474 * (vertex, tessellation evaluation or geometry) does not
3475 * statically assign to gl_ViewportIndex or gl_Layer, index
3476 * or layer zero is assumed.
3478 * So writes to those outputs in VS-as-LS are simply ignored.
3480 if (name
== TGSI_SEMANTIC_LAYER
||
3481 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3484 int param
= si_shader_io_get_unique_index(name
, index
, false);
3485 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3486 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3488 for (chan
= 0; chan
< 4; chan
++) {
3489 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3492 lshs_lds_store(ctx
, chan
, dw_addr
,
3493 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3497 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3498 si_set_ls_return_value_for_tcs(ctx
);
3501 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3502 unsigned max_outputs
,
3503 LLVMValueRef
*addrs
)
3505 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3506 struct si_shader
*es
= ctx
->shader
;
3507 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3508 LLVMValueRef lds_base
= NULL
;
3512 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3513 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3514 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3515 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 24, 4);
3516 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3517 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3518 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3519 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3520 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3523 for (i
= 0; i
< info
->num_outputs
; i
++) {
3526 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3527 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3530 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3531 info
->output_semantic_index
[i
], false);
3533 for (chan
= 0; chan
< 4; chan
++) {
3534 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3537 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3538 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3540 /* GFX9 has the ESGS ring in LDS. */
3541 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3542 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3543 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3544 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3548 ac_build_buffer_store_dword(&ctx
->ac
,
3551 ac_get_arg(&ctx
->ac
, ctx
->es2gs_offset
),
3552 (4 * param
+ chan
) * 4,
3553 ac_glc
| ac_slc
| ac_swizzled
);
3557 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3558 si_set_es_return_value_for_gs(ctx
);
3561 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3563 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3564 return si_unpack_param(ctx
, ctx
->merged_wave_info
, 16, 8);
3566 return ac_get_arg(&ctx
->ac
, ctx
->gs_wave_id
);
3569 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3571 if (ctx
->shader
->key
.as_ngg
) {
3572 gfx10_ngg_gs_emit_epilogue(ctx
);
3576 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3577 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3579 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3580 si_get_gs_wave_id(ctx
));
3582 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3583 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3586 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3587 unsigned max_outputs
,
3588 LLVMValueRef
*addrs
)
3590 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3591 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3593 assert(info
->num_outputs
<= max_outputs
);
3595 emit_gs_epilogue(ctx
);
3598 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3600 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3601 emit_gs_epilogue(ctx
);
3604 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3605 unsigned max_outputs
,
3606 LLVMValueRef
*addrs
)
3608 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3609 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3610 struct si_shader_output_values
*outputs
= NULL
;
3613 assert(!ctx
->shader
->is_gs_copy_shader
);
3614 assert(info
->num_outputs
<= max_outputs
);
3616 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3618 for (i
= 0; i
< info
->num_outputs
; i
++) {
3619 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3620 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3622 for (j
= 0; j
< 4; j
++) {
3623 outputs
[i
].values
[j
] =
3624 LLVMBuildLoad(ctx
->ac
.builder
,
3627 outputs
[i
].vertex_stream
[j
] =
3628 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3632 if (!ctx
->screen
->use_ngg_streamout
&&
3633 ctx
->shader
->selector
->so
.num_outputs
)
3634 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3636 /* Export PrimitiveID. */
3637 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3638 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3639 outputs
[i
].semantic_index
= 0;
3640 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3641 for (j
= 1; j
< 4; j
++)
3642 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3644 memset(outputs
[i
].vertex_stream
, 0,
3645 sizeof(outputs
[i
].vertex_stream
));
3649 si_llvm_export_vs(ctx
, outputs
, i
);
3653 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3654 unsigned max_outputs
,
3655 LLVMValueRef
*addrs
)
3657 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3658 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3659 LLVMValueRef pos
[4] = {};
3661 assert(info
->num_outputs
<= max_outputs
);
3663 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3664 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3667 for (unsigned chan
= 0; chan
< 4; chan
++)
3668 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3671 assert(pos
[0] != NULL
);
3673 /* Return the position output. */
3674 LLVMValueRef ret
= ctx
->return_value
;
3675 for (unsigned chan
= 0; chan
< 4; chan
++)
3676 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3677 ctx
->return_value
= ret
;
3680 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3682 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3684 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3685 &ctx
->outputs
[0][0]);
3688 struct si_ps_exports
{
3690 struct ac_export_args args
[10];
3693 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3694 LLVMValueRef depth
, LLVMValueRef stencil
,
3695 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3697 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3698 struct ac_export_args args
;
3700 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3702 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3705 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3706 LLVMValueRef
*color
, unsigned index
,
3707 unsigned samplemask_param
,
3708 bool is_last
, struct si_ps_exports
*exp
)
3710 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3714 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3715 for (i
= 0; i
< 4; i
++)
3716 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3719 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3720 color
[3] = ctx
->ac
.f32_1
;
3724 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3725 si_alpha_test(bld_base
, color
[3]);
3727 /* Line & polygon smoothing */
3728 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3729 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3732 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3733 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3734 struct ac_export_args args
[8];
3737 /* Get the export arguments, also find out what the last one is. */
3738 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3739 si_llvm_init_export_args(ctx
, color
,
3740 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3741 if (args
[c
].enabled_channels
)
3745 /* Emit all exports. */
3746 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3747 if (is_last
&& last
== c
) {
3748 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3749 args
[c
].done
= 1; /* DONE bit */
3750 } else if (!args
[c
].enabled_channels
)
3751 continue; /* unnecessary NULL export */
3753 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3756 struct ac_export_args args
;
3759 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3762 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3763 args
.done
= 1; /* DONE bit */
3764 } else if (!args
.enabled_channels
)
3765 return; /* unnecessary NULL export */
3767 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3771 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3772 struct si_ps_exports
*exp
)
3774 for (unsigned i
= 0; i
< exp
->num
; i
++)
3775 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3779 * Return PS outputs in this order:
3781 * v[0:3] = color0.xyzw
3782 * v[4:7] = color1.xyzw
3787 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3789 * The alpha-ref SGPR is returned via its original location.
3791 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3792 unsigned max_outputs
,
3793 LLVMValueRef
*addrs
)
3795 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3796 struct si_shader
*shader
= ctx
->shader
;
3797 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3798 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3799 unsigned i
, j
, first_vgpr
, vgpr
;
3801 LLVMValueRef color
[8][4] = {};
3802 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3805 if (ctx
->postponed_kill
)
3806 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3808 /* Read the output values. */
3809 for (i
= 0; i
< info
->num_outputs
; i
++) {
3810 unsigned semantic_name
= info
->output_semantic_name
[i
];
3811 unsigned semantic_index
= info
->output_semantic_index
[i
];
3813 switch (semantic_name
) {
3814 case TGSI_SEMANTIC_COLOR
:
3815 assert(semantic_index
< 8);
3816 for (j
= 0; j
< 4; j
++) {
3817 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3818 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3819 color
[semantic_index
][j
] = result
;
3822 case TGSI_SEMANTIC_POSITION
:
3823 depth
= LLVMBuildLoad(builder
,
3824 addrs
[4 * i
+ 2], "");
3826 case TGSI_SEMANTIC_STENCIL
:
3827 stencil
= LLVMBuildLoad(builder
,
3828 addrs
[4 * i
+ 1], "");
3830 case TGSI_SEMANTIC_SAMPLEMASK
:
3831 samplemask
= LLVMBuildLoad(builder
,
3832 addrs
[4 * i
+ 0], "");
3835 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3840 /* Fill the return structure. */
3841 ret
= ctx
->return_value
;
3844 ret
= LLVMBuildInsertValue(builder
, ret
,
3845 ac_to_integer(&ctx
->ac
,
3846 LLVMGetParam(ctx
->main_fn
,
3847 SI_PARAM_ALPHA_REF
)),
3848 SI_SGPR_ALPHA_REF
, "");
3851 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3852 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3856 for (j
= 0; j
< 4; j
++)
3857 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3860 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3862 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3864 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3866 /* Add the input sample mask for smoothing at the end. */
3867 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3868 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3869 ret
= LLVMBuildInsertValue(builder
, ret
,
3870 LLVMGetParam(ctx
->main_fn
,
3871 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3873 ctx
->return_value
= ret
;
3876 static void membar_emit(
3877 const struct lp_build_tgsi_action
*action
,
3878 struct lp_build_tgsi_context
*bld_base
,
3879 struct lp_build_emit_data
*emit_data
)
3881 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3882 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3883 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3884 unsigned wait_flags
= 0;
3886 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3887 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3889 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3890 TGSI_MEMBAR_SHADER_BUFFER
|
3891 TGSI_MEMBAR_SHADER_IMAGE
))
3892 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3894 if (flags
& TGSI_MEMBAR_SHARED
)
3895 wait_flags
|= AC_WAIT_LGKM
;
3897 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3900 static void clock_emit(
3901 const struct lp_build_tgsi_action
*action
,
3902 struct lp_build_tgsi_context
*bld_base
,
3903 struct lp_build_emit_data
*emit_data
)
3905 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3906 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3908 emit_data
->output
[0] =
3909 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3910 emit_data
->output
[1] =
3911 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3914 static void si_llvm_emit_ddxy(
3915 const struct lp_build_tgsi_action
*action
,
3916 struct lp_build_tgsi_context
*bld_base
,
3917 struct lp_build_emit_data
*emit_data
)
3919 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3920 unsigned opcode
= emit_data
->info
->opcode
;
3925 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3926 mask
= AC_TID_MASK_LEFT
;
3927 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3928 mask
= AC_TID_MASK_TOP
;
3930 mask
= AC_TID_MASK_TOP_LEFT
;
3932 /* for DDX we want to next X pixel, DDY next Y pixel. */
3933 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3935 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3936 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3937 emit_data
->output
[emit_data
->chan
] = val
;
3940 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3941 struct lp_build_tgsi_context
*bld_base
,
3942 struct lp_build_emit_data
*emit_data
)
3944 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3945 struct si_shader
*shader
= ctx
->shader
;
3946 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3947 LLVMValueRef interp_param
;
3948 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3949 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3950 int input_base
, input_array_size
;
3953 LLVMValueRef prim_mask
= ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
);
3954 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3955 int interp_param_idx
;
3959 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3960 /* offset is in second src, first two channels */
3961 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3963 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3965 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3966 LLVMValueRef sample_position
;
3967 LLVMValueRef sample_id
;
3968 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3970 /* fetch sample ID, then fetch its sample position,
3971 * and place into first two channels.
3973 sample_id
= lp_build_emit_fetch(bld_base
,
3974 emit_data
->inst
, 1, TGSI_CHAN_X
);
3975 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3977 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3978 * Language 4.50 spec says about interpolateAtSample:
3980 * "Returns the value of the input interpolant variable at
3981 * the location of sample number sample. If multisample
3982 * buffers are not available, the input variable will be
3983 * evaluated at the center of the pixel. If sample sample
3984 * does not exist, the position used to interpolate the
3985 * input variable is undefined."
3987 * This means that sample_id values outside of the valid are
3988 * in fact valid input, and the usual mechanism for loading the
3989 * sample position doesn't work.
3991 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3992 LLVMValueRef center
[4] = {
3993 LLVMConstReal(ctx
->f32
, 0.5),
3994 LLVMConstReal(ctx
->f32
, 0.5),
3999 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4001 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4004 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4007 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4008 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4010 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4013 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4015 if (input
->Register
.Indirect
) {
4016 unsigned array_id
= input
->Indirect
.ArrayID
;
4019 input_base
= info
->input_array_first
[array_id
];
4020 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4022 input_base
= inst
->Src
[0].Register
.Index
;
4023 input_array_size
= info
->num_inputs
- input_base
;
4026 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4027 1, input
->Register
.Index
- input_base
);
4029 input_base
= inst
->Src
[0].Register
.Index
;
4030 input_array_size
= 1;
4031 array_idx
= ctx
->i32_0
;
4034 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4036 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4037 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4038 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4040 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4042 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4043 if (interp_param_idx
== -1)
4045 else if (interp_param_idx
)
4046 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4048 interp_param
= NULL
;
4050 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4051 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4052 LLVMValueRef ij_out
[2];
4053 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4056 * take the I then J parameters, and the DDX/Y for it, and
4057 * calculate the IJ inputs for the interpolator.
4058 * temp1 = ddx * offset/sample.x + I;
4059 * interp_param.I = ddy * offset/sample.y + temp1;
4060 * temp1 = ddx * offset/sample.x + J;
4061 * interp_param.J = ddy * offset/sample.y + temp1;
4063 for (i
= 0; i
< 2; i
++) {
4064 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4065 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4066 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4067 ddxy_out
, ix_ll
, "");
4068 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4069 ddxy_out
, iy_ll
, "");
4070 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4071 interp_param
, ix_ll
, "");
4074 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4076 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4077 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4079 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4083 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4085 for (chan
= 0; chan
< 4; chan
++) {
4086 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4087 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4089 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4090 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4093 i
= LLVMBuildExtractElement(
4094 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4095 j
= LLVMBuildExtractElement(
4096 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4098 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4101 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4102 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4105 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4106 ctx
->ac
.builder
, gather
, array_idx
, "");
4110 static void vote_all_emit(
4111 const struct lp_build_tgsi_action
*action
,
4112 struct lp_build_tgsi_context
*bld_base
,
4113 struct lp_build_emit_data
*emit_data
)
4115 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4117 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4118 emit_data
->output
[emit_data
->chan
] =
4119 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4122 static void vote_any_emit(
4123 const struct lp_build_tgsi_action
*action
,
4124 struct lp_build_tgsi_context
*bld_base
,
4125 struct lp_build_emit_data
*emit_data
)
4127 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4129 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4130 emit_data
->output
[emit_data
->chan
] =
4131 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4134 static void vote_eq_emit(
4135 const struct lp_build_tgsi_action
*action
,
4136 struct lp_build_tgsi_context
*bld_base
,
4137 struct lp_build_emit_data
*emit_data
)
4139 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4141 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4142 emit_data
->output
[emit_data
->chan
] =
4143 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4146 static void ballot_emit(
4147 const struct lp_build_tgsi_action
*action
,
4148 struct lp_build_tgsi_context
*bld_base
,
4149 struct lp_build_emit_data
*emit_data
)
4151 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4152 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4155 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4156 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4158 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4160 if (ctx
->ac
.wave_size
== 32) {
4161 emit_data
->output
[1] = ctx
->i32_0
;
4163 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4164 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4168 static void read_lane_emit(
4169 const struct lp_build_tgsi_action
*action
,
4170 struct lp_build_tgsi_context
*bld_base
,
4171 struct lp_build_emit_data
*emit_data
)
4173 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4175 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4176 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4177 0, emit_data
->src_chan
);
4179 /* Always read the source invocation (= lane) from the X channel. */
4180 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4182 emit_data
->arg_count
= 2;
4185 /* We currently have no other way to prevent LLVM from lifting the icmp
4186 * calls to a dominating basic block.
4188 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4190 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4191 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4193 emit_data
->output
[emit_data
->chan
] =
4194 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4195 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4196 AC_FUNC_ATTR_READNONE
|
4197 AC_FUNC_ATTR_CONVERGENT
);
4200 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4201 struct lp_build_emit_data
*emit_data
)
4203 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4204 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4208 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4210 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4211 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4215 /* Emit one vertex from the geometry shader */
4216 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4218 LLVMValueRef
*addrs
)
4220 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4222 if (ctx
->shader
->key
.as_ngg
) {
4223 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4227 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4228 struct si_shader
*shader
= ctx
->shader
;
4229 LLVMValueRef soffset
= ac_get_arg(&ctx
->ac
, ctx
->gs2vs_offset
);
4230 LLVMValueRef gs_next_vertex
;
4231 LLVMValueRef can_emit
;
4232 unsigned chan
, offset
;
4235 /* Write vertex attribute values to GSVS ring */
4236 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4237 ctx
->gs_next_vertex
[stream
],
4240 /* If this thread has already emitted the declared maximum number of
4241 * vertices, skip the write: excessive vertex emissions are not
4242 * supposed to have any effect.
4244 * If the shader has no writes to memory, kill it instead. This skips
4245 * further memory loads and may allow LLVM to skip to the end
4248 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4249 LLVMConstInt(ctx
->i32
,
4250 shader
->selector
->gs_max_out_vertices
, 0), "");
4252 bool use_kill
= !info
->writes_memory
;
4254 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4256 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4260 for (i
= 0; i
< info
->num_outputs
; i
++) {
4261 for (chan
= 0; chan
< 4; chan
++) {
4262 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4263 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4266 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4267 LLVMValueRef voffset
=
4268 LLVMConstInt(ctx
->i32
, offset
*
4269 shader
->selector
->gs_max_out_vertices
, 0);
4272 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4273 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4274 LLVMConstInt(ctx
->i32
, 4, 0), "");
4276 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4278 ac_build_buffer_store_dword(&ctx
->ac
,
4279 ctx
->gsvs_ring
[stream
],
4281 voffset
, soffset
, 0,
4282 ac_glc
| ac_slc
| ac_swizzled
);
4286 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4287 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4289 /* Signal vertex emission if vertex data was written. */
4291 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4292 si_get_gs_wave_id(ctx
));
4296 ac_build_endif(&ctx
->ac
, 6505);
4299 /* Emit one vertex from the geometry shader */
4300 static void si_tgsi_emit_vertex(
4301 const struct lp_build_tgsi_action
*action
,
4302 struct lp_build_tgsi_context
*bld_base
,
4303 struct lp_build_emit_data
*emit_data
)
4305 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4306 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4308 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4311 /* Cut one primitive from the geometry shader */
4312 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4315 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4317 if (ctx
->shader
->key
.as_ngg
) {
4318 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4322 /* Signal primitive cut */
4323 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4324 si_get_gs_wave_id(ctx
));
4327 /* Cut one primitive from the geometry shader */
4328 static void si_tgsi_emit_primitive(
4329 const struct lp_build_tgsi_action
*action
,
4330 struct lp_build_tgsi_context
*bld_base
,
4331 struct lp_build_emit_data
*emit_data
)
4333 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4335 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4338 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4339 struct lp_build_tgsi_context
*bld_base
,
4340 struct lp_build_emit_data
*emit_data
)
4342 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4344 /* GFX6 only (thanks to a hw bug workaround):
4345 * The real barrier instruction isn’t needed, because an entire patch
4346 * always fits into a single wave.
4348 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4349 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4350 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4354 ac_build_s_barrier(&ctx
->ac
);
4357 void si_create_function(struct si_shader_context
*ctx
,
4359 LLVMTypeRef
*returns
, unsigned num_returns
,
4360 unsigned max_workgroup_size
)
4362 si_llvm_create_func(ctx
, name
, returns
, num_returns
);
4363 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4365 if (ctx
->screen
->info
.address32_hi
) {
4366 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4367 "amdgpu-32bit-address-high-bits",
4368 ctx
->screen
->info
.address32_hi
);
4371 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4372 "no-signed-zeros-fp-math",
4375 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4378 static void declare_streamout_params(struct si_shader_context
*ctx
,
4379 struct pipe_stream_output_info
*so
)
4381 if (ctx
->screen
->use_ngg_streamout
) {
4382 if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
4383 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4387 /* Streamout SGPRs. */
4388 if (so
->num_outputs
) {
4389 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_config
);
4390 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_write_index
);
4391 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4392 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4395 /* A streamout buffer offset is loaded if the stride is non-zero. */
4396 for (int i
= 0; i
< 4; i
++) {
4400 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_offset
[i
]);
4404 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4406 switch (shader
->selector
->type
) {
4407 case PIPE_SHADER_VERTEX
:
4408 case PIPE_SHADER_TESS_EVAL
:
4409 return shader
->key
.as_ngg
? 128 : 0;
4411 case PIPE_SHADER_TESS_CTRL
:
4412 /* Return this so that LLVM doesn't remove s_barrier
4413 * instructions on chips where we use s_barrier. */
4414 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4416 case PIPE_SHADER_GEOMETRY
:
4417 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4419 case PIPE_SHADER_COMPUTE
:
4420 break; /* see below */
4426 const unsigned *properties
= shader
->selector
->info
.properties
;
4427 unsigned max_work_group_size
=
4428 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4429 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4430 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4432 if (!max_work_group_size
) {
4433 /* This is a variable group size compute shader,
4434 * compile it for the maximum possible group size.
4436 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4438 return max_work_group_size
;
4441 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4444 enum ac_arg_type const_shader_buf_type
;
4446 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4447 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4448 const_shader_buf_type
= AC_ARG_CONST_FLOAT_PTR
;
4450 const_shader_buf_type
= AC_ARG_CONST_DESC_PTR
;
4452 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, const_shader_buf_type
,
4453 assign_params
? &ctx
->const_and_shader_buffers
:
4454 &ctx
->other_const_and_shader_buffers
);
4457 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4460 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4461 assign_params
? &ctx
->samplers_and_images
:
4462 &ctx
->other_samplers_and_images
);
4465 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4468 declare_const_and_shader_buffers(ctx
, assign_params
);
4469 declare_samplers_and_images(ctx
, assign_params
);
4472 static void declare_global_desc_pointers(struct si_shader_context
*ctx
)
4474 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4476 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4477 &ctx
->bindless_samplers_and_images
);
4480 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
)
4482 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4483 if (!ctx
->shader
->is_gs_copy_shader
) {
4484 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.base_vertex
);
4485 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.start_instance
);
4486 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.draw_id
);
4490 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4491 unsigned *num_prolog_vgprs
)
4493 struct si_shader
*shader
= ctx
->shader
;
4495 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.vertex_id
);
4496 if (shader
->key
.as_ls
) {
4497 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->rel_auto_id
);
4498 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4499 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4500 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4502 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4503 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4505 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4506 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4507 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4508 &ctx
->vs_prim_id
); /* user vgpr or PrimID (legacy) */
4509 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4511 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4512 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vs_prim_id
);
4513 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4516 if (!shader
->is_gs_copy_shader
) {
4517 /* Vertex load indices. */
4518 if (shader
->selector
->info
.num_inputs
) {
4519 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4520 &ctx
->vertex_index0
);
4521 for (unsigned i
= 1; i
< shader
->selector
->info
.num_inputs
; i
++)
4522 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
4524 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4528 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4529 unsigned vs_blit_property
)
4531 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4532 &ctx
->vs_blit_inputs
); /* i16 x1, y1 */
4533 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* i16 x1, y1 */
4534 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* depth */
4536 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4537 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color0 */
4538 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color1 */
4539 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color2 */
4540 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color3 */
4541 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4542 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x1 */
4543 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y1 */
4544 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x2 */
4545 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y2 */
4546 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.z */
4547 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.w */
4551 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
)
4553 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_u
);
4554 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_v
);
4555 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->tes_rel_patch_id
);
4556 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tes_patch_id
);
4560 /* Convenient merged shader definitions. */
4561 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4562 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4565 static void add_arg_checked(struct ac_shader_args
*args
,
4566 enum ac_arg_regfile file
,
4567 unsigned registers
, enum ac_arg_type type
,
4571 assert(args
->arg_count
== idx
);
4572 ac_add_arg(args
, file
, registers
, type
, arg
);
4575 static void create_function(struct si_shader_context
*ctx
)
4577 struct si_shader
*shader
= ctx
->shader
;
4578 LLVMTypeRef returns
[16+32*4];
4579 unsigned i
, num_return_sgprs
;
4580 unsigned num_returns
= 0;
4581 unsigned num_prolog_vgprs
= 0;
4582 unsigned type
= ctx
->type
;
4583 unsigned vs_blit_property
=
4584 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4586 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
4588 /* Set MERGED shaders. */
4589 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4590 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4591 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4592 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4593 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4597 case PIPE_SHADER_VERTEX
:
4598 declare_global_desc_pointers(ctx
);
4600 if (vs_blit_property
) {
4601 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4604 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4608 declare_per_stage_desc_pointers(ctx
, true);
4609 declare_vs_specific_input_sgprs(ctx
);
4610 if (!shader
->is_gs_copy_shader
) {
4611 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4612 &ctx
->vertex_buffers
);
4615 if (shader
->key
.as_es
) {
4616 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4617 &ctx
->es2gs_offset
);
4618 } else if (shader
->key
.as_ls
) {
4619 /* no extra parameters */
4621 /* The locations of the other parameters are assigned dynamically. */
4622 declare_streamout_params(ctx
, &shader
->selector
->so
);
4626 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4629 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4630 for (i
= 0; i
< 4; i
++)
4631 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4635 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4636 declare_global_desc_pointers(ctx
);
4637 declare_per_stage_desc_pointers(ctx
, true);
4638 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4639 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4640 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4641 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4642 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4643 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4646 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4647 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4649 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4650 * placed after the user SGPRs.
4652 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4653 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4654 for (i
= 0; i
< 11; i
++)
4655 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4658 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4659 /* Merged stages have 8 system SGPRs at the beginning. */
4660 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4661 declare_per_stage_desc_pointers(ctx
,
4662 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4663 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4664 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4665 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4666 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4667 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4668 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4670 declare_global_desc_pointers(ctx
);
4671 declare_per_stage_desc_pointers(ctx
,
4672 ctx
->type
== PIPE_SHADER_VERTEX
);
4673 declare_vs_specific_input_sgprs(ctx
);
4675 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4676 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4677 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4678 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
, &ctx
->vertex_buffers
);
4680 /* VGPRs (first TCS, then VS) */
4681 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4682 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4684 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4685 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4687 /* LS return values are inputs to the TCS main shader part. */
4688 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4689 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4690 for (i
= 0; i
< 2; i
++)
4691 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4693 /* TCS return values are inputs to the TCS epilog.
4695 * param_tcs_offchip_offset, param_tcs_factor_offset,
4696 * param_tcs_offchip_layout, and param_rw_buffers
4697 * should be passed to the epilog.
4699 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4700 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4701 for (i
= 0; i
< 11; i
++)
4702 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4706 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4707 /* Merged stages have 8 system SGPRs at the beginning. */
4708 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4709 declare_per_stage_desc_pointers(ctx
,
4710 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4712 if (ctx
->shader
->key
.as_ngg
)
4713 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_tg_info
);
4715 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4717 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4718 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4719 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4720 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4721 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4723 declare_global_desc_pointers(ctx
);
4724 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4725 declare_per_stage_desc_pointers(ctx
,
4726 (ctx
->type
== PIPE_SHADER_VERTEX
||
4727 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4730 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4731 if (vs_blit_property
)
4732 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4734 declare_vs_specific_input_sgprs(ctx
);
4736 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4737 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4738 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4739 /* Declare as many input SGPRs as the VS has. */
4742 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4743 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4744 &ctx
->vertex_buffers
);
4747 /* VGPRs (first GS, then VS/TES) */
4748 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx01_offset
);
4749 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx23_offset
);
4750 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4751 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4752 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx45_offset
);
4754 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4755 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4756 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4757 declare_tes_input_vgprs(ctx
);
4760 if (ctx
->shader
->key
.as_es
&&
4761 (ctx
->type
== PIPE_SHADER_VERTEX
||
4762 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4763 unsigned num_user_sgprs
;
4765 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4766 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4768 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4770 /* ES return values are inputs to GS. */
4771 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4772 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4773 for (i
= 0; i
< 5; i
++)
4774 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4778 case PIPE_SHADER_TESS_EVAL
:
4779 declare_global_desc_pointers(ctx
);
4780 declare_per_stage_desc_pointers(ctx
, true);
4781 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4782 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4783 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4785 if (shader
->key
.as_es
) {
4786 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4787 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4788 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->es2gs_offset
);
4790 declare_streamout_params(ctx
, &shader
->selector
->so
);
4791 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4795 declare_tes_input_vgprs(ctx
);
4798 case PIPE_SHADER_GEOMETRY
:
4799 declare_global_desc_pointers(ctx
);
4800 declare_per_stage_desc_pointers(ctx
, true);
4801 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4802 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_wave_id
);
4805 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[0]);
4806 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[1]);
4807 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4808 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[2]);
4809 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[3]);
4810 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[4]);
4811 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[5]);
4812 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4815 case PIPE_SHADER_FRAGMENT
:
4816 declare_global_desc_pointers(ctx
);
4817 declare_per_stage_desc_pointers(ctx
, true);
4818 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
,
4819 SI_PARAM_ALPHA_REF
);
4820 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4821 &ctx
->args
.prim_mask
, SI_PARAM_PRIM_MASK
);
4823 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_sample
,
4824 SI_PARAM_PERSP_SAMPLE
);
4825 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4826 &ctx
->args
.persp_center
, SI_PARAM_PERSP_CENTER
);
4827 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4828 &ctx
->args
.persp_centroid
, SI_PARAM_PERSP_CENTROID
);
4829 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4830 NULL
, SI_PARAM_PERSP_PULL_MODEL
);
4831 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4832 &ctx
->args
.linear_sample
, SI_PARAM_LINEAR_SAMPLE
);
4833 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4834 &ctx
->args
.linear_center
, SI_PARAM_LINEAR_CENTER
);
4835 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4836 &ctx
->args
.linear_centroid
, SI_PARAM_LINEAR_CENTROID
);
4837 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_FLOAT
,
4838 NULL
, SI_PARAM_LINE_STIPPLE_TEX
);
4839 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4840 &ctx
->args
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4841 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4842 &ctx
->args
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4843 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4844 &ctx
->args
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4845 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4846 &ctx
->args
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4847 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4848 &ctx
->args
.front_face
, SI_PARAM_FRONT_FACE
);
4849 shader
->info
.face_vgpr_index
= 20;
4850 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4851 &ctx
->args
.ancillary
, SI_PARAM_ANCILLARY
);
4852 shader
->info
.ancillary_vgpr_index
= 21;
4853 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4854 &ctx
->args
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4855 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4856 &ctx
->pos_fixed_pt
, SI_PARAM_POS_FIXED_PT
);
4858 /* Color inputs from the prolog. */
4859 if (shader
->selector
->info
.colors_read
) {
4860 unsigned num_color_elements
=
4861 util_bitcount(shader
->selector
->info
.colors_read
);
4863 for (i
= 0; i
< num_color_elements
; i
++)
4864 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
4866 num_prolog_vgprs
+= num_color_elements
;
4869 /* Outputs for the epilog. */
4870 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4873 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4874 shader
->selector
->info
.writes_z
+
4875 shader
->selector
->info
.writes_stencil
+
4876 shader
->selector
->info
.writes_samplemask
+
4877 1 /* SampleMaskIn */;
4879 num_returns
= MAX2(num_returns
,
4881 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4883 for (i
= 0; i
< num_return_sgprs
; i
++)
4884 returns
[i
] = ctx
->i32
;
4885 for (; i
< num_returns
; i
++)
4886 returns
[i
] = ctx
->f32
;
4889 case PIPE_SHADER_COMPUTE
:
4890 declare_global_desc_pointers(ctx
);
4891 declare_per_stage_desc_pointers(ctx
, true);
4892 if (shader
->selector
->info
.uses_grid_size
)
4893 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
,
4894 &ctx
->args
.num_work_groups
);
4895 if (shader
->selector
->info
.uses_block_size
&&
4896 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4897 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
, &ctx
->block_size
);
4899 unsigned cs_user_data_dwords
=
4900 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
4901 if (cs_user_data_dwords
) {
4902 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, cs_user_data_dwords
, AC_ARG_INT
,
4903 &ctx
->cs_user_data
);
4906 /* Hardware SGPRs. */
4907 for (i
= 0; i
< 3; i
++) {
4908 if (shader
->selector
->info
.uses_block_id
[i
]) {
4909 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4910 &ctx
->args
.workgroup_ids
[i
]);
4913 if (shader
->selector
->info
.uses_subgroup_info
)
4914 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.tg_size
);
4916 /* Hardware VGPRs. */
4917 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4918 &ctx
->args
.local_invocation_ids
);
4921 assert(0 && "unimplemented shader");
4925 si_create_function(ctx
, "main", returns
, num_returns
,
4926 si_get_max_workgroup_size(shader
));
4928 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4929 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4930 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4931 "InitialPSInputAddr",
4932 S_0286D0_PERSP_SAMPLE_ENA(1) |
4933 S_0286D0_PERSP_CENTER_ENA(1) |
4934 S_0286D0_PERSP_CENTROID_ENA(1) |
4935 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4936 S_0286D0_LINEAR_CENTER_ENA(1) |
4937 S_0286D0_LINEAR_CENTROID_ENA(1) |
4938 S_0286D0_FRONT_FACE_ENA(1) |
4939 S_0286D0_ANCILLARY_ENA(1) |
4940 S_0286D0_POS_FIXED_PT_ENA(1));
4943 shader
->info
.num_input_sgprs
= ctx
->args
.num_sgprs_used
;
4944 shader
->info
.num_input_vgprs
= ctx
->args
.num_vgprs_used
;
4946 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4947 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4949 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4950 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
4951 /* The LSHS size is not known until draw time, so we append it
4952 * at the end of whatever LDS use there may be in the rest of
4953 * the shader (currently none, unless LLVM decides to do its
4954 * own LDS-based lowering).
4956 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
4957 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4958 "__lds_end", AC_ADDR_SPACE_LDS
);
4959 LLVMSetAlignment(ctx
->ac
.lds
, 256);
4961 ac_declare_lds_as_pointer(&ctx
->ac
);
4965 /* Unlike radv, we override these arguments in the prolog, so to the
4966 * API shader they appear as normal arguments.
4968 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4969 ctx
->abi
.vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.vertex_id
);
4970 ctx
->abi
.instance_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.instance_id
);
4971 } else if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
4972 ctx
->abi
.persp_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.persp_centroid
);
4973 ctx
->abi
.linear_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.linear_centroid
);
4977 /* Ensure that the esgs ring is declared.
4979 * We declare it with 64KB alignment as a hint that the
4980 * pointer value will always be 0.
4982 static void declare_esgs_ring(struct si_shader_context
*ctx
)
4987 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
4989 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
4990 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4993 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
4994 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
4998 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5001 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5003 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5005 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
5007 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5008 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5010 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5012 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5015 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5017 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
5018 /* Declare the ESGS ring as an explicit LDS symbol. */
5019 declare_esgs_ring(ctx
);
5021 ac_declare_lds_as_pointer(&ctx
->ac
);
5022 ctx
->esgs_ring
= ctx
->ac
.lds
;
5027 if (ctx
->shader
->is_gs_copy_shader
) {
5028 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5031 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5032 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5033 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5034 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5035 LLVMValueRef base_ring
;
5037 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5039 /* The conceptual layout of the GSVS ring is
5040 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5041 * but the real memory layout is swizzled across
5043 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5045 * Override the buffer descriptor accordingly.
5047 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5048 uint64_t stream_offset
= 0;
5050 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5051 unsigned num_components
;
5053 unsigned num_records
;
5054 LLVMValueRef ring
, tmp
;
5056 num_components
= sel
->info
.num_stream_output_components
[stream
];
5057 if (!num_components
)
5060 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5062 /* Limit on the stride field for <= GFX7. */
5063 assert(stride
< (1 << 14));
5065 num_records
= ctx
->ac
.wave_size
;
5067 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5068 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5069 tmp
= LLVMBuildAdd(builder
, tmp
,
5070 LLVMConstInt(ctx
->i64
,
5071 stream_offset
, 0), "");
5072 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5074 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5075 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5076 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5077 tmp
= LLVMBuildOr(builder
, tmp
,
5078 LLVMConstInt(ctx
->i32
,
5079 S_008F04_STRIDE(stride
) |
5080 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5081 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5082 ring
= LLVMBuildInsertElement(builder
, ring
,
5083 LLVMConstInt(ctx
->i32
, num_records
, 0),
5084 LLVMConstInt(ctx
->i32
, 2, 0), "");
5087 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5088 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5089 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5090 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5091 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5092 S_008F0C_ADD_TID_ENABLE(1);
5094 if (ctx
->ac
.chip_class
>= GFX10
) {
5095 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5096 S_008F0C_OOB_SELECT(2) |
5097 S_008F0C_RESOURCE_LEVEL(1);
5099 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5100 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5101 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5104 ring
= LLVMBuildInsertElement(builder
, ring
,
5105 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5106 LLVMConstInt(ctx
->i32
, 3, 0), "");
5108 ctx
->gsvs_ring
[stream
] = ring
;
5110 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5111 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5115 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5116 LLVMValueRef param_rw_buffers
,
5117 struct ac_arg param_pos_fixed_pt
)
5119 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5120 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5122 /* Use the fixed-point gl_FragCoord input.
5123 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5124 * per coordinate to get the repeating effect.
5126 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5127 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5129 /* Load the buffer descriptor. */
5130 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5131 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5133 /* The stipple pattern is 32x32, each row has 32 bits. */
5134 offset
= LLVMBuildMul(builder
, address
[1],
5135 LLVMConstInt(ctx
->i32
, 4, 0), "");
5136 row
= buffer_load_const(ctx
, desc
, offset
);
5137 row
= ac_to_integer(&ctx
->ac
, row
);
5138 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5139 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5140 ac_build_kill_if_false(&ctx
->ac
, bit
);
5143 /* For the UMR disassembler. */
5144 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5145 #define DEBUGGER_NUM_MARKERS 5
5147 static bool si_shader_binary_open(struct si_screen
*screen
,
5148 struct si_shader
*shader
,
5149 struct ac_rtld_binary
*rtld
)
5151 const struct si_shader_selector
*sel
= shader
->selector
;
5152 const char *part_elfs
[5];
5153 size_t part_sizes
[5];
5154 unsigned num_parts
= 0;
5156 #define add_part(shader_or_part) \
5157 if (shader_or_part) { \
5158 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5159 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5163 add_part(shader
->prolog
);
5164 add_part(shader
->previous_stage
);
5165 add_part(shader
->prolog2
);
5167 add_part(shader
->epilog
);
5171 struct ac_rtld_symbol lds_symbols
[2];
5172 unsigned num_lds_symbols
= 0;
5174 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5175 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5176 /* We add this symbol even on LLVM <= 8 to ensure that
5177 * shader->config.lds_size is set correctly below.
5179 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5180 sym
->name
= "esgs_ring";
5181 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5182 sym
->align
= 64 * 1024;
5185 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5186 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5187 sym
->name
= "ngg_emit";
5188 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5192 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5193 .info
= &screen
->info
,
5195 .halt_at_entry
= screen
->options
.halt_shaders
,
5197 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5198 .wave_size
= si_get_shader_wave_size(shader
),
5199 .num_parts
= num_parts
,
5200 .elf_ptrs
= part_elfs
,
5201 .elf_sizes
= part_sizes
,
5202 .num_shared_lds_symbols
= num_lds_symbols
,
5203 .shared_lds_symbols
= lds_symbols
});
5205 if (rtld
->lds_size
> 0) {
5206 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5207 shader
->config
.lds_size
=
5208 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5214 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5216 struct ac_rtld_binary rtld
;
5217 si_shader_binary_open(screen
, shader
, &rtld
);
5218 return rtld
.exec_size
;
5221 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5223 uint64_t *scratch_va
= data
;
5225 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5226 *value
= (uint32_t)*scratch_va
;
5229 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5230 /* Enable scratch coalescing. */
5231 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5232 S_008F04_SWIZZLE_ENABLE(1);
5239 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5240 uint64_t scratch_va
)
5242 struct ac_rtld_binary binary
;
5243 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5246 si_resource_reference(&shader
->bo
, NULL
);
5247 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5248 sscreen
->info
.cpdma_prefetch_writes_memory
?
5249 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5250 PIPE_USAGE_IMMUTABLE
,
5251 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5257 struct ac_rtld_upload_info u
= {};
5259 u
.get_external_symbol
= si_get_external_symbol
;
5260 u
.cb_data
= &scratch_va
;
5261 u
.rx_va
= shader
->bo
->gpu_address
;
5262 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5263 PIPE_TRANSFER_READ_WRITE
|
5264 PIPE_TRANSFER_UNSYNCHRONIZED
|
5265 RADEON_TRANSFER_TEMPORARY
);
5269 bool ok
= ac_rtld_upload(&u
);
5271 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5272 ac_rtld_close(&binary
);
5277 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5278 const struct si_shader_binary
*binary
,
5279 enum pipe_shader_type shader_type
,
5281 struct pipe_debug_callback
*debug
,
5282 const char *name
, FILE *file
)
5284 struct ac_rtld_binary rtld_binary
;
5286 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5287 .info
= &screen
->info
,
5288 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5289 .wave_size
= wave_size
,
5291 .elf_ptrs
= &binary
->elf_buffer
,
5292 .elf_sizes
= &binary
->elf_size
}))
5298 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5301 if (nbytes
> INT_MAX
)
5304 if (debug
&& debug
->debug_message
) {
5305 /* Very long debug messages are cut off, so send the
5306 * disassembly one line at a time. This causes more
5307 * overhead, but on the plus side it simplifies
5308 * parsing of resulting logs.
5310 pipe_debug_message(debug
, SHADER_INFO
,
5311 "Shader Disassembly Begin");
5314 while (line
< nbytes
) {
5315 int count
= nbytes
- line
;
5316 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5318 count
= nl
- (disasm
+ line
);
5321 pipe_debug_message(debug
, SHADER_INFO
,
5322 "%.*s", count
, disasm
+ line
);
5328 pipe_debug_message(debug
, SHADER_INFO
,
5329 "Shader Disassembly End");
5333 fprintf(file
, "Shader %s disassembly:\n", name
);
5334 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5338 ac_rtld_close(&rtld_binary
);
5341 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5343 struct si_screen
*sscreen
= shader
->selector
->screen
;
5344 struct ac_shader_config
*conf
= &shader
->config
;
5345 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5346 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5347 unsigned lds_per_wave
= 0;
5348 unsigned max_simd_waves
;
5350 max_simd_waves
= sscreen
->info
.max_wave64_per_simd
;
5352 /* Compute LDS usage for PS. */
5353 switch (shader
->selector
->type
) {
5354 case PIPE_SHADER_FRAGMENT
:
5355 /* The minimum usage per wave is (num_inputs * 48). The maximum
5356 * usage is (num_inputs * 48 * 16).
5357 * We can get anything in between and it varies between waves.
5359 * The 48 bytes per input for a single primitive is equal to
5360 * 4 bytes/component * 4 components/input * 3 points.
5362 * Other stages don't know the size at compile time or don't
5363 * allocate LDS per wave, but instead they do it per thread group.
5365 lds_per_wave
= conf
->lds_size
* lds_increment
+
5366 align(num_inputs
* 48, lds_increment
);
5368 case PIPE_SHADER_COMPUTE
:
5369 if (shader
->selector
) {
5370 unsigned max_workgroup_size
=
5371 si_get_max_workgroup_size(shader
);
5372 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5373 DIV_ROUND_UP(max_workgroup_size
,
5374 sscreen
->compute_wave_size
);
5380 /* Compute the per-SIMD wave counts. */
5381 if (conf
->num_sgprs
) {
5383 MIN2(max_simd_waves
,
5384 sscreen
->info
.num_physical_sgprs_per_simd
/ conf
->num_sgprs
);
5387 if (conf
->num_vgprs
) {
5388 /* Always print wave limits as Wave64, so that we can compare
5389 * Wave32 and Wave64 with shader-db fairly. */
5390 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
;
5391 max_simd_waves
= MIN2(max_simd_waves
, max_vgprs
/ conf
->num_vgprs
);
5394 /* LDS is 64KB per CU (4 SIMDs) on GFX6-9, which is 16KB per SIMD (usage above
5395 * 16KB makes some SIMDs unoccupied).
5397 * LDS is 128KB in WGP mode and 64KB in CU mode. Assume the WGP mode is used.
5399 unsigned max_lds_size
= sscreen
->info
.chip_class
>= GFX10
? 128*1024 : 64*1024;
5400 unsigned max_lds_per_simd
= max_lds_size
/ 4;
5402 max_simd_waves
= MIN2(max_simd_waves
, max_lds_per_simd
/ lds_per_wave
);
5404 shader
->info
.max_simd_waves
= max_simd_waves
;
5407 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5408 struct si_shader
*shader
,
5409 struct pipe_debug_callback
*debug
)
5411 const struct ac_shader_config
*conf
= &shader
->config
;
5413 if (screen
->options
.debug_disassembly
)
5414 si_shader_dump_disassembly(screen
, &shader
->binary
,
5415 shader
->selector
->type
,
5416 si_get_shader_wave_size(shader
),
5417 debug
, "main", NULL
);
5419 pipe_debug_message(debug
, SHADER_INFO
,
5420 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5421 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5422 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5423 conf
->num_sgprs
, conf
->num_vgprs
,
5424 si_get_shader_binary_size(screen
, shader
),
5425 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5426 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5427 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5430 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5431 struct si_shader
*shader
,
5433 bool check_debug_option
)
5435 const struct ac_shader_config
*conf
= &shader
->config
;
5437 if (!check_debug_option
||
5438 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5439 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5440 fprintf(file
, "*** SHADER CONFIG ***\n"
5441 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5442 "SPI_PS_INPUT_ENA = 0x%04x\n",
5443 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5446 fprintf(file
, "*** SHADER STATS ***\n"
5449 "Spilled SGPRs: %d\n"
5450 "Spilled VGPRs: %d\n"
5451 "Private memory VGPRs: %d\n"
5452 "Code Size: %d bytes\n"
5454 "Scratch: %d bytes per wave\n"
5456 "********************\n\n\n",
5457 conf
->num_sgprs
, conf
->num_vgprs
,
5458 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5459 shader
->info
.private_mem_vgprs
,
5460 si_get_shader_binary_size(sscreen
, shader
),
5461 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5462 shader
->info
.max_simd_waves
);
5466 const char *si_get_shader_name(const struct si_shader
*shader
)
5468 switch (shader
->selector
->type
) {
5469 case PIPE_SHADER_VERTEX
:
5470 if (shader
->key
.as_es
)
5471 return "Vertex Shader as ES";
5472 else if (shader
->key
.as_ls
)
5473 return "Vertex Shader as LS";
5474 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5475 return "Vertex Shader as Primitive Discard CS";
5476 else if (shader
->key
.as_ngg
)
5477 return "Vertex Shader as ESGS";
5479 return "Vertex Shader as VS";
5480 case PIPE_SHADER_TESS_CTRL
:
5481 return "Tessellation Control Shader";
5482 case PIPE_SHADER_TESS_EVAL
:
5483 if (shader
->key
.as_es
)
5484 return "Tessellation Evaluation Shader as ES";
5485 else if (shader
->key
.as_ngg
)
5486 return "Tessellation Evaluation Shader as ESGS";
5488 return "Tessellation Evaluation Shader as VS";
5489 case PIPE_SHADER_GEOMETRY
:
5490 if (shader
->is_gs_copy_shader
)
5491 return "GS Copy Shader as VS";
5493 return "Geometry Shader";
5494 case PIPE_SHADER_FRAGMENT
:
5495 return "Pixel Shader";
5496 case PIPE_SHADER_COMPUTE
:
5497 return "Compute Shader";
5499 return "Unknown Shader";
5503 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5504 struct pipe_debug_callback
*debug
,
5505 FILE *file
, bool check_debug_option
)
5507 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5509 if (!check_debug_option
||
5510 si_can_dump_shader(sscreen
, shader_type
))
5511 si_dump_shader_key(shader
, file
);
5513 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5514 if (shader
->previous_stage
&&
5515 shader
->previous_stage
->binary
.llvm_ir_string
) {
5516 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5517 si_get_shader_name(shader
));
5518 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5521 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5522 si_get_shader_name(shader
));
5523 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5526 if (!check_debug_option
||
5527 (si_can_dump_shader(sscreen
, shader_type
) &&
5528 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5529 unsigned wave_size
= si_get_shader_wave_size(shader
);
5531 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5534 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5535 shader_type
, wave_size
, debug
, "prolog", file
);
5536 if (shader
->previous_stage
)
5537 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5538 shader_type
, wave_size
, debug
, "previous stage", file
);
5539 if (shader
->prolog2
)
5540 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5541 shader_type
, wave_size
, debug
, "prolog2", file
);
5543 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5544 wave_size
, debug
, "main", file
);
5547 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5548 shader_type
, wave_size
, debug
, "epilog", file
);
5549 fprintf(file
, "\n");
5552 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5555 static int si_compile_llvm(struct si_screen
*sscreen
,
5556 struct si_shader_binary
*binary
,
5557 struct ac_shader_config
*conf
,
5558 struct ac_llvm_compiler
*compiler
,
5560 struct pipe_debug_callback
*debug
,
5561 enum pipe_shader_type shader_type
,
5564 bool less_optimized
)
5566 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5568 if (si_can_dump_shader(sscreen
, shader_type
)) {
5569 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5571 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5572 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5573 ac_dump_module(mod
);
5574 fprintf(stderr
, "\n");
5578 if (sscreen
->record_llvm_ir
) {
5579 char *ir
= LLVMPrintModuleToString(mod
);
5580 binary
->llvm_ir_string
= strdup(ir
);
5581 LLVMDisposeMessage(ir
);
5584 if (!si_replace_shader(count
, binary
)) {
5585 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5586 less_optimized
, wave_size
);
5591 struct ac_rtld_binary rtld
;
5592 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5593 .info
= &sscreen
->info
,
5594 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5595 .wave_size
= wave_size
,
5597 .elf_ptrs
= &binary
->elf_buffer
,
5598 .elf_sizes
= &binary
->elf_size
}))
5601 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5602 ac_rtld_close(&rtld
);
5606 /* Enable 64-bit and 16-bit denormals, because there is no performance
5609 * If denormals are enabled, all floating-point output modifiers are
5612 * Don't enable denormals for 32-bit floats, because:
5613 * - Floating-point output modifiers would be ignored by the hw.
5614 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5615 * have to stop using those.
5616 * - GFX6 & GFX7 would be very slow.
5618 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5623 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5625 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5626 LLVMBuildRetVoid(ctx
->ac
.builder
);
5628 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5631 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5633 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5634 struct ac_llvm_compiler
*compiler
,
5635 struct si_shader_selector
*gs_selector
,
5636 struct pipe_debug_callback
*debug
)
5638 struct si_shader_context ctx
;
5639 struct si_shader
*shader
;
5640 LLVMBuilderRef builder
;
5641 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5642 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5646 shader
= CALLOC_STRUCT(si_shader
);
5650 /* We can leave the fence as permanently signaled because the GS copy
5651 * shader only becomes visible globally after it has been compiled. */
5652 util_queue_fence_init(&shader
->ready
);
5654 shader
->selector
= gs_selector
;
5655 shader
->is_gs_copy_shader
= true;
5657 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5658 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false),
5660 ctx
.shader
= shader
;
5661 ctx
.type
= PIPE_SHADER_VERTEX
;
5663 builder
= ctx
.ac
.builder
;
5665 create_function(&ctx
);
5666 preload_ring_buffers(&ctx
);
5668 LLVMValueRef voffset
=
5669 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5670 LLVMConstInt(ctx
.i32
, 4, 0), "");
5672 /* Fetch the vertex stream ID.*/
5673 LLVMValueRef stream_id
;
5675 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5676 stream_id
= si_unpack_param(&ctx
, ctx
.streamout_config
, 24, 2);
5678 stream_id
= ctx
.i32_0
;
5680 /* Fill in output information. */
5681 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5682 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5683 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5685 for (int chan
= 0; chan
< 4; chan
++) {
5686 outputs
[i
].vertex_stream
[chan
] =
5687 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5691 LLVMBasicBlockRef end_bb
;
5692 LLVMValueRef switch_inst
;
5694 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5695 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5697 for (int stream
= 0; stream
< 4; stream
++) {
5698 LLVMBasicBlockRef bb
;
5701 if (!gsinfo
->num_stream_output_components
[stream
])
5704 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5707 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5708 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5709 LLVMPositionBuilderAtEnd(builder
, bb
);
5711 /* Fetch vertex data from GSVS ring */
5713 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5714 for (unsigned chan
= 0; chan
< 4; chan
++) {
5715 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5716 outputs
[i
].vertex_stream
[chan
] != stream
) {
5717 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5721 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5722 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5725 outputs
[i
].values
[chan
] =
5726 ac_build_buffer_load(&ctx
.ac
,
5727 ctx
.gsvs_ring
[0], 1,
5729 soffset
, 0, ac_glc
| ac_slc
,
5734 /* Streamout and exports. */
5735 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5736 si_llvm_emit_streamout(&ctx
, outputs
,
5737 gsinfo
->num_outputs
,
5742 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5744 LLVMBuildBr(builder
, end_bb
);
5747 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5749 LLVMBuildRetVoid(ctx
.ac
.builder
);
5751 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5752 si_llvm_optimize_module(&ctx
);
5755 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5756 &ctx
.shader
->config
, ctx
.compiler
,
5758 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5759 "GS Copy Shader", false) == 0) {
5760 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5761 fprintf(stderr
, "GS Copy Shader:\n");
5762 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5764 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5765 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5770 si_llvm_dispose(&ctx
);
5776 si_fix_resource_usage(sscreen
, shader
);
5781 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5782 const struct si_vs_prolog_bits
*prolog
,
5783 const char *prefix
, FILE *f
)
5785 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5786 prefix
, prolog
->instance_divisor_is_one
);
5787 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5788 prefix
, prolog
->instance_divisor_is_fetched
);
5789 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5790 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5791 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5792 prefix
, prolog
->ls_vgpr_fix
);
5794 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5795 fprintf(f
, " mono.vs.fix_fetch = {");
5796 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5797 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5803 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5804 fix
.u
.num_channels_m1
, fix
.u
.format
);
5809 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5811 const struct si_shader_key
*key
= &shader
->key
;
5812 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5814 fprintf(f
, "SHADER KEY\n");
5816 switch (shader_type
) {
5817 case PIPE_SHADER_VERTEX
:
5818 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5819 "part.vs.prolog", f
);
5820 fprintf(f
, " as_es = %u\n", key
->as_es
);
5821 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5822 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5823 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5824 key
->mono
.u
.vs_export_prim_id
);
5825 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5826 key
->opt
.vs_as_prim_discard_cs
);
5827 fprintf(f
, " opt.cs_prim_type = %s\n",
5828 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5829 fprintf(f
, " opt.cs_indexed = %u\n",
5830 key
->opt
.cs_indexed
);
5831 fprintf(f
, " opt.cs_instancing = %u\n",
5832 key
->opt
.cs_instancing
);
5833 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5834 key
->opt
.cs_primitive_restart
);
5835 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5836 key
->opt
.cs_provoking_vertex_first
);
5837 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5838 key
->opt
.cs_need_correct_orientation
);
5839 fprintf(f
, " opt.cs_cull_front = %u\n",
5840 key
->opt
.cs_cull_front
);
5841 fprintf(f
, " opt.cs_cull_back = %u\n",
5842 key
->opt
.cs_cull_back
);
5843 fprintf(f
, " opt.cs_cull_z = %u\n",
5844 key
->opt
.cs_cull_z
);
5845 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5846 key
->opt
.cs_halfz_clip_space
);
5849 case PIPE_SHADER_TESS_CTRL
:
5850 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5851 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5852 "part.tcs.ls_prolog", f
);
5854 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5855 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5858 case PIPE_SHADER_TESS_EVAL
:
5859 fprintf(f
, " as_es = %u\n", key
->as_es
);
5860 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5861 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5862 key
->mono
.u
.vs_export_prim_id
);
5865 case PIPE_SHADER_GEOMETRY
:
5866 if (shader
->is_gs_copy_shader
)
5869 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5870 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5871 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5872 "part.gs.vs_prolog", f
);
5874 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5875 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5876 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5879 case PIPE_SHADER_COMPUTE
:
5882 case PIPE_SHADER_FRAGMENT
:
5883 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5884 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5885 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5886 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5887 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5888 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5889 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5890 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5891 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5892 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5893 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5894 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5895 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5896 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5897 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5898 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5899 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5900 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5901 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5902 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5903 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5904 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5911 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5912 shader_type
== PIPE_SHADER_TESS_EVAL
||
5913 shader_type
== PIPE_SHADER_VERTEX
) &&
5914 !key
->as_es
&& !key
->as_ls
) {
5915 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5916 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5920 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5921 struct si_screen
*sscreen
,
5922 struct ac_llvm_compiler
*compiler
,
5926 struct lp_build_tgsi_context
*bld_base
;
5928 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
,
5929 nir
? 64 : wave_size
);
5931 bld_base
= &ctx
->bld_base
;
5932 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5934 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5935 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5936 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5938 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5940 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5942 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5943 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5944 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5945 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5947 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5948 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5949 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5950 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5951 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5952 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5953 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5954 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5956 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5957 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5958 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5961 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5963 struct si_shader
*shader
= ctx
->shader
;
5964 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5966 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5967 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5968 shader
->key
.as_ls
||
5972 ac_optimize_vs_outputs(&ctx
->ac
,
5974 shader
->info
.vs_output_param_offset
,
5976 &shader
->info
.nr_param_exports
);
5979 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5980 struct ac_arg param
, unsigned bitoffset
)
5982 LLVMValueRef args
[] = {
5983 ac_get_arg(&ctx
->ac
, param
),
5984 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5986 ac_build_intrinsic(&ctx
->ac
,
5987 "llvm.amdgcn.init.exec.from.input",
5988 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5991 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5992 const struct si_vs_prolog_bits
*key
)
5994 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5996 return sel
->vs_needs_prolog
||
5998 key
->unpack_instance_id_from_vertex_id
;
6001 LLVMValueRef
si_is_es_thread(struct si_shader_context
*ctx
)
6003 /* Return true if the current thread should execute an ES thread. */
6004 return LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6005 ac_get_thread_id(&ctx
->ac
),
6006 si_unpack_param(ctx
, ctx
->merged_wave_info
, 0, 8), "");
6009 LLVMValueRef
si_is_gs_thread(struct si_shader_context
*ctx
)
6011 /* Return true if the current thread should execute a GS thread. */
6012 return LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6013 ac_get_thread_id(&ctx
->ac
),
6014 si_unpack_param(ctx
, ctx
->merged_wave_info
, 8, 8), "");
6017 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6018 struct nir_shader
*nir
, bool free_nir
)
6020 struct si_shader
*shader
= ctx
->shader
;
6021 struct si_shader_selector
*sel
= shader
->selector
;
6022 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6024 // TODO clean all this up!
6025 switch (ctx
->type
) {
6026 case PIPE_SHADER_VERTEX
:
6027 ctx
->load_input
= declare_input_vs
;
6028 if (shader
->key
.as_ls
)
6029 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6030 else if (shader
->key
.as_es
)
6031 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6032 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6033 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6034 else if (shader
->key
.as_ngg
)
6035 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6037 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6038 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6039 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6041 case PIPE_SHADER_TESS_CTRL
:
6042 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6043 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6044 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6045 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6046 bld_base
->emit_store
= store_output_tcs
;
6047 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6048 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6049 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6050 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6052 case PIPE_SHADER_TESS_EVAL
:
6053 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6054 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6055 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6056 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6057 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6058 if (shader
->key
.as_es
)
6059 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6060 else if (shader
->key
.as_ngg
)
6061 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6063 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6064 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6066 case PIPE_SHADER_GEOMETRY
:
6067 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6068 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6069 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6070 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6071 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6072 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6074 case PIPE_SHADER_FRAGMENT
:
6075 ctx
->load_input
= declare_input_fs
;
6076 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6077 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6078 ctx
->abi
.load_sample_position
= load_sample_position
;
6079 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6080 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6081 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6083 case PIPE_SHADER_COMPUTE
:
6084 ctx
->abi
.load_local_group_size
= get_block_size
;
6087 assert(!"Unsupported shader type");
6091 ctx
->abi
.load_ubo
= load_ubo
;
6092 ctx
->abi
.load_ssbo
= load_ssbo
;
6094 create_function(ctx
);
6095 preload_ring_buffers(ctx
);
6097 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6098 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6099 for (unsigned i
= 0; i
< 6; i
++) {
6100 ctx
->invoc0_tess_factors
[i
] =
6101 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6105 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6106 for (unsigned i
= 0; i
< 4; i
++) {
6107 ctx
->gs_next_vertex
[i
] =
6108 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6110 if (shader
->key
.as_ngg
) {
6111 for (unsigned i
= 0; i
< 4; ++i
) {
6112 ctx
->gs_curprim_verts
[i
] =
6113 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6114 ctx
->gs_generated_prims
[i
] =
6115 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6118 unsigned scratch_size
= 8;
6119 if (sel
->so
.num_outputs
)
6122 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6123 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6124 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6125 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6126 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6128 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6129 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6130 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6131 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6135 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6136 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6137 /* Unconditionally declare scratch space base for streamout and
6138 * vertex compaction. Whether space is actually allocated is
6139 * determined during linking / PM4 creation.
6141 * Add an extra dword per vertex to ensure an odd stride, which
6142 * avoids bank conflicts for SoA accesses.
6144 declare_esgs_ring(ctx
);
6146 /* This is really only needed when streamout and / or vertex
6147 * compaction is enabled.
6149 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6150 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6151 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6152 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6153 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6156 /* For GFX9 merged shaders:
6157 * - Set EXEC for the first shader. If the prolog is present, set
6158 * EXEC there instead.
6159 * - Add a barrier before the second shader.
6160 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6161 * an if-statement. This is required for correctness in geometry
6162 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6165 * For monolithic merged shaders, the first shader is wrapped in an
6166 * if-block together with its prolog in si_build_wrapper_function.
6168 * NGG vertex and tess eval shaders running as the last
6169 * vertex/geometry stage handle execution explicitly using
6172 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6173 if (!shader
->is_monolithic
&&
6174 sel
->info
.num_instructions
> 1 && /* not empty shader */
6175 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6176 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6177 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6178 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6179 si_init_exec_from_input(ctx
,
6180 ctx
->merged_wave_info
, 0);
6181 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6182 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6183 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6184 LLVMValueRef thread_enabled
;
6185 bool nested_barrier
;
6187 if (!shader
->is_monolithic
||
6188 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6189 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6190 ac_init_exec_full_mask(&ctx
->ac
);
6192 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6193 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6194 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6195 gfx10_ngg_gs_emit_prologue(ctx
);
6196 nested_barrier
= false;
6198 nested_barrier
= true;
6201 thread_enabled
= si_is_gs_thread(ctx
);
6203 thread_enabled
= si_is_es_thread(ctx
);
6204 nested_barrier
= false;
6207 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6208 ctx
->merged_wrap_if_label
= 11500;
6209 ac_build_ifcc(&ctx
->ac
, thread_enabled
, ctx
->merged_wrap_if_label
);
6211 if (nested_barrier
) {
6212 /* Execute a barrier before the second shader in
6215 * Execute the barrier inside the conditional block,
6216 * so that empty waves can jump directly to s_endpgm,
6217 * which will also signal the barrier.
6219 * This is possible in gfx9, because an empty wave
6220 * for the second shader does not participate in
6221 * the epilogue. With NGG, empty waves may still
6222 * be required to export data (e.g. GS output vertices),
6223 * so we cannot let them exit early.
6225 * If the shader is TCS and the TCS epilog is present
6226 * and contains a barrier, it will wait there and then
6229 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6234 if (sel
->force_correct_derivs_after_kill
) {
6235 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6236 /* true = don't kill. */
6237 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6238 ctx
->postponed_kill
);
6242 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6243 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6247 bool success
= si_nir_build_llvm(ctx
, nir
);
6251 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6256 si_llvm_build_ret(ctx
, ctx
->return_value
);
6261 * Compute the VS prolog key, which contains all the information needed to
6262 * build the VS prolog function, and set shader->info bits where needed.
6264 * \param info Shader info of the vertex shader.
6265 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6266 * \param prolog_key Key of the VS prolog
6267 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6268 * \param key Output shader part key.
6270 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6271 unsigned num_input_sgprs
,
6272 const struct si_vs_prolog_bits
*prolog_key
,
6273 struct si_shader
*shader_out
,
6274 union si_shader_part_key
*key
)
6276 memset(key
, 0, sizeof(*key
));
6277 key
->vs_prolog
.states
= *prolog_key
;
6278 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6279 key
->vs_prolog
.num_inputs
= info
->num_inputs
;
6280 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6281 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6282 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6284 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6285 key
->vs_prolog
.as_ls
= 1;
6286 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6287 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6288 key
->vs_prolog
.as_es
= 1;
6289 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6290 } else if (shader_out
->key
.as_ngg
) {
6291 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6294 /* Enable loading the InstanceID VGPR. */
6295 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6297 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6298 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6299 shader_out
->info
.uses_instanceid
= true;
6303 * Compute the PS prolog key, which contains all the information needed to
6304 * build the PS prolog function, and set related bits in shader->config.
6306 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6307 union si_shader_part_key
*key
,
6308 bool separate_prolog
)
6310 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6312 memset(key
, 0, sizeof(*key
));
6313 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6314 key
->ps_prolog
.colors_read
= info
->colors_read
;
6315 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6316 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6317 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6318 (key
->ps_prolog
.colors_read
||
6319 key
->ps_prolog
.states
.force_persp_sample_interp
||
6320 key
->ps_prolog
.states
.force_linear_sample_interp
||
6321 key
->ps_prolog
.states
.force_persp_center_interp
||
6322 key
->ps_prolog
.states
.force_linear_center_interp
||
6323 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6324 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6325 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6327 if (info
->colors_read
) {
6328 unsigned *color
= shader
->selector
->color_attr_index
;
6330 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6331 /* BCOLORs are stored after the last input. */
6332 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6333 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6334 if (separate_prolog
)
6335 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6338 for (unsigned i
= 0; i
< 2; i
++) {
6339 unsigned interp
= info
->input_interpolate
[color
[i
]];
6340 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6342 if (!(info
->colors_read
& (0xf << i
*4)))
6345 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6347 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6348 interp
== TGSI_INTERPOLATE_COLOR
)
6349 interp
= TGSI_INTERPOLATE_CONSTANT
;
6352 case TGSI_INTERPOLATE_CONSTANT
:
6353 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6355 case TGSI_INTERPOLATE_PERSPECTIVE
:
6356 case TGSI_INTERPOLATE_COLOR
:
6357 /* Force the interpolation location for colors here. */
6358 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6359 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6360 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6361 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6364 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6365 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6366 if (separate_prolog
) {
6367 shader
->config
.spi_ps_input_ena
|=
6368 S_0286CC_PERSP_SAMPLE_ENA(1);
6371 case TGSI_INTERPOLATE_LOC_CENTER
:
6372 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6373 if (separate_prolog
) {
6374 shader
->config
.spi_ps_input_ena
|=
6375 S_0286CC_PERSP_CENTER_ENA(1);
6378 case TGSI_INTERPOLATE_LOC_CENTROID
:
6379 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6380 if (separate_prolog
) {
6381 shader
->config
.spi_ps_input_ena
|=
6382 S_0286CC_PERSP_CENTROID_ENA(1);
6389 case TGSI_INTERPOLATE_LINEAR
:
6390 /* Force the interpolation location for colors here. */
6391 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6392 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6393 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6394 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6396 /* The VGPR assignment for non-monolithic shaders
6397 * works because InitialPSInputAddr is set on the
6398 * main shader and PERSP_PULL_MODEL is never used.
6401 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6402 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6403 separate_prolog
? 6 : 9;
6404 if (separate_prolog
) {
6405 shader
->config
.spi_ps_input_ena
|=
6406 S_0286CC_LINEAR_SAMPLE_ENA(1);
6409 case TGSI_INTERPOLATE_LOC_CENTER
:
6410 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6411 separate_prolog
? 8 : 11;
6412 if (separate_prolog
) {
6413 shader
->config
.spi_ps_input_ena
|=
6414 S_0286CC_LINEAR_CENTER_ENA(1);
6417 case TGSI_INTERPOLATE_LOC_CENTROID
:
6418 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6419 separate_prolog
? 10 : 13;
6420 if (separate_prolog
) {
6421 shader
->config
.spi_ps_input_ena
|=
6422 S_0286CC_LINEAR_CENTROID_ENA(1);
6437 * Check whether a PS prolog is required based on the key.
6439 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6441 return key
->ps_prolog
.colors_read
||
6442 key
->ps_prolog
.states
.force_persp_sample_interp
||
6443 key
->ps_prolog
.states
.force_linear_sample_interp
||
6444 key
->ps_prolog
.states
.force_persp_center_interp
||
6445 key
->ps_prolog
.states
.force_linear_center_interp
||
6446 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6447 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6448 key
->ps_prolog
.states
.poly_stipple
||
6449 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6453 * Compute the PS epilog key, which contains all the information needed to
6454 * build the PS epilog function.
6456 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6457 union si_shader_part_key
*key
)
6459 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6460 memset(key
, 0, sizeof(*key
));
6461 key
->ps_epilog
.colors_written
= info
->colors_written
;
6462 key
->ps_epilog
.writes_z
= info
->writes_z
;
6463 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6464 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6465 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6469 * Build the GS prolog function. Rotate the input vertices for triangle strips
6472 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6473 union si_shader_part_key
*key
)
6475 unsigned num_sgprs
, num_vgprs
;
6476 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6477 LLVMTypeRef returns
[48];
6478 LLVMValueRef func
, ret
;
6480 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6482 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6483 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6484 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6486 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6487 num_vgprs
= 5; /* ES inputs are not needed by GS */
6489 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6493 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6494 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
6495 returns
[i
] = ctx
->i32
;
6498 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6499 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
6500 returns
[num_sgprs
+ i
] = ctx
->f32
;
6503 /* Create the function. */
6504 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6506 func
= ctx
->main_fn
;
6508 /* Set the full EXEC mask for the prolog, because we are only fiddling
6509 * with registers here. The main shader part will set the correct EXEC
6512 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6513 ac_init_exec_full_mask(&ctx
->ac
);
6515 /* Copy inputs to outputs. This should be no-op, as the registers match,
6516 * but it will prevent the compiler from overwriting them unintentionally.
6518 ret
= ctx
->return_value
;
6519 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6520 LLVMValueRef p
= LLVMGetParam(func
, i
);
6521 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6523 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6524 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6525 p
= ac_to_float(&ctx
->ac
, p
);
6526 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6529 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6530 /* Remap the input vertices for every other primitive. */
6531 const struct ac_arg gfx6_vtx_params
[6] = {
6532 { .used
= true, .arg_index
= num_sgprs
},
6533 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6534 { .used
= true, .arg_index
= num_sgprs
+ 3 },
6535 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6536 { .used
= true, .arg_index
= num_sgprs
+ 5 },
6537 { .used
= true, .arg_index
= num_sgprs
+ 6 },
6539 const struct ac_arg gfx9_vtx_params
[3] = {
6540 { .used
= true, .arg_index
= num_sgprs
},
6541 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6542 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6544 LLVMValueRef vtx_in
[6], vtx_out
[6];
6545 LLVMValueRef prim_id
, rotate
;
6547 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6548 for (unsigned i
= 0; i
< 3; i
++) {
6549 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6550 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6553 for (unsigned i
= 0; i
< 6; i
++)
6554 vtx_in
[i
] = ac_get_arg(&ctx
->ac
, gfx6_vtx_params
[i
]);
6557 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6558 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6560 for (unsigned i
= 0; i
< 6; ++i
) {
6561 LLVMValueRef base
, rotated
;
6563 rotated
= vtx_in
[(i
+ 4) % 6];
6564 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6567 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6568 for (unsigned i
= 0; i
< 3; i
++) {
6569 LLVMValueRef hi
, out
;
6571 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6572 LLVMConstInt(ctx
->i32
, 16, 0), "");
6573 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6574 out
= ac_to_float(&ctx
->ac
, out
);
6575 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6576 gfx9_vtx_params
[i
].arg_index
, "");
6579 for (unsigned i
= 0; i
< 6; i
++) {
6582 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6583 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6584 gfx6_vtx_params
[i
].arg_index
, "");
6589 LLVMBuildRet(builder
, ret
);
6593 * Given a list of shader part functions, build a wrapper function that
6594 * runs them in sequence to form a monolithic shader.
6596 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6597 LLVMValueRef
*parts
,
6600 unsigned next_shader_first_part
)
6602 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6603 /* PS epilog has one arg per color component; gfx9 merged shader
6604 * prologs need to forward 32 user SGPRs.
6606 LLVMValueRef initial
[64], out
[64];
6607 LLVMTypeRef function_type
;
6608 unsigned num_first_params
;
6609 unsigned num_out
, initial_num_out
;
6610 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6611 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6612 unsigned num_sgprs
, num_vgprs
;
6615 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6617 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6618 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6619 AC_FUNC_ATTR_ALWAYSINLINE
);
6620 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6623 /* The parameters of the wrapper function correspond to those of the
6624 * first part in terms of SGPRs and VGPRs, but we use the types of the
6625 * main part to get the right types. This is relevant for the
6626 * dereferenceable attribute on descriptor table pointers.
6631 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6632 num_first_params
= LLVMCountParamTypes(function_type
);
6634 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6635 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6637 if (ac_is_sgpr_param(param
)) {
6638 assert(num_vgprs
== 0);
6639 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6641 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6646 while (gprs
< num_sgprs
+ num_vgprs
) {
6647 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], ctx
->args
.arg_count
);
6648 LLVMTypeRef type
= LLVMTypeOf(param
);
6649 unsigned size
= ac_get_type_size(type
) / 4;
6651 /* This is going to get casted anyways, so we don't have to
6652 * have the exact same type. But we do have to preserve the
6653 * pointer-ness so that LLVM knows about it.
6655 enum ac_arg_type arg_type
= AC_ARG_INT
;
6656 if (LLVMGetTypeKind(type
) == LLVMPointerTypeKind
) {
6657 arg_type
= AC_ARG_CONST_PTR
;
6660 ac_add_arg(&ctx
->args
, gprs
< num_sgprs
? AC_ARG_SGPR
: AC_ARG_VGPR
,
6661 size
, arg_type
, NULL
);
6663 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6664 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6665 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6670 /* Prepare the return type. */
6671 unsigned num_returns
= 0;
6672 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6674 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6675 return_type
= LLVMGetReturnType(last_func_type
);
6677 switch (LLVMGetTypeKind(return_type
)) {
6678 case LLVMStructTypeKind
:
6679 num_returns
= LLVMCountStructElementTypes(return_type
);
6680 assert(num_returns
<= ARRAY_SIZE(returns
));
6681 LLVMGetStructElementTypes(return_type
, returns
);
6683 case LLVMVoidTypeKind
:
6686 unreachable("unexpected type");
6689 si_create_function(ctx
, "wrapper", returns
, num_returns
,
6690 si_get_max_workgroup_size(ctx
->shader
));
6692 if (is_merged_shader(ctx
))
6693 ac_init_exec_full_mask(&ctx
->ac
);
6695 /* Record the arguments of the function as if they were an output of
6701 for (unsigned i
= 0; i
< ctx
->args
.arg_count
; ++i
) {
6702 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6703 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6704 LLVMTypeRef out_type
= ctx
->args
.args
[i
].file
== AC_ARG_SGPR
? ctx
->i32
: ctx
->f32
;
6705 unsigned size
= ac_get_type_size(param_type
) / 4;
6708 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6709 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6710 param_type
= ctx
->i32
;
6713 if (param_type
!= out_type
)
6714 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6715 out
[num_out
++] = param
;
6717 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6719 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6720 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6721 param_type
= ctx
->i64
;
6724 if (param_type
!= vector_type
)
6725 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6727 for (unsigned j
= 0; j
< size
; ++j
)
6728 out
[num_out
++] = LLVMBuildExtractElement(
6729 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6732 if (ctx
->args
.args
[i
].file
== AC_ARG_SGPR
)
6733 num_out_sgpr
= num_out
;
6736 memcpy(initial
, out
, sizeof(out
));
6737 initial_num_out
= num_out
;
6738 initial_num_out_sgpr
= num_out_sgpr
;
6740 /* Now chain the parts. */
6741 LLVMValueRef ret
= NULL
;
6742 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6743 LLVMValueRef in
[48];
6744 LLVMTypeRef ret_type
;
6745 unsigned out_idx
= 0;
6746 unsigned num_params
= LLVMCountParams(parts
[part
]);
6748 /* Merged shaders are executed conditionally depending
6749 * on the number of enabled threads passed in the input SGPRs. */
6750 if (is_multi_part_shader(ctx
) && part
== 0) {
6751 LLVMValueRef ena
, count
= initial
[3];
6753 count
= LLVMBuildAnd(builder
, count
,
6754 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6755 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6756 ac_get_thread_id(&ctx
->ac
), count
, "");
6757 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6760 /* Derive arguments for the next part from outputs of the
6763 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6765 LLVMTypeRef param_type
;
6767 unsigned param_size
;
6768 LLVMValueRef arg
= NULL
;
6770 param
= LLVMGetParam(parts
[part
], param_idx
);
6771 param_type
= LLVMTypeOf(param
);
6772 param_size
= ac_get_type_size(param_type
) / 4;
6773 is_sgpr
= ac_is_sgpr_param(param
);
6776 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6777 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6778 } else if (out_idx
< num_out_sgpr
) {
6779 /* Skip returned SGPRs the current part doesn't
6780 * declare on the input. */
6781 out_idx
= num_out_sgpr
;
6784 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6786 if (param_size
== 1)
6789 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6791 if (LLVMTypeOf(arg
) != param_type
) {
6792 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6793 if (LLVMGetPointerAddressSpace(param_type
) ==
6794 AC_ADDR_SPACE_CONST_32BIT
) {
6795 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6796 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6798 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6799 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6802 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6806 in
[param_idx
] = arg
;
6807 out_idx
+= param_size
;
6810 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6812 if (is_multi_part_shader(ctx
) &&
6813 part
+ 1 == next_shader_first_part
) {
6814 ac_build_endif(&ctx
->ac
, 6506);
6816 /* The second half of the merged shader should use
6817 * the inputs from the toplevel (wrapper) function,
6818 * not the return value from the last call.
6820 * That's because the last call was executed condi-
6821 * tionally, so we can't consume it in the main
6824 memcpy(out
, initial
, sizeof(initial
));
6825 num_out
= initial_num_out
;
6826 num_out_sgpr
= initial_num_out_sgpr
;
6830 /* Extract the returned GPRs. */
6831 ret_type
= LLVMTypeOf(ret
);
6835 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6836 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6838 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6840 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6842 LLVMBuildExtractValue(builder
, ret
, i
, "");
6844 assert(num_out
< ARRAY_SIZE(out
));
6845 out
[num_out
++] = val
;
6847 if (LLVMTypeOf(val
) == ctx
->i32
) {
6848 assert(num_out_sgpr
+ 1 == num_out
);
6849 num_out_sgpr
= num_out
;
6855 /* Return the value from the last part. */
6856 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6857 LLVMBuildRetVoid(builder
);
6859 LLVMBuildRet(builder
, ret
);
6862 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6863 struct si_shader_selector
*sel
)
6865 if (!compiler
->low_opt_passes
)
6868 /* Assume a slow CPU. */
6869 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6870 sel
->screen
->info
.chip_class
<= GFX8
);
6872 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6874 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6875 sel
->info
.num_memory_instructions
> 1000;
6878 static struct nir_shader
*get_nir_shader(struct si_shader_selector
*sel
,
6885 } else if (sel
->nir_binary
) {
6886 struct pipe_screen
*screen
= &sel
->screen
->b
;
6887 const void *options
=
6888 screen
->get_compiler_options(screen
, PIPE_SHADER_IR_NIR
,
6891 struct blob_reader blob_reader
;
6892 blob_reader_init(&blob_reader
, sel
->nir_binary
, sel
->nir_size
);
6894 return nir_deserialize(NULL
, options
, &blob_reader
);
6899 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6900 struct ac_llvm_compiler
*compiler
,
6901 struct si_shader
*shader
,
6902 struct pipe_debug_callback
*debug
)
6904 struct si_shader_selector
*sel
= shader
->selector
;
6905 struct si_shader_context ctx
;
6907 struct nir_shader
*nir
= get_nir_shader(sel
, &free_nir
);
6910 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6911 * conversion fails. */
6912 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6913 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6915 tgsi_dump(sel
->tokens
, 0);
6917 nir_print_shader(nir
, stderr
);
6918 si_dump_streamout(&sel
->so
);
6921 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
),
6923 si_llvm_context_set_ir(&ctx
, shader
, nir
);
6925 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6926 sizeof(shader
->info
.vs_output_param_offset
));
6928 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6930 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6931 si_llvm_dispose(&ctx
);
6935 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6936 LLVMValueRef parts
[2];
6937 bool need_prolog
= si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
);
6939 parts
[1] = ctx
.main_fn
;
6942 union si_shader_part_key prolog_key
;
6943 si_get_vs_prolog_key(&sel
->info
,
6944 shader
->info
.num_input_sgprs
,
6945 &shader
->key
.part
.vs
.prolog
,
6946 shader
, &prolog_key
);
6947 prolog_key
.vs_prolog
.is_monolithic
= true;
6948 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6949 parts
[0] = ctx
.main_fn
;
6952 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6953 1 + need_prolog
, need_prolog
, 0);
6955 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6956 si_build_prim_discard_compute_shader(&ctx
);
6957 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6958 if (sscreen
->info
.chip_class
>= GFX9
) {
6959 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6960 LLVMValueRef parts
[4];
6961 bool vs_needs_prolog
=
6962 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6965 parts
[2] = ctx
.main_fn
;
6968 union si_shader_part_key tcs_epilog_key
;
6969 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6970 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6971 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6972 parts
[3] = ctx
.main_fn
;
6974 /* VS as LS main part */
6975 nir
= get_nir_shader(ls
, &free_nir
);
6976 struct si_shader shader_ls
= {};
6977 shader_ls
.selector
= ls
;
6978 shader_ls
.key
.as_ls
= 1;
6979 shader_ls
.key
.mono
= shader
->key
.mono
;
6980 shader_ls
.key
.opt
= shader
->key
.opt
;
6981 shader_ls
.is_monolithic
= true;
6982 si_llvm_context_set_ir(&ctx
, &shader_ls
, nir
);
6984 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6985 si_llvm_dispose(&ctx
);
6988 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6989 parts
[1] = ctx
.main_fn
;
6992 if (vs_needs_prolog
) {
6993 union si_shader_part_key vs_prolog_key
;
6994 si_get_vs_prolog_key(&ls
->info
,
6995 shader_ls
.info
.num_input_sgprs
,
6996 &shader
->key
.part
.tcs
.ls_prolog
,
6997 shader
, &vs_prolog_key
);
6998 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6999 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7000 parts
[0] = ctx
.main_fn
;
7003 /* Reset the shader context. */
7004 ctx
.shader
= shader
;
7005 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
7007 si_build_wrapper_function(&ctx
,
7008 parts
+ !vs_needs_prolog
,
7009 4 - !vs_needs_prolog
, vs_needs_prolog
,
7010 vs_needs_prolog
? 2 : 1);
7012 LLVMValueRef parts
[2];
7013 union si_shader_part_key epilog_key
;
7015 parts
[0] = ctx
.main_fn
;
7017 memset(&epilog_key
, 0, sizeof(epilog_key
));
7018 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7019 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7020 parts
[1] = ctx
.main_fn
;
7022 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7024 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7025 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7026 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7027 LLVMValueRef es_prolog
= NULL
;
7028 LLVMValueRef es_main
= NULL
;
7029 LLVMValueRef gs_prolog
= NULL
;
7030 LLVMValueRef gs_main
= ctx
.main_fn
;
7033 union si_shader_part_key gs_prolog_key
;
7034 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7035 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7036 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7037 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7038 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7039 gs_prolog
= ctx
.main_fn
;
7042 nir
= get_nir_shader(es
, &free_nir
);
7043 struct si_shader shader_es
= {};
7044 shader_es
.selector
= es
;
7045 shader_es
.key
.as_es
= 1;
7046 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7047 shader_es
.key
.mono
= shader
->key
.mono
;
7048 shader_es
.key
.opt
= shader
->key
.opt
;
7049 shader_es
.is_monolithic
= true;
7050 si_llvm_context_set_ir(&ctx
, &shader_es
, nir
);
7052 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
7053 si_llvm_dispose(&ctx
);
7056 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7057 es_main
= ctx
.main_fn
;
7060 if (es
->type
== PIPE_SHADER_VERTEX
&&
7061 si_vs_needs_prolog(es
, &shader
->key
.part
.gs
.vs_prolog
)) {
7062 union si_shader_part_key vs_prolog_key
;
7063 si_get_vs_prolog_key(&es
->info
,
7064 shader_es
.info
.num_input_sgprs
,
7065 &shader
->key
.part
.gs
.vs_prolog
,
7066 shader
, &vs_prolog_key
);
7067 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7068 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7069 es_prolog
= ctx
.main_fn
;
7072 /* Reset the shader context. */
7073 ctx
.shader
= shader
;
7074 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7076 /* Prepare the array of shader parts. */
7077 LLVMValueRef parts
[4];
7078 unsigned num_parts
= 0, main_part
, next_first_part
;
7081 parts
[num_parts
++] = es_prolog
;
7083 parts
[main_part
= num_parts
++] = es_main
;
7084 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7085 parts
[num_parts
++] = gs_main
;
7087 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7088 main_part
, next_first_part
);
7090 LLVMValueRef parts
[2];
7091 union si_shader_part_key prolog_key
;
7093 parts
[1] = ctx
.main_fn
;
7095 memset(&prolog_key
, 0, sizeof(prolog_key
));
7096 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7097 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7098 parts
[0] = ctx
.main_fn
;
7100 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7102 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7103 LLVMValueRef parts
[3];
7104 union si_shader_part_key prolog_key
;
7105 union si_shader_part_key epilog_key
;
7108 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7109 need_prolog
= si_need_ps_prolog(&prolog_key
);
7111 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7114 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7115 parts
[0] = ctx
.main_fn
;
7118 si_get_ps_epilog_key(shader
, &epilog_key
);
7119 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7120 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7122 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7123 need_prolog
? 1 : 0, 0);
7126 si_llvm_optimize_module(&ctx
);
7128 /* Post-optimization transformations and analysis. */
7129 si_optimize_vs_outputs(&ctx
);
7131 if ((debug
&& debug
->debug_message
) ||
7132 si_can_dump_shader(sscreen
, ctx
.type
)) {
7133 ctx
.shader
->info
.private_mem_vgprs
=
7134 ac_count_scratch_private_memory(ctx
.main_fn
);
7137 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7138 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7139 LLVMPointerTypeKind
);
7141 /* Compile to bytecode. */
7142 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7143 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7144 si_get_shader_name(shader
),
7145 si_should_optimize_less(compiler
, shader
->selector
));
7146 si_llvm_dispose(&ctx
);
7148 fprintf(stderr
, "LLVM failed to compile shader\n");
7152 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7153 * LLVM 3.9svn has this bug.
7155 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7156 unsigned wave_size
= sscreen
->compute_wave_size
;
7157 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
*
7158 (wave_size
== 32 ? 2 : 1);
7159 unsigned max_sgprs
= sscreen
->info
.num_physical_sgprs_per_simd
;
7160 unsigned max_sgprs_per_wave
= 128;
7161 unsigned simds_per_tg
= 4; /* assuming WGP mode on gfx10 */
7162 unsigned threads_per_tg
= si_get_max_workgroup_size(shader
);
7163 unsigned waves_per_tg
= DIV_ROUND_UP(threads_per_tg
, wave_size
);
7164 unsigned waves_per_simd
= DIV_ROUND_UP(waves_per_tg
, simds_per_tg
);
7166 max_vgprs
= max_vgprs
/ waves_per_simd
;
7167 max_sgprs
= MIN2(max_sgprs
/ waves_per_simd
, max_sgprs_per_wave
);
7169 if (shader
->config
.num_sgprs
> max_sgprs
||
7170 shader
->config
.num_vgprs
> max_vgprs
) {
7171 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7172 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7173 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7174 max_sgprs
, max_vgprs
);
7176 /* Just terminate the process, because dependent
7177 * shaders can hang due to bad input data, but use
7178 * the env var to allow shader-db to work.
7180 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7185 /* Add the scratch offset to input SGPRs. */
7186 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7187 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7189 /* Calculate the number of fragment input VGPRs. */
7190 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7191 shader
->info
.num_input_vgprs
= ac_get_fs_input_vgpr_cnt(&shader
->config
,
7192 &shader
->info
.face_vgpr_index
,
7193 &shader
->info
.ancillary_vgpr_index
);
7196 si_calculate_max_simd_waves(shader
);
7197 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7202 * Create, compile and return a shader part (prolog or epilog).
7204 * \param sscreen screen
7205 * \param list list of shader parts of the same category
7206 * \param type shader type
7207 * \param key shader part key
7208 * \param prolog whether the part being requested is a prolog
7209 * \param tm LLVM target machine
7210 * \param debug debug callback
7211 * \param build the callback responsible for building the main function
7212 * \return non-NULL on success
7214 static struct si_shader_part
*
7215 si_get_shader_part(struct si_screen
*sscreen
,
7216 struct si_shader_part
**list
,
7217 enum pipe_shader_type type
,
7219 union si_shader_part_key
*key
,
7220 struct ac_llvm_compiler
*compiler
,
7221 struct pipe_debug_callback
*debug
,
7222 void (*build
)(struct si_shader_context
*,
7223 union si_shader_part_key
*),
7226 struct si_shader_part
*result
;
7228 simple_mtx_lock(&sscreen
->shader_parts_mutex
);
7230 /* Find existing. */
7231 for (result
= *list
; result
; result
= result
->next
) {
7232 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7233 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7238 /* Compile a new one. */
7239 result
= CALLOC_STRUCT(si_shader_part
);
7242 struct si_shader shader
= {};
7245 case PIPE_SHADER_VERTEX
:
7246 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7247 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7248 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7250 case PIPE_SHADER_TESS_CTRL
:
7252 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7254 case PIPE_SHADER_GEOMETRY
:
7256 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7258 case PIPE_SHADER_FRAGMENT
:
7260 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7262 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7265 unreachable("bad shader part");
7268 struct si_shader_context ctx
;
7269 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7270 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7273 ctx
.shader
= &shader
;
7279 si_llvm_optimize_module(&ctx
);
7281 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7282 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7289 result
->next
= *list
;
7293 si_llvm_dispose(&ctx
);
7294 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7298 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7300 LLVMValueRef ptr
[2], list
;
7301 bool merged_shader
= is_merged_shader(ctx
);
7303 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7304 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7305 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7310 * Build the vertex shader prolog function.
7312 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7313 * All inputs are returned unmodified. The vertex load indices are
7314 * stored after them, which will be used by the API VS for fetching inputs.
7316 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7321 * (VertexID + BaseVertex),
7322 * (InstanceID + StartInstance),
7323 * (InstanceID / 2 + StartInstance)
7325 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7326 union si_shader_part_key
*key
)
7328 LLVMTypeRef
*returns
;
7329 LLVMValueRef ret
, func
;
7331 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7332 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7333 struct ac_arg input_sgpr_param
[key
->vs_prolog
.num_input_sgprs
];
7334 struct ac_arg input_vgpr_param
[9];
7335 LLVMValueRef input_vgprs
[9];
7336 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7338 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7340 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7342 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7343 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.num_inputs
) *
7344 sizeof(LLVMTypeRef
));
7347 /* Declare input and output SGPRs. */
7348 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7349 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7350 &input_sgpr_param
[i
]);
7351 returns
[num_returns
++] = ctx
->i32
;
7354 struct ac_arg merged_wave_info
= input_sgpr_param
[3];
7356 /* Preloaded VGPRs (outputs must be floats) */
7357 for (i
= 0; i
< num_input_vgprs
; i
++) {
7358 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &input_vgpr_param
[i
]);
7359 returns
[num_returns
++] = ctx
->f32
;
7362 /* Vertex load indices. */
7363 for (i
= 0; i
< key
->vs_prolog
.num_inputs
; i
++)
7364 returns
[num_returns
++] = ctx
->f32
;
7366 /* Create the function. */
7367 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, 0);
7368 func
= ctx
->main_fn
;
7370 for (i
= 0; i
< num_input_vgprs
; i
++) {
7371 input_vgprs
[i
] = ac_get_arg(&ctx
->ac
, input_vgpr_param
[i
]);
7374 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7375 if (!key
->vs_prolog
.is_monolithic
)
7376 si_init_exec_from_input(ctx
, merged_wave_info
, 0);
7378 if (key
->vs_prolog
.as_ls
&&
7379 ctx
->screen
->info
.has_ls_vgpr_init_bug
) {
7380 /* If there are no HS threads, SPI loads the LS VGPRs
7381 * starting at VGPR 0. Shift them back to where they
7384 LLVMValueRef has_hs_threads
=
7385 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7386 si_unpack_param(ctx
, input_sgpr_param
[3], 8, 8),
7389 for (i
= 4; i
> 0; --i
) {
7390 input_vgprs
[i
+ 1] =
7391 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7393 input_vgprs
[i
- 1], "");
7398 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7399 unsigned instance_id_vgpr
=
7400 ctx
->screen
->info
.chip_class
>= GFX10
?
7402 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7404 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7405 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7407 /* InstanceID = VertexID >> 16;
7408 * VertexID = VertexID & 0xffff;
7410 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7411 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7412 LLVMConstInt(ctx
->i32
, 16, 0), "");
7413 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7414 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7417 /* Copy inputs to outputs. This should be no-op, as the registers match,
7418 * but it will prevent the compiler from overwriting them unintentionally.
7420 ret
= ctx
->return_value
;
7421 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7422 LLVMValueRef p
= LLVMGetParam(func
, i
);
7423 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7425 for (i
= 0; i
< num_input_vgprs
; i
++) {
7426 LLVMValueRef p
= input_vgprs
[i
];
7428 if (i
== vertex_id_vgpr
)
7429 p
= ctx
->abi
.vertex_id
;
7430 else if (i
== instance_id_vgpr
)
7431 p
= ctx
->abi
.instance_id
;
7433 p
= ac_to_float(&ctx
->ac
, p
);
7434 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7435 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7438 /* Compute vertex load indices from instance divisors. */
7439 LLVMValueRef instance_divisor_constbuf
= NULL
;
7441 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7442 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7443 LLVMValueRef buf_index
=
7444 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7445 instance_divisor_constbuf
=
7446 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7449 for (i
= 0; i
< key
->vs_prolog
.num_inputs
; i
++) {
7450 bool divisor_is_one
=
7451 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7452 bool divisor_is_fetched
=
7453 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7454 LLVMValueRef index
= NULL
;
7456 if (divisor_is_one
) {
7457 index
= ctx
->abi
.instance_id
;
7458 } else if (divisor_is_fetched
) {
7459 LLVMValueRef udiv_factors
[4];
7461 for (unsigned j
= 0; j
< 4; j
++) {
7463 buffer_load_const(ctx
, instance_divisor_constbuf
,
7464 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7465 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7467 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7468 * Such InstanceID might not be achievable in a reasonable time though.
7470 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7471 udiv_factors
[0], udiv_factors
[1],
7472 udiv_factors
[2], udiv_factors
[3]);
7475 if (divisor_is_one
|| divisor_is_fetched
) {
7476 /* Add StartInstance. */
7477 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7478 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7479 SI_SGPR_START_INSTANCE
), "");
7481 /* VertexID + BaseVertex */
7482 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7484 LLVMGetParam(func
, user_sgpr_base
+
7485 SI_SGPR_BASE_VERTEX
), "");
7488 index
= ac_to_float(&ctx
->ac
, index
);
7489 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7490 ctx
->args
.arg_count
+ i
, "");
7493 si_llvm_build_ret(ctx
, ret
);
7496 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7497 struct ac_llvm_compiler
*compiler
,
7498 struct si_shader
*shader
,
7499 struct pipe_debug_callback
*debug
,
7500 struct si_shader
*main_part
,
7501 const struct si_vs_prolog_bits
*key
)
7503 struct si_shader_selector
*vs
= main_part
->selector
;
7505 if (!si_vs_needs_prolog(vs
, key
))
7508 /* Get the prolog. */
7509 union si_shader_part_key prolog_key
;
7510 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7511 key
, shader
, &prolog_key
);
7514 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7515 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7516 debug
, si_build_vs_prolog_function
,
7517 "Vertex Shader Prolog");
7518 return shader
->prolog
!= NULL
;
7522 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7524 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7525 struct ac_llvm_compiler
*compiler
,
7526 struct si_shader
*shader
,
7527 struct pipe_debug_callback
*debug
)
7529 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7530 &shader
->key
.part
.vs
.prolog
);
7534 * Compile the TCS epilog function. This writes tesselation factors to memory
7535 * based on the output primitive type of the tesselator (determined by TES).
7537 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7538 union si_shader_part_key
*key
)
7540 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7542 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7544 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7545 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7546 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7547 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7548 &ctx
->tcs_offchip_offset
);
7549 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* wave info */
7550 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7551 &ctx
->tcs_factor_offset
);
7552 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7553 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7554 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7555 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7556 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7557 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7558 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7559 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7560 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7561 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7562 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7563 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7564 &ctx
->tcs_offchip_layout
);
7565 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7566 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7567 &ctx
->tcs_out_lds_layout
);
7569 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7570 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7571 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7572 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7573 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7574 &ctx
->tcs_offchip_layout
);
7575 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7576 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7577 &ctx
->tcs_out_lds_layout
);
7578 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7579 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7580 &ctx
->tcs_offchip_offset
);
7581 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7582 &ctx
->tcs_factor_offset
);
7585 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7586 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7587 struct ac_arg rel_patch_id
; /* patch index within the wave (REL_PATCH_ID) */
7588 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &rel_patch_id
);
7589 struct ac_arg invocation_id
; /* invocation ID within the patch */
7590 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &invocation_id
);
7591 struct ac_arg tcs_out_current_patch_data_offset
; /* LDS offset where tess factors should be loaded from */
7592 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
7593 &tcs_out_current_patch_data_offset
);
7595 struct ac_arg tess_factors
[6];
7596 for (unsigned i
= 0; i
< 6; i
++)
7597 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &tess_factors
[i
]);
7599 /* Create the function. */
7600 si_create_function(ctx
, "tcs_epilog", NULL
, 0,
7601 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7602 ac_declare_lds_as_pointer(&ctx
->ac
);
7604 LLVMValueRef invoc0_tess_factors
[6];
7605 for (unsigned i
= 0; i
< 6; i
++)
7606 invoc0_tess_factors
[i
] = ac_get_arg(&ctx
->ac
, tess_factors
[i
]);
7608 si_write_tess_factors(bld_base
,
7609 ac_get_arg(&ctx
->ac
, rel_patch_id
),
7610 ac_get_arg(&ctx
->ac
, invocation_id
),
7611 ac_get_arg(&ctx
->ac
, tcs_out_current_patch_data_offset
),
7612 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7614 LLVMBuildRetVoid(ctx
->ac
.builder
);
7618 * Select and compile (or reuse) TCS parts (epilog).
7620 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7621 struct ac_llvm_compiler
*compiler
,
7622 struct si_shader
*shader
,
7623 struct pipe_debug_callback
*debug
)
7625 if (sscreen
->info
.chip_class
>= GFX9
) {
7626 struct si_shader
*ls_main_part
=
7627 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7629 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7630 &shader
->key
.part
.tcs
.ls_prolog
))
7633 shader
->previous_stage
= ls_main_part
;
7636 /* Get the epilog. */
7637 union si_shader_part_key epilog_key
;
7638 memset(&epilog_key
, 0, sizeof(epilog_key
));
7639 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7641 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7642 PIPE_SHADER_TESS_CTRL
, false,
7643 &epilog_key
, compiler
, debug
,
7644 si_build_tcs_epilog_function
,
7645 "Tessellation Control Shader Epilog");
7646 return shader
->epilog
!= NULL
;
7650 * Select and compile (or reuse) GS parts (prolog).
7652 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7653 struct ac_llvm_compiler
*compiler
,
7654 struct si_shader
*shader
,
7655 struct pipe_debug_callback
*debug
)
7657 if (sscreen
->info
.chip_class
>= GFX9
) {
7658 struct si_shader
*es_main_part
;
7659 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7661 if (shader
->key
.as_ngg
)
7662 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7664 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7666 if (es_type
== PIPE_SHADER_VERTEX
&&
7667 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7668 &shader
->key
.part
.gs
.vs_prolog
))
7671 shader
->previous_stage
= es_main_part
;
7674 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7677 union si_shader_part_key prolog_key
;
7678 memset(&prolog_key
, 0, sizeof(prolog_key
));
7679 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7680 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7682 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7683 PIPE_SHADER_GEOMETRY
, true,
7684 &prolog_key
, compiler
, debug
,
7685 si_build_gs_prolog_function
,
7686 "Geometry Shader Prolog");
7687 return shader
->prolog2
!= NULL
;
7691 * Build the pixel shader prolog function. This handles:
7692 * - two-side color selection and interpolation
7693 * - overriding interpolation parameters for the API PS
7694 * - polygon stippling
7696 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7697 * overriden by other states. (e.g. per-sample interpolation)
7698 * Interpolated colors are stored after the preloaded VGPRs.
7700 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7701 union si_shader_part_key
*key
)
7703 LLVMValueRef ret
, func
;
7704 int num_returns
, i
, num_color_channels
;
7706 assert(si_need_ps_prolog(key
));
7708 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7710 /* Declare inputs. */
7711 LLVMTypeRef return_types
[AC_MAX_ARGS
];
7713 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7714 assert(key
->ps_prolog
.num_input_sgprs
+
7715 key
->ps_prolog
.num_input_vgprs
+
7716 num_color_channels
<= AC_MAX_ARGS
);
7717 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++) {
7718 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7719 return_types
[num_returns
++] = ctx
->i32
;
7723 struct ac_arg pos_fixed_pt
;
7724 struct ac_arg ancillary
;
7725 struct ac_arg param_sample_mask
;
7726 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++) {
7727 struct ac_arg
*arg
= NULL
;
7728 if (i
== key
->ps_prolog
.ancillary_vgpr_index
) {
7730 } else if (i
== key
->ps_prolog
.ancillary_vgpr_index
+ 1) {
7731 arg
= ¶m_sample_mask
;
7732 } else if (i
== key
->ps_prolog
.num_input_vgprs
- 1) {
7733 /* POS_FIXED_PT is always last. */
7734 arg
= &pos_fixed_pt
;
7736 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, arg
);
7737 return_types
[num_returns
++] = ctx
->f32
;
7740 /* Declare outputs (same as inputs + add colors if needed) */
7741 for (i
= 0; i
< num_color_channels
; i
++)
7742 return_types
[num_returns
++] = ctx
->f32
;
7744 /* Create the function. */
7745 si_create_function(ctx
, "ps_prolog", return_types
, num_returns
, 0);
7746 func
= ctx
->main_fn
;
7748 /* Copy inputs to outputs. This should be no-op, as the registers match,
7749 * but it will prevent the compiler from overwriting them unintentionally.
7751 ret
= ctx
->return_value
;
7752 for (i
= 0; i
< ctx
->args
.arg_count
; i
++) {
7753 LLVMValueRef p
= LLVMGetParam(func
, i
);
7754 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7757 /* Polygon stippling. */
7758 if (key
->ps_prolog
.states
.poly_stipple
) {
7759 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7761 si_llvm_emit_polygon_stipple(ctx
, list
, pos_fixed_pt
);
7764 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7765 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7766 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7767 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7769 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7770 * The hw doesn't compute CENTROID if the whole wave only
7771 * contains fully-covered quads.
7773 * PRIM_MASK is after user SGPRs.
7775 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7776 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7777 LLVMConstInt(ctx
->i32
, 31, 0), "");
7778 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7781 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7782 /* Read PERSP_CENTER. */
7783 for (i
= 0; i
< 2; i
++)
7784 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7785 /* Read PERSP_CENTROID. */
7786 for (i
= 0; i
< 2; i
++)
7787 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7788 /* Select PERSP_CENTROID. */
7789 for (i
= 0; i
< 2; i
++) {
7790 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7791 center
[i
], centroid
[i
], "");
7792 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7793 tmp
, base
+ 4 + i
, "");
7796 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7797 /* Read LINEAR_CENTER. */
7798 for (i
= 0; i
< 2; i
++)
7799 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7800 /* Read LINEAR_CENTROID. */
7801 for (i
= 0; i
< 2; i
++)
7802 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7803 /* Select LINEAR_CENTROID. */
7804 for (i
= 0; i
< 2; i
++) {
7805 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7806 center
[i
], centroid
[i
], "");
7807 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7808 tmp
, base
+ 10 + i
, "");
7813 /* Force per-sample interpolation. */
7814 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7815 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7816 LLVMValueRef persp_sample
[2];
7818 /* Read PERSP_SAMPLE. */
7819 for (i
= 0; i
< 2; i
++)
7820 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7821 /* Overwrite PERSP_CENTER. */
7822 for (i
= 0; i
< 2; i
++)
7823 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7824 persp_sample
[i
], base
+ 2 + i
, "");
7825 /* Overwrite PERSP_CENTROID. */
7826 for (i
= 0; i
< 2; i
++)
7827 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7828 persp_sample
[i
], base
+ 4 + i
, "");
7830 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7831 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7832 LLVMValueRef linear_sample
[2];
7834 /* Read LINEAR_SAMPLE. */
7835 for (i
= 0; i
< 2; i
++)
7836 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7837 /* Overwrite LINEAR_CENTER. */
7838 for (i
= 0; i
< 2; i
++)
7839 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7840 linear_sample
[i
], base
+ 8 + i
, "");
7841 /* Overwrite LINEAR_CENTROID. */
7842 for (i
= 0; i
< 2; i
++)
7843 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7844 linear_sample
[i
], base
+ 10 + i
, "");
7847 /* Force center interpolation. */
7848 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7849 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7850 LLVMValueRef persp_center
[2];
7852 /* Read PERSP_CENTER. */
7853 for (i
= 0; i
< 2; i
++)
7854 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7855 /* Overwrite PERSP_SAMPLE. */
7856 for (i
= 0; i
< 2; i
++)
7857 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7858 persp_center
[i
], base
+ i
, "");
7859 /* Overwrite PERSP_CENTROID. */
7860 for (i
= 0; i
< 2; i
++)
7861 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7862 persp_center
[i
], base
+ 4 + i
, "");
7864 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7865 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7866 LLVMValueRef linear_center
[2];
7868 /* Read LINEAR_CENTER. */
7869 for (i
= 0; i
< 2; i
++)
7870 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7871 /* Overwrite LINEAR_SAMPLE. */
7872 for (i
= 0; i
< 2; i
++)
7873 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7874 linear_center
[i
], base
+ 6 + i
, "");
7875 /* Overwrite LINEAR_CENTROID. */
7876 for (i
= 0; i
< 2; i
++)
7877 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7878 linear_center
[i
], base
+ 10 + i
, "");
7881 /* Interpolate colors. */
7882 unsigned color_out_idx
= 0;
7883 for (i
= 0; i
< 2; i
++) {
7884 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7885 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7886 key
->ps_prolog
.face_vgpr_index
;
7887 LLVMValueRef interp
[2], color
[4];
7888 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7893 /* If the interpolation qualifier is not CONSTANT (-1). */
7894 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7895 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7896 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7898 /* Get the (i,j) updated by bc_optimize handling. */
7899 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7901 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7902 interp_vgpr
+ 1, "");
7903 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7906 /* Use the absolute location of the input. */
7907 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7909 if (key
->ps_prolog
.states
.color_two_side
) {
7910 face
= LLVMGetParam(func
, face_vgpr
);
7911 face
= ac_to_integer(&ctx
->ac
, face
);
7914 interp_fs_input(ctx
,
7915 key
->ps_prolog
.color_attr_index
[i
],
7916 TGSI_SEMANTIC_COLOR
, i
,
7917 key
->ps_prolog
.num_interp_inputs
,
7918 key
->ps_prolog
.colors_read
, interp_ij
,
7919 prim_mask
, face
, color
);
7922 unsigned chan
= u_bit_scan(&writemask
);
7923 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7924 ctx
->args
.arg_count
+ color_out_idx
++, "");
7928 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7931 * "When per-sample shading is active due to the use of a fragment
7932 * input qualified by sample or due to the use of the gl_SampleID
7933 * or gl_SamplePosition variables, only the bit for the current
7934 * sample is set in gl_SampleMaskIn. When state specifies multiple
7935 * fragment shader invocations for a given fragment, the sample
7936 * mask for any single fragment shader invocation may specify a
7937 * subset of the covered samples for the fragment. In this case,
7938 * the bit corresponding to each covered sample will be set in
7939 * exactly one fragment shader invocation."
7941 * The samplemask loaded by hardware is always the coverage of the
7942 * entire pixel/fragment, so mask bits out based on the sample ID.
7944 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7945 /* The bit pattern matches that used by fixed function fragment
7947 static const uint16_t ps_iter_masks
[] = {
7948 0xffff, /* not used */
7954 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7956 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7957 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary
, 8, 4);
7958 LLVMValueRef samplemask
= ac_get_arg(&ctx
->ac
, param_sample_mask
);
7960 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7961 samplemask
= LLVMBuildAnd(
7964 LLVMBuildShl(ctx
->ac
.builder
,
7965 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7968 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7970 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7971 param_sample_mask
.arg_index
, "");
7974 /* Tell LLVM to insert WQM instruction sequence when needed. */
7975 if (key
->ps_prolog
.wqm
) {
7976 LLVMAddTargetDependentFunctionAttr(func
,
7977 "amdgpu-ps-wqm-outputs", "");
7980 si_llvm_build_ret(ctx
, ret
);
7984 * Build the pixel shader epilog function. This handles everything that must be
7985 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7987 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7988 union si_shader_part_key
*key
)
7990 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7991 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7993 struct si_ps_exports exp
= {};
7995 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7997 /* Declare input SGPRs. */
7998 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->rw_buffers
);
7999 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8000 &ctx
->bindless_samplers_and_images
);
8001 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8002 &ctx
->const_and_shader_buffers
);
8003 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8004 &ctx
->samplers_and_images
);
8005 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
,
8006 NULL
, SI_PARAM_ALPHA_REF
);
8008 /* Declare input VGPRs. */
8009 unsigned required_num_params
=
8010 ctx
->args
.num_sgprs_used
+
8011 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8012 key
->ps_epilog
.writes_z
+
8013 key
->ps_epilog
.writes_stencil
+
8014 key
->ps_epilog
.writes_samplemask
;
8016 required_num_params
= MAX2(required_num_params
,
8017 ctx
->args
.num_sgprs_used
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8019 while (ctx
->args
.arg_count
< required_num_params
)
8020 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
8022 /* Create the function. */
8023 si_create_function(ctx
, "ps_epilog", NULL
, 0, 0);
8024 /* Disable elimination of unused inputs. */
8025 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8026 "InitialPSInputAddr", 0xffffff);
8028 /* Process colors. */
8029 unsigned vgpr
= ctx
->args
.num_sgprs_used
;
8030 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8031 int last_color_export
= -1;
8033 /* Find the last color export. */
8034 if (!key
->ps_epilog
.writes_z
&&
8035 !key
->ps_epilog
.writes_stencil
&&
8036 !key
->ps_epilog
.writes_samplemask
) {
8037 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8039 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8040 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8041 /* Just set this if any of the colorbuffers are enabled. */
8043 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8044 last_color_export
= 0;
8046 for (i
= 0; i
< 8; i
++)
8047 if (colors_written
& (1 << i
) &&
8048 (spi_format
>> (i
* 4)) & 0xf)
8049 last_color_export
= i
;
8053 while (colors_written
) {
8054 LLVMValueRef color
[4];
8055 int mrt
= u_bit_scan(&colors_written
);
8057 for (i
= 0; i
< 4; i
++)
8058 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8060 si_export_mrt_color(bld_base
, color
, mrt
,
8061 ctx
->args
.arg_count
- 1,
8062 mrt
== last_color_export
, &exp
);
8065 /* Process depth, stencil, samplemask. */
8066 if (key
->ps_epilog
.writes_z
)
8067 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8068 if (key
->ps_epilog
.writes_stencil
)
8069 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8070 if (key
->ps_epilog
.writes_samplemask
)
8071 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8073 if (depth
|| stencil
|| samplemask
)
8074 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8075 else if (last_color_export
== -1)
8076 ac_build_export_null(&ctx
->ac
);
8079 si_emit_ps_exports(ctx
, &exp
);
8082 LLVMBuildRetVoid(ctx
->ac
.builder
);
8086 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8088 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8089 struct ac_llvm_compiler
*compiler
,
8090 struct si_shader
*shader
,
8091 struct pipe_debug_callback
*debug
)
8093 union si_shader_part_key prolog_key
;
8094 union si_shader_part_key epilog_key
;
8096 /* Get the prolog. */
8097 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8099 /* The prolog is a no-op if these aren't set. */
8100 if (si_need_ps_prolog(&prolog_key
)) {
8102 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8103 PIPE_SHADER_FRAGMENT
, true,
8104 &prolog_key
, compiler
, debug
,
8105 si_build_ps_prolog_function
,
8106 "Fragment Shader Prolog");
8107 if (!shader
->prolog
)
8111 /* Get the epilog. */
8112 si_get_ps_epilog_key(shader
, &epilog_key
);
8115 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8116 PIPE_SHADER_FRAGMENT
, false,
8117 &epilog_key
, compiler
, debug
,
8118 si_build_ps_epilog_function
,
8119 "Fragment Shader Epilog");
8120 if (!shader
->epilog
)
8123 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8124 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8125 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8126 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8129 /* Set up the enable bits for per-sample shading if needed. */
8130 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8131 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8132 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8133 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8134 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8135 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8137 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8138 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8139 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8140 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8141 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8142 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8144 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8145 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8146 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8147 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8148 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8149 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8151 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8152 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8153 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8154 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8155 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8156 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8159 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8160 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8161 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8162 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8163 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8166 /* At least one pair of interpolation weights must be enabled. */
8167 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8168 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8169 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8172 /* Samplemask fixup requires the sample ID. */
8173 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8174 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8175 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8178 /* The sample mask input is always enabled, because the API shader always
8179 * passes it through to the epilog. Disable it here if it's unused.
8181 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8182 !shader
->selector
->info
.reads_samplemask
)
8183 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8188 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8191 /* If tessellation is all offchip and on-chip GS isn't used, this
8192 * workaround is not needed.
8196 /* SPI barrier management bug:
8197 * Make sure we have at least 4k of LDS in use to avoid the bug.
8198 * It applies to workgroup sizes of more than one wavefront.
8200 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8201 sscreen
->info
.family
== CHIP_KABINI
)
8202 *lds_size
= MAX2(*lds_size
, 8);
8205 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8206 struct si_shader
*shader
)
8208 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8210 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8212 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8213 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8214 si_multiwave_lds_size_workaround(sscreen
,
8215 &shader
->config
.lds_size
);
8219 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8220 struct si_shader
*shader
,
8221 struct pipe_debug_callback
*debug
)
8223 struct si_shader_selector
*sel
= shader
->selector
;
8224 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8227 /* LS, ES, VS are compiled on demand if the main part hasn't been
8228 * compiled for that stage.
8230 * GS are compiled on demand if the main part hasn't been compiled
8231 * for the chosen NGG-ness.
8233 * Vertex shaders are compiled on demand when a vertex fetch
8234 * workaround must be applied.
8236 if (shader
->is_monolithic
) {
8237 /* Monolithic shader (compiled as a whole, has many variants,
8238 * may take a long time to compile).
8240 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8244 /* The shader consists of several parts:
8246 * - the middle part is the user shader, it has 1 variant only
8247 * and it was compiled during the creation of the shader
8249 * - the prolog part is inserted at the beginning
8250 * - the epilog part is inserted at the end
8252 * The prolog and epilog have many (but simple) variants.
8254 * Starting with gfx9, geometry and tessellation control
8255 * shaders also contain the prolog and user shader parts of
8256 * the previous shader stage.
8262 /* Copy the compiled TGSI shader data over. */
8263 shader
->is_binary_shared
= true;
8264 shader
->binary
= mainp
->binary
;
8265 shader
->config
= mainp
->config
;
8266 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8267 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8268 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8269 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8270 memcpy(shader
->info
.vs_output_param_offset
,
8271 mainp
->info
.vs_output_param_offset
,
8272 sizeof(mainp
->info
.vs_output_param_offset
));
8273 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8274 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8275 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8277 /* Select prologs and/or epilogs. */
8278 switch (sel
->type
) {
8279 case PIPE_SHADER_VERTEX
:
8280 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8283 case PIPE_SHADER_TESS_CTRL
:
8284 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8287 case PIPE_SHADER_TESS_EVAL
:
8289 case PIPE_SHADER_GEOMETRY
:
8290 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8293 case PIPE_SHADER_FRAGMENT
:
8294 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8297 /* Make sure we have at least as many VGPRs as there
8298 * are allocated inputs.
8300 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8301 shader
->info
.num_input_vgprs
);
8306 /* Update SGPR and VGPR counts. */
8307 if (shader
->prolog
) {
8308 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8309 shader
->prolog
->config
.num_sgprs
);
8310 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8311 shader
->prolog
->config
.num_vgprs
);
8313 if (shader
->previous_stage
) {
8314 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8315 shader
->previous_stage
->config
.num_sgprs
);
8316 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8317 shader
->previous_stage
->config
.num_vgprs
);
8318 shader
->config
.spilled_sgprs
=
8319 MAX2(shader
->config
.spilled_sgprs
,
8320 shader
->previous_stage
->config
.spilled_sgprs
);
8321 shader
->config
.spilled_vgprs
=
8322 MAX2(shader
->config
.spilled_vgprs
,
8323 shader
->previous_stage
->config
.spilled_vgprs
);
8324 shader
->info
.private_mem_vgprs
=
8325 MAX2(shader
->info
.private_mem_vgprs
,
8326 shader
->previous_stage
->info
.private_mem_vgprs
);
8327 shader
->config
.scratch_bytes_per_wave
=
8328 MAX2(shader
->config
.scratch_bytes_per_wave
,
8329 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8330 shader
->info
.uses_instanceid
|=
8331 shader
->previous_stage
->info
.uses_instanceid
;
8333 if (shader
->prolog2
) {
8334 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8335 shader
->prolog2
->config
.num_sgprs
);
8336 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8337 shader
->prolog2
->config
.num_vgprs
);
8339 if (shader
->epilog
) {
8340 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8341 shader
->epilog
->config
.num_sgprs
);
8342 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8343 shader
->epilog
->config
.num_vgprs
);
8345 si_calculate_max_simd_waves(shader
);
8348 if (shader
->key
.as_ngg
) {
8349 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8350 gfx10_ngg_calculate_subgroup_info(shader
);
8351 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8352 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8355 si_fix_resource_usage(sscreen
, shader
);
8356 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8359 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8360 fprintf(stderr
, "LLVM failed to upload shader\n");
8367 void si_shader_destroy(struct si_shader
*shader
)
8369 if (shader
->scratch_bo
)
8370 si_resource_reference(&shader
->scratch_bo
, NULL
);
8372 si_resource_reference(&shader
->bo
, NULL
);
8374 if (!shader
->is_binary_shared
)
8375 si_shader_binary_clean(&shader
->binary
);
8377 free(shader
->shader_log
);