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[mesa.git] / src / gallium / drivers / radeonsi / si_shader.c
1 /*
2 * Copyright 2012 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include "util/u_memory.h"
26 #include "tgsi/tgsi_strings.h"
27 #include "tgsi/tgsi_from_mesa.h"
28
29 #include "ac_exp_param.h"
30 #include "ac_rtld.h"
31 #include "si_shader_internal.h"
32 #include "si_pipe.h"
33 #include "sid.h"
34
35 #include "compiler/nir/nir.h"
36 #include "compiler/nir/nir_serialize.h"
37
38 static const char scratch_rsrc_dword0_symbol[] =
39 "SCRATCH_RSRC_DWORD0";
40
41 static const char scratch_rsrc_dword1_symbol[] =
42 "SCRATCH_RSRC_DWORD1";
43
44 static void si_dump_shader_key(const struct si_shader *shader, FILE *f);
45
46 static void si_build_vs_prolog_function(struct si_shader_context *ctx,
47 union si_shader_part_key *key);
48
49 /** Whether the shader runs as a combination of multiple API shaders */
50 static bool is_multi_part_shader(struct si_shader_context *ctx)
51 {
52 if (ctx->screen->info.chip_class <= GFX8)
53 return false;
54
55 return ctx->shader->key.as_ls ||
56 ctx->shader->key.as_es ||
57 ctx->type == PIPE_SHADER_TESS_CTRL ||
58 ctx->type == PIPE_SHADER_GEOMETRY;
59 }
60
61 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
62 bool si_is_merged_shader(struct si_shader_context *ctx)
63 {
64 return ctx->shader->key.as_ngg || is_multi_part_shader(ctx);
65 }
66
67 /**
68 * Returns a unique index for a per-patch semantic name and index. The index
69 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
70 * can be calculated.
71 */
72 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name, unsigned index)
73 {
74 switch (semantic_name) {
75 case TGSI_SEMANTIC_TESSOUTER:
76 return 0;
77 case TGSI_SEMANTIC_TESSINNER:
78 return 1;
79 case TGSI_SEMANTIC_PATCH:
80 assert(index < 30);
81 return 2 + index;
82
83 default:
84 assert(!"invalid semantic name");
85 return 0;
86 }
87 }
88
89 /**
90 * Returns a unique index for a semantic name and index. The index must be
91 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
92 * calculated.
93 */
94 unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index,
95 unsigned is_varying)
96 {
97 switch (semantic_name) {
98 case TGSI_SEMANTIC_POSITION:
99 return 0;
100 case TGSI_SEMANTIC_GENERIC:
101 /* Since some shader stages use the the highest used IO index
102 * to determine the size to allocate for inputs/outputs
103 * (in LDS, tess and GS rings). GENERIC should be placed right
104 * after POSITION to make that size as small as possible.
105 */
106 if (index < SI_MAX_IO_GENERIC)
107 return 1 + index;
108
109 assert(!"invalid generic index");
110 return 0;
111 case TGSI_SEMANTIC_FOG:
112 return SI_MAX_IO_GENERIC + 1;
113 case TGSI_SEMANTIC_COLOR:
114 assert(index < 2);
115 return SI_MAX_IO_GENERIC + 2 + index;
116 case TGSI_SEMANTIC_BCOLOR:
117 assert(index < 2);
118 /* If it's a varying, COLOR and BCOLOR alias. */
119 if (is_varying)
120 return SI_MAX_IO_GENERIC + 2 + index;
121 else
122 return SI_MAX_IO_GENERIC + 4 + index;
123 case TGSI_SEMANTIC_TEXCOORD:
124 assert(index < 8);
125 return SI_MAX_IO_GENERIC + 6 + index;
126
127 /* These are rarely used between LS and HS or ES and GS. */
128 case TGSI_SEMANTIC_CLIPDIST:
129 assert(index < 2);
130 return SI_MAX_IO_GENERIC + 6 + 8 + index;
131 case TGSI_SEMANTIC_CLIPVERTEX:
132 return SI_MAX_IO_GENERIC + 6 + 8 + 2;
133 case TGSI_SEMANTIC_PSIZE:
134 return SI_MAX_IO_GENERIC + 6 + 8 + 3;
135
136 /* These can't be written by LS, HS, and ES. */
137 case TGSI_SEMANTIC_LAYER:
138 return SI_MAX_IO_GENERIC + 6 + 8 + 4;
139 case TGSI_SEMANTIC_VIEWPORT_INDEX:
140 return SI_MAX_IO_GENERIC + 6 + 8 + 5;
141 case TGSI_SEMANTIC_PRIMID:
142 STATIC_ASSERT(SI_MAX_IO_GENERIC + 6 + 8 + 6 <= 63);
143 return SI_MAX_IO_GENERIC + 6 + 8 + 6;
144 default:
145 fprintf(stderr, "invalid semantic name = %u\n", semantic_name);
146 assert(!"invalid semantic name");
147 return 0;
148 }
149 }
150
151 /**
152 * Get the value of a shader input parameter and extract a bitfield.
153 */
154 static LLVMValueRef unpack_llvm_param(struct si_shader_context *ctx,
155 LLVMValueRef value, unsigned rshift,
156 unsigned bitwidth)
157 {
158 if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMFloatTypeKind)
159 value = ac_to_integer(&ctx->ac, value);
160
161 if (rshift)
162 value = LLVMBuildLShr(ctx->ac.builder, value,
163 LLVMConstInt(ctx->i32, rshift, 0), "");
164
165 if (rshift + bitwidth < 32) {
166 unsigned mask = (1 << bitwidth) - 1;
167 value = LLVMBuildAnd(ctx->ac.builder, value,
168 LLVMConstInt(ctx->i32, mask, 0), "");
169 }
170
171 return value;
172 }
173
174 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
175 struct ac_arg param, unsigned rshift,
176 unsigned bitwidth)
177 {
178 LLVMValueRef value = ac_get_arg(&ctx->ac, param);
179
180 return unpack_llvm_param(ctx, value, rshift, bitwidth);
181 }
182
183 static LLVMValueRef unpack_sint16(struct si_shader_context *ctx,
184 LLVMValueRef i32, unsigned index)
185 {
186 assert(index <= 1);
187
188 if (index == 1)
189 return LLVMBuildAShr(ctx->ac.builder, i32,
190 LLVMConstInt(ctx->i32, 16, 0), "");
191
192 return LLVMBuildSExt(ctx->ac.builder,
193 LLVMBuildTrunc(ctx->ac.builder, i32,
194 ctx->ac.i16, ""),
195 ctx->i32, "");
196 }
197
198 void si_llvm_load_input_vs(
199 struct si_shader_context *ctx,
200 unsigned input_index,
201 LLVMValueRef out[4])
202 {
203 const struct si_shader_info *info = &ctx->shader->selector->info;
204 unsigned vs_blit_property = info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
205
206 if (vs_blit_property) {
207 LLVMValueRef vertex_id = ctx->abi.vertex_id;
208 LLVMValueRef sel_x1 = LLVMBuildICmp(ctx->ac.builder,
209 LLVMIntULE, vertex_id,
210 ctx->i32_1, "");
211 /* Use LLVMIntNE, because we have 3 vertices and only
212 * the middle one should use y2.
213 */
214 LLVMValueRef sel_y1 = LLVMBuildICmp(ctx->ac.builder,
215 LLVMIntNE, vertex_id,
216 ctx->i32_1, "");
217
218 unsigned param_vs_blit_inputs = ctx->vs_blit_inputs.arg_index;
219 if (input_index == 0) {
220 /* Position: */
221 LLVMValueRef x1y1 = LLVMGetParam(ctx->main_fn,
222 param_vs_blit_inputs);
223 LLVMValueRef x2y2 = LLVMGetParam(ctx->main_fn,
224 param_vs_blit_inputs + 1);
225
226 LLVMValueRef x1 = unpack_sint16(ctx, x1y1, 0);
227 LLVMValueRef y1 = unpack_sint16(ctx, x1y1, 1);
228 LLVMValueRef x2 = unpack_sint16(ctx, x2y2, 0);
229 LLVMValueRef y2 = unpack_sint16(ctx, x2y2, 1);
230
231 LLVMValueRef x = LLVMBuildSelect(ctx->ac.builder, sel_x1,
232 x1, x2, "");
233 LLVMValueRef y = LLVMBuildSelect(ctx->ac.builder, sel_y1,
234 y1, y2, "");
235
236 out[0] = LLVMBuildSIToFP(ctx->ac.builder, x, ctx->f32, "");
237 out[1] = LLVMBuildSIToFP(ctx->ac.builder, y, ctx->f32, "");
238 out[2] = LLVMGetParam(ctx->main_fn,
239 param_vs_blit_inputs + 2);
240 out[3] = ctx->ac.f32_1;
241 return;
242 }
243
244 /* Color or texture coordinates: */
245 assert(input_index == 1);
246
247 if (vs_blit_property == SI_VS_BLIT_SGPRS_POS_COLOR) {
248 for (int i = 0; i < 4; i++) {
249 out[i] = LLVMGetParam(ctx->main_fn,
250 param_vs_blit_inputs + 3 + i);
251 }
252 } else {
253 assert(vs_blit_property == SI_VS_BLIT_SGPRS_POS_TEXCOORD);
254 LLVMValueRef x1 = LLVMGetParam(ctx->main_fn,
255 param_vs_blit_inputs + 3);
256 LLVMValueRef y1 = LLVMGetParam(ctx->main_fn,
257 param_vs_blit_inputs + 4);
258 LLVMValueRef x2 = LLVMGetParam(ctx->main_fn,
259 param_vs_blit_inputs + 5);
260 LLVMValueRef y2 = LLVMGetParam(ctx->main_fn,
261 param_vs_blit_inputs + 6);
262
263 out[0] = LLVMBuildSelect(ctx->ac.builder, sel_x1,
264 x1, x2, "");
265 out[1] = LLVMBuildSelect(ctx->ac.builder, sel_y1,
266 y1, y2, "");
267 out[2] = LLVMGetParam(ctx->main_fn,
268 param_vs_blit_inputs + 7);
269 out[3] = LLVMGetParam(ctx->main_fn,
270 param_vs_blit_inputs + 8);
271 }
272 return;
273 }
274
275 unsigned num_vbos_in_user_sgprs = ctx->shader->selector->num_vbos_in_user_sgprs;
276 union si_vs_fix_fetch fix_fetch;
277 LLVMValueRef vb_desc;
278 LLVMValueRef vertex_index;
279 LLVMValueRef tmp;
280
281 if (input_index < num_vbos_in_user_sgprs) {
282 vb_desc = ac_get_arg(&ctx->ac, ctx->vb_descriptors[input_index]);
283 } else {
284 unsigned index= input_index - num_vbos_in_user_sgprs;
285 vb_desc = ac_build_load_to_sgpr(&ctx->ac,
286 ac_get_arg(&ctx->ac, ctx->vertex_buffers),
287 LLVMConstInt(ctx->i32, index, 0));
288 }
289
290 vertex_index = LLVMGetParam(ctx->main_fn,
291 ctx->vertex_index0.arg_index +
292 input_index);
293
294 /* Use the open-coded implementation for all loads of doubles and
295 * of dword-sized data that needs fixups. We need to insert conversion
296 * code anyway, and the amd/common code does it for us.
297 *
298 * Note: On LLVM <= 8, we can only open-code formats with
299 * channel size >= 4 bytes.
300 */
301 bool opencode = ctx->shader->key.mono.vs_fetch_opencode & (1 << input_index);
302 fix_fetch.bits = ctx->shader->key.mono.vs_fix_fetch[input_index].bits;
303 if (opencode ||
304 (fix_fetch.u.log_size == 3 && fix_fetch.u.format == AC_FETCH_FORMAT_FLOAT) ||
305 (fix_fetch.u.log_size == 2)) {
306 tmp = ac_build_opencoded_load_format(
307 &ctx->ac, fix_fetch.u.log_size, fix_fetch.u.num_channels_m1 + 1,
308 fix_fetch.u.format, fix_fetch.u.reverse, !opencode,
309 vb_desc, vertex_index, ctx->ac.i32_0, ctx->ac.i32_0, 0, true);
310 for (unsigned i = 0; i < 4; ++i)
311 out[i] = LLVMBuildExtractElement(ctx->ac.builder, tmp, LLVMConstInt(ctx->i32, i, false), "");
312 return;
313 }
314
315 /* Do multiple loads for special formats. */
316 unsigned required_channels = util_last_bit(info->input_usage_mask[input_index]);
317 LLVMValueRef fetches[4];
318 unsigned num_fetches;
319 unsigned fetch_stride;
320 unsigned channels_per_fetch;
321
322 if (fix_fetch.u.log_size <= 1 && fix_fetch.u.num_channels_m1 == 2) {
323 num_fetches = MIN2(required_channels, 3);
324 fetch_stride = 1 << fix_fetch.u.log_size;
325 channels_per_fetch = 1;
326 } else {
327 num_fetches = 1;
328 fetch_stride = 0;
329 channels_per_fetch = required_channels;
330 }
331
332 for (unsigned i = 0; i < num_fetches; ++i) {
333 LLVMValueRef voffset = LLVMConstInt(ctx->i32, fetch_stride * i, 0);
334 fetches[i] = ac_build_buffer_load_format(&ctx->ac, vb_desc, vertex_index, voffset,
335 channels_per_fetch, 0, true);
336 }
337
338 if (num_fetches == 1 && channels_per_fetch > 1) {
339 LLVMValueRef fetch = fetches[0];
340 for (unsigned i = 0; i < channels_per_fetch; ++i) {
341 tmp = LLVMConstInt(ctx->i32, i, false);
342 fetches[i] = LLVMBuildExtractElement(
343 ctx->ac.builder, fetch, tmp, "");
344 }
345 num_fetches = channels_per_fetch;
346 channels_per_fetch = 1;
347 }
348
349 for (unsigned i = num_fetches; i < 4; ++i)
350 fetches[i] = LLVMGetUndef(ctx->f32);
351
352 if (fix_fetch.u.log_size <= 1 && fix_fetch.u.num_channels_m1 == 2 &&
353 required_channels == 4) {
354 if (fix_fetch.u.format == AC_FETCH_FORMAT_UINT || fix_fetch.u.format == AC_FETCH_FORMAT_SINT)
355 fetches[3] = ctx->ac.i32_1;
356 else
357 fetches[3] = ctx->ac.f32_1;
358 } else if (fix_fetch.u.log_size == 3 &&
359 (fix_fetch.u.format == AC_FETCH_FORMAT_SNORM ||
360 fix_fetch.u.format == AC_FETCH_FORMAT_SSCALED ||
361 fix_fetch.u.format == AC_FETCH_FORMAT_SINT) &&
362 required_channels == 4) {
363 /* For 2_10_10_10, the hardware returns an unsigned value;
364 * convert it to a signed one.
365 */
366 LLVMValueRef tmp = fetches[3];
367 LLVMValueRef c30 = LLVMConstInt(ctx->i32, 30, 0);
368
369 /* First, recover the sign-extended signed integer value. */
370 if (fix_fetch.u.format == AC_FETCH_FORMAT_SSCALED)
371 tmp = LLVMBuildFPToUI(ctx->ac.builder, tmp, ctx->i32, "");
372 else
373 tmp = ac_to_integer(&ctx->ac, tmp);
374
375 /* For the integer-like cases, do a natural sign extension.
376 *
377 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
378 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
379 * exponent.
380 */
381 tmp = LLVMBuildShl(ctx->ac.builder, tmp,
382 fix_fetch.u.format == AC_FETCH_FORMAT_SNORM ?
383 LLVMConstInt(ctx->i32, 7, 0) : c30, "");
384 tmp = LLVMBuildAShr(ctx->ac.builder, tmp, c30, "");
385
386 /* Convert back to the right type. */
387 if (fix_fetch.u.format == AC_FETCH_FORMAT_SNORM) {
388 LLVMValueRef clamp;
389 LLVMValueRef neg_one = LLVMConstReal(ctx->f32, -1.0);
390 tmp = LLVMBuildSIToFP(ctx->ac.builder, tmp, ctx->f32, "");
391 clamp = LLVMBuildFCmp(ctx->ac.builder, LLVMRealULT, tmp, neg_one, "");
392 tmp = LLVMBuildSelect(ctx->ac.builder, clamp, neg_one, tmp, "");
393 } else if (fix_fetch.u.format == AC_FETCH_FORMAT_SSCALED) {
394 tmp = LLVMBuildSIToFP(ctx->ac.builder, tmp, ctx->f32, "");
395 }
396
397 fetches[3] = tmp;
398 }
399
400 for (unsigned i = 0; i < 4; ++i)
401 out[i] = ac_to_float(&ctx->ac, fetches[i]);
402 }
403
404 LLVMValueRef si_get_primitive_id(struct si_shader_context *ctx,
405 unsigned swizzle)
406 {
407 if (swizzle > 0)
408 return ctx->i32_0;
409
410 switch (ctx->type) {
411 case PIPE_SHADER_VERTEX:
412 return ac_get_arg(&ctx->ac, ctx->vs_prim_id);
413 case PIPE_SHADER_TESS_CTRL:
414 return ac_get_arg(&ctx->ac, ctx->args.tcs_patch_id);
415 case PIPE_SHADER_TESS_EVAL:
416 return ac_get_arg(&ctx->ac, ctx->args.tes_patch_id);
417 case PIPE_SHADER_GEOMETRY:
418 return ac_get_arg(&ctx->ac, ctx->args.gs_prim_id);
419 default:
420 assert(0);
421 return ctx->i32_0;
422 }
423 }
424
425 static LLVMValueRef get_base_vertex(struct ac_shader_abi *abi)
426 {
427 struct si_shader_context *ctx = si_shader_context_from_abi(abi);
428
429 /* For non-indexed draws, the base vertex set by the driver
430 * (for direct draws) or the CP (for indirect draws) is the
431 * first vertex ID, but GLSL expects 0 to be returned.
432 */
433 LLVMValueRef vs_state = ac_get_arg(&ctx->ac,
434 ctx->vs_state_bits);
435 LLVMValueRef indexed;
436
437 indexed = LLVMBuildLShr(ctx->ac.builder, vs_state, ctx->i32_1, "");
438 indexed = LLVMBuildTrunc(ctx->ac.builder, indexed, ctx->i1, "");
439
440 return LLVMBuildSelect(ctx->ac.builder, indexed,
441 ac_get_arg(&ctx->ac, ctx->args.base_vertex),
442 ctx->i32_0, "");
443 }
444
445 static LLVMValueRef get_block_size(struct ac_shader_abi *abi)
446 {
447 struct si_shader_context *ctx = si_shader_context_from_abi(abi);
448
449 LLVMValueRef values[3];
450 LLVMValueRef result;
451 unsigned i;
452 unsigned *properties = ctx->shader->selector->info.properties;
453
454 if (properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] != 0) {
455 unsigned sizes[3] = {
456 properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH],
457 properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT],
458 properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH]
459 };
460
461 for (i = 0; i < 3; ++i)
462 values[i] = LLVMConstInt(ctx->i32, sizes[i], 0);
463
464 result = ac_build_gather_values(&ctx->ac, values, 3);
465 } else {
466 result = ac_get_arg(&ctx->ac, ctx->block_size);
467 }
468
469 return result;
470 }
471
472 void si_declare_compute_memory(struct si_shader_context *ctx)
473 {
474 struct si_shader_selector *sel = ctx->shader->selector;
475 unsigned lds_size = sel->info.properties[TGSI_PROPERTY_CS_LOCAL_SIZE];
476
477 LLVMTypeRef i8p = LLVMPointerType(ctx->i8, AC_ADDR_SPACE_LDS);
478 LLVMValueRef var;
479
480 assert(!ctx->ac.lds);
481
482 var = LLVMAddGlobalInAddressSpace(ctx->ac.module,
483 LLVMArrayType(ctx->i8, lds_size),
484 "compute_lds",
485 AC_ADDR_SPACE_LDS);
486 LLVMSetAlignment(var, 64 * 1024);
487
488 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, var, i8p, "");
489 }
490
491 /* Initialize arguments for the shader export intrinsic */
492 static void si_llvm_init_vs_export_args(struct si_shader_context *ctx,
493 LLVMValueRef *values,
494 unsigned target,
495 struct ac_export_args *args)
496 {
497 args->enabled_channels = 0xf; /* writemask - default is 0xf */
498 args->valid_mask = 0; /* Specify whether the EXEC mask represents the valid mask */
499 args->done = 0; /* Specify whether this is the last export */
500 args->target = target; /* Specify the target we are exporting */
501 args->compr = false;
502
503 memcpy(&args->out[0], values, sizeof(values[0]) * 4);
504 }
505
506 static void si_llvm_emit_clipvertex(struct si_shader_context *ctx,
507 struct ac_export_args *pos, LLVMValueRef *out_elts)
508 {
509 unsigned reg_index;
510 unsigned chan;
511 unsigned const_chan;
512 LLVMValueRef base_elt;
513 LLVMValueRef ptr = ac_get_arg(&ctx->ac, ctx->rw_buffers);
514 LLVMValueRef constbuf_index = LLVMConstInt(ctx->i32,
515 SI_VS_CONST_CLIP_PLANES, 0);
516 LLVMValueRef const_resource = ac_build_load_to_sgpr(&ctx->ac, ptr, constbuf_index);
517
518 for (reg_index = 0; reg_index < 2; reg_index ++) {
519 struct ac_export_args *args = &pos[2 + reg_index];
520
521 args->out[0] =
522 args->out[1] =
523 args->out[2] =
524 args->out[3] = LLVMConstReal(ctx->f32, 0.0f);
525
526 /* Compute dot products of position and user clip plane vectors */
527 for (chan = 0; chan < 4; chan++) {
528 for (const_chan = 0; const_chan < 4; const_chan++) {
529 LLVMValueRef addr =
530 LLVMConstInt(ctx->i32, ((reg_index * 4 + chan) * 4 +
531 const_chan) * 4, 0);
532 base_elt = si_buffer_load_const(ctx, const_resource,
533 addr);
534 args->out[chan] = ac_build_fmad(&ctx->ac, base_elt,
535 out_elts[const_chan], args->out[chan]);
536 }
537 }
538
539 args->enabled_channels = 0xf;
540 args->valid_mask = 0;
541 args->done = 0;
542 args->target = V_008DFC_SQ_EXP_POS + 2 + reg_index;
543 args->compr = 0;
544 }
545 }
546
547 static void si_dump_streamout(struct pipe_stream_output_info *so)
548 {
549 unsigned i;
550
551 if (so->num_outputs)
552 fprintf(stderr, "STREAMOUT\n");
553
554 for (i = 0; i < so->num_outputs; i++) {
555 unsigned mask = ((1 << so->output[i].num_components) - 1) <<
556 so->output[i].start_component;
557 fprintf(stderr, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
558 i, so->output[i].output_buffer,
559 so->output[i].dst_offset, so->output[i].dst_offset + so->output[i].num_components - 1,
560 so->output[i].register_index,
561 mask & 1 ? "x" : "",
562 mask & 2 ? "y" : "",
563 mask & 4 ? "z" : "",
564 mask & 8 ? "w" : "");
565 }
566 }
567
568 void si_emit_streamout_output(struct si_shader_context *ctx,
569 LLVMValueRef const *so_buffers,
570 LLVMValueRef const *so_write_offsets,
571 struct pipe_stream_output *stream_out,
572 struct si_shader_output_values *shader_out)
573 {
574 unsigned buf_idx = stream_out->output_buffer;
575 unsigned start = stream_out->start_component;
576 unsigned num_comps = stream_out->num_components;
577 LLVMValueRef out[4];
578
579 assert(num_comps && num_comps <= 4);
580 if (!num_comps || num_comps > 4)
581 return;
582
583 /* Load the output as int. */
584 for (int j = 0; j < num_comps; j++) {
585 assert(stream_out->stream == shader_out->vertex_stream[start + j]);
586
587 out[j] = ac_to_integer(&ctx->ac, shader_out->values[start + j]);
588 }
589
590 /* Pack the output. */
591 LLVMValueRef vdata = NULL;
592
593 switch (num_comps) {
594 case 1: /* as i32 */
595 vdata = out[0];
596 break;
597 case 2: /* as v2i32 */
598 case 3: /* as v3i32 */
599 if (ac_has_vec3_support(ctx->screen->info.chip_class, false)) {
600 vdata = ac_build_gather_values(&ctx->ac, out, num_comps);
601 break;
602 }
603 /* as v4i32 (aligned to 4) */
604 out[3] = LLVMGetUndef(ctx->i32);
605 /* fall through */
606 case 4: /* as v4i32 */
607 vdata = ac_build_gather_values(&ctx->ac, out, util_next_power_of_two(num_comps));
608 break;
609 }
610
611 ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf_idx],
612 vdata, num_comps,
613 so_write_offsets[buf_idx],
614 ctx->i32_0,
615 stream_out->dst_offset * 4, ac_glc | ac_slc);
616 }
617
618 /**
619 * Write streamout data to buffers for vertex stream @p stream (different
620 * vertex streams can occur for GS copy shaders).
621 */
622 void si_llvm_emit_streamout(struct si_shader_context *ctx,
623 struct si_shader_output_values *outputs,
624 unsigned noutput, unsigned stream)
625 {
626 struct si_shader_selector *sel = ctx->shader->selector;
627 struct pipe_stream_output_info *so = &sel->so;
628 LLVMBuilderRef builder = ctx->ac.builder;
629 int i;
630
631 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
632 LLVMValueRef so_vtx_count =
633 si_unpack_param(ctx, ctx->streamout_config, 16, 7);
634
635 LLVMValueRef tid = ac_get_thread_id(&ctx->ac);
636
637 /* can_emit = tid < so_vtx_count; */
638 LLVMValueRef can_emit =
639 LLVMBuildICmp(builder, LLVMIntULT, tid, so_vtx_count, "");
640
641 /* Emit the streamout code conditionally. This actually avoids
642 * out-of-bounds buffer access. The hw tells us via the SGPR
643 * (so_vtx_count) which threads are allowed to emit streamout data. */
644 ac_build_ifcc(&ctx->ac, can_emit, 6501);
645 {
646 /* The buffer offset is computed as follows:
647 * ByteOffset = streamout_offset[buffer_id]*4 +
648 * (streamout_write_index + thread_id)*stride[buffer_id] +
649 * attrib_offset
650 */
651
652 LLVMValueRef so_write_index =
653 ac_get_arg(&ctx->ac,
654 ctx->streamout_write_index);
655
656 /* Compute (streamout_write_index + thread_id). */
657 so_write_index = LLVMBuildAdd(builder, so_write_index, tid, "");
658
659 /* Load the descriptor and compute the write offset for each
660 * enabled buffer. */
661 LLVMValueRef so_write_offset[4] = {};
662 LLVMValueRef so_buffers[4];
663 LLVMValueRef buf_ptr = ac_get_arg(&ctx->ac,
664 ctx->rw_buffers);
665
666 for (i = 0; i < 4; i++) {
667 if (!so->stride[i])
668 continue;
669
670 LLVMValueRef offset = LLVMConstInt(ctx->i32,
671 SI_VS_STREAMOUT_BUF0 + i, 0);
672
673 so_buffers[i] = ac_build_load_to_sgpr(&ctx->ac, buf_ptr, offset);
674
675 LLVMValueRef so_offset = ac_get_arg(&ctx->ac,
676 ctx->streamout_offset[i]);
677 so_offset = LLVMBuildMul(builder, so_offset, LLVMConstInt(ctx->i32, 4, 0), "");
678
679 so_write_offset[i] = ac_build_imad(&ctx->ac, so_write_index,
680 LLVMConstInt(ctx->i32, so->stride[i]*4, 0),
681 so_offset);
682 }
683
684 /* Write streamout data. */
685 for (i = 0; i < so->num_outputs; i++) {
686 unsigned reg = so->output[i].register_index;
687
688 if (reg >= noutput)
689 continue;
690
691 if (stream != so->output[i].stream)
692 continue;
693
694 si_emit_streamout_output(ctx, so_buffers, so_write_offset,
695 &so->output[i], &outputs[reg]);
696 }
697 }
698 ac_build_endif(&ctx->ac, 6501);
699 }
700
701 static void si_export_param(struct si_shader_context *ctx, unsigned index,
702 LLVMValueRef *values)
703 {
704 struct ac_export_args args;
705
706 si_llvm_init_vs_export_args(ctx, values,
707 V_008DFC_SQ_EXP_PARAM + index, &args);
708 ac_build_export(&ctx->ac, &args);
709 }
710
711 static void si_build_param_exports(struct si_shader_context *ctx,
712 struct si_shader_output_values *outputs,
713 unsigned noutput)
714 {
715 struct si_shader *shader = ctx->shader;
716 unsigned param_count = 0;
717
718 for (unsigned i = 0; i < noutput; i++) {
719 unsigned semantic_name = outputs[i].semantic_name;
720 unsigned semantic_index = outputs[i].semantic_index;
721
722 if (outputs[i].vertex_stream[0] != 0 &&
723 outputs[i].vertex_stream[1] != 0 &&
724 outputs[i].vertex_stream[2] != 0 &&
725 outputs[i].vertex_stream[3] != 0)
726 continue;
727
728 switch (semantic_name) {
729 case TGSI_SEMANTIC_LAYER:
730 case TGSI_SEMANTIC_VIEWPORT_INDEX:
731 case TGSI_SEMANTIC_CLIPDIST:
732 case TGSI_SEMANTIC_COLOR:
733 case TGSI_SEMANTIC_BCOLOR:
734 case TGSI_SEMANTIC_PRIMID:
735 case TGSI_SEMANTIC_FOG:
736 case TGSI_SEMANTIC_TEXCOORD:
737 case TGSI_SEMANTIC_GENERIC:
738 break;
739 default:
740 continue;
741 }
742
743 if ((semantic_name != TGSI_SEMANTIC_GENERIC ||
744 semantic_index < SI_MAX_IO_GENERIC) &&
745 shader->key.opt.kill_outputs &
746 (1ull << si_shader_io_get_unique_index(semantic_name,
747 semantic_index, true)))
748 continue;
749
750 si_export_param(ctx, param_count, outputs[i].values);
751
752 assert(i < ARRAY_SIZE(shader->info.vs_output_param_offset));
753 shader->info.vs_output_param_offset[i] = param_count++;
754 }
755
756 shader->info.nr_param_exports = param_count;
757 }
758
759 /**
760 * Vertex color clamping.
761 *
762 * This uses a state constant loaded in a user data SGPR and
763 * an IF statement is added that clamps all colors if the constant
764 * is true.
765 */
766 static void si_vertex_color_clamping(struct si_shader_context *ctx,
767 struct si_shader_output_values *outputs,
768 unsigned noutput)
769 {
770 LLVMValueRef addr[SI_MAX_VS_OUTPUTS][4];
771 bool has_colors = false;
772
773 /* Store original colors to alloca variables. */
774 for (unsigned i = 0; i < noutput; i++) {
775 if (outputs[i].semantic_name != TGSI_SEMANTIC_COLOR &&
776 outputs[i].semantic_name != TGSI_SEMANTIC_BCOLOR)
777 continue;
778
779 for (unsigned j = 0; j < 4; j++) {
780 addr[i][j] = ac_build_alloca_undef(&ctx->ac, ctx->f32, "");
781 LLVMBuildStore(ctx->ac.builder, outputs[i].values[j], addr[i][j]);
782 }
783 has_colors = true;
784 }
785
786 if (!has_colors)
787 return;
788
789 /* The state is in the first bit of the user SGPR. */
790 LLVMValueRef cond = ac_get_arg(&ctx->ac, ctx->vs_state_bits);
791 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->i1, "");
792
793 ac_build_ifcc(&ctx->ac, cond, 6502);
794
795 /* Store clamped colors to alloca variables within the conditional block. */
796 for (unsigned i = 0; i < noutput; i++) {
797 if (outputs[i].semantic_name != TGSI_SEMANTIC_COLOR &&
798 outputs[i].semantic_name != TGSI_SEMANTIC_BCOLOR)
799 continue;
800
801 for (unsigned j = 0; j < 4; j++) {
802 LLVMBuildStore(ctx->ac.builder,
803 ac_build_clamp(&ctx->ac, outputs[i].values[j]),
804 addr[i][j]);
805 }
806 }
807 ac_build_endif(&ctx->ac, 6502);
808
809 /* Load clamped colors */
810 for (unsigned i = 0; i < noutput; i++) {
811 if (outputs[i].semantic_name != TGSI_SEMANTIC_COLOR &&
812 outputs[i].semantic_name != TGSI_SEMANTIC_BCOLOR)
813 continue;
814
815 for (unsigned j = 0; j < 4; j++) {
816 outputs[i].values[j] =
817 LLVMBuildLoad(ctx->ac.builder, addr[i][j], "");
818 }
819 }
820 }
821
822 /* Generate export instructions for hardware VS shader stage or NGG GS stage
823 * (position and parameter data only).
824 */
825 void si_llvm_export_vs(struct si_shader_context *ctx,
826 struct si_shader_output_values *outputs,
827 unsigned noutput)
828 {
829 struct si_shader *shader = ctx->shader;
830 struct ac_export_args pos_args[4] = {};
831 LLVMValueRef psize_value = NULL, edgeflag_value = NULL, layer_value = NULL, viewport_index_value = NULL;
832 unsigned pos_idx;
833 int i;
834
835 si_vertex_color_clamping(ctx, outputs, noutput);
836
837 /* Build position exports. */
838 for (i = 0; i < noutput; i++) {
839 switch (outputs[i].semantic_name) {
840 case TGSI_SEMANTIC_POSITION:
841 si_llvm_init_vs_export_args(ctx, outputs[i].values,
842 V_008DFC_SQ_EXP_POS, &pos_args[0]);
843 break;
844 case TGSI_SEMANTIC_PSIZE:
845 psize_value = outputs[i].values[0];
846 break;
847 case TGSI_SEMANTIC_LAYER:
848 layer_value = outputs[i].values[0];
849 break;
850 case TGSI_SEMANTIC_VIEWPORT_INDEX:
851 viewport_index_value = outputs[i].values[0];
852 break;
853 case TGSI_SEMANTIC_EDGEFLAG:
854 edgeflag_value = outputs[i].values[0];
855 break;
856 case TGSI_SEMANTIC_CLIPDIST:
857 if (!shader->key.opt.clip_disable) {
858 unsigned index = 2 + outputs[i].semantic_index;
859 si_llvm_init_vs_export_args(ctx, outputs[i].values,
860 V_008DFC_SQ_EXP_POS + index,
861 &pos_args[index]);
862 }
863 break;
864 case TGSI_SEMANTIC_CLIPVERTEX:
865 if (!shader->key.opt.clip_disable) {
866 si_llvm_emit_clipvertex(ctx, pos_args,
867 outputs[i].values);
868 }
869 break;
870 }
871 }
872
873 /* We need to add the position output manually if it's missing. */
874 if (!pos_args[0].out[0]) {
875 pos_args[0].enabled_channels = 0xf; /* writemask */
876 pos_args[0].valid_mask = 0; /* EXEC mask */
877 pos_args[0].done = 0; /* last export? */
878 pos_args[0].target = V_008DFC_SQ_EXP_POS;
879 pos_args[0].compr = 0; /* COMPR flag */
880 pos_args[0].out[0] = ctx->ac.f32_0; /* X */
881 pos_args[0].out[1] = ctx->ac.f32_0; /* Y */
882 pos_args[0].out[2] = ctx->ac.f32_0; /* Z */
883 pos_args[0].out[3] = ctx->ac.f32_1; /* W */
884 }
885
886 bool pos_writes_edgeflag = shader->selector->info.writes_edgeflag &&
887 !shader->key.as_ngg;
888
889 /* Write the misc vector (point size, edgeflag, layer, viewport). */
890 if (shader->selector->info.writes_psize ||
891 pos_writes_edgeflag ||
892 shader->selector->info.writes_viewport_index ||
893 shader->selector->info.writes_layer) {
894 pos_args[1].enabled_channels = shader->selector->info.writes_psize |
895 (pos_writes_edgeflag << 1) |
896 (shader->selector->info.writes_layer << 2);
897
898 pos_args[1].valid_mask = 0; /* EXEC mask */
899 pos_args[1].done = 0; /* last export? */
900 pos_args[1].target = V_008DFC_SQ_EXP_POS + 1;
901 pos_args[1].compr = 0; /* COMPR flag */
902 pos_args[1].out[0] = ctx->ac.f32_0; /* X */
903 pos_args[1].out[1] = ctx->ac.f32_0; /* Y */
904 pos_args[1].out[2] = ctx->ac.f32_0; /* Z */
905 pos_args[1].out[3] = ctx->ac.f32_0; /* W */
906
907 if (shader->selector->info.writes_psize)
908 pos_args[1].out[0] = psize_value;
909
910 if (pos_writes_edgeflag) {
911 /* The output is a float, but the hw expects an integer
912 * with the first bit containing the edge flag. */
913 edgeflag_value = LLVMBuildFPToUI(ctx->ac.builder,
914 edgeflag_value,
915 ctx->i32, "");
916 edgeflag_value = ac_build_umin(&ctx->ac,
917 edgeflag_value,
918 ctx->i32_1);
919
920 /* The LLVM intrinsic expects a float. */
921 pos_args[1].out[1] = ac_to_float(&ctx->ac, edgeflag_value);
922 }
923
924 if (ctx->screen->info.chip_class >= GFX9) {
925 /* GFX9 has the layer in out.z[10:0] and the viewport
926 * index in out.z[19:16].
927 */
928 if (shader->selector->info.writes_layer)
929 pos_args[1].out[2] = layer_value;
930
931 if (shader->selector->info.writes_viewport_index) {
932 LLVMValueRef v = viewport_index_value;
933
934 v = ac_to_integer(&ctx->ac, v);
935 v = LLVMBuildShl(ctx->ac.builder, v,
936 LLVMConstInt(ctx->i32, 16, 0), "");
937 v = LLVMBuildOr(ctx->ac.builder, v,
938 ac_to_integer(&ctx->ac, pos_args[1].out[2]), "");
939 pos_args[1].out[2] = ac_to_float(&ctx->ac, v);
940 pos_args[1].enabled_channels |= 1 << 2;
941 }
942 } else {
943 if (shader->selector->info.writes_layer)
944 pos_args[1].out[2] = layer_value;
945
946 if (shader->selector->info.writes_viewport_index) {
947 pos_args[1].out[3] = viewport_index_value;
948 pos_args[1].enabled_channels |= 1 << 3;
949 }
950 }
951 }
952
953 for (i = 0; i < 4; i++)
954 if (pos_args[i].out[0])
955 shader->info.nr_pos_exports++;
956
957 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
958 * Setting valid_mask=1 prevents it and has no other effect.
959 */
960 if (ctx->screen->info.family == CHIP_NAVI10 ||
961 ctx->screen->info.family == CHIP_NAVI12 ||
962 ctx->screen->info.family == CHIP_NAVI14)
963 pos_args[0].valid_mask = 1;
964
965 pos_idx = 0;
966 for (i = 0; i < 4; i++) {
967 if (!pos_args[i].out[0])
968 continue;
969
970 /* Specify the target we are exporting */
971 pos_args[i].target = V_008DFC_SQ_EXP_POS + pos_idx++;
972
973 if (pos_idx == shader->info.nr_pos_exports)
974 /* Specify that this is the last export */
975 pos_args[i].done = 1;
976
977 ac_build_export(&ctx->ac, &pos_args[i]);
978 }
979
980 /* Build parameter exports. */
981 si_build_param_exports(ctx, outputs, noutput);
982 }
983
984 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi *abi,
985 unsigned max_outputs,
986 LLVMValueRef *addrs)
987 {
988 struct si_shader_context *ctx = si_shader_context_from_abi(abi);
989 struct si_shader_info *info = &ctx->shader->selector->info;
990 struct si_shader_output_values *outputs = NULL;
991 int i,j;
992
993 assert(!ctx->shader->is_gs_copy_shader);
994 assert(info->num_outputs <= max_outputs);
995
996 outputs = MALLOC((info->num_outputs + 1) * sizeof(outputs[0]));
997
998 for (i = 0; i < info->num_outputs; i++) {
999 outputs[i].semantic_name = info->output_semantic_name[i];
1000 outputs[i].semantic_index = info->output_semantic_index[i];
1001
1002 for (j = 0; j < 4; j++) {
1003 outputs[i].values[j] =
1004 LLVMBuildLoad(ctx->ac.builder,
1005 addrs[4 * i + j],
1006 "");
1007 outputs[i].vertex_stream[j] =
1008 (info->output_streams[i] >> (2 * j)) & 3;
1009 }
1010 }
1011
1012 if (!ctx->screen->use_ngg_streamout &&
1013 ctx->shader->selector->so.num_outputs)
1014 si_llvm_emit_streamout(ctx, outputs, i, 0);
1015
1016 /* Export PrimitiveID. */
1017 if (ctx->shader->key.mono.u.vs_export_prim_id) {
1018 outputs[i].semantic_name = TGSI_SEMANTIC_PRIMID;
1019 outputs[i].semantic_index = 0;
1020 outputs[i].values[0] = ac_to_float(&ctx->ac, si_get_primitive_id(ctx, 0));
1021 for (j = 1; j < 4; j++)
1022 outputs[i].values[j] = LLVMConstReal(ctx->f32, 0);
1023
1024 memset(outputs[i].vertex_stream, 0,
1025 sizeof(outputs[i].vertex_stream));
1026 i++;
1027 }
1028
1029 si_llvm_export_vs(ctx, outputs, i);
1030 FREE(outputs);
1031 }
1032
1033 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi *abi,
1034 unsigned max_outputs,
1035 LLVMValueRef *addrs)
1036 {
1037 struct si_shader_context *ctx = si_shader_context_from_abi(abi);
1038 struct si_shader_info *info = &ctx->shader->selector->info;
1039 LLVMValueRef pos[4] = {};
1040
1041 assert(info->num_outputs <= max_outputs);
1042
1043 for (unsigned i = 0; i < info->num_outputs; i++) {
1044 if (info->output_semantic_name[i] != TGSI_SEMANTIC_POSITION)
1045 continue;
1046
1047 for (unsigned chan = 0; chan < 4; chan++)
1048 pos[chan] = LLVMBuildLoad(ctx->ac.builder, addrs[4 * i + chan], "");
1049 break;
1050 }
1051 assert(pos[0] != NULL);
1052
1053 /* Return the position output. */
1054 LLVMValueRef ret = ctx->return_value;
1055 for (unsigned chan = 0; chan < 4; chan++)
1056 ret = LLVMBuildInsertValue(ctx->ac.builder, ret, pos[chan], chan, "");
1057 ctx->return_value = ret;
1058 }
1059
1060 static void declare_streamout_params(struct si_shader_context *ctx,
1061 struct pipe_stream_output_info *so)
1062 {
1063 if (ctx->screen->use_ngg_streamout) {
1064 if (ctx->type == PIPE_SHADER_TESS_EVAL)
1065 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
1066 return;
1067 }
1068
1069 /* Streamout SGPRs. */
1070 if (so->num_outputs) {
1071 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->streamout_config);
1072 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->streamout_write_index);
1073 } else if (ctx->type == PIPE_SHADER_TESS_EVAL) {
1074 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
1075 }
1076
1077 /* A streamout buffer offset is loaded if the stride is non-zero. */
1078 for (int i = 0; i < 4; i++) {
1079 if (!so->stride[i])
1080 continue;
1081
1082 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->streamout_offset[i]);
1083 }
1084 }
1085
1086 static unsigned si_get_max_workgroup_size(const struct si_shader *shader)
1087 {
1088 switch (shader->selector->type) {
1089 case PIPE_SHADER_VERTEX:
1090 case PIPE_SHADER_TESS_EVAL:
1091 return shader->key.as_ngg ? 128 : 0;
1092
1093 case PIPE_SHADER_TESS_CTRL:
1094 /* Return this so that LLVM doesn't remove s_barrier
1095 * instructions on chips where we use s_barrier. */
1096 return shader->selector->screen->info.chip_class >= GFX7 ? 128 : 0;
1097
1098 case PIPE_SHADER_GEOMETRY:
1099 return shader->selector->screen->info.chip_class >= GFX9 ? 128 : 0;
1100
1101 case PIPE_SHADER_COMPUTE:
1102 break; /* see below */
1103
1104 default:
1105 return 0;
1106 }
1107
1108 const unsigned *properties = shader->selector->info.properties;
1109 unsigned max_work_group_size =
1110 properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] *
1111 properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] *
1112 properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH];
1113
1114 if (!max_work_group_size) {
1115 /* This is a variable group size compute shader,
1116 * compile it for the maximum possible group size.
1117 */
1118 max_work_group_size = SI_MAX_VARIABLE_THREADS_PER_BLOCK;
1119 }
1120 return max_work_group_size;
1121 }
1122
1123 static void declare_const_and_shader_buffers(struct si_shader_context *ctx,
1124 bool assign_params)
1125 {
1126 enum ac_arg_type const_shader_buf_type;
1127
1128 if (ctx->shader->selector->info.const_buffers_declared == 1 &&
1129 ctx->shader->selector->info.shader_buffers_declared == 0)
1130 const_shader_buf_type = AC_ARG_CONST_FLOAT_PTR;
1131 else
1132 const_shader_buf_type = AC_ARG_CONST_DESC_PTR;
1133
1134 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, const_shader_buf_type,
1135 assign_params ? &ctx->const_and_shader_buffers :
1136 &ctx->other_const_and_shader_buffers);
1137 }
1138
1139 static void declare_samplers_and_images(struct si_shader_context *ctx,
1140 bool assign_params)
1141 {
1142 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_IMAGE_PTR,
1143 assign_params ? &ctx->samplers_and_images :
1144 &ctx->other_samplers_and_images);
1145 }
1146
1147 static void declare_per_stage_desc_pointers(struct si_shader_context *ctx,
1148 bool assign_params)
1149 {
1150 declare_const_and_shader_buffers(ctx, assign_params);
1151 declare_samplers_and_images(ctx, assign_params);
1152 }
1153
1154 static void declare_global_desc_pointers(struct si_shader_context *ctx)
1155 {
1156 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR,
1157 &ctx->rw_buffers);
1158 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_IMAGE_PTR,
1159 &ctx->bindless_samplers_and_images);
1160 }
1161
1162 static void declare_vs_specific_input_sgprs(struct si_shader_context *ctx)
1163 {
1164 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
1165 if (!ctx->shader->is_gs_copy_shader) {
1166 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->args.base_vertex);
1167 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->args.start_instance);
1168 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->args.draw_id);
1169 }
1170 }
1171
1172 static void declare_vb_descriptor_input_sgprs(struct si_shader_context *ctx)
1173 {
1174 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR, &ctx->vertex_buffers);
1175
1176 unsigned num_vbos_in_user_sgprs = ctx->shader->selector->num_vbos_in_user_sgprs;
1177 if (num_vbos_in_user_sgprs) {
1178 unsigned user_sgprs = ctx->args.num_sgprs_used;
1179
1180 if (si_is_merged_shader(ctx))
1181 user_sgprs -= 8;
1182 assert(user_sgprs <= SI_SGPR_VS_VB_DESCRIPTOR_FIRST);
1183
1184 /* Declare unused SGPRs to align VB descriptors to 4 SGPRs (hw requirement). */
1185 for (unsigned i = user_sgprs; i < SI_SGPR_VS_VB_DESCRIPTOR_FIRST; i++)
1186 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* unused */
1187
1188 assert(num_vbos_in_user_sgprs <= ARRAY_SIZE(ctx->vb_descriptors));
1189 for (unsigned i = 0; i < num_vbos_in_user_sgprs; i++)
1190 ac_add_arg(&ctx->args, AC_ARG_SGPR, 4, AC_ARG_INT, &ctx->vb_descriptors[i]);
1191 }
1192 }
1193
1194 static void declare_vs_input_vgprs(struct si_shader_context *ctx,
1195 unsigned *num_prolog_vgprs,
1196 bool ngg_cull_shader)
1197 {
1198 struct si_shader *shader = ctx->shader;
1199
1200 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.vertex_id);
1201 if (shader->key.as_ls) {
1202 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->rel_auto_id);
1203 if (ctx->screen->info.chip_class >= GFX10) {
1204 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user VGPR */
1205 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.instance_id);
1206 } else {
1207 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.instance_id);
1208 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */
1209 }
1210 } else if (ctx->screen->info.chip_class >= GFX10) {
1211 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user VGPR */
1212 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
1213 &ctx->vs_prim_id); /* user vgpr or PrimID (legacy) */
1214 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.instance_id);
1215 } else {
1216 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.instance_id);
1217 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->vs_prim_id);
1218 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */
1219 }
1220
1221 if (!shader->is_gs_copy_shader) {
1222 if (shader->key.opt.ngg_culling && !ngg_cull_shader) {
1223 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
1224 &ctx->ngg_old_thread_id);
1225 }
1226
1227 /* Vertex load indices. */
1228 if (shader->selector->info.num_inputs) {
1229 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
1230 &ctx->vertex_index0);
1231 for (unsigned i = 1; i < shader->selector->info.num_inputs; i++)
1232 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, NULL);
1233 }
1234 *num_prolog_vgprs += shader->selector->info.num_inputs;
1235 }
1236 }
1237
1238 static void declare_vs_blit_inputs(struct si_shader_context *ctx,
1239 unsigned vs_blit_property)
1240 {
1241 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
1242 &ctx->vs_blit_inputs); /* i16 x1, y1 */
1243 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* i16 x1, y1 */
1244 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* depth */
1245
1246 if (vs_blit_property == SI_VS_BLIT_SGPRS_POS_COLOR) {
1247 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* color0 */
1248 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* color1 */
1249 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* color2 */
1250 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* color3 */
1251 } else if (vs_blit_property == SI_VS_BLIT_SGPRS_POS_TEXCOORD) {
1252 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* texcoord.x1 */
1253 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* texcoord.y1 */
1254 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* texcoord.x2 */
1255 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* texcoord.y2 */
1256 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* texcoord.z */
1257 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_FLOAT, NULL); /* texcoord.w */
1258 }
1259 }
1260
1261 static void declare_tes_input_vgprs(struct si_shader_context *ctx, bool ngg_cull_shader)
1262 {
1263 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &ctx->tes_u);
1264 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &ctx->tes_v);
1265 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->tes_rel_patch_id);
1266 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tes_patch_id);
1267
1268 if (ctx->shader->key.opt.ngg_culling && !ngg_cull_shader) {
1269 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
1270 &ctx->ngg_old_thread_id);
1271 }
1272 }
1273
1274 enum {
1275 /* Convenient merged shader definitions. */
1276 SI_SHADER_MERGED_VERTEX_TESSCTRL = PIPE_SHADER_TYPES,
1277 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY,
1278 };
1279
1280 void si_add_arg_checked(struct ac_shader_args *args,
1281 enum ac_arg_regfile file,
1282 unsigned registers, enum ac_arg_type type,
1283 struct ac_arg *arg,
1284 unsigned idx)
1285 {
1286 assert(args->arg_count == idx);
1287 ac_add_arg(args, file, registers, type, arg);
1288 }
1289
1290 void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader)
1291 {
1292 struct si_shader *shader = ctx->shader;
1293 LLVMTypeRef returns[AC_MAX_ARGS];
1294 unsigned i, num_return_sgprs;
1295 unsigned num_returns = 0;
1296 unsigned num_prolog_vgprs = 0;
1297 unsigned type = ctx->type;
1298 unsigned vs_blit_property =
1299 shader->selector->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
1300
1301 memset(&ctx->args, 0, sizeof(ctx->args));
1302
1303 /* Set MERGED shaders. */
1304 if (ctx->screen->info.chip_class >= GFX9) {
1305 if (shader->key.as_ls || type == PIPE_SHADER_TESS_CTRL)
1306 type = SI_SHADER_MERGED_VERTEX_TESSCTRL; /* LS or HS */
1307 else if (shader->key.as_es || shader->key.as_ngg || type == PIPE_SHADER_GEOMETRY)
1308 type = SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY;
1309 }
1310
1311 switch (type) {
1312 case PIPE_SHADER_VERTEX:
1313 declare_global_desc_pointers(ctx);
1314
1315 if (vs_blit_property) {
1316 declare_vs_blit_inputs(ctx, vs_blit_property);
1317
1318 /* VGPRs */
1319 declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader);
1320 break;
1321 }
1322
1323 declare_per_stage_desc_pointers(ctx, true);
1324 declare_vs_specific_input_sgprs(ctx);
1325 if (!shader->is_gs_copy_shader)
1326 declare_vb_descriptor_input_sgprs(ctx);
1327
1328 if (shader->key.as_es) {
1329 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
1330 &ctx->es2gs_offset);
1331 } else if (shader->key.as_ls) {
1332 /* no extra parameters */
1333 } else {
1334 /* The locations of the other parameters are assigned dynamically. */
1335 declare_streamout_params(ctx, &shader->selector->so);
1336 }
1337
1338 /* VGPRs */
1339 declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader);
1340
1341 /* Return values */
1342 if (shader->key.opt.vs_as_prim_discard_cs) {
1343 for (i = 0; i < 4; i++)
1344 returns[num_returns++] = ctx->f32; /* VGPRs */
1345 }
1346 break;
1347
1348 case PIPE_SHADER_TESS_CTRL: /* GFX6-GFX8 */
1349 declare_global_desc_pointers(ctx);
1350 declare_per_stage_desc_pointers(ctx, true);
1351 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout);
1352 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_out_lds_offsets);
1353 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_out_lds_layout);
1354 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
1355 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_offset);
1356 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_factor_offset);
1357
1358 /* VGPRs */
1359 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_patch_id);
1360 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_rel_ids);
1361
1362 /* param_tcs_offchip_offset and param_tcs_factor_offset are
1363 * placed after the user SGPRs.
1364 */
1365 for (i = 0; i < GFX6_TCS_NUM_USER_SGPR + 2; i++)
1366 returns[num_returns++] = ctx->i32; /* SGPRs */
1367 for (i = 0; i < 11; i++)
1368 returns[num_returns++] = ctx->f32; /* VGPRs */
1369 break;
1370
1371 case SI_SHADER_MERGED_VERTEX_TESSCTRL:
1372 /* Merged stages have 8 system SGPRs at the beginning. */
1373 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
1374 declare_per_stage_desc_pointers(ctx,
1375 ctx->type == PIPE_SHADER_TESS_CTRL);
1376 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_offset);
1377 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->merged_wave_info);
1378 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_factor_offset);
1379 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->merged_scratch_offset);
1380 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* unused */
1381 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* unused */
1382
1383 declare_global_desc_pointers(ctx);
1384 declare_per_stage_desc_pointers(ctx,
1385 ctx->type == PIPE_SHADER_VERTEX);
1386 declare_vs_specific_input_sgprs(ctx);
1387
1388 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout);
1389 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_out_lds_offsets);
1390 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_out_lds_layout);
1391 declare_vb_descriptor_input_sgprs(ctx);
1392
1393 /* VGPRs (first TCS, then VS) */
1394 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_patch_id);
1395 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_rel_ids);
1396
1397 if (ctx->type == PIPE_SHADER_VERTEX) {
1398 declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader);
1399
1400 /* LS return values are inputs to the TCS main shader part. */
1401 for (i = 0; i < 8 + GFX9_TCS_NUM_USER_SGPR; i++)
1402 returns[num_returns++] = ctx->i32; /* SGPRs */
1403 for (i = 0; i < 2; i++)
1404 returns[num_returns++] = ctx->f32; /* VGPRs */
1405 } else {
1406 /* TCS return values are inputs to the TCS epilog.
1407 *
1408 * param_tcs_offchip_offset, param_tcs_factor_offset,
1409 * param_tcs_offchip_layout, and param_rw_buffers
1410 * should be passed to the epilog.
1411 */
1412 for (i = 0; i <= 8 + GFX9_SGPR_TCS_OUT_LAYOUT; i++)
1413 returns[num_returns++] = ctx->i32; /* SGPRs */
1414 for (i = 0; i < 11; i++)
1415 returns[num_returns++] = ctx->f32; /* VGPRs */
1416 }
1417 break;
1418
1419 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY:
1420 /* Merged stages have 8 system SGPRs at the beginning. */
1421 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
1422 declare_per_stage_desc_pointers(ctx,
1423 ctx->type == PIPE_SHADER_GEOMETRY);
1424
1425 if (ctx->shader->key.as_ngg)
1426 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs_tg_info);
1427 else
1428 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs2vs_offset);
1429
1430 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->merged_wave_info);
1431 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_offset);
1432 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->merged_scratch_offset);
1433 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR,
1434 &ctx->small_prim_cull_info); /* SPI_SHADER_PGM_LO_GS << 8 */
1435 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
1436
1437 declare_global_desc_pointers(ctx);
1438 if (ctx->type != PIPE_SHADER_VERTEX || !vs_blit_property) {
1439 declare_per_stage_desc_pointers(ctx,
1440 (ctx->type == PIPE_SHADER_VERTEX ||
1441 ctx->type == PIPE_SHADER_TESS_EVAL));
1442 }
1443
1444 if (ctx->type == PIPE_SHADER_VERTEX) {
1445 if (vs_blit_property)
1446 declare_vs_blit_inputs(ctx, vs_blit_property);
1447 else
1448 declare_vs_specific_input_sgprs(ctx);
1449 } else {
1450 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
1451 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout);
1452 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tes_offchip_addr);
1453 /* Declare as many input SGPRs as the VS has. */
1454 }
1455
1456 if (ctx->type == PIPE_SHADER_VERTEX)
1457 declare_vb_descriptor_input_sgprs(ctx);
1458
1459 /* VGPRs (first GS, then VS/TES) */
1460 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx01_offset);
1461 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx23_offset);
1462 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_prim_id);
1463 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_invocation_id);
1464 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx45_offset);
1465
1466 if (ctx->type == PIPE_SHADER_VERTEX) {
1467 declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader);
1468 } else if (ctx->type == PIPE_SHADER_TESS_EVAL) {
1469 declare_tes_input_vgprs(ctx, ngg_cull_shader);
1470 }
1471
1472 if ((ctx->shader->key.as_es || ngg_cull_shader) &&
1473 (ctx->type == PIPE_SHADER_VERTEX ||
1474 ctx->type == PIPE_SHADER_TESS_EVAL)) {
1475 unsigned num_user_sgprs, num_vgprs;
1476
1477 /* For the NGG cull shader, add 1 SGPR to hold the vertex buffer pointer. */
1478 if (ctx->type == PIPE_SHADER_VERTEX)
1479 num_user_sgprs = GFX9_VSGS_NUM_USER_SGPR + ngg_cull_shader;
1480 else
1481 num_user_sgprs = GFX9_TESGS_NUM_USER_SGPR;
1482
1483 /* The NGG cull shader has to return all 9 VGPRs + the old thread ID.
1484 *
1485 * The normal merged ESGS shader only has to return the 5 VGPRs
1486 * for the GS stage.
1487 */
1488 num_vgprs = ngg_cull_shader ? 10 : 5;
1489
1490 /* ES return values are inputs to GS. */
1491 for (i = 0; i < 8 + num_user_sgprs; i++)
1492 returns[num_returns++] = ctx->i32; /* SGPRs */
1493 for (i = 0; i < num_vgprs; i++)
1494 returns[num_returns++] = ctx->f32; /* VGPRs */
1495 }
1496 break;
1497
1498 case PIPE_SHADER_TESS_EVAL:
1499 declare_global_desc_pointers(ctx);
1500 declare_per_stage_desc_pointers(ctx, true);
1501 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
1502 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout);
1503 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tes_offchip_addr);
1504
1505 if (shader->key.as_es) {
1506 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_offset);
1507 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
1508 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->es2gs_offset);
1509 } else {
1510 declare_streamout_params(ctx, &shader->selector->so);
1511 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_offset);
1512 }
1513
1514 /* VGPRs */
1515 declare_tes_input_vgprs(ctx, ngg_cull_shader);
1516 break;
1517
1518 case PIPE_SHADER_GEOMETRY:
1519 declare_global_desc_pointers(ctx);
1520 declare_per_stage_desc_pointers(ctx, true);
1521 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs2vs_offset);
1522 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs_wave_id);
1523
1524 /* VGPRs */
1525 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx_offset[0]);
1526 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx_offset[1]);
1527 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_prim_id);
1528 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx_offset[2]);
1529 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx_offset[3]);
1530 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx_offset[4]);
1531 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx_offset[5]);
1532 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_invocation_id);
1533 break;
1534
1535 case PIPE_SHADER_FRAGMENT:
1536 declare_global_desc_pointers(ctx);
1537 declare_per_stage_desc_pointers(ctx, true);
1538 si_add_arg_checked(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL,
1539 SI_PARAM_ALPHA_REF);
1540 si_add_arg_checked(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
1541 &ctx->args.prim_mask, SI_PARAM_PRIM_MASK);
1542
1543 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 2, AC_ARG_INT, &ctx->args.persp_sample,
1544 SI_PARAM_PERSP_SAMPLE);
1545 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 2, AC_ARG_INT,
1546 &ctx->args.persp_center, SI_PARAM_PERSP_CENTER);
1547 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 2, AC_ARG_INT,
1548 &ctx->args.persp_centroid, SI_PARAM_PERSP_CENTROID);
1549 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 3, AC_ARG_INT,
1550 NULL, SI_PARAM_PERSP_PULL_MODEL);
1551 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 2, AC_ARG_INT,
1552 &ctx->args.linear_sample, SI_PARAM_LINEAR_SAMPLE);
1553 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 2, AC_ARG_INT,
1554 &ctx->args.linear_center, SI_PARAM_LINEAR_CENTER);
1555 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 2, AC_ARG_INT,
1556 &ctx->args.linear_centroid, SI_PARAM_LINEAR_CENTROID);
1557 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 3, AC_ARG_FLOAT,
1558 NULL, SI_PARAM_LINE_STIPPLE_TEX);
1559 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT,
1560 &ctx->args.frag_pos[0], SI_PARAM_POS_X_FLOAT);
1561 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT,
1562 &ctx->args.frag_pos[1], SI_PARAM_POS_Y_FLOAT);
1563 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT,
1564 &ctx->args.frag_pos[2], SI_PARAM_POS_Z_FLOAT);
1565 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT,
1566 &ctx->args.frag_pos[3], SI_PARAM_POS_W_FLOAT);
1567 shader->info.face_vgpr_index = ctx->args.num_vgprs_used;
1568 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
1569 &ctx->args.front_face, SI_PARAM_FRONT_FACE);
1570 shader->info.ancillary_vgpr_index = ctx->args.num_vgprs_used;
1571 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
1572 &ctx->args.ancillary, SI_PARAM_ANCILLARY);
1573 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT,
1574 &ctx->args.sample_coverage, SI_PARAM_SAMPLE_COVERAGE);
1575 si_add_arg_checked(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT,
1576 &ctx->pos_fixed_pt, SI_PARAM_POS_FIXED_PT);
1577
1578 /* Color inputs from the prolog. */
1579 if (shader->selector->info.colors_read) {
1580 unsigned num_color_elements =
1581 util_bitcount(shader->selector->info.colors_read);
1582
1583 for (i = 0; i < num_color_elements; i++)
1584 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_FLOAT, NULL);
1585
1586 num_prolog_vgprs += num_color_elements;
1587 }
1588
1589 /* Outputs for the epilog. */
1590 num_return_sgprs = SI_SGPR_ALPHA_REF + 1;
1591 num_returns =
1592 num_return_sgprs +
1593 util_bitcount(shader->selector->info.colors_written) * 4 +
1594 shader->selector->info.writes_z +
1595 shader->selector->info.writes_stencil +
1596 shader->selector->info.writes_samplemask +
1597 1 /* SampleMaskIn */;
1598
1599 num_returns = MAX2(num_returns,
1600 num_return_sgprs +
1601 PS_EPILOG_SAMPLEMASK_MIN_LOC + 1);
1602
1603 for (i = 0; i < num_return_sgprs; i++)
1604 returns[i] = ctx->i32;
1605 for (; i < num_returns; i++)
1606 returns[i] = ctx->f32;
1607 break;
1608
1609 case PIPE_SHADER_COMPUTE:
1610 declare_global_desc_pointers(ctx);
1611 declare_per_stage_desc_pointers(ctx, true);
1612 if (shader->selector->info.uses_grid_size)
1613 ac_add_arg(&ctx->args, AC_ARG_SGPR, 3, AC_ARG_INT,
1614 &ctx->args.num_work_groups);
1615 if (shader->selector->info.uses_block_size &&
1616 shader->selector->info.properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)
1617 ac_add_arg(&ctx->args, AC_ARG_SGPR, 3, AC_ARG_INT, &ctx->block_size);
1618
1619 unsigned cs_user_data_dwords =
1620 shader->selector->info.properties[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD];
1621 if (cs_user_data_dwords) {
1622 ac_add_arg(&ctx->args, AC_ARG_SGPR, cs_user_data_dwords, AC_ARG_INT,
1623 &ctx->cs_user_data);
1624 }
1625
1626 /* Hardware SGPRs. */
1627 for (i = 0; i < 3; i++) {
1628 if (shader->selector->info.uses_block_id[i]) {
1629 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
1630 &ctx->args.workgroup_ids[i]);
1631 }
1632 }
1633 if (shader->selector->info.uses_subgroup_info)
1634 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->args.tg_size);
1635
1636 /* Hardware VGPRs. */
1637 ac_add_arg(&ctx->args, AC_ARG_VGPR, 3, AC_ARG_INT,
1638 &ctx->args.local_invocation_ids);
1639 break;
1640 default:
1641 assert(0 && "unimplemented shader");
1642 return;
1643 }
1644
1645 si_llvm_create_func(ctx, ngg_cull_shader ? "ngg_cull_main" : "main",
1646 returns, num_returns, si_get_max_workgroup_size(shader));
1647
1648 /* Reserve register locations for VGPR inputs the PS prolog may need. */
1649 if (ctx->type == PIPE_SHADER_FRAGMENT && !ctx->shader->is_monolithic) {
1650 ac_llvm_add_target_dep_function_attr(ctx->main_fn,
1651 "InitialPSInputAddr",
1652 S_0286D0_PERSP_SAMPLE_ENA(1) |
1653 S_0286D0_PERSP_CENTER_ENA(1) |
1654 S_0286D0_PERSP_CENTROID_ENA(1) |
1655 S_0286D0_LINEAR_SAMPLE_ENA(1) |
1656 S_0286D0_LINEAR_CENTER_ENA(1) |
1657 S_0286D0_LINEAR_CENTROID_ENA(1) |
1658 S_0286D0_FRONT_FACE_ENA(1) |
1659 S_0286D0_ANCILLARY_ENA(1) |
1660 S_0286D0_POS_FIXED_PT_ENA(1));
1661 }
1662
1663 shader->info.num_input_sgprs = ctx->args.num_sgprs_used;
1664 shader->info.num_input_vgprs = ctx->args.num_vgprs_used;
1665
1666 assert(shader->info.num_input_vgprs >= num_prolog_vgprs);
1667 shader->info.num_input_vgprs -= num_prolog_vgprs;
1668
1669 if (shader->key.as_ls || ctx->type == PIPE_SHADER_TESS_CTRL) {
1670 if (USE_LDS_SYMBOLS && LLVM_VERSION_MAJOR >= 9) {
1671 /* The LSHS size is not known until draw time, so we append it
1672 * at the end of whatever LDS use there may be in the rest of
1673 * the shader (currently none, unless LLVM decides to do its
1674 * own LDS-based lowering).
1675 */
1676 ctx->ac.lds = LLVMAddGlobalInAddressSpace(
1677 ctx->ac.module, LLVMArrayType(ctx->i32, 0),
1678 "__lds_end", AC_ADDR_SPACE_LDS);
1679 LLVMSetAlignment(ctx->ac.lds, 256);
1680 } else {
1681 ac_declare_lds_as_pointer(&ctx->ac);
1682 }
1683 }
1684
1685 /* Unlike radv, we override these arguments in the prolog, so to the
1686 * API shader they appear as normal arguments.
1687 */
1688 if (ctx->type == PIPE_SHADER_VERTEX) {
1689 ctx->abi.vertex_id = ac_get_arg(&ctx->ac, ctx->args.vertex_id);
1690 ctx->abi.instance_id = ac_get_arg(&ctx->ac, ctx->args.instance_id);
1691 } else if (ctx->type == PIPE_SHADER_FRAGMENT) {
1692 ctx->abi.persp_centroid = ac_get_arg(&ctx->ac, ctx->args.persp_centroid);
1693 ctx->abi.linear_centroid = ac_get_arg(&ctx->ac, ctx->args.linear_centroid);
1694 }
1695 }
1696
1697 /* For the UMR disassembler. */
1698 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
1699 #define DEBUGGER_NUM_MARKERS 5
1700
1701 static bool si_shader_binary_open(struct si_screen *screen,
1702 struct si_shader *shader,
1703 struct ac_rtld_binary *rtld)
1704 {
1705 const struct si_shader_selector *sel = shader->selector;
1706 const char *part_elfs[5];
1707 size_t part_sizes[5];
1708 unsigned num_parts = 0;
1709
1710 #define add_part(shader_or_part) \
1711 if (shader_or_part) { \
1712 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
1713 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
1714 num_parts++; \
1715 }
1716
1717 add_part(shader->prolog);
1718 add_part(shader->previous_stage);
1719 add_part(shader->prolog2);
1720 add_part(shader);
1721 add_part(shader->epilog);
1722
1723 #undef add_part
1724
1725 struct ac_rtld_symbol lds_symbols[2];
1726 unsigned num_lds_symbols = 0;
1727
1728 if (sel && screen->info.chip_class >= GFX9 && !shader->is_gs_copy_shader &&
1729 (sel->type == PIPE_SHADER_GEOMETRY || shader->key.as_ngg)) {
1730 /* We add this symbol even on LLVM <= 8 to ensure that
1731 * shader->config.lds_size is set correctly below.
1732 */
1733 struct ac_rtld_symbol *sym = &lds_symbols[num_lds_symbols++];
1734 sym->name = "esgs_ring";
1735 sym->size = shader->gs_info.esgs_ring_size;
1736 sym->align = 64 * 1024;
1737 }
1738
1739 if (shader->key.as_ngg && sel->type == PIPE_SHADER_GEOMETRY) {
1740 struct ac_rtld_symbol *sym = &lds_symbols[num_lds_symbols++];
1741 sym->name = "ngg_emit";
1742 sym->size = shader->ngg.ngg_emit_size * 4;
1743 sym->align = 4;
1744 }
1745
1746 bool ok = ac_rtld_open(rtld, (struct ac_rtld_open_info){
1747 .info = &screen->info,
1748 .options = {
1749 .halt_at_entry = screen->options.halt_shaders,
1750 },
1751 .shader_type = tgsi_processor_to_shader_stage(sel->type),
1752 .wave_size = si_get_shader_wave_size(shader),
1753 .num_parts = num_parts,
1754 .elf_ptrs = part_elfs,
1755 .elf_sizes = part_sizes,
1756 .num_shared_lds_symbols = num_lds_symbols,
1757 .shared_lds_symbols = lds_symbols });
1758
1759 if (rtld->lds_size > 0) {
1760 unsigned alloc_granularity = screen->info.chip_class >= GFX7 ? 512 : 256;
1761 shader->config.lds_size =
1762 align(rtld->lds_size, alloc_granularity) / alloc_granularity;
1763 }
1764
1765 return ok;
1766 }
1767
1768 static unsigned si_get_shader_binary_size(struct si_screen *screen, struct si_shader *shader)
1769 {
1770 struct ac_rtld_binary rtld;
1771 si_shader_binary_open(screen, shader, &rtld);
1772 return rtld.exec_size;
1773 }
1774
1775 static bool si_get_external_symbol(void *data, const char *name, uint64_t *value)
1776 {
1777 uint64_t *scratch_va = data;
1778
1779 if (!strcmp(scratch_rsrc_dword0_symbol, name)) {
1780 *value = (uint32_t)*scratch_va;
1781 return true;
1782 }
1783 if (!strcmp(scratch_rsrc_dword1_symbol, name)) {
1784 /* Enable scratch coalescing. */
1785 *value = S_008F04_BASE_ADDRESS_HI(*scratch_va >> 32) |
1786 S_008F04_SWIZZLE_ENABLE(1);
1787 return true;
1788 }
1789
1790 return false;
1791 }
1792
1793 bool si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader,
1794 uint64_t scratch_va)
1795 {
1796 struct ac_rtld_binary binary;
1797 if (!si_shader_binary_open(sscreen, shader, &binary))
1798 return false;
1799
1800 si_resource_reference(&shader->bo, NULL);
1801 shader->bo = si_aligned_buffer_create(&sscreen->b,
1802 sscreen->info.cpdma_prefetch_writes_memory ?
1803 0 : SI_RESOURCE_FLAG_READ_ONLY,
1804 PIPE_USAGE_IMMUTABLE,
1805 align(binary.rx_size, SI_CPDMA_ALIGNMENT),
1806 256);
1807 if (!shader->bo)
1808 return false;
1809
1810 /* Upload. */
1811 struct ac_rtld_upload_info u = {};
1812 u.binary = &binary;
1813 u.get_external_symbol = si_get_external_symbol;
1814 u.cb_data = &scratch_va;
1815 u.rx_va = shader->bo->gpu_address;
1816 u.rx_ptr = sscreen->ws->buffer_map(shader->bo->buf, NULL,
1817 PIPE_TRANSFER_READ_WRITE |
1818 PIPE_TRANSFER_UNSYNCHRONIZED |
1819 RADEON_TRANSFER_TEMPORARY);
1820 if (!u.rx_ptr)
1821 return false;
1822
1823 bool ok = ac_rtld_upload(&u);
1824
1825 sscreen->ws->buffer_unmap(shader->bo->buf);
1826 ac_rtld_close(&binary);
1827
1828 return ok;
1829 }
1830
1831 static void si_shader_dump_disassembly(struct si_screen *screen,
1832 const struct si_shader_binary *binary,
1833 enum pipe_shader_type shader_type,
1834 unsigned wave_size,
1835 struct pipe_debug_callback *debug,
1836 const char *name, FILE *file)
1837 {
1838 struct ac_rtld_binary rtld_binary;
1839
1840 if (!ac_rtld_open(&rtld_binary, (struct ac_rtld_open_info){
1841 .info = &screen->info,
1842 .shader_type = tgsi_processor_to_shader_stage(shader_type),
1843 .wave_size = wave_size,
1844 .num_parts = 1,
1845 .elf_ptrs = &binary->elf_buffer,
1846 .elf_sizes = &binary->elf_size }))
1847 return;
1848
1849 const char *disasm;
1850 size_t nbytes;
1851
1852 if (!ac_rtld_get_section_by_name(&rtld_binary, ".AMDGPU.disasm", &disasm, &nbytes))
1853 goto out;
1854
1855 if (nbytes > INT_MAX)
1856 goto out;
1857
1858 if (debug && debug->debug_message) {
1859 /* Very long debug messages are cut off, so send the
1860 * disassembly one line at a time. This causes more
1861 * overhead, but on the plus side it simplifies
1862 * parsing of resulting logs.
1863 */
1864 pipe_debug_message(debug, SHADER_INFO,
1865 "Shader Disassembly Begin");
1866
1867 uint64_t line = 0;
1868 while (line < nbytes) {
1869 int count = nbytes - line;
1870 const char *nl = memchr(disasm + line, '\n', nbytes - line);
1871 if (nl)
1872 count = nl - (disasm + line);
1873
1874 if (count) {
1875 pipe_debug_message(debug, SHADER_INFO,
1876 "%.*s", count, disasm + line);
1877 }
1878
1879 line += count + 1;
1880 }
1881
1882 pipe_debug_message(debug, SHADER_INFO,
1883 "Shader Disassembly End");
1884 }
1885
1886 if (file) {
1887 fprintf(file, "Shader %s disassembly:\n", name);
1888 fprintf(file, "%*s", (int)nbytes, disasm);
1889 }
1890
1891 out:
1892 ac_rtld_close(&rtld_binary);
1893 }
1894
1895 static void si_calculate_max_simd_waves(struct si_shader *shader)
1896 {
1897 struct si_screen *sscreen = shader->selector->screen;
1898 struct ac_shader_config *conf = &shader->config;
1899 unsigned num_inputs = shader->selector->info.num_inputs;
1900 unsigned lds_increment = sscreen->info.chip_class >= GFX7 ? 512 : 256;
1901 unsigned lds_per_wave = 0;
1902 unsigned max_simd_waves;
1903
1904 max_simd_waves = sscreen->info.max_wave64_per_simd;
1905
1906 /* Compute LDS usage for PS. */
1907 switch (shader->selector->type) {
1908 case PIPE_SHADER_FRAGMENT:
1909 /* The minimum usage per wave is (num_inputs * 48). The maximum
1910 * usage is (num_inputs * 48 * 16).
1911 * We can get anything in between and it varies between waves.
1912 *
1913 * The 48 bytes per input for a single primitive is equal to
1914 * 4 bytes/component * 4 components/input * 3 points.
1915 *
1916 * Other stages don't know the size at compile time or don't
1917 * allocate LDS per wave, but instead they do it per thread group.
1918 */
1919 lds_per_wave = conf->lds_size * lds_increment +
1920 align(num_inputs * 48, lds_increment);
1921 break;
1922 case PIPE_SHADER_COMPUTE:
1923 if (shader->selector) {
1924 unsigned max_workgroup_size =
1925 si_get_max_workgroup_size(shader);
1926 lds_per_wave = (conf->lds_size * lds_increment) /
1927 DIV_ROUND_UP(max_workgroup_size,
1928 sscreen->compute_wave_size);
1929 }
1930 break;
1931 default:;
1932 }
1933
1934 /* Compute the per-SIMD wave counts. */
1935 if (conf->num_sgprs) {
1936 max_simd_waves =
1937 MIN2(max_simd_waves,
1938 sscreen->info.num_physical_sgprs_per_simd / conf->num_sgprs);
1939 }
1940
1941 if (conf->num_vgprs) {
1942 /* Always print wave limits as Wave64, so that we can compare
1943 * Wave32 and Wave64 with shader-db fairly. */
1944 unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd;
1945 max_simd_waves = MIN2(max_simd_waves, max_vgprs / conf->num_vgprs);
1946 }
1947
1948 /* LDS is 64KB per CU (4 SIMDs) on GFX6-9, which is 16KB per SIMD (usage above
1949 * 16KB makes some SIMDs unoccupied).
1950 *
1951 * LDS is 128KB in WGP mode and 64KB in CU mode. Assume the WGP mode is used.
1952 */
1953 unsigned max_lds_size = sscreen->info.chip_class >= GFX10 ? 128*1024 : 64*1024;
1954 unsigned max_lds_per_simd = max_lds_size / 4;
1955 if (lds_per_wave)
1956 max_simd_waves = MIN2(max_simd_waves, max_lds_per_simd / lds_per_wave);
1957
1958 shader->info.max_simd_waves = max_simd_waves;
1959 }
1960
1961 void si_shader_dump_stats_for_shader_db(struct si_screen *screen,
1962 struct si_shader *shader,
1963 struct pipe_debug_callback *debug)
1964 {
1965 const struct ac_shader_config *conf = &shader->config;
1966
1967 if (screen->options.debug_disassembly)
1968 si_shader_dump_disassembly(screen, &shader->binary,
1969 shader->selector->type,
1970 si_get_shader_wave_size(shader),
1971 debug, "main", NULL);
1972
1973 pipe_debug_message(debug, SHADER_INFO,
1974 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
1975 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
1976 "Spilled VGPRs: %d PrivMem VGPRs: %d",
1977 conf->num_sgprs, conf->num_vgprs,
1978 si_get_shader_binary_size(screen, shader),
1979 conf->lds_size, conf->scratch_bytes_per_wave,
1980 shader->info.max_simd_waves, conf->spilled_sgprs,
1981 conf->spilled_vgprs, shader->info.private_mem_vgprs);
1982 }
1983
1984 static void si_shader_dump_stats(struct si_screen *sscreen,
1985 struct si_shader *shader,
1986 FILE *file,
1987 bool check_debug_option)
1988 {
1989 const struct ac_shader_config *conf = &shader->config;
1990
1991 if (!check_debug_option ||
1992 si_can_dump_shader(sscreen, shader->selector->type)) {
1993 if (shader->selector->type == PIPE_SHADER_FRAGMENT) {
1994 fprintf(file, "*** SHADER CONFIG ***\n"
1995 "SPI_PS_INPUT_ADDR = 0x%04x\n"
1996 "SPI_PS_INPUT_ENA = 0x%04x\n",
1997 conf->spi_ps_input_addr, conf->spi_ps_input_ena);
1998 }
1999
2000 fprintf(file, "*** SHADER STATS ***\n"
2001 "SGPRS: %d\n"
2002 "VGPRS: %d\n"
2003 "Spilled SGPRs: %d\n"
2004 "Spilled VGPRs: %d\n"
2005 "Private memory VGPRs: %d\n"
2006 "Code Size: %d bytes\n"
2007 "LDS: %d blocks\n"
2008 "Scratch: %d bytes per wave\n"
2009 "Max Waves: %d\n"
2010 "********************\n\n\n",
2011 conf->num_sgprs, conf->num_vgprs,
2012 conf->spilled_sgprs, conf->spilled_vgprs,
2013 shader->info.private_mem_vgprs,
2014 si_get_shader_binary_size(sscreen, shader),
2015 conf->lds_size, conf->scratch_bytes_per_wave,
2016 shader->info.max_simd_waves);
2017 }
2018 }
2019
2020 const char *si_get_shader_name(const struct si_shader *shader)
2021 {
2022 switch (shader->selector->type) {
2023 case PIPE_SHADER_VERTEX:
2024 if (shader->key.as_es)
2025 return "Vertex Shader as ES";
2026 else if (shader->key.as_ls)
2027 return "Vertex Shader as LS";
2028 else if (shader->key.opt.vs_as_prim_discard_cs)
2029 return "Vertex Shader as Primitive Discard CS";
2030 else if (shader->key.as_ngg)
2031 return "Vertex Shader as ESGS";
2032 else
2033 return "Vertex Shader as VS";
2034 case PIPE_SHADER_TESS_CTRL:
2035 return "Tessellation Control Shader";
2036 case PIPE_SHADER_TESS_EVAL:
2037 if (shader->key.as_es)
2038 return "Tessellation Evaluation Shader as ES";
2039 else if (shader->key.as_ngg)
2040 return "Tessellation Evaluation Shader as ESGS";
2041 else
2042 return "Tessellation Evaluation Shader as VS";
2043 case PIPE_SHADER_GEOMETRY:
2044 if (shader->is_gs_copy_shader)
2045 return "GS Copy Shader as VS";
2046 else
2047 return "Geometry Shader";
2048 case PIPE_SHADER_FRAGMENT:
2049 return "Pixel Shader";
2050 case PIPE_SHADER_COMPUTE:
2051 return "Compute Shader";
2052 default:
2053 return "Unknown Shader";
2054 }
2055 }
2056
2057 void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
2058 struct pipe_debug_callback *debug,
2059 FILE *file, bool check_debug_option)
2060 {
2061 enum pipe_shader_type shader_type = shader->selector->type;
2062
2063 if (!check_debug_option ||
2064 si_can_dump_shader(sscreen, shader_type))
2065 si_dump_shader_key(shader, file);
2066
2067 if (!check_debug_option && shader->binary.llvm_ir_string) {
2068 if (shader->previous_stage &&
2069 shader->previous_stage->binary.llvm_ir_string) {
2070 fprintf(file, "\n%s - previous stage - LLVM IR:\n\n",
2071 si_get_shader_name(shader));
2072 fprintf(file, "%s\n", shader->previous_stage->binary.llvm_ir_string);
2073 }
2074
2075 fprintf(file, "\n%s - main shader part - LLVM IR:\n\n",
2076 si_get_shader_name(shader));
2077 fprintf(file, "%s\n", shader->binary.llvm_ir_string);
2078 }
2079
2080 if (!check_debug_option ||
2081 (si_can_dump_shader(sscreen, shader_type) &&
2082 !(sscreen->debug_flags & DBG(NO_ASM)))) {
2083 unsigned wave_size = si_get_shader_wave_size(shader);
2084
2085 fprintf(file, "\n%s:\n", si_get_shader_name(shader));
2086
2087 if (shader->prolog)
2088 si_shader_dump_disassembly(sscreen, &shader->prolog->binary,
2089 shader_type, wave_size, debug, "prolog", file);
2090 if (shader->previous_stage)
2091 si_shader_dump_disassembly(sscreen, &shader->previous_stage->binary,
2092 shader_type, wave_size, debug, "previous stage", file);
2093 if (shader->prolog2)
2094 si_shader_dump_disassembly(sscreen, &shader->prolog2->binary,
2095 shader_type, wave_size, debug, "prolog2", file);
2096
2097 si_shader_dump_disassembly(sscreen, &shader->binary, shader_type,
2098 wave_size, debug, "main", file);
2099
2100 if (shader->epilog)
2101 si_shader_dump_disassembly(sscreen, &shader->epilog->binary,
2102 shader_type, wave_size, debug, "epilog", file);
2103 fprintf(file, "\n");
2104 }
2105
2106 si_shader_dump_stats(sscreen, shader, file, check_debug_option);
2107 }
2108
2109 static void si_dump_shader_key_vs(const struct si_shader_key *key,
2110 const struct si_vs_prolog_bits *prolog,
2111 const char *prefix, FILE *f)
2112 {
2113 fprintf(f, " %s.instance_divisor_is_one = %u\n",
2114 prefix, prolog->instance_divisor_is_one);
2115 fprintf(f, " %s.instance_divisor_is_fetched = %u\n",
2116 prefix, prolog->instance_divisor_is_fetched);
2117 fprintf(f, " %s.unpack_instance_id_from_vertex_id = %u\n",
2118 prefix, prolog->unpack_instance_id_from_vertex_id);
2119 fprintf(f, " %s.ls_vgpr_fix = %u\n",
2120 prefix, prolog->ls_vgpr_fix);
2121
2122 fprintf(f, " mono.vs.fetch_opencode = %x\n", key->mono.vs_fetch_opencode);
2123 fprintf(f, " mono.vs.fix_fetch = {");
2124 for (int i = 0; i < SI_MAX_ATTRIBS; i++) {
2125 union si_vs_fix_fetch fix = key->mono.vs_fix_fetch[i];
2126 if (i)
2127 fprintf(f, ", ");
2128 if (!fix.bits)
2129 fprintf(f, "0");
2130 else
2131 fprintf(f, "%u.%u.%u.%u", fix.u.reverse, fix.u.log_size,
2132 fix.u.num_channels_m1, fix.u.format);
2133 }
2134 fprintf(f, "}\n");
2135 }
2136
2137 static void si_dump_shader_key(const struct si_shader *shader, FILE *f)
2138 {
2139 const struct si_shader_key *key = &shader->key;
2140 enum pipe_shader_type shader_type = shader->selector->type;
2141
2142 fprintf(f, "SHADER KEY\n");
2143
2144 switch (shader_type) {
2145 case PIPE_SHADER_VERTEX:
2146 si_dump_shader_key_vs(key, &key->part.vs.prolog,
2147 "part.vs.prolog", f);
2148 fprintf(f, " as_es = %u\n", key->as_es);
2149 fprintf(f, " as_ls = %u\n", key->as_ls);
2150 fprintf(f, " as_ngg = %u\n", key->as_ngg);
2151 fprintf(f, " mono.u.vs_export_prim_id = %u\n",
2152 key->mono.u.vs_export_prim_id);
2153 fprintf(f, " opt.vs_as_prim_discard_cs = %u\n",
2154 key->opt.vs_as_prim_discard_cs);
2155 fprintf(f, " opt.cs_prim_type = %s\n",
2156 tgsi_primitive_names[key->opt.cs_prim_type]);
2157 fprintf(f, " opt.cs_indexed = %u\n",
2158 key->opt.cs_indexed);
2159 fprintf(f, " opt.cs_instancing = %u\n",
2160 key->opt.cs_instancing);
2161 fprintf(f, " opt.cs_primitive_restart = %u\n",
2162 key->opt.cs_primitive_restart);
2163 fprintf(f, " opt.cs_provoking_vertex_first = %u\n",
2164 key->opt.cs_provoking_vertex_first);
2165 fprintf(f, " opt.cs_need_correct_orientation = %u\n",
2166 key->opt.cs_need_correct_orientation);
2167 fprintf(f, " opt.cs_cull_front = %u\n",
2168 key->opt.cs_cull_front);
2169 fprintf(f, " opt.cs_cull_back = %u\n",
2170 key->opt.cs_cull_back);
2171 fprintf(f, " opt.cs_cull_z = %u\n",
2172 key->opt.cs_cull_z);
2173 fprintf(f, " opt.cs_halfz_clip_space = %u\n",
2174 key->opt.cs_halfz_clip_space);
2175 break;
2176
2177 case PIPE_SHADER_TESS_CTRL:
2178 if (shader->selector->screen->info.chip_class >= GFX9) {
2179 si_dump_shader_key_vs(key, &key->part.tcs.ls_prolog,
2180 "part.tcs.ls_prolog", f);
2181 }
2182 fprintf(f, " part.tcs.epilog.prim_mode = %u\n", key->part.tcs.epilog.prim_mode);
2183 fprintf(f, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64"\n", key->mono.u.ff_tcs_inputs_to_copy);
2184 break;
2185
2186 case PIPE_SHADER_TESS_EVAL:
2187 fprintf(f, " as_es = %u\n", key->as_es);
2188 fprintf(f, " as_ngg = %u\n", key->as_ngg);
2189 fprintf(f, " mono.u.vs_export_prim_id = %u\n",
2190 key->mono.u.vs_export_prim_id);
2191 break;
2192
2193 case PIPE_SHADER_GEOMETRY:
2194 if (shader->is_gs_copy_shader)
2195 break;
2196
2197 if (shader->selector->screen->info.chip_class >= GFX9 &&
2198 key->part.gs.es->type == PIPE_SHADER_VERTEX) {
2199 si_dump_shader_key_vs(key, &key->part.gs.vs_prolog,
2200 "part.gs.vs_prolog", f);
2201 }
2202 fprintf(f, " part.gs.prolog.tri_strip_adj_fix = %u\n", key->part.gs.prolog.tri_strip_adj_fix);
2203 fprintf(f, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key->part.gs.prolog.gfx9_prev_is_vs);
2204 fprintf(f, " as_ngg = %u\n", key->as_ngg);
2205 break;
2206
2207 case PIPE_SHADER_COMPUTE:
2208 break;
2209
2210 case PIPE_SHADER_FRAGMENT:
2211 fprintf(f, " part.ps.prolog.color_two_side = %u\n", key->part.ps.prolog.color_two_side);
2212 fprintf(f, " part.ps.prolog.flatshade_colors = %u\n", key->part.ps.prolog.flatshade_colors);
2213 fprintf(f, " part.ps.prolog.poly_stipple = %u\n", key->part.ps.prolog.poly_stipple);
2214 fprintf(f, " part.ps.prolog.force_persp_sample_interp = %u\n", key->part.ps.prolog.force_persp_sample_interp);
2215 fprintf(f, " part.ps.prolog.force_linear_sample_interp = %u\n", key->part.ps.prolog.force_linear_sample_interp);
2216 fprintf(f, " part.ps.prolog.force_persp_center_interp = %u\n", key->part.ps.prolog.force_persp_center_interp);
2217 fprintf(f, " part.ps.prolog.force_linear_center_interp = %u\n", key->part.ps.prolog.force_linear_center_interp);
2218 fprintf(f, " part.ps.prolog.bc_optimize_for_persp = %u\n", key->part.ps.prolog.bc_optimize_for_persp);
2219 fprintf(f, " part.ps.prolog.bc_optimize_for_linear = %u\n", key->part.ps.prolog.bc_optimize_for_linear);
2220 fprintf(f, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key->part.ps.prolog.samplemask_log_ps_iter);
2221 fprintf(f, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key->part.ps.epilog.spi_shader_col_format);
2222 fprintf(f, " part.ps.epilog.color_is_int8 = 0x%X\n", key->part.ps.epilog.color_is_int8);
2223 fprintf(f, " part.ps.epilog.color_is_int10 = 0x%X\n", key->part.ps.epilog.color_is_int10);
2224 fprintf(f, " part.ps.epilog.last_cbuf = %u\n", key->part.ps.epilog.last_cbuf);
2225 fprintf(f, " part.ps.epilog.alpha_func = %u\n", key->part.ps.epilog.alpha_func);
2226 fprintf(f, " part.ps.epilog.alpha_to_one = %u\n", key->part.ps.epilog.alpha_to_one);
2227 fprintf(f, " part.ps.epilog.poly_line_smoothing = %u\n", key->part.ps.epilog.poly_line_smoothing);
2228 fprintf(f, " part.ps.epilog.clamp_color = %u\n", key->part.ps.epilog.clamp_color);
2229 fprintf(f, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key->mono.u.ps.interpolate_at_sample_force_center);
2230 fprintf(f, " mono.u.ps.fbfetch_msaa = %u\n", key->mono.u.ps.fbfetch_msaa);
2231 fprintf(f, " mono.u.ps.fbfetch_is_1D = %u\n", key->mono.u.ps.fbfetch_is_1D);
2232 fprintf(f, " mono.u.ps.fbfetch_layered = %u\n", key->mono.u.ps.fbfetch_layered);
2233 break;
2234
2235 default:
2236 assert(0);
2237 }
2238
2239 if ((shader_type == PIPE_SHADER_GEOMETRY ||
2240 shader_type == PIPE_SHADER_TESS_EVAL ||
2241 shader_type == PIPE_SHADER_VERTEX) &&
2242 !key->as_es && !key->as_ls) {
2243 fprintf(f, " opt.kill_outputs = 0x%"PRIx64"\n", key->opt.kill_outputs);
2244 fprintf(f, " opt.clip_disable = %u\n", key->opt.clip_disable);
2245 if (shader_type != PIPE_SHADER_GEOMETRY)
2246 fprintf(f, " opt.ngg_culling = 0x%x\n", key->opt.ngg_culling);
2247 }
2248 }
2249
2250 static void si_optimize_vs_outputs(struct si_shader_context *ctx)
2251 {
2252 struct si_shader *shader = ctx->shader;
2253 struct si_shader_info *info = &shader->selector->info;
2254
2255 if ((ctx->type != PIPE_SHADER_VERTEX &&
2256 ctx->type != PIPE_SHADER_TESS_EVAL) ||
2257 shader->key.as_ls ||
2258 shader->key.as_es)
2259 return;
2260
2261 ac_optimize_vs_outputs(&ctx->ac,
2262 ctx->main_fn,
2263 shader->info.vs_output_param_offset,
2264 info->num_outputs,
2265 &shader->info.nr_param_exports);
2266 }
2267
2268 static void si_init_exec_from_input(struct si_shader_context *ctx,
2269 struct ac_arg param, unsigned bitoffset)
2270 {
2271 LLVMValueRef args[] = {
2272 ac_get_arg(&ctx->ac, param),
2273 LLVMConstInt(ctx->i32, bitoffset, 0),
2274 };
2275 ac_build_intrinsic(&ctx->ac,
2276 "llvm.amdgcn.init.exec.from.input",
2277 ctx->voidt, args, 2, AC_FUNC_ATTR_CONVERGENT);
2278 }
2279
2280 static bool si_vs_needs_prolog(const struct si_shader_selector *sel,
2281 const struct si_vs_prolog_bits *key)
2282 {
2283 /* VGPR initialization fixup for Vega10 and Raven is always done in the
2284 * VS prolog. */
2285 return sel->vs_needs_prolog ||
2286 key->ls_vgpr_fix ||
2287 key->unpack_instance_id_from_vertex_id;
2288 }
2289
2290 static bool si_build_main_function(struct si_shader_context *ctx,
2291 struct nir_shader *nir, bool free_nir,
2292 bool ngg_cull_shader)
2293 {
2294 struct si_shader *shader = ctx->shader;
2295 struct si_shader_selector *sel = shader->selector;
2296
2297 si_llvm_init_resource_callbacks(ctx);
2298
2299 switch (ctx->type) {
2300 case PIPE_SHADER_VERTEX:
2301 if (shader->key.as_ls)
2302 ctx->abi.emit_outputs = si_llvm_emit_ls_epilogue;
2303 else if (shader->key.as_es)
2304 ctx->abi.emit_outputs = si_llvm_emit_es_epilogue;
2305 else if (shader->key.opt.vs_as_prim_discard_cs)
2306 ctx->abi.emit_outputs = si_llvm_emit_prim_discard_cs_epilogue;
2307 else if (ngg_cull_shader)
2308 ctx->abi.emit_outputs = gfx10_emit_ngg_culling_epilogue_4x_wave32;
2309 else if (shader->key.as_ngg)
2310 ctx->abi.emit_outputs = gfx10_emit_ngg_epilogue;
2311 else
2312 ctx->abi.emit_outputs = si_llvm_emit_vs_epilogue;
2313 ctx->abi.load_base_vertex = get_base_vertex;
2314 break;
2315 case PIPE_SHADER_TESS_CTRL:
2316 si_llvm_init_tcs_callbacks(ctx);
2317 break;
2318 case PIPE_SHADER_TESS_EVAL:
2319 si_llvm_init_tes_callbacks(ctx);
2320
2321 if (shader->key.as_es)
2322 ctx->abi.emit_outputs = si_llvm_emit_es_epilogue;
2323 else if (ngg_cull_shader)
2324 ctx->abi.emit_outputs = gfx10_emit_ngg_culling_epilogue_4x_wave32;
2325 else if (shader->key.as_ngg)
2326 ctx->abi.emit_outputs = gfx10_emit_ngg_epilogue;
2327 else
2328 ctx->abi.emit_outputs = si_llvm_emit_vs_epilogue;
2329 break;
2330 case PIPE_SHADER_GEOMETRY:
2331 si_llvm_init_gs_callbacks(ctx);
2332 break;
2333 case PIPE_SHADER_FRAGMENT:
2334 si_llvm_init_ps_callbacks(ctx);
2335 break;
2336 case PIPE_SHADER_COMPUTE:
2337 ctx->abi.load_local_group_size = get_block_size;
2338 break;
2339 default:
2340 assert(!"Unsupported shader type");
2341 return false;
2342 }
2343
2344 si_create_function(ctx, ngg_cull_shader);
2345
2346 if (ctx->shader->key.as_es || ctx->type == PIPE_SHADER_GEOMETRY)
2347 si_preload_esgs_ring(ctx);
2348
2349 if (ctx->type == PIPE_SHADER_GEOMETRY)
2350 si_preload_gs_rings(ctx);
2351 else if (ctx->type == PIPE_SHADER_TESS_EVAL)
2352 si_llvm_preload_tes_rings(ctx);
2353
2354 if (ctx->type == PIPE_SHADER_TESS_CTRL &&
2355 sel->info.tessfactors_are_def_in_all_invocs) {
2356 for (unsigned i = 0; i < 6; i++) {
2357 ctx->invoc0_tess_factors[i] =
2358 ac_build_alloca_undef(&ctx->ac, ctx->i32, "");
2359 }
2360 }
2361
2362 if (ctx->type == PIPE_SHADER_GEOMETRY) {
2363 for (unsigned i = 0; i < 4; i++) {
2364 ctx->gs_next_vertex[i] =
2365 ac_build_alloca(&ctx->ac, ctx->i32, "");
2366 }
2367 if (shader->key.as_ngg) {
2368 for (unsigned i = 0; i < 4; ++i) {
2369 ctx->gs_curprim_verts[i] =
2370 ac_build_alloca(&ctx->ac, ctx->ac.i32, "");
2371 ctx->gs_generated_prims[i] =
2372 ac_build_alloca(&ctx->ac, ctx->ac.i32, "");
2373 }
2374
2375 unsigned scratch_size = 8;
2376 if (sel->so.num_outputs)
2377 scratch_size = 44;
2378
2379 assert(!ctx->gs_ngg_scratch);
2380 LLVMTypeRef ai32 = LLVMArrayType(ctx->i32, scratch_size);
2381 ctx->gs_ngg_scratch = LLVMAddGlobalInAddressSpace(ctx->ac.module,
2382 ai32, "ngg_scratch", AC_ADDR_SPACE_LDS);
2383 LLVMSetInitializer(ctx->gs_ngg_scratch, LLVMGetUndef(ai32));
2384 LLVMSetAlignment(ctx->gs_ngg_scratch, 4);
2385
2386 ctx->gs_ngg_emit = LLVMAddGlobalInAddressSpace(ctx->ac.module,
2387 LLVMArrayType(ctx->i32, 0), "ngg_emit", AC_ADDR_SPACE_LDS);
2388 LLVMSetLinkage(ctx->gs_ngg_emit, LLVMExternalLinkage);
2389 LLVMSetAlignment(ctx->gs_ngg_emit, 4);
2390 }
2391 }
2392
2393 if (ctx->type != PIPE_SHADER_GEOMETRY &&
2394 (shader->key.as_ngg && !shader->key.as_es)) {
2395 /* Unconditionally declare scratch space base for streamout and
2396 * vertex compaction. Whether space is actually allocated is
2397 * determined during linking / PM4 creation.
2398 *
2399 * Add an extra dword per vertex to ensure an odd stride, which
2400 * avoids bank conflicts for SoA accesses.
2401 */
2402 if (!gfx10_is_ngg_passthrough(shader))
2403 si_llvm_declare_esgs_ring(ctx);
2404
2405 /* This is really only needed when streamout and / or vertex
2406 * compaction is enabled.
2407 */
2408 if (!ctx->gs_ngg_scratch &&
2409 (sel->so.num_outputs || shader->key.opt.ngg_culling)) {
2410 LLVMTypeRef asi32 = LLVMArrayType(ctx->i32, 8);
2411 ctx->gs_ngg_scratch = LLVMAddGlobalInAddressSpace(ctx->ac.module,
2412 asi32, "ngg_scratch", AC_ADDR_SPACE_LDS);
2413 LLVMSetInitializer(ctx->gs_ngg_scratch, LLVMGetUndef(asi32));
2414 LLVMSetAlignment(ctx->gs_ngg_scratch, 4);
2415 }
2416 }
2417
2418 /* For GFX9 merged shaders:
2419 * - Set EXEC for the first shader. If the prolog is present, set
2420 * EXEC there instead.
2421 * - Add a barrier before the second shader.
2422 * - In the second shader, reset EXEC to ~0 and wrap the main part in
2423 * an if-statement. This is required for correctness in geometry
2424 * shaders, to ensure that empty GS waves do not send GS_EMIT and
2425 * GS_CUT messages.
2426 *
2427 * For monolithic merged shaders, the first shader is wrapped in an
2428 * if-block together with its prolog in si_build_wrapper_function.
2429 *
2430 * NGG vertex and tess eval shaders running as the last
2431 * vertex/geometry stage handle execution explicitly using
2432 * if-statements.
2433 */
2434 if (ctx->screen->info.chip_class >= GFX9) {
2435 if (!shader->is_monolithic &&
2436 (shader->key.as_es || shader->key.as_ls) &&
2437 (ctx->type == PIPE_SHADER_TESS_EVAL ||
2438 (ctx->type == PIPE_SHADER_VERTEX &&
2439 !si_vs_needs_prolog(sel, &shader->key.part.vs.prolog)))) {
2440 si_init_exec_from_input(ctx,
2441 ctx->merged_wave_info, 0);
2442 } else if (ctx->type == PIPE_SHADER_TESS_CTRL ||
2443 ctx->type == PIPE_SHADER_GEOMETRY ||
2444 (shader->key.as_ngg && !shader->key.as_es)) {
2445 LLVMValueRef thread_enabled;
2446 bool nested_barrier;
2447
2448 if (!shader->is_monolithic ||
2449 (ctx->type == PIPE_SHADER_TESS_EVAL &&
2450 shader->key.as_ngg && !shader->key.as_es &&
2451 !shader->key.opt.ngg_culling))
2452 ac_init_exec_full_mask(&ctx->ac);
2453
2454 if ((ctx->type == PIPE_SHADER_VERTEX ||
2455 ctx->type == PIPE_SHADER_TESS_EVAL) &&
2456 shader->key.as_ngg && !shader->key.as_es &&
2457 !shader->key.opt.ngg_culling) {
2458 gfx10_ngg_build_sendmsg_gs_alloc_req(ctx);
2459
2460 /* Build the primitive export at the beginning
2461 * of the shader if possible.
2462 */
2463 if (gfx10_ngg_export_prim_early(shader))
2464 gfx10_ngg_build_export_prim(ctx, NULL, NULL);
2465 }
2466
2467 if (ctx->type == PIPE_SHADER_TESS_CTRL ||
2468 ctx->type == PIPE_SHADER_GEOMETRY) {
2469 if (ctx->type == PIPE_SHADER_GEOMETRY && shader->key.as_ngg) {
2470 gfx10_ngg_gs_emit_prologue(ctx);
2471 nested_barrier = false;
2472 } else {
2473 nested_barrier = true;
2474 }
2475
2476 thread_enabled = si_is_gs_thread(ctx);
2477 } else {
2478 thread_enabled = si_is_es_thread(ctx);
2479 nested_barrier = false;
2480 }
2481
2482 ctx->merged_wrap_if_entry_block = LLVMGetInsertBlock(ctx->ac.builder);
2483 ctx->merged_wrap_if_label = 11500;
2484 ac_build_ifcc(&ctx->ac, thread_enabled, ctx->merged_wrap_if_label);
2485
2486 if (nested_barrier) {
2487 /* Execute a barrier before the second shader in
2488 * a merged shader.
2489 *
2490 * Execute the barrier inside the conditional block,
2491 * so that empty waves can jump directly to s_endpgm,
2492 * which will also signal the barrier.
2493 *
2494 * This is possible in gfx9, because an empty wave
2495 * for the second shader does not participate in
2496 * the epilogue. With NGG, empty waves may still
2497 * be required to export data (e.g. GS output vertices),
2498 * so we cannot let them exit early.
2499 *
2500 * If the shader is TCS and the TCS epilog is present
2501 * and contains a barrier, it will wait there and then
2502 * reach s_endpgm.
2503 */
2504 si_llvm_emit_barrier(ctx);
2505 }
2506 }
2507 }
2508
2509 if (sel->force_correct_derivs_after_kill) {
2510 ctx->postponed_kill = ac_build_alloca_undef(&ctx->ac, ctx->i1, "");
2511 /* true = don't kill. */
2512 LLVMBuildStore(ctx->ac.builder, ctx->i1true,
2513 ctx->postponed_kill);
2514 }
2515
2516 bool success = si_nir_build_llvm(ctx, nir);
2517 if (free_nir)
2518 ralloc_free(nir);
2519 if (!success) {
2520 fprintf(stderr, "Failed to translate shader from NIR to LLVM\n");
2521 return false;
2522 }
2523
2524 si_llvm_build_ret(ctx, ctx->return_value);
2525 return true;
2526 }
2527
2528 /**
2529 * Compute the VS prolog key, which contains all the information needed to
2530 * build the VS prolog function, and set shader->info bits where needed.
2531 *
2532 * \param info Shader info of the vertex shader.
2533 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
2534 * \param has_old_ Whether the preceding shader part is the NGG cull shader.
2535 * \param prolog_key Key of the VS prolog
2536 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
2537 * \param key Output shader part key.
2538 */
2539 static void si_get_vs_prolog_key(const struct si_shader_info *info,
2540 unsigned num_input_sgprs,
2541 bool ngg_cull_shader,
2542 const struct si_vs_prolog_bits *prolog_key,
2543 struct si_shader *shader_out,
2544 union si_shader_part_key *key)
2545 {
2546 memset(key, 0, sizeof(*key));
2547 key->vs_prolog.states = *prolog_key;
2548 key->vs_prolog.num_input_sgprs = num_input_sgprs;
2549 key->vs_prolog.num_inputs = info->num_inputs;
2550 key->vs_prolog.as_ls = shader_out->key.as_ls;
2551 key->vs_prolog.as_es = shader_out->key.as_es;
2552 key->vs_prolog.as_ngg = shader_out->key.as_ngg;
2553
2554 if (!ngg_cull_shader)
2555 key->vs_prolog.has_ngg_cull_inputs = !!shader_out->key.opt.ngg_culling;
2556
2557 if (shader_out->selector->type == PIPE_SHADER_TESS_CTRL) {
2558 key->vs_prolog.as_ls = 1;
2559 key->vs_prolog.num_merged_next_stage_vgprs = 2;
2560 } else if (shader_out->selector->type == PIPE_SHADER_GEOMETRY) {
2561 key->vs_prolog.as_es = 1;
2562 key->vs_prolog.num_merged_next_stage_vgprs = 5;
2563 } else if (shader_out->key.as_ngg) {
2564 key->vs_prolog.num_merged_next_stage_vgprs = 5;
2565 }
2566
2567 /* Enable loading the InstanceID VGPR. */
2568 uint16_t input_mask = u_bit_consecutive(0, info->num_inputs);
2569
2570 if ((key->vs_prolog.states.instance_divisor_is_one |
2571 key->vs_prolog.states.instance_divisor_is_fetched) & input_mask)
2572 shader_out->info.uses_instanceid = true;
2573 }
2574
2575 /**
2576 * Given a list of shader part functions, build a wrapper function that
2577 * runs them in sequence to form a monolithic shader.
2578 */
2579 void si_build_wrapper_function(struct si_shader_context *ctx, LLVMValueRef *parts,
2580 unsigned num_parts, unsigned main_part,
2581 unsigned next_shader_first_part)
2582 {
2583 LLVMBuilderRef builder = ctx->ac.builder;
2584 /* PS epilog has one arg per color component; gfx9 merged shader
2585 * prologs need to forward 40 SGPRs.
2586 */
2587 LLVMValueRef initial[AC_MAX_ARGS], out[AC_MAX_ARGS];
2588 LLVMTypeRef function_type;
2589 unsigned num_first_params;
2590 unsigned num_out, initial_num_out;
2591 ASSERTED unsigned num_out_sgpr; /* used in debug checks */
2592 ASSERTED unsigned initial_num_out_sgpr; /* used in debug checks */
2593 unsigned num_sgprs, num_vgprs;
2594 unsigned gprs;
2595
2596 memset(&ctx->args, 0, sizeof(ctx->args));
2597
2598 for (unsigned i = 0; i < num_parts; ++i) {
2599 ac_add_function_attr(ctx->ac.context, parts[i], -1,
2600 AC_FUNC_ATTR_ALWAYSINLINE);
2601 LLVMSetLinkage(parts[i], LLVMPrivateLinkage);
2602 }
2603
2604 /* The parameters of the wrapper function correspond to those of the
2605 * first part in terms of SGPRs and VGPRs, but we use the types of the
2606 * main part to get the right types. This is relevant for the
2607 * dereferenceable attribute on descriptor table pointers.
2608 */
2609 num_sgprs = 0;
2610 num_vgprs = 0;
2611
2612 function_type = LLVMGetElementType(LLVMTypeOf(parts[0]));
2613 num_first_params = LLVMCountParamTypes(function_type);
2614
2615 for (unsigned i = 0; i < num_first_params; ++i) {
2616 LLVMValueRef param = LLVMGetParam(parts[0], i);
2617
2618 if (ac_is_sgpr_param(param)) {
2619 assert(num_vgprs == 0);
2620 num_sgprs += ac_get_type_size(LLVMTypeOf(param)) / 4;
2621 } else {
2622 num_vgprs += ac_get_type_size(LLVMTypeOf(param)) / 4;
2623 }
2624 }
2625
2626 gprs = 0;
2627 while (gprs < num_sgprs + num_vgprs) {
2628 LLVMValueRef param = LLVMGetParam(parts[main_part], ctx->args.arg_count);
2629 LLVMTypeRef type = LLVMTypeOf(param);
2630 unsigned size = ac_get_type_size(type) / 4;
2631
2632 /* This is going to get casted anyways, so we don't have to
2633 * have the exact same type. But we do have to preserve the
2634 * pointer-ness so that LLVM knows about it.
2635 */
2636 enum ac_arg_type arg_type = AC_ARG_INT;
2637 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind) {
2638 type = LLVMGetElementType(type);
2639
2640 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
2641 if (LLVMGetVectorSize(type) == 4)
2642 arg_type = AC_ARG_CONST_DESC_PTR;
2643 else if (LLVMGetVectorSize(type) == 8)
2644 arg_type = AC_ARG_CONST_IMAGE_PTR;
2645 else
2646 assert(0);
2647 } else if (type == ctx->f32) {
2648 arg_type = AC_ARG_CONST_FLOAT_PTR;
2649 } else {
2650 assert(0);
2651 }
2652 }
2653
2654 ac_add_arg(&ctx->args, gprs < num_sgprs ? AC_ARG_SGPR : AC_ARG_VGPR,
2655 size, arg_type, NULL);
2656
2657 assert(ac_is_sgpr_param(param) == (gprs < num_sgprs));
2658 assert(gprs + size <= num_sgprs + num_vgprs &&
2659 (gprs >= num_sgprs || gprs + size <= num_sgprs));
2660
2661 gprs += size;
2662 }
2663
2664 /* Prepare the return type. */
2665 unsigned num_returns = 0;
2666 LLVMTypeRef returns[AC_MAX_ARGS], last_func_type, return_type;
2667
2668 last_func_type = LLVMGetElementType(LLVMTypeOf(parts[num_parts - 1]));
2669 return_type = LLVMGetReturnType(last_func_type);
2670
2671 switch (LLVMGetTypeKind(return_type)) {
2672 case LLVMStructTypeKind:
2673 num_returns = LLVMCountStructElementTypes(return_type);
2674 assert(num_returns <= ARRAY_SIZE(returns));
2675 LLVMGetStructElementTypes(return_type, returns);
2676 break;
2677 case LLVMVoidTypeKind:
2678 break;
2679 default:
2680 unreachable("unexpected type");
2681 }
2682
2683 si_llvm_create_func(ctx, "wrapper", returns, num_returns,
2684 si_get_max_workgroup_size(ctx->shader));
2685
2686 if (si_is_merged_shader(ctx))
2687 ac_init_exec_full_mask(&ctx->ac);
2688
2689 /* Record the arguments of the function as if they were an output of
2690 * a previous part.
2691 */
2692 num_out = 0;
2693 num_out_sgpr = 0;
2694
2695 for (unsigned i = 0; i < ctx->args.arg_count; ++i) {
2696 LLVMValueRef param = LLVMGetParam(ctx->main_fn, i);
2697 LLVMTypeRef param_type = LLVMTypeOf(param);
2698 LLVMTypeRef out_type = ctx->args.args[i].file == AC_ARG_SGPR ? ctx->i32 : ctx->f32;
2699 unsigned size = ac_get_type_size(param_type) / 4;
2700
2701 if (size == 1) {
2702 if (LLVMGetTypeKind(param_type) == LLVMPointerTypeKind) {
2703 param = LLVMBuildPtrToInt(builder, param, ctx->i32, "");
2704 param_type = ctx->i32;
2705 }
2706
2707 if (param_type != out_type)
2708 param = LLVMBuildBitCast(builder, param, out_type, "");
2709 out[num_out++] = param;
2710 } else {
2711 LLVMTypeRef vector_type = LLVMVectorType(out_type, size);
2712
2713 if (LLVMGetTypeKind(param_type) == LLVMPointerTypeKind) {
2714 param = LLVMBuildPtrToInt(builder, param, ctx->i64, "");
2715 param_type = ctx->i64;
2716 }
2717
2718 if (param_type != vector_type)
2719 param = LLVMBuildBitCast(builder, param, vector_type, "");
2720
2721 for (unsigned j = 0; j < size; ++j)
2722 out[num_out++] = LLVMBuildExtractElement(
2723 builder, param, LLVMConstInt(ctx->i32, j, 0), "");
2724 }
2725
2726 if (ctx->args.args[i].file == AC_ARG_SGPR)
2727 num_out_sgpr = num_out;
2728 }
2729
2730 memcpy(initial, out, sizeof(out));
2731 initial_num_out = num_out;
2732 initial_num_out_sgpr = num_out_sgpr;
2733
2734 /* Now chain the parts. */
2735 LLVMValueRef ret = NULL;
2736 for (unsigned part = 0; part < num_parts; ++part) {
2737 LLVMValueRef in[AC_MAX_ARGS];
2738 LLVMTypeRef ret_type;
2739 unsigned out_idx = 0;
2740 unsigned num_params = LLVMCountParams(parts[part]);
2741
2742 /* Merged shaders are executed conditionally depending
2743 * on the number of enabled threads passed in the input SGPRs. */
2744 if (is_multi_part_shader(ctx) && part == 0) {
2745 LLVMValueRef ena, count = initial[3];
2746
2747 count = LLVMBuildAnd(builder, count,
2748 LLVMConstInt(ctx->i32, 0x7f, 0), "");
2749 ena = LLVMBuildICmp(builder, LLVMIntULT,
2750 ac_get_thread_id(&ctx->ac), count, "");
2751 ac_build_ifcc(&ctx->ac, ena, 6506);
2752 }
2753
2754 /* Derive arguments for the next part from outputs of the
2755 * previous one.
2756 */
2757 for (unsigned param_idx = 0; param_idx < num_params; ++param_idx) {
2758 LLVMValueRef param;
2759 LLVMTypeRef param_type;
2760 bool is_sgpr;
2761 unsigned param_size;
2762 LLVMValueRef arg = NULL;
2763
2764 param = LLVMGetParam(parts[part], param_idx);
2765 param_type = LLVMTypeOf(param);
2766 param_size = ac_get_type_size(param_type) / 4;
2767 is_sgpr = ac_is_sgpr_param(param);
2768
2769 if (is_sgpr) {
2770 ac_add_function_attr(ctx->ac.context, parts[part],
2771 param_idx + 1, AC_FUNC_ATTR_INREG);
2772 } else if (out_idx < num_out_sgpr) {
2773 /* Skip returned SGPRs the current part doesn't
2774 * declare on the input. */
2775 out_idx = num_out_sgpr;
2776 }
2777
2778 assert(out_idx + param_size <= (is_sgpr ? num_out_sgpr : num_out));
2779
2780 if (param_size == 1)
2781 arg = out[out_idx];
2782 else
2783 arg = ac_build_gather_values(&ctx->ac, &out[out_idx], param_size);
2784
2785 if (LLVMTypeOf(arg) != param_type) {
2786 if (LLVMGetTypeKind(param_type) == LLVMPointerTypeKind) {
2787 if (LLVMGetPointerAddressSpace(param_type) ==
2788 AC_ADDR_SPACE_CONST_32BIT) {
2789 arg = LLVMBuildBitCast(builder, arg, ctx->i32, "");
2790 arg = LLVMBuildIntToPtr(builder, arg, param_type, "");
2791 } else {
2792 arg = LLVMBuildBitCast(builder, arg, ctx->i64, "");
2793 arg = LLVMBuildIntToPtr(builder, arg, param_type, "");
2794 }
2795 } else {
2796 arg = LLVMBuildBitCast(builder, arg, param_type, "");
2797 }
2798 }
2799
2800 in[param_idx] = arg;
2801 out_idx += param_size;
2802 }
2803
2804 ret = ac_build_call(&ctx->ac, parts[part], in, num_params);
2805
2806 if (is_multi_part_shader(ctx) &&
2807 part + 1 == next_shader_first_part) {
2808 ac_build_endif(&ctx->ac, 6506);
2809
2810 /* The second half of the merged shader should use
2811 * the inputs from the toplevel (wrapper) function,
2812 * not the return value from the last call.
2813 *
2814 * That's because the last call was executed condi-
2815 * tionally, so we can't consume it in the main
2816 * block.
2817 */
2818 memcpy(out, initial, sizeof(initial));
2819 num_out = initial_num_out;
2820 num_out_sgpr = initial_num_out_sgpr;
2821 continue;
2822 }
2823
2824 /* Extract the returned GPRs. */
2825 ret_type = LLVMTypeOf(ret);
2826 num_out = 0;
2827 num_out_sgpr = 0;
2828
2829 if (LLVMGetTypeKind(ret_type) != LLVMVoidTypeKind) {
2830 assert(LLVMGetTypeKind(ret_type) == LLVMStructTypeKind);
2831
2832 unsigned ret_size = LLVMCountStructElementTypes(ret_type);
2833
2834 for (unsigned i = 0; i < ret_size; ++i) {
2835 LLVMValueRef val =
2836 LLVMBuildExtractValue(builder, ret, i, "");
2837
2838 assert(num_out < ARRAY_SIZE(out));
2839 out[num_out++] = val;
2840
2841 if (LLVMTypeOf(val) == ctx->i32) {
2842 assert(num_out_sgpr + 1 == num_out);
2843 num_out_sgpr = num_out;
2844 }
2845 }
2846 }
2847 }
2848
2849 /* Return the value from the last part. */
2850 if (LLVMGetTypeKind(LLVMTypeOf(ret)) == LLVMVoidTypeKind)
2851 LLVMBuildRetVoid(builder);
2852 else
2853 LLVMBuildRet(builder, ret);
2854 }
2855
2856 static bool si_should_optimize_less(struct ac_llvm_compiler *compiler,
2857 struct si_shader_selector *sel)
2858 {
2859 if (!compiler->low_opt_passes)
2860 return false;
2861
2862 /* Assume a slow CPU. */
2863 assert(!sel->screen->info.has_dedicated_vram &&
2864 sel->screen->info.chip_class <= GFX8);
2865
2866 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
2867 * buffer stores. */
2868 return sel->type == PIPE_SHADER_COMPUTE &&
2869 sel->info.num_memory_instructions > 1000;
2870 }
2871
2872 static struct nir_shader *get_nir_shader(struct si_shader_selector *sel,
2873 bool *free_nir)
2874 {
2875 *free_nir = false;
2876
2877 if (sel->nir) {
2878 return sel->nir;
2879 } else if (sel->nir_binary) {
2880 struct pipe_screen *screen = &sel->screen->b;
2881 const void *options =
2882 screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR,
2883 sel->type);
2884
2885 struct blob_reader blob_reader;
2886 blob_reader_init(&blob_reader, sel->nir_binary, sel->nir_size);
2887 *free_nir = true;
2888 return nir_deserialize(NULL, options, &blob_reader);
2889 }
2890 return NULL;
2891 }
2892
2893 int si_compile_shader(struct si_screen *sscreen,
2894 struct ac_llvm_compiler *compiler,
2895 struct si_shader *shader,
2896 struct pipe_debug_callback *debug)
2897 {
2898 struct si_shader_selector *sel = shader->selector;
2899 struct si_shader_context ctx;
2900 bool free_nir;
2901 struct nir_shader *nir = get_nir_shader(sel, &free_nir);
2902 int r = -1;
2903
2904 /* Dump NIR before doing NIR->LLVM conversion in case the
2905 * conversion fails. */
2906 if (si_can_dump_shader(sscreen, sel->type) &&
2907 !(sscreen->debug_flags & DBG(NO_NIR))) {
2908 nir_print_shader(nir, stderr);
2909 si_dump_streamout(&sel->so);
2910 }
2911
2912 si_llvm_context_init(&ctx, sscreen, compiler, si_get_shader_wave_size(shader));
2913 si_llvm_context_set_ir(&ctx, shader);
2914
2915 memset(shader->info.vs_output_param_offset, AC_EXP_PARAM_UNDEFINED,
2916 sizeof(shader->info.vs_output_param_offset));
2917
2918 shader->info.uses_instanceid = sel->info.uses_instanceid;
2919
2920 LLVMValueRef ngg_cull_main_fn = NULL;
2921 if (ctx.shader->key.opt.ngg_culling) {
2922 if (!si_build_main_function(&ctx, nir, false, true)) {
2923 si_llvm_dispose(&ctx);
2924 return -1;
2925 }
2926 ngg_cull_main_fn = ctx.main_fn;
2927 ctx.main_fn = NULL;
2928 /* Re-set the IR. */
2929 si_llvm_context_set_ir(&ctx, shader);
2930 }
2931
2932 if (!si_build_main_function(&ctx, nir, free_nir, false)) {
2933 si_llvm_dispose(&ctx);
2934 return -1;
2935 }
2936
2937 if (shader->is_monolithic && ctx.type == PIPE_SHADER_VERTEX) {
2938 LLVMValueRef parts[4];
2939 unsigned num_parts = 0;
2940 bool need_prolog = si_vs_needs_prolog(sel, &shader->key.part.vs.prolog);
2941 LLVMValueRef main_fn = ctx.main_fn;
2942
2943 if (ngg_cull_main_fn) {
2944 if (need_prolog) {
2945 union si_shader_part_key prolog_key;
2946 si_get_vs_prolog_key(&sel->info,
2947 shader->info.num_input_sgprs,
2948 true,
2949 &shader->key.part.vs.prolog,
2950 shader, &prolog_key);
2951 prolog_key.vs_prolog.is_monolithic = true;
2952 si_build_vs_prolog_function(&ctx, &prolog_key);
2953 parts[num_parts++] = ctx.main_fn;
2954 }
2955 parts[num_parts++] = ngg_cull_main_fn;
2956 }
2957
2958 if (need_prolog) {
2959 union si_shader_part_key prolog_key;
2960 si_get_vs_prolog_key(&sel->info,
2961 shader->info.num_input_sgprs,
2962 false,
2963 &shader->key.part.vs.prolog,
2964 shader, &prolog_key);
2965 prolog_key.vs_prolog.is_monolithic = true;
2966 si_build_vs_prolog_function(&ctx, &prolog_key);
2967 parts[num_parts++] = ctx.main_fn;
2968 }
2969 parts[num_parts++] = main_fn;
2970
2971 si_build_wrapper_function(&ctx, parts, num_parts,
2972 need_prolog ? 1 : 0, 0);
2973
2974 if (ctx.shader->key.opt.vs_as_prim_discard_cs)
2975 si_build_prim_discard_compute_shader(&ctx);
2976 } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_TESS_EVAL &&
2977 ngg_cull_main_fn) {
2978 LLVMValueRef parts[2];
2979
2980 parts[0] = ngg_cull_main_fn;
2981 parts[1] = ctx.main_fn;
2982
2983 si_build_wrapper_function(&ctx, parts, 2, 0, 0);
2984 } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_TESS_CTRL) {
2985 if (sscreen->info.chip_class >= GFX9) {
2986 struct si_shader_selector *ls = shader->key.part.tcs.ls;
2987 LLVMValueRef parts[4];
2988 bool vs_needs_prolog =
2989 si_vs_needs_prolog(ls, &shader->key.part.tcs.ls_prolog);
2990
2991 /* TCS main part */
2992 parts[2] = ctx.main_fn;
2993
2994 /* TCS epilog */
2995 union si_shader_part_key tcs_epilog_key;
2996 memset(&tcs_epilog_key, 0, sizeof(tcs_epilog_key));
2997 tcs_epilog_key.tcs_epilog.states = shader->key.part.tcs.epilog;
2998 si_llvm_build_tcs_epilog(&ctx, &tcs_epilog_key);
2999 parts[3] = ctx.main_fn;
3000
3001 /* VS as LS main part */
3002 nir = get_nir_shader(ls, &free_nir);
3003 struct si_shader shader_ls = {};
3004 shader_ls.selector = ls;
3005 shader_ls.key.as_ls = 1;
3006 shader_ls.key.mono = shader->key.mono;
3007 shader_ls.key.opt = shader->key.opt;
3008 shader_ls.is_monolithic = true;
3009 si_llvm_context_set_ir(&ctx, &shader_ls);
3010
3011 if (!si_build_main_function(&ctx, nir, free_nir, false)) {
3012 si_llvm_dispose(&ctx);
3013 return -1;
3014 }
3015 shader->info.uses_instanceid |= ls->info.uses_instanceid;
3016 parts[1] = ctx.main_fn;
3017
3018 /* LS prolog */
3019 if (vs_needs_prolog) {
3020 union si_shader_part_key vs_prolog_key;
3021 si_get_vs_prolog_key(&ls->info,
3022 shader_ls.info.num_input_sgprs,
3023 false,
3024 &shader->key.part.tcs.ls_prolog,
3025 shader, &vs_prolog_key);
3026 vs_prolog_key.vs_prolog.is_monolithic = true;
3027 si_build_vs_prolog_function(&ctx, &vs_prolog_key);
3028 parts[0] = ctx.main_fn;
3029 }
3030
3031 /* Reset the shader context. */
3032 ctx.shader = shader;
3033 ctx.type = PIPE_SHADER_TESS_CTRL;
3034
3035 si_build_wrapper_function(&ctx,
3036 parts + !vs_needs_prolog,
3037 4 - !vs_needs_prolog, vs_needs_prolog,
3038 vs_needs_prolog ? 2 : 1);
3039 } else {
3040 LLVMValueRef parts[2];
3041 union si_shader_part_key epilog_key;
3042
3043 parts[0] = ctx.main_fn;
3044
3045 memset(&epilog_key, 0, sizeof(epilog_key));
3046 epilog_key.tcs_epilog.states = shader->key.part.tcs.epilog;
3047 si_llvm_build_tcs_epilog(&ctx, &epilog_key);
3048 parts[1] = ctx.main_fn;
3049
3050 si_build_wrapper_function(&ctx, parts, 2, 0, 0);
3051 }
3052 } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_GEOMETRY) {
3053 if (ctx.screen->info.chip_class >= GFX9) {
3054 struct si_shader_selector *es = shader->key.part.gs.es;
3055 LLVMValueRef es_prolog = NULL;
3056 LLVMValueRef es_main = NULL;
3057 LLVMValueRef gs_prolog = NULL;
3058 LLVMValueRef gs_main = ctx.main_fn;
3059
3060 /* GS prolog */
3061 union si_shader_part_key gs_prolog_key;
3062 memset(&gs_prolog_key, 0, sizeof(gs_prolog_key));
3063 gs_prolog_key.gs_prolog.states = shader->key.part.gs.prolog;
3064 gs_prolog_key.gs_prolog.is_monolithic = true;
3065 gs_prolog_key.gs_prolog.as_ngg = shader->key.as_ngg;
3066 si_llvm_build_gs_prolog(&ctx, &gs_prolog_key);
3067 gs_prolog = ctx.main_fn;
3068
3069 /* ES main part */
3070 nir = get_nir_shader(es, &free_nir);
3071 struct si_shader shader_es = {};
3072 shader_es.selector = es;
3073 shader_es.key.as_es = 1;
3074 shader_es.key.as_ngg = shader->key.as_ngg;
3075 shader_es.key.mono = shader->key.mono;
3076 shader_es.key.opt = shader->key.opt;
3077 shader_es.is_monolithic = true;
3078 si_llvm_context_set_ir(&ctx, &shader_es);
3079
3080 if (!si_build_main_function(&ctx, nir, free_nir, false)) {
3081 si_llvm_dispose(&ctx);
3082 return -1;
3083 }
3084 shader->info.uses_instanceid |= es->info.uses_instanceid;
3085 es_main = ctx.main_fn;
3086
3087 /* ES prolog */
3088 if (es->type == PIPE_SHADER_VERTEX &&
3089 si_vs_needs_prolog(es, &shader->key.part.gs.vs_prolog)) {
3090 union si_shader_part_key vs_prolog_key;
3091 si_get_vs_prolog_key(&es->info,
3092 shader_es.info.num_input_sgprs,
3093 false,
3094 &shader->key.part.gs.vs_prolog,
3095 shader, &vs_prolog_key);
3096 vs_prolog_key.vs_prolog.is_monolithic = true;
3097 si_build_vs_prolog_function(&ctx, &vs_prolog_key);
3098 es_prolog = ctx.main_fn;
3099 }
3100
3101 /* Reset the shader context. */
3102 ctx.shader = shader;
3103 ctx.type = PIPE_SHADER_GEOMETRY;
3104
3105 /* Prepare the array of shader parts. */
3106 LLVMValueRef parts[4];
3107 unsigned num_parts = 0, main_part, next_first_part;
3108
3109 if (es_prolog)
3110 parts[num_parts++] = es_prolog;
3111
3112 parts[main_part = num_parts++] = es_main;
3113 parts[next_first_part = num_parts++] = gs_prolog;
3114 parts[num_parts++] = gs_main;
3115
3116 si_build_wrapper_function(&ctx, parts, num_parts,
3117 main_part, next_first_part);
3118 } else {
3119 LLVMValueRef parts[2];
3120 union si_shader_part_key prolog_key;
3121
3122 parts[1] = ctx.main_fn;
3123
3124 memset(&prolog_key, 0, sizeof(prolog_key));
3125 prolog_key.gs_prolog.states = shader->key.part.gs.prolog;
3126 si_llvm_build_gs_prolog(&ctx, &prolog_key);
3127 parts[0] = ctx.main_fn;
3128
3129 si_build_wrapper_function(&ctx, parts, 2, 1, 0);
3130 }
3131 } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_FRAGMENT) {
3132 si_llvm_build_monolithic_ps(&ctx, shader);
3133 }
3134
3135 si_llvm_optimize_module(&ctx);
3136
3137 /* Post-optimization transformations and analysis. */
3138 si_optimize_vs_outputs(&ctx);
3139
3140 if ((debug && debug->debug_message) ||
3141 si_can_dump_shader(sscreen, ctx.type)) {
3142 ctx.shader->info.private_mem_vgprs =
3143 ac_count_scratch_private_memory(ctx.main_fn);
3144 }
3145
3146 /* Make sure the input is a pointer and not integer followed by inttoptr. */
3147 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx.main_fn, 0))) ==
3148 LLVMPointerTypeKind);
3149
3150 /* Compile to bytecode. */
3151 r = si_compile_llvm(sscreen, &shader->binary, &shader->config, compiler,
3152 &ctx.ac, debug, ctx.type, si_get_shader_name(shader),
3153 si_should_optimize_less(compiler, shader->selector));
3154 si_llvm_dispose(&ctx);
3155 if (r) {
3156 fprintf(stderr, "LLVM failed to compile shader\n");
3157 return r;
3158 }
3159
3160 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
3161 * LLVM 3.9svn has this bug.
3162 */
3163 if (sel->type == PIPE_SHADER_COMPUTE) {
3164 unsigned wave_size = sscreen->compute_wave_size;
3165 unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd *
3166 (wave_size == 32 ? 2 : 1);
3167 unsigned max_sgprs = sscreen->info.num_physical_sgprs_per_simd;
3168 unsigned max_sgprs_per_wave = 128;
3169 unsigned simds_per_tg = 4; /* assuming WGP mode on gfx10 */
3170 unsigned threads_per_tg = si_get_max_workgroup_size(shader);
3171 unsigned waves_per_tg = DIV_ROUND_UP(threads_per_tg, wave_size);
3172 unsigned waves_per_simd = DIV_ROUND_UP(waves_per_tg, simds_per_tg);
3173
3174 max_vgprs = max_vgprs / waves_per_simd;
3175 max_sgprs = MIN2(max_sgprs / waves_per_simd, max_sgprs_per_wave);
3176
3177 if (shader->config.num_sgprs > max_sgprs ||
3178 shader->config.num_vgprs > max_vgprs) {
3179 fprintf(stderr, "LLVM failed to compile a shader correctly: "
3180 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
3181 shader->config.num_sgprs, shader->config.num_vgprs,
3182 max_sgprs, max_vgprs);
3183
3184 /* Just terminate the process, because dependent
3185 * shaders can hang due to bad input data, but use
3186 * the env var to allow shader-db to work.
3187 */
3188 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
3189 abort();
3190 }
3191 }
3192
3193 /* Add the scratch offset to input SGPRs. */
3194 if (shader->config.scratch_bytes_per_wave && !si_is_merged_shader(&ctx))
3195 shader->info.num_input_sgprs += 1; /* scratch byte offset */
3196
3197 /* Calculate the number of fragment input VGPRs. */
3198 if (ctx.type == PIPE_SHADER_FRAGMENT) {
3199 shader->info.num_input_vgprs = ac_get_fs_input_vgpr_cnt(&shader->config,
3200 &shader->info.face_vgpr_index,
3201 &shader->info.ancillary_vgpr_index);
3202 }
3203
3204 si_calculate_max_simd_waves(shader);
3205 si_shader_dump_stats_for_shader_db(sscreen, shader, debug);
3206 return 0;
3207 }
3208
3209 /**
3210 * Create, compile and return a shader part (prolog or epilog).
3211 *
3212 * \param sscreen screen
3213 * \param list list of shader parts of the same category
3214 * \param type shader type
3215 * \param key shader part key
3216 * \param prolog whether the part being requested is a prolog
3217 * \param tm LLVM target machine
3218 * \param debug debug callback
3219 * \param build the callback responsible for building the main function
3220 * \return non-NULL on success
3221 */
3222 static struct si_shader_part *
3223 si_get_shader_part(struct si_screen *sscreen,
3224 struct si_shader_part **list,
3225 enum pipe_shader_type type,
3226 bool prolog,
3227 union si_shader_part_key *key,
3228 struct ac_llvm_compiler *compiler,
3229 struct pipe_debug_callback *debug,
3230 void (*build)(struct si_shader_context *,
3231 union si_shader_part_key *),
3232 const char *name)
3233 {
3234 struct si_shader_part *result;
3235
3236 simple_mtx_lock(&sscreen->shader_parts_mutex);
3237
3238 /* Find existing. */
3239 for (result = *list; result; result = result->next) {
3240 if (memcmp(&result->key, key, sizeof(*key)) == 0) {
3241 simple_mtx_unlock(&sscreen->shader_parts_mutex);
3242 return result;
3243 }
3244 }
3245
3246 /* Compile a new one. */
3247 result = CALLOC_STRUCT(si_shader_part);
3248 result->key = *key;
3249
3250 struct si_shader shader = {};
3251
3252 switch (type) {
3253 case PIPE_SHADER_VERTEX:
3254 shader.key.as_ls = key->vs_prolog.as_ls;
3255 shader.key.as_es = key->vs_prolog.as_es;
3256 shader.key.as_ngg = key->vs_prolog.as_ngg;
3257 break;
3258 case PIPE_SHADER_TESS_CTRL:
3259 assert(!prolog);
3260 shader.key.part.tcs.epilog = key->tcs_epilog.states;
3261 break;
3262 case PIPE_SHADER_GEOMETRY:
3263 assert(prolog);
3264 shader.key.as_ngg = key->gs_prolog.as_ngg;
3265 break;
3266 case PIPE_SHADER_FRAGMENT:
3267 if (prolog)
3268 shader.key.part.ps.prolog = key->ps_prolog.states;
3269 else
3270 shader.key.part.ps.epilog = key->ps_epilog.states;
3271 break;
3272 default:
3273 unreachable("bad shader part");
3274 }
3275
3276 struct si_shader_context ctx;
3277 si_llvm_context_init(&ctx, sscreen, compiler,
3278 si_get_wave_size(sscreen, type, shader.key.as_ngg,
3279 shader.key.as_es));
3280 ctx.shader = &shader;
3281 ctx.type = type;
3282
3283 build(&ctx, key);
3284
3285 /* Compile. */
3286 si_llvm_optimize_module(&ctx);
3287
3288 if (si_compile_llvm(sscreen, &result->binary, &result->config, compiler,
3289 &ctx.ac, debug, ctx.type, name, false)) {
3290 FREE(result);
3291 result = NULL;
3292 goto out;
3293 }
3294
3295 result->next = *list;
3296 *list = result;
3297
3298 out:
3299 si_llvm_dispose(&ctx);
3300 simple_mtx_unlock(&sscreen->shader_parts_mutex);
3301 return result;
3302 }
3303
3304 /**
3305 * Build the vertex shader prolog function.
3306 *
3307 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
3308 * All inputs are returned unmodified. The vertex load indices are
3309 * stored after them, which will be used by the API VS for fetching inputs.
3310 *
3311 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
3312 * input_v0,
3313 * input_v1,
3314 * input_v2,
3315 * input_v3,
3316 * (VertexID + BaseVertex),
3317 * (InstanceID + StartInstance),
3318 * (InstanceID / 2 + StartInstance)
3319 */
3320 static void si_build_vs_prolog_function(struct si_shader_context *ctx,
3321 union si_shader_part_key *key)
3322 {
3323 LLVMTypeRef *returns;
3324 LLVMValueRef ret, func;
3325 int num_returns, i;
3326 unsigned first_vs_vgpr = key->vs_prolog.num_merged_next_stage_vgprs;
3327 unsigned num_input_vgprs = key->vs_prolog.num_merged_next_stage_vgprs + 4 +
3328 (key->vs_prolog.has_ngg_cull_inputs ? 1 : 0);
3329 struct ac_arg input_sgpr_param[key->vs_prolog.num_input_sgprs];
3330 struct ac_arg input_vgpr_param[13];
3331 LLVMValueRef input_vgprs[13];
3332 unsigned num_all_input_regs = key->vs_prolog.num_input_sgprs +
3333 num_input_vgprs;
3334 unsigned user_sgpr_base = key->vs_prolog.num_merged_next_stage_vgprs ? 8 : 0;
3335
3336 memset(&ctx->args, 0, sizeof(ctx->args));
3337
3338 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
3339 returns = alloca((num_all_input_regs + key->vs_prolog.num_inputs) *
3340 sizeof(LLVMTypeRef));
3341 num_returns = 0;
3342
3343 /* Declare input and output SGPRs. */
3344 for (i = 0; i < key->vs_prolog.num_input_sgprs; i++) {
3345 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT,
3346 &input_sgpr_param[i]);
3347 returns[num_returns++] = ctx->i32;
3348 }
3349
3350 struct ac_arg merged_wave_info = input_sgpr_param[3];
3351
3352 /* Preloaded VGPRs (outputs must be floats) */
3353 for (i = 0; i < num_input_vgprs; i++) {
3354 ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &input_vgpr_param[i]);
3355 returns[num_returns++] = ctx->f32;
3356 }
3357
3358 /* Vertex load indices. */
3359 for (i = 0; i < key->vs_prolog.num_inputs; i++)
3360 returns[num_returns++] = ctx->f32;
3361
3362 /* Create the function. */
3363 si_llvm_create_func(ctx, "vs_prolog", returns, num_returns, 0);
3364 func = ctx->main_fn;
3365
3366 for (i = 0; i < num_input_vgprs; i++) {
3367 input_vgprs[i] = ac_get_arg(&ctx->ac, input_vgpr_param[i]);
3368 }
3369
3370 if (key->vs_prolog.num_merged_next_stage_vgprs) {
3371 if (!key->vs_prolog.is_monolithic)
3372 si_init_exec_from_input(ctx, merged_wave_info, 0);
3373
3374 if (key->vs_prolog.as_ls &&
3375 ctx->screen->info.has_ls_vgpr_init_bug) {
3376 /* If there are no HS threads, SPI loads the LS VGPRs
3377 * starting at VGPR 0. Shift them back to where they
3378 * belong.
3379 */
3380 LLVMValueRef has_hs_threads =
3381 LLVMBuildICmp(ctx->ac.builder, LLVMIntNE,
3382 si_unpack_param(ctx, input_sgpr_param[3], 8, 8),
3383 ctx->i32_0, "");
3384
3385 for (i = 4; i > 0; --i) {
3386 input_vgprs[i + 1] =
3387 LLVMBuildSelect(ctx->ac.builder, has_hs_threads,
3388 input_vgprs[i + 1],
3389 input_vgprs[i - 1], "");
3390 }
3391 }
3392 }
3393
3394 unsigned vertex_id_vgpr = first_vs_vgpr;
3395 unsigned instance_id_vgpr =
3396 ctx->screen->info.chip_class >= GFX10 ?
3397 first_vs_vgpr + 3 :
3398 first_vs_vgpr + (key->vs_prolog.as_ls ? 2 : 1);
3399
3400 ctx->abi.vertex_id = input_vgprs[vertex_id_vgpr];
3401 ctx->abi.instance_id = input_vgprs[instance_id_vgpr];
3402
3403 /* InstanceID = VertexID >> 16;
3404 * VertexID = VertexID & 0xffff;
3405 */
3406 if (key->vs_prolog.states.unpack_instance_id_from_vertex_id) {
3407 ctx->abi.instance_id = LLVMBuildLShr(ctx->ac.builder, ctx->abi.vertex_id,
3408 LLVMConstInt(ctx->i32, 16, 0), "");
3409 ctx->abi.vertex_id = LLVMBuildAnd(ctx->ac.builder, ctx->abi.vertex_id,
3410 LLVMConstInt(ctx->i32, 0xffff, 0), "");
3411 }
3412
3413 /* Copy inputs to outputs. This should be no-op, as the registers match,
3414 * but it will prevent the compiler from overwriting them unintentionally.
3415 */
3416 ret = ctx->return_value;
3417 for (i = 0; i < key->vs_prolog.num_input_sgprs; i++) {
3418 LLVMValueRef p = LLVMGetParam(func, i);
3419 ret = LLVMBuildInsertValue(ctx->ac.builder, ret, p, i, "");
3420 }
3421 for (i = 0; i < num_input_vgprs; i++) {
3422 LLVMValueRef p = input_vgprs[i];
3423
3424 if (i == vertex_id_vgpr)
3425 p = ctx->abi.vertex_id;
3426 else if (i == instance_id_vgpr)
3427 p = ctx->abi.instance_id;
3428
3429 p = ac_to_float(&ctx->ac, p);
3430 ret = LLVMBuildInsertValue(ctx->ac.builder, ret, p,
3431 key->vs_prolog.num_input_sgprs + i, "");
3432 }
3433
3434 /* Compute vertex load indices from instance divisors. */
3435 LLVMValueRef instance_divisor_constbuf = NULL;
3436
3437 if (key->vs_prolog.states.instance_divisor_is_fetched) {
3438 LLVMValueRef list = si_prolog_get_rw_buffers(ctx);
3439 LLVMValueRef buf_index =
3440 LLVMConstInt(ctx->i32, SI_VS_CONST_INSTANCE_DIVISORS, 0);
3441 instance_divisor_constbuf =
3442 ac_build_load_to_sgpr(&ctx->ac, list, buf_index);
3443 }
3444
3445 for (i = 0; i < key->vs_prolog.num_inputs; i++) {
3446 bool divisor_is_one =
3447 key->vs_prolog.states.instance_divisor_is_one & (1u << i);
3448 bool divisor_is_fetched =
3449 key->vs_prolog.states.instance_divisor_is_fetched & (1u << i);
3450 LLVMValueRef index = NULL;
3451
3452 if (divisor_is_one) {
3453 index = ctx->abi.instance_id;
3454 } else if (divisor_is_fetched) {
3455 LLVMValueRef udiv_factors[4];
3456
3457 for (unsigned j = 0; j < 4; j++) {
3458 udiv_factors[j] =
3459 si_buffer_load_const(ctx, instance_divisor_constbuf,
3460 LLVMConstInt(ctx->i32, i*16 + j*4, 0));
3461 udiv_factors[j] = ac_to_integer(&ctx->ac, udiv_factors[j]);
3462 }
3463 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
3464 * Such InstanceID might not be achievable in a reasonable time though.
3465 */
3466 index = ac_build_fast_udiv_nuw(&ctx->ac, ctx->abi.instance_id,
3467 udiv_factors[0], udiv_factors[1],
3468 udiv_factors[2], udiv_factors[3]);
3469 }
3470
3471 if (divisor_is_one || divisor_is_fetched) {
3472 /* Add StartInstance. */
3473 index = LLVMBuildAdd(ctx->ac.builder, index,
3474 LLVMGetParam(ctx->main_fn, user_sgpr_base +
3475 SI_SGPR_START_INSTANCE), "");
3476 } else {
3477 /* VertexID + BaseVertex */
3478 index = LLVMBuildAdd(ctx->ac.builder,
3479 ctx->abi.vertex_id,
3480 LLVMGetParam(func, user_sgpr_base +
3481 SI_SGPR_BASE_VERTEX), "");
3482 }
3483
3484 index = ac_to_float(&ctx->ac, index);
3485 ret = LLVMBuildInsertValue(ctx->ac.builder, ret, index,
3486 ctx->args.arg_count + i, "");
3487 }
3488
3489 si_llvm_build_ret(ctx, ret);
3490 }
3491
3492 static bool si_get_vs_prolog(struct si_screen *sscreen,
3493 struct ac_llvm_compiler *compiler,
3494 struct si_shader *shader,
3495 struct pipe_debug_callback *debug,
3496 struct si_shader *main_part,
3497 const struct si_vs_prolog_bits *key)
3498 {
3499 struct si_shader_selector *vs = main_part->selector;
3500
3501 if (!si_vs_needs_prolog(vs, key))
3502 return true;
3503
3504 /* Get the prolog. */
3505 union si_shader_part_key prolog_key;
3506 si_get_vs_prolog_key(&vs->info, main_part->info.num_input_sgprs, false,
3507 key, shader, &prolog_key);
3508
3509 shader->prolog =
3510 si_get_shader_part(sscreen, &sscreen->vs_prologs,
3511 PIPE_SHADER_VERTEX, true, &prolog_key, compiler,
3512 debug, si_build_vs_prolog_function,
3513 "Vertex Shader Prolog");
3514 return shader->prolog != NULL;
3515 }
3516
3517 /**
3518 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
3519 */
3520 static bool si_shader_select_vs_parts(struct si_screen *sscreen,
3521 struct ac_llvm_compiler *compiler,
3522 struct si_shader *shader,
3523 struct pipe_debug_callback *debug)
3524 {
3525 return si_get_vs_prolog(sscreen, compiler, shader, debug, shader,
3526 &shader->key.part.vs.prolog);
3527 }
3528
3529 /**
3530 * Select and compile (or reuse) TCS parts (epilog).
3531 */
3532 static bool si_shader_select_tcs_parts(struct si_screen *sscreen,
3533 struct ac_llvm_compiler *compiler,
3534 struct si_shader *shader,
3535 struct pipe_debug_callback *debug)
3536 {
3537 if (sscreen->info.chip_class >= GFX9) {
3538 struct si_shader *ls_main_part =
3539 shader->key.part.tcs.ls->main_shader_part_ls;
3540
3541 if (!si_get_vs_prolog(sscreen, compiler, shader, debug, ls_main_part,
3542 &shader->key.part.tcs.ls_prolog))
3543 return false;
3544
3545 shader->previous_stage = ls_main_part;
3546 }
3547
3548 /* Get the epilog. */
3549 union si_shader_part_key epilog_key;
3550 memset(&epilog_key, 0, sizeof(epilog_key));
3551 epilog_key.tcs_epilog.states = shader->key.part.tcs.epilog;
3552
3553 shader->epilog = si_get_shader_part(sscreen, &sscreen->tcs_epilogs,
3554 PIPE_SHADER_TESS_CTRL, false,
3555 &epilog_key, compiler, debug,
3556 si_llvm_build_tcs_epilog,
3557 "Tessellation Control Shader Epilog");
3558 return shader->epilog != NULL;
3559 }
3560
3561 /**
3562 * Select and compile (or reuse) GS parts (prolog).
3563 */
3564 static bool si_shader_select_gs_parts(struct si_screen *sscreen,
3565 struct ac_llvm_compiler *compiler,
3566 struct si_shader *shader,
3567 struct pipe_debug_callback *debug)
3568 {
3569 if (sscreen->info.chip_class >= GFX9) {
3570 struct si_shader *es_main_part;
3571 enum pipe_shader_type es_type = shader->key.part.gs.es->type;
3572
3573 if (shader->key.as_ngg)
3574 es_main_part = shader->key.part.gs.es->main_shader_part_ngg_es;
3575 else
3576 es_main_part = shader->key.part.gs.es->main_shader_part_es;
3577
3578 if (es_type == PIPE_SHADER_VERTEX &&
3579 !si_get_vs_prolog(sscreen, compiler, shader, debug, es_main_part,
3580 &shader->key.part.gs.vs_prolog))
3581 return false;
3582
3583 shader->previous_stage = es_main_part;
3584 }
3585
3586 if (!shader->key.part.gs.prolog.tri_strip_adj_fix)
3587 return true;
3588
3589 union si_shader_part_key prolog_key;
3590 memset(&prolog_key, 0, sizeof(prolog_key));
3591 prolog_key.gs_prolog.states = shader->key.part.gs.prolog;
3592 prolog_key.gs_prolog.as_ngg = shader->key.as_ngg;
3593
3594 shader->prolog2 = si_get_shader_part(sscreen, &sscreen->gs_prologs,
3595 PIPE_SHADER_GEOMETRY, true,
3596 &prolog_key, compiler, debug,
3597 si_llvm_build_gs_prolog,
3598 "Geometry Shader Prolog");
3599 return shader->prolog2 != NULL;
3600 }
3601
3602 /**
3603 * Compute the PS prolog key, which contains all the information needed to
3604 * build the PS prolog function, and set related bits in shader->config.
3605 */
3606 void si_get_ps_prolog_key(struct si_shader *shader,
3607 union si_shader_part_key *key,
3608 bool separate_prolog)
3609 {
3610 struct si_shader_info *info = &shader->selector->info;
3611
3612 memset(key, 0, sizeof(*key));
3613 key->ps_prolog.states = shader->key.part.ps.prolog;
3614 key->ps_prolog.colors_read = info->colors_read;
3615 key->ps_prolog.num_input_sgprs = shader->info.num_input_sgprs;
3616 key->ps_prolog.num_input_vgprs = shader->info.num_input_vgprs;
3617 key->ps_prolog.wqm = info->uses_derivatives &&
3618 (key->ps_prolog.colors_read ||
3619 key->ps_prolog.states.force_persp_sample_interp ||
3620 key->ps_prolog.states.force_linear_sample_interp ||
3621 key->ps_prolog.states.force_persp_center_interp ||
3622 key->ps_prolog.states.force_linear_center_interp ||
3623 key->ps_prolog.states.bc_optimize_for_persp ||
3624 key->ps_prolog.states.bc_optimize_for_linear);
3625 key->ps_prolog.ancillary_vgpr_index = shader->info.ancillary_vgpr_index;
3626
3627 if (info->colors_read) {
3628 unsigned *color = shader->selector->color_attr_index;
3629
3630 if (shader->key.part.ps.prolog.color_two_side) {
3631 /* BCOLORs are stored after the last input. */
3632 key->ps_prolog.num_interp_inputs = info->num_inputs;
3633 key->ps_prolog.face_vgpr_index = shader->info.face_vgpr_index;
3634 if (separate_prolog)
3635 shader->config.spi_ps_input_ena |= S_0286CC_FRONT_FACE_ENA(1);
3636 }
3637
3638 for (unsigned i = 0; i < 2; i++) {
3639 unsigned interp = info->input_interpolate[color[i]];
3640 unsigned location = info->input_interpolate_loc[color[i]];
3641
3642 if (!(info->colors_read & (0xf << i*4)))
3643 continue;
3644
3645 key->ps_prolog.color_attr_index[i] = color[i];
3646
3647 if (shader->key.part.ps.prolog.flatshade_colors &&
3648 interp == TGSI_INTERPOLATE_COLOR)
3649 interp = TGSI_INTERPOLATE_CONSTANT;
3650
3651 switch (interp) {
3652 case TGSI_INTERPOLATE_CONSTANT:
3653 key->ps_prolog.color_interp_vgpr_index[i] = -1;
3654 break;
3655 case TGSI_INTERPOLATE_PERSPECTIVE:
3656 case TGSI_INTERPOLATE_COLOR:
3657 /* Force the interpolation location for colors here. */
3658 if (shader->key.part.ps.prolog.force_persp_sample_interp)
3659 location = TGSI_INTERPOLATE_LOC_SAMPLE;
3660 if (shader->key.part.ps.prolog.force_persp_center_interp)
3661 location = TGSI_INTERPOLATE_LOC_CENTER;
3662
3663 switch (location) {
3664 case TGSI_INTERPOLATE_LOC_SAMPLE:
3665 key->ps_prolog.color_interp_vgpr_index[i] = 0;
3666 if (separate_prolog) {
3667 shader->config.spi_ps_input_ena |=
3668 S_0286CC_PERSP_SAMPLE_ENA(1);
3669 }
3670 break;
3671 case TGSI_INTERPOLATE_LOC_CENTER:
3672 key->ps_prolog.color_interp_vgpr_index[i] = 2;
3673 if (separate_prolog) {
3674 shader->config.spi_ps_input_ena |=
3675 S_0286CC_PERSP_CENTER_ENA(1);
3676 }
3677 break;
3678 case TGSI_INTERPOLATE_LOC_CENTROID:
3679 key->ps_prolog.color_interp_vgpr_index[i] = 4;
3680 if (separate_prolog) {
3681 shader->config.spi_ps_input_ena |=
3682 S_0286CC_PERSP_CENTROID_ENA(1);
3683 }
3684 break;
3685 default:
3686 assert(0);
3687 }
3688 break;
3689 case TGSI_INTERPOLATE_LINEAR:
3690 /* Force the interpolation location for colors here. */
3691 if (shader->key.part.ps.prolog.force_linear_sample_interp)
3692 location = TGSI_INTERPOLATE_LOC_SAMPLE;
3693 if (shader->key.part.ps.prolog.force_linear_center_interp)
3694 location = TGSI_INTERPOLATE_LOC_CENTER;
3695
3696 /* The VGPR assignment for non-monolithic shaders
3697 * works because InitialPSInputAddr is set on the
3698 * main shader and PERSP_PULL_MODEL is never used.
3699 */
3700 switch (location) {
3701 case TGSI_INTERPOLATE_LOC_SAMPLE:
3702 key->ps_prolog.color_interp_vgpr_index[i] =
3703 separate_prolog ? 6 : 9;
3704 if (separate_prolog) {
3705 shader->config.spi_ps_input_ena |=
3706 S_0286CC_LINEAR_SAMPLE_ENA(1);
3707 }
3708 break;
3709 case TGSI_INTERPOLATE_LOC_CENTER:
3710 key->ps_prolog.color_interp_vgpr_index[i] =
3711 separate_prolog ? 8 : 11;
3712 if (separate_prolog) {
3713 shader->config.spi_ps_input_ena |=
3714 S_0286CC_LINEAR_CENTER_ENA(1);
3715 }
3716 break;
3717 case TGSI_INTERPOLATE_LOC_CENTROID:
3718 key->ps_prolog.color_interp_vgpr_index[i] =
3719 separate_prolog ? 10 : 13;
3720 if (separate_prolog) {
3721 shader->config.spi_ps_input_ena |=
3722 S_0286CC_LINEAR_CENTROID_ENA(1);
3723 }
3724 break;
3725 default:
3726 assert(0);
3727 }
3728 break;
3729 default:
3730 assert(0);
3731 }
3732 }
3733 }
3734 }
3735
3736 /**
3737 * Check whether a PS prolog is required based on the key.
3738 */
3739 bool si_need_ps_prolog(const union si_shader_part_key *key)
3740 {
3741 return key->ps_prolog.colors_read ||
3742 key->ps_prolog.states.force_persp_sample_interp ||
3743 key->ps_prolog.states.force_linear_sample_interp ||
3744 key->ps_prolog.states.force_persp_center_interp ||
3745 key->ps_prolog.states.force_linear_center_interp ||
3746 key->ps_prolog.states.bc_optimize_for_persp ||
3747 key->ps_prolog.states.bc_optimize_for_linear ||
3748 key->ps_prolog.states.poly_stipple ||
3749 key->ps_prolog.states.samplemask_log_ps_iter;
3750 }
3751
3752 /**
3753 * Compute the PS epilog key, which contains all the information needed to
3754 * build the PS epilog function.
3755 */
3756 void si_get_ps_epilog_key(struct si_shader *shader,
3757 union si_shader_part_key *key)
3758 {
3759 struct si_shader_info *info = &shader->selector->info;
3760 memset(key, 0, sizeof(*key));
3761 key->ps_epilog.colors_written = info->colors_written;
3762 key->ps_epilog.writes_z = info->writes_z;
3763 key->ps_epilog.writes_stencil = info->writes_stencil;
3764 key->ps_epilog.writes_samplemask = info->writes_samplemask;
3765 key->ps_epilog.states = shader->key.part.ps.epilog;
3766 }
3767
3768 /**
3769 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
3770 */
3771 static bool si_shader_select_ps_parts(struct si_screen *sscreen,
3772 struct ac_llvm_compiler *compiler,
3773 struct si_shader *shader,
3774 struct pipe_debug_callback *debug)
3775 {
3776 union si_shader_part_key prolog_key;
3777 union si_shader_part_key epilog_key;
3778
3779 /* Get the prolog. */
3780 si_get_ps_prolog_key(shader, &prolog_key, true);
3781
3782 /* The prolog is a no-op if these aren't set. */
3783 if (si_need_ps_prolog(&prolog_key)) {
3784 shader->prolog =
3785 si_get_shader_part(sscreen, &sscreen->ps_prologs,
3786 PIPE_SHADER_FRAGMENT, true,
3787 &prolog_key, compiler, debug,
3788 si_llvm_build_ps_prolog,
3789 "Fragment Shader Prolog");
3790 if (!shader->prolog)
3791 return false;
3792 }
3793
3794 /* Get the epilog. */
3795 si_get_ps_epilog_key(shader, &epilog_key);
3796
3797 shader->epilog =
3798 si_get_shader_part(sscreen, &sscreen->ps_epilogs,
3799 PIPE_SHADER_FRAGMENT, false,
3800 &epilog_key, compiler, debug,
3801 si_llvm_build_ps_epilog,
3802 "Fragment Shader Epilog");
3803 if (!shader->epilog)
3804 return false;
3805
3806 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
3807 if (shader->key.part.ps.prolog.poly_stipple) {
3808 shader->config.spi_ps_input_ena |= S_0286CC_POS_FIXED_PT_ENA(1);
3809 assert(G_0286CC_POS_FIXED_PT_ENA(shader->config.spi_ps_input_addr));
3810 }
3811
3812 /* Set up the enable bits for per-sample shading if needed. */
3813 if (shader->key.part.ps.prolog.force_persp_sample_interp &&
3814 (G_0286CC_PERSP_CENTER_ENA(shader->config.spi_ps_input_ena) ||
3815 G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_ena))) {
3816 shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTER_ENA;
3817 shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTROID_ENA;
3818 shader->config.spi_ps_input_ena |= S_0286CC_PERSP_SAMPLE_ENA(1);
3819 }
3820 if (shader->key.part.ps.prolog.force_linear_sample_interp &&
3821 (G_0286CC_LINEAR_CENTER_ENA(shader->config.spi_ps_input_ena) ||
3822 G_0286CC_LINEAR_CENTROID_ENA(shader->config.spi_ps_input_ena))) {
3823 shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTER_ENA;
3824 shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTROID_ENA;
3825 shader->config.spi_ps_input_ena |= S_0286CC_LINEAR_SAMPLE_ENA(1);
3826 }
3827 if (shader->key.part.ps.prolog.force_persp_center_interp &&
3828 (G_0286CC_PERSP_SAMPLE_ENA(shader->config.spi_ps_input_ena) ||
3829 G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_ena))) {
3830 shader->config.spi_ps_input_ena &= C_0286CC_PERSP_SAMPLE_ENA;
3831 shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTROID_ENA;
3832 shader->config.spi_ps_input_ena |= S_0286CC_PERSP_CENTER_ENA(1);
3833 }
3834 if (shader->key.part.ps.prolog.force_linear_center_interp &&
3835 (G_0286CC_LINEAR_SAMPLE_ENA(shader->config.spi_ps_input_ena) ||
3836 G_0286CC_LINEAR_CENTROID_ENA(shader->config.spi_ps_input_ena))) {
3837 shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_SAMPLE_ENA;
3838 shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTROID_ENA;
3839 shader->config.spi_ps_input_ena |= S_0286CC_LINEAR_CENTER_ENA(1);
3840 }
3841
3842 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
3843 if (G_0286CC_POS_W_FLOAT_ENA(shader->config.spi_ps_input_ena) &&
3844 !(shader->config.spi_ps_input_ena & 0xf)) {
3845 shader->config.spi_ps_input_ena |= S_0286CC_PERSP_CENTER_ENA(1);
3846 assert(G_0286CC_PERSP_CENTER_ENA(shader->config.spi_ps_input_addr));
3847 }
3848
3849 /* At least one pair of interpolation weights must be enabled. */
3850 if (!(shader->config.spi_ps_input_ena & 0x7f)) {
3851 shader->config.spi_ps_input_ena |= S_0286CC_LINEAR_CENTER_ENA(1);
3852 assert(G_0286CC_LINEAR_CENTER_ENA(shader->config.spi_ps_input_addr));
3853 }
3854
3855 /* Samplemask fixup requires the sample ID. */
3856 if (shader->key.part.ps.prolog.samplemask_log_ps_iter) {
3857 shader->config.spi_ps_input_ena |= S_0286CC_ANCILLARY_ENA(1);
3858 assert(G_0286CC_ANCILLARY_ENA(shader->config.spi_ps_input_addr));
3859 }
3860
3861 /* The sample mask input is always enabled, because the API shader always
3862 * passes it through to the epilog. Disable it here if it's unused.
3863 */
3864 if (!shader->key.part.ps.epilog.poly_line_smoothing &&
3865 !shader->selector->info.reads_samplemask)
3866 shader->config.spi_ps_input_ena &= C_0286CC_SAMPLE_COVERAGE_ENA;
3867
3868 return true;
3869 }
3870
3871 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
3872 unsigned *lds_size)
3873 {
3874 /* If tessellation is all offchip and on-chip GS isn't used, this
3875 * workaround is not needed.
3876 */
3877 return;
3878
3879 /* SPI barrier management bug:
3880 * Make sure we have at least 4k of LDS in use to avoid the bug.
3881 * It applies to workgroup sizes of more than one wavefront.
3882 */
3883 if (sscreen->info.family == CHIP_BONAIRE ||
3884 sscreen->info.family == CHIP_KABINI)
3885 *lds_size = MAX2(*lds_size, 8);
3886 }
3887
3888 void si_fix_resource_usage(struct si_screen *sscreen, struct si_shader *shader)
3889 {
3890 unsigned min_sgprs = shader->info.num_input_sgprs + 2; /* VCC */
3891
3892 shader->config.num_sgprs = MAX2(shader->config.num_sgprs, min_sgprs);
3893
3894 if (shader->selector->type == PIPE_SHADER_COMPUTE &&
3895 si_get_max_workgroup_size(shader) > sscreen->compute_wave_size) {
3896 si_multiwave_lds_size_workaround(sscreen,
3897 &shader->config.lds_size);
3898 }
3899 }
3900
3901 bool si_create_shader_variant(struct si_screen *sscreen,
3902 struct ac_llvm_compiler *compiler,
3903 struct si_shader *shader,
3904 struct pipe_debug_callback *debug)
3905 {
3906 struct si_shader_selector *sel = shader->selector;
3907 struct si_shader *mainp = *si_get_main_shader_part(sel, &shader->key);
3908 int r;
3909
3910 /* LS, ES, VS are compiled on demand if the main part hasn't been
3911 * compiled for that stage.
3912 *
3913 * GS are compiled on demand if the main part hasn't been compiled
3914 * for the chosen NGG-ness.
3915 *
3916 * Vertex shaders are compiled on demand when a vertex fetch
3917 * workaround must be applied.
3918 */
3919 if (shader->is_monolithic) {
3920 /* Monolithic shader (compiled as a whole, has many variants,
3921 * may take a long time to compile).
3922 */
3923 r = si_compile_shader(sscreen, compiler, shader, debug);
3924 if (r)
3925 return false;
3926 } else {
3927 /* The shader consists of several parts:
3928 *
3929 * - the middle part is the user shader, it has 1 variant only
3930 * and it was compiled during the creation of the shader
3931 * selector
3932 * - the prolog part is inserted at the beginning
3933 * - the epilog part is inserted at the end
3934 *
3935 * The prolog and epilog have many (but simple) variants.
3936 *
3937 * Starting with gfx9, geometry and tessellation control
3938 * shaders also contain the prolog and user shader parts of
3939 * the previous shader stage.
3940 */
3941
3942 if (!mainp)
3943 return false;
3944
3945 /* Copy the compiled shader data over. */
3946 shader->is_binary_shared = true;
3947 shader->binary = mainp->binary;
3948 shader->config = mainp->config;
3949 shader->info.num_input_sgprs = mainp->info.num_input_sgprs;
3950 shader->info.num_input_vgprs = mainp->info.num_input_vgprs;
3951 shader->info.face_vgpr_index = mainp->info.face_vgpr_index;
3952 shader->info.ancillary_vgpr_index = mainp->info.ancillary_vgpr_index;
3953 memcpy(shader->info.vs_output_param_offset,
3954 mainp->info.vs_output_param_offset,
3955 sizeof(mainp->info.vs_output_param_offset));
3956 shader->info.uses_instanceid = mainp->info.uses_instanceid;
3957 shader->info.nr_pos_exports = mainp->info.nr_pos_exports;
3958 shader->info.nr_param_exports = mainp->info.nr_param_exports;
3959
3960 /* Select prologs and/or epilogs. */
3961 switch (sel->type) {
3962 case PIPE_SHADER_VERTEX:
3963 if (!si_shader_select_vs_parts(sscreen, compiler, shader, debug))
3964 return false;
3965 break;
3966 case PIPE_SHADER_TESS_CTRL:
3967 if (!si_shader_select_tcs_parts(sscreen, compiler, shader, debug))
3968 return false;
3969 break;
3970 case PIPE_SHADER_TESS_EVAL:
3971 break;
3972 case PIPE_SHADER_GEOMETRY:
3973 if (!si_shader_select_gs_parts(sscreen, compiler, shader, debug))
3974 return false;
3975 break;
3976 case PIPE_SHADER_FRAGMENT:
3977 if (!si_shader_select_ps_parts(sscreen, compiler, shader, debug))
3978 return false;
3979
3980 /* Make sure we have at least as many VGPRs as there
3981 * are allocated inputs.
3982 */
3983 shader->config.num_vgprs = MAX2(shader->config.num_vgprs,
3984 shader->info.num_input_vgprs);
3985 break;
3986 default:;
3987 }
3988
3989 /* Update SGPR and VGPR counts. */
3990 if (shader->prolog) {
3991 shader->config.num_sgprs = MAX2(shader->config.num_sgprs,
3992 shader->prolog->config.num_sgprs);
3993 shader->config.num_vgprs = MAX2(shader->config.num_vgprs,
3994 shader->prolog->config.num_vgprs);
3995 }
3996 if (shader->previous_stage) {
3997 shader->config.num_sgprs = MAX2(shader->config.num_sgprs,
3998 shader->previous_stage->config.num_sgprs);
3999 shader->config.num_vgprs = MAX2(shader->config.num_vgprs,
4000 shader->previous_stage->config.num_vgprs);
4001 shader->config.spilled_sgprs =
4002 MAX2(shader->config.spilled_sgprs,
4003 shader->previous_stage->config.spilled_sgprs);
4004 shader->config.spilled_vgprs =
4005 MAX2(shader->config.spilled_vgprs,
4006 shader->previous_stage->config.spilled_vgprs);
4007 shader->info.private_mem_vgprs =
4008 MAX2(shader->info.private_mem_vgprs,
4009 shader->previous_stage->info.private_mem_vgprs);
4010 shader->config.scratch_bytes_per_wave =
4011 MAX2(shader->config.scratch_bytes_per_wave,
4012 shader->previous_stage->config.scratch_bytes_per_wave);
4013 shader->info.uses_instanceid |=
4014 shader->previous_stage->info.uses_instanceid;
4015 }
4016 if (shader->prolog2) {
4017 shader->config.num_sgprs = MAX2(shader->config.num_sgprs,
4018 shader->prolog2->config.num_sgprs);
4019 shader->config.num_vgprs = MAX2(shader->config.num_vgprs,
4020 shader->prolog2->config.num_vgprs);
4021 }
4022 if (shader->epilog) {
4023 shader->config.num_sgprs = MAX2(shader->config.num_sgprs,
4024 shader->epilog->config.num_sgprs);
4025 shader->config.num_vgprs = MAX2(shader->config.num_vgprs,
4026 shader->epilog->config.num_vgprs);
4027 }
4028 si_calculate_max_simd_waves(shader);
4029 }
4030
4031 if (shader->key.as_ngg) {
4032 assert(!shader->key.as_es && !shader->key.as_ls);
4033 gfx10_ngg_calculate_subgroup_info(shader);
4034 } else if (sscreen->info.chip_class >= GFX9 && sel->type == PIPE_SHADER_GEOMETRY) {
4035 gfx9_get_gs_info(shader->previous_stage_sel, sel, &shader->gs_info);
4036 }
4037
4038 si_fix_resource_usage(sscreen, shader);
4039 si_shader_dump(sscreen, shader, debug, stderr, true);
4040
4041 /* Upload. */
4042 if (!si_shader_binary_upload(sscreen, shader, 0)) {
4043 fprintf(stderr, "LLVM failed to upload shader\n");
4044 return false;
4045 }
4046
4047 return true;
4048 }
4049
4050 void si_shader_destroy(struct si_shader *shader)
4051 {
4052 if (shader->scratch_bo)
4053 si_resource_reference(&shader->scratch_bo, NULL);
4054
4055 si_resource_reference(&shader->bo, NULL);
4056
4057 if (!shader->is_binary_shared)
4058 si_shader_binary_clean(&shader->binary);
4059
4060 free(shader->shader_log);
4061 }