2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <llvm/Config/llvm-config.h>
27 #include "util/u_memory.h"
28 #include "util/u_string.h"
29 #include "tgsi/tgsi_build.h"
30 #include "tgsi/tgsi_strings.h"
31 #include "tgsi/tgsi_util.h"
32 #include "tgsi/tgsi_dump.h"
33 #include "tgsi/tgsi_from_mesa.h"
35 #include "ac_binary.h"
36 #include "ac_exp_param.h"
37 #include "ac_shader_util.h"
39 #include "ac_llvm_util.h"
40 #include "si_shader_internal.h"
44 #include "compiler/nir/nir.h"
45 #include "compiler/nir/nir_serialize.h"
47 static const char scratch_rsrc_dword0_symbol
[] =
48 "SCRATCH_RSRC_DWORD0";
50 static const char scratch_rsrc_dword1_symbol
[] =
51 "SCRATCH_RSRC_DWORD1";
53 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
54 struct si_screen
*sscreen
,
55 struct ac_llvm_compiler
*compiler
,
59 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
60 struct lp_build_tgsi_context
*bld_base
,
61 struct lp_build_emit_data
*emit_data
);
63 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
65 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
70 union si_shader_part_key
*key
);
71 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
72 union si_shader_part_key
*key
);
73 static void si_fix_resource_usage(struct si_screen
*sscreen
,
74 struct si_shader
*shader
);
76 /* Ideally pass the sample mask input to the PS epilog as v14, which
77 * is its usual location, so that the shader doesn't have to add v_mov.
79 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
81 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
84 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
90 /** Whether the shader runs as a combination of multiple API shaders */
91 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
93 if (ctx
->screen
->info
.chip_class
<= GFX8
)
96 return ctx
->shader
->key
.as_ls
||
97 ctx
->shader
->key
.as_es
||
98 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
99 ctx
->type
== PIPE_SHADER_GEOMETRY
;
102 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
103 static bool is_merged_shader(struct si_shader_context
*ctx
)
105 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
109 * Returns a unique index for a per-patch semantic name and index. The index
110 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
113 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
115 switch (semantic_name
) {
116 case TGSI_SEMANTIC_TESSOUTER
:
118 case TGSI_SEMANTIC_TESSINNER
:
120 case TGSI_SEMANTIC_PATCH
:
125 assert(!"invalid semantic name");
131 * Returns a unique index for a semantic name and index. The index must be
132 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
135 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
138 switch (semantic_name
) {
139 case TGSI_SEMANTIC_POSITION
:
141 case TGSI_SEMANTIC_GENERIC
:
142 /* Since some shader stages use the the highest used IO index
143 * to determine the size to allocate for inputs/outputs
144 * (in LDS, tess and GS rings). GENERIC should be placed right
145 * after POSITION to make that size as small as possible.
147 if (index
< SI_MAX_IO_GENERIC
)
150 assert(!"invalid generic index");
152 case TGSI_SEMANTIC_FOG
:
153 return SI_MAX_IO_GENERIC
+ 1;
154 case TGSI_SEMANTIC_COLOR
:
156 return SI_MAX_IO_GENERIC
+ 2 + index
;
157 case TGSI_SEMANTIC_BCOLOR
:
159 /* If it's a varying, COLOR and BCOLOR alias. */
161 return SI_MAX_IO_GENERIC
+ 2 + index
;
163 return SI_MAX_IO_GENERIC
+ 4 + index
;
164 case TGSI_SEMANTIC_TEXCOORD
:
166 return SI_MAX_IO_GENERIC
+ 6 + index
;
168 /* These are rarely used between LS and HS or ES and GS. */
169 case TGSI_SEMANTIC_CLIPDIST
:
171 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
172 case TGSI_SEMANTIC_CLIPVERTEX
:
173 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
174 case TGSI_SEMANTIC_PSIZE
:
175 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
177 /* These can't be written by LS, HS, and ES. */
178 case TGSI_SEMANTIC_LAYER
:
179 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
180 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
181 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
182 case TGSI_SEMANTIC_PRIMID
:
183 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
184 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
186 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
187 assert(!"invalid semantic name");
193 * Get the value of a shader input parameter and extract a bitfield.
195 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
196 LLVMValueRef value
, unsigned rshift
,
199 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
200 value
= ac_to_integer(&ctx
->ac
, value
);
203 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
204 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
206 if (rshift
+ bitwidth
< 32) {
207 unsigned mask
= (1 << bitwidth
) - 1;
208 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
209 LLVMConstInt(ctx
->i32
, mask
, 0), "");
215 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
216 struct ac_arg param
, unsigned rshift
,
219 LLVMValueRef value
= ac_get_arg(&ctx
->ac
, param
);
221 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
224 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
227 case PIPE_SHADER_TESS_CTRL
:
228 return si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 0, 8);
230 case PIPE_SHADER_TESS_EVAL
:
231 return ac_get_arg(&ctx
->ac
, ctx
->tes_rel_patch_id
);
239 /* Tessellation shaders pass outputs to the next shader using LDS.
241 * LS outputs = TCS inputs
242 * TCS outputs = TES inputs
245 * - TCS inputs for patch 0
246 * - TCS inputs for patch 1
247 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
249 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
250 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
251 * - TCS outputs for patch 1
252 * - Per-patch TCS outputs for patch 1
253 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
254 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
257 * All three shaders VS(LS), TCS, TES share the same LDS space.
261 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
263 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 8, 13);
266 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
268 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
270 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
271 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
273 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
276 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
278 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
280 return LLVMConstInt(ctx
->i32
, stride
, 0);
283 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
285 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
286 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 0, 13);
288 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
289 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
290 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
291 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
292 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
293 num_patch_outputs
* 4;
294 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
298 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
300 return LLVMBuildMul(ctx
->ac
.builder
,
301 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 0, 16),
302 LLVMConstInt(ctx
->i32
, 4, 0), "");
306 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
308 return LLVMBuildMul(ctx
->ac
.builder
,
309 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 16, 16),
310 LLVMConstInt(ctx
->i32
, 4, 0), "");
314 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
316 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
317 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
319 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
323 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
325 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
326 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
327 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
329 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
333 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
335 LLVMValueRef patch0_patch_data_offset
=
336 get_tcs_out_patch0_patch_data_offset(ctx
);
337 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
338 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
340 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
343 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
345 unsigned tcs_out_vertices
=
346 ctx
->shader
->selector
?
347 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
349 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
350 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
351 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
353 return si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 6, 6);
356 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
361 case PIPE_SHADER_VERTEX
:
362 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
363 return LLVMConstInt(ctx
->i32
, stride
, 0);
365 case PIPE_SHADER_TESS_CTRL
:
366 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
367 ctx
->shader
->is_monolithic
) {
368 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
369 return LLVMConstInt(ctx
->i32
, stride
, 0);
371 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 24, 8);
379 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
380 LLVMValueRef i32
, unsigned index
)
385 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
386 LLVMConstInt(ctx
->i32
, 16, 0), "");
388 return LLVMBuildSExt(ctx
->ac
.builder
,
389 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
394 void si_llvm_load_input_vs(
395 struct si_shader_context
*ctx
,
396 unsigned input_index
,
399 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
400 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
402 if (vs_blit_property
) {
403 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
404 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
405 LLVMIntULE
, vertex_id
,
407 /* Use LLVMIntNE, because we have 3 vertices and only
408 * the middle one should use y2.
410 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
411 LLVMIntNE
, vertex_id
,
414 unsigned param_vs_blit_inputs
= ctx
->vs_blit_inputs
.arg_index
;
415 if (input_index
== 0) {
417 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
418 param_vs_blit_inputs
);
419 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
420 param_vs_blit_inputs
+ 1);
422 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
423 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
424 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
425 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
427 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
429 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
432 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
433 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
434 out
[2] = LLVMGetParam(ctx
->main_fn
,
435 param_vs_blit_inputs
+ 2);
436 out
[3] = ctx
->ac
.f32_1
;
440 /* Color or texture coordinates: */
441 assert(input_index
== 1);
443 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
444 for (int i
= 0; i
< 4; i
++) {
445 out
[i
] = LLVMGetParam(ctx
->main_fn
,
446 param_vs_blit_inputs
+ 3 + i
);
449 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
450 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
451 param_vs_blit_inputs
+ 3);
452 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
453 param_vs_blit_inputs
+ 4);
454 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
455 param_vs_blit_inputs
+ 5);
456 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
457 param_vs_blit_inputs
+ 6);
459 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
461 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
463 out
[2] = LLVMGetParam(ctx
->main_fn
,
464 param_vs_blit_inputs
+ 7);
465 out
[3] = LLVMGetParam(ctx
->main_fn
,
466 param_vs_blit_inputs
+ 8);
471 union si_vs_fix_fetch fix_fetch
;
472 LLVMValueRef t_list_ptr
;
473 LLVMValueRef t_offset
;
475 LLVMValueRef vertex_index
;
478 /* Load the T list */
479 t_list_ptr
= ac_get_arg(&ctx
->ac
, ctx
->vertex_buffers
);
481 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
483 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
485 vertex_index
= LLVMGetParam(ctx
->main_fn
,
486 ctx
->vertex_index0
.arg_index
+
489 /* Use the open-coded implementation for all loads of doubles and
490 * of dword-sized data that needs fixups. We need to insert conversion
491 * code anyway, and the amd/common code does it for us.
493 * Note: On LLVM <= 8, we can only open-code formats with
494 * channel size >= 4 bytes.
496 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
497 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
499 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
500 (fix_fetch
.u
.log_size
== 2)) {
501 tmp
= ac_build_opencoded_load_format(
502 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
503 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
504 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
505 for (unsigned i
= 0; i
< 4; ++i
)
506 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
510 /* Do multiple loads for special formats. */
511 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
512 LLVMValueRef fetches
[4];
513 unsigned num_fetches
;
514 unsigned fetch_stride
;
515 unsigned channels_per_fetch
;
517 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
518 num_fetches
= MIN2(required_channels
, 3);
519 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
520 channels_per_fetch
= 1;
524 channels_per_fetch
= required_channels
;
527 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
528 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
529 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
530 channels_per_fetch
, 0, true);
533 if (num_fetches
== 1 && channels_per_fetch
> 1) {
534 LLVMValueRef fetch
= fetches
[0];
535 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
536 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
537 fetches
[i
] = LLVMBuildExtractElement(
538 ctx
->ac
.builder
, fetch
, tmp
, "");
540 num_fetches
= channels_per_fetch
;
541 channels_per_fetch
= 1;
544 for (unsigned i
= num_fetches
; i
< 4; ++i
)
545 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
547 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
548 required_channels
== 4) {
549 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
550 fetches
[3] = ctx
->ac
.i32_1
;
552 fetches
[3] = ctx
->ac
.f32_1
;
553 } else if (fix_fetch
.u
.log_size
== 3 &&
554 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
555 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
556 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
557 required_channels
== 4) {
558 /* For 2_10_10_10, the hardware returns an unsigned value;
559 * convert it to a signed one.
561 LLVMValueRef tmp
= fetches
[3];
562 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
564 /* First, recover the sign-extended signed integer value. */
565 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
566 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
568 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
570 /* For the integer-like cases, do a natural sign extension.
572 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
573 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
576 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
577 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
578 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
579 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
581 /* Convert back to the right type. */
582 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
584 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
585 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
586 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
587 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
588 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
589 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
595 for (unsigned i
= 0; i
< 4; ++i
)
596 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
599 static void declare_input_vs(
600 struct si_shader_context
*ctx
,
601 unsigned input_index
,
602 const struct tgsi_full_declaration
*decl
,
605 si_llvm_load_input_vs(ctx
, input_index
, out
);
608 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
615 case PIPE_SHADER_VERTEX
:
616 return ac_get_arg(&ctx
->ac
, ctx
->vs_prim_id
);
617 case PIPE_SHADER_TESS_CTRL
:
618 return ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
);
619 case PIPE_SHADER_TESS_EVAL
:
620 return ac_get_arg(&ctx
->ac
, ctx
->args
.tes_patch_id
);
621 case PIPE_SHADER_GEOMETRY
:
622 return ac_get_arg(&ctx
->ac
, ctx
->args
.gs_prim_id
);
630 * Return the value of tgsi_ind_register for indexing.
631 * This is the indirect index with the constant offset added to it.
633 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
634 const struct tgsi_ind_register
*ind
,
640 if (ind
->File
== TGSI_FILE_ADDRESS
) {
641 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
642 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
644 struct tgsi_full_src_register src
= {};
646 src
.Register
.File
= ind
->File
;
647 src
.Register
.Index
= ind
->Index
;
649 /* Set the second index to 0 for constants. */
650 if (ind
->File
== TGSI_FILE_CONSTANT
)
651 src
.Register
.Dimension
= 1;
653 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
656 result
= ac_to_integer(&ctx
->ac
, result
);
659 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
660 LLVMConstInt(ctx
->i32
, rel_index
, 0));
664 * Like si_get_indirect_index, but restricts the return value to a (possibly
665 * undefined) value inside [0..num).
667 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
668 const struct tgsi_ind_register
*ind
,
669 int rel_index
, unsigned num
)
671 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
673 return si_llvm_bound_index(ctx
, result
, num
);
676 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
677 LLVMValueRef vertex_dw_stride
,
678 LLVMValueRef base_addr
,
679 LLVMValueRef vertex_index
,
680 LLVMValueRef param_index
,
681 ubyte name
, ubyte index
)
683 if (vertex_dw_stride
) {
684 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
685 vertex_dw_stride
, base_addr
);
689 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
690 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
693 int param
= name
== TGSI_SEMANTIC_PATCH
||
694 name
== TGSI_SEMANTIC_TESSINNER
||
695 name
== TGSI_SEMANTIC_TESSOUTER
?
696 si_shader_io_get_unique_index_patch(name
, index
) :
697 si_shader_io_get_unique_index(name
, index
, false);
699 /* Add the base address of the element. */
700 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
701 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
705 * Calculate a dword address given an input or output register and a stride.
707 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
708 const struct tgsi_full_dst_register
*dst
,
709 const struct tgsi_full_src_register
*src
,
710 LLVMValueRef vertex_dw_stride
,
711 LLVMValueRef base_addr
)
713 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
714 ubyte
*name
, *index
, *array_first
;
716 struct tgsi_full_dst_register reg
;
717 LLVMValueRef vertex_index
= NULL
;
718 LLVMValueRef ind_index
= NULL
;
720 /* Set the register description. The address computation is the same
721 * for sources and destinations. */
723 reg
.Register
.File
= src
->Register
.File
;
724 reg
.Register
.Index
= src
->Register
.Index
;
725 reg
.Register
.Indirect
= src
->Register
.Indirect
;
726 reg
.Register
.Dimension
= src
->Register
.Dimension
;
727 reg
.Indirect
= src
->Indirect
;
728 reg
.Dimension
= src
->Dimension
;
729 reg
.DimIndirect
= src
->DimIndirect
;
733 /* If the register is 2-dimensional (e.g. an array of vertices
734 * in a primitive), calculate the base address of the vertex. */
735 if (reg
.Register
.Dimension
) {
736 if (reg
.Dimension
.Indirect
)
737 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
738 1, reg
.Dimension
.Index
);
740 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
743 /* Get information about the register. */
744 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
745 name
= info
->input_semantic_name
;
746 index
= info
->input_semantic_index
;
747 array_first
= info
->input_array_first
;
748 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
749 name
= info
->output_semantic_name
;
750 index
= info
->output_semantic_index
;
751 array_first
= info
->output_array_first
;
757 if (reg
.Register
.Indirect
) {
758 /* Add the relative address of the element. */
759 if (reg
.Indirect
.ArrayID
)
760 input_index
= array_first
[reg
.Indirect
.ArrayID
];
762 input_index
= reg
.Register
.Index
;
764 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
765 1, reg
.Register
.Index
- input_index
);
767 input_index
= reg
.Register
.Index
;
770 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
771 base_addr
, vertex_index
,
772 ind_index
, name
[input_index
],
776 /* The offchip buffer layout for TCS->TES is
778 * - attribute 0 of patch 0 vertex 0
779 * - attribute 0 of patch 0 vertex 1
780 * - attribute 0 of patch 0 vertex 2
782 * - attribute 0 of patch 1 vertex 0
783 * - attribute 0 of patch 1 vertex 1
785 * - attribute 1 of patch 0 vertex 0
786 * - attribute 1 of patch 0 vertex 1
788 * - per patch attribute 0 of patch 0
789 * - per patch attribute 0 of patch 1
792 * Note that every attribute has 4 components.
794 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
795 LLVMValueRef rel_patch_id
,
796 LLVMValueRef vertex_index
,
797 LLVMValueRef param_index
)
799 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
800 LLVMValueRef param_stride
, constant16
;
802 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
803 num_patches
= si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 6);
804 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
807 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
809 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
810 vertices_per_patch
, vertex_index
);
811 param_stride
= total_vertices
;
813 base_addr
= rel_patch_id
;
814 param_stride
= num_patches
;
817 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
818 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
821 LLVMValueRef patch_data_offset
=
822 si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 12, 20);
824 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
825 patch_data_offset
, "");
830 /* This is a generic helper that can be shared by the NIR and TGSI backends */
831 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
832 struct si_shader_context
*ctx
,
833 LLVMValueRef vertex_index
,
834 LLVMValueRef param_index
,
840 unsigned param_index_base
;
842 param_index_base
= is_patch
?
843 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
844 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
847 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
848 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
851 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
854 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
855 vertex_index
, param_index
);
858 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
859 struct si_shader_context
*ctx
,
860 const struct tgsi_full_dst_register
*dst
,
861 const struct tgsi_full_src_register
*src
)
863 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
864 ubyte
*name
, *index
, *array_first
;
865 struct tgsi_full_src_register reg
;
866 LLVMValueRef vertex_index
= NULL
;
867 LLVMValueRef param_index
= NULL
;
870 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
872 if (reg
.Register
.Dimension
) {
874 if (reg
.Dimension
.Indirect
)
875 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
876 1, reg
.Dimension
.Index
);
878 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
881 /* Get information about the register. */
882 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
883 name
= info
->input_semantic_name
;
884 index
= info
->input_semantic_index
;
885 array_first
= info
->input_array_first
;
886 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
887 name
= info
->output_semantic_name
;
888 index
= info
->output_semantic_index
;
889 array_first
= info
->output_array_first
;
895 if (reg
.Register
.Indirect
) {
896 if (reg
.Indirect
.ArrayID
)
897 param_base
= array_first
[reg
.Indirect
.ArrayID
];
899 param_base
= reg
.Register
.Index
;
901 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
902 1, reg
.Register
.Index
- param_base
);
905 param_base
= reg
.Register
.Index
;
908 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
909 param_index
, param_base
,
910 name
, index
, !reg
.Register
.Dimension
);
913 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
914 LLVMTypeRef type
, unsigned swizzle
,
915 LLVMValueRef buffer
, LLVMValueRef offset
,
916 LLVMValueRef base
, bool can_speculate
)
918 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
919 LLVMValueRef value
, value2
;
920 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
923 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
924 0, ac_glc
, can_speculate
, false);
926 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
929 if (!llvm_type_is_64bit(ctx
, type
)) {
930 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
931 0, ac_glc
, can_speculate
, false);
933 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
934 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
935 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
938 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
939 swizzle
* 4, ac_glc
, can_speculate
, false);
941 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
942 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
944 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
948 * Load from LSHS LDS storage.
950 * \param type output value type
951 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
952 * \param dw_addr address in dwords
954 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
955 LLVMTypeRef type
, unsigned swizzle
,
956 LLVMValueRef dw_addr
)
958 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
962 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
964 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
965 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
967 return ac_build_gather_values(&ctx
->ac
, values
,
971 /* Split 64-bit loads. */
972 if (llvm_type_is_64bit(ctx
, type
)) {
975 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
976 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
977 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
980 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
981 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
983 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
985 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
989 * Store to LSHS LDS storage.
991 * \param swizzle offset (typically 0..3)
992 * \param dw_addr address in dwords
993 * \param value value to store
995 static void lshs_lds_store(struct si_shader_context
*ctx
,
996 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
999 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1000 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1002 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1007 TESS_OFFCHIP_RING_TCS
,
1008 TESS_OFFCHIP_RING_TES
,
1011 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1012 enum si_tess_ring ring
)
1014 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1015 LLVMValueRef addr
= ac_get_arg(&ctx
->ac
,
1016 ring
== TESS_OFFCHIP_RING_TES
?
1017 ctx
->tes_offchip_addr
:
1018 ctx
->tcs_out_lds_layout
);
1020 /* TCS only receives high 13 bits of the address. */
1021 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1022 addr
= LLVMBuildAnd(builder
, addr
,
1023 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1026 if (ring
== TCS_FACTOR_RING
) {
1027 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1028 addr
= LLVMBuildAdd(builder
, addr
,
1029 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1032 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1033 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1034 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1035 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1037 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1038 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1039 S_008F0C_OOB_SELECT(3) |
1040 S_008F0C_RESOURCE_LEVEL(1);
1042 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1043 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1045 LLVMValueRef desc
[4];
1047 desc
[1] = LLVMConstInt(ctx
->i32
,
1048 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1049 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1050 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1052 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1055 static LLVMValueRef
fetch_input_tcs(
1056 struct lp_build_tgsi_context
*bld_base
,
1057 const struct tgsi_full_src_register
*reg
,
1058 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1060 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1061 LLVMValueRef dw_addr
, stride
;
1062 unsigned swizzle
= swizzle_in
& 0xffff;
1063 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1064 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1065 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1067 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1070 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1072 LLVMValueRef vertex_index
,
1073 LLVMValueRef param_index
,
1074 unsigned const_index
,
1076 unsigned driver_location
,
1078 unsigned num_components
,
1083 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1084 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1085 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1086 LLVMValueRef dw_addr
, stride
;
1088 driver_location
= driver_location
/ 4;
1091 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1092 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1096 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1098 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1099 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1104 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1110 name
= info
->input_semantic_name
[driver_location
];
1111 index
= info
->input_semantic_index
[driver_location
];
1113 name
= info
->output_semantic_name
[driver_location
];
1114 index
= info
->output_semantic_index
[driver_location
];
1117 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1118 vertex_index
, param_index
,
1121 LLVMValueRef value
[4];
1122 for (unsigned i
= 0; i
< num_components
; i
++) {
1123 unsigned offset
= i
;
1124 if (llvm_type_is_64bit(ctx
, type
))
1127 offset
+= component
;
1128 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1131 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1134 static LLVMValueRef
fetch_output_tcs(
1135 struct lp_build_tgsi_context
*bld_base
,
1136 const struct tgsi_full_src_register
*reg
,
1137 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1139 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1140 LLVMValueRef dw_addr
, stride
;
1141 unsigned swizzle
= (swizzle_in
& 0xffff);
1143 if (reg
->Register
.Dimension
) {
1144 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1145 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1146 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1148 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1149 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1152 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1155 static LLVMValueRef
fetch_input_tes(
1156 struct lp_build_tgsi_context
*bld_base
,
1157 const struct tgsi_full_src_register
*reg
,
1158 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1160 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1161 LLVMValueRef base
, addr
;
1162 unsigned swizzle
= (swizzle_in
& 0xffff);
1164 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1165 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1167 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1168 ctx
->tess_offchip_ring
, base
, addr
, true);
1171 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1173 LLVMValueRef vertex_index
,
1174 LLVMValueRef param_index
,
1175 unsigned const_index
,
1177 unsigned driver_location
,
1179 unsigned num_components
,
1184 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1185 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1186 LLVMValueRef base
, addr
;
1188 driver_location
= driver_location
/ 4;
1190 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1193 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1196 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1197 param_index
, driver_location
,
1198 info
->input_semantic_name
,
1199 info
->input_semantic_index
,
1202 /* TODO: This will generate rather ordinary llvm code, although it
1203 * should be easy for the optimiser to fix up. In future we might want
1204 * to refactor buffer_load(), but for now this maximises code sharing
1205 * between the NIR and TGSI backends.
1207 LLVMValueRef value
[4];
1208 for (unsigned i
= 0; i
< num_components
; i
++) {
1209 unsigned offset
= i
;
1210 if (llvm_type_is_64bit(ctx
, type
)) {
1213 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1216 driver_location
+ 1,
1217 info
->input_semantic_name
,
1218 info
->input_semantic_index
,
1222 offset
= offset
% 4;
1225 offset
+= component
;
1226 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1227 ctx
->tess_offchip_ring
, base
, addr
, true);
1230 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1233 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1234 const struct tgsi_full_instruction
*inst
,
1235 const struct tgsi_opcode_info
*info
,
1237 LLVMValueRef dst
[4])
1239 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1240 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1241 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1242 unsigned chan_index
;
1243 LLVMValueRef dw_addr
, stride
;
1244 LLVMValueRef buffer
, base
, buf_addr
;
1245 LLVMValueRef values
[4];
1246 bool skip_lds_store
;
1247 bool is_tess_factor
= false, is_tess_inner
= false;
1249 /* Only handle per-patch and per-vertex outputs here.
1250 * Vectors will be lowered to scalars and this function will be called again.
1252 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1253 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1254 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1258 if (reg
->Register
.Dimension
) {
1259 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1260 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1261 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1262 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1264 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1265 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1266 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1268 if (!reg
->Register
.Indirect
) {
1269 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1271 /* Always write tess factors into LDS for the TCS epilog. */
1272 if (name
== TGSI_SEMANTIC_TESSINNER
||
1273 name
== TGSI_SEMANTIC_TESSOUTER
) {
1274 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1275 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1276 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1277 is_tess_factor
= true;
1278 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1283 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1285 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1286 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1288 uint32_t writemask
= reg
->Register
.WriteMask
;
1290 chan_index
= u_bit_scan(&writemask
);
1291 LLVMValueRef value
= dst
[chan_index
];
1293 if (inst
->Instruction
.Saturate
)
1294 value
= ac_build_clamp(&ctx
->ac
, value
);
1296 /* Skip LDS stores if there is no LDS read of this output. */
1297 if (!skip_lds_store
)
1298 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1300 value
= ac_to_integer(&ctx
->ac
, value
);
1301 values
[chan_index
] = value
;
1303 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1304 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1306 4 * chan_index
, ac_glc
);
1309 /* Write tess factors into VGPRs for the epilog. */
1310 if (is_tess_factor
&&
1311 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1312 if (!is_tess_inner
) {
1313 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1314 ctx
->invoc0_tess_factors
[chan_index
]);
1315 } else if (chan_index
< 2) {
1316 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1317 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1322 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1323 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1325 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1330 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1331 const struct nir_variable
*var
,
1332 LLVMValueRef vertex_index
,
1333 LLVMValueRef param_index
,
1334 unsigned const_index
,
1338 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1339 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1340 const unsigned component
= var
->data
.location_frac
;
1341 const bool is_patch
= var
->data
.patch
;
1342 unsigned driver_location
= var
->data
.driver_location
;
1343 LLVMValueRef dw_addr
, stride
;
1344 LLVMValueRef buffer
, base
, addr
;
1345 LLVMValueRef values
[8];
1346 bool skip_lds_store
;
1347 bool is_tess_factor
= false, is_tess_inner
= false;
1349 driver_location
= driver_location
/ 4;
1350 ubyte name
= info
->output_semantic_name
[driver_location
];
1351 ubyte index
= info
->output_semantic_index
[driver_location
];
1353 bool is_const
= !param_index
;
1355 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1358 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1359 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1360 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1361 vertex_index
, param_index
,
1364 skip_lds_store
= !info
->reads_pervertex_outputs
;
1366 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1367 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1368 vertex_index
, param_index
,
1371 skip_lds_store
= !info
->reads_perpatch_outputs
;
1373 if (is_const
&& const_index
== 0) {
1374 int name
= info
->output_semantic_name
[driver_location
];
1376 /* Always write tess factors into LDS for the TCS epilog. */
1377 if (name
== TGSI_SEMANTIC_TESSINNER
||
1378 name
== TGSI_SEMANTIC_TESSOUTER
) {
1379 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1380 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1381 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1382 is_tess_factor
= true;
1383 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1388 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1390 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1392 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1393 param_index
, driver_location
,
1394 info
->output_semantic_name
,
1395 info
->output_semantic_index
,
1398 for (unsigned chan
= 0; chan
< 8; chan
++) {
1399 if (!(writemask
& (1 << chan
)))
1401 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1403 unsigned buffer_store_offset
= chan
% 4;
1405 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1408 driver_location
+ 1,
1409 info
->output_semantic_name
,
1410 info
->output_semantic_index
,
1414 /* Skip LDS stores if there is no LDS read of this output. */
1415 if (!skip_lds_store
)
1416 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1418 value
= ac_to_integer(&ctx
->ac
, value
);
1419 values
[chan
] = value
;
1421 if (writemask
!= 0xF && !is_tess_factor
) {
1422 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1424 4 * buffer_store_offset
,
1428 /* Write tess factors into VGPRs for the epilog. */
1429 if (is_tess_factor
&&
1430 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1431 if (!is_tess_inner
) {
1432 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1433 ctx
->invoc0_tess_factors
[chan
]);
1434 } else if (chan
< 2) {
1435 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1436 ctx
->invoc0_tess_factors
[4 + chan
]);
1441 if (writemask
== 0xF && !is_tess_factor
) {
1442 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1444 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1449 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1450 unsigned input_index
,
1451 unsigned vtx_offset_param
,
1455 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1456 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1457 struct si_shader
*shader
= ctx
->shader
;
1458 LLVMValueRef vtx_offset
, soffset
;
1459 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1460 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1461 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1465 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1467 /* GFX9 has the ESGS ring in LDS. */
1468 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1469 unsigned index
= vtx_offset_param
;
1471 switch (index
/ 2) {
1473 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx01_offset
,
1474 index
% 2 ? 16 : 0, 16);
1477 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx23_offset
,
1478 index
% 2 ? 16 : 0, 16);
1481 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx45_offset
,
1482 index
% 2 ? 16 : 0, 16);
1489 unsigned offset
= param
* 4 + swizzle
;
1490 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1491 LLVMConstInt(ctx
->i32
, offset
, false), "");
1493 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1494 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1495 if (llvm_type_is_64bit(ctx
, type
)) {
1496 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1497 &ctx
->ac
.i32_1
, 1, "");
1498 LLVMValueRef values
[2] = {
1500 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1502 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1504 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1507 /* GFX6: input load from the ESGS ring in memory. */
1508 if (swizzle
== ~0) {
1509 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1511 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1512 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1515 return ac_build_gather_values(&ctx
->ac
, values
,
1519 /* Get the vertex offset parameter on GFX6. */
1520 LLVMValueRef gs_vtx_offset
= ac_get_arg(&ctx
->ac
,
1521 ctx
->gs_vtx_offset
[vtx_offset_param
]);
1523 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1524 LLVMConstInt(ctx
->i32
, 4, 0), "");
1526 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1528 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1529 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1530 if (llvm_type_is_64bit(ctx
, type
)) {
1531 LLVMValueRef value2
;
1532 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1534 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1535 ctx
->i32_0
, vtx_offset
, soffset
,
1536 0, ac_glc
, true, false);
1537 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1539 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1542 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1544 unsigned driver_location
,
1546 unsigned num_components
,
1547 unsigned vertex_index
,
1548 unsigned const_index
,
1551 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1553 LLVMValueRef value
[4];
1554 for (unsigned i
= 0; i
< num_components
; i
++) {
1555 unsigned offset
= i
;
1556 if (llvm_type_is_64bit(ctx
, type
))
1559 offset
+= component
;
1560 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4 + const_index
,
1561 vertex_index
, type
, offset
);
1564 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1567 static LLVMValueRef
fetch_input_gs(
1568 struct lp_build_tgsi_context
*bld_base
,
1569 const struct tgsi_full_src_register
*reg
,
1570 enum tgsi_opcode_type type
,
1571 unsigned swizzle_in
)
1573 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1574 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1575 unsigned swizzle
= swizzle_in
& 0xffff;
1577 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1578 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1579 return si_get_primitive_id(ctx
, swizzle
);
1581 if (!reg
->Register
.Dimension
)
1584 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1585 reg
->Dimension
.Index
,
1586 tgsi2llvmtype(bld_base
, type
),
1590 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1592 switch (interpolate
) {
1593 case TGSI_INTERPOLATE_CONSTANT
:
1596 case TGSI_INTERPOLATE_LINEAR
:
1597 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1598 return SI_PARAM_LINEAR_SAMPLE
;
1599 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1600 return SI_PARAM_LINEAR_CENTROID
;
1602 return SI_PARAM_LINEAR_CENTER
;
1604 case TGSI_INTERPOLATE_COLOR
:
1605 case TGSI_INTERPOLATE_PERSPECTIVE
:
1606 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1607 return SI_PARAM_PERSP_SAMPLE
;
1608 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1609 return SI_PARAM_PERSP_CENTROID
;
1611 return SI_PARAM_PERSP_CENTER
;
1614 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1619 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1620 unsigned attr_index
, unsigned chan
,
1621 LLVMValueRef prim_mask
,
1622 LLVMValueRef i
, LLVMValueRef j
)
1625 return ac_build_fs_interp(&ctx
->ac
,
1626 LLVMConstInt(ctx
->i32
, chan
, 0),
1627 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1630 return ac_build_fs_interp_mov(&ctx
->ac
,
1631 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1632 LLVMConstInt(ctx
->i32
, chan
, 0),
1633 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1638 * Interpolate a fragment shader input.
1640 * @param ctx context
1641 * @param input_index index of the input in hardware
1642 * @param semantic_name TGSI_SEMANTIC_*
1643 * @param semantic_index semantic index
1644 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1645 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1646 * @param interp_param interpolation weights (i,j)
1647 * @param prim_mask SI_PARAM_PRIM_MASK
1648 * @param face SI_PARAM_FRONT_FACE
1649 * @param result the return value (4 components)
1651 static void interp_fs_input(struct si_shader_context
*ctx
,
1652 unsigned input_index
,
1653 unsigned semantic_name
,
1654 unsigned semantic_index
,
1655 unsigned num_interp_inputs
,
1656 unsigned colors_read_mask
,
1657 LLVMValueRef interp_param
,
1658 LLVMValueRef prim_mask
,
1660 LLVMValueRef result
[4])
1662 LLVMValueRef i
= NULL
, j
= NULL
;
1665 /* fs.constant returns the param from the middle vertex, so it's not
1666 * really useful for flat shading. It's meant to be used for custom
1667 * interpolation (but the intrinsic can't fetch from the other two
1670 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1671 * to do the right thing. The only reason we use fs.constant is that
1672 * fs.interp cannot be used on integers, because they can be equal
1675 * When interp is false we will use fs.constant or for newer llvm,
1676 * amdgcn.interp.mov.
1678 bool interp
= interp_param
!= NULL
;
1681 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1682 LLVMVectorType(ctx
->f32
, 2), "");
1684 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1686 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1690 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1691 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1692 LLVMValueRef is_face_positive
;
1694 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1695 * otherwise it's at offset "num_inputs".
1697 unsigned back_attr_offset
= num_interp_inputs
;
1698 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1699 back_attr_offset
+= 1;
1701 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1702 face
, ctx
->i32_0
, "");
1704 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1705 LLVMValueRef front
, back
;
1707 front
= si_build_fs_interp(ctx
,
1710 back
= si_build_fs_interp(ctx
,
1711 back_attr_offset
, chan
,
1714 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1720 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1721 result
[0] = si_build_fs_interp(ctx
, input_index
,
1722 0, prim_mask
, i
, j
);
1724 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1725 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1727 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1728 result
[chan
] = si_build_fs_interp(ctx
,
1735 void si_llvm_load_input_fs(
1736 struct si_shader_context
*ctx
,
1737 unsigned input_index
,
1738 LLVMValueRef out
[4])
1740 struct si_shader
*shader
= ctx
->shader
;
1741 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1742 LLVMValueRef main_fn
= ctx
->main_fn
;
1743 LLVMValueRef interp_param
= NULL
;
1744 int interp_param_idx
;
1745 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1746 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1747 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1748 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1750 /* Get colors from input VGPRs (set by the prolog). */
1751 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1752 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1753 unsigned mask
= colors_read
>> (semantic_index
* 4);
1754 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1755 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1756 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1758 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1759 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1760 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1761 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1765 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1766 if (interp_param_idx
== -1)
1768 else if (interp_param_idx
) {
1769 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1772 interp_fs_input(ctx
, input_index
, semantic_name
,
1773 semantic_index
, 0, /* this param is unused */
1774 shader
->selector
->info
.colors_read
, interp_param
,
1775 ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
),
1776 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1780 static void declare_input_fs(
1781 struct si_shader_context
*ctx
,
1782 unsigned input_index
,
1783 const struct tgsi_full_declaration
*decl
,
1784 LLVMValueRef out
[4])
1786 si_llvm_load_input_fs(ctx
, input_index
, out
);
1789 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1791 return si_unpack_param(ctx
, ctx
->args
.ancillary
, 8, 4);
1794 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1796 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1798 /* For non-indexed draws, the base vertex set by the driver
1799 * (for direct draws) or the CP (for indirect draws) is the
1800 * first vertex ID, but GLSL expects 0 to be returned.
1802 LLVMValueRef vs_state
= ac_get_arg(&ctx
->ac
,
1803 ctx
->vs_state_bits
);
1804 LLVMValueRef indexed
;
1806 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1807 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1809 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
1810 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
),
1814 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1816 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1818 LLVMValueRef values
[3];
1819 LLVMValueRef result
;
1821 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1823 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1824 unsigned sizes
[3] = {
1825 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1826 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1827 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1830 for (i
= 0; i
< 3; ++i
)
1831 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1833 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1835 result
= ac_get_arg(&ctx
->ac
, ctx
->block_size
);
1842 * Load a dword from a constant buffer.
1844 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1845 LLVMValueRef resource
,
1846 LLVMValueRef offset
)
1848 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1852 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1854 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1855 LLVMValueRef desc
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1856 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1857 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1859 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1860 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1861 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1863 LLVMValueRef pos
[4] = {
1864 buffer_load_const(ctx
, resource
, offset0
),
1865 buffer_load_const(ctx
, resource
, offset1
),
1866 LLVMConstReal(ctx
->f32
, 0),
1867 LLVMConstReal(ctx
->f32
, 0)
1870 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1873 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1875 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1876 return ac_to_integer(&ctx
->ac
, ac_get_arg(&ctx
->ac
, ctx
->args
.sample_coverage
));
1879 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1881 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1882 LLVMValueRef coord
[4] = {
1883 ac_get_arg(&ctx
->ac
, ctx
->tes_u
),
1884 ac_get_arg(&ctx
->ac
, ctx
->tes_v
),
1889 /* For triangles, the vector should be (u, v, 1-u-v). */
1890 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1891 PIPE_PRIM_TRIANGLES
) {
1892 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1893 LLVMBuildFAdd(ctx
->ac
.builder
,
1894 coord
[0], coord
[1], ""), "");
1896 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1899 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1900 unsigned semantic_name
)
1902 LLVMValueRef base
, addr
;
1904 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1906 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1907 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1908 LLVMConstInt(ctx
->i32
, param
, 0));
1910 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1911 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1915 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1916 unsigned semantic_name
)
1918 LLVMValueRef buf
, slot
, val
[4];
1921 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1922 buf
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1923 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1924 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1926 for (i
= 0; i
< 4; i
++)
1927 val
[i
] = buffer_load_const(ctx
, buf
,
1928 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1929 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1932 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1933 unsigned varying_id
,
1934 bool load_default_state
)
1936 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1937 unsigned semantic_name
;
1939 if (load_default_state
) {
1940 switch (varying_id
) {
1941 case VARYING_SLOT_TESS_LEVEL_INNER
:
1942 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
1944 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1945 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
1948 unreachable("unknown tess level");
1950 return load_tess_level_default(ctx
, semantic_name
);
1953 switch (varying_id
) {
1954 case VARYING_SLOT_TESS_LEVEL_INNER
:
1955 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1957 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1958 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1961 unreachable("unknown tess level");
1964 return load_tess_level(ctx
, semantic_name
);
1968 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1970 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1971 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1972 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 13, 6);
1973 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1974 return get_num_tcs_out_vertices(ctx
);
1976 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1979 void si_load_system_value(struct si_shader_context
*ctx
,
1981 const struct tgsi_full_declaration
*decl
)
1983 LLVMValueRef value
= 0;
1985 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1987 switch (decl
->Semantic
.Name
) {
1988 case TGSI_SEMANTIC_INSTANCEID
:
1989 value
= ctx
->abi
.instance_id
;
1992 case TGSI_SEMANTIC_VERTEXID
:
1993 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1995 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
), "");
1998 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
1999 /* Unused. Clarify the meaning in indexed vs. non-indexed
2000 * draws if this is ever used again. */
2004 case TGSI_SEMANTIC_BASEVERTEX
:
2005 value
= get_base_vertex(&ctx
->abi
);
2008 case TGSI_SEMANTIC_BASEINSTANCE
:
2009 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.start_instance
);
2012 case TGSI_SEMANTIC_DRAWID
:
2013 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.draw_id
);
2016 case TGSI_SEMANTIC_INVOCATIONID
:
2017 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2018 value
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
2019 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2020 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2021 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2022 ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
),
2023 LLVMConstInt(ctx
->i32
, 127, 0), "");
2025 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
);
2028 assert(!"INVOCATIONID not implemented");
2032 case TGSI_SEMANTIC_POSITION
:
2034 LLVMValueRef pos
[4] = {
2035 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2036 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2037 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2038 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2039 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2041 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2045 case TGSI_SEMANTIC_FACE
:
2046 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.front_face
);
2049 case TGSI_SEMANTIC_SAMPLEID
:
2050 value
= si_get_sample_id(ctx
);
2053 case TGSI_SEMANTIC_SAMPLEPOS
: {
2054 LLVMValueRef pos
[4] = {
2055 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2056 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2057 LLVMConstReal(ctx
->f32
, 0),
2058 LLVMConstReal(ctx
->f32
, 0)
2060 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2061 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2062 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2066 case TGSI_SEMANTIC_SAMPLEMASK
:
2067 /* This can only occur with the OpenGL Core profile, which
2068 * doesn't support smoothing.
2070 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2073 case TGSI_SEMANTIC_TESSCOORD
:
2074 value
= si_load_tess_coord(&ctx
->abi
);
2077 case TGSI_SEMANTIC_VERTICESIN
:
2078 value
= si_load_patch_vertices_in(&ctx
->abi
);
2081 case TGSI_SEMANTIC_TESSINNER
:
2082 case TGSI_SEMANTIC_TESSOUTER
:
2083 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2086 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2087 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2088 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2091 case TGSI_SEMANTIC_PRIMID
:
2092 value
= si_get_primitive_id(ctx
, 0);
2095 case TGSI_SEMANTIC_GRID_SIZE
:
2096 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.num_work_groups
);
2099 case TGSI_SEMANTIC_BLOCK_SIZE
:
2100 value
= get_block_size(&ctx
->abi
);
2103 case TGSI_SEMANTIC_BLOCK_ID
:
2105 LLVMValueRef values
[3];
2107 for (int i
= 0; i
< 3; i
++) {
2108 values
[i
] = ctx
->i32_0
;
2109 if (ctx
->args
.workgroup_ids
[i
].used
) {
2110 values
[i
] = ac_get_arg(&ctx
->ac
, ctx
->args
.workgroup_ids
[i
]);
2113 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2117 case TGSI_SEMANTIC_THREAD_ID
:
2118 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.local_invocation_ids
);
2121 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2122 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2125 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2126 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2129 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2130 value
= ac_get_thread_id(&ctx
->ac
);
2133 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2135 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2136 if (ctx
->ac
.wave_size
== 64)
2137 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2138 value
= LLVMBuildShl(ctx
->ac
.builder
,
2139 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2140 if (ctx
->ac
.wave_size
== 32)
2141 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2142 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2146 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2147 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2148 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2149 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2151 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2152 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2153 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2154 /* All bits set except LSB */
2155 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2158 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2160 if (ctx
->ac
.wave_size
== 64)
2161 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2162 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2163 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2164 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2165 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2166 if (ctx
->ac
.wave_size
== 32)
2167 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2168 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2172 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2173 value
= ac_get_arg(&ctx
->ac
, ctx
->cs_user_data
);
2177 assert(!"unknown system value");
2181 ctx
->system_values
[index
] = value
;
2184 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2186 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2187 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2189 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2192 assert(!ctx
->ac
.lds
);
2194 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2195 LLVMArrayType(ctx
->i8
, lds_size
),
2198 LLVMSetAlignment(var
, 64 * 1024);
2200 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2203 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2204 const struct tgsi_full_declaration
*decl
)
2206 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2207 assert(decl
->Range
.First
== decl
->Range
.Last
);
2209 si_declare_compute_memory(ctx
);
2212 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2215 ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2216 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2218 /* Do the bounds checking with a descriptor, because
2219 * doing computation and manual bounds checking of 64-bit
2220 * addresses generates horrible VALU code with very high
2221 * VGPR usage and very low SIMD occupancy.
2223 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2225 LLVMValueRef desc0
, desc1
;
2227 desc1
= LLVMConstInt(ctx
->i32
,
2228 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2230 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2231 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2232 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2233 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2235 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2236 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2237 S_008F0C_OOB_SELECT(3) |
2238 S_008F0C_RESOURCE_LEVEL(1);
2240 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2241 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2243 LLVMValueRef desc_elems
[] = {
2246 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2247 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2250 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2253 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2255 LLVMValueRef list_ptr
= ac_get_arg(&ctx
->ac
,
2256 ctx
->const_and_shader_buffers
);
2258 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2259 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2262 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2264 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2265 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2267 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2269 if (sel
->info
.const_buffers_declared
== 1 &&
2270 sel
->info
.shader_buffers_declared
== 0) {
2271 return load_const_buffer_desc_fast_path(ctx
);
2274 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2275 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2276 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2278 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2282 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2284 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2285 LLVMValueRef rsrc_ptr
= ac_get_arg(&ctx
->ac
,
2286 ctx
->const_and_shader_buffers
);
2288 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2289 index
= LLVMBuildSub(ctx
->ac
.builder
,
2290 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2293 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2296 static LLVMValueRef
fetch_constant(
2297 struct lp_build_tgsi_context
*bld_base
,
2298 const struct tgsi_full_src_register
*reg
,
2299 enum tgsi_opcode_type type
,
2300 unsigned swizzle_in
)
2302 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2303 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2304 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2306 unsigned swizzle
= swizzle_in
& 0xffff;
2308 LLVMValueRef addr
, bufp
;
2310 if (swizzle_in
== LP_CHAN_ALL
) {
2312 LLVMValueRef values
[4];
2313 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2314 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2316 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2319 /* Split 64-bit loads. */
2320 if (tgsi_type_is_64bit(type
)) {
2321 LLVMValueRef lo
, hi
;
2323 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2324 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2325 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2329 idx
= reg
->Register
.Index
* 4 + swizzle
;
2330 if (reg
->Register
.Indirect
) {
2331 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2333 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2336 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2337 if (sel
->info
.const_buffers_declared
== 1 &&
2338 sel
->info
.shader_buffers_declared
== 0) {
2339 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2340 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2341 return bitcast(bld_base
, type
, result
);
2344 assert(reg
->Register
.Dimension
);
2345 buf
= reg
->Dimension
.Index
;
2347 if (reg
->Dimension
.Indirect
) {
2348 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2350 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2351 reg
->Dimension
.Index
,
2352 ctx
->num_const_buffers
);
2353 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2354 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2355 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2357 bufp
= load_const_buffer_desc(ctx
, buf
);
2359 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2362 /* Initialize arguments for the shader export intrinsic */
2363 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2364 LLVMValueRef
*values
,
2366 struct ac_export_args
*args
)
2368 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2369 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2371 bool is_int8
, is_int10
;
2373 /* Default is 0xf. Adjusted below depending on the format. */
2374 args
->enabled_channels
= 0xf; /* writemask */
2376 /* Specify whether the EXEC mask represents the valid mask */
2377 args
->valid_mask
= 0;
2379 /* Specify whether this is the last export */
2382 /* Specify the target we are exporting */
2383 args
->target
= target
;
2385 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2386 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2387 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2388 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2390 assert(cbuf
>= 0 && cbuf
< 8);
2391 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2392 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2393 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2396 args
->compr
= false;
2397 args
->out
[0] = f32undef
;
2398 args
->out
[1] = f32undef
;
2399 args
->out
[2] = f32undef
;
2400 args
->out
[3] = f32undef
;
2402 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2403 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2404 unsigned bits
, bool hi
) = NULL
;
2406 switch (spi_shader_col_format
) {
2407 case V_028714_SPI_SHADER_ZERO
:
2408 args
->enabled_channels
= 0; /* writemask */
2409 args
->target
= V_008DFC_SQ_EXP_NULL
;
2412 case V_028714_SPI_SHADER_32_R
:
2413 args
->enabled_channels
= 1; /* writemask */
2414 args
->out
[0] = values
[0];
2417 case V_028714_SPI_SHADER_32_GR
:
2418 args
->enabled_channels
= 0x3; /* writemask */
2419 args
->out
[0] = values
[0];
2420 args
->out
[1] = values
[1];
2423 case V_028714_SPI_SHADER_32_AR
:
2424 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2425 args
->enabled_channels
= 0x3; /* writemask */
2426 args
->out
[0] = values
[0];
2427 args
->out
[1] = values
[3];
2429 args
->enabled_channels
= 0x9; /* writemask */
2430 args
->out
[0] = values
[0];
2431 args
->out
[3] = values
[3];
2435 case V_028714_SPI_SHADER_FP16_ABGR
:
2436 packf
= ac_build_cvt_pkrtz_f16
;
2439 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2440 packf
= ac_build_cvt_pknorm_u16
;
2443 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2444 packf
= ac_build_cvt_pknorm_i16
;
2447 case V_028714_SPI_SHADER_UINT16_ABGR
:
2448 packi
= ac_build_cvt_pk_u16
;
2451 case V_028714_SPI_SHADER_SINT16_ABGR
:
2452 packi
= ac_build_cvt_pk_i16
;
2455 case V_028714_SPI_SHADER_32_ABGR
:
2456 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2460 /* Pack f16 or norm_i16/u16. */
2462 for (chan
= 0; chan
< 2; chan
++) {
2463 LLVMValueRef pack_args
[2] = {
2465 values
[2 * chan
+ 1]
2467 LLVMValueRef packed
;
2469 packed
= packf(&ctx
->ac
, pack_args
);
2470 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2472 args
->compr
= 1; /* COMPR flag */
2476 for (chan
= 0; chan
< 2; chan
++) {
2477 LLVMValueRef pack_args
[2] = {
2478 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2479 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2481 LLVMValueRef packed
;
2483 packed
= packi(&ctx
->ac
, pack_args
,
2484 is_int8
? 8 : is_int10
? 10 : 16,
2486 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2488 args
->compr
= 1; /* COMPR flag */
2492 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2495 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2497 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2498 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2499 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2500 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2501 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2502 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2503 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2504 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2506 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2509 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2510 SI_PARAM_ALPHA_REF
);
2511 LLVMValueRef alpha_pass
=
2512 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2513 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2515 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2519 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2521 unsigned samplemask_param
)
2523 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2524 LLVMValueRef coverage
;
2526 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2527 coverage
= LLVMGetParam(ctx
->main_fn
,
2529 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2531 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2533 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2535 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2538 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2539 LLVMConstReal(ctx
->f32
,
2540 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2542 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2545 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2546 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2550 unsigned const_chan
;
2551 LLVMValueRef base_elt
;
2552 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
2553 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2554 SI_VS_CONST_CLIP_PLANES
, 0);
2555 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2557 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2558 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2563 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2565 /* Compute dot products of position and user clip plane vectors */
2566 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2567 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2569 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2570 const_chan
) * 4, 0);
2571 base_elt
= buffer_load_const(ctx
, const_resource
,
2573 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2574 out_elts
[const_chan
], args
->out
[chan
]);
2578 args
->enabled_channels
= 0xf;
2579 args
->valid_mask
= 0;
2581 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2586 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2590 if (so
->num_outputs
)
2591 fprintf(stderr
, "STREAMOUT\n");
2593 for (i
= 0; i
< so
->num_outputs
; i
++) {
2594 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2595 so
->output
[i
].start_component
;
2596 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2597 i
, so
->output
[i
].output_buffer
,
2598 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2599 so
->output
[i
].register_index
,
2600 mask
& 1 ? "x" : "",
2601 mask
& 2 ? "y" : "",
2602 mask
& 4 ? "z" : "",
2603 mask
& 8 ? "w" : "");
2607 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2608 LLVMValueRef
const *so_buffers
,
2609 LLVMValueRef
const *so_write_offsets
,
2610 struct pipe_stream_output
*stream_out
,
2611 struct si_shader_output_values
*shader_out
)
2613 unsigned buf_idx
= stream_out
->output_buffer
;
2614 unsigned start
= stream_out
->start_component
;
2615 unsigned num_comps
= stream_out
->num_components
;
2616 LLVMValueRef out
[4];
2618 assert(num_comps
&& num_comps
<= 4);
2619 if (!num_comps
|| num_comps
> 4)
2622 /* Load the output as int. */
2623 for (int j
= 0; j
< num_comps
; j
++) {
2624 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2626 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2629 /* Pack the output. */
2630 LLVMValueRef vdata
= NULL
;
2632 switch (num_comps
) {
2633 case 1: /* as i32 */
2636 case 2: /* as v2i32 */
2637 case 3: /* as v3i32 */
2638 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2639 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2642 /* as v4i32 (aligned to 4) */
2643 out
[3] = LLVMGetUndef(ctx
->i32
);
2645 case 4: /* as v4i32 */
2646 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2650 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2652 so_write_offsets
[buf_idx
],
2654 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
);
2658 * Write streamout data to buffers for vertex stream @p stream (different
2659 * vertex streams can occur for GS copy shaders).
2661 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2662 struct si_shader_output_values
*outputs
,
2663 unsigned noutput
, unsigned stream
)
2665 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2666 struct pipe_stream_output_info
*so
= &sel
->so
;
2667 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2670 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2671 LLVMValueRef so_vtx_count
=
2672 si_unpack_param(ctx
, ctx
->streamout_config
, 16, 7);
2674 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2676 /* can_emit = tid < so_vtx_count; */
2677 LLVMValueRef can_emit
=
2678 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2680 /* Emit the streamout code conditionally. This actually avoids
2681 * out-of-bounds buffer access. The hw tells us via the SGPR
2682 * (so_vtx_count) which threads are allowed to emit streamout data. */
2683 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2685 /* The buffer offset is computed as follows:
2686 * ByteOffset = streamout_offset[buffer_id]*4 +
2687 * (streamout_write_index + thread_id)*stride[buffer_id] +
2691 LLVMValueRef so_write_index
=
2692 ac_get_arg(&ctx
->ac
,
2693 ctx
->streamout_write_index
);
2695 /* Compute (streamout_write_index + thread_id). */
2696 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2698 /* Load the descriptor and compute the write offset for each
2699 * enabled buffer. */
2700 LLVMValueRef so_write_offset
[4] = {};
2701 LLVMValueRef so_buffers
[4];
2702 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
,
2705 for (i
= 0; i
< 4; i
++) {
2709 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2710 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2712 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2714 LLVMValueRef so_offset
= ac_get_arg(&ctx
->ac
,
2715 ctx
->streamout_offset
[i
]);
2716 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2718 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2719 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2723 /* Write streamout data. */
2724 for (i
= 0; i
< so
->num_outputs
; i
++) {
2725 unsigned reg
= so
->output
[i
].register_index
;
2730 if (stream
!= so
->output
[i
].stream
)
2733 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2734 &so
->output
[i
], &outputs
[reg
]);
2737 ac_build_endif(&ctx
->ac
, 6501);
2740 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2741 LLVMValueRef
*values
)
2743 struct ac_export_args args
;
2745 si_llvm_init_export_args(ctx
, values
,
2746 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2747 ac_build_export(&ctx
->ac
, &args
);
2750 static void si_build_param_exports(struct si_shader_context
*ctx
,
2751 struct si_shader_output_values
*outputs
,
2754 struct si_shader
*shader
= ctx
->shader
;
2755 unsigned param_count
= 0;
2757 for (unsigned i
= 0; i
< noutput
; i
++) {
2758 unsigned semantic_name
= outputs
[i
].semantic_name
;
2759 unsigned semantic_index
= outputs
[i
].semantic_index
;
2761 if (outputs
[i
].vertex_stream
[0] != 0 &&
2762 outputs
[i
].vertex_stream
[1] != 0 &&
2763 outputs
[i
].vertex_stream
[2] != 0 &&
2764 outputs
[i
].vertex_stream
[3] != 0)
2767 switch (semantic_name
) {
2768 case TGSI_SEMANTIC_LAYER
:
2769 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2770 case TGSI_SEMANTIC_CLIPDIST
:
2771 case TGSI_SEMANTIC_COLOR
:
2772 case TGSI_SEMANTIC_BCOLOR
:
2773 case TGSI_SEMANTIC_PRIMID
:
2774 case TGSI_SEMANTIC_FOG
:
2775 case TGSI_SEMANTIC_TEXCOORD
:
2776 case TGSI_SEMANTIC_GENERIC
:
2782 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2783 semantic_index
< SI_MAX_IO_GENERIC
) &&
2784 shader
->key
.opt
.kill_outputs
&
2785 (1ull << si_shader_io_get_unique_index(semantic_name
,
2786 semantic_index
, true)))
2789 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2791 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2792 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2795 shader
->info
.nr_param_exports
= param_count
;
2799 * Vertex color clamping.
2801 * This uses a state constant loaded in a user data SGPR and
2802 * an IF statement is added that clamps all colors if the constant
2805 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2806 struct si_shader_output_values
*outputs
,
2809 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2810 bool has_colors
= false;
2812 /* Store original colors to alloca variables. */
2813 for (unsigned i
= 0; i
< noutput
; i
++) {
2814 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2815 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2818 for (unsigned j
= 0; j
< 4; j
++) {
2819 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2820 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2828 /* The state is in the first bit of the user SGPR. */
2829 LLVMValueRef cond
= ac_get_arg(&ctx
->ac
, ctx
->vs_state_bits
);
2830 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2832 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2834 /* Store clamped colors to alloca variables within the conditional block. */
2835 for (unsigned i
= 0; i
< noutput
; i
++) {
2836 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2837 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2840 for (unsigned j
= 0; j
< 4; j
++) {
2841 LLVMBuildStore(ctx
->ac
.builder
,
2842 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2846 ac_build_endif(&ctx
->ac
, 6502);
2848 /* Load clamped colors */
2849 for (unsigned i
= 0; i
< noutput
; i
++) {
2850 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2851 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2854 for (unsigned j
= 0; j
< 4; j
++) {
2855 outputs
[i
].values
[j
] =
2856 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2861 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2862 * (position and parameter data only).
2864 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2865 struct si_shader_output_values
*outputs
,
2868 struct si_shader
*shader
= ctx
->shader
;
2869 struct ac_export_args pos_args
[4] = {};
2870 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2874 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2876 /* Build position exports. */
2877 for (i
= 0; i
< noutput
; i
++) {
2878 switch (outputs
[i
].semantic_name
) {
2879 case TGSI_SEMANTIC_POSITION
:
2880 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2881 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2883 case TGSI_SEMANTIC_PSIZE
:
2884 psize_value
= outputs
[i
].values
[0];
2886 case TGSI_SEMANTIC_LAYER
:
2887 layer_value
= outputs
[i
].values
[0];
2889 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2890 viewport_index_value
= outputs
[i
].values
[0];
2892 case TGSI_SEMANTIC_EDGEFLAG
:
2893 edgeflag_value
= outputs
[i
].values
[0];
2895 case TGSI_SEMANTIC_CLIPDIST
:
2896 if (!shader
->key
.opt
.clip_disable
) {
2897 unsigned index
= 2 + outputs
[i
].semantic_index
;
2898 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2899 V_008DFC_SQ_EXP_POS
+ index
,
2903 case TGSI_SEMANTIC_CLIPVERTEX
:
2904 if (!shader
->key
.opt
.clip_disable
) {
2905 si_llvm_emit_clipvertex(ctx
, pos_args
,
2912 /* We need to add the position output manually if it's missing. */
2913 if (!pos_args
[0].out
[0]) {
2914 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2915 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2916 pos_args
[0].done
= 0; /* last export? */
2917 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2918 pos_args
[0].compr
= 0; /* COMPR flag */
2919 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2920 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2921 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2922 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2925 bool pos_writes_edgeflag
= shader
->selector
->info
.writes_edgeflag
&&
2926 !shader
->key
.as_ngg
;
2928 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2929 if (shader
->selector
->info
.writes_psize
||
2930 pos_writes_edgeflag
||
2931 shader
->selector
->info
.writes_viewport_index
||
2932 shader
->selector
->info
.writes_layer
) {
2933 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2934 (pos_writes_edgeflag
<< 1) |
2935 (shader
->selector
->info
.writes_layer
<< 2);
2937 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2938 pos_args
[1].done
= 0; /* last export? */
2939 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2940 pos_args
[1].compr
= 0; /* COMPR flag */
2941 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2942 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2943 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2944 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2946 if (shader
->selector
->info
.writes_psize
)
2947 pos_args
[1].out
[0] = psize_value
;
2949 if (pos_writes_edgeflag
) {
2950 /* The output is a float, but the hw expects an integer
2951 * with the first bit containing the edge flag. */
2952 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2955 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2959 /* The LLVM intrinsic expects a float. */
2960 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2963 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2964 /* GFX9 has the layer in out.z[10:0] and the viewport
2965 * index in out.z[19:16].
2967 if (shader
->selector
->info
.writes_layer
)
2968 pos_args
[1].out
[2] = layer_value
;
2970 if (shader
->selector
->info
.writes_viewport_index
) {
2971 LLVMValueRef v
= viewport_index_value
;
2973 v
= ac_to_integer(&ctx
->ac
, v
);
2974 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2975 LLVMConstInt(ctx
->i32
, 16, 0), "");
2976 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2977 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2978 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2979 pos_args
[1].enabled_channels
|= 1 << 2;
2982 if (shader
->selector
->info
.writes_layer
)
2983 pos_args
[1].out
[2] = layer_value
;
2985 if (shader
->selector
->info
.writes_viewport_index
) {
2986 pos_args
[1].out
[3] = viewport_index_value
;
2987 pos_args
[1].enabled_channels
|= 1 << 3;
2992 for (i
= 0; i
< 4; i
++)
2993 if (pos_args
[i
].out
[0])
2994 shader
->info
.nr_pos_exports
++;
2996 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
2997 * Setting valid_mask=1 prevents it and has no other effect.
2999 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3000 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3001 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3002 pos_args
[0].valid_mask
= 1;
3005 for (i
= 0; i
< 4; i
++) {
3006 if (!pos_args
[i
].out
[0])
3009 /* Specify the target we are exporting */
3010 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3012 if (pos_idx
== shader
->info
.nr_pos_exports
)
3013 /* Specify that this is the last export */
3014 pos_args
[i
].done
= 1;
3016 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3019 /* Build parameter exports. */
3020 si_build_param_exports(ctx
, outputs
, noutput
);
3024 * Forward all outputs from the vertex shader to the TES. This is only used
3025 * for the fixed function TCS.
3027 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3029 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3030 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3031 LLVMValueRef lds_vertex_stride
, lds_base
;
3034 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3035 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3036 buffer_offset
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3038 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3039 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3040 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3043 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3045 unsigned i
= u_bit_scan64(&inputs
);
3047 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3048 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3051 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3052 get_rel_patch_id(ctx
),
3054 LLVMConstInt(ctx
->i32
, i
, 0));
3056 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3058 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3059 buffer_offset
, 0, ac_glc
);
3063 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3064 LLVMValueRef rel_patch_id
,
3065 LLVMValueRef invocation_id
,
3066 LLVMValueRef tcs_out_current_patch_data_offset
,
3067 LLVMValueRef invoc0_tf_outer
[4],
3068 LLVMValueRef invoc0_tf_inner
[2])
3070 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3071 struct si_shader
*shader
= ctx
->shader
;
3072 unsigned tess_inner_index
, tess_outer_index
;
3073 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3074 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3075 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3077 /* Add a barrier before loading tess factors from LDS. */
3078 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3079 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3081 /* Do this only for invocation 0, because the tess levels are per-patch,
3084 * This can't jump, because invocation 0 executes this. It should
3085 * at least mask out the loads and stores for other invocations.
3087 ac_build_ifcc(&ctx
->ac
,
3088 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3089 invocation_id
, ctx
->i32_0
, ""), 6503);
3091 /* Determine the layout of one tess factor element in the buffer. */
3092 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3093 case PIPE_PRIM_LINES
:
3094 stride
= 2; /* 2 dwords, 1 vec2 store */
3098 case PIPE_PRIM_TRIANGLES
:
3099 stride
= 4; /* 4 dwords, 1 vec4 store */
3103 case PIPE_PRIM_QUADS
:
3104 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3113 for (i
= 0; i
< 4; i
++) {
3114 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3115 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3118 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3119 /* Tess factors are in VGPRs. */
3120 for (i
= 0; i
< outer_comps
; i
++)
3121 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3122 for (i
= 0; i
< inner_comps
; i
++)
3123 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3125 /* Load tess_inner and tess_outer from LDS.
3126 * Any invocation can write them, so we can't get them from a temporary.
3128 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3129 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3131 lds_base
= tcs_out_current_patch_data_offset
;
3132 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3133 LLVMConstInt(ctx
->i32
,
3134 tess_inner_index
* 4, 0), "");
3135 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3136 LLVMConstInt(ctx
->i32
,
3137 tess_outer_index
* 4, 0), "");
3139 for (i
= 0; i
< outer_comps
; i
++) {
3141 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3143 for (i
= 0; i
< inner_comps
; i
++) {
3144 inner
[i
] = out
[outer_comps
+i
] =
3145 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3149 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3150 /* For isolines, the hardware expects tess factors in the
3151 * reverse order from what GLSL / TGSI specify.
3153 LLVMValueRef tmp
= out
[0];
3158 /* Convert the outputs to vectors for stores. */
3159 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3163 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3165 /* Get the buffer. */
3166 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3168 /* Get the offset. */
3169 tf_base
= ac_get_arg(&ctx
->ac
,
3170 ctx
->tcs_factor_offset
);
3171 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3172 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3174 ac_build_ifcc(&ctx
->ac
,
3175 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3176 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3178 /* Store the dynamic HS control word. */
3180 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3181 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3182 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3183 1, ctx
->i32_0
, tf_base
,
3188 ac_build_endif(&ctx
->ac
, 6504);
3190 /* Store the tessellation factors. */
3191 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3192 MIN2(stride
, 4), byteoffset
, tf_base
,
3196 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3197 stride
- 4, byteoffset
, tf_base
,
3200 /* Store the tess factors into the offchip buffer if TES reads them. */
3201 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3202 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3203 LLVMValueRef tf_inner_offset
;
3204 unsigned param_outer
, param_inner
;
3206 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3207 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3209 param_outer
= si_shader_io_get_unique_index_patch(
3210 TGSI_SEMANTIC_TESSOUTER
, 0);
3211 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3212 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3214 unsigned outer_vec_size
=
3215 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3216 outer_comps
: util_next_power_of_two(outer_comps
);
3217 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3219 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3220 outer_comps
, tf_outer_offset
,
3223 param_inner
= si_shader_io_get_unique_index_patch(
3224 TGSI_SEMANTIC_TESSINNER
, 0);
3225 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3226 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3228 inner_vec
= inner_comps
== 1 ? inner
[0] :
3229 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3230 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3231 inner_comps
, tf_inner_offset
,
3236 ac_build_endif(&ctx
->ac
, 6503);
3240 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3241 struct ac_arg param
, unsigned return_index
)
3243 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3244 ac_get_arg(&ctx
->ac
, param
),
3249 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3250 struct ac_arg param
, unsigned return_index
)
3252 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3253 LLVMValueRef p
= ac_get_arg(&ctx
->ac
, param
);
3255 return LLVMBuildInsertValue(builder
, ret
,
3256 ac_to_float(&ctx
->ac
, p
),
3261 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3262 struct ac_arg param
, unsigned return_index
)
3264 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3265 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, param
);
3266 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3267 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3270 /* This only writes the tessellation factor levels. */
3271 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3272 unsigned max_outputs
,
3273 LLVMValueRef
*addrs
)
3275 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3276 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3277 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3278 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3280 si_copy_tcs_inputs(bld_base
);
3282 rel_patch_id
= get_rel_patch_id(ctx
);
3283 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3284 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3286 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3287 LLVMBasicBlockRef blocks
[2] = {
3288 LLVMGetInsertBlock(builder
),
3289 ctx
->merged_wrap_if_entry_block
3291 LLVMValueRef values
[2];
3293 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3295 values
[0] = rel_patch_id
;
3296 values
[1] = LLVMGetUndef(ctx
->i32
);
3297 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3299 values
[0] = tf_lds_offset
;
3300 values
[1] = LLVMGetUndef(ctx
->i32
);
3301 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3303 values
[0] = invocation_id
;
3304 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3305 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3308 /* Return epilog parameters from this function. */
3309 LLVMValueRef ret
= ctx
->return_value
;
3312 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3313 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3314 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3315 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3316 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3317 /* Tess offchip and tess factor offsets are at the beginning. */
3318 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3319 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3320 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3322 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3323 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3324 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3325 GFX6_SGPR_TCS_OUT_LAYOUT
);
3326 /* Tess offchip and tess factor offsets are after user SGPRs. */
3327 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
,
3328 GFX6_TCS_NUM_USER_SGPR
);
3329 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
,
3330 GFX6_TCS_NUM_USER_SGPR
+ 1);
3331 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3335 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3336 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3337 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3339 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3340 * the invocation_id output does not alias the tcs_rel_ids input,
3341 * which saves a V_MOV on gfx9.
3345 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3346 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3348 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3349 vgpr
++; /* skip the tess factor LDS offset */
3350 for (unsigned i
= 0; i
< 6; i
++) {
3351 LLVMValueRef value
=
3352 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3353 value
= ac_to_float(&ctx
->ac
, value
);
3354 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3357 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3359 ctx
->return_value
= ret
;
3362 /* Pass TCS inputs from LS to TCS on GFX9. */
3363 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3365 LLVMValueRef ret
= ctx
->return_value
;
3367 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3368 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3369 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3370 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3371 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3372 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3374 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3375 8 + SI_SGPR_RW_BUFFERS
);
3376 ret
= si_insert_input_ptr(ctx
, ret
,
3377 ctx
->bindless_samplers_and_images
,
3378 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3380 ret
= si_insert_input_ret(ctx
, ret
, ctx
->vs_state_bits
,
3381 8 + SI_SGPR_VS_STATE_BITS
);
3383 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3384 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3385 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_offsets
,
3386 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3387 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3388 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3390 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3391 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3392 ac_to_float(&ctx
->ac
,
3393 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
)),
3395 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3396 ac_to_float(&ctx
->ac
,
3397 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_rel_ids
)),
3399 ctx
->return_value
= ret
;
3402 /* Pass GS inputs from ES to GS on GFX9. */
3403 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3405 LLVMValueRef ret
= ctx
->return_value
;
3407 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3408 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3409 if (ctx
->shader
->key
.as_ngg
)
3410 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->gs_tg_info
, 2);
3412 ret
= si_insert_input_ret(ctx
, ret
, ctx
->gs2vs_offset
, 2);
3413 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3414 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3416 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3417 8 + SI_SGPR_RW_BUFFERS
);
3418 ret
= si_insert_input_ptr(ctx
, ret
,
3419 ctx
->bindless_samplers_and_images
,
3420 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3421 if (ctx
->screen
->use_ngg
) {
3422 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->vs_state_bits
,
3423 8 + SI_SGPR_VS_STATE_BITS
);
3427 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3428 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3430 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3432 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx01_offset
, vgpr
++);
3433 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx23_offset
, vgpr
++);
3434 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_prim_id
, vgpr
++);
3435 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_invocation_id
, vgpr
++);
3436 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx45_offset
, vgpr
++);
3437 ctx
->return_value
= ret
;
3440 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3441 unsigned max_outputs
,
3442 LLVMValueRef
*addrs
)
3444 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3445 struct si_shader
*shader
= ctx
->shader
;
3446 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3448 LLVMValueRef vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->rel_auto_id
);
3449 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3450 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3451 vertex_dw_stride
, "");
3453 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3454 * its inputs from it. */
3455 for (i
= 0; i
< info
->num_outputs
; i
++) {
3456 unsigned name
= info
->output_semantic_name
[i
];
3457 unsigned index
= info
->output_semantic_index
[i
];
3459 /* The ARB_shader_viewport_layer_array spec contains the
3462 * 2) What happens if gl_ViewportIndex or gl_Layer is
3463 * written in the vertex shader and a geometry shader is
3466 * RESOLVED: The value written by the last vertex processing
3467 * stage is used. If the last vertex processing stage
3468 * (vertex, tessellation evaluation or geometry) does not
3469 * statically assign to gl_ViewportIndex or gl_Layer, index
3470 * or layer zero is assumed.
3472 * So writes to those outputs in VS-as-LS are simply ignored.
3474 if (name
== TGSI_SEMANTIC_LAYER
||
3475 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3478 int param
= si_shader_io_get_unique_index(name
, index
, false);
3479 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3480 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3482 for (chan
= 0; chan
< 4; chan
++) {
3483 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3486 lshs_lds_store(ctx
, chan
, dw_addr
,
3487 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3491 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3492 si_set_ls_return_value_for_tcs(ctx
);
3495 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3496 unsigned max_outputs
,
3497 LLVMValueRef
*addrs
)
3499 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3500 struct si_shader
*es
= ctx
->shader
;
3501 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3502 LLVMValueRef lds_base
= NULL
;
3506 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3507 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3508 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3509 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 24, 4);
3510 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3511 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3512 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3513 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3514 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3517 for (i
= 0; i
< info
->num_outputs
; i
++) {
3520 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3521 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3524 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3525 info
->output_semantic_index
[i
], false);
3527 for (chan
= 0; chan
< 4; chan
++) {
3528 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3531 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3532 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3534 /* GFX9 has the ESGS ring in LDS. */
3535 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3536 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3537 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3538 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3542 ac_build_buffer_store_dword(&ctx
->ac
,
3545 ac_get_arg(&ctx
->ac
, ctx
->es2gs_offset
),
3546 (4 * param
+ chan
) * 4,
3547 ac_glc
| ac_slc
| ac_swizzled
);
3551 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3552 si_set_es_return_value_for_gs(ctx
);
3555 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3557 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3558 return si_unpack_param(ctx
, ctx
->merged_wave_info
, 16, 8);
3560 return ac_get_arg(&ctx
->ac
, ctx
->gs_wave_id
);
3563 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3565 if (ctx
->shader
->key
.as_ngg
) {
3566 gfx10_ngg_gs_emit_epilogue(ctx
);
3570 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3571 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3573 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3574 si_get_gs_wave_id(ctx
));
3576 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3577 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3580 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3581 unsigned max_outputs
,
3582 LLVMValueRef
*addrs
)
3584 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3585 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3587 assert(info
->num_outputs
<= max_outputs
);
3589 emit_gs_epilogue(ctx
);
3592 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3594 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3595 emit_gs_epilogue(ctx
);
3598 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3599 unsigned max_outputs
,
3600 LLVMValueRef
*addrs
)
3602 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3603 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3604 struct si_shader_output_values
*outputs
= NULL
;
3607 assert(!ctx
->shader
->is_gs_copy_shader
);
3608 assert(info
->num_outputs
<= max_outputs
);
3610 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3612 for (i
= 0; i
< info
->num_outputs
; i
++) {
3613 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3614 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3616 for (j
= 0; j
< 4; j
++) {
3617 outputs
[i
].values
[j
] =
3618 LLVMBuildLoad(ctx
->ac
.builder
,
3621 outputs
[i
].vertex_stream
[j
] =
3622 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3626 if (!ctx
->screen
->use_ngg_streamout
&&
3627 ctx
->shader
->selector
->so
.num_outputs
)
3628 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3630 /* Export PrimitiveID. */
3631 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3632 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3633 outputs
[i
].semantic_index
= 0;
3634 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3635 for (j
= 1; j
< 4; j
++)
3636 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3638 memset(outputs
[i
].vertex_stream
, 0,
3639 sizeof(outputs
[i
].vertex_stream
));
3643 si_llvm_export_vs(ctx
, outputs
, i
);
3647 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3648 unsigned max_outputs
,
3649 LLVMValueRef
*addrs
)
3651 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3652 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3653 LLVMValueRef pos
[4] = {};
3655 assert(info
->num_outputs
<= max_outputs
);
3657 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3658 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3661 for (unsigned chan
= 0; chan
< 4; chan
++)
3662 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3665 assert(pos
[0] != NULL
);
3667 /* Return the position output. */
3668 LLVMValueRef ret
= ctx
->return_value
;
3669 for (unsigned chan
= 0; chan
< 4; chan
++)
3670 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3671 ctx
->return_value
= ret
;
3674 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3676 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3678 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3679 &ctx
->outputs
[0][0]);
3682 struct si_ps_exports
{
3684 struct ac_export_args args
[10];
3687 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3688 LLVMValueRef depth
, LLVMValueRef stencil
,
3689 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3691 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3692 struct ac_export_args args
;
3694 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3696 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3699 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3700 LLVMValueRef
*color
, unsigned index
,
3701 unsigned samplemask_param
,
3702 bool is_last
, struct si_ps_exports
*exp
)
3704 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3708 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3709 for (i
= 0; i
< 4; i
++)
3710 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3713 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3714 color
[3] = ctx
->ac
.f32_1
;
3718 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3719 si_alpha_test(bld_base
, color
[3]);
3721 /* Line & polygon smoothing */
3722 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3723 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3726 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3727 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3728 struct ac_export_args args
[8];
3731 /* Get the export arguments, also find out what the last one is. */
3732 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3733 si_llvm_init_export_args(ctx
, color
,
3734 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3735 if (args
[c
].enabled_channels
)
3739 /* Emit all exports. */
3740 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3741 if (is_last
&& last
== c
) {
3742 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3743 args
[c
].done
= 1; /* DONE bit */
3744 } else if (!args
[c
].enabled_channels
)
3745 continue; /* unnecessary NULL export */
3747 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3750 struct ac_export_args args
;
3753 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3756 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3757 args
.done
= 1; /* DONE bit */
3758 } else if (!args
.enabled_channels
)
3759 return; /* unnecessary NULL export */
3761 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3765 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3766 struct si_ps_exports
*exp
)
3768 for (unsigned i
= 0; i
< exp
->num
; i
++)
3769 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3773 * Return PS outputs in this order:
3775 * v[0:3] = color0.xyzw
3776 * v[4:7] = color1.xyzw
3781 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3783 * The alpha-ref SGPR is returned via its original location.
3785 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3786 unsigned max_outputs
,
3787 LLVMValueRef
*addrs
)
3789 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3790 struct si_shader
*shader
= ctx
->shader
;
3791 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3792 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3793 unsigned i
, j
, first_vgpr
, vgpr
;
3795 LLVMValueRef color
[8][4] = {};
3796 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3799 if (ctx
->postponed_kill
)
3800 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3802 /* Read the output values. */
3803 for (i
= 0; i
< info
->num_outputs
; i
++) {
3804 unsigned semantic_name
= info
->output_semantic_name
[i
];
3805 unsigned semantic_index
= info
->output_semantic_index
[i
];
3807 switch (semantic_name
) {
3808 case TGSI_SEMANTIC_COLOR
:
3809 assert(semantic_index
< 8);
3810 for (j
= 0; j
< 4; j
++) {
3811 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3812 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3813 color
[semantic_index
][j
] = result
;
3816 case TGSI_SEMANTIC_POSITION
:
3817 depth
= LLVMBuildLoad(builder
,
3818 addrs
[4 * i
+ 2], "");
3820 case TGSI_SEMANTIC_STENCIL
:
3821 stencil
= LLVMBuildLoad(builder
,
3822 addrs
[4 * i
+ 1], "");
3824 case TGSI_SEMANTIC_SAMPLEMASK
:
3825 samplemask
= LLVMBuildLoad(builder
,
3826 addrs
[4 * i
+ 0], "");
3829 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3834 /* Fill the return structure. */
3835 ret
= ctx
->return_value
;
3838 ret
= LLVMBuildInsertValue(builder
, ret
,
3839 ac_to_integer(&ctx
->ac
,
3840 LLVMGetParam(ctx
->main_fn
,
3841 SI_PARAM_ALPHA_REF
)),
3842 SI_SGPR_ALPHA_REF
, "");
3845 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3846 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3850 for (j
= 0; j
< 4; j
++)
3851 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3854 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3856 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3858 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3860 /* Add the input sample mask for smoothing at the end. */
3861 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3862 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3863 ret
= LLVMBuildInsertValue(builder
, ret
,
3864 LLVMGetParam(ctx
->main_fn
,
3865 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3867 ctx
->return_value
= ret
;
3870 static void membar_emit(
3871 const struct lp_build_tgsi_action
*action
,
3872 struct lp_build_tgsi_context
*bld_base
,
3873 struct lp_build_emit_data
*emit_data
)
3875 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3876 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3877 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3878 unsigned wait_flags
= 0;
3880 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3881 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3883 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3884 TGSI_MEMBAR_SHADER_BUFFER
|
3885 TGSI_MEMBAR_SHADER_IMAGE
))
3886 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3888 if (flags
& TGSI_MEMBAR_SHARED
)
3889 wait_flags
|= AC_WAIT_LGKM
;
3891 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3894 static void clock_emit(
3895 const struct lp_build_tgsi_action
*action
,
3896 struct lp_build_tgsi_context
*bld_base
,
3897 struct lp_build_emit_data
*emit_data
)
3899 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3900 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3902 emit_data
->output
[0] =
3903 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3904 emit_data
->output
[1] =
3905 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3908 static void si_llvm_emit_ddxy(
3909 const struct lp_build_tgsi_action
*action
,
3910 struct lp_build_tgsi_context
*bld_base
,
3911 struct lp_build_emit_data
*emit_data
)
3913 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3914 unsigned opcode
= emit_data
->info
->opcode
;
3919 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3920 mask
= AC_TID_MASK_LEFT
;
3921 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3922 mask
= AC_TID_MASK_TOP
;
3924 mask
= AC_TID_MASK_TOP_LEFT
;
3926 /* for DDX we want to next X pixel, DDY next Y pixel. */
3927 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3929 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3930 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3931 emit_data
->output
[emit_data
->chan
] = val
;
3934 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3935 struct lp_build_tgsi_context
*bld_base
,
3936 struct lp_build_emit_data
*emit_data
)
3938 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3939 struct si_shader
*shader
= ctx
->shader
;
3940 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3941 LLVMValueRef interp_param
;
3942 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3943 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3944 int input_base
, input_array_size
;
3947 LLVMValueRef prim_mask
= ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
);
3948 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3949 int interp_param_idx
;
3953 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3954 /* offset is in second src, first two channels */
3955 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3957 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3959 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3960 LLVMValueRef sample_position
;
3961 LLVMValueRef sample_id
;
3962 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3964 /* fetch sample ID, then fetch its sample position,
3965 * and place into first two channels.
3967 sample_id
= lp_build_emit_fetch(bld_base
,
3968 emit_data
->inst
, 1, TGSI_CHAN_X
);
3969 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3971 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3972 * Language 4.50 spec says about interpolateAtSample:
3974 * "Returns the value of the input interpolant variable at
3975 * the location of sample number sample. If multisample
3976 * buffers are not available, the input variable will be
3977 * evaluated at the center of the pixel. If sample sample
3978 * does not exist, the position used to interpolate the
3979 * input variable is undefined."
3981 * This means that sample_id values outside of the valid are
3982 * in fact valid input, and the usual mechanism for loading the
3983 * sample position doesn't work.
3985 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3986 LLVMValueRef center
[4] = {
3987 LLVMConstReal(ctx
->f32
, 0.5),
3988 LLVMConstReal(ctx
->f32
, 0.5),
3993 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
3995 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
3998 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4001 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4002 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4004 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4007 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4009 if (input
->Register
.Indirect
) {
4010 unsigned array_id
= input
->Indirect
.ArrayID
;
4013 input_base
= info
->input_array_first
[array_id
];
4014 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4016 input_base
= inst
->Src
[0].Register
.Index
;
4017 input_array_size
= info
->num_inputs
- input_base
;
4020 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4021 1, input
->Register
.Index
- input_base
);
4023 input_base
= inst
->Src
[0].Register
.Index
;
4024 input_array_size
= 1;
4025 array_idx
= ctx
->i32_0
;
4028 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4030 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4031 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4032 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4034 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4036 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4037 if (interp_param_idx
== -1)
4039 else if (interp_param_idx
)
4040 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4042 interp_param
= NULL
;
4044 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4045 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4046 LLVMValueRef ij_out
[2];
4047 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4050 * take the I then J parameters, and the DDX/Y for it, and
4051 * calculate the IJ inputs for the interpolator.
4052 * temp1 = ddx * offset/sample.x + I;
4053 * interp_param.I = ddy * offset/sample.y + temp1;
4054 * temp1 = ddx * offset/sample.x + J;
4055 * interp_param.J = ddy * offset/sample.y + temp1;
4057 for (i
= 0; i
< 2; i
++) {
4058 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4059 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4060 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4061 ddxy_out
, ix_ll
, "");
4062 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4063 ddxy_out
, iy_ll
, "");
4064 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4065 interp_param
, ix_ll
, "");
4068 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4070 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4071 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4073 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4077 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4079 for (chan
= 0; chan
< 4; chan
++) {
4080 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4081 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4083 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4084 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4087 i
= LLVMBuildExtractElement(
4088 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4089 j
= LLVMBuildExtractElement(
4090 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4092 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4095 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4096 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4099 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4100 ctx
->ac
.builder
, gather
, array_idx
, "");
4104 static void vote_all_emit(
4105 const struct lp_build_tgsi_action
*action
,
4106 struct lp_build_tgsi_context
*bld_base
,
4107 struct lp_build_emit_data
*emit_data
)
4109 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4111 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4112 emit_data
->output
[emit_data
->chan
] =
4113 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4116 static void vote_any_emit(
4117 const struct lp_build_tgsi_action
*action
,
4118 struct lp_build_tgsi_context
*bld_base
,
4119 struct lp_build_emit_data
*emit_data
)
4121 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4123 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4124 emit_data
->output
[emit_data
->chan
] =
4125 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4128 static void vote_eq_emit(
4129 const struct lp_build_tgsi_action
*action
,
4130 struct lp_build_tgsi_context
*bld_base
,
4131 struct lp_build_emit_data
*emit_data
)
4133 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4135 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4136 emit_data
->output
[emit_data
->chan
] =
4137 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4140 static void ballot_emit(
4141 const struct lp_build_tgsi_action
*action
,
4142 struct lp_build_tgsi_context
*bld_base
,
4143 struct lp_build_emit_data
*emit_data
)
4145 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4146 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4149 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4150 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4152 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4154 if (ctx
->ac
.wave_size
== 32) {
4155 emit_data
->output
[1] = ctx
->i32_0
;
4157 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4158 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4162 static void read_lane_emit(
4163 const struct lp_build_tgsi_action
*action
,
4164 struct lp_build_tgsi_context
*bld_base
,
4165 struct lp_build_emit_data
*emit_data
)
4167 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4169 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4170 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4171 0, emit_data
->src_chan
);
4173 /* Always read the source invocation (= lane) from the X channel. */
4174 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4176 emit_data
->arg_count
= 2;
4179 /* We currently have no other way to prevent LLVM from lifting the icmp
4180 * calls to a dominating basic block.
4182 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4184 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4185 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4187 emit_data
->output
[emit_data
->chan
] =
4188 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4189 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4190 AC_FUNC_ATTR_READNONE
|
4191 AC_FUNC_ATTR_CONVERGENT
);
4194 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4195 struct lp_build_emit_data
*emit_data
)
4197 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4198 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4202 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4204 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4205 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4209 /* Emit one vertex from the geometry shader */
4210 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4212 LLVMValueRef
*addrs
)
4214 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4216 if (ctx
->shader
->key
.as_ngg
) {
4217 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4221 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4222 struct si_shader
*shader
= ctx
->shader
;
4223 LLVMValueRef soffset
= ac_get_arg(&ctx
->ac
, ctx
->gs2vs_offset
);
4224 LLVMValueRef gs_next_vertex
;
4225 LLVMValueRef can_emit
;
4226 unsigned chan
, offset
;
4229 /* Write vertex attribute values to GSVS ring */
4230 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4231 ctx
->gs_next_vertex
[stream
],
4234 /* If this thread has already emitted the declared maximum number of
4235 * vertices, skip the write: excessive vertex emissions are not
4236 * supposed to have any effect.
4238 * If the shader has no writes to memory, kill it instead. This skips
4239 * further memory loads and may allow LLVM to skip to the end
4242 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4243 LLVMConstInt(ctx
->i32
,
4244 shader
->selector
->gs_max_out_vertices
, 0), "");
4246 bool use_kill
= !info
->writes_memory
;
4248 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4250 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4254 for (i
= 0; i
< info
->num_outputs
; i
++) {
4255 for (chan
= 0; chan
< 4; chan
++) {
4256 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4257 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4260 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4261 LLVMValueRef voffset
=
4262 LLVMConstInt(ctx
->i32
, offset
*
4263 shader
->selector
->gs_max_out_vertices
, 0);
4266 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4267 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4268 LLVMConstInt(ctx
->i32
, 4, 0), "");
4270 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4272 ac_build_buffer_store_dword(&ctx
->ac
,
4273 ctx
->gsvs_ring
[stream
],
4275 voffset
, soffset
, 0,
4276 ac_glc
| ac_slc
| ac_swizzled
);
4280 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4281 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4283 /* Signal vertex emission if vertex data was written. */
4285 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4286 si_get_gs_wave_id(ctx
));
4290 ac_build_endif(&ctx
->ac
, 6505);
4293 /* Emit one vertex from the geometry shader */
4294 static void si_tgsi_emit_vertex(
4295 const struct lp_build_tgsi_action
*action
,
4296 struct lp_build_tgsi_context
*bld_base
,
4297 struct lp_build_emit_data
*emit_data
)
4299 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4300 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4302 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4305 /* Cut one primitive from the geometry shader */
4306 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4309 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4311 if (ctx
->shader
->key
.as_ngg
) {
4312 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4316 /* Signal primitive cut */
4317 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4318 si_get_gs_wave_id(ctx
));
4321 /* Cut one primitive from the geometry shader */
4322 static void si_tgsi_emit_primitive(
4323 const struct lp_build_tgsi_action
*action
,
4324 struct lp_build_tgsi_context
*bld_base
,
4325 struct lp_build_emit_data
*emit_data
)
4327 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4329 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4332 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4333 struct lp_build_tgsi_context
*bld_base
,
4334 struct lp_build_emit_data
*emit_data
)
4336 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4338 /* GFX6 only (thanks to a hw bug workaround):
4339 * The real barrier instruction isn’t needed, because an entire patch
4340 * always fits into a single wave.
4342 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4343 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4344 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4348 ac_build_s_barrier(&ctx
->ac
);
4351 void si_create_function(struct si_shader_context
*ctx
,
4353 LLVMTypeRef
*returns
, unsigned num_returns
,
4354 unsigned max_workgroup_size
)
4356 si_llvm_create_func(ctx
, name
, returns
, num_returns
);
4357 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4359 if (ctx
->screen
->info
.address32_hi
) {
4360 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4361 "amdgpu-32bit-address-high-bits",
4362 ctx
->screen
->info
.address32_hi
);
4365 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4366 "no-signed-zeros-fp-math",
4369 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4372 static void declare_streamout_params(struct si_shader_context
*ctx
,
4373 struct pipe_stream_output_info
*so
)
4375 if (ctx
->screen
->use_ngg_streamout
) {
4376 if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
4377 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4381 /* Streamout SGPRs. */
4382 if (so
->num_outputs
) {
4383 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_config
);
4384 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_write_index
);
4385 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4386 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4389 /* A streamout buffer offset is loaded if the stride is non-zero. */
4390 for (int i
= 0; i
< 4; i
++) {
4394 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_offset
[i
]);
4398 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4400 switch (shader
->selector
->type
) {
4401 case PIPE_SHADER_VERTEX
:
4402 case PIPE_SHADER_TESS_EVAL
:
4403 return shader
->key
.as_ngg
? 128 : 0;
4405 case PIPE_SHADER_TESS_CTRL
:
4406 /* Return this so that LLVM doesn't remove s_barrier
4407 * instructions on chips where we use s_barrier. */
4408 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4410 case PIPE_SHADER_GEOMETRY
:
4411 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4413 case PIPE_SHADER_COMPUTE
:
4414 break; /* see below */
4420 const unsigned *properties
= shader
->selector
->info
.properties
;
4421 unsigned max_work_group_size
=
4422 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4423 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4424 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4426 if (!max_work_group_size
) {
4427 /* This is a variable group size compute shader,
4428 * compile it for the maximum possible group size.
4430 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4432 return max_work_group_size
;
4435 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4438 enum ac_arg_type const_shader_buf_type
;
4440 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4441 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4442 const_shader_buf_type
= AC_ARG_CONST_FLOAT_PTR
;
4444 const_shader_buf_type
= AC_ARG_CONST_DESC_PTR
;
4446 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, const_shader_buf_type
,
4447 assign_params
? &ctx
->const_and_shader_buffers
:
4448 &ctx
->other_const_and_shader_buffers
);
4451 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4454 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4455 assign_params
? &ctx
->samplers_and_images
:
4456 &ctx
->other_samplers_and_images
);
4459 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4462 declare_const_and_shader_buffers(ctx
, assign_params
);
4463 declare_samplers_and_images(ctx
, assign_params
);
4466 static void declare_global_desc_pointers(struct si_shader_context
*ctx
)
4468 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4470 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4471 &ctx
->bindless_samplers_and_images
);
4474 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
)
4476 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4477 if (!ctx
->shader
->is_gs_copy_shader
) {
4478 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.base_vertex
);
4479 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.start_instance
);
4480 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.draw_id
);
4484 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4485 unsigned *num_prolog_vgprs
)
4487 struct si_shader
*shader
= ctx
->shader
;
4489 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.vertex_id
);
4490 if (shader
->key
.as_ls
) {
4491 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->rel_auto_id
);
4492 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4493 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4494 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4496 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4497 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4499 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4500 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4501 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4502 &ctx
->vs_prim_id
); /* user vgpr or PrimID (legacy) */
4503 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4505 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4506 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vs_prim_id
);
4507 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4510 if (!shader
->is_gs_copy_shader
) {
4511 /* Vertex load indices. */
4512 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vertex_index0
);
4513 for (unsigned i
= 1; i
< shader
->selector
->info
.num_inputs
; i
++)
4514 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
4515 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4519 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4520 unsigned vs_blit_property
)
4522 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4523 &ctx
->vs_blit_inputs
); /* i16 x1, y1 */
4524 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* i16 x1, y1 */
4525 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* depth */
4527 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4528 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color0 */
4529 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color1 */
4530 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color2 */
4531 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color3 */
4532 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4533 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x1 */
4534 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y1 */
4535 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x2 */
4536 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y2 */
4537 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.z */
4538 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.w */
4542 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
)
4544 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_u
);
4545 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_v
);
4546 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->tes_rel_patch_id
);
4547 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tes_patch_id
);
4551 /* Convenient merged shader definitions. */
4552 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4553 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4556 static void add_arg_checked(struct ac_shader_args
*args
,
4557 enum ac_arg_regfile file
,
4558 unsigned registers
, enum ac_arg_type type
,
4562 assert(args
->arg_count
== idx
);
4563 ac_add_arg(args
, file
, registers
, type
, arg
);
4566 static void create_function(struct si_shader_context
*ctx
)
4568 struct si_shader
*shader
= ctx
->shader
;
4569 LLVMTypeRef returns
[16+32*4];
4570 unsigned i
, num_return_sgprs
;
4571 unsigned num_returns
= 0;
4572 unsigned num_prolog_vgprs
= 0;
4573 unsigned type
= ctx
->type
;
4574 unsigned vs_blit_property
=
4575 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4577 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
4579 /* Set MERGED shaders. */
4580 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4581 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4582 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4583 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4584 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4588 case PIPE_SHADER_VERTEX
:
4589 declare_global_desc_pointers(ctx
);
4591 if (vs_blit_property
) {
4592 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4595 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4599 declare_per_stage_desc_pointers(ctx
, true);
4600 declare_vs_specific_input_sgprs(ctx
);
4601 if (!shader
->is_gs_copy_shader
) {
4602 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4603 &ctx
->vertex_buffers
);
4606 if (shader
->key
.as_es
) {
4607 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4608 &ctx
->es2gs_offset
);
4609 } else if (shader
->key
.as_ls
) {
4610 /* no extra parameters */
4612 /* The locations of the other parameters are assigned dynamically. */
4613 declare_streamout_params(ctx
, &shader
->selector
->so
);
4617 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4620 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4621 for (i
= 0; i
< 4; i
++)
4622 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4626 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4627 declare_global_desc_pointers(ctx
);
4628 declare_per_stage_desc_pointers(ctx
, true);
4629 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4630 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4631 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4632 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4633 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4634 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4637 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4638 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4640 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4641 * placed after the user SGPRs.
4643 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4644 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4645 for (i
= 0; i
< 11; i
++)
4646 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4649 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4650 /* Merged stages have 8 system SGPRs at the beginning. */
4651 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4652 declare_per_stage_desc_pointers(ctx
,
4653 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4654 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4655 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4656 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4657 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4658 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4659 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4661 declare_global_desc_pointers(ctx
);
4662 declare_per_stage_desc_pointers(ctx
,
4663 ctx
->type
== PIPE_SHADER_VERTEX
);
4664 declare_vs_specific_input_sgprs(ctx
);
4666 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4667 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4668 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4669 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
, &ctx
->vertex_buffers
);
4671 /* VGPRs (first TCS, then VS) */
4672 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4673 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4675 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4676 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4678 /* LS return values are inputs to the TCS main shader part. */
4679 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4680 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4681 for (i
= 0; i
< 2; i
++)
4682 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4684 /* TCS return values are inputs to the TCS epilog.
4686 * param_tcs_offchip_offset, param_tcs_factor_offset,
4687 * param_tcs_offchip_layout, and param_rw_buffers
4688 * should be passed to the epilog.
4690 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4691 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4692 for (i
= 0; i
< 11; i
++)
4693 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4697 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4698 /* Merged stages have 8 system SGPRs at the beginning. */
4699 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4700 declare_per_stage_desc_pointers(ctx
,
4701 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4703 if (ctx
->shader
->key
.as_ngg
)
4704 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_tg_info
);
4706 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4708 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4709 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4710 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4711 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4712 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4714 declare_global_desc_pointers(ctx
);
4715 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4716 declare_per_stage_desc_pointers(ctx
,
4717 (ctx
->type
== PIPE_SHADER_VERTEX
||
4718 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4721 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4722 if (vs_blit_property
)
4723 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4725 declare_vs_specific_input_sgprs(ctx
);
4727 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4728 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4729 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4730 /* Declare as many input SGPRs as the VS has. */
4733 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4734 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4735 &ctx
->vertex_buffers
);
4738 /* VGPRs (first GS, then VS/TES) */
4739 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx01_offset
);
4740 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx23_offset
);
4741 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4742 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4743 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx45_offset
);
4745 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4746 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4747 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4748 declare_tes_input_vgprs(ctx
);
4751 if (ctx
->shader
->key
.as_es
&&
4752 (ctx
->type
== PIPE_SHADER_VERTEX
||
4753 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4754 unsigned num_user_sgprs
;
4756 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4757 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4759 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4761 /* ES return values are inputs to GS. */
4762 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4763 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4764 for (i
= 0; i
< 5; i
++)
4765 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4769 case PIPE_SHADER_TESS_EVAL
:
4770 declare_global_desc_pointers(ctx
);
4771 declare_per_stage_desc_pointers(ctx
, true);
4772 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4773 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4774 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4776 if (shader
->key
.as_es
) {
4777 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4778 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4779 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->es2gs_offset
);
4781 declare_streamout_params(ctx
, &shader
->selector
->so
);
4782 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4786 declare_tes_input_vgprs(ctx
);
4789 case PIPE_SHADER_GEOMETRY
:
4790 declare_global_desc_pointers(ctx
);
4791 declare_per_stage_desc_pointers(ctx
, true);
4792 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4793 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_wave_id
);
4796 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[0]);
4797 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[1]);
4798 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4799 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[2]);
4800 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[3]);
4801 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[4]);
4802 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[5]);
4803 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4806 case PIPE_SHADER_FRAGMENT
:
4807 declare_global_desc_pointers(ctx
);
4808 declare_per_stage_desc_pointers(ctx
, true);
4809 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
,
4810 SI_PARAM_ALPHA_REF
);
4811 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4812 &ctx
->args
.prim_mask
, SI_PARAM_PRIM_MASK
);
4814 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_sample
,
4815 SI_PARAM_PERSP_SAMPLE
);
4816 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4817 &ctx
->args
.persp_center
, SI_PARAM_PERSP_CENTER
);
4818 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4819 &ctx
->args
.persp_centroid
, SI_PARAM_PERSP_CENTROID
);
4820 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4821 NULL
, SI_PARAM_PERSP_PULL_MODEL
);
4822 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4823 &ctx
->args
.linear_sample
, SI_PARAM_LINEAR_SAMPLE
);
4824 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4825 &ctx
->args
.linear_center
, SI_PARAM_LINEAR_CENTER
);
4826 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4827 &ctx
->args
.linear_centroid
, SI_PARAM_LINEAR_CENTROID
);
4828 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_FLOAT
,
4829 NULL
, SI_PARAM_LINE_STIPPLE_TEX
);
4830 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4831 &ctx
->args
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4832 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4833 &ctx
->args
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4834 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4835 &ctx
->args
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4836 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4837 &ctx
->args
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4838 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4839 &ctx
->args
.front_face
, SI_PARAM_FRONT_FACE
);
4840 shader
->info
.face_vgpr_index
= 20;
4841 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4842 &ctx
->args
.ancillary
, SI_PARAM_ANCILLARY
);
4843 shader
->info
.ancillary_vgpr_index
= 21;
4844 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4845 &ctx
->args
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4846 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4847 &ctx
->pos_fixed_pt
, SI_PARAM_POS_FIXED_PT
);
4849 /* Color inputs from the prolog. */
4850 if (shader
->selector
->info
.colors_read
) {
4851 unsigned num_color_elements
=
4852 util_bitcount(shader
->selector
->info
.colors_read
);
4854 for (i
= 0; i
< num_color_elements
; i
++)
4855 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
4857 num_prolog_vgprs
+= num_color_elements
;
4860 /* Outputs for the epilog. */
4861 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4864 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4865 shader
->selector
->info
.writes_z
+
4866 shader
->selector
->info
.writes_stencil
+
4867 shader
->selector
->info
.writes_samplemask
+
4868 1 /* SampleMaskIn */;
4870 num_returns
= MAX2(num_returns
,
4872 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4874 for (i
= 0; i
< num_return_sgprs
; i
++)
4875 returns
[i
] = ctx
->i32
;
4876 for (; i
< num_returns
; i
++)
4877 returns
[i
] = ctx
->f32
;
4880 case PIPE_SHADER_COMPUTE
:
4881 declare_global_desc_pointers(ctx
);
4882 declare_per_stage_desc_pointers(ctx
, true);
4883 if (shader
->selector
->info
.uses_grid_size
)
4884 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
,
4885 &ctx
->args
.num_work_groups
);
4886 if (shader
->selector
->info
.uses_block_size
&&
4887 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4888 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
, &ctx
->block_size
);
4890 unsigned cs_user_data_dwords
=
4891 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
4892 if (cs_user_data_dwords
) {
4893 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, cs_user_data_dwords
, AC_ARG_INT
,
4894 &ctx
->cs_user_data
);
4897 /* Hardware SGPRs. */
4898 for (i
= 0; i
< 3; i
++) {
4899 if (shader
->selector
->info
.uses_block_id
[i
]) {
4900 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4901 &ctx
->args
.workgroup_ids
[i
]);
4904 if (shader
->selector
->info
.uses_subgroup_info
)
4905 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.tg_size
);
4907 /* Hardware VGPRs. */
4908 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4909 &ctx
->args
.local_invocation_ids
);
4912 assert(0 && "unimplemented shader");
4916 si_create_function(ctx
, "main", returns
, num_returns
,
4917 si_get_max_workgroup_size(shader
));
4919 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4920 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4921 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4922 "InitialPSInputAddr",
4923 S_0286D0_PERSP_SAMPLE_ENA(1) |
4924 S_0286D0_PERSP_CENTER_ENA(1) |
4925 S_0286D0_PERSP_CENTROID_ENA(1) |
4926 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4927 S_0286D0_LINEAR_CENTER_ENA(1) |
4928 S_0286D0_LINEAR_CENTROID_ENA(1) |
4929 S_0286D0_FRONT_FACE_ENA(1) |
4930 S_0286D0_ANCILLARY_ENA(1) |
4931 S_0286D0_POS_FIXED_PT_ENA(1));
4934 shader
->info
.num_input_sgprs
= ctx
->args
.num_sgprs_used
;
4935 shader
->info
.num_input_vgprs
= ctx
->args
.num_vgprs_used
;
4937 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4938 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4940 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4941 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
4942 /* The LSHS size is not known until draw time, so we append it
4943 * at the end of whatever LDS use there may be in the rest of
4944 * the shader (currently none, unless LLVM decides to do its
4945 * own LDS-based lowering).
4947 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
4948 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4949 "__lds_end", AC_ADDR_SPACE_LDS
);
4950 LLVMSetAlignment(ctx
->ac
.lds
, 256);
4952 ac_declare_lds_as_pointer(&ctx
->ac
);
4956 /* Unlike radv, we override these arguments in the prolog, so to the
4957 * API shader they appear as normal arguments.
4959 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4960 ctx
->abi
.vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.vertex_id
);
4961 ctx
->abi
.instance_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.instance_id
);
4962 } else if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
4963 ctx
->abi
.persp_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.persp_centroid
);
4964 ctx
->abi
.linear_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.linear_centroid
);
4968 /* Ensure that the esgs ring is declared.
4970 * We declare it with 64KB alignment as a hint that the
4971 * pointer value will always be 0.
4973 static void declare_esgs_ring(struct si_shader_context
*ctx
)
4978 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
4980 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
4981 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4984 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
4985 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
4989 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4992 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4994 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4996 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
4998 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
4999 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5001 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5003 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5006 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5008 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
5009 /* Declare the ESGS ring as an explicit LDS symbol. */
5010 declare_esgs_ring(ctx
);
5012 ac_declare_lds_as_pointer(&ctx
->ac
);
5013 ctx
->esgs_ring
= ctx
->ac
.lds
;
5018 if (ctx
->shader
->is_gs_copy_shader
) {
5019 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5022 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5023 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5024 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5025 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5026 LLVMValueRef base_ring
;
5028 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5030 /* The conceptual layout of the GSVS ring is
5031 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5032 * but the real memory layout is swizzled across
5034 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5036 * Override the buffer descriptor accordingly.
5038 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5039 uint64_t stream_offset
= 0;
5041 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5042 unsigned num_components
;
5044 unsigned num_records
;
5045 LLVMValueRef ring
, tmp
;
5047 num_components
= sel
->info
.num_stream_output_components
[stream
];
5048 if (!num_components
)
5051 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5053 /* Limit on the stride field for <= GFX7. */
5054 assert(stride
< (1 << 14));
5056 num_records
= ctx
->ac
.wave_size
;
5058 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5059 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5060 tmp
= LLVMBuildAdd(builder
, tmp
,
5061 LLVMConstInt(ctx
->i64
,
5062 stream_offset
, 0), "");
5063 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5065 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5066 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5067 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5068 tmp
= LLVMBuildOr(builder
, tmp
,
5069 LLVMConstInt(ctx
->i32
,
5070 S_008F04_STRIDE(stride
) |
5071 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5072 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5073 ring
= LLVMBuildInsertElement(builder
, ring
,
5074 LLVMConstInt(ctx
->i32
, num_records
, 0),
5075 LLVMConstInt(ctx
->i32
, 2, 0), "");
5078 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5079 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5080 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5081 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5082 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5083 S_008F0C_ADD_TID_ENABLE(1);
5085 if (ctx
->ac
.chip_class
>= GFX10
) {
5086 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5087 S_008F0C_OOB_SELECT(2) |
5088 S_008F0C_RESOURCE_LEVEL(1);
5090 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5091 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5092 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5095 ring
= LLVMBuildInsertElement(builder
, ring
,
5096 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5097 LLVMConstInt(ctx
->i32
, 3, 0), "");
5099 ctx
->gsvs_ring
[stream
] = ring
;
5101 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5102 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5106 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5107 LLVMValueRef param_rw_buffers
,
5108 struct ac_arg param_pos_fixed_pt
)
5110 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5111 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5113 /* Use the fixed-point gl_FragCoord input.
5114 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5115 * per coordinate to get the repeating effect.
5117 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5118 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5120 /* Load the buffer descriptor. */
5121 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5122 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5124 /* The stipple pattern is 32x32, each row has 32 bits. */
5125 offset
= LLVMBuildMul(builder
, address
[1],
5126 LLVMConstInt(ctx
->i32
, 4, 0), "");
5127 row
= buffer_load_const(ctx
, desc
, offset
);
5128 row
= ac_to_integer(&ctx
->ac
, row
);
5129 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5130 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5131 ac_build_kill_if_false(&ctx
->ac
, bit
);
5134 /* For the UMR disassembler. */
5135 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5136 #define DEBUGGER_NUM_MARKERS 5
5138 static bool si_shader_binary_open(struct si_screen
*screen
,
5139 struct si_shader
*shader
,
5140 struct ac_rtld_binary
*rtld
)
5142 const struct si_shader_selector
*sel
= shader
->selector
;
5143 const char *part_elfs
[5];
5144 size_t part_sizes
[5];
5145 unsigned num_parts
= 0;
5147 #define add_part(shader_or_part) \
5148 if (shader_or_part) { \
5149 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5150 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5154 add_part(shader
->prolog
);
5155 add_part(shader
->previous_stage
);
5156 add_part(shader
->prolog2
);
5158 add_part(shader
->epilog
);
5162 struct ac_rtld_symbol lds_symbols
[2];
5163 unsigned num_lds_symbols
= 0;
5165 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5166 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5167 /* We add this symbol even on LLVM <= 8 to ensure that
5168 * shader->config.lds_size is set correctly below.
5170 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5171 sym
->name
= "esgs_ring";
5172 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5173 sym
->align
= 64 * 1024;
5176 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5177 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5178 sym
->name
= "ngg_emit";
5179 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5183 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5184 .info
= &screen
->info
,
5186 .halt_at_entry
= screen
->options
.halt_shaders
,
5188 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5189 .wave_size
= si_get_shader_wave_size(shader
),
5190 .num_parts
= num_parts
,
5191 .elf_ptrs
= part_elfs
,
5192 .elf_sizes
= part_sizes
,
5193 .num_shared_lds_symbols
= num_lds_symbols
,
5194 .shared_lds_symbols
= lds_symbols
});
5196 if (rtld
->lds_size
> 0) {
5197 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5198 shader
->config
.lds_size
=
5199 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5205 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5207 struct ac_rtld_binary rtld
;
5208 si_shader_binary_open(screen
, shader
, &rtld
);
5209 return rtld
.exec_size
;
5212 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5214 uint64_t *scratch_va
= data
;
5216 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5217 *value
= (uint32_t)*scratch_va
;
5220 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5221 /* Enable scratch coalescing. */
5222 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5223 S_008F04_SWIZZLE_ENABLE(1);
5230 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5231 uint64_t scratch_va
)
5233 struct ac_rtld_binary binary
;
5234 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5237 si_resource_reference(&shader
->bo
, NULL
);
5238 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5239 sscreen
->info
.cpdma_prefetch_writes_memory
?
5240 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5241 PIPE_USAGE_IMMUTABLE
,
5242 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5248 struct ac_rtld_upload_info u
= {};
5250 u
.get_external_symbol
= si_get_external_symbol
;
5251 u
.cb_data
= &scratch_va
;
5252 u
.rx_va
= shader
->bo
->gpu_address
;
5253 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5254 PIPE_TRANSFER_READ_WRITE
|
5255 PIPE_TRANSFER_UNSYNCHRONIZED
|
5256 RADEON_TRANSFER_TEMPORARY
);
5260 bool ok
= ac_rtld_upload(&u
);
5262 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5263 ac_rtld_close(&binary
);
5268 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5269 const struct si_shader_binary
*binary
,
5270 enum pipe_shader_type shader_type
,
5272 struct pipe_debug_callback
*debug
,
5273 const char *name
, FILE *file
)
5275 struct ac_rtld_binary rtld_binary
;
5277 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5278 .info
= &screen
->info
,
5279 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5280 .wave_size
= wave_size
,
5282 .elf_ptrs
= &binary
->elf_buffer
,
5283 .elf_sizes
= &binary
->elf_size
}))
5289 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5292 if (nbytes
> INT_MAX
)
5295 if (debug
&& debug
->debug_message
) {
5296 /* Very long debug messages are cut off, so send the
5297 * disassembly one line at a time. This causes more
5298 * overhead, but on the plus side it simplifies
5299 * parsing of resulting logs.
5301 pipe_debug_message(debug
, SHADER_INFO
,
5302 "Shader Disassembly Begin");
5305 while (line
< nbytes
) {
5306 int count
= nbytes
- line
;
5307 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5309 count
= nl
- (disasm
+ line
);
5312 pipe_debug_message(debug
, SHADER_INFO
,
5313 "%.*s", count
, disasm
+ line
);
5319 pipe_debug_message(debug
, SHADER_INFO
,
5320 "Shader Disassembly End");
5324 fprintf(file
, "Shader %s disassembly:\n", name
);
5325 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5329 ac_rtld_close(&rtld_binary
);
5332 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5334 struct si_screen
*sscreen
= shader
->selector
->screen
;
5335 struct ac_shader_config
*conf
= &shader
->config
;
5336 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5337 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5338 unsigned lds_per_wave
= 0;
5339 unsigned max_simd_waves
;
5341 max_simd_waves
= sscreen
->info
.max_wave64_per_simd
;
5343 /* Compute LDS usage for PS. */
5344 switch (shader
->selector
->type
) {
5345 case PIPE_SHADER_FRAGMENT
:
5346 /* The minimum usage per wave is (num_inputs * 48). The maximum
5347 * usage is (num_inputs * 48 * 16).
5348 * We can get anything in between and it varies between waves.
5350 * The 48 bytes per input for a single primitive is equal to
5351 * 4 bytes/component * 4 components/input * 3 points.
5353 * Other stages don't know the size at compile time or don't
5354 * allocate LDS per wave, but instead they do it per thread group.
5356 lds_per_wave
= conf
->lds_size
* lds_increment
+
5357 align(num_inputs
* 48, lds_increment
);
5359 case PIPE_SHADER_COMPUTE
:
5360 if (shader
->selector
) {
5361 unsigned max_workgroup_size
=
5362 si_get_max_workgroup_size(shader
);
5363 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5364 DIV_ROUND_UP(max_workgroup_size
,
5365 sscreen
->compute_wave_size
);
5371 /* Compute the per-SIMD wave counts. */
5372 if (conf
->num_sgprs
) {
5374 MIN2(max_simd_waves
,
5375 sscreen
->info
.num_physical_sgprs_per_simd
/ conf
->num_sgprs
);
5378 if (conf
->num_vgprs
) {
5379 /* Always print wave limits as Wave64, so that we can compare
5380 * Wave32 and Wave64 with shader-db fairly. */
5381 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
;
5382 max_simd_waves
= MIN2(max_simd_waves
, max_vgprs
/ conf
->num_vgprs
);
5385 /* LDS is 64KB per CU (4 SIMDs) on GFX6-9, which is 16KB per SIMD (usage above
5386 * 16KB makes some SIMDs unoccupied).
5388 * LDS is 128KB in WGP mode and 64KB in CU mode. Assume the WGP mode is used.
5390 unsigned max_lds_size
= sscreen
->info
.chip_class
>= GFX10
? 128*1024 : 64*1024;
5391 unsigned max_lds_per_simd
= max_lds_size
/ 4;
5393 max_simd_waves
= MIN2(max_simd_waves
, max_lds_per_simd
/ lds_per_wave
);
5395 shader
->info
.max_simd_waves
= max_simd_waves
;
5398 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5399 struct si_shader
*shader
,
5400 struct pipe_debug_callback
*debug
)
5402 const struct ac_shader_config
*conf
= &shader
->config
;
5404 if (screen
->options
.debug_disassembly
)
5405 si_shader_dump_disassembly(screen
, &shader
->binary
,
5406 shader
->selector
->type
,
5407 si_get_shader_wave_size(shader
),
5408 debug
, "main", NULL
);
5410 pipe_debug_message(debug
, SHADER_INFO
,
5411 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5412 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5413 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5414 conf
->num_sgprs
, conf
->num_vgprs
,
5415 si_get_shader_binary_size(screen
, shader
),
5416 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5417 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5418 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5421 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5422 struct si_shader
*shader
,
5424 bool check_debug_option
)
5426 const struct ac_shader_config
*conf
= &shader
->config
;
5428 if (!check_debug_option
||
5429 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5430 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5431 fprintf(file
, "*** SHADER CONFIG ***\n"
5432 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5433 "SPI_PS_INPUT_ENA = 0x%04x\n",
5434 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5437 fprintf(file
, "*** SHADER STATS ***\n"
5440 "Spilled SGPRs: %d\n"
5441 "Spilled VGPRs: %d\n"
5442 "Private memory VGPRs: %d\n"
5443 "Code Size: %d bytes\n"
5445 "Scratch: %d bytes per wave\n"
5447 "********************\n\n\n",
5448 conf
->num_sgprs
, conf
->num_vgprs
,
5449 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5450 shader
->info
.private_mem_vgprs
,
5451 si_get_shader_binary_size(sscreen
, shader
),
5452 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5453 shader
->info
.max_simd_waves
);
5457 const char *si_get_shader_name(const struct si_shader
*shader
)
5459 switch (shader
->selector
->type
) {
5460 case PIPE_SHADER_VERTEX
:
5461 if (shader
->key
.as_es
)
5462 return "Vertex Shader as ES";
5463 else if (shader
->key
.as_ls
)
5464 return "Vertex Shader as LS";
5465 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5466 return "Vertex Shader as Primitive Discard CS";
5467 else if (shader
->key
.as_ngg
)
5468 return "Vertex Shader as ESGS";
5470 return "Vertex Shader as VS";
5471 case PIPE_SHADER_TESS_CTRL
:
5472 return "Tessellation Control Shader";
5473 case PIPE_SHADER_TESS_EVAL
:
5474 if (shader
->key
.as_es
)
5475 return "Tessellation Evaluation Shader as ES";
5476 else if (shader
->key
.as_ngg
)
5477 return "Tessellation Evaluation Shader as ESGS";
5479 return "Tessellation Evaluation Shader as VS";
5480 case PIPE_SHADER_GEOMETRY
:
5481 if (shader
->is_gs_copy_shader
)
5482 return "GS Copy Shader as VS";
5484 return "Geometry Shader";
5485 case PIPE_SHADER_FRAGMENT
:
5486 return "Pixel Shader";
5487 case PIPE_SHADER_COMPUTE
:
5488 return "Compute Shader";
5490 return "Unknown Shader";
5494 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5495 struct pipe_debug_callback
*debug
,
5496 FILE *file
, bool check_debug_option
)
5498 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5500 if (!check_debug_option
||
5501 si_can_dump_shader(sscreen
, shader_type
))
5502 si_dump_shader_key(shader
, file
);
5504 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5505 if (shader
->previous_stage
&&
5506 shader
->previous_stage
->binary
.llvm_ir_string
) {
5507 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5508 si_get_shader_name(shader
));
5509 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5512 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5513 si_get_shader_name(shader
));
5514 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5517 if (!check_debug_option
||
5518 (si_can_dump_shader(sscreen
, shader_type
) &&
5519 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5520 unsigned wave_size
= si_get_shader_wave_size(shader
);
5522 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5525 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5526 shader_type
, wave_size
, debug
, "prolog", file
);
5527 if (shader
->previous_stage
)
5528 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5529 shader_type
, wave_size
, debug
, "previous stage", file
);
5530 if (shader
->prolog2
)
5531 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5532 shader_type
, wave_size
, debug
, "prolog2", file
);
5534 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5535 wave_size
, debug
, "main", file
);
5538 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5539 shader_type
, wave_size
, debug
, "epilog", file
);
5540 fprintf(file
, "\n");
5543 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5546 static int si_compile_llvm(struct si_screen
*sscreen
,
5547 struct si_shader_binary
*binary
,
5548 struct ac_shader_config
*conf
,
5549 struct ac_llvm_compiler
*compiler
,
5551 struct pipe_debug_callback
*debug
,
5552 enum pipe_shader_type shader_type
,
5555 bool less_optimized
)
5557 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5559 if (si_can_dump_shader(sscreen
, shader_type
)) {
5560 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5562 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5563 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5564 ac_dump_module(mod
);
5565 fprintf(stderr
, "\n");
5569 if (sscreen
->record_llvm_ir
) {
5570 char *ir
= LLVMPrintModuleToString(mod
);
5571 binary
->llvm_ir_string
= strdup(ir
);
5572 LLVMDisposeMessage(ir
);
5575 if (!si_replace_shader(count
, binary
)) {
5576 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5577 less_optimized
, wave_size
);
5582 struct ac_rtld_binary rtld
;
5583 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5584 .info
= &sscreen
->info
,
5585 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5586 .wave_size
= wave_size
,
5588 .elf_ptrs
= &binary
->elf_buffer
,
5589 .elf_sizes
= &binary
->elf_size
}))
5592 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5593 ac_rtld_close(&rtld
);
5597 /* Enable 64-bit and 16-bit denormals, because there is no performance
5600 * If denormals are enabled, all floating-point output modifiers are
5603 * Don't enable denormals for 32-bit floats, because:
5604 * - Floating-point output modifiers would be ignored by the hw.
5605 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5606 * have to stop using those.
5607 * - GFX6 & GFX7 would be very slow.
5609 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5614 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5616 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5617 LLVMBuildRetVoid(ctx
->ac
.builder
);
5619 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5622 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5624 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5625 struct ac_llvm_compiler
*compiler
,
5626 struct si_shader_selector
*gs_selector
,
5627 struct pipe_debug_callback
*debug
)
5629 struct si_shader_context ctx
;
5630 struct si_shader
*shader
;
5631 LLVMBuilderRef builder
;
5632 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5633 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5637 shader
= CALLOC_STRUCT(si_shader
);
5641 /* We can leave the fence as permanently signaled because the GS copy
5642 * shader only becomes visible globally after it has been compiled. */
5643 util_queue_fence_init(&shader
->ready
);
5645 shader
->selector
= gs_selector
;
5646 shader
->is_gs_copy_shader
= true;
5648 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5649 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false),
5651 ctx
.shader
= shader
;
5652 ctx
.type
= PIPE_SHADER_VERTEX
;
5654 builder
= ctx
.ac
.builder
;
5656 create_function(&ctx
);
5657 preload_ring_buffers(&ctx
);
5659 LLVMValueRef voffset
=
5660 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5661 LLVMConstInt(ctx
.i32
, 4, 0), "");
5663 /* Fetch the vertex stream ID.*/
5664 LLVMValueRef stream_id
;
5666 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5667 stream_id
= si_unpack_param(&ctx
, ctx
.streamout_config
, 24, 2);
5669 stream_id
= ctx
.i32_0
;
5671 /* Fill in output information. */
5672 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5673 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5674 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5676 for (int chan
= 0; chan
< 4; chan
++) {
5677 outputs
[i
].vertex_stream
[chan
] =
5678 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5682 LLVMBasicBlockRef end_bb
;
5683 LLVMValueRef switch_inst
;
5685 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5686 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5688 for (int stream
= 0; stream
< 4; stream
++) {
5689 LLVMBasicBlockRef bb
;
5692 if (!gsinfo
->num_stream_output_components
[stream
])
5695 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5698 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5699 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5700 LLVMPositionBuilderAtEnd(builder
, bb
);
5702 /* Fetch vertex data from GSVS ring */
5704 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5705 for (unsigned chan
= 0; chan
< 4; chan
++) {
5706 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5707 outputs
[i
].vertex_stream
[chan
] != stream
) {
5708 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5712 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5713 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5716 outputs
[i
].values
[chan
] =
5717 ac_build_buffer_load(&ctx
.ac
,
5718 ctx
.gsvs_ring
[0], 1,
5720 soffset
, 0, ac_glc
| ac_slc
,
5725 /* Streamout and exports. */
5726 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5727 si_llvm_emit_streamout(&ctx
, outputs
,
5728 gsinfo
->num_outputs
,
5733 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5735 LLVMBuildBr(builder
, end_bb
);
5738 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5740 LLVMBuildRetVoid(ctx
.ac
.builder
);
5742 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5743 si_llvm_optimize_module(&ctx
);
5746 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5747 &ctx
.shader
->config
, ctx
.compiler
,
5749 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5750 "GS Copy Shader", false) == 0) {
5751 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5752 fprintf(stderr
, "GS Copy Shader:\n");
5753 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5755 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5756 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5761 si_llvm_dispose(&ctx
);
5767 si_fix_resource_usage(sscreen
, shader
);
5772 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5773 const struct si_vs_prolog_bits
*prolog
,
5774 const char *prefix
, FILE *f
)
5776 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5777 prefix
, prolog
->instance_divisor_is_one
);
5778 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5779 prefix
, prolog
->instance_divisor_is_fetched
);
5780 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5781 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5782 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5783 prefix
, prolog
->ls_vgpr_fix
);
5785 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5786 fprintf(f
, " mono.vs.fix_fetch = {");
5787 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5788 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5794 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5795 fix
.u
.num_channels_m1
, fix
.u
.format
);
5800 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5802 const struct si_shader_key
*key
= &shader
->key
;
5803 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5805 fprintf(f
, "SHADER KEY\n");
5807 switch (shader_type
) {
5808 case PIPE_SHADER_VERTEX
:
5809 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5810 "part.vs.prolog", f
);
5811 fprintf(f
, " as_es = %u\n", key
->as_es
);
5812 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5813 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5814 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5815 key
->mono
.u
.vs_export_prim_id
);
5816 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5817 key
->opt
.vs_as_prim_discard_cs
);
5818 fprintf(f
, " opt.cs_prim_type = %s\n",
5819 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5820 fprintf(f
, " opt.cs_indexed = %u\n",
5821 key
->opt
.cs_indexed
);
5822 fprintf(f
, " opt.cs_instancing = %u\n",
5823 key
->opt
.cs_instancing
);
5824 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5825 key
->opt
.cs_primitive_restart
);
5826 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5827 key
->opt
.cs_provoking_vertex_first
);
5828 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5829 key
->opt
.cs_need_correct_orientation
);
5830 fprintf(f
, " opt.cs_cull_front = %u\n",
5831 key
->opt
.cs_cull_front
);
5832 fprintf(f
, " opt.cs_cull_back = %u\n",
5833 key
->opt
.cs_cull_back
);
5834 fprintf(f
, " opt.cs_cull_z = %u\n",
5835 key
->opt
.cs_cull_z
);
5836 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5837 key
->opt
.cs_halfz_clip_space
);
5840 case PIPE_SHADER_TESS_CTRL
:
5841 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5842 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5843 "part.tcs.ls_prolog", f
);
5845 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5846 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5849 case PIPE_SHADER_TESS_EVAL
:
5850 fprintf(f
, " as_es = %u\n", key
->as_es
);
5851 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5852 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5853 key
->mono
.u
.vs_export_prim_id
);
5856 case PIPE_SHADER_GEOMETRY
:
5857 if (shader
->is_gs_copy_shader
)
5860 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5861 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5862 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5863 "part.gs.vs_prolog", f
);
5865 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5866 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5867 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5870 case PIPE_SHADER_COMPUTE
:
5873 case PIPE_SHADER_FRAGMENT
:
5874 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5875 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5876 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5877 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5878 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5879 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5880 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5881 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5882 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5883 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5884 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5885 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5886 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5887 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5888 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5889 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5890 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5891 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5892 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5893 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5894 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5895 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5902 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5903 shader_type
== PIPE_SHADER_TESS_EVAL
||
5904 shader_type
== PIPE_SHADER_VERTEX
) &&
5905 !key
->as_es
&& !key
->as_ls
) {
5906 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5907 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5911 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5912 struct si_screen
*sscreen
,
5913 struct ac_llvm_compiler
*compiler
,
5917 struct lp_build_tgsi_context
*bld_base
;
5919 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
,
5920 nir
? 64 : wave_size
);
5922 bld_base
= &ctx
->bld_base
;
5923 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5925 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5926 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5927 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5929 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5931 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5933 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5934 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5935 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5936 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5938 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5939 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5940 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5941 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5942 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5943 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5944 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5945 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5947 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5948 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5949 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5952 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5954 struct si_shader
*shader
= ctx
->shader
;
5955 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5957 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5958 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5959 shader
->key
.as_ls
||
5963 ac_optimize_vs_outputs(&ctx
->ac
,
5965 shader
->info
.vs_output_param_offset
,
5967 &shader
->info
.nr_param_exports
);
5970 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5971 struct ac_arg param
, unsigned bitoffset
)
5973 LLVMValueRef args
[] = {
5974 ac_get_arg(&ctx
->ac
, param
),
5975 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5977 ac_build_intrinsic(&ctx
->ac
,
5978 "llvm.amdgcn.init.exec.from.input",
5979 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5982 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5983 const struct si_vs_prolog_bits
*key
)
5985 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5987 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5990 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5991 struct nir_shader
*nir
, bool free_nir
)
5993 struct si_shader
*shader
= ctx
->shader
;
5994 struct si_shader_selector
*sel
= shader
->selector
;
5995 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
5997 // TODO clean all this up!
5998 switch (ctx
->type
) {
5999 case PIPE_SHADER_VERTEX
:
6000 ctx
->load_input
= declare_input_vs
;
6001 if (shader
->key
.as_ls
)
6002 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6003 else if (shader
->key
.as_es
)
6004 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6005 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6006 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6007 else if (shader
->key
.as_ngg
)
6008 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6010 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6011 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6012 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6014 case PIPE_SHADER_TESS_CTRL
:
6015 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6016 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6017 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6018 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6019 bld_base
->emit_store
= store_output_tcs
;
6020 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6021 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6022 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6023 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6025 case PIPE_SHADER_TESS_EVAL
:
6026 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6027 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6028 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6029 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6030 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6031 if (shader
->key
.as_es
)
6032 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6033 else if (shader
->key
.as_ngg
)
6034 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6036 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6037 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6039 case PIPE_SHADER_GEOMETRY
:
6040 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6041 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6042 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6043 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6044 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6045 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6047 case PIPE_SHADER_FRAGMENT
:
6048 ctx
->load_input
= declare_input_fs
;
6049 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6050 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6051 ctx
->abi
.load_sample_position
= load_sample_position
;
6052 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6053 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6054 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6056 case PIPE_SHADER_COMPUTE
:
6057 ctx
->abi
.load_local_group_size
= get_block_size
;
6060 assert(!"Unsupported shader type");
6064 ctx
->abi
.load_ubo
= load_ubo
;
6065 ctx
->abi
.load_ssbo
= load_ssbo
;
6067 create_function(ctx
);
6068 preload_ring_buffers(ctx
);
6070 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6071 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6072 for (unsigned i
= 0; i
< 6; i
++) {
6073 ctx
->invoc0_tess_factors
[i
] =
6074 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6078 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6079 for (unsigned i
= 0; i
< 4; i
++) {
6080 ctx
->gs_next_vertex
[i
] =
6081 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6083 if (shader
->key
.as_ngg
) {
6084 for (unsigned i
= 0; i
< 4; ++i
) {
6085 ctx
->gs_curprim_verts
[i
] =
6086 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6087 ctx
->gs_generated_prims
[i
] =
6088 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6091 unsigned scratch_size
= 8;
6092 if (sel
->so
.num_outputs
)
6095 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6096 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6097 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6098 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6099 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6101 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6102 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6103 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6104 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6108 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6109 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6110 /* Unconditionally declare scratch space base for streamout and
6111 * vertex compaction. Whether space is actually allocated is
6112 * determined during linking / PM4 creation.
6114 * Add an extra dword per vertex to ensure an odd stride, which
6115 * avoids bank conflicts for SoA accesses.
6117 declare_esgs_ring(ctx
);
6119 /* This is really only needed when streamout and / or vertex
6120 * compaction is enabled.
6122 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6123 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6124 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6125 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6126 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6129 /* For GFX9 merged shaders:
6130 * - Set EXEC for the first shader. If the prolog is present, set
6131 * EXEC there instead.
6132 * - Add a barrier before the second shader.
6133 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6134 * an if-statement. This is required for correctness in geometry
6135 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6138 * For monolithic merged shaders, the first shader is wrapped in an
6139 * if-block together with its prolog in si_build_wrapper_function.
6141 * NGG vertex and tess eval shaders running as the last
6142 * vertex/geometry stage handle execution explicitly using
6145 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6146 if (!shader
->is_monolithic
&&
6147 sel
->info
.num_instructions
> 1 && /* not empty shader */
6148 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6149 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6150 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6151 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6152 si_init_exec_from_input(ctx
,
6153 ctx
->merged_wave_info
, 0);
6154 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6155 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6156 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6157 LLVMValueRef num_threads
;
6158 bool nested_barrier
;
6160 if (!shader
->is_monolithic
||
6161 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6162 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6163 ac_init_exec_full_mask(&ctx
->ac
);
6165 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6166 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6167 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6168 gfx10_ngg_gs_emit_prologue(ctx
);
6169 nested_barrier
= false;
6171 nested_barrier
= true;
6174 /* Number of patches / primitives */
6175 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 8, 8);
6177 /* Number of vertices */
6178 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 0, 8);
6179 nested_barrier
= false;
6183 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6184 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6186 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6187 ctx
->merged_wrap_if_label
= 11500;
6188 ac_build_ifcc(&ctx
->ac
, ena
, ctx
->merged_wrap_if_label
);
6190 if (nested_barrier
) {
6191 /* Execute a barrier before the second shader in
6194 * Execute the barrier inside the conditional block,
6195 * so that empty waves can jump directly to s_endpgm,
6196 * which will also signal the barrier.
6198 * This is possible in gfx9, because an empty wave
6199 * for the second shader does not participate in
6200 * the epilogue. With NGG, empty waves may still
6201 * be required to export data (e.g. GS output vertices),
6202 * so we cannot let them exit early.
6204 * If the shader is TCS and the TCS epilog is present
6205 * and contains a barrier, it will wait there and then
6208 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6213 if (sel
->force_correct_derivs_after_kill
) {
6214 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6215 /* true = don't kill. */
6216 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6217 ctx
->postponed_kill
);
6221 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6222 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6226 bool success
= si_nir_build_llvm(ctx
, nir
);
6230 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6235 si_llvm_build_ret(ctx
, ctx
->return_value
);
6240 * Compute the VS prolog key, which contains all the information needed to
6241 * build the VS prolog function, and set shader->info bits where needed.
6243 * \param info Shader info of the vertex shader.
6244 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6245 * \param prolog_key Key of the VS prolog
6246 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6247 * \param key Output shader part key.
6249 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6250 unsigned num_input_sgprs
,
6251 const struct si_vs_prolog_bits
*prolog_key
,
6252 struct si_shader
*shader_out
,
6253 union si_shader_part_key
*key
)
6255 memset(key
, 0, sizeof(*key
));
6256 key
->vs_prolog
.states
= *prolog_key
;
6257 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6258 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6259 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6260 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6261 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6263 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6264 key
->vs_prolog
.as_ls
= 1;
6265 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6266 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6267 key
->vs_prolog
.as_es
= 1;
6268 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6269 } else if (shader_out
->key
.as_ngg
) {
6270 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6273 /* Enable loading the InstanceID VGPR. */
6274 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6276 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6277 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6278 shader_out
->info
.uses_instanceid
= true;
6282 * Compute the PS prolog key, which contains all the information needed to
6283 * build the PS prolog function, and set related bits in shader->config.
6285 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6286 union si_shader_part_key
*key
,
6287 bool separate_prolog
)
6289 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6291 memset(key
, 0, sizeof(*key
));
6292 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6293 key
->ps_prolog
.colors_read
= info
->colors_read
;
6294 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6295 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6296 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6297 (key
->ps_prolog
.colors_read
||
6298 key
->ps_prolog
.states
.force_persp_sample_interp
||
6299 key
->ps_prolog
.states
.force_linear_sample_interp
||
6300 key
->ps_prolog
.states
.force_persp_center_interp
||
6301 key
->ps_prolog
.states
.force_linear_center_interp
||
6302 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6303 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6304 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6306 if (info
->colors_read
) {
6307 unsigned *color
= shader
->selector
->color_attr_index
;
6309 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6310 /* BCOLORs are stored after the last input. */
6311 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6312 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6313 if (separate_prolog
)
6314 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6317 for (unsigned i
= 0; i
< 2; i
++) {
6318 unsigned interp
= info
->input_interpolate
[color
[i
]];
6319 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6321 if (!(info
->colors_read
& (0xf << i
*4)))
6324 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6326 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6327 interp
== TGSI_INTERPOLATE_COLOR
)
6328 interp
= TGSI_INTERPOLATE_CONSTANT
;
6331 case TGSI_INTERPOLATE_CONSTANT
:
6332 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6334 case TGSI_INTERPOLATE_PERSPECTIVE
:
6335 case TGSI_INTERPOLATE_COLOR
:
6336 /* Force the interpolation location for colors here. */
6337 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6338 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6339 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6340 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6343 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6344 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6345 if (separate_prolog
) {
6346 shader
->config
.spi_ps_input_ena
|=
6347 S_0286CC_PERSP_SAMPLE_ENA(1);
6350 case TGSI_INTERPOLATE_LOC_CENTER
:
6351 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6352 if (separate_prolog
) {
6353 shader
->config
.spi_ps_input_ena
|=
6354 S_0286CC_PERSP_CENTER_ENA(1);
6357 case TGSI_INTERPOLATE_LOC_CENTROID
:
6358 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6359 if (separate_prolog
) {
6360 shader
->config
.spi_ps_input_ena
|=
6361 S_0286CC_PERSP_CENTROID_ENA(1);
6368 case TGSI_INTERPOLATE_LINEAR
:
6369 /* Force the interpolation location for colors here. */
6370 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6371 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6372 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6373 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6375 /* The VGPR assignment for non-monolithic shaders
6376 * works because InitialPSInputAddr is set on the
6377 * main shader and PERSP_PULL_MODEL is never used.
6380 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6381 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6382 separate_prolog
? 6 : 9;
6383 if (separate_prolog
) {
6384 shader
->config
.spi_ps_input_ena
|=
6385 S_0286CC_LINEAR_SAMPLE_ENA(1);
6388 case TGSI_INTERPOLATE_LOC_CENTER
:
6389 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6390 separate_prolog
? 8 : 11;
6391 if (separate_prolog
) {
6392 shader
->config
.spi_ps_input_ena
|=
6393 S_0286CC_LINEAR_CENTER_ENA(1);
6396 case TGSI_INTERPOLATE_LOC_CENTROID
:
6397 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6398 separate_prolog
? 10 : 13;
6399 if (separate_prolog
) {
6400 shader
->config
.spi_ps_input_ena
|=
6401 S_0286CC_LINEAR_CENTROID_ENA(1);
6416 * Check whether a PS prolog is required based on the key.
6418 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6420 return key
->ps_prolog
.colors_read
||
6421 key
->ps_prolog
.states
.force_persp_sample_interp
||
6422 key
->ps_prolog
.states
.force_linear_sample_interp
||
6423 key
->ps_prolog
.states
.force_persp_center_interp
||
6424 key
->ps_prolog
.states
.force_linear_center_interp
||
6425 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6426 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6427 key
->ps_prolog
.states
.poly_stipple
||
6428 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6432 * Compute the PS epilog key, which contains all the information needed to
6433 * build the PS epilog function.
6435 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6436 union si_shader_part_key
*key
)
6438 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6439 memset(key
, 0, sizeof(*key
));
6440 key
->ps_epilog
.colors_written
= info
->colors_written
;
6441 key
->ps_epilog
.writes_z
= info
->writes_z
;
6442 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6443 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6444 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6448 * Build the GS prolog function. Rotate the input vertices for triangle strips
6451 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6452 union si_shader_part_key
*key
)
6454 unsigned num_sgprs
, num_vgprs
;
6455 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6456 LLVMTypeRef returns
[48];
6457 LLVMValueRef func
, ret
;
6459 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6461 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6462 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6463 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6465 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6466 num_vgprs
= 5; /* ES inputs are not needed by GS */
6468 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6472 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6473 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
6474 returns
[i
] = ctx
->i32
;
6477 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6478 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
6479 returns
[num_sgprs
+ i
] = ctx
->f32
;
6482 /* Create the function. */
6483 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6485 func
= ctx
->main_fn
;
6487 /* Set the full EXEC mask for the prolog, because we are only fiddling
6488 * with registers here. The main shader part will set the correct EXEC
6491 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6492 ac_init_exec_full_mask(&ctx
->ac
);
6494 /* Copy inputs to outputs. This should be no-op, as the registers match,
6495 * but it will prevent the compiler from overwriting them unintentionally.
6497 ret
= ctx
->return_value
;
6498 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6499 LLVMValueRef p
= LLVMGetParam(func
, i
);
6500 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6502 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6503 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6504 p
= ac_to_float(&ctx
->ac
, p
);
6505 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6508 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6509 /* Remap the input vertices for every other primitive. */
6510 const struct ac_arg gfx6_vtx_params
[6] = {
6511 { .used
= true, .arg_index
= num_sgprs
},
6512 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6513 { .used
= true, .arg_index
= num_sgprs
+ 3 },
6514 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6515 { .used
= true, .arg_index
= num_sgprs
+ 5 },
6516 { .used
= true, .arg_index
= num_sgprs
+ 6 },
6518 const struct ac_arg gfx9_vtx_params
[3] = {
6519 { .used
= true, .arg_index
= num_sgprs
},
6520 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6521 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6523 LLVMValueRef vtx_in
[6], vtx_out
[6];
6524 LLVMValueRef prim_id
, rotate
;
6526 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6527 for (unsigned i
= 0; i
< 3; i
++) {
6528 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6529 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6532 for (unsigned i
= 0; i
< 6; i
++)
6533 vtx_in
[i
] = ac_get_arg(&ctx
->ac
, gfx6_vtx_params
[i
]);
6536 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6537 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6539 for (unsigned i
= 0; i
< 6; ++i
) {
6540 LLVMValueRef base
, rotated
;
6542 rotated
= vtx_in
[(i
+ 4) % 6];
6543 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6546 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6547 for (unsigned i
= 0; i
< 3; i
++) {
6548 LLVMValueRef hi
, out
;
6550 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6551 LLVMConstInt(ctx
->i32
, 16, 0), "");
6552 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6553 out
= ac_to_float(&ctx
->ac
, out
);
6554 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6555 gfx9_vtx_params
[i
].arg_index
, "");
6558 for (unsigned i
= 0; i
< 6; i
++) {
6561 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6562 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6563 gfx6_vtx_params
[i
].arg_index
, "");
6568 LLVMBuildRet(builder
, ret
);
6572 * Given a list of shader part functions, build a wrapper function that
6573 * runs them in sequence to form a monolithic shader.
6575 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6576 LLVMValueRef
*parts
,
6579 unsigned next_shader_first_part
)
6581 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6582 /* PS epilog has one arg per color component; gfx9 merged shader
6583 * prologs need to forward 32 user SGPRs.
6585 LLVMValueRef initial
[64], out
[64];
6586 LLVMTypeRef function_type
;
6587 unsigned num_first_params
;
6588 unsigned num_out
, initial_num_out
;
6589 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6590 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6591 unsigned num_sgprs
, num_vgprs
;
6594 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6596 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6597 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6598 AC_FUNC_ATTR_ALWAYSINLINE
);
6599 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6602 /* The parameters of the wrapper function correspond to those of the
6603 * first part in terms of SGPRs and VGPRs, but we use the types of the
6604 * main part to get the right types. This is relevant for the
6605 * dereferenceable attribute on descriptor table pointers.
6610 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6611 num_first_params
= LLVMCountParamTypes(function_type
);
6613 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6614 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6616 if (ac_is_sgpr_param(param
)) {
6617 assert(num_vgprs
== 0);
6618 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6620 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6625 while (gprs
< num_sgprs
+ num_vgprs
) {
6626 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], ctx
->args
.arg_count
);
6627 LLVMTypeRef type
= LLVMTypeOf(param
);
6628 unsigned size
= ac_get_type_size(type
) / 4;
6630 /* This is going to get casted anyways, so we don't have to
6631 * have the exact same type. But we do have to preserve the
6632 * pointer-ness so that LLVM knows about it.
6634 enum ac_arg_type arg_type
= AC_ARG_INT
;
6635 if (LLVMGetTypeKind(type
) == LLVMPointerTypeKind
) {
6636 arg_type
= AC_ARG_CONST_PTR
;
6639 ac_add_arg(&ctx
->args
, gprs
< num_sgprs
? AC_ARG_SGPR
: AC_ARG_VGPR
,
6640 size
, arg_type
, NULL
);
6642 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6643 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6644 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6649 /* Prepare the return type. */
6650 unsigned num_returns
= 0;
6651 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6653 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6654 return_type
= LLVMGetReturnType(last_func_type
);
6656 switch (LLVMGetTypeKind(return_type
)) {
6657 case LLVMStructTypeKind
:
6658 num_returns
= LLVMCountStructElementTypes(return_type
);
6659 assert(num_returns
<= ARRAY_SIZE(returns
));
6660 LLVMGetStructElementTypes(return_type
, returns
);
6662 case LLVMVoidTypeKind
:
6665 unreachable("unexpected type");
6668 si_create_function(ctx
, "wrapper", returns
, num_returns
,
6669 si_get_max_workgroup_size(ctx
->shader
));
6671 if (is_merged_shader(ctx
))
6672 ac_init_exec_full_mask(&ctx
->ac
);
6674 /* Record the arguments of the function as if they were an output of
6680 for (unsigned i
= 0; i
< ctx
->args
.arg_count
; ++i
) {
6681 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6682 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6683 LLVMTypeRef out_type
= ctx
->args
.args
[i
].file
== AC_ARG_SGPR
? ctx
->i32
: ctx
->f32
;
6684 unsigned size
= ac_get_type_size(param_type
) / 4;
6687 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6688 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6689 param_type
= ctx
->i32
;
6692 if (param_type
!= out_type
)
6693 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6694 out
[num_out
++] = param
;
6696 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6698 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6699 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6700 param_type
= ctx
->i64
;
6703 if (param_type
!= vector_type
)
6704 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6706 for (unsigned j
= 0; j
< size
; ++j
)
6707 out
[num_out
++] = LLVMBuildExtractElement(
6708 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6711 if (ctx
->args
.args
[i
].file
== AC_ARG_SGPR
)
6712 num_out_sgpr
= num_out
;
6715 memcpy(initial
, out
, sizeof(out
));
6716 initial_num_out
= num_out
;
6717 initial_num_out_sgpr
= num_out_sgpr
;
6719 /* Now chain the parts. */
6720 LLVMValueRef ret
= NULL
;
6721 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6722 LLVMValueRef in
[48];
6723 LLVMTypeRef ret_type
;
6724 unsigned out_idx
= 0;
6725 unsigned num_params
= LLVMCountParams(parts
[part
]);
6727 /* Merged shaders are executed conditionally depending
6728 * on the number of enabled threads passed in the input SGPRs. */
6729 if (is_multi_part_shader(ctx
) && part
== 0) {
6730 LLVMValueRef ena
, count
= initial
[3];
6732 count
= LLVMBuildAnd(builder
, count
,
6733 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6734 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6735 ac_get_thread_id(&ctx
->ac
), count
, "");
6736 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6739 /* Derive arguments for the next part from outputs of the
6742 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6744 LLVMTypeRef param_type
;
6746 unsigned param_size
;
6747 LLVMValueRef arg
= NULL
;
6749 param
= LLVMGetParam(parts
[part
], param_idx
);
6750 param_type
= LLVMTypeOf(param
);
6751 param_size
= ac_get_type_size(param_type
) / 4;
6752 is_sgpr
= ac_is_sgpr_param(param
);
6755 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6756 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6757 } else if (out_idx
< num_out_sgpr
) {
6758 /* Skip returned SGPRs the current part doesn't
6759 * declare on the input. */
6760 out_idx
= num_out_sgpr
;
6763 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6765 if (param_size
== 1)
6768 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6770 if (LLVMTypeOf(arg
) != param_type
) {
6771 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6772 if (LLVMGetPointerAddressSpace(param_type
) ==
6773 AC_ADDR_SPACE_CONST_32BIT
) {
6774 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6775 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6777 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6778 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6781 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6785 in
[param_idx
] = arg
;
6786 out_idx
+= param_size
;
6789 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6791 if (is_multi_part_shader(ctx
) &&
6792 part
+ 1 == next_shader_first_part
) {
6793 ac_build_endif(&ctx
->ac
, 6506);
6795 /* The second half of the merged shader should use
6796 * the inputs from the toplevel (wrapper) function,
6797 * not the return value from the last call.
6799 * That's because the last call was executed condi-
6800 * tionally, so we can't consume it in the main
6803 memcpy(out
, initial
, sizeof(initial
));
6804 num_out
= initial_num_out
;
6805 num_out_sgpr
= initial_num_out_sgpr
;
6809 /* Extract the returned GPRs. */
6810 ret_type
= LLVMTypeOf(ret
);
6814 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6815 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6817 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6819 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6821 LLVMBuildExtractValue(builder
, ret
, i
, "");
6823 assert(num_out
< ARRAY_SIZE(out
));
6824 out
[num_out
++] = val
;
6826 if (LLVMTypeOf(val
) == ctx
->i32
) {
6827 assert(num_out_sgpr
+ 1 == num_out
);
6828 num_out_sgpr
= num_out
;
6834 /* Return the value from the last part. */
6835 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6836 LLVMBuildRetVoid(builder
);
6838 LLVMBuildRet(builder
, ret
);
6841 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6842 struct si_shader_selector
*sel
)
6844 if (!compiler
->low_opt_passes
)
6847 /* Assume a slow CPU. */
6848 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6849 sel
->screen
->info
.chip_class
<= GFX8
);
6851 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6853 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6854 sel
->info
.num_memory_instructions
> 1000;
6857 static struct nir_shader
*get_nir_shader(struct si_shader_selector
*sel
,
6864 } else if (sel
->nir_binary
) {
6865 struct pipe_screen
*screen
= &sel
->screen
->b
;
6866 const void *options
=
6867 screen
->get_compiler_options(screen
, PIPE_SHADER_IR_NIR
,
6870 struct blob_reader blob_reader
;
6871 blob_reader_init(&blob_reader
, sel
->nir_binary
, sel
->nir_size
);
6873 return nir_deserialize(NULL
, options
, &blob_reader
);
6878 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6879 struct ac_llvm_compiler
*compiler
,
6880 struct si_shader
*shader
,
6881 struct pipe_debug_callback
*debug
)
6883 struct si_shader_selector
*sel
= shader
->selector
;
6884 struct si_shader_context ctx
;
6886 struct nir_shader
*nir
= get_nir_shader(sel
, &free_nir
);
6889 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6890 * conversion fails. */
6891 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6892 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6894 tgsi_dump(sel
->tokens
, 0);
6896 nir_print_shader(nir
, stderr
);
6897 si_dump_streamout(&sel
->so
);
6900 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
),
6902 si_llvm_context_set_ir(&ctx
, shader
, nir
);
6904 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6905 sizeof(shader
->info
.vs_output_param_offset
));
6907 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6909 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6910 si_llvm_dispose(&ctx
);
6914 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6915 LLVMValueRef parts
[2];
6916 bool need_prolog
= sel
->vs_needs_prolog
;
6918 parts
[1] = ctx
.main_fn
;
6921 union si_shader_part_key prolog_key
;
6922 si_get_vs_prolog_key(&sel
->info
,
6923 shader
->info
.num_input_sgprs
,
6924 &shader
->key
.part
.vs
.prolog
,
6925 shader
, &prolog_key
);
6926 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6927 parts
[0] = ctx
.main_fn
;
6930 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6931 1 + need_prolog
, need_prolog
, 0);
6933 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6934 si_build_prim_discard_compute_shader(&ctx
);
6935 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6936 if (sscreen
->info
.chip_class
>= GFX9
) {
6937 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6938 LLVMValueRef parts
[4];
6939 bool vs_needs_prolog
=
6940 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6943 parts
[2] = ctx
.main_fn
;
6946 union si_shader_part_key tcs_epilog_key
;
6947 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6948 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6949 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6950 parts
[3] = ctx
.main_fn
;
6952 /* VS as LS main part */
6953 nir
= get_nir_shader(ls
, &free_nir
);
6954 struct si_shader shader_ls
= {};
6955 shader_ls
.selector
= ls
;
6956 shader_ls
.key
.as_ls
= 1;
6957 shader_ls
.key
.mono
= shader
->key
.mono
;
6958 shader_ls
.key
.opt
= shader
->key
.opt
;
6959 shader_ls
.is_monolithic
= true;
6960 si_llvm_context_set_ir(&ctx
, &shader_ls
, nir
);
6962 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6963 si_llvm_dispose(&ctx
);
6966 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6967 parts
[1] = ctx
.main_fn
;
6970 if (vs_needs_prolog
) {
6971 union si_shader_part_key vs_prolog_key
;
6972 si_get_vs_prolog_key(&ls
->info
,
6973 shader_ls
.info
.num_input_sgprs
,
6974 &shader
->key
.part
.tcs
.ls_prolog
,
6975 shader
, &vs_prolog_key
);
6976 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6977 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6978 parts
[0] = ctx
.main_fn
;
6981 /* Reset the shader context. */
6982 ctx
.shader
= shader
;
6983 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6985 si_build_wrapper_function(&ctx
,
6986 parts
+ !vs_needs_prolog
,
6987 4 - !vs_needs_prolog
, vs_needs_prolog
,
6988 vs_needs_prolog
? 2 : 1);
6990 LLVMValueRef parts
[2];
6991 union si_shader_part_key epilog_key
;
6993 parts
[0] = ctx
.main_fn
;
6995 memset(&epilog_key
, 0, sizeof(epilog_key
));
6996 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6997 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
6998 parts
[1] = ctx
.main_fn
;
7000 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7002 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7003 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7004 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7005 LLVMValueRef es_prolog
= NULL
;
7006 LLVMValueRef es_main
= NULL
;
7007 LLVMValueRef gs_prolog
= NULL
;
7008 LLVMValueRef gs_main
= ctx
.main_fn
;
7011 union si_shader_part_key gs_prolog_key
;
7012 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7013 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7014 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7015 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7016 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7017 gs_prolog
= ctx
.main_fn
;
7020 nir
= get_nir_shader(es
, &free_nir
);
7021 struct si_shader shader_es
= {};
7022 shader_es
.selector
= es
;
7023 shader_es
.key
.as_es
= 1;
7024 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7025 shader_es
.key
.mono
= shader
->key
.mono
;
7026 shader_es
.key
.opt
= shader
->key
.opt
;
7027 shader_es
.is_monolithic
= true;
7028 si_llvm_context_set_ir(&ctx
, &shader_es
, nir
);
7030 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
7031 si_llvm_dispose(&ctx
);
7034 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7035 es_main
= ctx
.main_fn
;
7038 if (es
->vs_needs_prolog
) {
7039 union si_shader_part_key vs_prolog_key
;
7040 si_get_vs_prolog_key(&es
->info
,
7041 shader_es
.info
.num_input_sgprs
,
7042 &shader
->key
.part
.gs
.vs_prolog
,
7043 shader
, &vs_prolog_key
);
7044 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7045 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7046 es_prolog
= ctx
.main_fn
;
7049 /* Reset the shader context. */
7050 ctx
.shader
= shader
;
7051 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7053 /* Prepare the array of shader parts. */
7054 LLVMValueRef parts
[4];
7055 unsigned num_parts
= 0, main_part
, next_first_part
;
7058 parts
[num_parts
++] = es_prolog
;
7060 parts
[main_part
= num_parts
++] = es_main
;
7061 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7062 parts
[num_parts
++] = gs_main
;
7064 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7065 main_part
, next_first_part
);
7067 LLVMValueRef parts
[2];
7068 union si_shader_part_key prolog_key
;
7070 parts
[1] = ctx
.main_fn
;
7072 memset(&prolog_key
, 0, sizeof(prolog_key
));
7073 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7074 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7075 parts
[0] = ctx
.main_fn
;
7077 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7079 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7080 LLVMValueRef parts
[3];
7081 union si_shader_part_key prolog_key
;
7082 union si_shader_part_key epilog_key
;
7085 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7086 need_prolog
= si_need_ps_prolog(&prolog_key
);
7088 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7091 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7092 parts
[0] = ctx
.main_fn
;
7095 si_get_ps_epilog_key(shader
, &epilog_key
);
7096 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7097 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7099 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7100 need_prolog
? 1 : 0, 0);
7103 si_llvm_optimize_module(&ctx
);
7105 /* Post-optimization transformations and analysis. */
7106 si_optimize_vs_outputs(&ctx
);
7108 if ((debug
&& debug
->debug_message
) ||
7109 si_can_dump_shader(sscreen
, ctx
.type
)) {
7110 ctx
.shader
->info
.private_mem_vgprs
=
7111 ac_count_scratch_private_memory(ctx
.main_fn
);
7114 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7115 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7116 LLVMPointerTypeKind
);
7118 /* Compile to bytecode. */
7119 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7120 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7121 si_get_shader_name(shader
),
7122 si_should_optimize_less(compiler
, shader
->selector
));
7123 si_llvm_dispose(&ctx
);
7125 fprintf(stderr
, "LLVM failed to compile shader\n");
7129 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7130 * LLVM 3.9svn has this bug.
7132 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7133 unsigned wave_size
= sscreen
->compute_wave_size
;
7134 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
*
7135 (wave_size
== 32 ? 2 : 1);
7136 unsigned max_sgprs
= sscreen
->info
.num_physical_sgprs_per_simd
;
7137 unsigned max_sgprs_per_wave
= 128;
7138 unsigned simds_per_tg
= 4; /* assuming WGP mode on gfx10 */
7139 unsigned threads_per_tg
= si_get_max_workgroup_size(shader
);
7140 unsigned waves_per_tg
= DIV_ROUND_UP(threads_per_tg
, wave_size
);
7141 unsigned waves_per_simd
= DIV_ROUND_UP(waves_per_tg
, simds_per_tg
);
7143 max_vgprs
= max_vgprs
/ waves_per_simd
;
7144 max_sgprs
= MIN2(max_sgprs
/ waves_per_simd
, max_sgprs_per_wave
);
7146 if (shader
->config
.num_sgprs
> max_sgprs
||
7147 shader
->config
.num_vgprs
> max_vgprs
) {
7148 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7149 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7150 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7151 max_sgprs
, max_vgprs
);
7153 /* Just terminate the process, because dependent
7154 * shaders can hang due to bad input data, but use
7155 * the env var to allow shader-db to work.
7157 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7162 /* Add the scratch offset to input SGPRs. */
7163 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7164 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7166 /* Calculate the number of fragment input VGPRs. */
7167 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7168 shader
->info
.num_input_vgprs
= ac_get_fs_input_vgpr_cnt(&shader
->config
,
7169 &shader
->info
.face_vgpr_index
,
7170 &shader
->info
.ancillary_vgpr_index
);
7173 si_calculate_max_simd_waves(shader
);
7174 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7179 * Create, compile and return a shader part (prolog or epilog).
7181 * \param sscreen screen
7182 * \param list list of shader parts of the same category
7183 * \param type shader type
7184 * \param key shader part key
7185 * \param prolog whether the part being requested is a prolog
7186 * \param tm LLVM target machine
7187 * \param debug debug callback
7188 * \param build the callback responsible for building the main function
7189 * \return non-NULL on success
7191 static struct si_shader_part
*
7192 si_get_shader_part(struct si_screen
*sscreen
,
7193 struct si_shader_part
**list
,
7194 enum pipe_shader_type type
,
7196 union si_shader_part_key
*key
,
7197 struct ac_llvm_compiler
*compiler
,
7198 struct pipe_debug_callback
*debug
,
7199 void (*build
)(struct si_shader_context
*,
7200 union si_shader_part_key
*),
7203 struct si_shader_part
*result
;
7205 simple_mtx_lock(&sscreen
->shader_parts_mutex
);
7207 /* Find existing. */
7208 for (result
= *list
; result
; result
= result
->next
) {
7209 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7210 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7215 /* Compile a new one. */
7216 result
= CALLOC_STRUCT(si_shader_part
);
7219 struct si_shader shader
= {};
7222 case PIPE_SHADER_VERTEX
:
7223 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7224 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7225 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7227 case PIPE_SHADER_TESS_CTRL
:
7229 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7231 case PIPE_SHADER_GEOMETRY
:
7233 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7235 case PIPE_SHADER_FRAGMENT
:
7237 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7239 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7242 unreachable("bad shader part");
7245 struct si_shader_context ctx
;
7246 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7247 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7250 ctx
.shader
= &shader
;
7256 si_llvm_optimize_module(&ctx
);
7258 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7259 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7266 result
->next
= *list
;
7270 si_llvm_dispose(&ctx
);
7271 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7275 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7277 LLVMValueRef ptr
[2], list
;
7278 bool merged_shader
= is_merged_shader(ctx
);
7280 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7281 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7282 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7287 * Build the vertex shader prolog function.
7289 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7290 * All inputs are returned unmodified. The vertex load indices are
7291 * stored after them, which will be used by the API VS for fetching inputs.
7293 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7298 * (VertexID + BaseVertex),
7299 * (InstanceID + StartInstance),
7300 * (InstanceID / 2 + StartInstance)
7302 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7303 union si_shader_part_key
*key
)
7305 LLVMTypeRef
*returns
;
7306 LLVMValueRef ret
, func
;
7308 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7309 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7310 struct ac_arg input_sgpr_param
[key
->vs_prolog
.num_input_sgprs
];
7311 struct ac_arg input_vgpr_param
[9];
7312 LLVMValueRef input_vgprs
[9];
7313 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7315 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7317 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7319 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7320 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7321 sizeof(LLVMTypeRef
));
7324 /* Declare input and output SGPRs. */
7325 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7326 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7327 &input_sgpr_param
[i
]);
7328 returns
[num_returns
++] = ctx
->i32
;
7331 struct ac_arg merged_wave_info
= input_sgpr_param
[3];
7333 /* Preloaded VGPRs (outputs must be floats) */
7334 for (i
= 0; i
< num_input_vgprs
; i
++) {
7335 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &input_vgpr_param
[i
]);
7336 returns
[num_returns
++] = ctx
->f32
;
7339 /* Vertex load indices. */
7340 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7341 returns
[num_returns
++] = ctx
->f32
;
7343 /* Create the function. */
7344 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, 0);
7345 func
= ctx
->main_fn
;
7347 for (i
= 0; i
< num_input_vgprs
; i
++) {
7348 input_vgprs
[i
] = ac_get_arg(&ctx
->ac
, input_vgpr_param
[i
]);
7351 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7352 if (!key
->vs_prolog
.is_monolithic
)
7353 si_init_exec_from_input(ctx
, merged_wave_info
, 0);
7355 if (key
->vs_prolog
.as_ls
&&
7356 ctx
->screen
->info
.has_ls_vgpr_init_bug
) {
7357 /* If there are no HS threads, SPI loads the LS VGPRs
7358 * starting at VGPR 0. Shift them back to where they
7361 LLVMValueRef has_hs_threads
=
7362 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7363 si_unpack_param(ctx
, input_sgpr_param
[3], 8, 8),
7366 for (i
= 4; i
> 0; --i
) {
7367 input_vgprs
[i
+ 1] =
7368 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7370 input_vgprs
[i
- 1], "");
7375 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7376 unsigned instance_id_vgpr
=
7377 ctx
->screen
->info
.chip_class
>= GFX10
?
7379 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7381 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7382 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7384 /* InstanceID = VertexID >> 16;
7385 * VertexID = VertexID & 0xffff;
7387 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7388 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7389 LLVMConstInt(ctx
->i32
, 16, 0), "");
7390 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7391 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7394 /* Copy inputs to outputs. This should be no-op, as the registers match,
7395 * but it will prevent the compiler from overwriting them unintentionally.
7397 ret
= ctx
->return_value
;
7398 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7399 LLVMValueRef p
= LLVMGetParam(func
, i
);
7400 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7402 for (i
= 0; i
< num_input_vgprs
; i
++) {
7403 LLVMValueRef p
= input_vgprs
[i
];
7405 if (i
== vertex_id_vgpr
)
7406 p
= ctx
->abi
.vertex_id
;
7407 else if (i
== instance_id_vgpr
)
7408 p
= ctx
->abi
.instance_id
;
7410 p
= ac_to_float(&ctx
->ac
, p
);
7411 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7412 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7415 LLVMValueRef original_ret
= ret
;
7416 bool wrapped
= false;
7417 LLVMBasicBlockRef if_entry_block
= NULL
;
7419 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7420 LLVMValueRef num_threads
;
7423 num_threads
= si_unpack_param(ctx
, merged_wave_info
, 0, 8);
7424 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7425 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7426 if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
7427 ac_build_ifcc(&ctx
->ac
, ena
, 11501);
7431 /* Compute vertex load indices from instance divisors. */
7432 LLVMValueRef instance_divisor_constbuf
= NULL
;
7434 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7435 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7436 LLVMValueRef buf_index
=
7437 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7438 instance_divisor_constbuf
=
7439 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7442 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7443 bool divisor_is_one
=
7444 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7445 bool divisor_is_fetched
=
7446 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7447 LLVMValueRef index
= NULL
;
7449 if (divisor_is_one
) {
7450 index
= ctx
->abi
.instance_id
;
7451 } else if (divisor_is_fetched
) {
7452 LLVMValueRef udiv_factors
[4];
7454 for (unsigned j
= 0; j
< 4; j
++) {
7456 buffer_load_const(ctx
, instance_divisor_constbuf
,
7457 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7458 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7460 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7461 * Such InstanceID might not be achievable in a reasonable time though.
7463 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7464 udiv_factors
[0], udiv_factors
[1],
7465 udiv_factors
[2], udiv_factors
[3]);
7468 if (divisor_is_one
|| divisor_is_fetched
) {
7469 /* Add StartInstance. */
7470 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7471 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7472 SI_SGPR_START_INSTANCE
), "");
7474 /* VertexID + BaseVertex */
7475 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7477 LLVMGetParam(func
, user_sgpr_base
+
7478 SI_SGPR_BASE_VERTEX
), "");
7481 index
= ac_to_float(&ctx
->ac
, index
);
7482 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7483 ctx
->args
.arg_count
+ i
, "");
7487 LLVMBasicBlockRef bbs
[2] = {
7488 LLVMGetInsertBlock(ctx
->ac
.builder
),
7491 ac_build_endif(&ctx
->ac
, 11501);
7493 LLVMValueRef values
[2] = {
7497 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7500 si_llvm_build_ret(ctx
, ret
);
7503 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7504 struct ac_llvm_compiler
*compiler
,
7505 struct si_shader
*shader
,
7506 struct pipe_debug_callback
*debug
,
7507 struct si_shader
*main_part
,
7508 const struct si_vs_prolog_bits
*key
)
7510 struct si_shader_selector
*vs
= main_part
->selector
;
7512 if (!si_vs_needs_prolog(vs
, key
))
7515 /* Get the prolog. */
7516 union si_shader_part_key prolog_key
;
7517 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7518 key
, shader
, &prolog_key
);
7521 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7522 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7523 debug
, si_build_vs_prolog_function
,
7524 "Vertex Shader Prolog");
7525 return shader
->prolog
!= NULL
;
7529 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7531 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7532 struct ac_llvm_compiler
*compiler
,
7533 struct si_shader
*shader
,
7534 struct pipe_debug_callback
*debug
)
7536 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7537 &shader
->key
.part
.vs
.prolog
);
7541 * Compile the TCS epilog function. This writes tesselation factors to memory
7542 * based on the output primitive type of the tesselator (determined by TES).
7544 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7545 union si_shader_part_key
*key
)
7547 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7549 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7551 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7552 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7553 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7554 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7555 &ctx
->tcs_offchip_offset
);
7556 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* wave info */
7557 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7558 &ctx
->tcs_factor_offset
);
7559 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7560 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7561 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7562 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7563 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7564 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7565 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7566 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7567 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7568 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7569 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7570 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7571 &ctx
->tcs_offchip_layout
);
7572 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7573 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7574 &ctx
->tcs_out_lds_layout
);
7576 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7577 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7578 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7579 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7580 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7581 &ctx
->tcs_offchip_layout
);
7582 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7583 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7584 &ctx
->tcs_out_lds_layout
);
7585 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7586 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7587 &ctx
->tcs_offchip_offset
);
7588 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7589 &ctx
->tcs_factor_offset
);
7592 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7593 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7594 struct ac_arg rel_patch_id
; /* patch index within the wave (REL_PATCH_ID) */
7595 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &rel_patch_id
);
7596 struct ac_arg invocation_id
; /* invocation ID within the patch */
7597 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &invocation_id
);
7598 struct ac_arg tcs_out_current_patch_data_offset
; /* LDS offset where tess factors should be loaded from */
7599 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
7600 &tcs_out_current_patch_data_offset
);
7602 struct ac_arg tess_factors
[6];
7603 for (unsigned i
= 0; i
< 6; i
++)
7604 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &tess_factors
[i
]);
7606 /* Create the function. */
7607 si_create_function(ctx
, "tcs_epilog", NULL
, 0,
7608 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7609 ac_declare_lds_as_pointer(&ctx
->ac
);
7611 LLVMValueRef invoc0_tess_factors
[6];
7612 for (unsigned i
= 0; i
< 6; i
++)
7613 invoc0_tess_factors
[i
] = ac_get_arg(&ctx
->ac
, tess_factors
[i
]);
7615 si_write_tess_factors(bld_base
,
7616 ac_get_arg(&ctx
->ac
, rel_patch_id
),
7617 ac_get_arg(&ctx
->ac
, invocation_id
),
7618 ac_get_arg(&ctx
->ac
, tcs_out_current_patch_data_offset
),
7619 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7621 LLVMBuildRetVoid(ctx
->ac
.builder
);
7625 * Select and compile (or reuse) TCS parts (epilog).
7627 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7628 struct ac_llvm_compiler
*compiler
,
7629 struct si_shader
*shader
,
7630 struct pipe_debug_callback
*debug
)
7632 if (sscreen
->info
.chip_class
>= GFX9
) {
7633 struct si_shader
*ls_main_part
=
7634 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7636 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7637 &shader
->key
.part
.tcs
.ls_prolog
))
7640 shader
->previous_stage
= ls_main_part
;
7643 /* Get the epilog. */
7644 union si_shader_part_key epilog_key
;
7645 memset(&epilog_key
, 0, sizeof(epilog_key
));
7646 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7648 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7649 PIPE_SHADER_TESS_CTRL
, false,
7650 &epilog_key
, compiler
, debug
,
7651 si_build_tcs_epilog_function
,
7652 "Tessellation Control Shader Epilog");
7653 return shader
->epilog
!= NULL
;
7657 * Select and compile (or reuse) GS parts (prolog).
7659 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7660 struct ac_llvm_compiler
*compiler
,
7661 struct si_shader
*shader
,
7662 struct pipe_debug_callback
*debug
)
7664 if (sscreen
->info
.chip_class
>= GFX9
) {
7665 struct si_shader
*es_main_part
;
7666 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7668 if (shader
->key
.as_ngg
)
7669 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7671 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7673 if (es_type
== PIPE_SHADER_VERTEX
&&
7674 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7675 &shader
->key
.part
.gs
.vs_prolog
))
7678 shader
->previous_stage
= es_main_part
;
7681 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7684 union si_shader_part_key prolog_key
;
7685 memset(&prolog_key
, 0, sizeof(prolog_key
));
7686 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7687 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7689 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7690 PIPE_SHADER_GEOMETRY
, true,
7691 &prolog_key
, compiler
, debug
,
7692 si_build_gs_prolog_function
,
7693 "Geometry Shader Prolog");
7694 return shader
->prolog2
!= NULL
;
7698 * Build the pixel shader prolog function. This handles:
7699 * - two-side color selection and interpolation
7700 * - overriding interpolation parameters for the API PS
7701 * - polygon stippling
7703 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7704 * overriden by other states. (e.g. per-sample interpolation)
7705 * Interpolated colors are stored after the preloaded VGPRs.
7707 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7708 union si_shader_part_key
*key
)
7710 LLVMValueRef ret
, func
;
7711 int num_returns
, i
, num_color_channels
;
7713 assert(si_need_ps_prolog(key
));
7715 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7717 /* Declare inputs. */
7718 LLVMTypeRef return_types
[AC_MAX_ARGS
];
7720 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7721 assert(key
->ps_prolog
.num_input_sgprs
+
7722 key
->ps_prolog
.num_input_vgprs
+
7723 num_color_channels
<= AC_MAX_ARGS
);
7724 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++) {
7725 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7726 return_types
[num_returns
++] = ctx
->i32
;
7730 struct ac_arg pos_fixed_pt
;
7731 struct ac_arg ancillary
;
7732 struct ac_arg param_sample_mask
;
7733 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++) {
7734 struct ac_arg
*arg
= NULL
;
7735 if (i
== key
->ps_prolog
.ancillary_vgpr_index
) {
7737 } else if (i
== key
->ps_prolog
.ancillary_vgpr_index
+ 1) {
7738 arg
= ¶m_sample_mask
;
7739 } else if (i
== key
->ps_prolog
.num_input_vgprs
- 1) {
7740 /* POS_FIXED_PT is always last. */
7741 arg
= &pos_fixed_pt
;
7743 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, arg
);
7744 return_types
[num_returns
++] = ctx
->f32
;
7747 /* Declare outputs (same as inputs + add colors if needed) */
7748 for (i
= 0; i
< num_color_channels
; i
++)
7749 return_types
[num_returns
++] = ctx
->f32
;
7751 /* Create the function. */
7752 si_create_function(ctx
, "ps_prolog", return_types
, num_returns
, 0);
7753 func
= ctx
->main_fn
;
7755 /* Copy inputs to outputs. This should be no-op, as the registers match,
7756 * but it will prevent the compiler from overwriting them unintentionally.
7758 ret
= ctx
->return_value
;
7759 for (i
= 0; i
< ctx
->args
.arg_count
; i
++) {
7760 LLVMValueRef p
= LLVMGetParam(func
, i
);
7761 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7764 /* Polygon stippling. */
7765 if (key
->ps_prolog
.states
.poly_stipple
) {
7766 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7768 si_llvm_emit_polygon_stipple(ctx
, list
, pos_fixed_pt
);
7771 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7772 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7773 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7774 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7776 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7777 * The hw doesn't compute CENTROID if the whole wave only
7778 * contains fully-covered quads.
7780 * PRIM_MASK is after user SGPRs.
7782 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7783 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7784 LLVMConstInt(ctx
->i32
, 31, 0), "");
7785 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7788 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7789 /* Read PERSP_CENTER. */
7790 for (i
= 0; i
< 2; i
++)
7791 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7792 /* Read PERSP_CENTROID. */
7793 for (i
= 0; i
< 2; i
++)
7794 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7795 /* Select PERSP_CENTROID. */
7796 for (i
= 0; i
< 2; i
++) {
7797 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7798 center
[i
], centroid
[i
], "");
7799 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7800 tmp
, base
+ 4 + i
, "");
7803 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7804 /* Read LINEAR_CENTER. */
7805 for (i
= 0; i
< 2; i
++)
7806 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7807 /* Read LINEAR_CENTROID. */
7808 for (i
= 0; i
< 2; i
++)
7809 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7810 /* Select LINEAR_CENTROID. */
7811 for (i
= 0; i
< 2; i
++) {
7812 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7813 center
[i
], centroid
[i
], "");
7814 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7815 tmp
, base
+ 10 + i
, "");
7820 /* Force per-sample interpolation. */
7821 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7822 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7823 LLVMValueRef persp_sample
[2];
7825 /* Read PERSP_SAMPLE. */
7826 for (i
= 0; i
< 2; i
++)
7827 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7828 /* Overwrite PERSP_CENTER. */
7829 for (i
= 0; i
< 2; i
++)
7830 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7831 persp_sample
[i
], base
+ 2 + i
, "");
7832 /* Overwrite PERSP_CENTROID. */
7833 for (i
= 0; i
< 2; i
++)
7834 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7835 persp_sample
[i
], base
+ 4 + i
, "");
7837 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7838 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7839 LLVMValueRef linear_sample
[2];
7841 /* Read LINEAR_SAMPLE. */
7842 for (i
= 0; i
< 2; i
++)
7843 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7844 /* Overwrite LINEAR_CENTER. */
7845 for (i
= 0; i
< 2; i
++)
7846 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7847 linear_sample
[i
], base
+ 8 + i
, "");
7848 /* Overwrite LINEAR_CENTROID. */
7849 for (i
= 0; i
< 2; i
++)
7850 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7851 linear_sample
[i
], base
+ 10 + i
, "");
7854 /* Force center interpolation. */
7855 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7856 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7857 LLVMValueRef persp_center
[2];
7859 /* Read PERSP_CENTER. */
7860 for (i
= 0; i
< 2; i
++)
7861 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7862 /* Overwrite PERSP_SAMPLE. */
7863 for (i
= 0; i
< 2; i
++)
7864 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7865 persp_center
[i
], base
+ i
, "");
7866 /* Overwrite PERSP_CENTROID. */
7867 for (i
= 0; i
< 2; i
++)
7868 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7869 persp_center
[i
], base
+ 4 + i
, "");
7871 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7872 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7873 LLVMValueRef linear_center
[2];
7875 /* Read LINEAR_CENTER. */
7876 for (i
= 0; i
< 2; i
++)
7877 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7878 /* Overwrite LINEAR_SAMPLE. */
7879 for (i
= 0; i
< 2; i
++)
7880 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7881 linear_center
[i
], base
+ 6 + i
, "");
7882 /* Overwrite LINEAR_CENTROID. */
7883 for (i
= 0; i
< 2; i
++)
7884 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7885 linear_center
[i
], base
+ 10 + i
, "");
7888 /* Interpolate colors. */
7889 unsigned color_out_idx
= 0;
7890 for (i
= 0; i
< 2; i
++) {
7891 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7892 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7893 key
->ps_prolog
.face_vgpr_index
;
7894 LLVMValueRef interp
[2], color
[4];
7895 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7900 /* If the interpolation qualifier is not CONSTANT (-1). */
7901 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7902 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7903 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7905 /* Get the (i,j) updated by bc_optimize handling. */
7906 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7908 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7909 interp_vgpr
+ 1, "");
7910 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7913 /* Use the absolute location of the input. */
7914 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7916 if (key
->ps_prolog
.states
.color_two_side
) {
7917 face
= LLVMGetParam(func
, face_vgpr
);
7918 face
= ac_to_integer(&ctx
->ac
, face
);
7921 interp_fs_input(ctx
,
7922 key
->ps_prolog
.color_attr_index
[i
],
7923 TGSI_SEMANTIC_COLOR
, i
,
7924 key
->ps_prolog
.num_interp_inputs
,
7925 key
->ps_prolog
.colors_read
, interp_ij
,
7926 prim_mask
, face
, color
);
7929 unsigned chan
= u_bit_scan(&writemask
);
7930 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7931 ctx
->args
.arg_count
+ color_out_idx
++, "");
7935 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7938 * "When per-sample shading is active due to the use of a fragment
7939 * input qualified by sample or due to the use of the gl_SampleID
7940 * or gl_SamplePosition variables, only the bit for the current
7941 * sample is set in gl_SampleMaskIn. When state specifies multiple
7942 * fragment shader invocations for a given fragment, the sample
7943 * mask for any single fragment shader invocation may specify a
7944 * subset of the covered samples for the fragment. In this case,
7945 * the bit corresponding to each covered sample will be set in
7946 * exactly one fragment shader invocation."
7948 * The samplemask loaded by hardware is always the coverage of the
7949 * entire pixel/fragment, so mask bits out based on the sample ID.
7951 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7952 /* The bit pattern matches that used by fixed function fragment
7954 static const uint16_t ps_iter_masks
[] = {
7955 0xffff, /* not used */
7961 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7963 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7964 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary
, 8, 4);
7965 LLVMValueRef samplemask
= ac_get_arg(&ctx
->ac
, param_sample_mask
);
7967 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7968 samplemask
= LLVMBuildAnd(
7971 LLVMBuildShl(ctx
->ac
.builder
,
7972 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7975 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7977 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7978 param_sample_mask
.arg_index
, "");
7981 /* Tell LLVM to insert WQM instruction sequence when needed. */
7982 if (key
->ps_prolog
.wqm
) {
7983 LLVMAddTargetDependentFunctionAttr(func
,
7984 "amdgpu-ps-wqm-outputs", "");
7987 si_llvm_build_ret(ctx
, ret
);
7991 * Build the pixel shader epilog function. This handles everything that must be
7992 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7994 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7995 union si_shader_part_key
*key
)
7997 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7998 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8000 struct si_ps_exports exp
= {};
8002 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
8004 /* Declare input SGPRs. */
8005 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->rw_buffers
);
8006 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8007 &ctx
->bindless_samplers_and_images
);
8008 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8009 &ctx
->const_and_shader_buffers
);
8010 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8011 &ctx
->samplers_and_images
);
8012 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
,
8013 NULL
, SI_PARAM_ALPHA_REF
);
8015 /* Declare input VGPRs. */
8016 unsigned required_num_params
=
8017 ctx
->args
.num_sgprs_used
+
8018 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8019 key
->ps_epilog
.writes_z
+
8020 key
->ps_epilog
.writes_stencil
+
8021 key
->ps_epilog
.writes_samplemask
;
8023 required_num_params
= MAX2(required_num_params
,
8024 ctx
->args
.num_sgprs_used
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8026 while (ctx
->args
.arg_count
< required_num_params
)
8027 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
8029 /* Create the function. */
8030 si_create_function(ctx
, "ps_epilog", NULL
, 0, 0);
8031 /* Disable elimination of unused inputs. */
8032 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8033 "InitialPSInputAddr", 0xffffff);
8035 /* Process colors. */
8036 unsigned vgpr
= ctx
->args
.num_sgprs_used
;
8037 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8038 int last_color_export
= -1;
8040 /* Find the last color export. */
8041 if (!key
->ps_epilog
.writes_z
&&
8042 !key
->ps_epilog
.writes_stencil
&&
8043 !key
->ps_epilog
.writes_samplemask
) {
8044 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8046 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8047 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8048 /* Just set this if any of the colorbuffers are enabled. */
8050 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8051 last_color_export
= 0;
8053 for (i
= 0; i
< 8; i
++)
8054 if (colors_written
& (1 << i
) &&
8055 (spi_format
>> (i
* 4)) & 0xf)
8056 last_color_export
= i
;
8060 while (colors_written
) {
8061 LLVMValueRef color
[4];
8062 int mrt
= u_bit_scan(&colors_written
);
8064 for (i
= 0; i
< 4; i
++)
8065 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8067 si_export_mrt_color(bld_base
, color
, mrt
,
8068 ctx
->args
.arg_count
- 1,
8069 mrt
== last_color_export
, &exp
);
8072 /* Process depth, stencil, samplemask. */
8073 if (key
->ps_epilog
.writes_z
)
8074 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8075 if (key
->ps_epilog
.writes_stencil
)
8076 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8077 if (key
->ps_epilog
.writes_samplemask
)
8078 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8080 if (depth
|| stencil
|| samplemask
)
8081 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8082 else if (last_color_export
== -1)
8083 ac_build_export_null(&ctx
->ac
);
8086 si_emit_ps_exports(ctx
, &exp
);
8089 LLVMBuildRetVoid(ctx
->ac
.builder
);
8093 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8095 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8096 struct ac_llvm_compiler
*compiler
,
8097 struct si_shader
*shader
,
8098 struct pipe_debug_callback
*debug
)
8100 union si_shader_part_key prolog_key
;
8101 union si_shader_part_key epilog_key
;
8103 /* Get the prolog. */
8104 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8106 /* The prolog is a no-op if these aren't set. */
8107 if (si_need_ps_prolog(&prolog_key
)) {
8109 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8110 PIPE_SHADER_FRAGMENT
, true,
8111 &prolog_key
, compiler
, debug
,
8112 si_build_ps_prolog_function
,
8113 "Fragment Shader Prolog");
8114 if (!shader
->prolog
)
8118 /* Get the epilog. */
8119 si_get_ps_epilog_key(shader
, &epilog_key
);
8122 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8123 PIPE_SHADER_FRAGMENT
, false,
8124 &epilog_key
, compiler
, debug
,
8125 si_build_ps_epilog_function
,
8126 "Fragment Shader Epilog");
8127 if (!shader
->epilog
)
8130 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8131 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8132 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8133 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8136 /* Set up the enable bits for per-sample shading if needed. */
8137 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8138 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8139 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8140 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8141 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8142 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8144 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8145 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8146 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8147 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8148 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8149 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8151 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8152 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8153 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8154 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8155 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8156 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8158 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8159 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8160 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8161 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8162 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8163 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8166 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8167 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8168 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8169 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8170 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8173 /* At least one pair of interpolation weights must be enabled. */
8174 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8175 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8176 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8179 /* Samplemask fixup requires the sample ID. */
8180 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8181 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8182 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8185 /* The sample mask input is always enabled, because the API shader always
8186 * passes it through to the epilog. Disable it here if it's unused.
8188 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8189 !shader
->selector
->info
.reads_samplemask
)
8190 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8195 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8198 /* If tessellation is all offchip and on-chip GS isn't used, this
8199 * workaround is not needed.
8203 /* SPI barrier management bug:
8204 * Make sure we have at least 4k of LDS in use to avoid the bug.
8205 * It applies to workgroup sizes of more than one wavefront.
8207 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8208 sscreen
->info
.family
== CHIP_KABINI
)
8209 *lds_size
= MAX2(*lds_size
, 8);
8212 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8213 struct si_shader
*shader
)
8215 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8217 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8219 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8220 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8221 si_multiwave_lds_size_workaround(sscreen
,
8222 &shader
->config
.lds_size
);
8226 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8227 struct si_shader
*shader
,
8228 struct pipe_debug_callback
*debug
)
8230 struct si_shader_selector
*sel
= shader
->selector
;
8231 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8234 /* LS, ES, VS are compiled on demand if the main part hasn't been
8235 * compiled for that stage.
8237 * GS are compiled on demand if the main part hasn't been compiled
8238 * for the chosen NGG-ness.
8240 * Vertex shaders are compiled on demand when a vertex fetch
8241 * workaround must be applied.
8243 if (shader
->is_monolithic
) {
8244 /* Monolithic shader (compiled as a whole, has many variants,
8245 * may take a long time to compile).
8247 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8251 /* The shader consists of several parts:
8253 * - the middle part is the user shader, it has 1 variant only
8254 * and it was compiled during the creation of the shader
8256 * - the prolog part is inserted at the beginning
8257 * - the epilog part is inserted at the end
8259 * The prolog and epilog have many (but simple) variants.
8261 * Starting with gfx9, geometry and tessellation control
8262 * shaders also contain the prolog and user shader parts of
8263 * the previous shader stage.
8269 /* Copy the compiled TGSI shader data over. */
8270 shader
->is_binary_shared
= true;
8271 shader
->binary
= mainp
->binary
;
8272 shader
->config
= mainp
->config
;
8273 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8274 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8275 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8276 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8277 memcpy(shader
->info
.vs_output_param_offset
,
8278 mainp
->info
.vs_output_param_offset
,
8279 sizeof(mainp
->info
.vs_output_param_offset
));
8280 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8281 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8282 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8284 /* Select prologs and/or epilogs. */
8285 switch (sel
->type
) {
8286 case PIPE_SHADER_VERTEX
:
8287 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8290 case PIPE_SHADER_TESS_CTRL
:
8291 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8294 case PIPE_SHADER_TESS_EVAL
:
8296 case PIPE_SHADER_GEOMETRY
:
8297 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8300 case PIPE_SHADER_FRAGMENT
:
8301 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8304 /* Make sure we have at least as many VGPRs as there
8305 * are allocated inputs.
8307 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8308 shader
->info
.num_input_vgprs
);
8313 /* Update SGPR and VGPR counts. */
8314 if (shader
->prolog
) {
8315 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8316 shader
->prolog
->config
.num_sgprs
);
8317 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8318 shader
->prolog
->config
.num_vgprs
);
8320 if (shader
->previous_stage
) {
8321 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8322 shader
->previous_stage
->config
.num_sgprs
);
8323 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8324 shader
->previous_stage
->config
.num_vgprs
);
8325 shader
->config
.spilled_sgprs
=
8326 MAX2(shader
->config
.spilled_sgprs
,
8327 shader
->previous_stage
->config
.spilled_sgprs
);
8328 shader
->config
.spilled_vgprs
=
8329 MAX2(shader
->config
.spilled_vgprs
,
8330 shader
->previous_stage
->config
.spilled_vgprs
);
8331 shader
->info
.private_mem_vgprs
=
8332 MAX2(shader
->info
.private_mem_vgprs
,
8333 shader
->previous_stage
->info
.private_mem_vgprs
);
8334 shader
->config
.scratch_bytes_per_wave
=
8335 MAX2(shader
->config
.scratch_bytes_per_wave
,
8336 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8337 shader
->info
.uses_instanceid
|=
8338 shader
->previous_stage
->info
.uses_instanceid
;
8340 if (shader
->prolog2
) {
8341 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8342 shader
->prolog2
->config
.num_sgprs
);
8343 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8344 shader
->prolog2
->config
.num_vgprs
);
8346 if (shader
->epilog
) {
8347 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8348 shader
->epilog
->config
.num_sgprs
);
8349 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8350 shader
->epilog
->config
.num_vgprs
);
8352 si_calculate_max_simd_waves(shader
);
8355 if (shader
->key
.as_ngg
) {
8356 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8357 gfx10_ngg_calculate_subgroup_info(shader
);
8358 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8359 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8362 si_fix_resource_usage(sscreen
, shader
);
8363 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8366 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8367 fprintf(stderr
, "LLVM failed to upload shader\n");
8374 void si_shader_destroy(struct si_shader
*shader
)
8376 if (shader
->scratch_bo
)
8377 si_resource_reference(&shader
->scratch_bo
, NULL
);
8379 si_resource_reference(&shader
->bo
, NULL
);
8381 if (!shader
->is_binary_shared
)
8382 si_shader_binary_clean(&shader
->binary
);
8384 free(shader
->shader_log
);