2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_strings.h"
29 #include "tgsi/tgsi_util.h"
30 #include "tgsi/tgsi_dump.h"
31 #include "tgsi/tgsi_from_mesa.h"
33 #include "ac_binary.h"
34 #include "ac_exp_param.h"
35 #include "ac_shader_util.h"
37 #include "ac_llvm_util.h"
38 #include "si_shader_internal.h"
42 #include "compiler/nir/nir.h"
44 static const char scratch_rsrc_dword0_symbol
[] =
45 "SCRATCH_RSRC_DWORD0";
47 static const char scratch_rsrc_dword1_symbol
[] =
48 "SCRATCH_RSRC_DWORD1";
50 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
51 struct si_screen
*sscreen
,
52 struct ac_llvm_compiler
*compiler
,
55 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
56 struct lp_build_tgsi_context
*bld_base
,
57 struct lp_build_emit_data
*emit_data
);
59 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
61 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
62 union si_shader_part_key
*key
);
63 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
64 union si_shader_part_key
*key
);
65 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_fix_resource_usage(struct si_screen
*sscreen
,
70 struct si_shader
*shader
);
72 /* Ideally pass the sample mask input to the PS epilog as v14, which
73 * is its usual location, so that the shader doesn't have to add v_mov.
75 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
77 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
80 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
86 /** Whether the shader runs as a combination of multiple API shaders */
87 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
89 if (ctx
->screen
->info
.chip_class
<= GFX8
)
92 return ctx
->shader
->key
.as_ls
||
93 ctx
->shader
->key
.as_es
||
94 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
95 ctx
->type
== PIPE_SHADER_GEOMETRY
;
98 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
99 static bool is_merged_shader(struct si_shader_context
*ctx
)
101 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
104 void si_init_function_info(struct si_function_info
*fninfo
)
106 fninfo
->num_params
= 0;
107 fninfo
->num_sgpr_params
= 0;
110 unsigned add_arg_assign(struct si_function_info
*fninfo
,
111 enum si_arg_regfile regfile
, LLVMTypeRef type
,
112 LLVMValueRef
*assign
)
114 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
116 unsigned idx
= fninfo
->num_params
++;
117 assert(idx
< ARRAY_SIZE(fninfo
->types
));
119 if (regfile
== ARG_SGPR
)
120 fninfo
->num_sgpr_params
= fninfo
->num_params
;
122 fninfo
->types
[idx
] = type
;
123 fninfo
->assign
[idx
] = assign
;
127 static unsigned add_arg(struct si_function_info
*fninfo
,
128 enum si_arg_regfile regfile
, LLVMTypeRef type
)
130 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
133 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
134 enum si_arg_regfile regfile
, LLVMTypeRef type
,
135 LLVMValueRef
*assign
, unsigned idx
)
137 ASSERTED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
138 assert(actual
== idx
);
141 static void add_arg_checked(struct si_function_info
*fninfo
,
142 enum si_arg_regfile regfile
, LLVMTypeRef type
,
145 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
149 * Returns a unique index for a per-patch semantic name and index. The index
150 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
153 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
155 switch (semantic_name
) {
156 case TGSI_SEMANTIC_TESSOUTER
:
158 case TGSI_SEMANTIC_TESSINNER
:
160 case TGSI_SEMANTIC_PATCH
:
165 assert(!"invalid semantic name");
171 * Returns a unique index for a semantic name and index. The index must be
172 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
175 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
178 switch (semantic_name
) {
179 case TGSI_SEMANTIC_POSITION
:
181 case TGSI_SEMANTIC_GENERIC
:
182 /* Since some shader stages use the the highest used IO index
183 * to determine the size to allocate for inputs/outputs
184 * (in LDS, tess and GS rings). GENERIC should be placed right
185 * after POSITION to make that size as small as possible.
187 if (index
< SI_MAX_IO_GENERIC
)
190 assert(!"invalid generic index");
192 case TGSI_SEMANTIC_FOG
:
193 return SI_MAX_IO_GENERIC
+ 1;
194 case TGSI_SEMANTIC_COLOR
:
196 return SI_MAX_IO_GENERIC
+ 2 + index
;
197 case TGSI_SEMANTIC_BCOLOR
:
199 /* If it's a varying, COLOR and BCOLOR alias. */
201 return SI_MAX_IO_GENERIC
+ 2 + index
;
203 return SI_MAX_IO_GENERIC
+ 4 + index
;
204 case TGSI_SEMANTIC_TEXCOORD
:
206 return SI_MAX_IO_GENERIC
+ 6 + index
;
208 /* These are rarely used between LS and HS or ES and GS. */
209 case TGSI_SEMANTIC_CLIPDIST
:
211 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
212 case TGSI_SEMANTIC_CLIPVERTEX
:
213 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
214 case TGSI_SEMANTIC_PSIZE
:
215 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
217 /* These can't be written by LS, HS, and ES. */
218 case TGSI_SEMANTIC_LAYER
:
219 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
220 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
221 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
222 case TGSI_SEMANTIC_PRIMID
:
223 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
224 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
226 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
227 assert(!"invalid semantic name");
233 * Get the value of a shader input parameter and extract a bitfield.
235 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
236 LLVMValueRef value
, unsigned rshift
,
239 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
240 value
= ac_to_integer(&ctx
->ac
, value
);
243 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
244 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
246 if (rshift
+ bitwidth
< 32) {
247 unsigned mask
= (1 << bitwidth
) - 1;
248 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
249 LLVMConstInt(ctx
->i32
, mask
, 0), "");
255 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
256 unsigned param
, unsigned rshift
,
259 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
261 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
264 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
267 case PIPE_SHADER_TESS_CTRL
:
268 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
270 case PIPE_SHADER_TESS_EVAL
:
271 return LLVMGetParam(ctx
->main_fn
,
272 ctx
->param_tes_rel_patch_id
);
280 /* Tessellation shaders pass outputs to the next shader using LDS.
282 * LS outputs = TCS inputs
283 * TCS outputs = TES inputs
286 * - TCS inputs for patch 0
287 * - TCS inputs for patch 1
288 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
290 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
291 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
292 * - TCS outputs for patch 1
293 * - Per-patch TCS outputs for patch 1
294 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
295 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
298 * All three shaders VS(LS), TCS, TES share the same LDS space.
302 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
304 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
307 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
309 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
311 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
312 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
314 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
317 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
319 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
321 return LLVMConstInt(ctx
->i32
, stride
, 0);
324 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
326 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
327 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
329 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
330 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
331 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
332 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
333 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
334 num_patch_outputs
* 4;
335 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
339 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
341 return LLVMBuildMul(ctx
->ac
.builder
,
343 ctx
->param_tcs_out_lds_offsets
,
345 LLVMConstInt(ctx
->i32
, 4, 0), "");
349 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
351 return LLVMBuildMul(ctx
->ac
.builder
,
353 ctx
->param_tcs_out_lds_offsets
,
355 LLVMConstInt(ctx
->i32
, 4, 0), "");
359 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
361 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
362 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
364 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
368 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
370 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
371 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
372 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
374 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
378 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
380 LLVMValueRef patch0_patch_data_offset
=
381 get_tcs_out_patch0_patch_data_offset(ctx
);
382 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
383 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
385 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
388 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
390 unsigned tcs_out_vertices
=
391 ctx
->shader
->selector
?
392 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
394 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
395 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
396 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
398 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
401 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
406 case PIPE_SHADER_VERTEX
:
407 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
408 return LLVMConstInt(ctx
->i32
, stride
, 0);
410 case PIPE_SHADER_TESS_CTRL
:
411 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
412 ctx
->shader
->is_monolithic
) {
413 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
414 return LLVMConstInt(ctx
->i32
, stride
, 0);
416 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
424 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
425 LLVMValueRef i32
, unsigned index
)
430 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
431 LLVMConstInt(ctx
->i32
, 16, 0), "");
433 return LLVMBuildSExt(ctx
->ac
.builder
,
434 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
439 void si_llvm_load_input_vs(
440 struct si_shader_context
*ctx
,
441 unsigned input_index
,
444 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
445 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
447 if (vs_blit_property
) {
448 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
449 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
450 LLVMIntULE
, vertex_id
,
452 /* Use LLVMIntNE, because we have 3 vertices and only
453 * the middle one should use y2.
455 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
456 LLVMIntNE
, vertex_id
,
459 if (input_index
== 0) {
461 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
462 ctx
->param_vs_blit_inputs
);
463 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
464 ctx
->param_vs_blit_inputs
+ 1);
466 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
467 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
468 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
469 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
471 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
473 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
476 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
477 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
478 out
[2] = LLVMGetParam(ctx
->main_fn
,
479 ctx
->param_vs_blit_inputs
+ 2);
480 out
[3] = ctx
->ac
.f32_1
;
484 /* Color or texture coordinates: */
485 assert(input_index
== 1);
487 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
488 for (int i
= 0; i
< 4; i
++) {
489 out
[i
] = LLVMGetParam(ctx
->main_fn
,
490 ctx
->param_vs_blit_inputs
+ 3 + i
);
493 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
494 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
495 ctx
->param_vs_blit_inputs
+ 3);
496 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
497 ctx
->param_vs_blit_inputs
+ 4);
498 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
499 ctx
->param_vs_blit_inputs
+ 5);
500 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
501 ctx
->param_vs_blit_inputs
+ 6);
503 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
505 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
507 out
[2] = LLVMGetParam(ctx
->main_fn
,
508 ctx
->param_vs_blit_inputs
+ 7);
509 out
[3] = LLVMGetParam(ctx
->main_fn
,
510 ctx
->param_vs_blit_inputs
+ 8);
515 union si_vs_fix_fetch fix_fetch
;
516 LLVMValueRef t_list_ptr
;
517 LLVMValueRef t_offset
;
519 LLVMValueRef vertex_index
;
522 /* Load the T list */
523 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
525 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
527 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
529 vertex_index
= LLVMGetParam(ctx
->main_fn
,
530 ctx
->param_vertex_index0
+
533 /* Use the open-coded implementation for all loads of doubles and
534 * of dword-sized data that needs fixups. We need to insert conversion
535 * code anyway, and the amd/common code does it for us.
537 * Note: On LLVM <= 8, we can only open-code formats with
538 * channel size >= 4 bytes.
540 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
541 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
543 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
544 (fix_fetch
.u
.log_size
== 2)) {
545 tmp
= ac_build_opencoded_load_format(
546 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
547 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
548 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
549 for (unsigned i
= 0; i
< 4; ++i
)
550 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
554 /* Do multiple loads for special formats. */
555 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
556 LLVMValueRef fetches
[4];
557 unsigned num_fetches
;
558 unsigned fetch_stride
;
559 unsigned channels_per_fetch
;
561 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
562 num_fetches
= MIN2(required_channels
, 3);
563 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
564 channels_per_fetch
= 1;
568 channels_per_fetch
= required_channels
;
571 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
572 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
573 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
574 channels_per_fetch
, 0, true);
577 if (num_fetches
== 1 && channels_per_fetch
> 1) {
578 LLVMValueRef fetch
= fetches
[0];
579 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
580 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
581 fetches
[i
] = LLVMBuildExtractElement(
582 ctx
->ac
.builder
, fetch
, tmp
, "");
584 num_fetches
= channels_per_fetch
;
585 channels_per_fetch
= 1;
588 for (unsigned i
= num_fetches
; i
< 4; ++i
)
589 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
591 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
592 required_channels
== 4) {
593 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
594 fetches
[3] = ctx
->ac
.i32_1
;
596 fetches
[3] = ctx
->ac
.f32_1
;
597 } else if (fix_fetch
.u
.log_size
== 3 &&
598 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
599 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
600 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
601 required_channels
== 4) {
602 /* For 2_10_10_10, the hardware returns an unsigned value;
603 * convert it to a signed one.
605 LLVMValueRef tmp
= fetches
[3];
606 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
608 /* First, recover the sign-extended signed integer value. */
609 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
610 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
612 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
614 /* For the integer-like cases, do a natural sign extension.
616 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
617 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
620 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
621 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
622 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
623 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
625 /* Convert back to the right type. */
626 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
628 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
629 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
630 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
631 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
632 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
633 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
639 for (unsigned i
= 0; i
< 4; ++i
)
640 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
643 static void declare_input_vs(
644 struct si_shader_context
*ctx
,
645 unsigned input_index
,
646 const struct tgsi_full_declaration
*decl
,
649 si_llvm_load_input_vs(ctx
, input_index
, out
);
652 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
659 case PIPE_SHADER_VERTEX
:
660 return LLVMGetParam(ctx
->main_fn
,
661 ctx
->param_vs_prim_id
);
662 case PIPE_SHADER_TESS_CTRL
:
663 return ctx
->abi
.tcs_patch_id
;
664 case PIPE_SHADER_TESS_EVAL
:
665 return ctx
->abi
.tes_patch_id
;
666 case PIPE_SHADER_GEOMETRY
:
667 return ctx
->abi
.gs_prim_id
;
675 * Return the value of tgsi_ind_register for indexing.
676 * This is the indirect index with the constant offset added to it.
678 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
679 const struct tgsi_ind_register
*ind
,
685 if (ind
->File
== TGSI_FILE_ADDRESS
) {
686 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
687 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
689 struct tgsi_full_src_register src
= {};
691 src
.Register
.File
= ind
->File
;
692 src
.Register
.Index
= ind
->Index
;
694 /* Set the second index to 0 for constants. */
695 if (ind
->File
== TGSI_FILE_CONSTANT
)
696 src
.Register
.Dimension
= 1;
698 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
701 result
= ac_to_integer(&ctx
->ac
, result
);
704 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
705 LLVMConstInt(ctx
->i32
, rel_index
, 0));
709 * Like si_get_indirect_index, but restricts the return value to a (possibly
710 * undefined) value inside [0..num).
712 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
713 const struct tgsi_ind_register
*ind
,
714 int rel_index
, unsigned num
)
716 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
718 return si_llvm_bound_index(ctx
, result
, num
);
721 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
722 LLVMValueRef vertex_dw_stride
,
723 LLVMValueRef base_addr
,
724 LLVMValueRef vertex_index
,
725 LLVMValueRef param_index
,
726 unsigned input_index
,
731 if (vertex_dw_stride
) {
732 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
733 vertex_dw_stride
, base_addr
);
737 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
738 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
741 int param
= is_patch
?
742 si_shader_io_get_unique_index_patch(name
[input_index
],
743 index
[input_index
]) :
744 si_shader_io_get_unique_index(name
[input_index
],
745 index
[input_index
], false);
747 /* Add the base address of the element. */
748 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
749 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
753 * Calculate a dword address given an input or output register and a stride.
755 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
756 const struct tgsi_full_dst_register
*dst
,
757 const struct tgsi_full_src_register
*src
,
758 LLVMValueRef vertex_dw_stride
,
759 LLVMValueRef base_addr
)
761 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
762 ubyte
*name
, *index
, *array_first
;
764 struct tgsi_full_dst_register reg
;
765 LLVMValueRef vertex_index
= NULL
;
766 LLVMValueRef ind_index
= NULL
;
768 /* Set the register description. The address computation is the same
769 * for sources and destinations. */
771 reg
.Register
.File
= src
->Register
.File
;
772 reg
.Register
.Index
= src
->Register
.Index
;
773 reg
.Register
.Indirect
= src
->Register
.Indirect
;
774 reg
.Register
.Dimension
= src
->Register
.Dimension
;
775 reg
.Indirect
= src
->Indirect
;
776 reg
.Dimension
= src
->Dimension
;
777 reg
.DimIndirect
= src
->DimIndirect
;
781 /* If the register is 2-dimensional (e.g. an array of vertices
782 * in a primitive), calculate the base address of the vertex. */
783 if (reg
.Register
.Dimension
) {
784 if (reg
.Dimension
.Indirect
)
785 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
786 1, reg
.Dimension
.Index
);
788 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
791 /* Get information about the register. */
792 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
793 name
= info
->input_semantic_name
;
794 index
= info
->input_semantic_index
;
795 array_first
= info
->input_array_first
;
796 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
797 name
= info
->output_semantic_name
;
798 index
= info
->output_semantic_index
;
799 array_first
= info
->output_array_first
;
805 if (reg
.Register
.Indirect
) {
806 /* Add the relative address of the element. */
807 if (reg
.Indirect
.ArrayID
)
808 input_index
= array_first
[reg
.Indirect
.ArrayID
];
810 input_index
= reg
.Register
.Index
;
812 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
813 1, reg
.Register
.Index
- input_index
);
815 input_index
= reg
.Register
.Index
;
818 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
819 base_addr
, vertex_index
,
820 ind_index
, input_index
,
822 !reg
.Register
.Dimension
);
825 /* The offchip buffer layout for TCS->TES is
827 * - attribute 0 of patch 0 vertex 0
828 * - attribute 0 of patch 0 vertex 1
829 * - attribute 0 of patch 0 vertex 2
831 * - attribute 0 of patch 1 vertex 0
832 * - attribute 0 of patch 1 vertex 1
834 * - attribute 1 of patch 0 vertex 0
835 * - attribute 1 of patch 0 vertex 1
837 * - per patch attribute 0 of patch 0
838 * - per patch attribute 0 of patch 1
841 * Note that every attribute has 4 components.
843 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
844 LLVMValueRef rel_patch_id
,
845 LLVMValueRef vertex_index
,
846 LLVMValueRef param_index
)
848 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
849 LLVMValueRef param_stride
, constant16
;
851 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
852 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
853 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
856 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
858 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
859 vertices_per_patch
, vertex_index
);
860 param_stride
= total_vertices
;
862 base_addr
= rel_patch_id
;
863 param_stride
= num_patches
;
866 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
867 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
870 LLVMValueRef patch_data_offset
=
871 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
873 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
874 patch_data_offset
, "");
879 /* This is a generic helper that can be shared by the NIR and TGSI backends */
880 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
881 struct si_shader_context
*ctx
,
882 LLVMValueRef vertex_index
,
883 LLVMValueRef param_index
,
889 unsigned param_index_base
;
891 param_index_base
= is_patch
?
892 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
893 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
896 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
897 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
900 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
903 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
904 vertex_index
, param_index
);
907 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
908 struct si_shader_context
*ctx
,
909 const struct tgsi_full_dst_register
*dst
,
910 const struct tgsi_full_src_register
*src
)
912 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
913 ubyte
*name
, *index
, *array_first
;
914 struct tgsi_full_src_register reg
;
915 LLVMValueRef vertex_index
= NULL
;
916 LLVMValueRef param_index
= NULL
;
919 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
921 if (reg
.Register
.Dimension
) {
923 if (reg
.Dimension
.Indirect
)
924 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
925 1, reg
.Dimension
.Index
);
927 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
930 /* Get information about the register. */
931 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
932 name
= info
->input_semantic_name
;
933 index
= info
->input_semantic_index
;
934 array_first
= info
->input_array_first
;
935 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
936 name
= info
->output_semantic_name
;
937 index
= info
->output_semantic_index
;
938 array_first
= info
->output_array_first
;
944 if (reg
.Register
.Indirect
) {
945 if (reg
.Indirect
.ArrayID
)
946 param_base
= array_first
[reg
.Indirect
.ArrayID
];
948 param_base
= reg
.Register
.Index
;
950 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
951 1, reg
.Register
.Index
- param_base
);
954 param_base
= reg
.Register
.Index
;
957 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
958 param_index
, param_base
,
959 name
, index
, !reg
.Register
.Dimension
);
962 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
963 LLVMTypeRef type
, unsigned swizzle
,
964 LLVMValueRef buffer
, LLVMValueRef offset
,
965 LLVMValueRef base
, bool can_speculate
)
967 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
968 LLVMValueRef value
, value2
;
969 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
972 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
973 0, ac_glc
, can_speculate
, false);
975 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
978 if (!llvm_type_is_64bit(ctx
, type
)) {
979 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
980 0, ac_glc
, can_speculate
, false);
982 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
983 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
984 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
987 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
988 swizzle
* 4, ac_glc
, can_speculate
, false);
990 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
991 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
993 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
997 * Load from LSHS LDS storage.
999 * \param type output value type
1000 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1001 * \param dw_addr address in dwords
1003 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
1004 LLVMTypeRef type
, unsigned swizzle
,
1005 LLVMValueRef dw_addr
)
1007 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1010 if (swizzle
== ~0) {
1011 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1013 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1014 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
1016 return ac_build_gather_values(&ctx
->ac
, values
,
1020 /* Split 64-bit loads. */
1021 if (llvm_type_is_64bit(ctx
, type
)) {
1022 LLVMValueRef lo
, hi
;
1024 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1025 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1026 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1029 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1030 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1032 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1034 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1038 * Store to LSHS LDS storage.
1040 * \param swizzle offset (typically 0..3)
1041 * \param dw_addr address in dwords
1042 * \param value value to store
1044 static void lshs_lds_store(struct si_shader_context
*ctx
,
1045 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1048 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1049 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1051 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1056 TESS_OFFCHIP_RING_TCS
,
1057 TESS_OFFCHIP_RING_TES
,
1060 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1061 enum si_tess_ring ring
)
1063 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1064 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1065 ctx
->param_tcs_out_lds_layout
;
1066 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1068 /* TCS only receives high 13 bits of the address. */
1069 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1070 addr
= LLVMBuildAnd(builder
, addr
,
1071 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1074 if (ring
== TCS_FACTOR_RING
) {
1075 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1076 addr
= LLVMBuildAdd(builder
, addr
,
1077 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1080 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1081 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1082 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1083 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1085 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1086 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1087 S_008F0C_OOB_SELECT(3) |
1088 S_008F0C_RESOURCE_LEVEL(1);
1090 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1091 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1093 LLVMValueRef desc
[4];
1095 desc
[1] = LLVMConstInt(ctx
->i32
,
1096 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1097 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1098 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1100 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1103 static LLVMValueRef
fetch_input_tcs(
1104 struct lp_build_tgsi_context
*bld_base
,
1105 const struct tgsi_full_src_register
*reg
,
1106 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1108 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1109 LLVMValueRef dw_addr
, stride
;
1110 unsigned swizzle
= swizzle_in
& 0xffff;
1111 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1112 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1113 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1115 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1118 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1120 LLVMValueRef vertex_index
,
1121 LLVMValueRef param_index
,
1122 unsigned const_index
,
1124 unsigned driver_location
,
1126 unsigned num_components
,
1131 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1132 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1133 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1134 LLVMValueRef dw_addr
, stride
;
1136 driver_location
= driver_location
/ 4;
1139 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1140 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1144 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1146 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1147 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1152 /* Add the constant index to the indirect index */
1153 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1154 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1156 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1162 names
= info
->input_semantic_name
;
1163 indices
= info
->input_semantic_index
;
1165 names
= info
->output_semantic_name
;
1166 indices
= info
->output_semantic_index
;
1169 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1170 vertex_index
, param_index
,
1175 LLVMValueRef value
[4];
1176 for (unsigned i
= 0; i
< num_components
; i
++) {
1177 unsigned offset
= i
;
1178 if (llvm_type_is_64bit(ctx
, type
))
1181 offset
+= component
;
1182 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1185 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1188 static LLVMValueRef
fetch_output_tcs(
1189 struct lp_build_tgsi_context
*bld_base
,
1190 const struct tgsi_full_src_register
*reg
,
1191 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1193 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1194 LLVMValueRef dw_addr
, stride
;
1195 unsigned swizzle
= (swizzle_in
& 0xffff);
1197 if (reg
->Register
.Dimension
) {
1198 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1199 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1200 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1202 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1203 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1206 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1209 static LLVMValueRef
fetch_input_tes(
1210 struct lp_build_tgsi_context
*bld_base
,
1211 const struct tgsi_full_src_register
*reg
,
1212 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1214 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1215 LLVMValueRef base
, addr
;
1216 unsigned swizzle
= (swizzle_in
& 0xffff);
1218 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1219 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1221 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1222 ctx
->tess_offchip_ring
, base
, addr
, true);
1225 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1227 LLVMValueRef vertex_index
,
1228 LLVMValueRef param_index
,
1229 unsigned const_index
,
1231 unsigned driver_location
,
1233 unsigned num_components
,
1238 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1239 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1240 LLVMValueRef base
, addr
;
1242 driver_location
= driver_location
/ 4;
1244 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1247 /* Add the constant index to the indirect index */
1248 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1249 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1251 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1254 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1255 param_index
, driver_location
,
1256 info
->input_semantic_name
,
1257 info
->input_semantic_index
,
1260 /* TODO: This will generate rather ordinary llvm code, although it
1261 * should be easy for the optimiser to fix up. In future we might want
1262 * to refactor buffer_load(), but for now this maximises code sharing
1263 * between the NIR and TGSI backends.
1265 LLVMValueRef value
[4];
1266 for (unsigned i
= 0; i
< num_components
; i
++) {
1267 unsigned offset
= i
;
1268 if (llvm_type_is_64bit(ctx
, type
)) {
1271 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1274 driver_location
+ 1,
1275 info
->input_semantic_name
,
1276 info
->input_semantic_index
,
1280 offset
= offset
% 4;
1283 offset
+= component
;
1284 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1285 ctx
->tess_offchip_ring
, base
, addr
, true);
1288 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1291 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1292 const struct tgsi_full_instruction
*inst
,
1293 const struct tgsi_opcode_info
*info
,
1295 LLVMValueRef dst
[4])
1297 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1298 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1299 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1300 unsigned chan_index
;
1301 LLVMValueRef dw_addr
, stride
;
1302 LLVMValueRef buffer
, base
, buf_addr
;
1303 LLVMValueRef values
[4];
1304 bool skip_lds_store
;
1305 bool is_tess_factor
= false, is_tess_inner
= false;
1307 /* Only handle per-patch and per-vertex outputs here.
1308 * Vectors will be lowered to scalars and this function will be called again.
1310 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1311 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1312 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1316 if (reg
->Register
.Dimension
) {
1317 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1318 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1319 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1320 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1322 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1323 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1324 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1326 if (!reg
->Register
.Indirect
) {
1327 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1329 /* Always write tess factors into LDS for the TCS epilog. */
1330 if (name
== TGSI_SEMANTIC_TESSINNER
||
1331 name
== TGSI_SEMANTIC_TESSOUTER
) {
1332 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1333 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1334 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1335 is_tess_factor
= true;
1336 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1341 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1343 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1344 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1346 uint32_t writemask
= reg
->Register
.WriteMask
;
1348 chan_index
= u_bit_scan(&writemask
);
1349 LLVMValueRef value
= dst
[chan_index
];
1351 if (inst
->Instruction
.Saturate
)
1352 value
= ac_build_clamp(&ctx
->ac
, value
);
1354 /* Skip LDS stores if there is no LDS read of this output. */
1355 if (!skip_lds_store
)
1356 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1358 value
= ac_to_integer(&ctx
->ac
, value
);
1359 values
[chan_index
] = value
;
1361 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1362 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1364 4 * chan_index
, ac_glc
, false);
1367 /* Write tess factors into VGPRs for the epilog. */
1368 if (is_tess_factor
&&
1369 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1370 if (!is_tess_inner
) {
1371 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1372 ctx
->invoc0_tess_factors
[chan_index
]);
1373 } else if (chan_index
< 2) {
1374 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1375 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1380 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1381 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1383 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1384 base
, 0, ac_glc
, false);
1388 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1389 const struct nir_variable
*var
,
1390 LLVMValueRef vertex_index
,
1391 LLVMValueRef param_index
,
1392 unsigned const_index
,
1396 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1397 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1398 const unsigned component
= var
->data
.location_frac
;
1399 const bool is_patch
= var
->data
.patch
;
1400 unsigned driver_location
= var
->data
.driver_location
;
1401 LLVMValueRef dw_addr
, stride
;
1402 LLVMValueRef buffer
, base
, addr
;
1403 LLVMValueRef values
[8];
1404 bool skip_lds_store
;
1405 bool is_tess_factor
= false, is_tess_inner
= false;
1407 driver_location
= driver_location
/ 4;
1410 /* Add the constant index to the indirect index */
1411 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1412 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1414 if (const_index
!= 0)
1415 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1419 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1420 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1421 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1422 vertex_index
, param_index
,
1424 info
->output_semantic_name
,
1425 info
->output_semantic_index
,
1428 skip_lds_store
= !info
->reads_pervertex_outputs
;
1430 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1431 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1432 vertex_index
, param_index
,
1434 info
->output_semantic_name
,
1435 info
->output_semantic_index
,
1438 skip_lds_store
= !info
->reads_perpatch_outputs
;
1441 int name
= info
->output_semantic_name
[driver_location
];
1443 /* Always write tess factors into LDS for the TCS epilog. */
1444 if (name
== TGSI_SEMANTIC_TESSINNER
||
1445 name
== TGSI_SEMANTIC_TESSOUTER
) {
1446 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1447 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1448 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1449 is_tess_factor
= true;
1450 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1455 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1457 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1459 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1460 param_index
, driver_location
,
1461 info
->output_semantic_name
,
1462 info
->output_semantic_index
,
1465 for (unsigned chan
= 0; chan
< 8; chan
++) {
1466 if (!(writemask
& (1 << chan
)))
1468 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1470 unsigned buffer_store_offset
= chan
% 4;
1472 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1475 driver_location
+ 1,
1476 info
->output_semantic_name
,
1477 info
->output_semantic_index
,
1481 /* Skip LDS stores if there is no LDS read of this output. */
1482 if (!skip_lds_store
)
1483 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1485 value
= ac_to_integer(&ctx
->ac
, value
);
1486 values
[chan
] = value
;
1488 if (writemask
!= 0xF && !is_tess_factor
) {
1489 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1491 4 * buffer_store_offset
,
1495 /* Write tess factors into VGPRs for the epilog. */
1496 if (is_tess_factor
&&
1497 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1498 if (!is_tess_inner
) {
1499 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1500 ctx
->invoc0_tess_factors
[chan
]);
1501 } else if (chan
< 2) {
1502 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1503 ctx
->invoc0_tess_factors
[4 + chan
]);
1508 if (writemask
== 0xF && !is_tess_factor
) {
1509 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1511 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1512 base
, 0, ac_glc
, false);
1516 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1517 unsigned input_index
,
1518 unsigned vtx_offset_param
,
1522 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1523 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1524 struct si_shader
*shader
= ctx
->shader
;
1525 LLVMValueRef vtx_offset
, soffset
;
1526 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1527 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1528 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1532 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1534 /* GFX9 has the ESGS ring in LDS. */
1535 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1536 unsigned index
= vtx_offset_param
;
1538 switch (index
/ 2) {
1540 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1541 index
% 2 ? 16 : 0, 16);
1544 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1545 index
% 2 ? 16 : 0, 16);
1548 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1549 index
% 2 ? 16 : 0, 16);
1556 unsigned offset
= param
* 4 + swizzle
;
1557 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1558 LLVMConstInt(ctx
->i32
, offset
, false), "");
1560 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1561 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1562 if (llvm_type_is_64bit(ctx
, type
)) {
1563 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1564 &ctx
->ac
.i32_1
, 1, "");
1565 LLVMValueRef values
[2] = {
1567 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1569 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1571 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1574 /* GFX6: input load from the ESGS ring in memory. */
1575 if (swizzle
== ~0) {
1576 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1578 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1579 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1582 return ac_build_gather_values(&ctx
->ac
, values
,
1586 /* Get the vertex offset parameter on GFX6. */
1587 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1589 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1590 LLVMConstInt(ctx
->i32
, 4, 0), "");
1592 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1594 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1595 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1596 if (llvm_type_is_64bit(ctx
, type
)) {
1597 LLVMValueRef value2
;
1598 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1600 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1601 ctx
->i32_0
, vtx_offset
, soffset
,
1602 0, ac_glc
, true, false);
1603 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1605 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1608 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1610 unsigned driver_location
,
1612 unsigned num_components
,
1613 unsigned vertex_index
,
1614 unsigned const_index
,
1617 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1619 LLVMValueRef value
[4];
1620 for (unsigned i
= 0; i
< num_components
; i
++) {
1621 unsigned offset
= i
;
1622 if (llvm_type_is_64bit(ctx
, type
))
1625 offset
+= component
;
1626 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1627 vertex_index
, type
, offset
);
1630 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1633 static LLVMValueRef
fetch_input_gs(
1634 struct lp_build_tgsi_context
*bld_base
,
1635 const struct tgsi_full_src_register
*reg
,
1636 enum tgsi_opcode_type type
,
1637 unsigned swizzle_in
)
1639 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1640 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1641 unsigned swizzle
= swizzle_in
& 0xffff;
1643 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1644 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1645 return si_get_primitive_id(ctx
, swizzle
);
1647 if (!reg
->Register
.Dimension
)
1650 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1651 reg
->Dimension
.Index
,
1652 tgsi2llvmtype(bld_base
, type
),
1656 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1658 switch (interpolate
) {
1659 case TGSI_INTERPOLATE_CONSTANT
:
1662 case TGSI_INTERPOLATE_LINEAR
:
1663 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1664 return SI_PARAM_LINEAR_SAMPLE
;
1665 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1666 return SI_PARAM_LINEAR_CENTROID
;
1668 return SI_PARAM_LINEAR_CENTER
;
1670 case TGSI_INTERPOLATE_COLOR
:
1671 case TGSI_INTERPOLATE_PERSPECTIVE
:
1672 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1673 return SI_PARAM_PERSP_SAMPLE
;
1674 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1675 return SI_PARAM_PERSP_CENTROID
;
1677 return SI_PARAM_PERSP_CENTER
;
1680 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1685 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1686 unsigned attr_index
, unsigned chan
,
1687 LLVMValueRef prim_mask
,
1688 LLVMValueRef i
, LLVMValueRef j
)
1691 return ac_build_fs_interp(&ctx
->ac
,
1692 LLVMConstInt(ctx
->i32
, chan
, 0),
1693 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1696 return ac_build_fs_interp_mov(&ctx
->ac
,
1697 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1698 LLVMConstInt(ctx
->i32
, chan
, 0),
1699 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1704 * Interpolate a fragment shader input.
1706 * @param ctx context
1707 * @param input_index index of the input in hardware
1708 * @param semantic_name TGSI_SEMANTIC_*
1709 * @param semantic_index semantic index
1710 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1711 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1712 * @param interp_param interpolation weights (i,j)
1713 * @param prim_mask SI_PARAM_PRIM_MASK
1714 * @param face SI_PARAM_FRONT_FACE
1715 * @param result the return value (4 components)
1717 static void interp_fs_input(struct si_shader_context
*ctx
,
1718 unsigned input_index
,
1719 unsigned semantic_name
,
1720 unsigned semantic_index
,
1721 unsigned num_interp_inputs
,
1722 unsigned colors_read_mask
,
1723 LLVMValueRef interp_param
,
1724 LLVMValueRef prim_mask
,
1726 LLVMValueRef result
[4])
1728 LLVMValueRef i
= NULL
, j
= NULL
;
1731 /* fs.constant returns the param from the middle vertex, so it's not
1732 * really useful for flat shading. It's meant to be used for custom
1733 * interpolation (but the intrinsic can't fetch from the other two
1736 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1737 * to do the right thing. The only reason we use fs.constant is that
1738 * fs.interp cannot be used on integers, because they can be equal
1741 * When interp is false we will use fs.constant or for newer llvm,
1742 * amdgcn.interp.mov.
1744 bool interp
= interp_param
!= NULL
;
1747 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1748 LLVMVectorType(ctx
->f32
, 2), "");
1750 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1752 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1756 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1757 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1758 LLVMValueRef is_face_positive
;
1760 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1761 * otherwise it's at offset "num_inputs".
1763 unsigned back_attr_offset
= num_interp_inputs
;
1764 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1765 back_attr_offset
+= 1;
1767 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1768 face
, ctx
->i32_0
, "");
1770 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1771 LLVMValueRef front
, back
;
1773 front
= si_build_fs_interp(ctx
,
1776 back
= si_build_fs_interp(ctx
,
1777 back_attr_offset
, chan
,
1780 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1786 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1787 result
[0] = si_build_fs_interp(ctx
, input_index
,
1788 0, prim_mask
, i
, j
);
1790 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1791 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1793 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1794 result
[chan
] = si_build_fs_interp(ctx
,
1801 void si_llvm_load_input_fs(
1802 struct si_shader_context
*ctx
,
1803 unsigned input_index
,
1804 LLVMValueRef out
[4])
1806 struct si_shader
*shader
= ctx
->shader
;
1807 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1808 LLVMValueRef main_fn
= ctx
->main_fn
;
1809 LLVMValueRef interp_param
= NULL
;
1810 int interp_param_idx
;
1811 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1812 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1813 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1814 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1816 /* Get colors from input VGPRs (set by the prolog). */
1817 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1818 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1819 unsigned mask
= colors_read
>> (semantic_index
* 4);
1820 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1821 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1822 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1824 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1825 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1826 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1827 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1831 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1832 if (interp_param_idx
== -1)
1834 else if (interp_param_idx
) {
1835 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1838 interp_fs_input(ctx
, input_index
, semantic_name
,
1839 semantic_index
, 0, /* this param is unused */
1840 shader
->selector
->info
.colors_read
, interp_param
,
1842 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1846 static void declare_input_fs(
1847 struct si_shader_context
*ctx
,
1848 unsigned input_index
,
1849 const struct tgsi_full_declaration
*decl
,
1850 LLVMValueRef out
[4])
1852 si_llvm_load_input_fs(ctx
, input_index
, out
);
1855 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1857 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1860 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1862 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1864 /* For non-indexed draws, the base vertex set by the driver
1865 * (for direct draws) or the CP (for indirect draws) is the
1866 * first vertex ID, but GLSL expects 0 to be returned.
1868 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1869 ctx
->param_vs_state_bits
);
1870 LLVMValueRef indexed
;
1872 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1873 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1875 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1879 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1881 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1883 LLVMValueRef values
[3];
1884 LLVMValueRef result
;
1886 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1888 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1889 unsigned sizes
[3] = {
1890 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1891 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1892 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1895 for (i
= 0; i
< 3; ++i
)
1896 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1898 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1900 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1907 * Load a dword from a constant buffer.
1909 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1910 LLVMValueRef resource
,
1911 LLVMValueRef offset
)
1913 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1917 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1919 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1920 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1921 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1922 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1924 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1925 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1926 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1928 LLVMValueRef pos
[4] = {
1929 buffer_load_const(ctx
, resource
, offset0
),
1930 buffer_load_const(ctx
, resource
, offset1
),
1931 LLVMConstReal(ctx
->f32
, 0),
1932 LLVMConstReal(ctx
->f32
, 0)
1935 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1938 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1940 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1941 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1944 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1946 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1947 LLVMValueRef coord
[4] = {
1948 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1949 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1954 /* For triangles, the vector should be (u, v, 1-u-v). */
1955 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1956 PIPE_PRIM_TRIANGLES
) {
1957 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1958 LLVMBuildFAdd(ctx
->ac
.builder
,
1959 coord
[0], coord
[1], ""), "");
1961 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1964 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1965 unsigned semantic_name
)
1967 LLVMValueRef base
, addr
;
1969 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1971 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1972 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1973 LLVMConstInt(ctx
->i32
, param
, 0));
1975 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1976 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1980 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1981 unsigned semantic_name
)
1983 LLVMValueRef buf
, slot
, val
[4];
1986 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1987 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1988 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1989 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1991 for (i
= 0; i
< 4; i
++)
1992 val
[i
] = buffer_load_const(ctx
, buf
,
1993 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1994 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1997 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1998 unsigned varying_id
,
1999 bool load_default_state
)
2001 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2002 unsigned semantic_name
;
2004 if (load_default_state
) {
2005 switch (varying_id
) {
2006 case VARYING_SLOT_TESS_LEVEL_INNER
:
2007 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
2009 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2010 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
2013 unreachable("unknown tess level");
2015 return load_tess_level_default(ctx
, semantic_name
);
2018 switch (varying_id
) {
2019 case VARYING_SLOT_TESS_LEVEL_INNER
:
2020 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2022 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2023 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2026 unreachable("unknown tess level");
2029 return load_tess_level(ctx
, semantic_name
);
2033 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2035 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2036 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2037 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2038 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2039 return get_num_tcs_out_vertices(ctx
);
2041 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2044 void si_load_system_value(struct si_shader_context
*ctx
,
2046 const struct tgsi_full_declaration
*decl
)
2048 LLVMValueRef value
= 0;
2050 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2052 switch (decl
->Semantic
.Name
) {
2053 case TGSI_SEMANTIC_INSTANCEID
:
2054 value
= ctx
->abi
.instance_id
;
2057 case TGSI_SEMANTIC_VERTEXID
:
2058 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2060 ctx
->abi
.base_vertex
, "");
2063 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2064 /* Unused. Clarify the meaning in indexed vs. non-indexed
2065 * draws if this is ever used again. */
2069 case TGSI_SEMANTIC_BASEVERTEX
:
2070 value
= get_base_vertex(&ctx
->abi
);
2073 case TGSI_SEMANTIC_BASEINSTANCE
:
2074 value
= ctx
->abi
.start_instance
;
2077 case TGSI_SEMANTIC_DRAWID
:
2078 value
= ctx
->abi
.draw_id
;
2081 case TGSI_SEMANTIC_INVOCATIONID
:
2082 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2083 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2084 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2085 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2086 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2087 ctx
->abi
.gs_invocation_id
,
2088 LLVMConstInt(ctx
->i32
, 127, 0), "");
2090 value
= ctx
->abi
.gs_invocation_id
;
2093 assert(!"INVOCATIONID not implemented");
2097 case TGSI_SEMANTIC_POSITION
:
2099 LLVMValueRef pos
[4] = {
2100 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2101 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2102 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2103 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2104 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2106 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2110 case TGSI_SEMANTIC_FACE
:
2111 value
= ctx
->abi
.front_face
;
2114 case TGSI_SEMANTIC_SAMPLEID
:
2115 value
= si_get_sample_id(ctx
);
2118 case TGSI_SEMANTIC_SAMPLEPOS
: {
2119 LLVMValueRef pos
[4] = {
2120 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2121 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2122 LLVMConstReal(ctx
->f32
, 0),
2123 LLVMConstReal(ctx
->f32
, 0)
2125 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2126 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2127 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2131 case TGSI_SEMANTIC_SAMPLEMASK
:
2132 /* This can only occur with the OpenGL Core profile, which
2133 * doesn't support smoothing.
2135 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2138 case TGSI_SEMANTIC_TESSCOORD
:
2139 value
= si_load_tess_coord(&ctx
->abi
);
2142 case TGSI_SEMANTIC_VERTICESIN
:
2143 value
= si_load_patch_vertices_in(&ctx
->abi
);
2146 case TGSI_SEMANTIC_TESSINNER
:
2147 case TGSI_SEMANTIC_TESSOUTER
:
2148 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2151 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2152 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2153 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2156 case TGSI_SEMANTIC_PRIMID
:
2157 value
= si_get_primitive_id(ctx
, 0);
2160 case TGSI_SEMANTIC_GRID_SIZE
:
2161 value
= ctx
->abi
.num_work_groups
;
2164 case TGSI_SEMANTIC_BLOCK_SIZE
:
2165 value
= get_block_size(&ctx
->abi
);
2168 case TGSI_SEMANTIC_BLOCK_ID
:
2170 LLVMValueRef values
[3];
2172 for (int i
= 0; i
< 3; i
++) {
2173 values
[i
] = ctx
->i32_0
;
2174 if (ctx
->abi
.workgroup_ids
[i
]) {
2175 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2178 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2182 case TGSI_SEMANTIC_THREAD_ID
:
2183 value
= ctx
->abi
.local_invocation_ids
;
2186 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2187 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2190 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2191 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2194 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2195 value
= ac_get_thread_id(&ctx
->ac
);
2198 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2200 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2201 if (ctx
->ac
.wave_size
== 64)
2202 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2203 value
= LLVMBuildShl(ctx
->ac
.builder
,
2204 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2205 if (ctx
->ac
.wave_size
== 32)
2206 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2207 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2211 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2212 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2213 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2214 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2216 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2217 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2218 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2219 /* All bits set except LSB */
2220 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2223 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2225 if (ctx
->ac
.wave_size
== 64)
2226 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2227 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2228 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2229 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2230 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2231 if (ctx
->ac
.wave_size
== 32)
2232 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2233 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2237 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2238 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2242 assert(!"unknown system value");
2246 ctx
->system_values
[index
] = value
;
2249 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2251 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2252 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2254 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2257 assert(!ctx
->ac
.lds
);
2259 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2260 LLVMArrayType(ctx
->i8
, lds_size
),
2263 LLVMSetAlignment(var
, 64 * 1024);
2265 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2268 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2269 const struct tgsi_full_declaration
*decl
)
2271 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2272 assert(decl
->Range
.First
== decl
->Range
.Last
);
2274 si_declare_compute_memory(ctx
);
2277 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2280 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2281 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2283 /* Do the bounds checking with a descriptor, because
2284 * doing computation and manual bounds checking of 64-bit
2285 * addresses generates horrible VALU code with very high
2286 * VGPR usage and very low SIMD occupancy.
2288 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2290 LLVMValueRef desc0
, desc1
;
2292 desc1
= LLVMConstInt(ctx
->i32
,
2293 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2295 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2296 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2297 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2298 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2300 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2301 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2302 S_008F0C_OOB_SELECT(3) |
2303 S_008F0C_RESOURCE_LEVEL(1);
2305 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2306 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2308 LLVMValueRef desc_elems
[] = {
2311 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2312 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2315 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2318 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2320 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2321 ctx
->param_const_and_shader_buffers
);
2323 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2324 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2327 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2329 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2330 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2332 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2334 if (sel
->info
.const_buffers_declared
== 1 &&
2335 sel
->info
.shader_buffers_declared
== 0) {
2336 return load_const_buffer_desc_fast_path(ctx
);
2339 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2340 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2341 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2343 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2347 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2349 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2350 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2351 ctx
->param_const_and_shader_buffers
);
2353 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2354 index
= LLVMBuildSub(ctx
->ac
.builder
,
2355 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2358 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2361 static LLVMValueRef
fetch_constant(
2362 struct lp_build_tgsi_context
*bld_base
,
2363 const struct tgsi_full_src_register
*reg
,
2364 enum tgsi_opcode_type type
,
2365 unsigned swizzle_in
)
2367 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2368 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2369 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2371 unsigned swizzle
= swizzle_in
& 0xffff;
2373 LLVMValueRef addr
, bufp
;
2375 if (swizzle_in
== LP_CHAN_ALL
) {
2377 LLVMValueRef values
[4];
2378 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2379 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2381 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2384 /* Split 64-bit loads. */
2385 if (tgsi_type_is_64bit(type
)) {
2386 LLVMValueRef lo
, hi
;
2388 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2389 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2390 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2394 idx
= reg
->Register
.Index
* 4 + swizzle
;
2395 if (reg
->Register
.Indirect
) {
2396 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2398 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2401 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2402 if (sel
->info
.const_buffers_declared
== 1 &&
2403 sel
->info
.shader_buffers_declared
== 0) {
2404 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2405 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2406 return bitcast(bld_base
, type
, result
);
2409 assert(reg
->Register
.Dimension
);
2410 buf
= reg
->Dimension
.Index
;
2412 if (reg
->Dimension
.Indirect
) {
2413 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2415 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2416 reg
->Dimension
.Index
,
2417 ctx
->num_const_buffers
);
2418 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2419 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2420 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2422 bufp
= load_const_buffer_desc(ctx
, buf
);
2424 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2427 /* Initialize arguments for the shader export intrinsic */
2428 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2429 LLVMValueRef
*values
,
2431 struct ac_export_args
*args
)
2433 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2434 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2436 bool is_int8
, is_int10
;
2438 /* Default is 0xf. Adjusted below depending on the format. */
2439 args
->enabled_channels
= 0xf; /* writemask */
2441 /* Specify whether the EXEC mask represents the valid mask */
2442 args
->valid_mask
= 0;
2444 /* Specify whether this is the last export */
2447 /* Specify the target we are exporting */
2448 args
->target
= target
;
2450 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2451 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2452 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2453 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2455 assert(cbuf
>= 0 && cbuf
< 8);
2456 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2457 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2458 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2461 args
->compr
= false;
2462 args
->out
[0] = f32undef
;
2463 args
->out
[1] = f32undef
;
2464 args
->out
[2] = f32undef
;
2465 args
->out
[3] = f32undef
;
2467 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2468 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2469 unsigned bits
, bool hi
) = NULL
;
2471 switch (spi_shader_col_format
) {
2472 case V_028714_SPI_SHADER_ZERO
:
2473 args
->enabled_channels
= 0; /* writemask */
2474 args
->target
= V_008DFC_SQ_EXP_NULL
;
2477 case V_028714_SPI_SHADER_32_R
:
2478 args
->enabled_channels
= 1; /* writemask */
2479 args
->out
[0] = values
[0];
2482 case V_028714_SPI_SHADER_32_GR
:
2483 args
->enabled_channels
= 0x3; /* writemask */
2484 args
->out
[0] = values
[0];
2485 args
->out
[1] = values
[1];
2488 case V_028714_SPI_SHADER_32_AR
:
2489 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2490 args
->enabled_channels
= 0x3; /* writemask */
2491 args
->out
[0] = values
[0];
2492 args
->out
[1] = values
[3];
2494 args
->enabled_channels
= 0x9; /* writemask */
2495 args
->out
[0] = values
[0];
2496 args
->out
[3] = values
[3];
2500 case V_028714_SPI_SHADER_FP16_ABGR
:
2501 packf
= ac_build_cvt_pkrtz_f16
;
2504 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2505 packf
= ac_build_cvt_pknorm_u16
;
2508 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2509 packf
= ac_build_cvt_pknorm_i16
;
2512 case V_028714_SPI_SHADER_UINT16_ABGR
:
2513 packi
= ac_build_cvt_pk_u16
;
2516 case V_028714_SPI_SHADER_SINT16_ABGR
:
2517 packi
= ac_build_cvt_pk_i16
;
2520 case V_028714_SPI_SHADER_32_ABGR
:
2521 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2525 /* Pack f16 or norm_i16/u16. */
2527 for (chan
= 0; chan
< 2; chan
++) {
2528 LLVMValueRef pack_args
[2] = {
2530 values
[2 * chan
+ 1]
2532 LLVMValueRef packed
;
2534 packed
= packf(&ctx
->ac
, pack_args
);
2535 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2537 args
->compr
= 1; /* COMPR flag */
2541 for (chan
= 0; chan
< 2; chan
++) {
2542 LLVMValueRef pack_args
[2] = {
2543 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2544 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2546 LLVMValueRef packed
;
2548 packed
= packi(&ctx
->ac
, pack_args
,
2549 is_int8
? 8 : is_int10
? 10 : 16,
2551 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2553 args
->compr
= 1; /* COMPR flag */
2557 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2560 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2562 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2563 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2564 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2565 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2566 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2567 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2568 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2569 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2571 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2574 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2575 SI_PARAM_ALPHA_REF
);
2576 LLVMValueRef alpha_pass
=
2577 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2578 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2580 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2584 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2586 unsigned samplemask_param
)
2588 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2589 LLVMValueRef coverage
;
2591 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2592 coverage
= LLVMGetParam(ctx
->main_fn
,
2594 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2596 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2598 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2600 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2603 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2604 LLVMConstReal(ctx
->f32
,
2605 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2607 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2610 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2611 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2615 unsigned const_chan
;
2616 LLVMValueRef base_elt
;
2617 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2618 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2619 SI_VS_CONST_CLIP_PLANES
, 0);
2620 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2622 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2623 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2628 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2630 /* Compute dot products of position and user clip plane vectors */
2631 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2632 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2634 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2635 const_chan
) * 4, 0);
2636 base_elt
= buffer_load_const(ctx
, const_resource
,
2638 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2639 out_elts
[const_chan
], args
->out
[chan
]);
2643 args
->enabled_channels
= 0xf;
2644 args
->valid_mask
= 0;
2646 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2651 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2655 if (so
->num_outputs
)
2656 fprintf(stderr
, "STREAMOUT\n");
2658 for (i
= 0; i
< so
->num_outputs
; i
++) {
2659 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2660 so
->output
[i
].start_component
;
2661 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2662 i
, so
->output
[i
].output_buffer
,
2663 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2664 so
->output
[i
].register_index
,
2665 mask
& 1 ? "x" : "",
2666 mask
& 2 ? "y" : "",
2667 mask
& 4 ? "z" : "",
2668 mask
& 8 ? "w" : "");
2672 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2673 LLVMValueRef
const *so_buffers
,
2674 LLVMValueRef
const *so_write_offsets
,
2675 struct pipe_stream_output
*stream_out
,
2676 struct si_shader_output_values
*shader_out
)
2678 unsigned buf_idx
= stream_out
->output_buffer
;
2679 unsigned start
= stream_out
->start_component
;
2680 unsigned num_comps
= stream_out
->num_components
;
2681 LLVMValueRef out
[4];
2683 assert(num_comps
&& num_comps
<= 4);
2684 if (!num_comps
|| num_comps
> 4)
2687 /* Load the output as int. */
2688 for (int j
= 0; j
< num_comps
; j
++) {
2689 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2691 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2694 /* Pack the output. */
2695 LLVMValueRef vdata
= NULL
;
2697 switch (num_comps
) {
2698 case 1: /* as i32 */
2701 case 2: /* as v2i32 */
2702 case 3: /* as v3i32 */
2703 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2704 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2707 /* as v4i32 (aligned to 4) */
2708 out
[3] = LLVMGetUndef(ctx
->i32
);
2710 case 4: /* as v4i32 */
2711 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2715 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2717 so_write_offsets
[buf_idx
],
2719 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
, false);
2723 * Write streamout data to buffers for vertex stream @p stream (different
2724 * vertex streams can occur for GS copy shaders).
2726 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2727 struct si_shader_output_values
*outputs
,
2728 unsigned noutput
, unsigned stream
)
2730 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2731 struct pipe_stream_output_info
*so
= &sel
->so
;
2732 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2735 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2736 LLVMValueRef so_vtx_count
=
2737 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2739 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2741 /* can_emit = tid < so_vtx_count; */
2742 LLVMValueRef can_emit
=
2743 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2745 /* Emit the streamout code conditionally. This actually avoids
2746 * out-of-bounds buffer access. The hw tells us via the SGPR
2747 * (so_vtx_count) which threads are allowed to emit streamout data. */
2748 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2750 /* The buffer offset is computed as follows:
2751 * ByteOffset = streamout_offset[buffer_id]*4 +
2752 * (streamout_write_index + thread_id)*stride[buffer_id] +
2756 LLVMValueRef so_write_index
=
2757 LLVMGetParam(ctx
->main_fn
,
2758 ctx
->param_streamout_write_index
);
2760 /* Compute (streamout_write_index + thread_id). */
2761 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2763 /* Load the descriptor and compute the write offset for each
2764 * enabled buffer. */
2765 LLVMValueRef so_write_offset
[4] = {};
2766 LLVMValueRef so_buffers
[4];
2767 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2768 ctx
->param_rw_buffers
);
2770 for (i
= 0; i
< 4; i
++) {
2774 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2775 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2777 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2779 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2780 ctx
->param_streamout_offset
[i
]);
2781 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2783 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2784 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2788 /* Write streamout data. */
2789 for (i
= 0; i
< so
->num_outputs
; i
++) {
2790 unsigned reg
= so
->output
[i
].register_index
;
2795 if (stream
!= so
->output
[i
].stream
)
2798 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2799 &so
->output
[i
], &outputs
[reg
]);
2802 ac_build_endif(&ctx
->ac
, 6501);
2805 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2806 LLVMValueRef
*values
)
2808 struct ac_export_args args
;
2810 si_llvm_init_export_args(ctx
, values
,
2811 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2812 ac_build_export(&ctx
->ac
, &args
);
2815 static void si_build_param_exports(struct si_shader_context
*ctx
,
2816 struct si_shader_output_values
*outputs
,
2819 struct si_shader
*shader
= ctx
->shader
;
2820 unsigned param_count
= 0;
2822 for (unsigned i
= 0; i
< noutput
; i
++) {
2823 unsigned semantic_name
= outputs
[i
].semantic_name
;
2824 unsigned semantic_index
= outputs
[i
].semantic_index
;
2826 if (outputs
[i
].vertex_stream
[0] != 0 &&
2827 outputs
[i
].vertex_stream
[1] != 0 &&
2828 outputs
[i
].vertex_stream
[2] != 0 &&
2829 outputs
[i
].vertex_stream
[3] != 0)
2832 switch (semantic_name
) {
2833 case TGSI_SEMANTIC_LAYER
:
2834 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2835 case TGSI_SEMANTIC_CLIPDIST
:
2836 case TGSI_SEMANTIC_COLOR
:
2837 case TGSI_SEMANTIC_BCOLOR
:
2838 case TGSI_SEMANTIC_PRIMID
:
2839 case TGSI_SEMANTIC_FOG
:
2840 case TGSI_SEMANTIC_TEXCOORD
:
2841 case TGSI_SEMANTIC_GENERIC
:
2847 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2848 semantic_index
< SI_MAX_IO_GENERIC
) &&
2849 shader
->key
.opt
.kill_outputs
&
2850 (1ull << si_shader_io_get_unique_index(semantic_name
,
2851 semantic_index
, true)))
2854 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2856 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2857 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2860 shader
->info
.nr_param_exports
= param_count
;
2864 * Vertex color clamping.
2866 * This uses a state constant loaded in a user data SGPR and
2867 * an IF statement is added that clamps all colors if the constant
2870 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2871 struct si_shader_output_values
*outputs
,
2874 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2875 bool has_colors
= false;
2877 /* Store original colors to alloca variables. */
2878 for (unsigned i
= 0; i
< noutput
; i
++) {
2879 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2880 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2883 for (unsigned j
= 0; j
< 4; j
++) {
2884 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2885 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2893 /* The state is in the first bit of the user SGPR. */
2894 LLVMValueRef cond
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2895 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2897 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2899 /* Store clamped colors to alloca variables within the conditional block. */
2900 for (unsigned i
= 0; i
< noutput
; i
++) {
2901 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2902 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2905 for (unsigned j
= 0; j
< 4; j
++) {
2906 LLVMBuildStore(ctx
->ac
.builder
,
2907 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2911 ac_build_endif(&ctx
->ac
, 6502);
2913 /* Load clamped colors */
2914 for (unsigned i
= 0; i
< noutput
; i
++) {
2915 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2916 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2919 for (unsigned j
= 0; j
< 4; j
++) {
2920 outputs
[i
].values
[j
] =
2921 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2926 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2927 * (position and parameter data only).
2929 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2930 struct si_shader_output_values
*outputs
,
2933 struct si_shader
*shader
= ctx
->shader
;
2934 struct ac_export_args pos_args
[4] = {};
2935 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2939 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2941 /* Build position exports. */
2942 for (i
= 0; i
< noutput
; i
++) {
2943 switch (outputs
[i
].semantic_name
) {
2944 case TGSI_SEMANTIC_POSITION
:
2945 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2946 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2948 case TGSI_SEMANTIC_PSIZE
:
2949 psize_value
= outputs
[i
].values
[0];
2951 case TGSI_SEMANTIC_LAYER
:
2952 layer_value
= outputs
[i
].values
[0];
2954 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2955 viewport_index_value
= outputs
[i
].values
[0];
2957 case TGSI_SEMANTIC_EDGEFLAG
:
2958 edgeflag_value
= outputs
[i
].values
[0];
2960 case TGSI_SEMANTIC_CLIPDIST
:
2961 if (!shader
->key
.opt
.clip_disable
) {
2962 unsigned index
= 2 + outputs
[i
].semantic_index
;
2963 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2964 V_008DFC_SQ_EXP_POS
+ index
,
2968 case TGSI_SEMANTIC_CLIPVERTEX
:
2969 if (!shader
->key
.opt
.clip_disable
) {
2970 si_llvm_emit_clipvertex(ctx
, pos_args
,
2977 /* We need to add the position output manually if it's missing. */
2978 if (!pos_args
[0].out
[0]) {
2979 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2980 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2981 pos_args
[0].done
= 0; /* last export? */
2982 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2983 pos_args
[0].compr
= 0; /* COMPR flag */
2984 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2985 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2986 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2987 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2990 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2991 if (shader
->selector
->info
.writes_psize
||
2992 shader
->selector
->pos_writes_edgeflag
||
2993 shader
->selector
->info
.writes_viewport_index
||
2994 shader
->selector
->info
.writes_layer
) {
2995 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2996 (shader
->selector
->pos_writes_edgeflag
<< 1) |
2997 (shader
->selector
->info
.writes_layer
<< 2);
2999 pos_args
[1].valid_mask
= 0; /* EXEC mask */
3000 pos_args
[1].done
= 0; /* last export? */
3001 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
3002 pos_args
[1].compr
= 0; /* COMPR flag */
3003 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
3004 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
3005 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
3006 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
3008 if (shader
->selector
->info
.writes_psize
)
3009 pos_args
[1].out
[0] = psize_value
;
3011 if (shader
->selector
->pos_writes_edgeflag
) {
3012 /* The output is a float, but the hw expects an integer
3013 * with the first bit containing the edge flag. */
3014 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
3017 edgeflag_value
= ac_build_umin(&ctx
->ac
,
3021 /* The LLVM intrinsic expects a float. */
3022 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
3025 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3026 /* GFX9 has the layer in out.z[10:0] and the viewport
3027 * index in out.z[19:16].
3029 if (shader
->selector
->info
.writes_layer
)
3030 pos_args
[1].out
[2] = layer_value
;
3032 if (shader
->selector
->info
.writes_viewport_index
) {
3033 LLVMValueRef v
= viewport_index_value
;
3035 v
= ac_to_integer(&ctx
->ac
, v
);
3036 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3037 LLVMConstInt(ctx
->i32
, 16, 0), "");
3038 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3039 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3040 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3041 pos_args
[1].enabled_channels
|= 1 << 2;
3044 if (shader
->selector
->info
.writes_layer
)
3045 pos_args
[1].out
[2] = layer_value
;
3047 if (shader
->selector
->info
.writes_viewport_index
) {
3048 pos_args
[1].out
[3] = viewport_index_value
;
3049 pos_args
[1].enabled_channels
|= 1 << 3;
3054 for (i
= 0; i
< 4; i
++)
3055 if (pos_args
[i
].out
[0])
3056 shader
->info
.nr_pos_exports
++;
3058 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3059 * Setting valid_mask=1 prevents it and has no other effect.
3061 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3062 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3063 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3064 pos_args
[0].valid_mask
= 1;
3067 for (i
= 0; i
< 4; i
++) {
3068 if (!pos_args
[i
].out
[0])
3071 /* Specify the target we are exporting */
3072 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3074 if (pos_idx
== shader
->info
.nr_pos_exports
)
3075 /* Specify that this is the last export */
3076 pos_args
[i
].done
= 1;
3078 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3081 /* Build parameter exports. */
3082 si_build_param_exports(ctx
, outputs
, noutput
);
3086 * Forward all outputs from the vertex shader to the TES. This is only used
3087 * for the fixed function TCS.
3089 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3091 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3092 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3093 LLVMValueRef lds_vertex_stride
, lds_base
;
3096 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3097 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3098 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3100 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3101 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3102 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3105 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3107 unsigned i
= u_bit_scan64(&inputs
);
3109 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3110 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3113 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3114 get_rel_patch_id(ctx
),
3116 LLVMConstInt(ctx
->i32
, i
, 0));
3118 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3120 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3121 buffer_offset
, 0, ac_glc
, false);
3125 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3126 LLVMValueRef rel_patch_id
,
3127 LLVMValueRef invocation_id
,
3128 LLVMValueRef tcs_out_current_patch_data_offset
,
3129 LLVMValueRef invoc0_tf_outer
[4],
3130 LLVMValueRef invoc0_tf_inner
[2])
3132 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3133 struct si_shader
*shader
= ctx
->shader
;
3134 unsigned tess_inner_index
, tess_outer_index
;
3135 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3136 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3137 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3139 /* Add a barrier before loading tess factors from LDS. */
3140 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3141 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3143 /* Do this only for invocation 0, because the tess levels are per-patch,
3146 * This can't jump, because invocation 0 executes this. It should
3147 * at least mask out the loads and stores for other invocations.
3149 ac_build_ifcc(&ctx
->ac
,
3150 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3151 invocation_id
, ctx
->i32_0
, ""), 6503);
3153 /* Determine the layout of one tess factor element in the buffer. */
3154 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3155 case PIPE_PRIM_LINES
:
3156 stride
= 2; /* 2 dwords, 1 vec2 store */
3160 case PIPE_PRIM_TRIANGLES
:
3161 stride
= 4; /* 4 dwords, 1 vec4 store */
3165 case PIPE_PRIM_QUADS
:
3166 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3175 for (i
= 0; i
< 4; i
++) {
3176 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3177 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3180 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3181 /* Tess factors are in VGPRs. */
3182 for (i
= 0; i
< outer_comps
; i
++)
3183 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3184 for (i
= 0; i
< inner_comps
; i
++)
3185 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3187 /* Load tess_inner and tess_outer from LDS.
3188 * Any invocation can write them, so we can't get them from a temporary.
3190 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3191 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3193 lds_base
= tcs_out_current_patch_data_offset
;
3194 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3195 LLVMConstInt(ctx
->i32
,
3196 tess_inner_index
* 4, 0), "");
3197 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3198 LLVMConstInt(ctx
->i32
,
3199 tess_outer_index
* 4, 0), "");
3201 for (i
= 0; i
< outer_comps
; i
++) {
3203 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3205 for (i
= 0; i
< inner_comps
; i
++) {
3206 inner
[i
] = out
[outer_comps
+i
] =
3207 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3211 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3212 /* For isolines, the hardware expects tess factors in the
3213 * reverse order from what GLSL / TGSI specify.
3215 LLVMValueRef tmp
= out
[0];
3220 /* Convert the outputs to vectors for stores. */
3221 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3225 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3227 /* Get the buffer. */
3228 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3230 /* Get the offset. */
3231 tf_base
= LLVMGetParam(ctx
->main_fn
,
3232 ctx
->param_tcs_factor_offset
);
3233 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3234 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3236 ac_build_ifcc(&ctx
->ac
,
3237 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3238 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3240 /* Store the dynamic HS control word. */
3242 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3243 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3244 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3245 1, ctx
->i32_0
, tf_base
,
3246 offset
, ac_glc
, false);
3250 ac_build_endif(&ctx
->ac
, 6504);
3252 /* Store the tessellation factors. */
3253 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3254 MIN2(stride
, 4), byteoffset
, tf_base
,
3255 offset
, ac_glc
, false);
3258 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3259 stride
- 4, byteoffset
, tf_base
,
3260 offset
, ac_glc
, false);
3262 /* Store the tess factors into the offchip buffer if TES reads them. */
3263 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3264 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3265 LLVMValueRef tf_inner_offset
;
3266 unsigned param_outer
, param_inner
;
3268 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3269 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3271 param_outer
= si_shader_io_get_unique_index_patch(
3272 TGSI_SEMANTIC_TESSOUTER
, 0);
3273 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3274 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3276 unsigned outer_vec_size
=
3277 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3278 outer_comps
: util_next_power_of_two(outer_comps
);
3279 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3281 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3282 outer_comps
, tf_outer_offset
,
3283 base
, 0, ac_glc
, false);
3285 param_inner
= si_shader_io_get_unique_index_patch(
3286 TGSI_SEMANTIC_TESSINNER
, 0);
3287 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3288 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3290 inner_vec
= inner_comps
== 1 ? inner
[0] :
3291 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3292 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3293 inner_comps
, tf_inner_offset
,
3294 base
, 0, ac_glc
, false);
3298 ac_build_endif(&ctx
->ac
, 6503);
3302 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3303 unsigned param
, unsigned return_index
)
3305 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3306 LLVMGetParam(ctx
->main_fn
, param
),
3311 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3312 unsigned param
, unsigned return_index
)
3314 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3315 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3317 return LLVMBuildInsertValue(builder
, ret
,
3318 ac_to_float(&ctx
->ac
, p
),
3323 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3324 unsigned param
, unsigned return_index
)
3326 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3327 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3328 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3329 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3332 /* This only writes the tessellation factor levels. */
3333 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3334 unsigned max_outputs
,
3335 LLVMValueRef
*addrs
)
3337 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3338 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3339 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3340 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3342 si_copy_tcs_inputs(bld_base
);
3344 rel_patch_id
= get_rel_patch_id(ctx
);
3345 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3346 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3348 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3349 LLVMBasicBlockRef blocks
[2] = {
3350 LLVMGetInsertBlock(builder
),
3351 ctx
->merged_wrap_if_entry_block
3353 LLVMValueRef values
[2];
3355 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3357 values
[0] = rel_patch_id
;
3358 values
[1] = LLVMGetUndef(ctx
->i32
);
3359 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3361 values
[0] = tf_lds_offset
;
3362 values
[1] = LLVMGetUndef(ctx
->i32
);
3363 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3365 values
[0] = invocation_id
;
3366 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3367 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3370 /* Return epilog parameters from this function. */
3371 LLVMValueRef ret
= ctx
->return_value
;
3374 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3375 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3376 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3377 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3378 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3379 /* Tess offchip and tess factor offsets are at the beginning. */
3380 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3381 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3382 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3384 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3385 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3386 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3387 GFX6_SGPR_TCS_OUT_LAYOUT
);
3388 /* Tess offchip and tess factor offsets are after user SGPRs. */
3389 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3390 GFX6_TCS_NUM_USER_SGPR
);
3391 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3392 GFX6_TCS_NUM_USER_SGPR
+ 1);
3393 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3397 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3398 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3399 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3401 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3402 * the invocation_id output does not alias the tcs_rel_ids input,
3403 * which saves a V_MOV on gfx9.
3407 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3408 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3410 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3411 vgpr
++; /* skip the tess factor LDS offset */
3412 for (unsigned i
= 0; i
< 6; i
++) {
3413 LLVMValueRef value
=
3414 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3415 value
= ac_to_float(&ctx
->ac
, value
);
3416 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3419 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3421 ctx
->return_value
= ret
;
3424 /* Pass TCS inputs from LS to TCS on GFX9. */
3425 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3427 LLVMValueRef ret
= ctx
->return_value
;
3429 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3430 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3431 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3432 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3433 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3434 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3436 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3437 8 + SI_SGPR_RW_BUFFERS
);
3438 ret
= si_insert_input_ptr(ctx
, ret
,
3439 ctx
->param_bindless_samplers_and_images
,
3440 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3442 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3443 8 + SI_SGPR_VS_STATE_BITS
);
3445 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3446 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3447 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3448 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3449 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3450 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3452 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3453 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3454 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3456 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3457 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3459 ctx
->return_value
= ret
;
3462 /* Pass GS inputs from ES to GS on GFX9. */
3463 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3465 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3466 LLVMValueRef ret
= ctx
->return_value
;
3468 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3469 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3470 if (ctx
->shader
->key
.as_ngg
)
3471 ret
= LLVMBuildInsertValue(builder
, ret
, ctx
->gs_tg_info
, 2, "");
3473 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3474 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3475 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3477 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3478 8 + SI_SGPR_RW_BUFFERS
);
3479 ret
= si_insert_input_ptr(ctx
, ret
,
3480 ctx
->param_bindless_samplers_and_images
,
3481 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3482 if (ctx
->screen
->use_ngg
) {
3483 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
,
3484 8 + SI_SGPR_VS_STATE_BITS
);
3488 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3489 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3491 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3493 for (unsigned i
= 0; i
< 5; i
++) {
3494 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3495 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3497 ctx
->return_value
= ret
;
3500 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3501 unsigned max_outputs
,
3502 LLVMValueRef
*addrs
)
3504 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3505 struct si_shader
*shader
= ctx
->shader
;
3506 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3508 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3509 ctx
->param_rel_auto_id
);
3510 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3511 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3512 vertex_dw_stride
, "");
3514 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3515 * its inputs from it. */
3516 for (i
= 0; i
< info
->num_outputs
; i
++) {
3517 unsigned name
= info
->output_semantic_name
[i
];
3518 unsigned index
= info
->output_semantic_index
[i
];
3520 /* The ARB_shader_viewport_layer_array spec contains the
3523 * 2) What happens if gl_ViewportIndex or gl_Layer is
3524 * written in the vertex shader and a geometry shader is
3527 * RESOLVED: The value written by the last vertex processing
3528 * stage is used. If the last vertex processing stage
3529 * (vertex, tessellation evaluation or geometry) does not
3530 * statically assign to gl_ViewportIndex or gl_Layer, index
3531 * or layer zero is assumed.
3533 * So writes to those outputs in VS-as-LS are simply ignored.
3535 if (name
== TGSI_SEMANTIC_LAYER
||
3536 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3539 int param
= si_shader_io_get_unique_index(name
, index
, false);
3540 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3541 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3543 for (chan
= 0; chan
< 4; chan
++) {
3544 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3547 lshs_lds_store(ctx
, chan
, dw_addr
,
3548 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3552 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3553 si_set_ls_return_value_for_tcs(ctx
);
3556 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3557 unsigned max_outputs
,
3558 LLVMValueRef
*addrs
)
3560 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3561 struct si_shader
*es
= ctx
->shader
;
3562 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3563 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3564 ctx
->param_es2gs_offset
);
3565 LLVMValueRef lds_base
= NULL
;
3569 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3570 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3571 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3572 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3573 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3574 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3575 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3576 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3577 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3580 for (i
= 0; i
< info
->num_outputs
; i
++) {
3583 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3584 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3587 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3588 info
->output_semantic_index
[i
], false);
3590 for (chan
= 0; chan
< 4; chan
++) {
3591 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3594 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3595 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3597 /* GFX9 has the ESGS ring in LDS. */
3598 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3599 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3600 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3601 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3605 ac_build_buffer_store_dword(&ctx
->ac
,
3607 out_val
, 1, NULL
, soffset
,
3608 (4 * param
+ chan
) * 4,
3609 ac_glc
| ac_slc
, true);
3613 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3614 si_set_es_return_value_for_gs(ctx
);
3617 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3619 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3620 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3622 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3625 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3627 if (ctx
->shader
->key
.as_ngg
) {
3628 gfx10_ngg_gs_emit_epilogue(ctx
);
3632 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3633 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3635 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3636 si_get_gs_wave_id(ctx
));
3638 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3639 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3642 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3643 unsigned max_outputs
,
3644 LLVMValueRef
*addrs
)
3646 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3647 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3649 assert(info
->num_outputs
<= max_outputs
);
3651 emit_gs_epilogue(ctx
);
3654 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3656 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3657 emit_gs_epilogue(ctx
);
3660 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3661 unsigned max_outputs
,
3662 LLVMValueRef
*addrs
)
3664 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3665 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3666 struct si_shader_output_values
*outputs
= NULL
;
3669 assert(!ctx
->shader
->is_gs_copy_shader
);
3670 assert(info
->num_outputs
<= max_outputs
);
3672 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3674 for (i
= 0; i
< info
->num_outputs
; i
++) {
3675 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3676 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3678 for (j
= 0; j
< 4; j
++) {
3679 outputs
[i
].values
[j
] =
3680 LLVMBuildLoad(ctx
->ac
.builder
,
3683 outputs
[i
].vertex_stream
[j
] =
3684 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3688 if (!ctx
->screen
->use_ngg_streamout
&&
3689 ctx
->shader
->selector
->so
.num_outputs
)
3690 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3692 /* Export PrimitiveID. */
3693 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3694 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3695 outputs
[i
].semantic_index
= 0;
3696 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3697 for (j
= 1; j
< 4; j
++)
3698 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3700 memset(outputs
[i
].vertex_stream
, 0,
3701 sizeof(outputs
[i
].vertex_stream
));
3705 si_llvm_export_vs(ctx
, outputs
, i
);
3709 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3710 unsigned max_outputs
,
3711 LLVMValueRef
*addrs
)
3713 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3714 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3715 LLVMValueRef pos
[4] = {};
3717 assert(info
->num_outputs
<= max_outputs
);
3719 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3720 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3723 for (unsigned chan
= 0; chan
< 4; chan
++)
3724 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3727 assert(pos
[0] != NULL
);
3729 /* Return the position output. */
3730 LLVMValueRef ret
= ctx
->return_value
;
3731 for (unsigned chan
= 0; chan
< 4; chan
++)
3732 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3733 ctx
->return_value
= ret
;
3736 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3738 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3740 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3741 &ctx
->outputs
[0][0]);
3744 struct si_ps_exports
{
3746 struct ac_export_args args
[10];
3749 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3750 LLVMValueRef depth
, LLVMValueRef stencil
,
3751 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3753 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3754 struct ac_export_args args
;
3756 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3758 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3761 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3762 LLVMValueRef
*color
, unsigned index
,
3763 unsigned samplemask_param
,
3764 bool is_last
, struct si_ps_exports
*exp
)
3766 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3770 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3771 for (i
= 0; i
< 4; i
++)
3772 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3775 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3776 color
[3] = ctx
->ac
.f32_1
;
3780 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3781 si_alpha_test(bld_base
, color
[3]);
3783 /* Line & polygon smoothing */
3784 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3785 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3788 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3789 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3790 struct ac_export_args args
[8];
3793 /* Get the export arguments, also find out what the last one is. */
3794 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3795 si_llvm_init_export_args(ctx
, color
,
3796 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3797 if (args
[c
].enabled_channels
)
3801 /* Emit all exports. */
3802 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3803 if (is_last
&& last
== c
) {
3804 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3805 args
[c
].done
= 1; /* DONE bit */
3806 } else if (!args
[c
].enabled_channels
)
3807 continue; /* unnecessary NULL export */
3809 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3812 struct ac_export_args args
;
3815 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3818 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3819 args
.done
= 1; /* DONE bit */
3820 } else if (!args
.enabled_channels
)
3821 return; /* unnecessary NULL export */
3823 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3827 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3828 struct si_ps_exports
*exp
)
3830 for (unsigned i
= 0; i
< exp
->num
; i
++)
3831 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3835 * Return PS outputs in this order:
3837 * v[0:3] = color0.xyzw
3838 * v[4:7] = color1.xyzw
3843 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3845 * The alpha-ref SGPR is returned via its original location.
3847 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3848 unsigned max_outputs
,
3849 LLVMValueRef
*addrs
)
3851 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3852 struct si_shader
*shader
= ctx
->shader
;
3853 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3854 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3855 unsigned i
, j
, first_vgpr
, vgpr
;
3857 LLVMValueRef color
[8][4] = {};
3858 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3861 if (ctx
->postponed_kill
)
3862 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3864 /* Read the output values. */
3865 for (i
= 0; i
< info
->num_outputs
; i
++) {
3866 unsigned semantic_name
= info
->output_semantic_name
[i
];
3867 unsigned semantic_index
= info
->output_semantic_index
[i
];
3869 switch (semantic_name
) {
3870 case TGSI_SEMANTIC_COLOR
:
3871 assert(semantic_index
< 8);
3872 for (j
= 0; j
< 4; j
++) {
3873 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3874 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3875 color
[semantic_index
][j
] = result
;
3878 case TGSI_SEMANTIC_POSITION
:
3879 depth
= LLVMBuildLoad(builder
,
3880 addrs
[4 * i
+ 2], "");
3882 case TGSI_SEMANTIC_STENCIL
:
3883 stencil
= LLVMBuildLoad(builder
,
3884 addrs
[4 * i
+ 1], "");
3886 case TGSI_SEMANTIC_SAMPLEMASK
:
3887 samplemask
= LLVMBuildLoad(builder
,
3888 addrs
[4 * i
+ 0], "");
3891 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3896 /* Fill the return structure. */
3897 ret
= ctx
->return_value
;
3900 ret
= LLVMBuildInsertValue(builder
, ret
,
3901 ac_to_integer(&ctx
->ac
,
3902 LLVMGetParam(ctx
->main_fn
,
3903 SI_PARAM_ALPHA_REF
)),
3904 SI_SGPR_ALPHA_REF
, "");
3907 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3908 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3912 for (j
= 0; j
< 4; j
++)
3913 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3916 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3918 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3920 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3922 /* Add the input sample mask for smoothing at the end. */
3923 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3924 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3925 ret
= LLVMBuildInsertValue(builder
, ret
,
3926 LLVMGetParam(ctx
->main_fn
,
3927 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3929 ctx
->return_value
= ret
;
3932 static void membar_emit(
3933 const struct lp_build_tgsi_action
*action
,
3934 struct lp_build_tgsi_context
*bld_base
,
3935 struct lp_build_emit_data
*emit_data
)
3937 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3938 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3939 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3940 unsigned wait_flags
= 0;
3942 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3943 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3945 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3946 TGSI_MEMBAR_SHADER_BUFFER
|
3947 TGSI_MEMBAR_SHADER_IMAGE
))
3948 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3950 if (flags
& TGSI_MEMBAR_SHARED
)
3951 wait_flags
|= AC_WAIT_LGKM
;
3953 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3956 static void clock_emit(
3957 const struct lp_build_tgsi_action
*action
,
3958 struct lp_build_tgsi_context
*bld_base
,
3959 struct lp_build_emit_data
*emit_data
)
3961 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3962 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3964 emit_data
->output
[0] =
3965 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3966 emit_data
->output
[1] =
3967 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3970 static void si_llvm_emit_ddxy(
3971 const struct lp_build_tgsi_action
*action
,
3972 struct lp_build_tgsi_context
*bld_base
,
3973 struct lp_build_emit_data
*emit_data
)
3975 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3976 unsigned opcode
= emit_data
->info
->opcode
;
3981 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3982 mask
= AC_TID_MASK_LEFT
;
3983 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3984 mask
= AC_TID_MASK_TOP
;
3986 mask
= AC_TID_MASK_TOP_LEFT
;
3988 /* for DDX we want to next X pixel, DDY next Y pixel. */
3989 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3991 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3992 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3993 emit_data
->output
[emit_data
->chan
] = val
;
3996 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3997 struct lp_build_tgsi_context
*bld_base
,
3998 struct lp_build_emit_data
*emit_data
)
4000 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4001 struct si_shader
*shader
= ctx
->shader
;
4002 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
4003 LLVMValueRef interp_param
;
4004 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
4005 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
4006 int input_base
, input_array_size
;
4009 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
4010 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
4011 int interp_param_idx
;
4015 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4016 /* offset is in second src, first two channels */
4017 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4019 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4021 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4022 LLVMValueRef sample_position
;
4023 LLVMValueRef sample_id
;
4024 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4026 /* fetch sample ID, then fetch its sample position,
4027 * and place into first two channels.
4029 sample_id
= lp_build_emit_fetch(bld_base
,
4030 emit_data
->inst
, 1, TGSI_CHAN_X
);
4031 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4033 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4034 * Language 4.50 spec says about interpolateAtSample:
4036 * "Returns the value of the input interpolant variable at
4037 * the location of sample number sample. If multisample
4038 * buffers are not available, the input variable will be
4039 * evaluated at the center of the pixel. If sample sample
4040 * does not exist, the position used to interpolate the
4041 * input variable is undefined."
4043 * This means that sample_id values outside of the valid are
4044 * in fact valid input, and the usual mechanism for loading the
4045 * sample position doesn't work.
4047 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4048 LLVMValueRef center
[4] = {
4049 LLVMConstReal(ctx
->f32
, 0.5),
4050 LLVMConstReal(ctx
->f32
, 0.5),
4055 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4057 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4060 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4063 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4064 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4066 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4069 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4071 if (input
->Register
.Indirect
) {
4072 unsigned array_id
= input
->Indirect
.ArrayID
;
4075 input_base
= info
->input_array_first
[array_id
];
4076 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4078 input_base
= inst
->Src
[0].Register
.Index
;
4079 input_array_size
= info
->num_inputs
- input_base
;
4082 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4083 1, input
->Register
.Index
- input_base
);
4085 input_base
= inst
->Src
[0].Register
.Index
;
4086 input_array_size
= 1;
4087 array_idx
= ctx
->i32_0
;
4090 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4092 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4093 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4094 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4096 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4098 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4099 if (interp_param_idx
== -1)
4101 else if (interp_param_idx
)
4102 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4104 interp_param
= NULL
;
4106 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4107 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4108 LLVMValueRef ij_out
[2];
4109 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4112 * take the I then J parameters, and the DDX/Y for it, and
4113 * calculate the IJ inputs for the interpolator.
4114 * temp1 = ddx * offset/sample.x + I;
4115 * interp_param.I = ddy * offset/sample.y + temp1;
4116 * temp1 = ddx * offset/sample.x + J;
4117 * interp_param.J = ddy * offset/sample.y + temp1;
4119 for (i
= 0; i
< 2; i
++) {
4120 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4121 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4122 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4123 ddxy_out
, ix_ll
, "");
4124 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4125 ddxy_out
, iy_ll
, "");
4126 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4127 interp_param
, ix_ll
, "");
4130 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4132 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4133 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4135 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4139 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4141 for (chan
= 0; chan
< 4; chan
++) {
4142 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4143 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4145 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4146 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4149 i
= LLVMBuildExtractElement(
4150 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4151 j
= LLVMBuildExtractElement(
4152 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4154 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4157 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4158 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4161 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4162 ctx
->ac
.builder
, gather
, array_idx
, "");
4166 static void vote_all_emit(
4167 const struct lp_build_tgsi_action
*action
,
4168 struct lp_build_tgsi_context
*bld_base
,
4169 struct lp_build_emit_data
*emit_data
)
4171 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4173 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4174 emit_data
->output
[emit_data
->chan
] =
4175 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4178 static void vote_any_emit(
4179 const struct lp_build_tgsi_action
*action
,
4180 struct lp_build_tgsi_context
*bld_base
,
4181 struct lp_build_emit_data
*emit_data
)
4183 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4185 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4186 emit_data
->output
[emit_data
->chan
] =
4187 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4190 static void vote_eq_emit(
4191 const struct lp_build_tgsi_action
*action
,
4192 struct lp_build_tgsi_context
*bld_base
,
4193 struct lp_build_emit_data
*emit_data
)
4195 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4197 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4198 emit_data
->output
[emit_data
->chan
] =
4199 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4202 static void ballot_emit(
4203 const struct lp_build_tgsi_action
*action
,
4204 struct lp_build_tgsi_context
*bld_base
,
4205 struct lp_build_emit_data
*emit_data
)
4207 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4208 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4211 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4212 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4214 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4216 if (ctx
->ac
.wave_size
== 32) {
4217 emit_data
->output
[1] = ctx
->i32_0
;
4219 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4220 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4224 static void read_lane_emit(
4225 const struct lp_build_tgsi_action
*action
,
4226 struct lp_build_tgsi_context
*bld_base
,
4227 struct lp_build_emit_data
*emit_data
)
4229 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4231 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4232 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4233 0, emit_data
->src_chan
);
4235 /* Always read the source invocation (= lane) from the X channel. */
4236 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4238 emit_data
->arg_count
= 2;
4241 /* We currently have no other way to prevent LLVM from lifting the icmp
4242 * calls to a dominating basic block.
4244 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4246 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4247 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4249 emit_data
->output
[emit_data
->chan
] =
4250 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4251 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4252 AC_FUNC_ATTR_READNONE
|
4253 AC_FUNC_ATTR_CONVERGENT
);
4256 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4257 struct lp_build_emit_data
*emit_data
)
4259 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4260 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4264 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4266 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4267 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4271 /* Emit one vertex from the geometry shader */
4272 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4274 LLVMValueRef
*addrs
)
4276 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4278 if (ctx
->shader
->key
.as_ngg
) {
4279 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4283 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4284 struct si_shader
*shader
= ctx
->shader
;
4285 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4286 ctx
->param_gs2vs_offset
);
4287 LLVMValueRef gs_next_vertex
;
4288 LLVMValueRef can_emit
;
4289 unsigned chan
, offset
;
4292 /* Write vertex attribute values to GSVS ring */
4293 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4294 ctx
->gs_next_vertex
[stream
],
4297 /* If this thread has already emitted the declared maximum number of
4298 * vertices, skip the write: excessive vertex emissions are not
4299 * supposed to have any effect.
4301 * If the shader has no writes to memory, kill it instead. This skips
4302 * further memory loads and may allow LLVM to skip to the end
4305 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4306 LLVMConstInt(ctx
->i32
,
4307 shader
->selector
->gs_max_out_vertices
, 0), "");
4309 bool use_kill
= !info
->writes_memory
;
4311 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4313 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4317 for (i
= 0; i
< info
->num_outputs
; i
++) {
4318 for (chan
= 0; chan
< 4; chan
++) {
4319 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4320 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4323 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4324 LLVMValueRef voffset
=
4325 LLVMConstInt(ctx
->i32
, offset
*
4326 shader
->selector
->gs_max_out_vertices
, 0);
4329 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4330 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4331 LLVMConstInt(ctx
->i32
, 4, 0), "");
4333 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4335 ac_build_buffer_store_dword(&ctx
->ac
,
4336 ctx
->gsvs_ring
[stream
],
4338 voffset
, soffset
, 0,
4339 ac_glc
| ac_slc
, true);
4343 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4344 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4346 /* Signal vertex emission if vertex data was written. */
4348 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4349 si_get_gs_wave_id(ctx
));
4353 ac_build_endif(&ctx
->ac
, 6505);
4356 /* Emit one vertex from the geometry shader */
4357 static void si_tgsi_emit_vertex(
4358 const struct lp_build_tgsi_action
*action
,
4359 struct lp_build_tgsi_context
*bld_base
,
4360 struct lp_build_emit_data
*emit_data
)
4362 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4363 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4365 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4368 /* Cut one primitive from the geometry shader */
4369 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4372 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4374 if (ctx
->shader
->key
.as_ngg
) {
4375 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4379 /* Signal primitive cut */
4380 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4381 si_get_gs_wave_id(ctx
));
4384 /* Cut one primitive from the geometry shader */
4385 static void si_tgsi_emit_primitive(
4386 const struct lp_build_tgsi_action
*action
,
4387 struct lp_build_tgsi_context
*bld_base
,
4388 struct lp_build_emit_data
*emit_data
)
4390 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4392 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4395 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4396 struct lp_build_tgsi_context
*bld_base
,
4397 struct lp_build_emit_data
*emit_data
)
4399 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4401 /* GFX6 only (thanks to a hw bug workaround):
4402 * The real barrier instruction isn’t needed, because an entire patch
4403 * always fits into a single wave.
4405 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4406 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4407 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4411 ac_build_s_barrier(&ctx
->ac
);
4414 void si_create_function(struct si_shader_context
*ctx
,
4416 LLVMTypeRef
*returns
, unsigned num_returns
,
4417 struct si_function_info
*fninfo
,
4418 unsigned max_workgroup_size
)
4422 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4423 fninfo
->types
, fninfo
->num_params
);
4424 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4426 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4427 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4429 /* The combination of:
4433 * allows the optimization passes to move loads and reduces
4434 * SGPR spilling significantly.
4436 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4437 AC_FUNC_ATTR_INREG
);
4439 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4440 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4441 AC_FUNC_ATTR_NOALIAS
);
4442 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4446 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4447 if (fninfo
->assign
[i
])
4448 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4451 if (ctx
->screen
->info
.address32_hi
) {
4452 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4453 "amdgpu-32bit-address-high-bits",
4454 ctx
->screen
->info
.address32_hi
);
4457 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4459 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4460 "no-signed-zeros-fp-math",
4463 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4464 /* These were copied from some LLVM test. */
4465 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4466 "less-precise-fpmad",
4468 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4471 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4474 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4480 static void declare_streamout_params(struct si_shader_context
*ctx
,
4481 struct pipe_stream_output_info
*so
,
4482 struct si_function_info
*fninfo
)
4484 if (ctx
->screen
->use_ngg_streamout
)
4487 /* Streamout SGPRs. */
4488 if (so
->num_outputs
) {
4489 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4490 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4492 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4494 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4496 /* A streamout buffer offset is loaded if the stride is non-zero. */
4497 for (int i
= 0; i
< 4; i
++) {
4501 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4505 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4507 switch (shader
->selector
->type
) {
4508 case PIPE_SHADER_VERTEX
:
4509 case PIPE_SHADER_TESS_EVAL
:
4510 return shader
->key
.as_ngg
? 128 : 0;
4512 case PIPE_SHADER_TESS_CTRL
:
4513 /* Return this so that LLVM doesn't remove s_barrier
4514 * instructions on chips where we use s_barrier. */
4515 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4517 case PIPE_SHADER_GEOMETRY
:
4518 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4520 case PIPE_SHADER_COMPUTE
:
4521 break; /* see below */
4527 const unsigned *properties
= shader
->selector
->info
.properties
;
4528 unsigned max_work_group_size
=
4529 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4530 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4531 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4533 if (!max_work_group_size
) {
4534 /* This is a variable group size compute shader,
4535 * compile it for the maximum possible group size.
4537 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4539 return max_work_group_size
;
4542 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4543 struct si_function_info
*fninfo
,
4546 LLVMTypeRef const_shader_buf_type
;
4548 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4549 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4550 const_shader_buf_type
= ctx
->f32
;
4552 const_shader_buf_type
= ctx
->v4i32
;
4554 unsigned const_and_shader_buffers
=
4555 add_arg(fninfo
, ARG_SGPR
,
4556 ac_array_in_const32_addr_space(const_shader_buf_type
));
4559 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4562 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4563 struct si_function_info
*fninfo
,
4566 unsigned samplers_and_images
=
4567 add_arg(fninfo
, ARG_SGPR
,
4568 ac_array_in_const32_addr_space(ctx
->v8i32
));
4571 ctx
->param_samplers_and_images
= samplers_and_images
;
4574 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4575 struct si_function_info
*fninfo
,
4578 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4579 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4582 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4583 struct si_function_info
*fninfo
)
4585 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4586 ac_array_in_const32_addr_space(ctx
->v4i32
));
4587 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4588 ac_array_in_const32_addr_space(ctx
->v8i32
));
4591 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4592 struct si_function_info
*fninfo
)
4594 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4595 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4596 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4597 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4600 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4601 struct si_function_info
*fninfo
,
4602 unsigned *num_prolog_vgprs
)
4604 struct si_shader
*shader
= ctx
->shader
;
4606 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4607 if (shader
->key
.as_ls
) {
4608 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4609 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4610 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user VGPR */
4611 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4613 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4614 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4616 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4617 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr */
4618 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr or PrimID (legacy) */
4619 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4621 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4622 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4623 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4626 if (!shader
->is_gs_copy_shader
) {
4627 /* Vertex load indices. */
4628 ctx
->param_vertex_index0
= fninfo
->num_params
;
4629 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4630 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4631 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4635 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4636 struct si_function_info
*fninfo
,
4637 unsigned vs_blit_property
)
4639 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4640 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4641 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4642 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4644 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4645 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4646 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4647 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4648 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4649 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4650 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4651 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4652 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4653 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4654 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4655 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4659 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4660 struct si_function_info
*fninfo
)
4662 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4663 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4664 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4665 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4669 /* Convenient merged shader definitions. */
4670 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4671 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4674 static void create_function(struct si_shader_context
*ctx
)
4676 struct si_shader
*shader
= ctx
->shader
;
4677 struct si_function_info fninfo
;
4678 LLVMTypeRef returns
[16+32*4];
4679 unsigned i
, num_return_sgprs
;
4680 unsigned num_returns
= 0;
4681 unsigned num_prolog_vgprs
= 0;
4682 unsigned type
= ctx
->type
;
4683 unsigned vs_blit_property
=
4684 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4686 si_init_function_info(&fninfo
);
4688 /* Set MERGED shaders. */
4689 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4690 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4691 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4692 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4693 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4696 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4699 case PIPE_SHADER_VERTEX
:
4700 declare_global_desc_pointers(ctx
, &fninfo
);
4702 if (vs_blit_property
) {
4703 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4706 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4710 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4711 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4712 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4713 ac_array_in_const32_addr_space(ctx
->v4i32
));
4715 if (shader
->key
.as_es
) {
4716 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4717 } else if (shader
->key
.as_ls
) {
4718 /* no extra parameters */
4720 if (shader
->is_gs_copy_shader
) {
4721 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4722 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4725 /* The locations of the other parameters are assigned dynamically. */
4726 declare_streamout_params(ctx
, &shader
->selector
->so
,
4731 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4734 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4735 for (i
= 0; i
< 4; i
++)
4736 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4740 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4741 declare_global_desc_pointers(ctx
, &fninfo
);
4742 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4743 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4744 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4745 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4746 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4747 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4748 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4751 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4752 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4754 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4755 * placed after the user SGPRs.
4757 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4758 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4759 for (i
= 0; i
< 11; i
++)
4760 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4763 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4764 /* Merged stages have 8 system SGPRs at the beginning. */
4765 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4766 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4767 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4768 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4769 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4770 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4771 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4772 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4773 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4775 declare_global_desc_pointers(ctx
, &fninfo
);
4776 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4777 ctx
->type
== PIPE_SHADER_VERTEX
);
4778 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4780 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4781 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4782 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4783 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4784 ac_array_in_const32_addr_space(ctx
->v4i32
));
4786 /* VGPRs (first TCS, then VS) */
4787 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4788 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4790 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4791 declare_vs_input_vgprs(ctx
, &fninfo
,
4794 /* LS return values are inputs to the TCS main shader part. */
4795 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4796 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4797 for (i
= 0; i
< 2; i
++)
4798 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4800 /* TCS return values are inputs to the TCS epilog.
4802 * param_tcs_offchip_offset, param_tcs_factor_offset,
4803 * param_tcs_offchip_layout, and param_rw_buffers
4804 * should be passed to the epilog.
4806 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4807 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4808 for (i
= 0; i
< 11; i
++)
4809 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4813 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4814 /* Merged stages have 8 system SGPRs at the beginning. */
4815 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4816 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4817 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4819 if (ctx
->shader
->key
.as_ngg
)
4820 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->gs_tg_info
);
4822 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4824 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4825 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4826 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4827 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4828 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4830 declare_global_desc_pointers(ctx
, &fninfo
);
4831 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4832 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4833 (ctx
->type
== PIPE_SHADER_VERTEX
||
4834 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4837 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4838 if (vs_blit_property
)
4839 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4841 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4843 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4844 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4845 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4846 /* Declare as many input SGPRs as the VS has. */
4849 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4850 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4851 ac_array_in_const32_addr_space(ctx
->v4i32
));
4854 /* VGPRs (first GS, then VS/TES) */
4855 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4856 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4857 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4858 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4859 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4861 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4862 declare_vs_input_vgprs(ctx
, &fninfo
,
4864 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4865 declare_tes_input_vgprs(ctx
, &fninfo
);
4868 if (ctx
->shader
->key
.as_es
&&
4869 (ctx
->type
== PIPE_SHADER_VERTEX
||
4870 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4871 unsigned num_user_sgprs
;
4873 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4874 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4876 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4878 /* ES return values are inputs to GS. */
4879 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4880 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4881 for (i
= 0; i
< 5; i
++)
4882 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4886 case PIPE_SHADER_TESS_EVAL
:
4887 declare_global_desc_pointers(ctx
, &fninfo
);
4888 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4889 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4890 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4891 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4893 if (shader
->key
.as_es
) {
4894 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4895 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4896 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4898 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4899 declare_streamout_params(ctx
, &shader
->selector
->so
,
4901 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4905 declare_tes_input_vgprs(ctx
, &fninfo
);
4908 case PIPE_SHADER_GEOMETRY
:
4909 declare_global_desc_pointers(ctx
, &fninfo
);
4910 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4911 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4912 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4915 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4916 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4917 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4918 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4919 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4920 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4921 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4922 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4925 case PIPE_SHADER_FRAGMENT
:
4926 declare_global_desc_pointers(ctx
, &fninfo
);
4927 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4928 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4929 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4930 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4932 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4933 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4934 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4935 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4936 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4937 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4938 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4939 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4940 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4941 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4942 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4943 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4944 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4945 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4946 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4947 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4948 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4949 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4950 shader
->info
.face_vgpr_index
= 20;
4951 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4952 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4953 shader
->info
.ancillary_vgpr_index
= 21;
4954 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4955 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4956 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4958 /* Color inputs from the prolog. */
4959 if (shader
->selector
->info
.colors_read
) {
4960 unsigned num_color_elements
=
4961 util_bitcount(shader
->selector
->info
.colors_read
);
4963 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4964 for (i
= 0; i
< num_color_elements
; i
++)
4965 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4967 num_prolog_vgprs
+= num_color_elements
;
4970 /* Outputs for the epilog. */
4971 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4974 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4975 shader
->selector
->info
.writes_z
+
4976 shader
->selector
->info
.writes_stencil
+
4977 shader
->selector
->info
.writes_samplemask
+
4978 1 /* SampleMaskIn */;
4980 num_returns
= MAX2(num_returns
,
4982 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4984 for (i
= 0; i
< num_return_sgprs
; i
++)
4985 returns
[i
] = ctx
->i32
;
4986 for (; i
< num_returns
; i
++)
4987 returns
[i
] = ctx
->f32
;
4990 case PIPE_SHADER_COMPUTE
:
4991 declare_global_desc_pointers(ctx
, &fninfo
);
4992 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4993 if (shader
->selector
->info
.uses_grid_size
)
4994 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4995 if (shader
->selector
->info
.uses_block_size
&&
4996 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4997 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4999 unsigned cs_user_data_dwords
=
5000 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
5001 if (cs_user_data_dwords
) {
5002 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
5003 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
5006 for (i
= 0; i
< 3; i
++) {
5007 ctx
->abi
.workgroup_ids
[i
] = NULL
;
5008 if (shader
->selector
->info
.uses_block_id
[i
])
5009 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
5012 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
5015 assert(0 && "unimplemented shader");
5019 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
5020 si_get_max_workgroup_size(shader
));
5022 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5023 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
5024 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
5025 "InitialPSInputAddr",
5026 S_0286D0_PERSP_SAMPLE_ENA(1) |
5027 S_0286D0_PERSP_CENTER_ENA(1) |
5028 S_0286D0_PERSP_CENTROID_ENA(1) |
5029 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5030 S_0286D0_LINEAR_CENTER_ENA(1) |
5031 S_0286D0_LINEAR_CENTROID_ENA(1) |
5032 S_0286D0_FRONT_FACE_ENA(1) |
5033 S_0286D0_ANCILLARY_ENA(1) |
5034 S_0286D0_POS_FIXED_PT_ENA(1));
5037 shader
->info
.num_input_sgprs
= 0;
5038 shader
->info
.num_input_vgprs
= 0;
5040 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5041 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5043 for (; i
< fninfo
.num_params
; ++i
)
5044 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5046 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5047 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5049 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5050 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5051 /* The LSHS size is not known until draw time, so we append it
5052 * at the end of whatever LDS use there may be in the rest of
5053 * the shader (currently none, unless LLVM decides to do its
5054 * own LDS-based lowering).
5056 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
5057 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5058 "__lds_end", AC_ADDR_SPACE_LDS
);
5059 LLVMSetAlignment(ctx
->ac
.lds
, 256);
5061 ac_declare_lds_as_pointer(&ctx
->ac
);
5066 /* Ensure that the esgs ring is declared.
5068 * We declare it with 64KB alignment as a hint that the
5069 * pointer value will always be 0.
5071 static void declare_esgs_ring(struct si_shader_context
*ctx
)
5076 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
5078 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
5079 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5082 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
5083 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
5087 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5090 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5092 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5094 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5095 ctx
->param_rw_buffers
);
5097 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5098 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5100 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5102 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5105 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5107 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5108 /* Declare the ESGS ring as an explicit LDS symbol. */
5109 declare_esgs_ring(ctx
);
5111 ac_declare_lds_as_pointer(&ctx
->ac
);
5112 ctx
->esgs_ring
= ctx
->ac
.lds
;
5117 if (ctx
->shader
->is_gs_copy_shader
) {
5118 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5121 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5122 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5123 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5124 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5125 LLVMValueRef base_ring
;
5127 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5129 /* The conceptual layout of the GSVS ring is
5130 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5131 * but the real memory layout is swizzled across
5133 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5135 * Override the buffer descriptor accordingly.
5137 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5138 uint64_t stream_offset
= 0;
5140 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5141 unsigned num_components
;
5143 unsigned num_records
;
5144 LLVMValueRef ring
, tmp
;
5146 num_components
= sel
->info
.num_stream_output_components
[stream
];
5147 if (!num_components
)
5150 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5152 /* Limit on the stride field for <= GFX7. */
5153 assert(stride
< (1 << 14));
5155 num_records
= ctx
->ac
.wave_size
;
5157 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5158 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5159 tmp
= LLVMBuildAdd(builder
, tmp
,
5160 LLVMConstInt(ctx
->i64
,
5161 stream_offset
, 0), "");
5162 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5164 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5165 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5166 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5167 tmp
= LLVMBuildOr(builder
, tmp
,
5168 LLVMConstInt(ctx
->i32
,
5169 S_008F04_STRIDE(stride
) |
5170 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5171 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5172 ring
= LLVMBuildInsertElement(builder
, ring
,
5173 LLVMConstInt(ctx
->i32
, num_records
, 0),
5174 LLVMConstInt(ctx
->i32
, 2, 0), "");
5177 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5178 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5179 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5180 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5181 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5182 S_008F0C_ADD_TID_ENABLE(1);
5184 if (ctx
->ac
.chip_class
>= GFX10
) {
5185 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5186 S_008F0C_OOB_SELECT(2) |
5187 S_008F0C_RESOURCE_LEVEL(1);
5189 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5190 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5191 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5194 ring
= LLVMBuildInsertElement(builder
, ring
,
5195 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5196 LLVMConstInt(ctx
->i32
, 3, 0), "");
5198 ctx
->gsvs_ring
[stream
] = ring
;
5200 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5201 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5205 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5206 LLVMValueRef param_rw_buffers
,
5207 unsigned param_pos_fixed_pt
)
5209 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5210 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5212 /* Use the fixed-point gl_FragCoord input.
5213 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5214 * per coordinate to get the repeating effect.
5216 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5217 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5219 /* Load the buffer descriptor. */
5220 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5221 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5223 /* The stipple pattern is 32x32, each row has 32 bits. */
5224 offset
= LLVMBuildMul(builder
, address
[1],
5225 LLVMConstInt(ctx
->i32
, 4, 0), "");
5226 row
= buffer_load_const(ctx
, desc
, offset
);
5227 row
= ac_to_integer(&ctx
->ac
, row
);
5228 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5229 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5230 ac_build_kill_if_false(&ctx
->ac
, bit
);
5233 /* For the UMR disassembler. */
5234 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5235 #define DEBUGGER_NUM_MARKERS 5
5237 static bool si_shader_binary_open(struct si_screen
*screen
,
5238 struct si_shader
*shader
,
5239 struct ac_rtld_binary
*rtld
)
5241 const struct si_shader_selector
*sel
= shader
->selector
;
5242 const char *part_elfs
[5];
5243 size_t part_sizes
[5];
5244 unsigned num_parts
= 0;
5246 #define add_part(shader_or_part) \
5247 if (shader_or_part) { \
5248 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5249 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5253 add_part(shader
->prolog
);
5254 add_part(shader
->previous_stage
);
5255 add_part(shader
->prolog2
);
5257 add_part(shader
->epilog
);
5261 struct ac_rtld_symbol lds_symbols
[2];
5262 unsigned num_lds_symbols
= 0;
5264 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5265 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5266 /* We add this symbol even on LLVM <= 8 to ensure that
5267 * shader->config.lds_size is set correctly below.
5269 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5270 sym
->name
= "esgs_ring";
5271 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5272 sym
->align
= 64 * 1024;
5275 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5276 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5277 sym
->name
= "ngg_emit";
5278 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5282 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5283 .info
= &screen
->info
,
5285 .halt_at_entry
= screen
->options
.halt_shaders
,
5287 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5288 .wave_size
= si_get_shader_wave_size(shader
),
5289 .num_parts
= num_parts
,
5290 .elf_ptrs
= part_elfs
,
5291 .elf_sizes
= part_sizes
,
5292 .num_shared_lds_symbols
= num_lds_symbols
,
5293 .shared_lds_symbols
= lds_symbols
});
5295 if (rtld
->lds_size
> 0) {
5296 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5297 shader
->config
.lds_size
=
5298 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5304 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5306 struct ac_rtld_binary rtld
;
5307 si_shader_binary_open(screen
, shader
, &rtld
);
5308 return rtld
.rx_size
;
5311 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5313 uint64_t *scratch_va
= data
;
5315 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5316 *value
= (uint32_t)*scratch_va
;
5319 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5320 /* Enable scratch coalescing. */
5321 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5322 S_008F04_SWIZZLE_ENABLE(1);
5323 if (HAVE_LLVM
< 0x0800) {
5324 /* Old LLVM created an R_ABS32_HI relocation for
5334 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5335 uint64_t scratch_va
)
5337 struct ac_rtld_binary binary
;
5338 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5341 si_resource_reference(&shader
->bo
, NULL
);
5342 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5343 sscreen
->cpdma_prefetch_writes_memory
?
5344 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5345 PIPE_USAGE_IMMUTABLE
,
5346 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5352 struct ac_rtld_upload_info u
= {};
5354 u
.get_external_symbol
= si_get_external_symbol
;
5355 u
.cb_data
= &scratch_va
;
5356 u
.rx_va
= shader
->bo
->gpu_address
;
5357 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5358 PIPE_TRANSFER_READ_WRITE
|
5359 PIPE_TRANSFER_UNSYNCHRONIZED
|
5360 RADEON_TRANSFER_TEMPORARY
);
5364 bool ok
= ac_rtld_upload(&u
);
5366 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5367 ac_rtld_close(&binary
);
5372 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5373 const struct si_shader_binary
*binary
,
5374 enum pipe_shader_type shader_type
,
5376 struct pipe_debug_callback
*debug
,
5377 const char *name
, FILE *file
)
5379 struct ac_rtld_binary rtld_binary
;
5381 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5382 .info
= &screen
->info
,
5383 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5384 .wave_size
= wave_size
,
5386 .elf_ptrs
= &binary
->elf_buffer
,
5387 .elf_sizes
= &binary
->elf_size
}))
5393 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5396 if (nbytes
> INT_MAX
)
5399 if (debug
&& debug
->debug_message
) {
5400 /* Very long debug messages are cut off, so send the
5401 * disassembly one line at a time. This causes more
5402 * overhead, but on the plus side it simplifies
5403 * parsing of resulting logs.
5405 pipe_debug_message(debug
, SHADER_INFO
,
5406 "Shader Disassembly Begin");
5409 while (line
< nbytes
) {
5410 int count
= nbytes
- line
;
5411 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5413 count
= nl
- (disasm
+ line
);
5416 pipe_debug_message(debug
, SHADER_INFO
,
5417 "%.*s", count
, disasm
+ line
);
5423 pipe_debug_message(debug
, SHADER_INFO
,
5424 "Shader Disassembly End");
5428 fprintf(file
, "Shader %s disassembly:\n", name
);
5429 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5433 ac_rtld_close(&rtld_binary
);
5436 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5438 struct si_screen
*sscreen
= shader
->selector
->screen
;
5439 struct ac_shader_config
*conf
= &shader
->config
;
5440 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5441 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5442 unsigned lds_per_wave
= 0;
5443 unsigned max_simd_waves
;
5445 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5447 /* Compute LDS usage for PS. */
5448 switch (shader
->selector
->type
) {
5449 case PIPE_SHADER_FRAGMENT
:
5450 /* The minimum usage per wave is (num_inputs * 48). The maximum
5451 * usage is (num_inputs * 48 * 16).
5452 * We can get anything in between and it varies between waves.
5454 * The 48 bytes per input for a single primitive is equal to
5455 * 4 bytes/component * 4 components/input * 3 points.
5457 * Other stages don't know the size at compile time or don't
5458 * allocate LDS per wave, but instead they do it per thread group.
5460 lds_per_wave
= conf
->lds_size
* lds_increment
+
5461 align(num_inputs
* 48, lds_increment
);
5463 case PIPE_SHADER_COMPUTE
:
5464 if (shader
->selector
) {
5465 unsigned max_workgroup_size
=
5466 si_get_max_workgroup_size(shader
);
5467 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5468 DIV_ROUND_UP(max_workgroup_size
,
5469 sscreen
->compute_wave_size
);
5475 /* Compute the per-SIMD wave counts. */
5476 if (conf
->num_sgprs
) {
5478 MIN2(max_simd_waves
,
5479 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5482 if (conf
->num_vgprs
)
5483 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5485 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5486 * 16KB makes some SIMDs unoccupied). */
5488 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5490 shader
->info
.max_simd_waves
= max_simd_waves
;
5493 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5494 struct si_shader
*shader
,
5495 struct pipe_debug_callback
*debug
)
5497 const struct ac_shader_config
*conf
= &shader
->config
;
5499 if (screen
->options
.debug_disassembly
)
5500 si_shader_dump_disassembly(screen
, &shader
->binary
,
5501 shader
->selector
->type
,
5502 si_get_shader_wave_size(shader
),
5503 debug
, "main", NULL
);
5505 pipe_debug_message(debug
, SHADER_INFO
,
5506 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5507 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5508 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5509 conf
->num_sgprs
, conf
->num_vgprs
,
5510 si_get_shader_binary_size(screen
, shader
),
5511 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5512 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5513 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5516 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5517 struct si_shader
*shader
,
5519 bool check_debug_option
)
5521 const struct ac_shader_config
*conf
= &shader
->config
;
5523 if (!check_debug_option
||
5524 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5525 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5526 fprintf(file
, "*** SHADER CONFIG ***\n"
5527 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5528 "SPI_PS_INPUT_ENA = 0x%04x\n",
5529 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5532 fprintf(file
, "*** SHADER STATS ***\n"
5535 "Spilled SGPRs: %d\n"
5536 "Spilled VGPRs: %d\n"
5537 "Private memory VGPRs: %d\n"
5538 "Code Size: %d bytes\n"
5540 "Scratch: %d bytes per wave\n"
5542 "********************\n\n\n",
5543 conf
->num_sgprs
, conf
->num_vgprs
,
5544 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5545 shader
->info
.private_mem_vgprs
,
5546 si_get_shader_binary_size(sscreen
, shader
),
5547 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5548 shader
->info
.max_simd_waves
);
5552 const char *si_get_shader_name(const struct si_shader
*shader
)
5554 switch (shader
->selector
->type
) {
5555 case PIPE_SHADER_VERTEX
:
5556 if (shader
->key
.as_es
)
5557 return "Vertex Shader as ES";
5558 else if (shader
->key
.as_ls
)
5559 return "Vertex Shader as LS";
5560 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5561 return "Vertex Shader as Primitive Discard CS";
5562 else if (shader
->key
.as_ngg
)
5563 return "Vertex Shader as ESGS";
5565 return "Vertex Shader as VS";
5566 case PIPE_SHADER_TESS_CTRL
:
5567 return "Tessellation Control Shader";
5568 case PIPE_SHADER_TESS_EVAL
:
5569 if (shader
->key
.as_es
)
5570 return "Tessellation Evaluation Shader as ES";
5571 else if (shader
->key
.as_ngg
)
5572 return "Tessellation Evaluation Shader as ESGS";
5574 return "Tessellation Evaluation Shader as VS";
5575 case PIPE_SHADER_GEOMETRY
:
5576 if (shader
->is_gs_copy_shader
)
5577 return "GS Copy Shader as VS";
5579 return "Geometry Shader";
5580 case PIPE_SHADER_FRAGMENT
:
5581 return "Pixel Shader";
5582 case PIPE_SHADER_COMPUTE
:
5583 return "Compute Shader";
5585 return "Unknown Shader";
5589 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5590 struct pipe_debug_callback
*debug
,
5591 FILE *file
, bool check_debug_option
)
5593 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5595 if (!check_debug_option
||
5596 si_can_dump_shader(sscreen
, shader_type
))
5597 si_dump_shader_key(shader
, file
);
5599 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5600 if (shader
->previous_stage
&&
5601 shader
->previous_stage
->binary
.llvm_ir_string
) {
5602 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5603 si_get_shader_name(shader
));
5604 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5607 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5608 si_get_shader_name(shader
));
5609 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5612 if (!check_debug_option
||
5613 (si_can_dump_shader(sscreen
, shader_type
) &&
5614 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5615 unsigned wave_size
= si_get_shader_wave_size(shader
);
5617 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5620 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5621 shader_type
, wave_size
, debug
, "prolog", file
);
5622 if (shader
->previous_stage
)
5623 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5624 shader_type
, wave_size
, debug
, "previous stage", file
);
5625 if (shader
->prolog2
)
5626 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5627 shader_type
, wave_size
, debug
, "prolog2", file
);
5629 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5630 wave_size
, debug
, "main", file
);
5633 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5634 shader_type
, wave_size
, debug
, "epilog", file
);
5635 fprintf(file
, "\n");
5638 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5641 static int si_compile_llvm(struct si_screen
*sscreen
,
5642 struct si_shader_binary
*binary
,
5643 struct ac_shader_config
*conf
,
5644 struct ac_llvm_compiler
*compiler
,
5646 struct pipe_debug_callback
*debug
,
5647 enum pipe_shader_type shader_type
,
5650 bool less_optimized
)
5652 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5654 if (si_can_dump_shader(sscreen
, shader_type
)) {
5655 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5657 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5658 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5659 ac_dump_module(mod
);
5660 fprintf(stderr
, "\n");
5664 if (sscreen
->record_llvm_ir
) {
5665 char *ir
= LLVMPrintModuleToString(mod
);
5666 binary
->llvm_ir_string
= strdup(ir
);
5667 LLVMDisposeMessage(ir
);
5670 if (!si_replace_shader(count
, binary
)) {
5671 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5672 less_optimized
, wave_size
);
5677 struct ac_rtld_binary rtld
;
5678 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5679 .info
= &sscreen
->info
,
5680 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5681 .wave_size
= wave_size
,
5683 .elf_ptrs
= &binary
->elf_buffer
,
5684 .elf_sizes
= &binary
->elf_size
}))
5687 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5688 ac_rtld_close(&rtld
);
5692 /* Enable 64-bit and 16-bit denormals, because there is no performance
5695 * If denormals are enabled, all floating-point output modifiers are
5698 * Don't enable denormals for 32-bit floats, because:
5699 * - Floating-point output modifiers would be ignored by the hw.
5700 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5701 * have to stop using those.
5702 * - GFX6 & GFX7 would be very slow.
5704 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5709 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5711 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5712 LLVMBuildRetVoid(ctx
->ac
.builder
);
5714 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5717 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5719 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5720 struct ac_llvm_compiler
*compiler
,
5721 struct si_shader_selector
*gs_selector
,
5722 struct pipe_debug_callback
*debug
)
5724 struct si_shader_context ctx
;
5725 struct si_shader
*shader
;
5726 LLVMBuilderRef builder
;
5727 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5728 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5732 shader
= CALLOC_STRUCT(si_shader
);
5736 /* We can leave the fence as permanently signaled because the GS copy
5737 * shader only becomes visible globally after it has been compiled. */
5738 util_queue_fence_init(&shader
->ready
);
5740 shader
->selector
= gs_selector
;
5741 shader
->is_gs_copy_shader
= true;
5743 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5744 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false));
5745 ctx
.shader
= shader
;
5746 ctx
.type
= PIPE_SHADER_VERTEX
;
5748 builder
= ctx
.ac
.builder
;
5750 create_function(&ctx
);
5751 preload_ring_buffers(&ctx
);
5753 LLVMValueRef voffset
=
5754 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5755 LLVMConstInt(ctx
.i32
, 4, 0), "");
5757 /* Fetch the vertex stream ID.*/
5758 LLVMValueRef stream_id
;
5760 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5761 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5763 stream_id
= ctx
.i32_0
;
5765 /* Fill in output information. */
5766 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5767 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5768 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5770 for (int chan
= 0; chan
< 4; chan
++) {
5771 outputs
[i
].vertex_stream
[chan
] =
5772 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5776 LLVMBasicBlockRef end_bb
;
5777 LLVMValueRef switch_inst
;
5779 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5780 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5782 for (int stream
= 0; stream
< 4; stream
++) {
5783 LLVMBasicBlockRef bb
;
5786 if (!gsinfo
->num_stream_output_components
[stream
])
5789 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5792 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5793 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5794 LLVMPositionBuilderAtEnd(builder
, bb
);
5796 /* Fetch vertex data from GSVS ring */
5798 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5799 for (unsigned chan
= 0; chan
< 4; chan
++) {
5800 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5801 outputs
[i
].vertex_stream
[chan
] != stream
) {
5802 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5806 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5807 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5810 outputs
[i
].values
[chan
] =
5811 ac_build_buffer_load(&ctx
.ac
,
5812 ctx
.gsvs_ring
[0], 1,
5814 soffset
, 0, ac_glc
| ac_slc
,
5819 /* Streamout and exports. */
5820 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5821 si_llvm_emit_streamout(&ctx
, outputs
,
5822 gsinfo
->num_outputs
,
5827 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5829 LLVMBuildBr(builder
, end_bb
);
5832 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5834 LLVMBuildRetVoid(ctx
.ac
.builder
);
5836 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5837 si_llvm_optimize_module(&ctx
);
5840 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5841 &ctx
.shader
->config
, ctx
.compiler
,
5843 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5844 "GS Copy Shader", false) == 0) {
5845 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5846 fprintf(stderr
, "GS Copy Shader:\n");
5847 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5849 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5850 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5855 si_llvm_dispose(&ctx
);
5861 si_fix_resource_usage(sscreen
, shader
);
5866 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5867 const struct si_vs_prolog_bits
*prolog
,
5868 const char *prefix
, FILE *f
)
5870 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5871 prefix
, prolog
->instance_divisor_is_one
);
5872 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5873 prefix
, prolog
->instance_divisor_is_fetched
);
5874 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5875 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5876 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5877 prefix
, prolog
->ls_vgpr_fix
);
5879 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5880 fprintf(f
, " mono.vs.fix_fetch = {");
5881 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5882 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5888 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5889 fix
.u
.num_channels_m1
, fix
.u
.format
);
5894 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5896 const struct si_shader_key
*key
= &shader
->key
;
5897 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5899 fprintf(f
, "SHADER KEY\n");
5901 switch (shader_type
) {
5902 case PIPE_SHADER_VERTEX
:
5903 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5904 "part.vs.prolog", f
);
5905 fprintf(f
, " as_es = %u\n", key
->as_es
);
5906 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5907 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5908 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5909 key
->mono
.u
.vs_export_prim_id
);
5910 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5911 key
->opt
.vs_as_prim_discard_cs
);
5912 fprintf(f
, " opt.cs_prim_type = %s\n",
5913 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5914 fprintf(f
, " opt.cs_indexed = %u\n",
5915 key
->opt
.cs_indexed
);
5916 fprintf(f
, " opt.cs_instancing = %u\n",
5917 key
->opt
.cs_instancing
);
5918 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5919 key
->opt
.cs_primitive_restart
);
5920 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5921 key
->opt
.cs_provoking_vertex_first
);
5922 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5923 key
->opt
.cs_need_correct_orientation
);
5924 fprintf(f
, " opt.cs_cull_front = %u\n",
5925 key
->opt
.cs_cull_front
);
5926 fprintf(f
, " opt.cs_cull_back = %u\n",
5927 key
->opt
.cs_cull_back
);
5928 fprintf(f
, " opt.cs_cull_z = %u\n",
5929 key
->opt
.cs_cull_z
);
5930 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5931 key
->opt
.cs_halfz_clip_space
);
5934 case PIPE_SHADER_TESS_CTRL
:
5935 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5936 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5937 "part.tcs.ls_prolog", f
);
5939 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5940 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5943 case PIPE_SHADER_TESS_EVAL
:
5944 fprintf(f
, " as_es = %u\n", key
->as_es
);
5945 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5946 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5947 key
->mono
.u
.vs_export_prim_id
);
5950 case PIPE_SHADER_GEOMETRY
:
5951 if (shader
->is_gs_copy_shader
)
5954 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5955 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5956 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5957 "part.gs.vs_prolog", f
);
5959 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5960 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5961 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5964 case PIPE_SHADER_COMPUTE
:
5967 case PIPE_SHADER_FRAGMENT
:
5968 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5969 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5970 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5971 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5972 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5973 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5974 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5975 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5976 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5977 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5978 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5979 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5980 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5981 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5982 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5983 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5984 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5985 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5986 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5987 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5988 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5989 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5996 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5997 shader_type
== PIPE_SHADER_TESS_EVAL
||
5998 shader_type
== PIPE_SHADER_VERTEX
) &&
5999 !key
->as_es
&& !key
->as_ls
) {
6000 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
6001 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
6005 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
6006 struct si_screen
*sscreen
,
6007 struct ac_llvm_compiler
*compiler
,
6010 struct lp_build_tgsi_context
*bld_base
;
6012 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
);
6014 bld_base
= &ctx
->bld_base
;
6015 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
6017 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
6018 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
6019 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
6021 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
6023 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
6025 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
6026 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
6027 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
6028 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6030 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
6031 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
6032 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
6033 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
6034 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
6035 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
6036 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
6037 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
6039 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
6040 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
6041 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6044 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
6046 struct si_shader
*shader
= ctx
->shader
;
6047 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6049 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
6050 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
6051 shader
->key
.as_ls
||
6055 ac_optimize_vs_outputs(&ctx
->ac
,
6057 shader
->info
.vs_output_param_offset
,
6059 &shader
->info
.nr_param_exports
);
6062 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6063 unsigned param
, unsigned bitoffset
)
6065 LLVMValueRef args
[] = {
6066 LLVMGetParam(ctx
->main_fn
, param
),
6067 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6069 ac_build_intrinsic(&ctx
->ac
,
6070 "llvm.amdgcn.init.exec.from.input",
6071 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
6074 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6075 const struct si_vs_prolog_bits
*key
)
6077 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6079 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6082 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
6084 struct si_shader
*shader
= ctx
->shader
;
6085 struct si_shader_selector
*sel
= shader
->selector
;
6086 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6088 // TODO clean all this up!
6089 switch (ctx
->type
) {
6090 case PIPE_SHADER_VERTEX
:
6091 ctx
->load_input
= declare_input_vs
;
6092 if (shader
->key
.as_ls
)
6093 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6094 else if (shader
->key
.as_es
)
6095 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6096 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6097 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6098 else if (shader
->key
.as_ngg
)
6099 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6101 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6102 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6103 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6105 case PIPE_SHADER_TESS_CTRL
:
6106 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6107 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6108 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6109 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6110 bld_base
->emit_store
= store_output_tcs
;
6111 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6112 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6113 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6114 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6116 case PIPE_SHADER_TESS_EVAL
:
6117 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6118 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6119 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6120 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6121 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6122 if (shader
->key
.as_es
)
6123 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6124 else if (shader
->key
.as_ngg
)
6125 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6127 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6128 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6130 case PIPE_SHADER_GEOMETRY
:
6131 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6132 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6133 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6134 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6135 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6136 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6138 case PIPE_SHADER_FRAGMENT
:
6139 ctx
->load_input
= declare_input_fs
;
6140 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6141 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6142 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6143 ctx
->abi
.load_sample_position
= load_sample_position
;
6144 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6145 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6146 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6148 case PIPE_SHADER_COMPUTE
:
6149 ctx
->abi
.load_local_group_size
= get_block_size
;
6152 assert(!"Unsupported shader type");
6156 ctx
->abi
.load_ubo
= load_ubo
;
6157 ctx
->abi
.load_ssbo
= load_ssbo
;
6159 create_function(ctx
);
6160 preload_ring_buffers(ctx
);
6162 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6163 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6164 for (unsigned i
= 0; i
< 6; i
++) {
6165 ctx
->invoc0_tess_factors
[i
] =
6166 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6170 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6171 for (unsigned i
= 0; i
< 4; i
++) {
6172 ctx
->gs_next_vertex
[i
] =
6173 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6175 if (shader
->key
.as_ngg
) {
6176 for (unsigned i
= 0; i
< 4; ++i
) {
6177 ctx
->gs_curprim_verts
[i
] =
6178 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6179 ctx
->gs_generated_prims
[i
] =
6180 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6183 unsigned scratch_size
= 8;
6184 if (sel
->so
.num_outputs
)
6187 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6188 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6189 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6190 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6191 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6193 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6194 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6195 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6196 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6200 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6201 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6202 /* Unconditionally declare scratch space base for streamout and
6203 * vertex compaction. Whether space is actually allocated is
6204 * determined during linking / PM4 creation.
6206 * Add an extra dword per vertex to ensure an odd stride, which
6207 * avoids bank conflicts for SoA accesses.
6209 declare_esgs_ring(ctx
);
6211 /* This is really only needed when streamout and / or vertex
6212 * compaction is enabled.
6214 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6215 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6216 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6217 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6218 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6221 /* For GFX9 merged shaders:
6222 * - Set EXEC for the first shader. If the prolog is present, set
6223 * EXEC there instead.
6224 * - Add a barrier before the second shader.
6225 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6226 * an if-statement. This is required for correctness in geometry
6227 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6230 * For monolithic merged shaders, the first shader is wrapped in an
6231 * if-block together with its prolog in si_build_wrapper_function.
6233 * NGG vertex and tess eval shaders running as the last
6234 * vertex/geometry stage handle execution explicitly using
6237 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6238 if (!shader
->is_monolithic
&&
6239 sel
->info
.num_instructions
> 1 && /* not empty shader */
6240 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6241 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6242 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6243 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6244 si_init_exec_from_input(ctx
,
6245 ctx
->param_merged_wave_info
, 0);
6246 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6247 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6248 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6249 LLVMValueRef num_threads
;
6250 bool nested_barrier
;
6252 if (!shader
->is_monolithic
||
6253 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6254 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6255 ac_init_exec_full_mask(&ctx
->ac
);
6257 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6258 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6259 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6260 gfx10_ngg_gs_emit_prologue(ctx
);
6261 nested_barrier
= false;
6263 nested_barrier
= true;
6266 /* Number of patches / primitives */
6267 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6269 /* Number of vertices */
6270 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 0, 8);
6271 nested_barrier
= false;
6275 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6276 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6278 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6279 ctx
->merged_wrap_if_label
= 11500;
6280 ac_build_ifcc(&ctx
->ac
, ena
, ctx
->merged_wrap_if_label
);
6282 if (nested_barrier
) {
6283 /* Execute a barrier before the second shader in
6286 * Execute the barrier inside the conditional block,
6287 * so that empty waves can jump directly to s_endpgm,
6288 * which will also signal the barrier.
6290 * This is possible in gfx9, because an empty wave
6291 * for the second shader does not participate in
6292 * the epilogue. With NGG, empty waves may still
6293 * be required to export data (e.g. GS output vertices),
6294 * so we cannot let them exit early.
6296 * If the shader is TCS and the TCS epilog is present
6297 * and contains a barrier, it will wait there and then
6300 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6305 if (sel
->force_correct_derivs_after_kill
) {
6306 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6307 /* true = don't kill. */
6308 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6309 ctx
->postponed_kill
);
6313 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6314 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6318 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6319 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6324 si_llvm_build_ret(ctx
, ctx
->return_value
);
6329 * Compute the VS prolog key, which contains all the information needed to
6330 * build the VS prolog function, and set shader->info bits where needed.
6332 * \param info Shader info of the vertex shader.
6333 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6334 * \param prolog_key Key of the VS prolog
6335 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6336 * \param key Output shader part key.
6338 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6339 unsigned num_input_sgprs
,
6340 const struct si_vs_prolog_bits
*prolog_key
,
6341 struct si_shader
*shader_out
,
6342 union si_shader_part_key
*key
)
6344 memset(key
, 0, sizeof(*key
));
6345 key
->vs_prolog
.states
= *prolog_key
;
6346 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6347 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6348 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6349 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6350 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6352 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6353 key
->vs_prolog
.as_ls
= 1;
6354 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6355 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6356 key
->vs_prolog
.as_es
= 1;
6357 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6358 } else if (shader_out
->key
.as_ngg
) {
6359 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6362 /* Enable loading the InstanceID VGPR. */
6363 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6365 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6366 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6367 shader_out
->info
.uses_instanceid
= true;
6371 * Compute the PS prolog key, which contains all the information needed to
6372 * build the PS prolog function, and set related bits in shader->config.
6374 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6375 union si_shader_part_key
*key
,
6376 bool separate_prolog
)
6378 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6380 memset(key
, 0, sizeof(*key
));
6381 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6382 key
->ps_prolog
.colors_read
= info
->colors_read
;
6383 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6384 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6385 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6386 (key
->ps_prolog
.colors_read
||
6387 key
->ps_prolog
.states
.force_persp_sample_interp
||
6388 key
->ps_prolog
.states
.force_linear_sample_interp
||
6389 key
->ps_prolog
.states
.force_persp_center_interp
||
6390 key
->ps_prolog
.states
.force_linear_center_interp
||
6391 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6392 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6393 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6395 if (info
->colors_read
) {
6396 unsigned *color
= shader
->selector
->color_attr_index
;
6398 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6399 /* BCOLORs are stored after the last input. */
6400 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6401 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6402 if (separate_prolog
)
6403 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6406 for (unsigned i
= 0; i
< 2; i
++) {
6407 unsigned interp
= info
->input_interpolate
[color
[i
]];
6408 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6410 if (!(info
->colors_read
& (0xf << i
*4)))
6413 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6415 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6416 interp
== TGSI_INTERPOLATE_COLOR
)
6417 interp
= TGSI_INTERPOLATE_CONSTANT
;
6420 case TGSI_INTERPOLATE_CONSTANT
:
6421 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6423 case TGSI_INTERPOLATE_PERSPECTIVE
:
6424 case TGSI_INTERPOLATE_COLOR
:
6425 /* Force the interpolation location for colors here. */
6426 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6427 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6428 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6429 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6432 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6433 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6434 if (separate_prolog
) {
6435 shader
->config
.spi_ps_input_ena
|=
6436 S_0286CC_PERSP_SAMPLE_ENA(1);
6439 case TGSI_INTERPOLATE_LOC_CENTER
:
6440 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6441 if (separate_prolog
) {
6442 shader
->config
.spi_ps_input_ena
|=
6443 S_0286CC_PERSP_CENTER_ENA(1);
6446 case TGSI_INTERPOLATE_LOC_CENTROID
:
6447 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6448 if (separate_prolog
) {
6449 shader
->config
.spi_ps_input_ena
|=
6450 S_0286CC_PERSP_CENTROID_ENA(1);
6457 case TGSI_INTERPOLATE_LINEAR
:
6458 /* Force the interpolation location for colors here. */
6459 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6460 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6461 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6462 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6464 /* The VGPR assignment for non-monolithic shaders
6465 * works because InitialPSInputAddr is set on the
6466 * main shader and PERSP_PULL_MODEL is never used.
6469 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6470 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6471 separate_prolog
? 6 : 9;
6472 if (separate_prolog
) {
6473 shader
->config
.spi_ps_input_ena
|=
6474 S_0286CC_LINEAR_SAMPLE_ENA(1);
6477 case TGSI_INTERPOLATE_LOC_CENTER
:
6478 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6479 separate_prolog
? 8 : 11;
6480 if (separate_prolog
) {
6481 shader
->config
.spi_ps_input_ena
|=
6482 S_0286CC_LINEAR_CENTER_ENA(1);
6485 case TGSI_INTERPOLATE_LOC_CENTROID
:
6486 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6487 separate_prolog
? 10 : 13;
6488 if (separate_prolog
) {
6489 shader
->config
.spi_ps_input_ena
|=
6490 S_0286CC_LINEAR_CENTROID_ENA(1);
6505 * Check whether a PS prolog is required based on the key.
6507 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6509 return key
->ps_prolog
.colors_read
||
6510 key
->ps_prolog
.states
.force_persp_sample_interp
||
6511 key
->ps_prolog
.states
.force_linear_sample_interp
||
6512 key
->ps_prolog
.states
.force_persp_center_interp
||
6513 key
->ps_prolog
.states
.force_linear_center_interp
||
6514 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6515 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6516 key
->ps_prolog
.states
.poly_stipple
||
6517 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6521 * Compute the PS epilog key, which contains all the information needed to
6522 * build the PS epilog function.
6524 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6525 union si_shader_part_key
*key
)
6527 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6528 memset(key
, 0, sizeof(*key
));
6529 key
->ps_epilog
.colors_written
= info
->colors_written
;
6530 key
->ps_epilog
.writes_z
= info
->writes_z
;
6531 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6532 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6533 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6537 * Build the GS prolog function. Rotate the input vertices for triangle strips
6540 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6541 union si_shader_part_key
*key
)
6543 unsigned num_sgprs
, num_vgprs
;
6544 struct si_function_info fninfo
;
6545 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6546 LLVMTypeRef returns
[48];
6547 LLVMValueRef func
, ret
;
6549 si_init_function_info(&fninfo
);
6551 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6552 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6553 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6555 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6556 num_vgprs
= 5; /* ES inputs are not needed by GS */
6558 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6562 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6563 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6564 returns
[i
] = ctx
->i32
;
6567 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6568 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6569 returns
[num_sgprs
+ i
] = ctx
->f32
;
6572 /* Create the function. */
6573 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6575 func
= ctx
->main_fn
;
6577 /* Set the full EXEC mask for the prolog, because we are only fiddling
6578 * with registers here. The main shader part will set the correct EXEC
6581 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6582 ac_init_exec_full_mask(&ctx
->ac
);
6584 /* Copy inputs to outputs. This should be no-op, as the registers match,
6585 * but it will prevent the compiler from overwriting them unintentionally.
6587 ret
= ctx
->return_value
;
6588 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6589 LLVMValueRef p
= LLVMGetParam(func
, i
);
6590 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6592 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6593 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6594 p
= ac_to_float(&ctx
->ac
, p
);
6595 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6598 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6599 /* Remap the input vertices for every other primitive. */
6600 const unsigned gfx6_vtx_params
[6] = {
6608 const unsigned gfx9_vtx_params
[3] = {
6613 LLVMValueRef vtx_in
[6], vtx_out
[6];
6614 LLVMValueRef prim_id
, rotate
;
6616 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6617 for (unsigned i
= 0; i
< 3; i
++) {
6618 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6619 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6622 for (unsigned i
= 0; i
< 6; i
++)
6623 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6626 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6627 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6629 for (unsigned i
= 0; i
< 6; ++i
) {
6630 LLVMValueRef base
, rotated
;
6632 rotated
= vtx_in
[(i
+ 4) % 6];
6633 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6636 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6637 for (unsigned i
= 0; i
< 3; i
++) {
6638 LLVMValueRef hi
, out
;
6640 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6641 LLVMConstInt(ctx
->i32
, 16, 0), "");
6642 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6643 out
= ac_to_float(&ctx
->ac
, out
);
6644 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6645 gfx9_vtx_params
[i
], "");
6648 for (unsigned i
= 0; i
< 6; i
++) {
6651 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6652 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6653 gfx6_vtx_params
[i
], "");
6658 LLVMBuildRet(builder
, ret
);
6662 * Given a list of shader part functions, build a wrapper function that
6663 * runs them in sequence to form a monolithic shader.
6665 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6666 LLVMValueRef
*parts
,
6669 unsigned next_shader_first_part
)
6671 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6672 /* PS epilog has one arg per color component; gfx9 merged shader
6673 * prologs need to forward 32 user SGPRs.
6675 struct si_function_info fninfo
;
6676 LLVMValueRef initial
[64], out
[64];
6677 LLVMTypeRef function_type
;
6678 unsigned num_first_params
;
6679 unsigned num_out
, initial_num_out
;
6680 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6681 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6682 unsigned num_sgprs
, num_vgprs
;
6685 si_init_function_info(&fninfo
);
6687 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6688 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6689 AC_FUNC_ATTR_ALWAYSINLINE
);
6690 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6693 /* The parameters of the wrapper function correspond to those of the
6694 * first part in terms of SGPRs and VGPRs, but we use the types of the
6695 * main part to get the right types. This is relevant for the
6696 * dereferenceable attribute on descriptor table pointers.
6701 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6702 num_first_params
= LLVMCountParamTypes(function_type
);
6704 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6705 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6707 if (ac_is_sgpr_param(param
)) {
6708 assert(num_vgprs
== 0);
6709 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6711 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6716 while (gprs
< num_sgprs
+ num_vgprs
) {
6717 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6718 LLVMTypeRef type
= LLVMTypeOf(param
);
6719 unsigned size
= ac_get_type_size(type
) / 4;
6721 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6723 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6724 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6725 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6730 /* Prepare the return type. */
6731 unsigned num_returns
= 0;
6732 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6734 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6735 return_type
= LLVMGetReturnType(last_func_type
);
6737 switch (LLVMGetTypeKind(return_type
)) {
6738 case LLVMStructTypeKind
:
6739 num_returns
= LLVMCountStructElementTypes(return_type
);
6740 assert(num_returns
<= ARRAY_SIZE(returns
));
6741 LLVMGetStructElementTypes(return_type
, returns
);
6743 case LLVMVoidTypeKind
:
6746 unreachable("unexpected type");
6749 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6750 si_get_max_workgroup_size(ctx
->shader
));
6752 if (is_merged_shader(ctx
))
6753 ac_init_exec_full_mask(&ctx
->ac
);
6755 /* Record the arguments of the function as if they were an output of
6761 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6762 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6763 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6764 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6765 unsigned size
= ac_get_type_size(param_type
) / 4;
6768 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6769 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6770 param_type
= ctx
->i32
;
6773 if (param_type
!= out_type
)
6774 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6775 out
[num_out
++] = param
;
6777 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6779 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6780 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6781 param_type
= ctx
->i64
;
6784 if (param_type
!= vector_type
)
6785 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6787 for (unsigned j
= 0; j
< size
; ++j
)
6788 out
[num_out
++] = LLVMBuildExtractElement(
6789 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6792 if (i
< fninfo
.num_sgpr_params
)
6793 num_out_sgpr
= num_out
;
6796 memcpy(initial
, out
, sizeof(out
));
6797 initial_num_out
= num_out
;
6798 initial_num_out_sgpr
= num_out_sgpr
;
6800 /* Now chain the parts. */
6801 LLVMValueRef ret
= NULL
;
6802 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6803 LLVMValueRef in
[48];
6804 LLVMTypeRef ret_type
;
6805 unsigned out_idx
= 0;
6806 unsigned num_params
= LLVMCountParams(parts
[part
]);
6808 /* Merged shaders are executed conditionally depending
6809 * on the number of enabled threads passed in the input SGPRs. */
6810 if (is_multi_part_shader(ctx
) && part
== 0) {
6811 LLVMValueRef ena
, count
= initial
[3];
6813 count
= LLVMBuildAnd(builder
, count
,
6814 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6815 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6816 ac_get_thread_id(&ctx
->ac
), count
, "");
6817 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6820 /* Derive arguments for the next part from outputs of the
6823 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6825 LLVMTypeRef param_type
;
6827 unsigned param_size
;
6828 LLVMValueRef arg
= NULL
;
6830 param
= LLVMGetParam(parts
[part
], param_idx
);
6831 param_type
= LLVMTypeOf(param
);
6832 param_size
= ac_get_type_size(param_type
) / 4;
6833 is_sgpr
= ac_is_sgpr_param(param
);
6836 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6837 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6838 } else if (out_idx
< num_out_sgpr
) {
6839 /* Skip returned SGPRs the current part doesn't
6840 * declare on the input. */
6841 out_idx
= num_out_sgpr
;
6844 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6846 if (param_size
== 1)
6849 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6851 if (LLVMTypeOf(arg
) != param_type
) {
6852 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6853 if (LLVMGetPointerAddressSpace(param_type
) ==
6854 AC_ADDR_SPACE_CONST_32BIT
) {
6855 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6856 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6858 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6859 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6862 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6866 in
[param_idx
] = arg
;
6867 out_idx
+= param_size
;
6870 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6872 if (is_multi_part_shader(ctx
) &&
6873 part
+ 1 == next_shader_first_part
) {
6874 ac_build_endif(&ctx
->ac
, 6506);
6876 /* The second half of the merged shader should use
6877 * the inputs from the toplevel (wrapper) function,
6878 * not the return value from the last call.
6880 * That's because the last call was executed condi-
6881 * tionally, so we can't consume it in the main
6884 memcpy(out
, initial
, sizeof(initial
));
6885 num_out
= initial_num_out
;
6886 num_out_sgpr
= initial_num_out_sgpr
;
6890 /* Extract the returned GPRs. */
6891 ret_type
= LLVMTypeOf(ret
);
6895 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6896 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6898 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6900 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6902 LLVMBuildExtractValue(builder
, ret
, i
, "");
6904 assert(num_out
< ARRAY_SIZE(out
));
6905 out
[num_out
++] = val
;
6907 if (LLVMTypeOf(val
) == ctx
->i32
) {
6908 assert(num_out_sgpr
+ 1 == num_out
);
6909 num_out_sgpr
= num_out
;
6915 /* Return the value from the last part. */
6916 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6917 LLVMBuildRetVoid(builder
);
6919 LLVMBuildRet(builder
, ret
);
6922 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6923 struct si_shader_selector
*sel
)
6925 if (!compiler
->low_opt_passes
)
6928 /* Assume a slow CPU. */
6929 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6930 sel
->screen
->info
.chip_class
<= GFX8
);
6932 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6934 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6935 sel
->info
.num_memory_instructions
> 1000;
6938 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6939 struct ac_llvm_compiler
*compiler
,
6940 struct si_shader
*shader
,
6941 struct pipe_debug_callback
*debug
)
6943 struct si_shader_selector
*sel
= shader
->selector
;
6944 struct si_shader_context ctx
;
6947 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6948 * conversion fails. */
6949 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6950 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6952 tgsi_dump(sel
->tokens
, 0);
6954 nir_print_shader(sel
->nir
, stderr
);
6955 si_dump_streamout(&sel
->so
);
6958 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
));
6959 si_llvm_context_set_tgsi(&ctx
, shader
);
6961 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6962 sizeof(shader
->info
.vs_output_param_offset
));
6964 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6966 if (!si_compile_tgsi_main(&ctx
)) {
6967 si_llvm_dispose(&ctx
);
6971 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6972 LLVMValueRef parts
[2];
6973 bool need_prolog
= sel
->vs_needs_prolog
;
6975 parts
[1] = ctx
.main_fn
;
6978 union si_shader_part_key prolog_key
;
6979 si_get_vs_prolog_key(&sel
->info
,
6980 shader
->info
.num_input_sgprs
,
6981 &shader
->key
.part
.vs
.prolog
,
6982 shader
, &prolog_key
);
6983 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6984 parts
[0] = ctx
.main_fn
;
6987 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6988 1 + need_prolog
, need_prolog
, 0);
6990 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6991 si_build_prim_discard_compute_shader(&ctx
);
6992 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6993 if (sscreen
->info
.chip_class
>= GFX9
) {
6994 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6995 LLVMValueRef parts
[4];
6996 bool vs_needs_prolog
=
6997 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
7000 parts
[2] = ctx
.main_fn
;
7003 union si_shader_part_key tcs_epilog_key
;
7004 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
7005 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7006 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
7007 parts
[3] = ctx
.main_fn
;
7009 /* VS as LS main part */
7010 struct si_shader shader_ls
= {};
7011 shader_ls
.selector
= ls
;
7012 shader_ls
.key
.as_ls
= 1;
7013 shader_ls
.key
.mono
= shader
->key
.mono
;
7014 shader_ls
.key
.opt
= shader
->key
.opt
;
7015 shader_ls
.is_monolithic
= true;
7016 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
7018 if (!si_compile_tgsi_main(&ctx
)) {
7019 si_llvm_dispose(&ctx
);
7022 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
7023 parts
[1] = ctx
.main_fn
;
7026 if (vs_needs_prolog
) {
7027 union si_shader_part_key vs_prolog_key
;
7028 si_get_vs_prolog_key(&ls
->info
,
7029 shader_ls
.info
.num_input_sgprs
,
7030 &shader
->key
.part
.tcs
.ls_prolog
,
7031 shader
, &vs_prolog_key
);
7032 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7033 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7034 parts
[0] = ctx
.main_fn
;
7037 /* Reset the shader context. */
7038 ctx
.shader
= shader
;
7039 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
7041 si_build_wrapper_function(&ctx
,
7042 parts
+ !vs_needs_prolog
,
7043 4 - !vs_needs_prolog
, vs_needs_prolog
,
7044 vs_needs_prolog
? 2 : 1);
7046 LLVMValueRef parts
[2];
7047 union si_shader_part_key epilog_key
;
7049 parts
[0] = ctx
.main_fn
;
7051 memset(&epilog_key
, 0, sizeof(epilog_key
));
7052 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7053 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7054 parts
[1] = ctx
.main_fn
;
7056 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7058 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7059 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7060 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7061 LLVMValueRef es_prolog
= NULL
;
7062 LLVMValueRef es_main
= NULL
;
7063 LLVMValueRef gs_prolog
= NULL
;
7064 LLVMValueRef gs_main
= ctx
.main_fn
;
7067 union si_shader_part_key gs_prolog_key
;
7068 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7069 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7070 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7071 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7072 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7073 gs_prolog
= ctx
.main_fn
;
7076 struct si_shader shader_es
= {};
7077 shader_es
.selector
= es
;
7078 shader_es
.key
.as_es
= 1;
7079 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7080 shader_es
.key
.mono
= shader
->key
.mono
;
7081 shader_es
.key
.opt
= shader
->key
.opt
;
7082 shader_es
.is_monolithic
= true;
7083 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
7085 if (!si_compile_tgsi_main(&ctx
)) {
7086 si_llvm_dispose(&ctx
);
7089 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7090 es_main
= ctx
.main_fn
;
7093 if (es
->vs_needs_prolog
) {
7094 union si_shader_part_key vs_prolog_key
;
7095 si_get_vs_prolog_key(&es
->info
,
7096 shader_es
.info
.num_input_sgprs
,
7097 &shader
->key
.part
.gs
.vs_prolog
,
7098 shader
, &vs_prolog_key
);
7099 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7100 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7101 es_prolog
= ctx
.main_fn
;
7104 /* Reset the shader context. */
7105 ctx
.shader
= shader
;
7106 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7108 /* Prepare the array of shader parts. */
7109 LLVMValueRef parts
[4];
7110 unsigned num_parts
= 0, main_part
, next_first_part
;
7113 parts
[num_parts
++] = es_prolog
;
7115 parts
[main_part
= num_parts
++] = es_main
;
7116 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7117 parts
[num_parts
++] = gs_main
;
7119 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7120 main_part
, next_first_part
);
7122 LLVMValueRef parts
[2];
7123 union si_shader_part_key prolog_key
;
7125 parts
[1] = ctx
.main_fn
;
7127 memset(&prolog_key
, 0, sizeof(prolog_key
));
7128 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7129 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7130 parts
[0] = ctx
.main_fn
;
7132 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7134 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7135 LLVMValueRef parts
[3];
7136 union si_shader_part_key prolog_key
;
7137 union si_shader_part_key epilog_key
;
7140 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7141 need_prolog
= si_need_ps_prolog(&prolog_key
);
7143 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7146 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7147 parts
[0] = ctx
.main_fn
;
7150 si_get_ps_epilog_key(shader
, &epilog_key
);
7151 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7152 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7154 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7155 need_prolog
? 1 : 0, 0);
7158 si_llvm_optimize_module(&ctx
);
7160 /* Post-optimization transformations and analysis. */
7161 si_optimize_vs_outputs(&ctx
);
7163 if ((debug
&& debug
->debug_message
) ||
7164 si_can_dump_shader(sscreen
, ctx
.type
)) {
7165 ctx
.shader
->info
.private_mem_vgprs
=
7166 ac_count_scratch_private_memory(ctx
.main_fn
);
7169 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7170 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7171 LLVMPointerTypeKind
);
7173 /* Compile to bytecode. */
7174 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7175 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7176 si_get_shader_name(shader
),
7177 si_should_optimize_less(compiler
, shader
->selector
));
7178 si_llvm_dispose(&ctx
);
7180 fprintf(stderr
, "LLVM failed to compile shader\n");
7184 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7185 * LLVM 3.9svn has this bug.
7187 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7188 unsigned wave_size
= sscreen
->compute_wave_size
;
7189 unsigned max_vgprs
= 256;
7190 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
7191 unsigned max_sgprs_per_wave
= 128;
7192 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7193 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7194 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7196 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7197 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7199 if (shader
->config
.num_sgprs
> max_sgprs
||
7200 shader
->config
.num_vgprs
> max_vgprs
) {
7201 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7202 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7203 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7204 max_sgprs
, max_vgprs
);
7206 /* Just terminate the process, because dependent
7207 * shaders can hang due to bad input data, but use
7208 * the env var to allow shader-db to work.
7210 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7215 /* Add the scratch offset to input SGPRs. */
7216 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7217 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7219 /* Calculate the number of fragment input VGPRs. */
7220 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7221 shader
->info
.num_input_vgprs
= 0;
7222 shader
->info
.face_vgpr_index
= -1;
7223 shader
->info
.ancillary_vgpr_index
= -1;
7225 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7226 shader
->info
.num_input_vgprs
+= 2;
7227 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7228 shader
->info
.num_input_vgprs
+= 2;
7229 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7230 shader
->info
.num_input_vgprs
+= 2;
7231 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7232 shader
->info
.num_input_vgprs
+= 3;
7233 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7234 shader
->info
.num_input_vgprs
+= 2;
7235 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7236 shader
->info
.num_input_vgprs
+= 2;
7237 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7238 shader
->info
.num_input_vgprs
+= 2;
7239 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7240 shader
->info
.num_input_vgprs
+= 1;
7241 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7242 shader
->info
.num_input_vgprs
+= 1;
7243 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7244 shader
->info
.num_input_vgprs
+= 1;
7245 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7246 shader
->info
.num_input_vgprs
+= 1;
7247 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7248 shader
->info
.num_input_vgprs
+= 1;
7249 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7250 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7251 shader
->info
.num_input_vgprs
+= 1;
7253 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7254 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7255 shader
->info
.num_input_vgprs
+= 1;
7257 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7258 shader
->info
.num_input_vgprs
+= 1;
7259 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7260 shader
->info
.num_input_vgprs
+= 1;
7263 si_calculate_max_simd_waves(shader
);
7264 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7269 * Create, compile and return a shader part (prolog or epilog).
7271 * \param sscreen screen
7272 * \param list list of shader parts of the same category
7273 * \param type shader type
7274 * \param key shader part key
7275 * \param prolog whether the part being requested is a prolog
7276 * \param tm LLVM target machine
7277 * \param debug debug callback
7278 * \param build the callback responsible for building the main function
7279 * \return non-NULL on success
7281 static struct si_shader_part
*
7282 si_get_shader_part(struct si_screen
*sscreen
,
7283 struct si_shader_part
**list
,
7284 enum pipe_shader_type type
,
7286 union si_shader_part_key
*key
,
7287 struct ac_llvm_compiler
*compiler
,
7288 struct pipe_debug_callback
*debug
,
7289 void (*build
)(struct si_shader_context
*,
7290 union si_shader_part_key
*),
7293 struct si_shader_part
*result
;
7295 mtx_lock(&sscreen
->shader_parts_mutex
);
7297 /* Find existing. */
7298 for (result
= *list
; result
; result
= result
->next
) {
7299 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7300 mtx_unlock(&sscreen
->shader_parts_mutex
);
7305 /* Compile a new one. */
7306 result
= CALLOC_STRUCT(si_shader_part
);
7309 struct si_shader shader
= {};
7312 case PIPE_SHADER_VERTEX
:
7313 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7314 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7315 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7317 case PIPE_SHADER_TESS_CTRL
:
7319 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7321 case PIPE_SHADER_GEOMETRY
:
7323 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7325 case PIPE_SHADER_FRAGMENT
:
7327 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7329 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7332 unreachable("bad shader part");
7335 struct si_shader_context ctx
;
7336 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7337 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7339 ctx
.shader
= &shader
;
7345 si_llvm_optimize_module(&ctx
);
7347 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7348 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7355 result
->next
= *list
;
7359 si_llvm_dispose(&ctx
);
7360 mtx_unlock(&sscreen
->shader_parts_mutex
);
7364 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7366 LLVMValueRef ptr
[2], list
;
7367 bool merged_shader
= is_merged_shader(ctx
);
7369 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7370 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7371 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7376 * Build the vertex shader prolog function.
7378 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7379 * All inputs are returned unmodified. The vertex load indices are
7380 * stored after them, which will be used by the API VS for fetching inputs.
7382 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7387 * (VertexID + BaseVertex),
7388 * (InstanceID + StartInstance),
7389 * (InstanceID / 2 + StartInstance)
7391 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7392 union si_shader_part_key
*key
)
7394 struct si_function_info fninfo
;
7395 LLVMTypeRef
*returns
;
7396 LLVMValueRef ret
, func
;
7398 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7399 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7400 LLVMValueRef input_vgprs
[9];
7401 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7403 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7405 si_init_function_info(&fninfo
);
7407 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7408 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7409 sizeof(LLVMTypeRef
));
7412 /* Declare input and output SGPRs. */
7413 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7414 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7415 returns
[num_returns
++] = ctx
->i32
;
7418 /* Preloaded VGPRs (outputs must be floats) */
7419 for (i
= 0; i
< num_input_vgprs
; i
++) {
7420 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7421 returns
[num_returns
++] = ctx
->f32
;
7424 /* Vertex load indices. */
7425 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7426 returns
[num_returns
++] = ctx
->f32
;
7428 /* Create the function. */
7429 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7430 func
= ctx
->main_fn
;
7432 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7433 if (!key
->vs_prolog
.is_monolithic
)
7434 si_init_exec_from_input(ctx
, 3, 0);
7436 if (key
->vs_prolog
.as_ls
&&
7437 ctx
->screen
->has_ls_vgpr_init_bug
) {
7438 /* If there are no HS threads, SPI loads the LS VGPRs
7439 * starting at VGPR 0. Shift them back to where they
7442 LLVMValueRef has_hs_threads
=
7443 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7444 si_unpack_param(ctx
, 3, 8, 8),
7447 for (i
= 4; i
> 0; --i
) {
7448 input_vgprs
[i
+ 1] =
7449 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7451 input_vgprs
[i
- 1], "");
7456 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7457 unsigned instance_id_vgpr
=
7458 ctx
->screen
->info
.chip_class
>= GFX10
?
7460 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7462 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7463 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7465 /* InstanceID = VertexID >> 16;
7466 * VertexID = VertexID & 0xffff;
7468 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7469 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7470 LLVMConstInt(ctx
->i32
, 16, 0), "");
7471 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7472 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7475 /* Copy inputs to outputs. This should be no-op, as the registers match,
7476 * but it will prevent the compiler from overwriting them unintentionally.
7478 ret
= ctx
->return_value
;
7479 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7480 LLVMValueRef p
= LLVMGetParam(func
, i
);
7481 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7483 for (i
= 0; i
< num_input_vgprs
; i
++) {
7484 LLVMValueRef p
= input_vgprs
[i
];
7486 if (i
== vertex_id_vgpr
)
7487 p
= ctx
->abi
.vertex_id
;
7488 else if (i
== instance_id_vgpr
)
7489 p
= ctx
->abi
.instance_id
;
7491 p
= ac_to_float(&ctx
->ac
, p
);
7492 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7493 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7496 LLVMValueRef original_ret
= ret
;
7497 bool wrapped
= false;
7498 LLVMBasicBlockRef if_entry_block
= NULL
;
7500 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7501 LLVMValueRef num_threads
;
7504 num_threads
= si_unpack_param(ctx
, 3, 0, 8);
7505 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7506 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7507 if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
7508 ac_build_ifcc(&ctx
->ac
, ena
, 11501);
7512 /* Compute vertex load indices from instance divisors. */
7513 LLVMValueRef instance_divisor_constbuf
= NULL
;
7515 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7516 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7517 LLVMValueRef buf_index
=
7518 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7519 instance_divisor_constbuf
=
7520 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7523 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7524 bool divisor_is_one
=
7525 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7526 bool divisor_is_fetched
=
7527 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7528 LLVMValueRef index
= NULL
;
7530 if (divisor_is_one
) {
7531 index
= ctx
->abi
.instance_id
;
7532 } else if (divisor_is_fetched
) {
7533 LLVMValueRef udiv_factors
[4];
7535 for (unsigned j
= 0; j
< 4; j
++) {
7537 buffer_load_const(ctx
, instance_divisor_constbuf
,
7538 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7539 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7541 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7542 * Such InstanceID might not be achievable in a reasonable time though.
7544 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7545 udiv_factors
[0], udiv_factors
[1],
7546 udiv_factors
[2], udiv_factors
[3]);
7549 if (divisor_is_one
|| divisor_is_fetched
) {
7550 /* Add StartInstance. */
7551 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7552 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7553 SI_SGPR_START_INSTANCE
), "");
7555 /* VertexID + BaseVertex */
7556 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7558 LLVMGetParam(func
, user_sgpr_base
+
7559 SI_SGPR_BASE_VERTEX
), "");
7562 index
= ac_to_float(&ctx
->ac
, index
);
7563 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7564 fninfo
.num_params
+ i
, "");
7568 LLVMBasicBlockRef bbs
[2] = {
7569 LLVMGetInsertBlock(ctx
->ac
.builder
),
7572 ac_build_endif(&ctx
->ac
, 11501);
7574 LLVMValueRef values
[2] = {
7578 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7581 si_llvm_build_ret(ctx
, ret
);
7584 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7585 struct ac_llvm_compiler
*compiler
,
7586 struct si_shader
*shader
,
7587 struct pipe_debug_callback
*debug
,
7588 struct si_shader
*main_part
,
7589 const struct si_vs_prolog_bits
*key
)
7591 struct si_shader_selector
*vs
= main_part
->selector
;
7593 if (!si_vs_needs_prolog(vs
, key
))
7596 /* Get the prolog. */
7597 union si_shader_part_key prolog_key
;
7598 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7599 key
, shader
, &prolog_key
);
7602 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7603 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7604 debug
, si_build_vs_prolog_function
,
7605 "Vertex Shader Prolog");
7606 return shader
->prolog
!= NULL
;
7610 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7612 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7613 struct ac_llvm_compiler
*compiler
,
7614 struct si_shader
*shader
,
7615 struct pipe_debug_callback
*debug
)
7617 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7618 &shader
->key
.part
.vs
.prolog
);
7622 * Compile the TCS epilog function. This writes tesselation factors to memory
7623 * based on the output primitive type of the tesselator (determined by TES).
7625 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7626 union si_shader_part_key
*key
)
7628 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7629 struct si_function_info fninfo
;
7632 si_init_function_info(&fninfo
);
7634 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7635 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7636 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7637 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7638 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7639 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7640 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7641 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7642 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7643 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7644 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7645 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7646 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7647 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7648 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7649 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7650 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7651 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7652 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7653 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7655 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7656 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7657 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7658 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7659 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7660 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7661 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7662 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7663 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7664 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7667 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7668 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7669 unsigned tess_factors_idx
=
7670 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7671 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7672 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7674 for (unsigned i
= 0; i
< 6; i
++)
7675 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7677 /* Create the function. */
7678 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7679 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7680 ac_declare_lds_as_pointer(&ctx
->ac
);
7681 func
= ctx
->main_fn
;
7683 LLVMValueRef invoc0_tess_factors
[6];
7684 for (unsigned i
= 0; i
< 6; i
++)
7685 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7687 si_write_tess_factors(bld_base
,
7688 LLVMGetParam(func
, tess_factors_idx
),
7689 LLVMGetParam(func
, tess_factors_idx
+ 1),
7690 LLVMGetParam(func
, tess_factors_idx
+ 2),
7691 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7693 LLVMBuildRetVoid(ctx
->ac
.builder
);
7697 * Select and compile (or reuse) TCS parts (epilog).
7699 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7700 struct ac_llvm_compiler
*compiler
,
7701 struct si_shader
*shader
,
7702 struct pipe_debug_callback
*debug
)
7704 if (sscreen
->info
.chip_class
>= GFX9
) {
7705 struct si_shader
*ls_main_part
=
7706 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7708 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7709 &shader
->key
.part
.tcs
.ls_prolog
))
7712 shader
->previous_stage
= ls_main_part
;
7715 /* Get the epilog. */
7716 union si_shader_part_key epilog_key
;
7717 memset(&epilog_key
, 0, sizeof(epilog_key
));
7718 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7720 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7721 PIPE_SHADER_TESS_CTRL
, false,
7722 &epilog_key
, compiler
, debug
,
7723 si_build_tcs_epilog_function
,
7724 "Tessellation Control Shader Epilog");
7725 return shader
->epilog
!= NULL
;
7729 * Select and compile (or reuse) GS parts (prolog).
7731 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7732 struct ac_llvm_compiler
*compiler
,
7733 struct si_shader
*shader
,
7734 struct pipe_debug_callback
*debug
)
7736 if (sscreen
->info
.chip_class
>= GFX9
) {
7737 struct si_shader
*es_main_part
;
7738 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7740 if (es_type
== PIPE_SHADER_TESS_EVAL
&& shader
->key
.as_ngg
)
7741 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7743 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7745 if (es_type
== PIPE_SHADER_VERTEX
&&
7746 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7747 &shader
->key
.part
.gs
.vs_prolog
))
7750 shader
->previous_stage
= es_main_part
;
7753 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7756 union si_shader_part_key prolog_key
;
7757 memset(&prolog_key
, 0, sizeof(prolog_key
));
7758 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7759 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7761 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7762 PIPE_SHADER_GEOMETRY
, true,
7763 &prolog_key
, compiler
, debug
,
7764 si_build_gs_prolog_function
,
7765 "Geometry Shader Prolog");
7766 return shader
->prolog2
!= NULL
;
7770 * Build the pixel shader prolog function. This handles:
7771 * - two-side color selection and interpolation
7772 * - overriding interpolation parameters for the API PS
7773 * - polygon stippling
7775 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7776 * overriden by other states. (e.g. per-sample interpolation)
7777 * Interpolated colors are stored after the preloaded VGPRs.
7779 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7780 union si_shader_part_key
*key
)
7782 struct si_function_info fninfo
;
7783 LLVMValueRef ret
, func
;
7784 int num_returns
, i
, num_color_channels
;
7786 assert(si_need_ps_prolog(key
));
7788 si_init_function_info(&fninfo
);
7790 /* Declare inputs. */
7791 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7792 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7794 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7795 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7797 /* Declare outputs (same as inputs + add colors if needed) */
7798 num_returns
= fninfo
.num_params
;
7799 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7800 for (i
= 0; i
< num_color_channels
; i
++)
7801 fninfo
.types
[num_returns
++] = ctx
->f32
;
7803 /* Create the function. */
7804 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7806 func
= ctx
->main_fn
;
7808 /* Copy inputs to outputs. This should be no-op, as the registers match,
7809 * but it will prevent the compiler from overwriting them unintentionally.
7811 ret
= ctx
->return_value
;
7812 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7813 LLVMValueRef p
= LLVMGetParam(func
, i
);
7814 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7817 /* Polygon stippling. */
7818 if (key
->ps_prolog
.states
.poly_stipple
) {
7819 /* POS_FIXED_PT is always last. */
7820 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7821 key
->ps_prolog
.num_input_vgprs
- 1;
7822 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7824 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7827 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7828 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7829 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7830 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7832 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7833 * The hw doesn't compute CENTROID if the whole wave only
7834 * contains fully-covered quads.
7836 * PRIM_MASK is after user SGPRs.
7838 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7839 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7840 LLVMConstInt(ctx
->i32
, 31, 0), "");
7841 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7844 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7845 /* Read PERSP_CENTER. */
7846 for (i
= 0; i
< 2; i
++)
7847 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7848 /* Read PERSP_CENTROID. */
7849 for (i
= 0; i
< 2; i
++)
7850 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7851 /* Select PERSP_CENTROID. */
7852 for (i
= 0; i
< 2; i
++) {
7853 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7854 center
[i
], centroid
[i
], "");
7855 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7856 tmp
, base
+ 4 + i
, "");
7859 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7860 /* Read LINEAR_CENTER. */
7861 for (i
= 0; i
< 2; i
++)
7862 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7863 /* Read LINEAR_CENTROID. */
7864 for (i
= 0; i
< 2; i
++)
7865 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7866 /* Select LINEAR_CENTROID. */
7867 for (i
= 0; i
< 2; i
++) {
7868 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7869 center
[i
], centroid
[i
], "");
7870 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7871 tmp
, base
+ 10 + i
, "");
7876 /* Force per-sample interpolation. */
7877 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7878 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7879 LLVMValueRef persp_sample
[2];
7881 /* Read PERSP_SAMPLE. */
7882 for (i
= 0; i
< 2; i
++)
7883 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7884 /* Overwrite PERSP_CENTER. */
7885 for (i
= 0; i
< 2; i
++)
7886 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7887 persp_sample
[i
], base
+ 2 + i
, "");
7888 /* Overwrite PERSP_CENTROID. */
7889 for (i
= 0; i
< 2; i
++)
7890 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7891 persp_sample
[i
], base
+ 4 + i
, "");
7893 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7894 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7895 LLVMValueRef linear_sample
[2];
7897 /* Read LINEAR_SAMPLE. */
7898 for (i
= 0; i
< 2; i
++)
7899 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7900 /* Overwrite LINEAR_CENTER. */
7901 for (i
= 0; i
< 2; i
++)
7902 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7903 linear_sample
[i
], base
+ 8 + i
, "");
7904 /* Overwrite LINEAR_CENTROID. */
7905 for (i
= 0; i
< 2; i
++)
7906 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7907 linear_sample
[i
], base
+ 10 + i
, "");
7910 /* Force center interpolation. */
7911 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7912 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7913 LLVMValueRef persp_center
[2];
7915 /* Read PERSP_CENTER. */
7916 for (i
= 0; i
< 2; i
++)
7917 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7918 /* Overwrite PERSP_SAMPLE. */
7919 for (i
= 0; i
< 2; i
++)
7920 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7921 persp_center
[i
], base
+ i
, "");
7922 /* Overwrite PERSP_CENTROID. */
7923 for (i
= 0; i
< 2; i
++)
7924 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7925 persp_center
[i
], base
+ 4 + i
, "");
7927 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7928 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7929 LLVMValueRef linear_center
[2];
7931 /* Read LINEAR_CENTER. */
7932 for (i
= 0; i
< 2; i
++)
7933 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7934 /* Overwrite LINEAR_SAMPLE. */
7935 for (i
= 0; i
< 2; i
++)
7936 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7937 linear_center
[i
], base
+ 6 + i
, "");
7938 /* Overwrite LINEAR_CENTROID. */
7939 for (i
= 0; i
< 2; i
++)
7940 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7941 linear_center
[i
], base
+ 10 + i
, "");
7944 /* Interpolate colors. */
7945 unsigned color_out_idx
= 0;
7946 for (i
= 0; i
< 2; i
++) {
7947 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7948 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7949 key
->ps_prolog
.face_vgpr_index
;
7950 LLVMValueRef interp
[2], color
[4];
7951 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7956 /* If the interpolation qualifier is not CONSTANT (-1). */
7957 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7958 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7959 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7961 /* Get the (i,j) updated by bc_optimize handling. */
7962 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7964 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7965 interp_vgpr
+ 1, "");
7966 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7969 /* Use the absolute location of the input. */
7970 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7972 if (key
->ps_prolog
.states
.color_two_side
) {
7973 face
= LLVMGetParam(func
, face_vgpr
);
7974 face
= ac_to_integer(&ctx
->ac
, face
);
7977 interp_fs_input(ctx
,
7978 key
->ps_prolog
.color_attr_index
[i
],
7979 TGSI_SEMANTIC_COLOR
, i
,
7980 key
->ps_prolog
.num_interp_inputs
,
7981 key
->ps_prolog
.colors_read
, interp_ij
,
7982 prim_mask
, face
, color
);
7985 unsigned chan
= u_bit_scan(&writemask
);
7986 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7987 fninfo
.num_params
+ color_out_idx
++, "");
7991 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7994 * "When per-sample shading is active due to the use of a fragment
7995 * input qualified by sample or due to the use of the gl_SampleID
7996 * or gl_SamplePosition variables, only the bit for the current
7997 * sample is set in gl_SampleMaskIn. When state specifies multiple
7998 * fragment shader invocations for a given fragment, the sample
7999 * mask for any single fragment shader invocation may specify a
8000 * subset of the covered samples for the fragment. In this case,
8001 * the bit corresponding to each covered sample will be set in
8002 * exactly one fragment shader invocation."
8004 * The samplemask loaded by hardware is always the coverage of the
8005 * entire pixel/fragment, so mask bits out based on the sample ID.
8007 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
8008 /* The bit pattern matches that used by fixed function fragment
8010 static const uint16_t ps_iter_masks
[] = {
8011 0xffff, /* not used */
8017 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
8019 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
8020 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
8021 key
->ps_prolog
.ancillary_vgpr_index
;
8022 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
8023 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
8025 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
8026 samplemask
= LLVMBuildAnd(
8029 LLVMBuildShl(ctx
->ac
.builder
,
8030 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
8033 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
8035 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
8036 ancillary_vgpr
+ 1, "");
8039 /* Tell LLVM to insert WQM instruction sequence when needed. */
8040 if (key
->ps_prolog
.wqm
) {
8041 LLVMAddTargetDependentFunctionAttr(func
,
8042 "amdgpu-ps-wqm-outputs", "");
8045 si_llvm_build_ret(ctx
, ret
);
8049 * Build the pixel shader epilog function. This handles everything that must be
8050 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8052 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8053 union si_shader_part_key
*key
)
8055 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8056 struct si_function_info fninfo
;
8057 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8059 struct si_ps_exports exp
= {};
8061 si_init_function_info(&fninfo
);
8063 /* Declare input SGPRs. */
8064 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8065 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8066 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8067 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8068 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
8070 /* Declare input VGPRs. */
8071 unsigned required_num_params
=
8072 fninfo
.num_sgpr_params
+
8073 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8074 key
->ps_epilog
.writes_z
+
8075 key
->ps_epilog
.writes_stencil
+
8076 key
->ps_epilog
.writes_samplemask
;
8078 required_num_params
= MAX2(required_num_params
,
8079 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8081 while (fninfo
.num_params
< required_num_params
)
8082 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
8084 /* Create the function. */
8085 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
8086 /* Disable elimination of unused inputs. */
8087 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8088 "InitialPSInputAddr", 0xffffff);
8090 /* Process colors. */
8091 unsigned vgpr
= fninfo
.num_sgpr_params
;
8092 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8093 int last_color_export
= -1;
8095 /* Find the last color export. */
8096 if (!key
->ps_epilog
.writes_z
&&
8097 !key
->ps_epilog
.writes_stencil
&&
8098 !key
->ps_epilog
.writes_samplemask
) {
8099 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8101 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8102 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8103 /* Just set this if any of the colorbuffers are enabled. */
8105 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8106 last_color_export
= 0;
8108 for (i
= 0; i
< 8; i
++)
8109 if (colors_written
& (1 << i
) &&
8110 (spi_format
>> (i
* 4)) & 0xf)
8111 last_color_export
= i
;
8115 while (colors_written
) {
8116 LLVMValueRef color
[4];
8117 int mrt
= u_bit_scan(&colors_written
);
8119 for (i
= 0; i
< 4; i
++)
8120 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8122 si_export_mrt_color(bld_base
, color
, mrt
,
8123 fninfo
.num_params
- 1,
8124 mrt
== last_color_export
, &exp
);
8127 /* Process depth, stencil, samplemask. */
8128 if (key
->ps_epilog
.writes_z
)
8129 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8130 if (key
->ps_epilog
.writes_stencil
)
8131 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8132 if (key
->ps_epilog
.writes_samplemask
)
8133 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8135 if (depth
|| stencil
|| samplemask
)
8136 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8137 else if (last_color_export
== -1)
8138 ac_build_export_null(&ctx
->ac
);
8141 si_emit_ps_exports(ctx
, &exp
);
8144 LLVMBuildRetVoid(ctx
->ac
.builder
);
8148 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8150 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8151 struct ac_llvm_compiler
*compiler
,
8152 struct si_shader
*shader
,
8153 struct pipe_debug_callback
*debug
)
8155 union si_shader_part_key prolog_key
;
8156 union si_shader_part_key epilog_key
;
8158 /* Get the prolog. */
8159 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8161 /* The prolog is a no-op if these aren't set. */
8162 if (si_need_ps_prolog(&prolog_key
)) {
8164 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8165 PIPE_SHADER_FRAGMENT
, true,
8166 &prolog_key
, compiler
, debug
,
8167 si_build_ps_prolog_function
,
8168 "Fragment Shader Prolog");
8169 if (!shader
->prolog
)
8173 /* Get the epilog. */
8174 si_get_ps_epilog_key(shader
, &epilog_key
);
8177 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8178 PIPE_SHADER_FRAGMENT
, false,
8179 &epilog_key
, compiler
, debug
,
8180 si_build_ps_epilog_function
,
8181 "Fragment Shader Epilog");
8182 if (!shader
->epilog
)
8185 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8186 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8187 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8188 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8191 /* Set up the enable bits for per-sample shading if needed. */
8192 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8193 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8194 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8195 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8196 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8197 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8199 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8200 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8201 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8202 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8203 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8204 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8206 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8207 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8208 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8209 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8210 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8211 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8213 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8214 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8215 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8216 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8217 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8218 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8221 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8222 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8223 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8224 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8225 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8228 /* At least one pair of interpolation weights must be enabled. */
8229 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8230 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8231 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8234 /* Samplemask fixup requires the sample ID. */
8235 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8236 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8237 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8240 /* The sample mask input is always enabled, because the API shader always
8241 * passes it through to the epilog. Disable it here if it's unused.
8243 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8244 !shader
->selector
->info
.reads_samplemask
)
8245 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8250 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8253 /* If tessellation is all offchip and on-chip GS isn't used, this
8254 * workaround is not needed.
8258 /* SPI barrier management bug:
8259 * Make sure we have at least 4k of LDS in use to avoid the bug.
8260 * It applies to workgroup sizes of more than one wavefront.
8262 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8263 sscreen
->info
.family
== CHIP_KABINI
)
8264 *lds_size
= MAX2(*lds_size
, 8);
8267 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8268 struct si_shader
*shader
)
8270 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8272 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8274 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8275 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8276 si_multiwave_lds_size_workaround(sscreen
,
8277 &shader
->config
.lds_size
);
8281 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8282 struct si_shader
*shader
,
8283 struct pipe_debug_callback
*debug
)
8285 struct si_shader_selector
*sel
= shader
->selector
;
8286 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8289 /* LS, ES, VS are compiled on demand if the main part hasn't been
8290 * compiled for that stage.
8292 * GS are compiled on demand if the main part hasn't been compiled
8293 * for the chosen NGG-ness.
8295 * Vertex shaders are compiled on demand when a vertex fetch
8296 * workaround must be applied.
8298 if (shader
->is_monolithic
) {
8299 /* Monolithic shader (compiled as a whole, has many variants,
8300 * may take a long time to compile).
8302 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8306 /* The shader consists of several parts:
8308 * - the middle part is the user shader, it has 1 variant only
8309 * and it was compiled during the creation of the shader
8311 * - the prolog part is inserted at the beginning
8312 * - the epilog part is inserted at the end
8314 * The prolog and epilog have many (but simple) variants.
8316 * Starting with gfx9, geometry and tessellation control
8317 * shaders also contain the prolog and user shader parts of
8318 * the previous shader stage.
8324 /* Copy the compiled TGSI shader data over. */
8325 shader
->is_binary_shared
= true;
8326 shader
->binary
= mainp
->binary
;
8327 shader
->config
= mainp
->config
;
8328 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8329 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8330 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8331 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8332 memcpy(shader
->info
.vs_output_param_offset
,
8333 mainp
->info
.vs_output_param_offset
,
8334 sizeof(mainp
->info
.vs_output_param_offset
));
8335 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8336 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8337 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8339 /* Select prologs and/or epilogs. */
8340 switch (sel
->type
) {
8341 case PIPE_SHADER_VERTEX
:
8342 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8345 case PIPE_SHADER_TESS_CTRL
:
8346 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8349 case PIPE_SHADER_TESS_EVAL
:
8351 case PIPE_SHADER_GEOMETRY
:
8352 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8355 case PIPE_SHADER_FRAGMENT
:
8356 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8359 /* Make sure we have at least as many VGPRs as there
8360 * are allocated inputs.
8362 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8363 shader
->info
.num_input_vgprs
);
8368 /* Update SGPR and VGPR counts. */
8369 if (shader
->prolog
) {
8370 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8371 shader
->prolog
->config
.num_sgprs
);
8372 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8373 shader
->prolog
->config
.num_vgprs
);
8375 if (shader
->previous_stage
) {
8376 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8377 shader
->previous_stage
->config
.num_sgprs
);
8378 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8379 shader
->previous_stage
->config
.num_vgprs
);
8380 shader
->config
.spilled_sgprs
=
8381 MAX2(shader
->config
.spilled_sgprs
,
8382 shader
->previous_stage
->config
.spilled_sgprs
);
8383 shader
->config
.spilled_vgprs
=
8384 MAX2(shader
->config
.spilled_vgprs
,
8385 shader
->previous_stage
->config
.spilled_vgprs
);
8386 shader
->info
.private_mem_vgprs
=
8387 MAX2(shader
->info
.private_mem_vgprs
,
8388 shader
->previous_stage
->info
.private_mem_vgprs
);
8389 shader
->config
.scratch_bytes_per_wave
=
8390 MAX2(shader
->config
.scratch_bytes_per_wave
,
8391 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8392 shader
->info
.uses_instanceid
|=
8393 shader
->previous_stage
->info
.uses_instanceid
;
8395 if (shader
->prolog2
) {
8396 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8397 shader
->prolog2
->config
.num_sgprs
);
8398 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8399 shader
->prolog2
->config
.num_vgprs
);
8401 if (shader
->epilog
) {
8402 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8403 shader
->epilog
->config
.num_sgprs
);
8404 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8405 shader
->epilog
->config
.num_vgprs
);
8407 si_calculate_max_simd_waves(shader
);
8410 if (shader
->key
.as_ngg
) {
8411 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8412 gfx10_ngg_calculate_subgroup_info(shader
);
8413 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8414 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8417 si_fix_resource_usage(sscreen
, shader
);
8418 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8421 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8422 fprintf(stderr
, "LLVM failed to upload shader\n");
8429 void si_shader_destroy(struct si_shader
*shader
)
8431 if (shader
->scratch_bo
)
8432 si_resource_reference(&shader
->scratch_bo
, NULL
);
8434 si_resource_reference(&shader
->bo
, NULL
);
8436 if (!shader
->is_binary_shared
)
8437 si_shader_binary_clean(&shader
->binary
);
8439 free(shader
->shader_log
);