2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_strings.h"
29 #include "tgsi/tgsi_util.h"
30 #include "tgsi/tgsi_dump.h"
31 #include "tgsi/tgsi_from_mesa.h"
33 #include "ac_binary.h"
34 #include "ac_exp_param.h"
35 #include "ac_shader_util.h"
37 #include "ac_llvm_util.h"
38 #include "si_shader_internal.h"
42 #include "compiler/nir/nir.h"
44 static const char scratch_rsrc_dword0_symbol
[] =
45 "SCRATCH_RSRC_DWORD0";
47 static const char scratch_rsrc_dword1_symbol
[] =
48 "SCRATCH_RSRC_DWORD1";
50 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
51 struct si_screen
*sscreen
,
52 struct ac_llvm_compiler
*compiler
);
54 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
55 struct lp_build_tgsi_context
*bld_base
,
56 struct lp_build_emit_data
*emit_data
);
58 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
60 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
61 union si_shader_part_key
*key
);
62 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
63 union si_shader_part_key
*key
);
64 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
65 union si_shader_part_key
*key
);
66 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
67 union si_shader_part_key
*key
);
68 static void si_fix_resource_usage(struct si_screen
*sscreen
,
69 struct si_shader
*shader
);
71 /* Ideally pass the sample mask input to the PS epilog as v14, which
72 * is its usual location, so that the shader doesn't have to add v_mov.
74 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
76 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
79 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
85 /** Whether the shader runs as a combination of multiple API shaders */
86 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
88 if (ctx
->screen
->info
.chip_class
<= GFX8
)
91 return ctx
->shader
->key
.as_ls
||
92 ctx
->shader
->key
.as_es
||
93 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
94 ctx
->type
== PIPE_SHADER_GEOMETRY
;
97 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
98 static bool is_merged_shader(struct si_shader_context
*ctx
)
100 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
103 void si_init_function_info(struct si_function_info
*fninfo
)
105 fninfo
->num_params
= 0;
106 fninfo
->num_sgpr_params
= 0;
109 unsigned add_arg_assign(struct si_function_info
*fninfo
,
110 enum si_arg_regfile regfile
, LLVMTypeRef type
,
111 LLVMValueRef
*assign
)
113 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
115 unsigned idx
= fninfo
->num_params
++;
116 assert(idx
< ARRAY_SIZE(fninfo
->types
));
118 if (regfile
== ARG_SGPR
)
119 fninfo
->num_sgpr_params
= fninfo
->num_params
;
121 fninfo
->types
[idx
] = type
;
122 fninfo
->assign
[idx
] = assign
;
126 static unsigned add_arg(struct si_function_info
*fninfo
,
127 enum si_arg_regfile regfile
, LLVMTypeRef type
)
129 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
132 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
133 enum si_arg_regfile regfile
, LLVMTypeRef type
,
134 LLVMValueRef
*assign
, unsigned idx
)
136 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
137 assert(actual
== idx
);
140 static void add_arg_checked(struct si_function_info
*fninfo
,
141 enum si_arg_regfile regfile
, LLVMTypeRef type
,
144 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
148 * Returns a unique index for a per-patch semantic name and index. The index
149 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
152 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
154 switch (semantic_name
) {
155 case TGSI_SEMANTIC_TESSOUTER
:
157 case TGSI_SEMANTIC_TESSINNER
:
159 case TGSI_SEMANTIC_PATCH
:
164 assert(!"invalid semantic name");
170 * Returns a unique index for a semantic name and index. The index must be
171 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
174 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
177 switch (semantic_name
) {
178 case TGSI_SEMANTIC_POSITION
:
180 case TGSI_SEMANTIC_GENERIC
:
181 /* Since some shader stages use the the highest used IO index
182 * to determine the size to allocate for inputs/outputs
183 * (in LDS, tess and GS rings). GENERIC should be placed right
184 * after POSITION to make that size as small as possible.
186 if (index
< SI_MAX_IO_GENERIC
)
189 assert(!"invalid generic index");
191 case TGSI_SEMANTIC_FOG
:
192 return SI_MAX_IO_GENERIC
+ 1;
193 case TGSI_SEMANTIC_COLOR
:
195 return SI_MAX_IO_GENERIC
+ 2 + index
;
196 case TGSI_SEMANTIC_BCOLOR
:
198 /* If it's a varying, COLOR and BCOLOR alias. */
200 return SI_MAX_IO_GENERIC
+ 2 + index
;
202 return SI_MAX_IO_GENERIC
+ 4 + index
;
203 case TGSI_SEMANTIC_TEXCOORD
:
205 return SI_MAX_IO_GENERIC
+ 6 + index
;
207 /* These are rarely used between LS and HS or ES and GS. */
208 case TGSI_SEMANTIC_CLIPDIST
:
210 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
211 case TGSI_SEMANTIC_CLIPVERTEX
:
212 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
213 case TGSI_SEMANTIC_PSIZE
:
214 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
216 /* These can't be written by LS, HS, and ES. */
217 case TGSI_SEMANTIC_LAYER
:
218 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
219 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
220 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
221 case TGSI_SEMANTIC_PRIMID
:
222 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
223 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
225 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
226 assert(!"invalid semantic name");
232 * Get the value of a shader input parameter and extract a bitfield.
234 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
235 LLVMValueRef value
, unsigned rshift
,
238 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
239 value
= ac_to_integer(&ctx
->ac
, value
);
242 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
243 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
245 if (rshift
+ bitwidth
< 32) {
246 unsigned mask
= (1 << bitwidth
) - 1;
247 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
248 LLVMConstInt(ctx
->i32
, mask
, 0), "");
254 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
255 unsigned param
, unsigned rshift
,
258 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
260 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
263 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
266 case PIPE_SHADER_TESS_CTRL
:
267 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
269 case PIPE_SHADER_TESS_EVAL
:
270 return LLVMGetParam(ctx
->main_fn
,
271 ctx
->param_tes_rel_patch_id
);
279 /* Tessellation shaders pass outputs to the next shader using LDS.
281 * LS outputs = TCS inputs
282 * TCS outputs = TES inputs
285 * - TCS inputs for patch 0
286 * - TCS inputs for patch 1
287 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
289 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
290 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
291 * - TCS outputs for patch 1
292 * - Per-patch TCS outputs for patch 1
293 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
294 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
297 * All three shaders VS(LS), TCS, TES share the same LDS space.
301 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
303 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
306 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
308 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
310 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
311 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
313 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
316 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
318 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
320 return LLVMConstInt(ctx
->i32
, stride
, 0);
323 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
325 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
326 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
328 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
329 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
330 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
331 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
332 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
333 num_patch_outputs
* 4;
334 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
338 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
340 return LLVMBuildMul(ctx
->ac
.builder
,
342 ctx
->param_tcs_out_lds_offsets
,
344 LLVMConstInt(ctx
->i32
, 4, 0), "");
348 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
350 return LLVMBuildMul(ctx
->ac
.builder
,
352 ctx
->param_tcs_out_lds_offsets
,
354 LLVMConstInt(ctx
->i32
, 4, 0), "");
358 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
360 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
361 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
363 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
367 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
369 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
370 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
371 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
373 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
377 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
379 LLVMValueRef patch0_patch_data_offset
=
380 get_tcs_out_patch0_patch_data_offset(ctx
);
381 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
382 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
384 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
387 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
389 unsigned tcs_out_vertices
=
390 ctx
->shader
->selector
?
391 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
393 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
394 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
395 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
397 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
400 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
405 case PIPE_SHADER_VERTEX
:
406 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
407 return LLVMConstInt(ctx
->i32
, stride
, 0);
409 case PIPE_SHADER_TESS_CTRL
:
410 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
411 ctx
->shader
->is_monolithic
) {
412 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
413 return LLVMConstInt(ctx
->i32
, stride
, 0);
415 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
423 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
424 LLVMValueRef i32
, unsigned index
)
429 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
430 LLVMConstInt(ctx
->i32
, 16, 0), "");
432 return LLVMBuildSExt(ctx
->ac
.builder
,
433 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
438 void si_llvm_load_input_vs(
439 struct si_shader_context
*ctx
,
440 unsigned input_index
,
443 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
444 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
446 if (vs_blit_property
) {
447 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
448 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
449 LLVMIntULE
, vertex_id
,
451 /* Use LLVMIntNE, because we have 3 vertices and only
452 * the middle one should use y2.
454 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
455 LLVMIntNE
, vertex_id
,
458 if (input_index
== 0) {
460 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
461 ctx
->param_vs_blit_inputs
);
462 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
463 ctx
->param_vs_blit_inputs
+ 1);
465 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
466 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
467 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
468 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
470 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
472 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
475 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
476 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
477 out
[2] = LLVMGetParam(ctx
->main_fn
,
478 ctx
->param_vs_blit_inputs
+ 2);
479 out
[3] = ctx
->ac
.f32_1
;
483 /* Color or texture coordinates: */
484 assert(input_index
== 1);
486 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
487 for (int i
= 0; i
< 4; i
++) {
488 out
[i
] = LLVMGetParam(ctx
->main_fn
,
489 ctx
->param_vs_blit_inputs
+ 3 + i
);
492 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
493 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
494 ctx
->param_vs_blit_inputs
+ 3);
495 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
496 ctx
->param_vs_blit_inputs
+ 4);
497 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
498 ctx
->param_vs_blit_inputs
+ 5);
499 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
500 ctx
->param_vs_blit_inputs
+ 6);
502 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
504 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
506 out
[2] = LLVMGetParam(ctx
->main_fn
,
507 ctx
->param_vs_blit_inputs
+ 7);
508 out
[3] = LLVMGetParam(ctx
->main_fn
,
509 ctx
->param_vs_blit_inputs
+ 8);
514 union si_vs_fix_fetch fix_fetch
;
515 LLVMValueRef t_list_ptr
;
516 LLVMValueRef t_offset
;
518 LLVMValueRef vertex_index
;
521 /* Load the T list */
522 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
524 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
526 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
528 vertex_index
= LLVMGetParam(ctx
->main_fn
,
529 ctx
->param_vertex_index0
+
532 /* Use the open-coded implementation for all loads of doubles and
533 * of dword-sized data that needs fixups. We need to insert conversion
534 * code anyway, and the amd/common code does it for us.
536 * Note: On LLVM <= 8, we can only open-code formats with
537 * channel size >= 4 bytes.
539 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
540 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
542 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
543 (fix_fetch
.u
.log_size
== 2)) {
544 tmp
= ac_build_opencoded_load_format(
545 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
546 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
547 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
548 for (unsigned i
= 0; i
< 4; ++i
)
549 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
553 /* Do multiple loads for special formats. */
554 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
555 LLVMValueRef fetches
[4];
556 unsigned num_fetches
;
557 unsigned fetch_stride
;
558 unsigned channels_per_fetch
;
560 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
561 num_fetches
= MIN2(required_channels
, 3);
562 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
563 channels_per_fetch
= 1;
567 channels_per_fetch
= required_channels
;
570 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
571 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
572 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
573 channels_per_fetch
, 0, true);
576 if (num_fetches
== 1 && channels_per_fetch
> 1) {
577 LLVMValueRef fetch
= fetches
[0];
578 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
579 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
580 fetches
[i
] = LLVMBuildExtractElement(
581 ctx
->ac
.builder
, fetch
, tmp
, "");
583 num_fetches
= channels_per_fetch
;
584 channels_per_fetch
= 1;
587 for (unsigned i
= num_fetches
; i
< 4; ++i
)
588 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
590 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
591 required_channels
== 4) {
592 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
593 fetches
[3] = ctx
->ac
.i32_1
;
595 fetches
[3] = ctx
->ac
.f32_1
;
596 } else if (fix_fetch
.u
.log_size
== 3 &&
597 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
598 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
599 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
600 required_channels
== 4) {
601 /* For 2_10_10_10, the hardware returns an unsigned value;
602 * convert it to a signed one.
604 LLVMValueRef tmp
= fetches
[3];
605 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
607 /* First, recover the sign-extended signed integer value. */
608 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
609 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
611 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
613 /* For the integer-like cases, do a natural sign extension.
615 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
616 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
619 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
620 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
621 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
622 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
624 /* Convert back to the right type. */
625 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
627 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
628 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
629 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
630 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
631 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
632 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
638 for (unsigned i
= 0; i
< 4; ++i
)
639 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
642 static void declare_input_vs(
643 struct si_shader_context
*ctx
,
644 unsigned input_index
,
645 const struct tgsi_full_declaration
*decl
,
648 si_llvm_load_input_vs(ctx
, input_index
, out
);
651 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
658 case PIPE_SHADER_VERTEX
:
659 return LLVMGetParam(ctx
->main_fn
,
660 ctx
->param_vs_prim_id
);
661 case PIPE_SHADER_TESS_CTRL
:
662 return ctx
->abi
.tcs_patch_id
;
663 case PIPE_SHADER_TESS_EVAL
:
664 return ctx
->abi
.tes_patch_id
;
665 case PIPE_SHADER_GEOMETRY
:
666 return ctx
->abi
.gs_prim_id
;
674 * Return the value of tgsi_ind_register for indexing.
675 * This is the indirect index with the constant offset added to it.
677 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
678 const struct tgsi_ind_register
*ind
,
684 if (ind
->File
== TGSI_FILE_ADDRESS
) {
685 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
686 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
688 struct tgsi_full_src_register src
= {};
690 src
.Register
.File
= ind
->File
;
691 src
.Register
.Index
= ind
->Index
;
693 /* Set the second index to 0 for constants. */
694 if (ind
->File
== TGSI_FILE_CONSTANT
)
695 src
.Register
.Dimension
= 1;
697 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
700 result
= ac_to_integer(&ctx
->ac
, result
);
703 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
704 LLVMConstInt(ctx
->i32
, rel_index
, 0));
708 * Like si_get_indirect_index, but restricts the return value to a (possibly
709 * undefined) value inside [0..num).
711 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
712 const struct tgsi_ind_register
*ind
,
713 int rel_index
, unsigned num
)
715 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
717 return si_llvm_bound_index(ctx
, result
, num
);
720 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
721 LLVMValueRef vertex_dw_stride
,
722 LLVMValueRef base_addr
,
723 LLVMValueRef vertex_index
,
724 LLVMValueRef param_index
,
725 unsigned input_index
,
730 if (vertex_dw_stride
) {
731 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
732 vertex_dw_stride
, base_addr
);
736 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
737 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
740 int param
= is_patch
?
741 si_shader_io_get_unique_index_patch(name
[input_index
],
742 index
[input_index
]) :
743 si_shader_io_get_unique_index(name
[input_index
],
744 index
[input_index
], false);
746 /* Add the base address of the element. */
747 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
748 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
752 * Calculate a dword address given an input or output register and a stride.
754 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
755 const struct tgsi_full_dst_register
*dst
,
756 const struct tgsi_full_src_register
*src
,
757 LLVMValueRef vertex_dw_stride
,
758 LLVMValueRef base_addr
)
760 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
761 ubyte
*name
, *index
, *array_first
;
763 struct tgsi_full_dst_register reg
;
764 LLVMValueRef vertex_index
= NULL
;
765 LLVMValueRef ind_index
= NULL
;
767 /* Set the register description. The address computation is the same
768 * for sources and destinations. */
770 reg
.Register
.File
= src
->Register
.File
;
771 reg
.Register
.Index
= src
->Register
.Index
;
772 reg
.Register
.Indirect
= src
->Register
.Indirect
;
773 reg
.Register
.Dimension
= src
->Register
.Dimension
;
774 reg
.Indirect
= src
->Indirect
;
775 reg
.Dimension
= src
->Dimension
;
776 reg
.DimIndirect
= src
->DimIndirect
;
780 /* If the register is 2-dimensional (e.g. an array of vertices
781 * in a primitive), calculate the base address of the vertex. */
782 if (reg
.Register
.Dimension
) {
783 if (reg
.Dimension
.Indirect
)
784 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
785 1, reg
.Dimension
.Index
);
787 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
790 /* Get information about the register. */
791 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
792 name
= info
->input_semantic_name
;
793 index
= info
->input_semantic_index
;
794 array_first
= info
->input_array_first
;
795 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
796 name
= info
->output_semantic_name
;
797 index
= info
->output_semantic_index
;
798 array_first
= info
->output_array_first
;
804 if (reg
.Register
.Indirect
) {
805 /* Add the relative address of the element. */
806 if (reg
.Indirect
.ArrayID
)
807 input_index
= array_first
[reg
.Indirect
.ArrayID
];
809 input_index
= reg
.Register
.Index
;
811 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
812 1, reg
.Register
.Index
- input_index
);
814 input_index
= reg
.Register
.Index
;
817 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
818 base_addr
, vertex_index
,
819 ind_index
, input_index
,
821 !reg
.Register
.Dimension
);
824 /* The offchip buffer layout for TCS->TES is
826 * - attribute 0 of patch 0 vertex 0
827 * - attribute 0 of patch 0 vertex 1
828 * - attribute 0 of patch 0 vertex 2
830 * - attribute 0 of patch 1 vertex 0
831 * - attribute 0 of patch 1 vertex 1
833 * - attribute 1 of patch 0 vertex 0
834 * - attribute 1 of patch 0 vertex 1
836 * - per patch attribute 0 of patch 0
837 * - per patch attribute 0 of patch 1
840 * Note that every attribute has 4 components.
842 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
843 LLVMValueRef rel_patch_id
,
844 LLVMValueRef vertex_index
,
845 LLVMValueRef param_index
)
847 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
848 LLVMValueRef param_stride
, constant16
;
850 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
851 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
852 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
855 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
857 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
858 vertices_per_patch
, vertex_index
);
859 param_stride
= total_vertices
;
861 base_addr
= rel_patch_id
;
862 param_stride
= num_patches
;
865 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
866 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
869 LLVMValueRef patch_data_offset
=
870 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
872 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
873 patch_data_offset
, "");
878 /* This is a generic helper that can be shared by the NIR and TGSI backends */
879 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
880 struct si_shader_context
*ctx
,
881 LLVMValueRef vertex_index
,
882 LLVMValueRef param_index
,
888 unsigned param_index_base
;
890 param_index_base
= is_patch
?
891 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
892 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
895 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
896 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
899 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
902 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
903 vertex_index
, param_index
);
906 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
907 struct si_shader_context
*ctx
,
908 const struct tgsi_full_dst_register
*dst
,
909 const struct tgsi_full_src_register
*src
)
911 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
912 ubyte
*name
, *index
, *array_first
;
913 struct tgsi_full_src_register reg
;
914 LLVMValueRef vertex_index
= NULL
;
915 LLVMValueRef param_index
= NULL
;
918 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
920 if (reg
.Register
.Dimension
) {
922 if (reg
.Dimension
.Indirect
)
923 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
924 1, reg
.Dimension
.Index
);
926 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
929 /* Get information about the register. */
930 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
931 name
= info
->input_semantic_name
;
932 index
= info
->input_semantic_index
;
933 array_first
= info
->input_array_first
;
934 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
935 name
= info
->output_semantic_name
;
936 index
= info
->output_semantic_index
;
937 array_first
= info
->output_array_first
;
943 if (reg
.Register
.Indirect
) {
944 if (reg
.Indirect
.ArrayID
)
945 param_base
= array_first
[reg
.Indirect
.ArrayID
];
947 param_base
= reg
.Register
.Index
;
949 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
950 1, reg
.Register
.Index
- param_base
);
953 param_base
= reg
.Register
.Index
;
956 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
957 param_index
, param_base
,
958 name
, index
, !reg
.Register
.Dimension
);
961 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
962 LLVMTypeRef type
, unsigned swizzle
,
963 LLVMValueRef buffer
, LLVMValueRef offset
,
964 LLVMValueRef base
, bool can_speculate
)
966 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
967 LLVMValueRef value
, value2
;
968 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
971 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
972 0, ac_glc
, can_speculate
, false);
974 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
977 if (!llvm_type_is_64bit(ctx
, type
)) {
978 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
979 0, ac_glc
, can_speculate
, false);
981 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
982 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
983 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
986 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
987 swizzle
* 4, ac_glc
, can_speculate
, false);
989 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
990 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
992 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
996 * Load from LSHS LDS storage.
998 * \param type output value type
999 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1000 * \param dw_addr address in dwords
1002 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
1003 LLVMTypeRef type
, unsigned swizzle
,
1004 LLVMValueRef dw_addr
)
1006 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1009 if (swizzle
== ~0) {
1010 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1012 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1013 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
1015 return ac_build_gather_values(&ctx
->ac
, values
,
1019 /* Split 64-bit loads. */
1020 if (llvm_type_is_64bit(ctx
, type
)) {
1021 LLVMValueRef lo
, hi
;
1023 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1024 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1025 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1028 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1029 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1031 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1033 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1037 * Store to LSHS LDS storage.
1039 * \param swizzle offset (typically 0..3)
1040 * \param dw_addr address in dwords
1041 * \param value value to store
1043 static void lshs_lds_store(struct si_shader_context
*ctx
,
1044 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1047 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1048 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1050 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1055 TESS_OFFCHIP_RING_TCS
,
1056 TESS_OFFCHIP_RING_TES
,
1059 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1060 enum si_tess_ring ring
)
1062 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1063 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1064 ctx
->param_tcs_out_lds_layout
;
1065 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1067 /* TCS only receives high 13 bits of the address. */
1068 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1069 addr
= LLVMBuildAnd(builder
, addr
,
1070 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1073 if (ring
== TCS_FACTOR_RING
) {
1074 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1075 addr
= LLVMBuildAdd(builder
, addr
,
1076 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1079 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1080 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1081 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1082 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1084 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1085 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1086 S_008F0C_OOB_SELECT(3) |
1087 S_008F0C_RESOURCE_LEVEL(1);
1089 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1090 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1092 LLVMValueRef desc
[4];
1094 desc
[1] = LLVMConstInt(ctx
->i32
,
1095 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1096 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1097 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1099 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1102 static LLVMValueRef
fetch_input_tcs(
1103 struct lp_build_tgsi_context
*bld_base
,
1104 const struct tgsi_full_src_register
*reg
,
1105 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1107 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1108 LLVMValueRef dw_addr
, stride
;
1109 unsigned swizzle
= swizzle_in
& 0xffff;
1110 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1111 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1112 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1114 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1117 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1119 LLVMValueRef vertex_index
,
1120 LLVMValueRef param_index
,
1121 unsigned const_index
,
1123 unsigned driver_location
,
1125 unsigned num_components
,
1130 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1131 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1132 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1133 LLVMValueRef dw_addr
, stride
;
1135 driver_location
= driver_location
/ 4;
1138 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1139 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1143 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1145 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1146 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1151 /* Add the constant index to the indirect index */
1152 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1153 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1155 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1161 names
= info
->input_semantic_name
;
1162 indices
= info
->input_semantic_index
;
1164 names
= info
->output_semantic_name
;
1165 indices
= info
->output_semantic_index
;
1168 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1169 vertex_index
, param_index
,
1174 LLVMValueRef value
[4];
1175 for (unsigned i
= 0; i
< num_components
; i
++) {
1176 unsigned offset
= i
;
1177 if (llvm_type_is_64bit(ctx
, type
))
1180 offset
+= component
;
1181 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1184 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1187 static LLVMValueRef
fetch_output_tcs(
1188 struct lp_build_tgsi_context
*bld_base
,
1189 const struct tgsi_full_src_register
*reg
,
1190 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1192 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1193 LLVMValueRef dw_addr
, stride
;
1194 unsigned swizzle
= (swizzle_in
& 0xffff);
1196 if (reg
->Register
.Dimension
) {
1197 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1198 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1199 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1201 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1202 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1205 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1208 static LLVMValueRef
fetch_input_tes(
1209 struct lp_build_tgsi_context
*bld_base
,
1210 const struct tgsi_full_src_register
*reg
,
1211 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1213 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1214 LLVMValueRef base
, addr
;
1215 unsigned swizzle
= (swizzle_in
& 0xffff);
1217 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1218 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1220 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1221 ctx
->tess_offchip_ring
, base
, addr
, true);
1224 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1226 LLVMValueRef vertex_index
,
1227 LLVMValueRef param_index
,
1228 unsigned const_index
,
1230 unsigned driver_location
,
1232 unsigned num_components
,
1237 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1238 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1239 LLVMValueRef base
, addr
;
1241 driver_location
= driver_location
/ 4;
1243 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1246 /* Add the constant index to the indirect index */
1247 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1248 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1250 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1253 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1254 param_index
, driver_location
,
1255 info
->input_semantic_name
,
1256 info
->input_semantic_index
,
1259 /* TODO: This will generate rather ordinary llvm code, although it
1260 * should be easy for the optimiser to fix up. In future we might want
1261 * to refactor buffer_load(), but for now this maximises code sharing
1262 * between the NIR and TGSI backends.
1264 LLVMValueRef value
[4];
1265 for (unsigned i
= 0; i
< num_components
; i
++) {
1266 unsigned offset
= i
;
1267 if (llvm_type_is_64bit(ctx
, type
)) {
1270 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1273 driver_location
+ 1,
1274 info
->input_semantic_name
,
1275 info
->input_semantic_index
,
1279 offset
= offset
% 4;
1282 offset
+= component
;
1283 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1284 ctx
->tess_offchip_ring
, base
, addr
, true);
1287 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1290 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1291 const struct tgsi_full_instruction
*inst
,
1292 const struct tgsi_opcode_info
*info
,
1294 LLVMValueRef dst
[4])
1296 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1297 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1298 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1299 unsigned chan_index
;
1300 LLVMValueRef dw_addr
, stride
;
1301 LLVMValueRef buffer
, base
, buf_addr
;
1302 LLVMValueRef values
[4];
1303 bool skip_lds_store
;
1304 bool is_tess_factor
= false, is_tess_inner
= false;
1306 /* Only handle per-patch and per-vertex outputs here.
1307 * Vectors will be lowered to scalars and this function will be called again.
1309 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1310 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1311 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1315 if (reg
->Register
.Dimension
) {
1316 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1317 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1318 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1319 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1321 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1322 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1323 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1325 if (!reg
->Register
.Indirect
) {
1326 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1328 /* Always write tess factors into LDS for the TCS epilog. */
1329 if (name
== TGSI_SEMANTIC_TESSINNER
||
1330 name
== TGSI_SEMANTIC_TESSOUTER
) {
1331 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1332 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1333 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1334 is_tess_factor
= true;
1335 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1340 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1342 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1343 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1345 uint32_t writemask
= reg
->Register
.WriteMask
;
1347 chan_index
= u_bit_scan(&writemask
);
1348 LLVMValueRef value
= dst
[chan_index
];
1350 if (inst
->Instruction
.Saturate
)
1351 value
= ac_build_clamp(&ctx
->ac
, value
);
1353 /* Skip LDS stores if there is no LDS read of this output. */
1354 if (!skip_lds_store
)
1355 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1357 value
= ac_to_integer(&ctx
->ac
, value
);
1358 values
[chan_index
] = value
;
1360 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1361 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1363 4 * chan_index
, ac_glc
, false);
1366 /* Write tess factors into VGPRs for the epilog. */
1367 if (is_tess_factor
&&
1368 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1369 if (!is_tess_inner
) {
1370 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1371 ctx
->invoc0_tess_factors
[chan_index
]);
1372 } else if (chan_index
< 2) {
1373 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1374 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1379 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1380 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1382 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1383 base
, 0, ac_glc
, false);
1387 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1388 const struct nir_variable
*var
,
1389 LLVMValueRef vertex_index
,
1390 LLVMValueRef param_index
,
1391 unsigned const_index
,
1395 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1396 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1397 const unsigned component
= var
->data
.location_frac
;
1398 const bool is_patch
= var
->data
.patch
;
1399 unsigned driver_location
= var
->data
.driver_location
;
1400 LLVMValueRef dw_addr
, stride
;
1401 LLVMValueRef buffer
, base
, addr
;
1402 LLVMValueRef values
[8];
1403 bool skip_lds_store
;
1404 bool is_tess_factor
= false, is_tess_inner
= false;
1406 driver_location
= driver_location
/ 4;
1409 /* Add the constant index to the indirect index */
1410 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1411 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1413 if (const_index
!= 0)
1414 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1418 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1419 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1420 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1421 vertex_index
, param_index
,
1423 info
->output_semantic_name
,
1424 info
->output_semantic_index
,
1427 skip_lds_store
= !info
->reads_pervertex_outputs
;
1429 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1430 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1431 vertex_index
, param_index
,
1433 info
->output_semantic_name
,
1434 info
->output_semantic_index
,
1437 skip_lds_store
= !info
->reads_perpatch_outputs
;
1440 int name
= info
->output_semantic_name
[driver_location
];
1442 /* Always write tess factors into LDS for the TCS epilog. */
1443 if (name
== TGSI_SEMANTIC_TESSINNER
||
1444 name
== TGSI_SEMANTIC_TESSOUTER
) {
1445 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1446 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1447 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1448 is_tess_factor
= true;
1449 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1454 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1456 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1458 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1459 param_index
, driver_location
,
1460 info
->output_semantic_name
,
1461 info
->output_semantic_index
,
1464 for (unsigned chan
= 0; chan
< 8; chan
++) {
1465 if (!(writemask
& (1 << chan
)))
1467 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1469 unsigned buffer_store_offset
= chan
% 4;
1471 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1474 driver_location
+ 1,
1475 info
->output_semantic_name
,
1476 info
->output_semantic_index
,
1480 /* Skip LDS stores if there is no LDS read of this output. */
1481 if (!skip_lds_store
)
1482 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1484 value
= ac_to_integer(&ctx
->ac
, value
);
1485 values
[chan
] = value
;
1487 if (writemask
!= 0xF && !is_tess_factor
) {
1488 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1490 4 * buffer_store_offset
,
1494 /* Write tess factors into VGPRs for the epilog. */
1495 if (is_tess_factor
&&
1496 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1497 if (!is_tess_inner
) {
1498 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1499 ctx
->invoc0_tess_factors
[chan
]);
1500 } else if (chan
< 2) {
1501 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1502 ctx
->invoc0_tess_factors
[4 + chan
]);
1507 if (writemask
== 0xF && !is_tess_factor
) {
1508 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1510 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1511 base
, 0, ac_glc
, false);
1515 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1516 unsigned input_index
,
1517 unsigned vtx_offset_param
,
1521 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1522 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1523 struct si_shader
*shader
= ctx
->shader
;
1524 LLVMValueRef vtx_offset
, soffset
;
1525 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1526 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1527 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1531 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1533 /* GFX9 has the ESGS ring in LDS. */
1534 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1535 unsigned index
= vtx_offset_param
;
1537 switch (index
/ 2) {
1539 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1540 index
% 2 ? 16 : 0, 16);
1543 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1544 index
% 2 ? 16 : 0, 16);
1547 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1548 index
% 2 ? 16 : 0, 16);
1555 unsigned offset
= param
* 4 + swizzle
;
1556 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1557 LLVMConstInt(ctx
->i32
, offset
, false), "");
1559 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1560 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1561 if (llvm_type_is_64bit(ctx
, type
)) {
1562 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1563 &ctx
->ac
.i32_1
, 1, "");
1564 LLVMValueRef values
[2] = {
1566 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1568 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1570 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1573 /* GFX6: input load from the ESGS ring in memory. */
1574 if (swizzle
== ~0) {
1575 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1577 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1578 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1581 return ac_build_gather_values(&ctx
->ac
, values
,
1585 /* Get the vertex offset parameter on GFX6. */
1586 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1588 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1589 LLVMConstInt(ctx
->i32
, 4, 0), "");
1591 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1593 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1594 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1595 if (llvm_type_is_64bit(ctx
, type
)) {
1596 LLVMValueRef value2
;
1597 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1599 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1600 ctx
->i32_0
, vtx_offset
, soffset
,
1601 0, ac_glc
, true, false);
1602 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1604 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1607 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1609 unsigned driver_location
,
1611 unsigned num_components
,
1612 unsigned vertex_index
,
1613 unsigned const_index
,
1616 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1618 LLVMValueRef value
[4];
1619 for (unsigned i
= 0; i
< num_components
; i
++) {
1620 unsigned offset
= i
;
1621 if (llvm_type_is_64bit(ctx
, type
))
1624 offset
+= component
;
1625 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1626 vertex_index
, type
, offset
);
1629 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1632 static LLVMValueRef
fetch_input_gs(
1633 struct lp_build_tgsi_context
*bld_base
,
1634 const struct tgsi_full_src_register
*reg
,
1635 enum tgsi_opcode_type type
,
1636 unsigned swizzle_in
)
1638 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1639 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1640 unsigned swizzle
= swizzle_in
& 0xffff;
1642 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1643 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1644 return si_get_primitive_id(ctx
, swizzle
);
1646 if (!reg
->Register
.Dimension
)
1649 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1650 reg
->Dimension
.Index
,
1651 tgsi2llvmtype(bld_base
, type
),
1655 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1657 switch (interpolate
) {
1658 case TGSI_INTERPOLATE_CONSTANT
:
1661 case TGSI_INTERPOLATE_LINEAR
:
1662 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1663 return SI_PARAM_LINEAR_SAMPLE
;
1664 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1665 return SI_PARAM_LINEAR_CENTROID
;
1667 return SI_PARAM_LINEAR_CENTER
;
1669 case TGSI_INTERPOLATE_COLOR
:
1670 case TGSI_INTERPOLATE_PERSPECTIVE
:
1671 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1672 return SI_PARAM_PERSP_SAMPLE
;
1673 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1674 return SI_PARAM_PERSP_CENTROID
;
1676 return SI_PARAM_PERSP_CENTER
;
1679 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1684 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1685 unsigned attr_index
, unsigned chan
,
1686 LLVMValueRef prim_mask
,
1687 LLVMValueRef i
, LLVMValueRef j
)
1690 return ac_build_fs_interp(&ctx
->ac
,
1691 LLVMConstInt(ctx
->i32
, chan
, 0),
1692 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1695 return ac_build_fs_interp_mov(&ctx
->ac
,
1696 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1697 LLVMConstInt(ctx
->i32
, chan
, 0),
1698 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1703 * Interpolate a fragment shader input.
1705 * @param ctx context
1706 * @param input_index index of the input in hardware
1707 * @param semantic_name TGSI_SEMANTIC_*
1708 * @param semantic_index semantic index
1709 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1710 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1711 * @param interp_param interpolation weights (i,j)
1712 * @param prim_mask SI_PARAM_PRIM_MASK
1713 * @param face SI_PARAM_FRONT_FACE
1714 * @param result the return value (4 components)
1716 static void interp_fs_input(struct si_shader_context
*ctx
,
1717 unsigned input_index
,
1718 unsigned semantic_name
,
1719 unsigned semantic_index
,
1720 unsigned num_interp_inputs
,
1721 unsigned colors_read_mask
,
1722 LLVMValueRef interp_param
,
1723 LLVMValueRef prim_mask
,
1725 LLVMValueRef result
[4])
1727 LLVMValueRef i
= NULL
, j
= NULL
;
1730 /* fs.constant returns the param from the middle vertex, so it's not
1731 * really useful for flat shading. It's meant to be used for custom
1732 * interpolation (but the intrinsic can't fetch from the other two
1735 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1736 * to do the right thing. The only reason we use fs.constant is that
1737 * fs.interp cannot be used on integers, because they can be equal
1740 * When interp is false we will use fs.constant or for newer llvm,
1741 * amdgcn.interp.mov.
1743 bool interp
= interp_param
!= NULL
;
1746 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1747 LLVMVectorType(ctx
->f32
, 2), "");
1749 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1751 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1755 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1756 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1757 LLVMValueRef is_face_positive
;
1759 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1760 * otherwise it's at offset "num_inputs".
1762 unsigned back_attr_offset
= num_interp_inputs
;
1763 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1764 back_attr_offset
+= 1;
1766 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1767 face
, ctx
->i32_0
, "");
1769 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1770 LLVMValueRef front
, back
;
1772 front
= si_build_fs_interp(ctx
,
1775 back
= si_build_fs_interp(ctx
,
1776 back_attr_offset
, chan
,
1779 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1785 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1786 result
[0] = si_build_fs_interp(ctx
, input_index
,
1787 0, prim_mask
, i
, j
);
1789 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1790 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1792 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1793 result
[chan
] = si_build_fs_interp(ctx
,
1800 void si_llvm_load_input_fs(
1801 struct si_shader_context
*ctx
,
1802 unsigned input_index
,
1803 LLVMValueRef out
[4])
1805 struct si_shader
*shader
= ctx
->shader
;
1806 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1807 LLVMValueRef main_fn
= ctx
->main_fn
;
1808 LLVMValueRef interp_param
= NULL
;
1809 int interp_param_idx
;
1810 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1811 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1812 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1813 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1815 /* Get colors from input VGPRs (set by the prolog). */
1816 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1817 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1818 unsigned mask
= colors_read
>> (semantic_index
* 4);
1819 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1820 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1821 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1823 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1824 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1825 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1826 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1830 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1831 if (interp_param_idx
== -1)
1833 else if (interp_param_idx
) {
1834 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1837 interp_fs_input(ctx
, input_index
, semantic_name
,
1838 semantic_index
, 0, /* this param is unused */
1839 shader
->selector
->info
.colors_read
, interp_param
,
1841 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1845 static void declare_input_fs(
1846 struct si_shader_context
*ctx
,
1847 unsigned input_index
,
1848 const struct tgsi_full_declaration
*decl
,
1849 LLVMValueRef out
[4])
1851 si_llvm_load_input_fs(ctx
, input_index
, out
);
1854 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1856 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1859 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1861 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1863 /* For non-indexed draws, the base vertex set by the driver
1864 * (for direct draws) or the CP (for indirect draws) is the
1865 * first vertex ID, but GLSL expects 0 to be returned.
1867 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1868 ctx
->param_vs_state_bits
);
1869 LLVMValueRef indexed
;
1871 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1872 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1874 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1878 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1880 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1882 LLVMValueRef values
[3];
1883 LLVMValueRef result
;
1885 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1887 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1888 unsigned sizes
[3] = {
1889 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1890 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1891 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1894 for (i
= 0; i
< 3; ++i
)
1895 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1897 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1899 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1906 * Load a dword from a constant buffer.
1908 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1909 LLVMValueRef resource
,
1910 LLVMValueRef offset
)
1912 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1916 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1918 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1919 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1920 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1921 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1923 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1924 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1925 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1927 LLVMValueRef pos
[4] = {
1928 buffer_load_const(ctx
, resource
, offset0
),
1929 buffer_load_const(ctx
, resource
, offset1
),
1930 LLVMConstReal(ctx
->f32
, 0),
1931 LLVMConstReal(ctx
->f32
, 0)
1934 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1937 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1939 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1940 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1943 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1945 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1946 LLVMValueRef coord
[4] = {
1947 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1948 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1953 /* For triangles, the vector should be (u, v, 1-u-v). */
1954 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1955 PIPE_PRIM_TRIANGLES
) {
1956 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1957 LLVMBuildFAdd(ctx
->ac
.builder
,
1958 coord
[0], coord
[1], ""), "");
1960 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1963 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1964 unsigned semantic_name
)
1966 LLVMValueRef base
, addr
;
1968 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1970 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1971 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1972 LLVMConstInt(ctx
->i32
, param
, 0));
1974 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1975 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1979 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1980 unsigned varying_id
)
1982 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1983 unsigned semantic_name
;
1985 switch (varying_id
) {
1986 case VARYING_SLOT_TESS_LEVEL_INNER
:
1987 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1989 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1990 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1993 unreachable("unknown tess level");
1996 return load_tess_level(ctx
, semantic_name
);
2000 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2002 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2003 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2004 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2005 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2006 return get_num_tcs_out_vertices(ctx
);
2008 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2011 void si_load_system_value(struct si_shader_context
*ctx
,
2013 const struct tgsi_full_declaration
*decl
)
2015 LLVMValueRef value
= 0;
2017 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2019 switch (decl
->Semantic
.Name
) {
2020 case TGSI_SEMANTIC_INSTANCEID
:
2021 value
= ctx
->abi
.instance_id
;
2024 case TGSI_SEMANTIC_VERTEXID
:
2025 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2027 ctx
->abi
.base_vertex
, "");
2030 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2031 /* Unused. Clarify the meaning in indexed vs. non-indexed
2032 * draws if this is ever used again. */
2036 case TGSI_SEMANTIC_BASEVERTEX
:
2037 value
= get_base_vertex(&ctx
->abi
);
2040 case TGSI_SEMANTIC_BASEINSTANCE
:
2041 value
= ctx
->abi
.start_instance
;
2044 case TGSI_SEMANTIC_DRAWID
:
2045 value
= ctx
->abi
.draw_id
;
2048 case TGSI_SEMANTIC_INVOCATIONID
:
2049 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2050 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2051 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2052 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2053 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2054 ctx
->abi
.gs_invocation_id
,
2055 LLVMConstInt(ctx
->i32
, 127, 0), "");
2057 value
= ctx
->abi
.gs_invocation_id
;
2060 assert(!"INVOCATIONID not implemented");
2064 case TGSI_SEMANTIC_POSITION
:
2066 LLVMValueRef pos
[4] = {
2067 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2068 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2069 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2070 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2071 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2073 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2077 case TGSI_SEMANTIC_FACE
:
2078 value
= ctx
->abi
.front_face
;
2081 case TGSI_SEMANTIC_SAMPLEID
:
2082 value
= si_get_sample_id(ctx
);
2085 case TGSI_SEMANTIC_SAMPLEPOS
: {
2086 LLVMValueRef pos
[4] = {
2087 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2088 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2089 LLVMConstReal(ctx
->f32
, 0),
2090 LLVMConstReal(ctx
->f32
, 0)
2092 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2093 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2094 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2098 case TGSI_SEMANTIC_SAMPLEMASK
:
2099 /* This can only occur with the OpenGL Core profile, which
2100 * doesn't support smoothing.
2102 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2105 case TGSI_SEMANTIC_TESSCOORD
:
2106 value
= si_load_tess_coord(&ctx
->abi
);
2109 case TGSI_SEMANTIC_VERTICESIN
:
2110 value
= si_load_patch_vertices_in(&ctx
->abi
);
2113 case TGSI_SEMANTIC_TESSINNER
:
2114 case TGSI_SEMANTIC_TESSOUTER
:
2115 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2118 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2119 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2121 LLVMValueRef buf
, slot
, val
[4];
2124 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2125 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2126 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2127 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2129 for (i
= 0; i
< 4; i
++)
2130 val
[i
] = buffer_load_const(ctx
, buf
,
2131 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2132 value
= ac_build_gather_values(&ctx
->ac
, val
, 4);
2136 case TGSI_SEMANTIC_PRIMID
:
2137 value
= si_get_primitive_id(ctx
, 0);
2140 case TGSI_SEMANTIC_GRID_SIZE
:
2141 value
= ctx
->abi
.num_work_groups
;
2144 case TGSI_SEMANTIC_BLOCK_SIZE
:
2145 value
= get_block_size(&ctx
->abi
);
2148 case TGSI_SEMANTIC_BLOCK_ID
:
2150 LLVMValueRef values
[3];
2152 for (int i
= 0; i
< 3; i
++) {
2153 values
[i
] = ctx
->i32_0
;
2154 if (ctx
->abi
.workgroup_ids
[i
]) {
2155 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2158 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2162 case TGSI_SEMANTIC_THREAD_ID
:
2163 value
= ctx
->abi
.local_invocation_ids
;
2166 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2167 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2170 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2171 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2174 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2175 value
= ac_get_thread_id(&ctx
->ac
);
2178 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2180 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2181 if (ctx
->ac
.wave_size
== 64)
2182 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2183 value
= LLVMBuildShl(ctx
->ac
.builder
,
2184 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2185 if (ctx
->ac
.wave_size
== 32)
2186 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2187 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2191 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2192 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2193 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2194 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2196 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2197 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2198 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2199 /* All bits set except LSB */
2200 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2203 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2205 if (ctx
->ac
.wave_size
== 64)
2206 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2207 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2208 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2209 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2210 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2211 if (ctx
->ac
.wave_size
== 32)
2212 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2213 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2217 case TGSI_SEMANTIC_CS_USER_DATA
:
2218 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2222 assert(!"unknown system value");
2226 ctx
->system_values
[index
] = value
;
2229 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2231 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2232 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2234 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2237 assert(!ctx
->ac
.lds
);
2239 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2240 LLVMArrayType(ctx
->i8
, lds_size
),
2243 LLVMSetAlignment(var
, 64 * 1024);
2245 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2248 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2249 const struct tgsi_full_declaration
*decl
)
2251 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2252 assert(decl
->Range
.First
== decl
->Range
.Last
);
2254 si_declare_compute_memory(ctx
);
2257 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2260 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2261 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2263 /* Do the bounds checking with a descriptor, because
2264 * doing computation and manual bounds checking of 64-bit
2265 * addresses generates horrible VALU code with very high
2266 * VGPR usage and very low SIMD occupancy.
2268 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2270 LLVMValueRef desc0
, desc1
;
2272 desc1
= LLVMConstInt(ctx
->i32
,
2273 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2275 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2276 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2277 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2278 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2280 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2281 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2282 S_008F0C_OOB_SELECT(3) |
2283 S_008F0C_RESOURCE_LEVEL(1);
2285 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2286 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2288 LLVMValueRef desc_elems
[] = {
2291 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2292 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2295 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2298 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2300 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2301 ctx
->param_const_and_shader_buffers
);
2303 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2304 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2307 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2309 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2310 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2312 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2314 if (sel
->info
.const_buffers_declared
== 1 &&
2315 sel
->info
.shader_buffers_declared
== 0) {
2316 return load_const_buffer_desc_fast_path(ctx
);
2319 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2320 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2321 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2323 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2327 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2329 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2330 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2331 ctx
->param_const_and_shader_buffers
);
2333 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2334 index
= LLVMBuildSub(ctx
->ac
.builder
,
2335 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2338 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2341 static LLVMValueRef
fetch_constant(
2342 struct lp_build_tgsi_context
*bld_base
,
2343 const struct tgsi_full_src_register
*reg
,
2344 enum tgsi_opcode_type type
,
2345 unsigned swizzle_in
)
2347 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2348 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2349 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2351 unsigned swizzle
= swizzle_in
& 0xffff;
2353 LLVMValueRef addr
, bufp
;
2355 if (swizzle_in
== LP_CHAN_ALL
) {
2357 LLVMValueRef values
[4];
2358 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2359 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2361 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2364 /* Split 64-bit loads. */
2365 if (tgsi_type_is_64bit(type
)) {
2366 LLVMValueRef lo
, hi
;
2368 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2369 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2370 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2374 idx
= reg
->Register
.Index
* 4 + swizzle
;
2375 if (reg
->Register
.Indirect
) {
2376 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2378 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2381 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2382 if (sel
->info
.const_buffers_declared
== 1 &&
2383 sel
->info
.shader_buffers_declared
== 0) {
2384 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2385 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2386 return bitcast(bld_base
, type
, result
);
2389 assert(reg
->Register
.Dimension
);
2390 buf
= reg
->Dimension
.Index
;
2392 if (reg
->Dimension
.Indirect
) {
2393 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2395 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2396 reg
->Dimension
.Index
,
2397 ctx
->num_const_buffers
);
2398 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2399 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2400 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2402 bufp
= load_const_buffer_desc(ctx
, buf
);
2404 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2407 /* Initialize arguments for the shader export intrinsic */
2408 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2409 LLVMValueRef
*values
,
2411 struct ac_export_args
*args
)
2413 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2414 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2416 bool is_int8
, is_int10
;
2418 /* Default is 0xf. Adjusted below depending on the format. */
2419 args
->enabled_channels
= 0xf; /* writemask */
2421 /* Specify whether the EXEC mask represents the valid mask */
2422 args
->valid_mask
= 0;
2424 /* Specify whether this is the last export */
2427 /* Specify the target we are exporting */
2428 args
->target
= target
;
2430 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2431 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2432 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2433 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2435 assert(cbuf
>= 0 && cbuf
< 8);
2436 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2437 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2438 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2441 args
->compr
= false;
2442 args
->out
[0] = f32undef
;
2443 args
->out
[1] = f32undef
;
2444 args
->out
[2] = f32undef
;
2445 args
->out
[3] = f32undef
;
2447 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2448 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2449 unsigned bits
, bool hi
) = NULL
;
2451 switch (spi_shader_col_format
) {
2452 case V_028714_SPI_SHADER_ZERO
:
2453 args
->enabled_channels
= 0; /* writemask */
2454 args
->target
= V_008DFC_SQ_EXP_NULL
;
2457 case V_028714_SPI_SHADER_32_R
:
2458 args
->enabled_channels
= 1; /* writemask */
2459 args
->out
[0] = values
[0];
2462 case V_028714_SPI_SHADER_32_GR
:
2463 args
->enabled_channels
= 0x3; /* writemask */
2464 args
->out
[0] = values
[0];
2465 args
->out
[1] = values
[1];
2468 case V_028714_SPI_SHADER_32_AR
:
2469 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2470 args
->enabled_channels
= 0x3; /* writemask */
2471 args
->out
[0] = values
[0];
2472 args
->out
[1] = values
[3];
2474 args
->enabled_channels
= 0x9; /* writemask */
2475 args
->out
[0] = values
[0];
2476 args
->out
[3] = values
[3];
2480 case V_028714_SPI_SHADER_FP16_ABGR
:
2481 packf
= ac_build_cvt_pkrtz_f16
;
2484 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2485 packf
= ac_build_cvt_pknorm_u16
;
2488 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2489 packf
= ac_build_cvt_pknorm_i16
;
2492 case V_028714_SPI_SHADER_UINT16_ABGR
:
2493 packi
= ac_build_cvt_pk_u16
;
2496 case V_028714_SPI_SHADER_SINT16_ABGR
:
2497 packi
= ac_build_cvt_pk_i16
;
2500 case V_028714_SPI_SHADER_32_ABGR
:
2501 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2505 /* Pack f16 or norm_i16/u16. */
2507 for (chan
= 0; chan
< 2; chan
++) {
2508 LLVMValueRef pack_args
[2] = {
2510 values
[2 * chan
+ 1]
2512 LLVMValueRef packed
;
2514 packed
= packf(&ctx
->ac
, pack_args
);
2515 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2517 args
->compr
= 1; /* COMPR flag */
2521 for (chan
= 0; chan
< 2; chan
++) {
2522 LLVMValueRef pack_args
[2] = {
2523 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2524 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2526 LLVMValueRef packed
;
2528 packed
= packi(&ctx
->ac
, pack_args
,
2529 is_int8
? 8 : is_int10
? 10 : 16,
2531 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2533 args
->compr
= 1; /* COMPR flag */
2537 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2540 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2542 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2543 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2544 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2545 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2546 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2547 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2548 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2549 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2551 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2554 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2555 SI_PARAM_ALPHA_REF
);
2556 LLVMValueRef alpha_pass
=
2557 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2558 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2560 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2564 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2566 unsigned samplemask_param
)
2568 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2569 LLVMValueRef coverage
;
2571 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2572 coverage
= LLVMGetParam(ctx
->main_fn
,
2574 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2576 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2578 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2580 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2583 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2584 LLVMConstReal(ctx
->f32
,
2585 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2587 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2590 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2591 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2595 unsigned const_chan
;
2596 LLVMValueRef base_elt
;
2597 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2598 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2599 SI_VS_CONST_CLIP_PLANES
, 0);
2600 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2602 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2603 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2608 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2610 /* Compute dot products of position and user clip plane vectors */
2611 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2612 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2614 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2615 const_chan
) * 4, 0);
2616 base_elt
= buffer_load_const(ctx
, const_resource
,
2618 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2619 out_elts
[const_chan
], args
->out
[chan
]);
2623 args
->enabled_channels
= 0xf;
2624 args
->valid_mask
= 0;
2626 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2631 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2635 if (so
->num_outputs
)
2636 fprintf(stderr
, "STREAMOUT\n");
2638 for (i
= 0; i
< so
->num_outputs
; i
++) {
2639 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2640 so
->output
[i
].start_component
;
2641 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2642 i
, so
->output
[i
].output_buffer
,
2643 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2644 so
->output
[i
].register_index
,
2645 mask
& 1 ? "x" : "",
2646 mask
& 2 ? "y" : "",
2647 mask
& 4 ? "z" : "",
2648 mask
& 8 ? "w" : "");
2652 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2653 LLVMValueRef
const *so_buffers
,
2654 LLVMValueRef
const *so_write_offsets
,
2655 struct pipe_stream_output
*stream_out
,
2656 struct si_shader_output_values
*shader_out
)
2658 unsigned buf_idx
= stream_out
->output_buffer
;
2659 unsigned start
= stream_out
->start_component
;
2660 unsigned num_comps
= stream_out
->num_components
;
2661 LLVMValueRef out
[4];
2663 assert(num_comps
&& num_comps
<= 4);
2664 if (!num_comps
|| num_comps
> 4)
2667 /* Load the output as int. */
2668 for (int j
= 0; j
< num_comps
; j
++) {
2669 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2671 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2674 /* Pack the output. */
2675 LLVMValueRef vdata
= NULL
;
2677 switch (num_comps
) {
2678 case 1: /* as i32 */
2681 case 2: /* as v2i32 */
2682 case 3: /* as v3i32 */
2683 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2684 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2687 /* as v4i32 (aligned to 4) */
2688 out
[3] = LLVMGetUndef(ctx
->i32
);
2690 case 4: /* as v4i32 */
2691 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2695 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2697 so_write_offsets
[buf_idx
],
2699 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
, false);
2703 * Write streamout data to buffers for vertex stream @p stream (different
2704 * vertex streams can occur for GS copy shaders).
2706 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2707 struct si_shader_output_values
*outputs
,
2708 unsigned noutput
, unsigned stream
)
2710 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2711 struct pipe_stream_output_info
*so
= &sel
->so
;
2712 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2714 struct lp_build_if_state if_ctx
;
2716 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2717 LLVMValueRef so_vtx_count
=
2718 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2720 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2722 /* can_emit = tid < so_vtx_count; */
2723 LLVMValueRef can_emit
=
2724 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2726 /* Emit the streamout code conditionally. This actually avoids
2727 * out-of-bounds buffer access. The hw tells us via the SGPR
2728 * (so_vtx_count) which threads are allowed to emit streamout data. */
2729 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2731 /* The buffer offset is computed as follows:
2732 * ByteOffset = streamout_offset[buffer_id]*4 +
2733 * (streamout_write_index + thread_id)*stride[buffer_id] +
2737 LLVMValueRef so_write_index
=
2738 LLVMGetParam(ctx
->main_fn
,
2739 ctx
->param_streamout_write_index
);
2741 /* Compute (streamout_write_index + thread_id). */
2742 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2744 /* Load the descriptor and compute the write offset for each
2745 * enabled buffer. */
2746 LLVMValueRef so_write_offset
[4] = {};
2747 LLVMValueRef so_buffers
[4];
2748 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2749 ctx
->param_rw_buffers
);
2751 for (i
= 0; i
< 4; i
++) {
2755 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2756 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2758 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2760 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2761 ctx
->param_streamout_offset
[i
]);
2762 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2764 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2765 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2769 /* Write streamout data. */
2770 for (i
= 0; i
< so
->num_outputs
; i
++) {
2771 unsigned reg
= so
->output
[i
].register_index
;
2776 if (stream
!= so
->output
[i
].stream
)
2779 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2780 &so
->output
[i
], &outputs
[reg
]);
2783 lp_build_endif(&if_ctx
);
2786 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2787 LLVMValueRef
*values
)
2789 struct ac_export_args args
;
2791 si_llvm_init_export_args(ctx
, values
,
2792 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2793 ac_build_export(&ctx
->ac
, &args
);
2796 static void si_build_param_exports(struct si_shader_context
*ctx
,
2797 struct si_shader_output_values
*outputs
,
2800 struct si_shader
*shader
= ctx
->shader
;
2801 unsigned param_count
= 0;
2803 for (unsigned i
= 0; i
< noutput
; i
++) {
2804 unsigned semantic_name
= outputs
[i
].semantic_name
;
2805 unsigned semantic_index
= outputs
[i
].semantic_index
;
2807 if (outputs
[i
].vertex_stream
[0] != 0 &&
2808 outputs
[i
].vertex_stream
[1] != 0 &&
2809 outputs
[i
].vertex_stream
[2] != 0 &&
2810 outputs
[i
].vertex_stream
[3] != 0)
2813 switch (semantic_name
) {
2814 case TGSI_SEMANTIC_LAYER
:
2815 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2816 case TGSI_SEMANTIC_CLIPDIST
:
2817 case TGSI_SEMANTIC_COLOR
:
2818 case TGSI_SEMANTIC_BCOLOR
:
2819 case TGSI_SEMANTIC_PRIMID
:
2820 case TGSI_SEMANTIC_FOG
:
2821 case TGSI_SEMANTIC_TEXCOORD
:
2822 case TGSI_SEMANTIC_GENERIC
:
2828 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2829 semantic_index
< SI_MAX_IO_GENERIC
) &&
2830 shader
->key
.opt
.kill_outputs
&
2831 (1ull << si_shader_io_get_unique_index(semantic_name
,
2832 semantic_index
, true)))
2835 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2837 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2838 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2841 shader
->info
.nr_param_exports
= param_count
;
2845 * Vertex color clamping.
2847 * This uses a state constant loaded in a user data SGPR and
2848 * an IF statement is added that clamps all colors if the constant
2851 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2852 struct si_shader_output_values
*outputs
,
2855 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2856 bool has_colors
= false;
2858 /* Store original colors to alloca variables. */
2859 for (unsigned i
= 0; i
< noutput
; i
++) {
2860 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2861 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2864 for (unsigned j
= 0; j
< 4; j
++) {
2865 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2866 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2874 /* The state is in the first bit of the user SGPR. */
2875 LLVMValueRef cond
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2876 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2878 struct lp_build_if_state if_ctx
;
2879 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
2881 /* Store clamped colors to alloca variables within the conditional block. */
2882 for (unsigned i
= 0; i
< noutput
; i
++) {
2883 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2884 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2887 for (unsigned j
= 0; j
< 4; j
++) {
2888 LLVMBuildStore(ctx
->ac
.builder
,
2889 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2893 lp_build_endif(&if_ctx
);
2895 /* Load clamped colors */
2896 for (unsigned i
= 0; i
< noutput
; i
++) {
2897 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2898 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2901 for (unsigned j
= 0; j
< 4; j
++) {
2902 outputs
[i
].values
[j
] =
2903 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2908 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2909 * (position and parameter data only).
2911 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2912 struct si_shader_output_values
*outputs
,
2915 struct si_shader
*shader
= ctx
->shader
;
2916 struct ac_export_args pos_args
[4] = {};
2917 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2921 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2923 /* Build position exports. */
2924 for (i
= 0; i
< noutput
; i
++) {
2925 switch (outputs
[i
].semantic_name
) {
2926 case TGSI_SEMANTIC_POSITION
:
2927 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2928 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2930 case TGSI_SEMANTIC_PSIZE
:
2931 psize_value
= outputs
[i
].values
[0];
2933 case TGSI_SEMANTIC_LAYER
:
2934 layer_value
= outputs
[i
].values
[0];
2936 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2937 viewport_index_value
= outputs
[i
].values
[0];
2939 case TGSI_SEMANTIC_EDGEFLAG
:
2940 edgeflag_value
= outputs
[i
].values
[0];
2942 case TGSI_SEMANTIC_CLIPDIST
:
2943 if (!shader
->key
.opt
.clip_disable
) {
2944 unsigned index
= 2 + outputs
[i
].semantic_index
;
2945 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2946 V_008DFC_SQ_EXP_POS
+ index
,
2950 case TGSI_SEMANTIC_CLIPVERTEX
:
2951 if (!shader
->key
.opt
.clip_disable
) {
2952 si_llvm_emit_clipvertex(ctx
, pos_args
,
2959 /* We need to add the position output manually if it's missing. */
2960 if (!pos_args
[0].out
[0]) {
2961 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2962 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2963 pos_args
[0].done
= 0; /* last export? */
2964 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2965 pos_args
[0].compr
= 0; /* COMPR flag */
2966 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2967 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2968 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2969 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2972 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2973 if (shader
->selector
->info
.writes_psize
||
2974 shader
->selector
->pos_writes_edgeflag
||
2975 shader
->selector
->info
.writes_viewport_index
||
2976 shader
->selector
->info
.writes_layer
) {
2977 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2978 (shader
->selector
->pos_writes_edgeflag
<< 1) |
2979 (shader
->selector
->info
.writes_layer
<< 2);
2981 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2982 pos_args
[1].done
= 0; /* last export? */
2983 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2984 pos_args
[1].compr
= 0; /* COMPR flag */
2985 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2986 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2987 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2988 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2990 if (shader
->selector
->info
.writes_psize
)
2991 pos_args
[1].out
[0] = psize_value
;
2993 if (shader
->selector
->pos_writes_edgeflag
) {
2994 /* The output is a float, but the hw expects an integer
2995 * with the first bit containing the edge flag. */
2996 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2999 edgeflag_value
= ac_build_umin(&ctx
->ac
,
3003 /* The LLVM intrinsic expects a float. */
3004 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
3007 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3008 /* GFX9 has the layer in out.z[10:0] and the viewport
3009 * index in out.z[19:16].
3011 if (shader
->selector
->info
.writes_layer
)
3012 pos_args
[1].out
[2] = layer_value
;
3014 if (shader
->selector
->info
.writes_viewport_index
) {
3015 LLVMValueRef v
= viewport_index_value
;
3017 v
= ac_to_integer(&ctx
->ac
, v
);
3018 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3019 LLVMConstInt(ctx
->i32
, 16, 0), "");
3020 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3021 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3022 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3023 pos_args
[1].enabled_channels
|= 1 << 2;
3026 if (shader
->selector
->info
.writes_layer
)
3027 pos_args
[1].out
[2] = layer_value
;
3029 if (shader
->selector
->info
.writes_viewport_index
) {
3030 pos_args
[1].out
[3] = viewport_index_value
;
3031 pos_args
[1].enabled_channels
|= 1 << 3;
3036 for (i
= 0; i
< 4; i
++)
3037 if (pos_args
[i
].out
[0])
3038 shader
->info
.nr_pos_exports
++;
3040 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3041 * Setting valid_mask=1 prevents it and has no other effect.
3043 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3044 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3045 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3046 pos_args
[0].valid_mask
= 1;
3049 for (i
= 0; i
< 4; i
++) {
3050 if (!pos_args
[i
].out
[0])
3053 /* Specify the target we are exporting */
3054 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3056 if (pos_idx
== shader
->info
.nr_pos_exports
)
3057 /* Specify that this is the last export */
3058 pos_args
[i
].done
= 1;
3060 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3063 /* Build parameter exports. */
3064 si_build_param_exports(ctx
, outputs
, noutput
);
3068 * Forward all outputs from the vertex shader to the TES. This is only used
3069 * for the fixed function TCS.
3071 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3073 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3074 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3075 LLVMValueRef lds_vertex_stride
, lds_base
;
3078 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3079 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3080 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3082 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3083 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3084 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3087 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3089 unsigned i
= u_bit_scan64(&inputs
);
3091 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3092 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3095 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3096 get_rel_patch_id(ctx
),
3098 LLVMConstInt(ctx
->i32
, i
, 0));
3100 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3102 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3103 buffer_offset
, 0, ac_glc
, false);
3107 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3108 LLVMValueRef rel_patch_id
,
3109 LLVMValueRef invocation_id
,
3110 LLVMValueRef tcs_out_current_patch_data_offset
,
3111 LLVMValueRef invoc0_tf_outer
[4],
3112 LLVMValueRef invoc0_tf_inner
[2])
3114 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3115 struct si_shader
*shader
= ctx
->shader
;
3116 unsigned tess_inner_index
, tess_outer_index
;
3117 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3118 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3119 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3120 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3122 /* Add a barrier before loading tess factors from LDS. */
3123 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3124 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3126 /* Do this only for invocation 0, because the tess levels are per-patch,
3129 * This can't jump, because invocation 0 executes this. It should
3130 * at least mask out the loads and stores for other invocations.
3132 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3133 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3134 invocation_id
, ctx
->i32_0
, ""));
3136 /* Determine the layout of one tess factor element in the buffer. */
3137 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3138 case PIPE_PRIM_LINES
:
3139 stride
= 2; /* 2 dwords, 1 vec2 store */
3143 case PIPE_PRIM_TRIANGLES
:
3144 stride
= 4; /* 4 dwords, 1 vec4 store */
3148 case PIPE_PRIM_QUADS
:
3149 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3158 for (i
= 0; i
< 4; i
++) {
3159 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3160 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3163 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3164 /* Tess factors are in VGPRs. */
3165 for (i
= 0; i
< outer_comps
; i
++)
3166 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3167 for (i
= 0; i
< inner_comps
; i
++)
3168 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3170 /* Load tess_inner and tess_outer from LDS.
3171 * Any invocation can write them, so we can't get them from a temporary.
3173 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3174 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3176 lds_base
= tcs_out_current_patch_data_offset
;
3177 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3178 LLVMConstInt(ctx
->i32
,
3179 tess_inner_index
* 4, 0), "");
3180 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3181 LLVMConstInt(ctx
->i32
,
3182 tess_outer_index
* 4, 0), "");
3184 for (i
= 0; i
< outer_comps
; i
++) {
3186 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3188 for (i
= 0; i
< inner_comps
; i
++) {
3189 inner
[i
] = out
[outer_comps
+i
] =
3190 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3194 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3195 /* For isolines, the hardware expects tess factors in the
3196 * reverse order from what GLSL / TGSI specify.
3198 LLVMValueRef tmp
= out
[0];
3203 /* Convert the outputs to vectors for stores. */
3204 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3208 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3210 /* Get the buffer. */
3211 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3213 /* Get the offset. */
3214 tf_base
= LLVMGetParam(ctx
->main_fn
,
3215 ctx
->param_tcs_factor_offset
);
3216 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3217 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3219 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3220 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3221 rel_patch_id
, ctx
->i32_0
, ""));
3223 /* Store the dynamic HS control word. */
3225 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3226 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3227 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3228 1, ctx
->i32_0
, tf_base
,
3229 offset
, ac_glc
, false);
3233 lp_build_endif(&inner_if_ctx
);
3235 /* Store the tessellation factors. */
3236 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3237 MIN2(stride
, 4), byteoffset
, tf_base
,
3238 offset
, ac_glc
, false);
3241 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3242 stride
- 4, byteoffset
, tf_base
,
3243 offset
, ac_glc
, false);
3245 /* Store the tess factors into the offchip buffer if TES reads them. */
3246 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3247 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3248 LLVMValueRef tf_inner_offset
;
3249 unsigned param_outer
, param_inner
;
3251 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3252 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3254 param_outer
= si_shader_io_get_unique_index_patch(
3255 TGSI_SEMANTIC_TESSOUTER
, 0);
3256 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3257 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3259 unsigned outer_vec_size
=
3260 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3261 outer_comps
: util_next_power_of_two(outer_comps
);
3262 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3264 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3265 outer_comps
, tf_outer_offset
,
3266 base
, 0, ac_glc
, false);
3268 param_inner
= si_shader_io_get_unique_index_patch(
3269 TGSI_SEMANTIC_TESSINNER
, 0);
3270 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3271 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3273 inner_vec
= inner_comps
== 1 ? inner
[0] :
3274 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3275 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3276 inner_comps
, tf_inner_offset
,
3277 base
, 0, ac_glc
, false);
3281 lp_build_endif(&if_ctx
);
3285 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3286 unsigned param
, unsigned return_index
)
3288 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3289 LLVMGetParam(ctx
->main_fn
, param
),
3294 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3295 unsigned param
, unsigned return_index
)
3297 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3298 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3300 return LLVMBuildInsertValue(builder
, ret
,
3301 ac_to_float(&ctx
->ac
, p
),
3306 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3307 unsigned param
, unsigned return_index
)
3309 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3310 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3311 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3312 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3315 /* This only writes the tessellation factor levels. */
3316 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3317 unsigned max_outputs
,
3318 LLVMValueRef
*addrs
)
3320 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3321 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3322 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3323 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3325 si_copy_tcs_inputs(bld_base
);
3327 rel_patch_id
= get_rel_patch_id(ctx
);
3328 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3329 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3331 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3332 LLVMBasicBlockRef blocks
[2] = {
3333 LLVMGetInsertBlock(builder
),
3334 ctx
->merged_wrap_if_state
.entry_block
3336 LLVMValueRef values
[2];
3338 lp_build_endif(&ctx
->merged_wrap_if_state
);
3340 values
[0] = rel_patch_id
;
3341 values
[1] = LLVMGetUndef(ctx
->i32
);
3342 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3344 values
[0] = tf_lds_offset
;
3345 values
[1] = LLVMGetUndef(ctx
->i32
);
3346 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3348 values
[0] = invocation_id
;
3349 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3350 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3353 /* Return epilog parameters from this function. */
3354 LLVMValueRef ret
= ctx
->return_value
;
3357 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3358 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3359 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3360 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3361 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3362 /* Tess offchip and tess factor offsets are at the beginning. */
3363 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3364 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3365 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3367 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3368 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3369 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3370 GFX6_SGPR_TCS_OUT_LAYOUT
);
3371 /* Tess offchip and tess factor offsets are after user SGPRs. */
3372 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3373 GFX6_TCS_NUM_USER_SGPR
);
3374 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3375 GFX6_TCS_NUM_USER_SGPR
+ 1);
3376 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3380 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3381 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3382 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3384 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3385 * the invocation_id output does not alias the tcs_rel_ids input,
3386 * which saves a V_MOV on gfx9.
3390 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3391 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3393 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3394 vgpr
++; /* skip the tess factor LDS offset */
3395 for (unsigned i
= 0; i
< 6; i
++) {
3396 LLVMValueRef value
=
3397 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3398 value
= ac_to_float(&ctx
->ac
, value
);
3399 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3402 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3404 ctx
->return_value
= ret
;
3407 /* Pass TCS inputs from LS to TCS on GFX9. */
3408 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3410 LLVMValueRef ret
= ctx
->return_value
;
3412 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3413 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3414 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3415 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3416 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3417 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3419 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3420 8 + SI_SGPR_RW_BUFFERS
);
3421 ret
= si_insert_input_ptr(ctx
, ret
,
3422 ctx
->param_bindless_samplers_and_images
,
3423 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3425 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3426 8 + SI_SGPR_VS_STATE_BITS
);
3428 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3429 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3430 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3431 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3432 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3433 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3435 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3436 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3437 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3439 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3440 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3442 ctx
->return_value
= ret
;
3445 /* Pass GS inputs from ES to GS on GFX9. */
3446 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3448 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3449 LLVMValueRef ret
= ctx
->return_value
;
3451 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3452 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3453 if (ctx
->shader
->key
.as_ngg
)
3454 ret
= LLVMBuildInsertValue(builder
, ret
, ctx
->gs_tg_info
, 2, "");
3456 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3457 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3458 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3460 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3461 8 + SI_SGPR_RW_BUFFERS
);
3462 ret
= si_insert_input_ptr(ctx
, ret
,
3463 ctx
->param_bindless_samplers_and_images
,
3464 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3465 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
3466 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
,
3467 8 + SI_SGPR_VS_STATE_BITS
);
3471 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3472 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3474 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3476 for (unsigned i
= 0; i
< 5; i
++) {
3477 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3478 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3480 ctx
->return_value
= ret
;
3483 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3484 unsigned max_outputs
,
3485 LLVMValueRef
*addrs
)
3487 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3488 struct si_shader
*shader
= ctx
->shader
;
3489 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3491 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3492 ctx
->param_rel_auto_id
);
3493 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3494 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3495 vertex_dw_stride
, "");
3497 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3498 * its inputs from it. */
3499 for (i
= 0; i
< info
->num_outputs
; i
++) {
3500 unsigned name
= info
->output_semantic_name
[i
];
3501 unsigned index
= info
->output_semantic_index
[i
];
3503 /* The ARB_shader_viewport_layer_array spec contains the
3506 * 2) What happens if gl_ViewportIndex or gl_Layer is
3507 * written in the vertex shader and a geometry shader is
3510 * RESOLVED: The value written by the last vertex processing
3511 * stage is used. If the last vertex processing stage
3512 * (vertex, tessellation evaluation or geometry) does not
3513 * statically assign to gl_ViewportIndex or gl_Layer, index
3514 * or layer zero is assumed.
3516 * So writes to those outputs in VS-as-LS are simply ignored.
3518 if (name
== TGSI_SEMANTIC_LAYER
||
3519 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3522 int param
= si_shader_io_get_unique_index(name
, index
, false);
3523 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3524 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3526 for (chan
= 0; chan
< 4; chan
++) {
3527 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3530 lshs_lds_store(ctx
, chan
, dw_addr
,
3531 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3535 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3536 si_set_ls_return_value_for_tcs(ctx
);
3539 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3540 unsigned max_outputs
,
3541 LLVMValueRef
*addrs
)
3543 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3544 struct si_shader
*es
= ctx
->shader
;
3545 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3546 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3547 ctx
->param_es2gs_offset
);
3548 LLVMValueRef lds_base
= NULL
;
3552 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3553 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3554 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3555 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3556 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3557 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3558 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3559 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3560 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3563 for (i
= 0; i
< info
->num_outputs
; i
++) {
3566 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3567 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3570 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3571 info
->output_semantic_index
[i
], false);
3573 for (chan
= 0; chan
< 4; chan
++) {
3574 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3577 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3578 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3580 /* GFX9 has the ESGS ring in LDS. */
3581 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3582 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3583 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3584 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3588 ac_build_buffer_store_dword(&ctx
->ac
,
3590 out_val
, 1, NULL
, soffset
,
3591 (4 * param
+ chan
) * 4,
3592 ac_glc
| ac_slc
, true);
3596 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3597 si_set_es_return_value_for_gs(ctx
);
3600 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3602 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3603 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3605 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3608 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3610 if (ctx
->shader
->key
.as_ngg
) {
3611 gfx10_ngg_gs_emit_epilogue(ctx
);
3615 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3616 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3618 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3619 si_get_gs_wave_id(ctx
));
3621 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3622 lp_build_endif(&ctx
->merged_wrap_if_state
);
3625 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3626 unsigned max_outputs
,
3627 LLVMValueRef
*addrs
)
3629 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3630 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3632 assert(info
->num_outputs
<= max_outputs
);
3634 emit_gs_epilogue(ctx
);
3637 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3639 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3640 emit_gs_epilogue(ctx
);
3643 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3644 unsigned max_outputs
,
3645 LLVMValueRef
*addrs
)
3647 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3648 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3649 struct si_shader_output_values
*outputs
= NULL
;
3652 assert(!ctx
->shader
->is_gs_copy_shader
);
3653 assert(info
->num_outputs
<= max_outputs
);
3655 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3657 for (i
= 0; i
< info
->num_outputs
; i
++) {
3658 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3659 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3661 for (j
= 0; j
< 4; j
++) {
3662 outputs
[i
].values
[j
] =
3663 LLVMBuildLoad(ctx
->ac
.builder
,
3666 outputs
[i
].vertex_stream
[j
] =
3667 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3671 if (ctx
->ac
.chip_class
<= GFX9
&&
3672 ctx
->shader
->selector
->so
.num_outputs
)
3673 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3675 /* Export PrimitiveID. */
3676 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3677 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3678 outputs
[i
].semantic_index
= 0;
3679 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3680 for (j
= 1; j
< 4; j
++)
3681 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3683 memset(outputs
[i
].vertex_stream
, 0,
3684 sizeof(outputs
[i
].vertex_stream
));
3688 si_llvm_export_vs(ctx
, outputs
, i
);
3692 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3693 unsigned max_outputs
,
3694 LLVMValueRef
*addrs
)
3696 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3697 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3698 LLVMValueRef pos
[4] = {};
3700 assert(info
->num_outputs
<= max_outputs
);
3702 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3703 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3706 for (unsigned chan
= 0; chan
< 4; chan
++)
3707 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3710 assert(pos
[0] != NULL
);
3712 /* Return the position output. */
3713 LLVMValueRef ret
= ctx
->return_value
;
3714 for (unsigned chan
= 0; chan
< 4; chan
++)
3715 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3716 ctx
->return_value
= ret
;
3719 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3721 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3723 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3724 &ctx
->outputs
[0][0]);
3727 struct si_ps_exports
{
3729 struct ac_export_args args
[10];
3732 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3733 LLVMValueRef depth
, LLVMValueRef stencil
,
3734 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3736 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3737 struct ac_export_args args
;
3739 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3741 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3744 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3745 LLVMValueRef
*color
, unsigned index
,
3746 unsigned samplemask_param
,
3747 bool is_last
, struct si_ps_exports
*exp
)
3749 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3753 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3754 for (i
= 0; i
< 4; i
++)
3755 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3758 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3759 color
[3] = ctx
->ac
.f32_1
;
3763 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3764 si_alpha_test(bld_base
, color
[3]);
3766 /* Line & polygon smoothing */
3767 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3768 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3771 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3772 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3773 struct ac_export_args args
[8];
3776 /* Get the export arguments, also find out what the last one is. */
3777 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3778 si_llvm_init_export_args(ctx
, color
,
3779 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3780 if (args
[c
].enabled_channels
)
3784 /* Emit all exports. */
3785 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3786 if (is_last
&& last
== c
) {
3787 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3788 args
[c
].done
= 1; /* DONE bit */
3789 } else if (!args
[c
].enabled_channels
)
3790 continue; /* unnecessary NULL export */
3792 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3795 struct ac_export_args args
;
3798 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3801 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3802 args
.done
= 1; /* DONE bit */
3803 } else if (!args
.enabled_channels
)
3804 return; /* unnecessary NULL export */
3806 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3810 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3811 struct si_ps_exports
*exp
)
3813 for (unsigned i
= 0; i
< exp
->num
; i
++)
3814 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3818 * Return PS outputs in this order:
3820 * v[0:3] = color0.xyzw
3821 * v[4:7] = color1.xyzw
3826 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3828 * The alpha-ref SGPR is returned via its original location.
3830 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3831 unsigned max_outputs
,
3832 LLVMValueRef
*addrs
)
3834 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3835 struct si_shader
*shader
= ctx
->shader
;
3836 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3837 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3838 unsigned i
, j
, first_vgpr
, vgpr
;
3840 LLVMValueRef color
[8][4] = {};
3841 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3844 if (ctx
->postponed_kill
)
3845 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3847 /* Read the output values. */
3848 for (i
= 0; i
< info
->num_outputs
; i
++) {
3849 unsigned semantic_name
= info
->output_semantic_name
[i
];
3850 unsigned semantic_index
= info
->output_semantic_index
[i
];
3852 switch (semantic_name
) {
3853 case TGSI_SEMANTIC_COLOR
:
3854 assert(semantic_index
< 8);
3855 for (j
= 0; j
< 4; j
++) {
3856 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3857 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3858 color
[semantic_index
][j
] = result
;
3861 case TGSI_SEMANTIC_POSITION
:
3862 depth
= LLVMBuildLoad(builder
,
3863 addrs
[4 * i
+ 2], "");
3865 case TGSI_SEMANTIC_STENCIL
:
3866 stencil
= LLVMBuildLoad(builder
,
3867 addrs
[4 * i
+ 1], "");
3869 case TGSI_SEMANTIC_SAMPLEMASK
:
3870 samplemask
= LLVMBuildLoad(builder
,
3871 addrs
[4 * i
+ 0], "");
3874 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3879 /* Fill the return structure. */
3880 ret
= ctx
->return_value
;
3883 ret
= LLVMBuildInsertValue(builder
, ret
,
3884 ac_to_integer(&ctx
->ac
,
3885 LLVMGetParam(ctx
->main_fn
,
3886 SI_PARAM_ALPHA_REF
)),
3887 SI_SGPR_ALPHA_REF
, "");
3890 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3891 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3895 for (j
= 0; j
< 4; j
++)
3896 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3899 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3901 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3903 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3905 /* Add the input sample mask for smoothing at the end. */
3906 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3907 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3908 ret
= LLVMBuildInsertValue(builder
, ret
,
3909 LLVMGetParam(ctx
->main_fn
,
3910 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3912 ctx
->return_value
= ret
;
3915 static void membar_emit(
3916 const struct lp_build_tgsi_action
*action
,
3917 struct lp_build_tgsi_context
*bld_base
,
3918 struct lp_build_emit_data
*emit_data
)
3920 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3921 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3922 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3923 unsigned wait_flags
= 0;
3925 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3926 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3928 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3929 TGSI_MEMBAR_SHADER_BUFFER
|
3930 TGSI_MEMBAR_SHADER_IMAGE
))
3931 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3933 if (flags
& TGSI_MEMBAR_SHARED
)
3934 wait_flags
|= AC_WAIT_LGKM
;
3936 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3939 static void clock_emit(
3940 const struct lp_build_tgsi_action
*action
,
3941 struct lp_build_tgsi_context
*bld_base
,
3942 struct lp_build_emit_data
*emit_data
)
3944 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3945 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3947 emit_data
->output
[0] =
3948 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3949 emit_data
->output
[1] =
3950 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3953 static void si_llvm_emit_ddxy(
3954 const struct lp_build_tgsi_action
*action
,
3955 struct lp_build_tgsi_context
*bld_base
,
3956 struct lp_build_emit_data
*emit_data
)
3958 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3959 unsigned opcode
= emit_data
->info
->opcode
;
3964 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3965 mask
= AC_TID_MASK_LEFT
;
3966 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3967 mask
= AC_TID_MASK_TOP
;
3969 mask
= AC_TID_MASK_TOP_LEFT
;
3971 /* for DDX we want to next X pixel, DDY next Y pixel. */
3972 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3974 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3975 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3976 emit_data
->output
[emit_data
->chan
] = val
;
3979 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3980 struct lp_build_tgsi_context
*bld_base
,
3981 struct lp_build_emit_data
*emit_data
)
3983 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3984 struct si_shader
*shader
= ctx
->shader
;
3985 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3986 LLVMValueRef interp_param
;
3987 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3988 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3989 int input_base
, input_array_size
;
3992 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
3993 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3994 int interp_param_idx
;
3998 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3999 /* offset is in second src, first two channels */
4000 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4002 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4004 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4005 LLVMValueRef sample_position
;
4006 LLVMValueRef sample_id
;
4007 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4009 /* fetch sample ID, then fetch its sample position,
4010 * and place into first two channels.
4012 sample_id
= lp_build_emit_fetch(bld_base
,
4013 emit_data
->inst
, 1, TGSI_CHAN_X
);
4014 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4016 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4017 * Language 4.50 spec says about interpolateAtSample:
4019 * "Returns the value of the input interpolant variable at
4020 * the location of sample number sample. If multisample
4021 * buffers are not available, the input variable will be
4022 * evaluated at the center of the pixel. If sample sample
4023 * does not exist, the position used to interpolate the
4024 * input variable is undefined."
4026 * This means that sample_id values outside of the valid are
4027 * in fact valid input, and the usual mechanism for loading the
4028 * sample position doesn't work.
4030 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4031 LLVMValueRef center
[4] = {
4032 LLVMConstReal(ctx
->f32
, 0.5),
4033 LLVMConstReal(ctx
->f32
, 0.5),
4038 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4040 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4043 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4046 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4047 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4049 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4052 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4054 if (input
->Register
.Indirect
) {
4055 unsigned array_id
= input
->Indirect
.ArrayID
;
4058 input_base
= info
->input_array_first
[array_id
];
4059 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4061 input_base
= inst
->Src
[0].Register
.Index
;
4062 input_array_size
= info
->num_inputs
- input_base
;
4065 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4066 1, input
->Register
.Index
- input_base
);
4068 input_base
= inst
->Src
[0].Register
.Index
;
4069 input_array_size
= 1;
4070 array_idx
= ctx
->i32_0
;
4073 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4075 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4076 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4077 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4079 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4081 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4082 if (interp_param_idx
== -1)
4084 else if (interp_param_idx
)
4085 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4087 interp_param
= NULL
;
4089 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4090 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4091 LLVMValueRef ij_out
[2];
4092 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4095 * take the I then J parameters, and the DDX/Y for it, and
4096 * calculate the IJ inputs for the interpolator.
4097 * temp1 = ddx * offset/sample.x + I;
4098 * interp_param.I = ddy * offset/sample.y + temp1;
4099 * temp1 = ddx * offset/sample.x + J;
4100 * interp_param.J = ddy * offset/sample.y + temp1;
4102 for (i
= 0; i
< 2; i
++) {
4103 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4104 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4105 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4106 ddxy_out
, ix_ll
, "");
4107 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4108 ddxy_out
, iy_ll
, "");
4109 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4110 interp_param
, ix_ll
, "");
4113 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4115 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4116 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4118 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4122 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4124 for (chan
= 0; chan
< 4; chan
++) {
4125 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4126 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4128 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4129 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4132 i
= LLVMBuildExtractElement(
4133 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4134 j
= LLVMBuildExtractElement(
4135 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4137 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4140 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4141 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4144 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4145 ctx
->ac
.builder
, gather
, array_idx
, "");
4149 static void vote_all_emit(
4150 const struct lp_build_tgsi_action
*action
,
4151 struct lp_build_tgsi_context
*bld_base
,
4152 struct lp_build_emit_data
*emit_data
)
4154 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4156 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4157 emit_data
->output
[emit_data
->chan
] =
4158 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4161 static void vote_any_emit(
4162 const struct lp_build_tgsi_action
*action
,
4163 struct lp_build_tgsi_context
*bld_base
,
4164 struct lp_build_emit_data
*emit_data
)
4166 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4168 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4169 emit_data
->output
[emit_data
->chan
] =
4170 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4173 static void vote_eq_emit(
4174 const struct lp_build_tgsi_action
*action
,
4175 struct lp_build_tgsi_context
*bld_base
,
4176 struct lp_build_emit_data
*emit_data
)
4178 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4180 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4181 emit_data
->output
[emit_data
->chan
] =
4182 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4185 static void ballot_emit(
4186 const struct lp_build_tgsi_action
*action
,
4187 struct lp_build_tgsi_context
*bld_base
,
4188 struct lp_build_emit_data
*emit_data
)
4190 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4191 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4194 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4195 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4197 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4199 if (ctx
->ac
.wave_size
== 32) {
4200 emit_data
->output
[1] = ctx
->i32_0
;
4202 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4203 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4207 static void read_lane_emit(
4208 const struct lp_build_tgsi_action
*action
,
4209 struct lp_build_tgsi_context
*bld_base
,
4210 struct lp_build_emit_data
*emit_data
)
4212 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4214 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4215 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4216 0, emit_data
->src_chan
);
4218 /* Always read the source invocation (= lane) from the X channel. */
4219 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4221 emit_data
->arg_count
= 2;
4224 /* We currently have no other way to prevent LLVM from lifting the icmp
4225 * calls to a dominating basic block.
4227 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4229 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4230 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4232 emit_data
->output
[emit_data
->chan
] =
4233 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4234 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4235 AC_FUNC_ATTR_READNONE
|
4236 AC_FUNC_ATTR_CONVERGENT
);
4239 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4240 struct lp_build_emit_data
*emit_data
)
4242 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4243 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4247 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4249 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4250 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4254 /* Emit one vertex from the geometry shader */
4255 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4257 LLVMValueRef
*addrs
)
4259 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4261 if (ctx
->shader
->key
.as_ngg
) {
4262 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4266 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4267 struct si_shader
*shader
= ctx
->shader
;
4268 struct lp_build_if_state if_state
;
4269 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4270 ctx
->param_gs2vs_offset
);
4271 LLVMValueRef gs_next_vertex
;
4272 LLVMValueRef can_emit
;
4273 unsigned chan
, offset
;
4276 /* Write vertex attribute values to GSVS ring */
4277 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4278 ctx
->gs_next_vertex
[stream
],
4281 /* If this thread has already emitted the declared maximum number of
4282 * vertices, skip the write: excessive vertex emissions are not
4283 * supposed to have any effect.
4285 * If the shader has no writes to memory, kill it instead. This skips
4286 * further memory loads and may allow LLVM to skip to the end
4289 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4290 LLVMConstInt(ctx
->i32
,
4291 shader
->selector
->gs_max_out_vertices
, 0), "");
4293 bool use_kill
= !info
->writes_memory
;
4295 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4297 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4301 for (i
= 0; i
< info
->num_outputs
; i
++) {
4302 for (chan
= 0; chan
< 4; chan
++) {
4303 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4304 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4307 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4308 LLVMValueRef voffset
=
4309 LLVMConstInt(ctx
->i32
, offset
*
4310 shader
->selector
->gs_max_out_vertices
, 0);
4313 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4314 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4315 LLVMConstInt(ctx
->i32
, 4, 0), "");
4317 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4319 ac_build_buffer_store_dword(&ctx
->ac
,
4320 ctx
->gsvs_ring
[stream
],
4322 voffset
, soffset
, 0,
4323 ac_glc
| ac_slc
, true);
4327 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4328 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4330 /* Signal vertex emission if vertex data was written. */
4332 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4333 si_get_gs_wave_id(ctx
));
4337 lp_build_endif(&if_state
);
4340 /* Emit one vertex from the geometry shader */
4341 static void si_tgsi_emit_vertex(
4342 const struct lp_build_tgsi_action
*action
,
4343 struct lp_build_tgsi_context
*bld_base
,
4344 struct lp_build_emit_data
*emit_data
)
4346 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4347 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4349 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4352 /* Cut one primitive from the geometry shader */
4353 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4356 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4358 if (ctx
->shader
->key
.as_ngg
) {
4359 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4363 /* Signal primitive cut */
4364 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4365 si_get_gs_wave_id(ctx
));
4368 /* Cut one primitive from the geometry shader */
4369 static void si_tgsi_emit_primitive(
4370 const struct lp_build_tgsi_action
*action
,
4371 struct lp_build_tgsi_context
*bld_base
,
4372 struct lp_build_emit_data
*emit_data
)
4374 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4376 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4379 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4380 struct lp_build_tgsi_context
*bld_base
,
4381 struct lp_build_emit_data
*emit_data
)
4383 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4385 /* GFX6 only (thanks to a hw bug workaround):
4386 * The real barrier instruction isn’t needed, because an entire patch
4387 * always fits into a single wave.
4389 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4390 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4391 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4395 ac_build_s_barrier(&ctx
->ac
);
4398 void si_create_function(struct si_shader_context
*ctx
,
4400 LLVMTypeRef
*returns
, unsigned num_returns
,
4401 struct si_function_info
*fninfo
,
4402 unsigned max_workgroup_size
)
4406 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4407 fninfo
->types
, fninfo
->num_params
);
4408 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4410 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4411 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4413 /* The combination of:
4417 * allows the optimization passes to move loads and reduces
4418 * SGPR spilling significantly.
4420 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4421 AC_FUNC_ATTR_INREG
);
4423 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4424 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4425 AC_FUNC_ATTR_NOALIAS
);
4426 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4430 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4431 if (fninfo
->assign
[i
])
4432 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4435 if (ctx
->screen
->info
.address32_hi
) {
4436 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4437 "amdgpu-32bit-address-high-bits",
4438 ctx
->screen
->info
.address32_hi
);
4441 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4443 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4444 "no-signed-zeros-fp-math",
4447 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4448 /* These were copied from some LLVM test. */
4449 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4450 "less-precise-fpmad",
4452 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4455 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4458 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4464 static void declare_streamout_params(struct si_shader_context
*ctx
,
4465 struct pipe_stream_output_info
*so
,
4466 struct si_function_info
*fninfo
)
4468 if (ctx
->ac
.chip_class
>= GFX10
)
4471 /* Streamout SGPRs. */
4472 if (so
->num_outputs
) {
4473 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4474 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4476 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4478 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4480 /* A streamout buffer offset is loaded if the stride is non-zero. */
4481 for (int i
= 0; i
< 4; i
++) {
4485 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4489 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4491 switch (shader
->selector
->type
) {
4492 case PIPE_SHADER_VERTEX
:
4493 case PIPE_SHADER_TESS_EVAL
:
4494 return shader
->key
.as_ngg
? 128 : 0;
4496 case PIPE_SHADER_TESS_CTRL
:
4497 /* Return this so that LLVM doesn't remove s_barrier
4498 * instructions on chips where we use s_barrier. */
4499 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4501 case PIPE_SHADER_GEOMETRY
:
4502 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4504 case PIPE_SHADER_COMPUTE
:
4505 break; /* see below */
4511 const unsigned *properties
= shader
->selector
->info
.properties
;
4512 unsigned max_work_group_size
=
4513 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4514 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4515 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4517 if (!max_work_group_size
) {
4518 /* This is a variable group size compute shader,
4519 * compile it for the maximum possible group size.
4521 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4523 return max_work_group_size
;
4526 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4527 struct si_function_info
*fninfo
,
4530 LLVMTypeRef const_shader_buf_type
;
4532 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4533 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4534 const_shader_buf_type
= ctx
->f32
;
4536 const_shader_buf_type
= ctx
->v4i32
;
4538 unsigned const_and_shader_buffers
=
4539 add_arg(fninfo
, ARG_SGPR
,
4540 ac_array_in_const32_addr_space(const_shader_buf_type
));
4543 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4546 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4547 struct si_function_info
*fninfo
,
4550 unsigned samplers_and_images
=
4551 add_arg(fninfo
, ARG_SGPR
,
4552 ac_array_in_const32_addr_space(ctx
->v8i32
));
4555 ctx
->param_samplers_and_images
= samplers_and_images
;
4558 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4559 struct si_function_info
*fninfo
,
4562 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4563 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4566 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4567 struct si_function_info
*fninfo
)
4569 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4570 ac_array_in_const32_addr_space(ctx
->v4i32
));
4571 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4572 ac_array_in_const32_addr_space(ctx
->v8i32
));
4575 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4576 struct si_function_info
*fninfo
)
4578 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4579 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4580 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4581 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4584 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4585 struct si_function_info
*fninfo
,
4586 unsigned *num_prolog_vgprs
)
4588 struct si_shader
*shader
= ctx
->shader
;
4590 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4591 if (shader
->key
.as_ls
) {
4592 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4593 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4594 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user VGPR */
4595 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4597 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4598 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4600 } else if (ctx
->screen
->info
.chip_class
== GFX10
&&
4601 !shader
->is_gs_copy_shader
) {
4602 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr */
4603 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr */
4604 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4606 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4607 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4608 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4611 if (!shader
->is_gs_copy_shader
) {
4612 /* Vertex load indices. */
4613 ctx
->param_vertex_index0
= fninfo
->num_params
;
4614 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4615 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4616 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4620 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4621 struct si_function_info
*fninfo
,
4622 unsigned vs_blit_property
)
4624 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4625 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4626 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4627 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4629 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4630 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4631 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4632 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4633 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4634 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4635 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4636 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4637 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4638 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4639 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4640 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4644 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4645 struct si_function_info
*fninfo
)
4647 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4648 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4649 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4650 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4654 /* Convenient merged shader definitions. */
4655 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4656 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4659 static void create_function(struct si_shader_context
*ctx
)
4661 struct si_shader
*shader
= ctx
->shader
;
4662 struct si_function_info fninfo
;
4663 LLVMTypeRef returns
[16+32*4];
4664 unsigned i
, num_return_sgprs
;
4665 unsigned num_returns
= 0;
4666 unsigned num_prolog_vgprs
= 0;
4667 unsigned type
= ctx
->type
;
4668 unsigned vs_blit_property
=
4669 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4671 si_init_function_info(&fninfo
);
4673 /* Set MERGED shaders. */
4674 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4675 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4676 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4677 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4678 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4681 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4684 case PIPE_SHADER_VERTEX
:
4685 declare_global_desc_pointers(ctx
, &fninfo
);
4687 if (vs_blit_property
) {
4688 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4691 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4695 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4696 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4697 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4698 ac_array_in_const32_addr_space(ctx
->v4i32
));
4700 if (shader
->key
.as_es
) {
4701 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4702 } else if (shader
->key
.as_ls
) {
4703 /* no extra parameters */
4705 if (shader
->is_gs_copy_shader
) {
4706 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4707 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4710 /* The locations of the other parameters are assigned dynamically. */
4711 declare_streamout_params(ctx
, &shader
->selector
->so
,
4716 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4719 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4720 for (i
= 0; i
< 4; i
++)
4721 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4725 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4726 declare_global_desc_pointers(ctx
, &fninfo
);
4727 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4728 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4729 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4730 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4731 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4732 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4733 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4736 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4737 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4739 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4740 * placed after the user SGPRs.
4742 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4743 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4744 for (i
= 0; i
< 11; i
++)
4745 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4748 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4749 /* Merged stages have 8 system SGPRs at the beginning. */
4750 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4751 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4752 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4753 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4754 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4755 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4756 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4757 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4758 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4760 declare_global_desc_pointers(ctx
, &fninfo
);
4761 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4762 ctx
->type
== PIPE_SHADER_VERTEX
);
4763 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4765 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4766 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4767 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4768 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4769 ac_array_in_const32_addr_space(ctx
->v4i32
));
4771 /* VGPRs (first TCS, then VS) */
4772 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4773 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4775 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4776 declare_vs_input_vgprs(ctx
, &fninfo
,
4779 /* LS return values are inputs to the TCS main shader part. */
4780 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4781 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4782 for (i
= 0; i
< 2; i
++)
4783 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4785 /* TCS return values are inputs to the TCS epilog.
4787 * param_tcs_offchip_offset, param_tcs_factor_offset,
4788 * param_tcs_offchip_layout, and param_rw_buffers
4789 * should be passed to the epilog.
4791 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4792 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4793 for (i
= 0; i
< 11; i
++)
4794 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4798 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4799 /* Merged stages have 8 system SGPRs at the beginning. */
4800 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4801 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4802 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4804 if (ctx
->shader
->key
.as_ngg
)
4805 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->gs_tg_info
);
4807 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4809 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4810 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4811 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4812 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4813 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4815 declare_global_desc_pointers(ctx
, &fninfo
);
4816 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4817 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4818 (ctx
->type
== PIPE_SHADER_VERTEX
||
4819 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4822 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4823 if (vs_blit_property
)
4824 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4826 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4828 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4829 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4830 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4831 /* Declare as many input SGPRs as the VS has. */
4834 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4835 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4836 ac_array_in_const32_addr_space(ctx
->v4i32
));
4839 /* VGPRs (first GS, then VS/TES) */
4840 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4841 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4842 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4843 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4844 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4846 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4847 declare_vs_input_vgprs(ctx
, &fninfo
,
4849 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4850 declare_tes_input_vgprs(ctx
, &fninfo
);
4853 if (ctx
->shader
->key
.as_es
&&
4854 (ctx
->type
== PIPE_SHADER_VERTEX
||
4855 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4856 unsigned num_user_sgprs
;
4858 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4859 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4861 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4863 /* ES return values are inputs to GS. */
4864 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4865 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4866 for (i
= 0; i
< 5; i
++)
4867 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4871 case PIPE_SHADER_TESS_EVAL
:
4872 declare_global_desc_pointers(ctx
, &fninfo
);
4873 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4874 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4875 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4876 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4878 if (shader
->key
.as_es
) {
4879 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4880 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4881 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4883 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4884 declare_streamout_params(ctx
, &shader
->selector
->so
,
4886 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4890 declare_tes_input_vgprs(ctx
, &fninfo
);
4893 case PIPE_SHADER_GEOMETRY
:
4894 declare_global_desc_pointers(ctx
, &fninfo
);
4895 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4896 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4897 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4900 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4901 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4902 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4903 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4904 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4905 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4906 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4907 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4910 case PIPE_SHADER_FRAGMENT
:
4911 declare_global_desc_pointers(ctx
, &fninfo
);
4912 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4913 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4914 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4915 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4917 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4918 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4919 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4920 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4921 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4922 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4923 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4924 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4925 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4926 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4927 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4928 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4929 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4930 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4931 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4932 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4933 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4934 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4935 shader
->info
.face_vgpr_index
= 20;
4936 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4937 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4938 shader
->info
.ancillary_vgpr_index
= 21;
4939 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4940 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4941 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4943 /* Color inputs from the prolog. */
4944 if (shader
->selector
->info
.colors_read
) {
4945 unsigned num_color_elements
=
4946 util_bitcount(shader
->selector
->info
.colors_read
);
4948 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4949 for (i
= 0; i
< num_color_elements
; i
++)
4950 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4952 num_prolog_vgprs
+= num_color_elements
;
4955 /* Outputs for the epilog. */
4956 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4959 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4960 shader
->selector
->info
.writes_z
+
4961 shader
->selector
->info
.writes_stencil
+
4962 shader
->selector
->info
.writes_samplemask
+
4963 1 /* SampleMaskIn */;
4965 num_returns
= MAX2(num_returns
,
4967 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4969 for (i
= 0; i
< num_return_sgprs
; i
++)
4970 returns
[i
] = ctx
->i32
;
4971 for (; i
< num_returns
; i
++)
4972 returns
[i
] = ctx
->f32
;
4975 case PIPE_SHADER_COMPUTE
:
4976 declare_global_desc_pointers(ctx
, &fninfo
);
4977 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4978 if (shader
->selector
->info
.uses_grid_size
)
4979 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4980 if (shader
->selector
->info
.uses_block_size
&&
4981 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4982 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4984 unsigned cs_user_data_dwords
=
4985 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_DWORDS
];
4986 if (cs_user_data_dwords
) {
4987 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
4988 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
4991 for (i
= 0; i
< 3; i
++) {
4992 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4993 if (shader
->selector
->info
.uses_block_id
[i
])
4994 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4997 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
5000 assert(0 && "unimplemented shader");
5004 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
5005 si_get_max_workgroup_size(shader
));
5007 /* Reserve register locations for VGPR inputs the PS prolog may need. */
5008 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
5009 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
5010 "InitialPSInputAddr",
5011 S_0286D0_PERSP_SAMPLE_ENA(1) |
5012 S_0286D0_PERSP_CENTER_ENA(1) |
5013 S_0286D0_PERSP_CENTROID_ENA(1) |
5014 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5015 S_0286D0_LINEAR_CENTER_ENA(1) |
5016 S_0286D0_LINEAR_CENTROID_ENA(1) |
5017 S_0286D0_FRONT_FACE_ENA(1) |
5018 S_0286D0_ANCILLARY_ENA(1) |
5019 S_0286D0_POS_FIXED_PT_ENA(1));
5022 shader
->info
.num_input_sgprs
= 0;
5023 shader
->info
.num_input_vgprs
= 0;
5025 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5026 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5028 for (; i
< fninfo
.num_params
; ++i
)
5029 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5031 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5032 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5034 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5035 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5036 /* The LSHS size is not known until draw time, so we append it
5037 * at the end of whatever LDS use there may be in the rest of
5038 * the shader (currently none, unless LLVM decides to do its
5039 * own LDS-based lowering).
5041 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
5042 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5043 "__lds_end", AC_ADDR_SPACE_LDS
);
5044 LLVMSetAlignment(ctx
->ac
.lds
, 256);
5046 ac_declare_lds_as_pointer(&ctx
->ac
);
5051 /* Ensure that the esgs ring is declared.
5053 * We declare it with 64KB alignment as a hint that the
5054 * pointer value will always be 0.
5056 static void declare_esgs_ring(struct si_shader_context
*ctx
)
5061 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
5063 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
5064 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5067 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
5068 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
5072 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5075 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5077 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5079 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5080 ctx
->param_rw_buffers
);
5082 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5083 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5085 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5087 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5090 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5092 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5093 /* Declare the ESGS ring as an explicit LDS symbol. */
5094 declare_esgs_ring(ctx
);
5096 ac_declare_lds_as_pointer(&ctx
->ac
);
5097 ctx
->esgs_ring
= ctx
->ac
.lds
;
5102 if (ctx
->shader
->is_gs_copy_shader
) {
5103 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5106 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5107 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5108 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5109 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5110 LLVMValueRef base_ring
;
5112 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5114 /* The conceptual layout of the GSVS ring is
5115 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5116 * but the real memory layout is swizzled across
5118 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5120 * Override the buffer descriptor accordingly.
5122 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5123 uint64_t stream_offset
= 0;
5125 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5126 unsigned num_components
;
5128 unsigned num_records
;
5129 LLVMValueRef ring
, tmp
;
5131 num_components
= sel
->info
.num_stream_output_components
[stream
];
5132 if (!num_components
)
5135 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5137 /* Limit on the stride field for <= GFX7. */
5138 assert(stride
< (1 << 14));
5142 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5143 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5144 tmp
= LLVMBuildAdd(builder
, tmp
,
5145 LLVMConstInt(ctx
->i64
,
5146 stream_offset
, 0), "");
5147 stream_offset
+= stride
* 64;
5149 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5150 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5151 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5152 tmp
= LLVMBuildOr(builder
, tmp
,
5153 LLVMConstInt(ctx
->i32
,
5154 S_008F04_STRIDE(stride
) |
5155 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5156 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5157 ring
= LLVMBuildInsertElement(builder
, ring
,
5158 LLVMConstInt(ctx
->i32
, num_records
, 0),
5159 LLVMConstInt(ctx
->i32
, 2, 0), "");
5162 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5163 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5164 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5165 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5166 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5167 S_008F0C_ADD_TID_ENABLE(1);
5169 if (ctx
->ac
.chip_class
>= GFX10
) {
5170 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5171 S_008F0C_OOB_SELECT(2) |
5172 S_008F0C_RESOURCE_LEVEL(1);
5174 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5175 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5176 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5179 ring
= LLVMBuildInsertElement(builder
, ring
,
5180 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5181 LLVMConstInt(ctx
->i32
, 3, 0), "");
5183 ctx
->gsvs_ring
[stream
] = ring
;
5185 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5186 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5190 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5191 LLVMValueRef param_rw_buffers
,
5192 unsigned param_pos_fixed_pt
)
5194 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5195 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5197 /* Use the fixed-point gl_FragCoord input.
5198 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5199 * per coordinate to get the repeating effect.
5201 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5202 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5204 /* Load the buffer descriptor. */
5205 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5206 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5208 /* The stipple pattern is 32x32, each row has 32 bits. */
5209 offset
= LLVMBuildMul(builder
, address
[1],
5210 LLVMConstInt(ctx
->i32
, 4, 0), "");
5211 row
= buffer_load_const(ctx
, desc
, offset
);
5212 row
= ac_to_integer(&ctx
->ac
, row
);
5213 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5214 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5215 ac_build_kill_if_false(&ctx
->ac
, bit
);
5218 /* For the UMR disassembler. */
5219 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5220 #define DEBUGGER_NUM_MARKERS 5
5222 static bool si_shader_binary_open(struct si_screen
*screen
,
5223 struct si_shader
*shader
,
5224 struct ac_rtld_binary
*rtld
)
5226 const struct si_shader_selector
*sel
= shader
->selector
;
5227 const char *part_elfs
[5];
5228 size_t part_sizes
[5];
5229 unsigned num_parts
= 0;
5231 #define add_part(shader_or_part) \
5232 if (shader_or_part) { \
5233 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5234 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5238 add_part(shader
->prolog
);
5239 add_part(shader
->previous_stage
);
5240 add_part(shader
->prolog2
);
5242 add_part(shader
->epilog
);
5246 struct ac_rtld_symbol lds_symbols
[2];
5247 unsigned num_lds_symbols
= 0;
5249 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5250 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5251 /* We add this symbol even on LLVM <= 8 to ensure that
5252 * shader->config.lds_size is set correctly below.
5254 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5255 sym
->name
= "esgs_ring";
5256 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5257 sym
->align
= 64 * 1024;
5260 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5261 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5262 sym
->name
= "ngg_emit";
5263 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5267 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5268 .info
= &screen
->info
,
5270 .halt_at_entry
= screen
->options
.halt_shaders
,
5272 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5274 .num_parts
= num_parts
,
5275 .elf_ptrs
= part_elfs
,
5276 .elf_sizes
= part_sizes
,
5277 .num_shared_lds_symbols
= num_lds_symbols
,
5278 .shared_lds_symbols
= lds_symbols
});
5280 if (rtld
->lds_size
> 0) {
5281 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5282 shader
->config
.lds_size
=
5283 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5289 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5291 struct ac_rtld_binary rtld
;
5292 si_shader_binary_open(screen
, shader
, &rtld
);
5293 return rtld
.rx_size
;
5296 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5298 uint64_t *scratch_va
= data
;
5300 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5301 *value
= (uint32_t)*scratch_va
;
5304 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5305 /* Enable scratch coalescing. */
5306 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5307 S_008F04_SWIZZLE_ENABLE(1);
5308 if (HAVE_LLVM
< 0x0800) {
5309 /* Old LLVM created an R_ABS32_HI relocation for
5319 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5320 uint64_t scratch_va
)
5322 struct ac_rtld_binary binary
;
5323 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5326 si_resource_reference(&shader
->bo
, NULL
);
5327 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5328 sscreen
->cpdma_prefetch_writes_memory
?
5329 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5330 PIPE_USAGE_IMMUTABLE
,
5331 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5337 struct ac_rtld_upload_info u
= {};
5339 u
.get_external_symbol
= si_get_external_symbol
;
5340 u
.cb_data
= &scratch_va
;
5341 u
.rx_va
= shader
->bo
->gpu_address
;
5342 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5343 PIPE_TRANSFER_READ_WRITE
|
5344 PIPE_TRANSFER_UNSYNCHRONIZED
|
5345 RADEON_TRANSFER_TEMPORARY
);
5349 bool ok
= ac_rtld_upload(&u
);
5351 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5352 ac_rtld_close(&binary
);
5357 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5358 const struct si_shader_binary
*binary
,
5359 enum pipe_shader_type shader_type
,
5360 struct pipe_debug_callback
*debug
,
5361 const char *name
, FILE *file
)
5363 struct ac_rtld_binary rtld_binary
;
5365 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5366 .info
= &screen
->info
,
5367 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5370 .elf_ptrs
= &binary
->elf_buffer
,
5371 .elf_sizes
= &binary
->elf_size
}))
5377 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5380 if (nbytes
> INT_MAX
)
5383 if (debug
&& debug
->debug_message
) {
5384 /* Very long debug messages are cut off, so send the
5385 * disassembly one line at a time. This causes more
5386 * overhead, but on the plus side it simplifies
5387 * parsing of resulting logs.
5389 pipe_debug_message(debug
, SHADER_INFO
,
5390 "Shader Disassembly Begin");
5393 while (line
< nbytes
) {
5394 int count
= nbytes
- line
;
5395 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5397 count
= nl
- (disasm
+ line
);
5400 pipe_debug_message(debug
, SHADER_INFO
,
5401 "%.*s", count
, disasm
+ line
);
5407 pipe_debug_message(debug
, SHADER_INFO
,
5408 "Shader Disassembly End");
5412 fprintf(file
, "Shader %s disassembly:\n", name
);
5413 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5417 ac_rtld_close(&rtld_binary
);
5420 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5422 struct si_screen
*sscreen
= shader
->selector
->screen
;
5423 struct ac_shader_config
*conf
= &shader
->config
;
5424 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5425 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5426 unsigned lds_per_wave
= 0;
5427 unsigned max_simd_waves
;
5429 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5431 /* Compute LDS usage for PS. */
5432 switch (shader
->selector
->type
) {
5433 case PIPE_SHADER_FRAGMENT
:
5434 /* The minimum usage per wave is (num_inputs * 48). The maximum
5435 * usage is (num_inputs * 48 * 16).
5436 * We can get anything in between and it varies between waves.
5438 * The 48 bytes per input for a single primitive is equal to
5439 * 4 bytes/component * 4 components/input * 3 points.
5441 * Other stages don't know the size at compile time or don't
5442 * allocate LDS per wave, but instead they do it per thread group.
5444 lds_per_wave
= conf
->lds_size
* lds_increment
+
5445 align(num_inputs
* 48, lds_increment
);
5447 case PIPE_SHADER_COMPUTE
:
5448 if (shader
->selector
) {
5449 unsigned max_workgroup_size
=
5450 si_get_max_workgroup_size(shader
);
5451 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5452 DIV_ROUND_UP(max_workgroup_size
, 64);
5458 /* Compute the per-SIMD wave counts. */
5459 if (conf
->num_sgprs
) {
5461 MIN2(max_simd_waves
,
5462 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5465 if (conf
->num_vgprs
)
5466 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5468 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5469 * 16KB makes some SIMDs unoccupied). */
5471 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5473 shader
->info
.max_simd_waves
= max_simd_waves
;
5476 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5477 struct si_shader
*shader
,
5478 struct pipe_debug_callback
*debug
)
5480 const struct ac_shader_config
*conf
= &shader
->config
;
5482 if (screen
->options
.debug_disassembly
)
5483 si_shader_dump_disassembly(screen
, &shader
->binary
,
5484 shader
->selector
->type
,
5485 debug
, "main", NULL
);
5487 pipe_debug_message(debug
, SHADER_INFO
,
5488 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5489 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5490 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5491 conf
->num_sgprs
, conf
->num_vgprs
,
5492 si_get_shader_binary_size(screen
, shader
),
5493 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5494 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5495 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5498 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5499 struct si_shader
*shader
,
5501 bool check_debug_option
)
5503 const struct ac_shader_config
*conf
= &shader
->config
;
5505 if (!check_debug_option
||
5506 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5507 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5508 fprintf(file
, "*** SHADER CONFIG ***\n"
5509 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5510 "SPI_PS_INPUT_ENA = 0x%04x\n",
5511 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5514 fprintf(file
, "*** SHADER STATS ***\n"
5517 "Spilled SGPRs: %d\n"
5518 "Spilled VGPRs: %d\n"
5519 "Private memory VGPRs: %d\n"
5520 "Code Size: %d bytes\n"
5522 "Scratch: %d bytes per wave\n"
5524 "********************\n\n\n",
5525 conf
->num_sgprs
, conf
->num_vgprs
,
5526 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5527 shader
->info
.private_mem_vgprs
,
5528 si_get_shader_binary_size(sscreen
, shader
),
5529 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5530 shader
->info
.max_simd_waves
);
5534 const char *si_get_shader_name(const struct si_shader
*shader
)
5536 switch (shader
->selector
->type
) {
5537 case PIPE_SHADER_VERTEX
:
5538 if (shader
->key
.as_es
)
5539 return "Vertex Shader as ES";
5540 else if (shader
->key
.as_ls
)
5541 return "Vertex Shader as LS";
5542 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5543 return "Vertex Shader as Primitive Discard CS";
5544 else if (shader
->key
.as_ngg
)
5545 return "Vertex Shader as ESGS";
5547 return "Vertex Shader as VS";
5548 case PIPE_SHADER_TESS_CTRL
:
5549 return "Tessellation Control Shader";
5550 case PIPE_SHADER_TESS_EVAL
:
5551 if (shader
->key
.as_es
)
5552 return "Tessellation Evaluation Shader as ES";
5553 else if (shader
->key
.as_ngg
)
5554 return "Tessellation Evaluation Shader as ESGS";
5556 return "Tessellation Evaluation Shader as VS";
5557 case PIPE_SHADER_GEOMETRY
:
5558 if (shader
->is_gs_copy_shader
)
5559 return "GS Copy Shader as VS";
5561 return "Geometry Shader";
5562 case PIPE_SHADER_FRAGMENT
:
5563 return "Pixel Shader";
5564 case PIPE_SHADER_COMPUTE
:
5565 return "Compute Shader";
5567 return "Unknown Shader";
5571 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5572 struct pipe_debug_callback
*debug
,
5573 FILE *file
, bool check_debug_option
)
5575 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5577 if (!check_debug_option
||
5578 si_can_dump_shader(sscreen
, shader_type
))
5579 si_dump_shader_key(shader
, file
);
5581 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5582 if (shader
->previous_stage
&&
5583 shader
->previous_stage
->binary
.llvm_ir_string
) {
5584 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5585 si_get_shader_name(shader
));
5586 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5589 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5590 si_get_shader_name(shader
));
5591 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5594 if (!check_debug_option
||
5595 (si_can_dump_shader(sscreen
, shader_type
) &&
5596 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5597 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5600 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5601 shader_type
, debug
, "prolog", file
);
5602 if (shader
->previous_stage
)
5603 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5604 shader_type
, debug
, "previous stage", file
);
5605 if (shader
->prolog2
)
5606 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5607 shader_type
, debug
, "prolog2", file
);
5609 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
, debug
, "main", file
);
5612 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5613 shader_type
, debug
, "epilog", file
);
5614 fprintf(file
, "\n");
5617 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5620 static int si_compile_llvm(struct si_screen
*sscreen
,
5621 struct si_shader_binary
*binary
,
5622 struct ac_shader_config
*conf
,
5623 struct ac_llvm_compiler
*compiler
,
5625 struct pipe_debug_callback
*debug
,
5626 enum pipe_shader_type shader_type
,
5628 bool less_optimized
)
5630 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5632 if (si_can_dump_shader(sscreen
, shader_type
)) {
5633 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5635 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5636 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5637 ac_dump_module(mod
);
5638 fprintf(stderr
, "\n");
5642 if (sscreen
->record_llvm_ir
) {
5643 char *ir
= LLVMPrintModuleToString(mod
);
5644 binary
->llvm_ir_string
= strdup(ir
);
5645 LLVMDisposeMessage(ir
);
5648 if (!si_replace_shader(count
, binary
)) {
5649 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5655 struct ac_rtld_binary rtld
;
5656 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5657 .info
= &sscreen
->info
,
5658 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5661 .elf_ptrs
= &binary
->elf_buffer
,
5662 .elf_sizes
= &binary
->elf_size
}))
5665 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5666 ac_rtld_close(&rtld
);
5670 /* Enable 64-bit and 16-bit denormals, because there is no performance
5673 * If denormals are enabled, all floating-point output modifiers are
5676 * Don't enable denormals for 32-bit floats, because:
5677 * - Floating-point output modifiers would be ignored by the hw.
5678 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5679 * have to stop using those.
5680 * - GFX6 & GFX7 would be very slow.
5682 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5687 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5689 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5690 LLVMBuildRetVoid(ctx
->ac
.builder
);
5692 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5695 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5697 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5698 struct ac_llvm_compiler
*compiler
,
5699 struct si_shader_selector
*gs_selector
,
5700 struct pipe_debug_callback
*debug
)
5702 struct si_shader_context ctx
;
5703 struct si_shader
*shader
;
5704 LLVMBuilderRef builder
;
5705 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5706 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5710 shader
= CALLOC_STRUCT(si_shader
);
5714 /* We can leave the fence as permanently signaled because the GS copy
5715 * shader only becomes visible globally after it has been compiled. */
5716 util_queue_fence_init(&shader
->ready
);
5718 shader
->selector
= gs_selector
;
5719 shader
->is_gs_copy_shader
= true;
5721 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
5722 ctx
.shader
= shader
;
5723 ctx
.type
= PIPE_SHADER_VERTEX
;
5725 builder
= ctx
.ac
.builder
;
5727 create_function(&ctx
);
5728 preload_ring_buffers(&ctx
);
5730 LLVMValueRef voffset
=
5731 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5732 LLVMConstInt(ctx
.i32
, 4, 0), "");
5734 /* Fetch the vertex stream ID.*/
5735 LLVMValueRef stream_id
;
5737 if (ctx
.ac
.chip_class
<= GFX9
&& gs_selector
->so
.num_outputs
)
5738 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5740 stream_id
= ctx
.i32_0
;
5742 /* Fill in output information. */
5743 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5744 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5745 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5747 for (int chan
= 0; chan
< 4; chan
++) {
5748 outputs
[i
].vertex_stream
[chan
] =
5749 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5753 LLVMBasicBlockRef end_bb
;
5754 LLVMValueRef switch_inst
;
5756 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5757 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5759 for (int stream
= 0; stream
< 4; stream
++) {
5760 LLVMBasicBlockRef bb
;
5763 if (!gsinfo
->num_stream_output_components
[stream
])
5766 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5769 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5770 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5771 LLVMPositionBuilderAtEnd(builder
, bb
);
5773 /* Fetch vertex data from GSVS ring */
5775 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5776 for (unsigned chan
= 0; chan
< 4; chan
++) {
5777 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5778 outputs
[i
].vertex_stream
[chan
] != stream
) {
5779 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5783 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5784 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5787 outputs
[i
].values
[chan
] =
5788 ac_build_buffer_load(&ctx
.ac
,
5789 ctx
.gsvs_ring
[0], 1,
5791 soffset
, 0, ac_glc
| ac_slc
,
5796 /* Streamout and exports. */
5797 if (ctx
.ac
.chip_class
<= GFX9
&& gs_selector
->so
.num_outputs
) {
5798 si_llvm_emit_streamout(&ctx
, outputs
,
5799 gsinfo
->num_outputs
,
5804 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5806 LLVMBuildBr(builder
, end_bb
);
5809 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5811 LLVMBuildRetVoid(ctx
.ac
.builder
);
5813 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5814 si_llvm_optimize_module(&ctx
);
5817 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5818 &ctx
.shader
->config
, ctx
.compiler
,
5820 debug
, PIPE_SHADER_GEOMETRY
,
5821 "GS Copy Shader", false) == 0) {
5822 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5823 fprintf(stderr
, "GS Copy Shader:\n");
5824 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5826 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5827 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5832 si_llvm_dispose(&ctx
);
5838 si_fix_resource_usage(sscreen
, shader
);
5843 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5844 const struct si_vs_prolog_bits
*prolog
,
5845 const char *prefix
, FILE *f
)
5847 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5848 prefix
, prolog
->instance_divisor_is_one
);
5849 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5850 prefix
, prolog
->instance_divisor_is_fetched
);
5851 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5852 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5853 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5854 prefix
, prolog
->ls_vgpr_fix
);
5856 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5857 fprintf(f
, " mono.vs.fix_fetch = {");
5858 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5859 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5865 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5866 fix
.u
.num_channels_m1
, fix
.u
.format
);
5871 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5873 const struct si_shader_key
*key
= &shader
->key
;
5874 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5876 fprintf(f
, "SHADER KEY\n");
5878 switch (shader_type
) {
5879 case PIPE_SHADER_VERTEX
:
5880 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5881 "part.vs.prolog", f
);
5882 fprintf(f
, " as_es = %u\n", key
->as_es
);
5883 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5884 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5885 key
->mono
.u
.vs_export_prim_id
);
5886 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5887 key
->opt
.vs_as_prim_discard_cs
);
5888 fprintf(f
, " opt.cs_prim_type = %s\n",
5889 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5890 fprintf(f
, " opt.cs_indexed = %u\n",
5891 key
->opt
.cs_indexed
);
5892 fprintf(f
, " opt.cs_instancing = %u\n",
5893 key
->opt
.cs_instancing
);
5894 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5895 key
->opt
.cs_primitive_restart
);
5896 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5897 key
->opt
.cs_provoking_vertex_first
);
5898 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5899 key
->opt
.cs_need_correct_orientation
);
5900 fprintf(f
, " opt.cs_cull_front = %u\n",
5901 key
->opt
.cs_cull_front
);
5902 fprintf(f
, " opt.cs_cull_back = %u\n",
5903 key
->opt
.cs_cull_back
);
5904 fprintf(f
, " opt.cs_cull_z = %u\n",
5905 key
->opt
.cs_cull_z
);
5906 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5907 key
->opt
.cs_halfz_clip_space
);
5910 case PIPE_SHADER_TESS_CTRL
:
5911 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5912 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5913 "part.tcs.ls_prolog", f
);
5915 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5916 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5919 case PIPE_SHADER_TESS_EVAL
:
5920 fprintf(f
, " as_es = %u\n", key
->as_es
);
5921 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5922 key
->mono
.u
.vs_export_prim_id
);
5925 case PIPE_SHADER_GEOMETRY
:
5926 if (shader
->is_gs_copy_shader
)
5929 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5930 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5931 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5932 "part.gs.vs_prolog", f
);
5934 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5937 case PIPE_SHADER_COMPUTE
:
5940 case PIPE_SHADER_FRAGMENT
:
5941 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5942 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5943 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5944 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5945 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5946 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5947 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5948 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5949 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5950 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5951 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5952 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5953 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5954 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5955 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5956 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5957 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5964 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5965 shader_type
== PIPE_SHADER_TESS_EVAL
||
5966 shader_type
== PIPE_SHADER_VERTEX
) &&
5967 !key
->as_es
&& !key
->as_ls
) {
5968 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5969 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5973 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5974 struct si_screen
*sscreen
,
5975 struct ac_llvm_compiler
*compiler
)
5977 struct lp_build_tgsi_context
*bld_base
;
5979 si_llvm_context_init(ctx
, sscreen
, compiler
);
5981 bld_base
= &ctx
->bld_base
;
5982 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5984 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5985 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5986 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5988 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5990 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5992 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5993 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5994 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5995 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5997 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5998 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5999 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
6000 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
6001 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
6002 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
6003 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
6004 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
6006 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
6007 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
6008 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6011 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
6013 struct si_shader
*shader
= ctx
->shader
;
6014 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6016 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
6017 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
6018 shader
->key
.as_ls
||
6022 ac_optimize_vs_outputs(&ctx
->ac
,
6024 shader
->info
.vs_output_param_offset
,
6026 &shader
->info
.nr_param_exports
);
6029 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6030 unsigned param
, unsigned bitoffset
)
6032 LLVMValueRef args
[] = {
6033 LLVMGetParam(ctx
->main_fn
, param
),
6034 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6036 ac_build_intrinsic(&ctx
->ac
,
6037 "llvm.amdgcn.init.exec.from.input",
6038 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
6041 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6042 const struct si_vs_prolog_bits
*key
)
6044 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6046 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6049 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
6051 struct si_shader
*shader
= ctx
->shader
;
6052 struct si_shader_selector
*sel
= shader
->selector
;
6053 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6055 // TODO clean all this up!
6056 switch (ctx
->type
) {
6057 case PIPE_SHADER_VERTEX
:
6058 ctx
->load_input
= declare_input_vs
;
6059 if (shader
->key
.as_ls
)
6060 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6061 else if (shader
->key
.as_es
)
6062 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6063 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6064 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6065 else if (shader
->key
.as_ngg
)
6066 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6068 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6069 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6070 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6072 case PIPE_SHADER_TESS_CTRL
:
6073 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6074 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6075 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6076 bld_base
->emit_store
= store_output_tcs
;
6077 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6078 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6079 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6080 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6082 case PIPE_SHADER_TESS_EVAL
:
6083 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6084 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6085 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6086 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6087 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6088 if (shader
->key
.as_es
)
6089 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6090 else if (shader
->key
.as_ngg
)
6091 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6093 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6094 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6096 case PIPE_SHADER_GEOMETRY
:
6097 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6098 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6099 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6100 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6101 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6102 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6104 case PIPE_SHADER_FRAGMENT
:
6105 ctx
->load_input
= declare_input_fs
;
6106 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6107 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6108 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6109 ctx
->abi
.load_sample_position
= load_sample_position
;
6110 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6111 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6113 case PIPE_SHADER_COMPUTE
:
6114 ctx
->abi
.load_local_group_size
= get_block_size
;
6117 assert(!"Unsupported shader type");
6121 ctx
->abi
.load_ubo
= load_ubo
;
6122 ctx
->abi
.load_ssbo
= load_ssbo
;
6124 create_function(ctx
);
6125 preload_ring_buffers(ctx
);
6127 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6128 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6129 for (unsigned i
= 0; i
< 6; i
++) {
6130 ctx
->invoc0_tess_factors
[i
] =
6131 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6135 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6136 for (unsigned i
= 0; i
< 4; i
++) {
6137 ctx
->gs_next_vertex
[i
] =
6138 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6140 if (shader
->key
.as_ngg
) {
6141 for (unsigned i
= 0; i
< 4; ++i
) {
6142 ctx
->gs_curprim_verts
[i
] =
6143 lp_build_alloca(&ctx
->gallivm
, ctx
->ac
.i32
, "");
6144 ctx
->gs_generated_prims
[i
] =
6145 lp_build_alloca(&ctx
->gallivm
, ctx
->ac
.i32
, "");
6148 unsigned scratch_size
= 8;
6149 if (sel
->so
.num_outputs
)
6152 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6153 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6154 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6155 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6156 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6158 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6159 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6160 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6161 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6165 if (shader
->key
.as_ngg
&& ctx
->type
!= PIPE_SHADER_GEOMETRY
) {
6166 /* Unconditionally declare scratch space base for streamout and
6167 * vertex compaction. Whether space is actually allocated is
6168 * determined during linking / PM4 creation.
6170 * Add an extra dword per vertex to ensure an odd stride, which
6171 * avoids bank conflicts for SoA accesses.
6173 declare_esgs_ring(ctx
);
6175 /* This is really only needed when streamout and / or vertex
6176 * compaction is enabled.
6178 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6179 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6180 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6181 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6182 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6185 /* For GFX9 merged shaders:
6186 * - Set EXEC for the first shader. If the prolog is present, set
6187 * EXEC there instead.
6188 * - Add a barrier before the second shader.
6189 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6190 * an if-statement. This is required for correctness in geometry
6191 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6194 * For monolithic merged shaders, the first shader is wrapped in an
6195 * if-block together with its prolog in si_build_wrapper_function.
6197 * NGG vertex and tess eval shaders running as the last
6198 * vertex/geometry stage handle execution explicitly using
6201 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6202 if (!shader
->is_monolithic
&&
6203 sel
->info
.num_instructions
> 1 && /* not empty shader */
6204 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6205 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6206 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6207 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6208 si_init_exec_from_input(ctx
,
6209 ctx
->param_merged_wave_info
, 0);
6210 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6211 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6212 shader
->key
.as_ngg
) {
6213 LLVMValueRef num_threads
;
6214 bool nested_barrier
;
6216 if (!shader
->is_monolithic
||
6217 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6218 shader
->key
.as_ngg
))
6219 ac_init_exec_full_mask(&ctx
->ac
);
6221 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6222 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6223 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6224 gfx10_ngg_gs_emit_prologue(ctx
);
6225 nested_barrier
= false;
6227 nested_barrier
= true;
6230 /* Number of patches / primitives */
6231 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6233 /* Number of vertices */
6234 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 0, 8);
6235 nested_barrier
= false;
6239 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6240 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6241 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6243 if (nested_barrier
) {
6244 /* Execute a barrier before the second shader in
6247 * Execute the barrier inside the conditional block,
6248 * so that empty waves can jump directly to s_endpgm,
6249 * which will also signal the barrier.
6251 * This is possible in gfx9, because an empty wave
6252 * for the second shader does not participate in
6253 * the epilogue. With NGG, empty waves may still
6254 * be required to export data (e.g. GS output vertices),
6255 * so we cannot let them exit early.
6257 * If the shader is TCS and the TCS epilog is present
6258 * and contains a barrier, it will wait there and then
6261 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6266 if (sel
->force_correct_derivs_after_kill
) {
6267 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6268 /* true = don't kill. */
6269 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6270 ctx
->postponed_kill
);
6274 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6275 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6279 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6280 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6285 si_llvm_build_ret(ctx
, ctx
->return_value
);
6290 * Compute the VS prolog key, which contains all the information needed to
6291 * build the VS prolog function, and set shader->info bits where needed.
6293 * \param info Shader info of the vertex shader.
6294 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6295 * \param prolog_key Key of the VS prolog
6296 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6297 * \param key Output shader part key.
6299 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6300 unsigned num_input_sgprs
,
6301 const struct si_vs_prolog_bits
*prolog_key
,
6302 struct si_shader
*shader_out
,
6303 union si_shader_part_key
*key
)
6305 memset(key
, 0, sizeof(*key
));
6306 key
->vs_prolog
.states
= *prolog_key
;
6307 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6308 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6309 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6310 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6311 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6313 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6314 key
->vs_prolog
.as_ls
= 1;
6315 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6316 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6317 key
->vs_prolog
.as_es
= 1;
6318 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6319 } else if (shader_out
->key
.as_ngg
) {
6320 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6323 /* Enable loading the InstanceID VGPR. */
6324 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6326 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6327 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6328 shader_out
->info
.uses_instanceid
= true;
6332 * Compute the PS prolog key, which contains all the information needed to
6333 * build the PS prolog function, and set related bits in shader->config.
6335 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6336 union si_shader_part_key
*key
,
6337 bool separate_prolog
)
6339 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6341 memset(key
, 0, sizeof(*key
));
6342 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6343 key
->ps_prolog
.colors_read
= info
->colors_read
;
6344 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6345 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6346 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6347 (key
->ps_prolog
.colors_read
||
6348 key
->ps_prolog
.states
.force_persp_sample_interp
||
6349 key
->ps_prolog
.states
.force_linear_sample_interp
||
6350 key
->ps_prolog
.states
.force_persp_center_interp
||
6351 key
->ps_prolog
.states
.force_linear_center_interp
||
6352 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6353 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6354 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6356 if (info
->colors_read
) {
6357 unsigned *color
= shader
->selector
->color_attr_index
;
6359 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6360 /* BCOLORs are stored after the last input. */
6361 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6362 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6363 if (separate_prolog
)
6364 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6367 for (unsigned i
= 0; i
< 2; i
++) {
6368 unsigned interp
= info
->input_interpolate
[color
[i
]];
6369 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6371 if (!(info
->colors_read
& (0xf << i
*4)))
6374 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6376 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6377 interp
== TGSI_INTERPOLATE_COLOR
)
6378 interp
= TGSI_INTERPOLATE_CONSTANT
;
6381 case TGSI_INTERPOLATE_CONSTANT
:
6382 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6384 case TGSI_INTERPOLATE_PERSPECTIVE
:
6385 case TGSI_INTERPOLATE_COLOR
:
6386 /* Force the interpolation location for colors here. */
6387 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6388 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6389 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6390 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6393 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6394 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6395 if (separate_prolog
) {
6396 shader
->config
.spi_ps_input_ena
|=
6397 S_0286CC_PERSP_SAMPLE_ENA(1);
6400 case TGSI_INTERPOLATE_LOC_CENTER
:
6401 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6402 if (separate_prolog
) {
6403 shader
->config
.spi_ps_input_ena
|=
6404 S_0286CC_PERSP_CENTER_ENA(1);
6407 case TGSI_INTERPOLATE_LOC_CENTROID
:
6408 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6409 if (separate_prolog
) {
6410 shader
->config
.spi_ps_input_ena
|=
6411 S_0286CC_PERSP_CENTROID_ENA(1);
6418 case TGSI_INTERPOLATE_LINEAR
:
6419 /* Force the interpolation location for colors here. */
6420 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6421 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6422 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6423 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6425 /* The VGPR assignment for non-monolithic shaders
6426 * works because InitialPSInputAddr is set on the
6427 * main shader and PERSP_PULL_MODEL is never used.
6430 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6431 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6432 separate_prolog
? 6 : 9;
6433 if (separate_prolog
) {
6434 shader
->config
.spi_ps_input_ena
|=
6435 S_0286CC_LINEAR_SAMPLE_ENA(1);
6438 case TGSI_INTERPOLATE_LOC_CENTER
:
6439 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6440 separate_prolog
? 8 : 11;
6441 if (separate_prolog
) {
6442 shader
->config
.spi_ps_input_ena
|=
6443 S_0286CC_LINEAR_CENTER_ENA(1);
6446 case TGSI_INTERPOLATE_LOC_CENTROID
:
6447 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6448 separate_prolog
? 10 : 13;
6449 if (separate_prolog
) {
6450 shader
->config
.spi_ps_input_ena
|=
6451 S_0286CC_LINEAR_CENTROID_ENA(1);
6466 * Check whether a PS prolog is required based on the key.
6468 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6470 return key
->ps_prolog
.colors_read
||
6471 key
->ps_prolog
.states
.force_persp_sample_interp
||
6472 key
->ps_prolog
.states
.force_linear_sample_interp
||
6473 key
->ps_prolog
.states
.force_persp_center_interp
||
6474 key
->ps_prolog
.states
.force_linear_center_interp
||
6475 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6476 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6477 key
->ps_prolog
.states
.poly_stipple
||
6478 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6482 * Compute the PS epilog key, which contains all the information needed to
6483 * build the PS epilog function.
6485 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6486 union si_shader_part_key
*key
)
6488 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6489 memset(key
, 0, sizeof(*key
));
6490 key
->ps_epilog
.colors_written
= info
->colors_written
;
6491 key
->ps_epilog
.writes_z
= info
->writes_z
;
6492 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6493 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6494 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6498 * Build the GS prolog function. Rotate the input vertices for triangle strips
6501 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6502 union si_shader_part_key
*key
)
6504 unsigned num_sgprs
, num_vgprs
;
6505 struct si_function_info fninfo
;
6506 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6507 LLVMTypeRef returns
[48];
6508 LLVMValueRef func
, ret
;
6510 si_init_function_info(&fninfo
);
6512 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6513 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6514 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6516 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6517 num_vgprs
= 5; /* ES inputs are not needed by GS */
6519 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6523 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6524 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6525 returns
[i
] = ctx
->i32
;
6528 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6529 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6530 returns
[num_sgprs
+ i
] = ctx
->f32
;
6533 /* Create the function. */
6534 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6536 func
= ctx
->main_fn
;
6538 /* Set the full EXEC mask for the prolog, because we are only fiddling
6539 * with registers here. The main shader part will set the correct EXEC
6542 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6543 ac_init_exec_full_mask(&ctx
->ac
);
6545 /* Copy inputs to outputs. This should be no-op, as the registers match,
6546 * but it will prevent the compiler from overwriting them unintentionally.
6548 ret
= ctx
->return_value
;
6549 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6550 LLVMValueRef p
= LLVMGetParam(func
, i
);
6551 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6553 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6554 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6555 p
= ac_to_float(&ctx
->ac
, p
);
6556 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6559 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6560 /* Remap the input vertices for every other primitive. */
6561 const unsigned gfx6_vtx_params
[6] = {
6569 const unsigned gfx9_vtx_params
[3] = {
6574 LLVMValueRef vtx_in
[6], vtx_out
[6];
6575 LLVMValueRef prim_id
, rotate
;
6577 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6578 for (unsigned i
= 0; i
< 3; i
++) {
6579 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6580 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6583 for (unsigned i
= 0; i
< 6; i
++)
6584 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6587 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6588 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6590 for (unsigned i
= 0; i
< 6; ++i
) {
6591 LLVMValueRef base
, rotated
;
6593 rotated
= vtx_in
[(i
+ 4) % 6];
6594 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6597 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6598 for (unsigned i
= 0; i
< 3; i
++) {
6599 LLVMValueRef hi
, out
;
6601 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6602 LLVMConstInt(ctx
->i32
, 16, 0), "");
6603 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6604 out
= ac_to_float(&ctx
->ac
, out
);
6605 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6606 gfx9_vtx_params
[i
], "");
6609 for (unsigned i
= 0; i
< 6; i
++) {
6612 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6613 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6614 gfx6_vtx_params
[i
], "");
6619 LLVMBuildRet(builder
, ret
);
6623 * Given a list of shader part functions, build a wrapper function that
6624 * runs them in sequence to form a monolithic shader.
6626 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6627 LLVMValueRef
*parts
,
6630 unsigned next_shader_first_part
)
6632 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6633 /* PS epilog has one arg per color component; gfx9 merged shader
6634 * prologs need to forward 32 user SGPRs.
6636 struct si_function_info fninfo
;
6637 LLVMValueRef initial
[64], out
[64];
6638 LLVMTypeRef function_type
;
6639 unsigned num_first_params
;
6640 unsigned num_out
, initial_num_out
;
6641 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6642 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6643 unsigned num_sgprs
, num_vgprs
;
6645 struct lp_build_if_state if_state
;
6647 si_init_function_info(&fninfo
);
6649 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6650 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6651 AC_FUNC_ATTR_ALWAYSINLINE
);
6652 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6655 /* The parameters of the wrapper function correspond to those of the
6656 * first part in terms of SGPRs and VGPRs, but we use the types of the
6657 * main part to get the right types. This is relevant for the
6658 * dereferenceable attribute on descriptor table pointers.
6663 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6664 num_first_params
= LLVMCountParamTypes(function_type
);
6666 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6667 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6669 if (ac_is_sgpr_param(param
)) {
6670 assert(num_vgprs
== 0);
6671 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6673 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6678 while (gprs
< num_sgprs
+ num_vgprs
) {
6679 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6680 LLVMTypeRef type
= LLVMTypeOf(param
);
6681 unsigned size
= ac_get_type_size(type
) / 4;
6683 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6685 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6686 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6687 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6692 /* Prepare the return type. */
6693 unsigned num_returns
= 0;
6694 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6696 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6697 return_type
= LLVMGetReturnType(last_func_type
);
6699 switch (LLVMGetTypeKind(return_type
)) {
6700 case LLVMStructTypeKind
:
6701 num_returns
= LLVMCountStructElementTypes(return_type
);
6702 assert(num_returns
<= ARRAY_SIZE(returns
));
6703 LLVMGetStructElementTypes(return_type
, returns
);
6705 case LLVMVoidTypeKind
:
6708 unreachable("unexpected type");
6711 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6712 si_get_max_workgroup_size(ctx
->shader
));
6714 if (is_merged_shader(ctx
))
6715 ac_init_exec_full_mask(&ctx
->ac
);
6717 /* Record the arguments of the function as if they were an output of
6723 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6724 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6725 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6726 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6727 unsigned size
= ac_get_type_size(param_type
) / 4;
6730 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6731 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6732 param_type
= ctx
->i32
;
6735 if (param_type
!= out_type
)
6736 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6737 out
[num_out
++] = param
;
6739 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6741 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6742 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6743 param_type
= ctx
->i64
;
6746 if (param_type
!= vector_type
)
6747 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6749 for (unsigned j
= 0; j
< size
; ++j
)
6750 out
[num_out
++] = LLVMBuildExtractElement(
6751 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6754 if (i
< fninfo
.num_sgpr_params
)
6755 num_out_sgpr
= num_out
;
6758 memcpy(initial
, out
, sizeof(out
));
6759 initial_num_out
= num_out
;
6760 initial_num_out_sgpr
= num_out_sgpr
;
6762 /* Now chain the parts. */
6764 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6765 LLVMValueRef in
[48];
6766 LLVMTypeRef ret_type
;
6767 unsigned out_idx
= 0;
6768 unsigned num_params
= LLVMCountParams(parts
[part
]);
6770 /* Merged shaders are executed conditionally depending
6771 * on the number of enabled threads passed in the input SGPRs. */
6772 if (is_multi_part_shader(ctx
) && part
== 0) {
6773 LLVMValueRef ena
, count
= initial
[3];
6775 count
= LLVMBuildAnd(builder
, count
,
6776 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6777 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6778 ac_get_thread_id(&ctx
->ac
), count
, "");
6779 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6782 /* Derive arguments for the next part from outputs of the
6785 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6787 LLVMTypeRef param_type
;
6789 unsigned param_size
;
6790 LLVMValueRef arg
= NULL
;
6792 param
= LLVMGetParam(parts
[part
], param_idx
);
6793 param_type
= LLVMTypeOf(param
);
6794 param_size
= ac_get_type_size(param_type
) / 4;
6795 is_sgpr
= ac_is_sgpr_param(param
);
6798 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6799 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6800 } else if (out_idx
< num_out_sgpr
) {
6801 /* Skip returned SGPRs the current part doesn't
6802 * declare on the input. */
6803 out_idx
= num_out_sgpr
;
6806 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6808 if (param_size
== 1)
6811 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6813 if (LLVMTypeOf(arg
) != param_type
) {
6814 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6815 if (LLVMGetPointerAddressSpace(param_type
) ==
6816 AC_ADDR_SPACE_CONST_32BIT
) {
6817 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6818 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6820 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6821 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6824 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6828 in
[param_idx
] = arg
;
6829 out_idx
+= param_size
;
6832 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6834 if (is_multi_part_shader(ctx
) &&
6835 part
+ 1 == next_shader_first_part
) {
6836 lp_build_endif(&if_state
);
6838 /* The second half of the merged shader should use
6839 * the inputs from the toplevel (wrapper) function,
6840 * not the return value from the last call.
6842 * That's because the last call was executed condi-
6843 * tionally, so we can't consume it in the main
6846 memcpy(out
, initial
, sizeof(initial
));
6847 num_out
= initial_num_out
;
6848 num_out_sgpr
= initial_num_out_sgpr
;
6852 /* Extract the returned GPRs. */
6853 ret_type
= LLVMTypeOf(ret
);
6857 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6858 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6860 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6862 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6864 LLVMBuildExtractValue(builder
, ret
, i
, "");
6866 assert(num_out
< ARRAY_SIZE(out
));
6867 out
[num_out
++] = val
;
6869 if (LLVMTypeOf(val
) == ctx
->i32
) {
6870 assert(num_out_sgpr
+ 1 == num_out
);
6871 num_out_sgpr
= num_out
;
6877 /* Return the value from the last part. */
6878 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6879 LLVMBuildRetVoid(builder
);
6881 LLVMBuildRet(builder
, ret
);
6884 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6885 struct si_shader_selector
*sel
)
6887 if (!compiler
->low_opt_passes
)
6890 /* Assume a slow CPU. */
6891 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6892 sel
->screen
->info
.chip_class
<= GFX8
);
6894 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6896 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6897 sel
->info
.num_memory_instructions
> 1000;
6900 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6901 struct ac_llvm_compiler
*compiler
,
6902 struct si_shader
*shader
,
6903 struct pipe_debug_callback
*debug
)
6905 struct si_shader_selector
*sel
= shader
->selector
;
6906 struct si_shader_context ctx
;
6909 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6910 * conversion fails. */
6911 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6912 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6914 tgsi_dump(sel
->tokens
, 0);
6916 nir_print_shader(sel
->nir
, stderr
);
6917 si_dump_streamout(&sel
->so
);
6920 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6921 si_llvm_context_set_tgsi(&ctx
, shader
);
6923 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6924 sizeof(shader
->info
.vs_output_param_offset
));
6926 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6928 if (!si_compile_tgsi_main(&ctx
)) {
6929 si_llvm_dispose(&ctx
);
6933 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6934 LLVMValueRef parts
[2];
6935 bool need_prolog
= sel
->vs_needs_prolog
;
6937 parts
[1] = ctx
.main_fn
;
6940 union si_shader_part_key prolog_key
;
6941 si_get_vs_prolog_key(&sel
->info
,
6942 shader
->info
.num_input_sgprs
,
6943 &shader
->key
.part
.vs
.prolog
,
6944 shader
, &prolog_key
);
6945 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6946 parts
[0] = ctx
.main_fn
;
6949 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6950 1 + need_prolog
, need_prolog
, 0);
6952 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6953 si_build_prim_discard_compute_shader(&ctx
);
6954 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6955 if (sscreen
->info
.chip_class
>= GFX9
) {
6956 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6957 LLVMValueRef parts
[4];
6958 bool vs_needs_prolog
=
6959 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6962 parts
[2] = ctx
.main_fn
;
6965 union si_shader_part_key tcs_epilog_key
;
6966 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6967 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6968 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6969 parts
[3] = ctx
.main_fn
;
6971 /* VS as LS main part */
6972 struct si_shader shader_ls
= {};
6973 shader_ls
.selector
= ls
;
6974 shader_ls
.key
.as_ls
= 1;
6975 shader_ls
.key
.mono
= shader
->key
.mono
;
6976 shader_ls
.key
.opt
= shader
->key
.opt
;
6977 shader_ls
.is_monolithic
= true;
6978 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6980 if (!si_compile_tgsi_main(&ctx
)) {
6981 si_llvm_dispose(&ctx
);
6984 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6985 parts
[1] = ctx
.main_fn
;
6988 if (vs_needs_prolog
) {
6989 union si_shader_part_key vs_prolog_key
;
6990 si_get_vs_prolog_key(&ls
->info
,
6991 shader_ls
.info
.num_input_sgprs
,
6992 &shader
->key
.part
.tcs
.ls_prolog
,
6993 shader
, &vs_prolog_key
);
6994 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6995 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6996 parts
[0] = ctx
.main_fn
;
6999 /* Reset the shader context. */
7000 ctx
.shader
= shader
;
7001 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
7003 si_build_wrapper_function(&ctx
,
7004 parts
+ !vs_needs_prolog
,
7005 4 - !vs_needs_prolog
, vs_needs_prolog
,
7006 vs_needs_prolog
? 2 : 1);
7008 LLVMValueRef parts
[2];
7009 union si_shader_part_key epilog_key
;
7011 parts
[0] = ctx
.main_fn
;
7013 memset(&epilog_key
, 0, sizeof(epilog_key
));
7014 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7015 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7016 parts
[1] = ctx
.main_fn
;
7018 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7020 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7021 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7022 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7023 LLVMValueRef es_prolog
= NULL
;
7024 LLVMValueRef es_main
= NULL
;
7025 LLVMValueRef gs_prolog
= NULL
;
7026 LLVMValueRef gs_main
= ctx
.main_fn
;
7029 union si_shader_part_key gs_prolog_key
;
7030 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7031 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7032 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7033 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7034 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7035 gs_prolog
= ctx
.main_fn
;
7038 struct si_shader shader_es
= {};
7039 shader_es
.selector
= es
;
7040 shader_es
.key
.as_es
= 1;
7041 shader_es
.key
.mono
= shader
->key
.mono
;
7042 shader_es
.key
.opt
= shader
->key
.opt
;
7043 shader_es
.is_monolithic
= true;
7044 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
7046 if (!si_compile_tgsi_main(&ctx
)) {
7047 si_llvm_dispose(&ctx
);
7050 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7051 es_main
= ctx
.main_fn
;
7054 if (es
->vs_needs_prolog
) {
7055 union si_shader_part_key vs_prolog_key
;
7056 si_get_vs_prolog_key(&es
->info
,
7057 shader_es
.info
.num_input_sgprs
,
7058 &shader
->key
.part
.gs
.vs_prolog
,
7059 shader
, &vs_prolog_key
);
7060 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7061 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7062 es_prolog
= ctx
.main_fn
;
7065 /* Reset the shader context. */
7066 ctx
.shader
= shader
;
7067 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7069 /* Prepare the array of shader parts. */
7070 LLVMValueRef parts
[4];
7071 unsigned num_parts
= 0, main_part
, next_first_part
;
7074 parts
[num_parts
++] = es_prolog
;
7076 parts
[main_part
= num_parts
++] = es_main
;
7077 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7078 parts
[num_parts
++] = gs_main
;
7080 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7081 main_part
, next_first_part
);
7083 LLVMValueRef parts
[2];
7084 union si_shader_part_key prolog_key
;
7086 parts
[1] = ctx
.main_fn
;
7088 memset(&prolog_key
, 0, sizeof(prolog_key
));
7089 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7090 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7091 parts
[0] = ctx
.main_fn
;
7093 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7095 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7096 LLVMValueRef parts
[3];
7097 union si_shader_part_key prolog_key
;
7098 union si_shader_part_key epilog_key
;
7101 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7102 need_prolog
= si_need_ps_prolog(&prolog_key
);
7104 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7107 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7108 parts
[0] = ctx
.main_fn
;
7111 si_get_ps_epilog_key(shader
, &epilog_key
);
7112 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7113 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7115 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7116 need_prolog
? 1 : 0, 0);
7119 si_llvm_optimize_module(&ctx
);
7121 /* Post-optimization transformations and analysis. */
7122 si_optimize_vs_outputs(&ctx
);
7124 if ((debug
&& debug
->debug_message
) ||
7125 si_can_dump_shader(sscreen
, ctx
.type
)) {
7126 ctx
.shader
->info
.private_mem_vgprs
=
7127 ac_count_scratch_private_memory(ctx
.main_fn
);
7130 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7131 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7132 LLVMPointerTypeKind
);
7134 /* Compile to bytecode. */
7135 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7136 ctx
.ac
.module
, debug
, ctx
.type
,
7137 si_get_shader_name(shader
),
7138 si_should_optimize_less(compiler
, shader
->selector
));
7139 si_llvm_dispose(&ctx
);
7141 fprintf(stderr
, "LLVM failed to compile shader\n");
7145 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7146 * LLVM 3.9svn has this bug.
7148 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7149 unsigned wave_size
= 64;
7150 unsigned max_vgprs
= 256;
7151 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
7152 unsigned max_sgprs_per_wave
= 128;
7153 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7154 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7155 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7157 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7158 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7160 if (shader
->config
.num_sgprs
> max_sgprs
||
7161 shader
->config
.num_vgprs
> max_vgprs
) {
7162 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7163 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7164 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7165 max_sgprs
, max_vgprs
);
7167 /* Just terminate the process, because dependent
7168 * shaders can hang due to bad input data, but use
7169 * the env var to allow shader-db to work.
7171 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7176 /* Add the scratch offset to input SGPRs. */
7177 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7178 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7180 /* Calculate the number of fragment input VGPRs. */
7181 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7182 shader
->info
.num_input_vgprs
= 0;
7183 shader
->info
.face_vgpr_index
= -1;
7184 shader
->info
.ancillary_vgpr_index
= -1;
7186 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7187 shader
->info
.num_input_vgprs
+= 2;
7188 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7189 shader
->info
.num_input_vgprs
+= 2;
7190 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7191 shader
->info
.num_input_vgprs
+= 2;
7192 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7193 shader
->info
.num_input_vgprs
+= 3;
7194 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7195 shader
->info
.num_input_vgprs
+= 2;
7196 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7197 shader
->info
.num_input_vgprs
+= 2;
7198 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7199 shader
->info
.num_input_vgprs
+= 2;
7200 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7201 shader
->info
.num_input_vgprs
+= 1;
7202 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7203 shader
->info
.num_input_vgprs
+= 1;
7204 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7205 shader
->info
.num_input_vgprs
+= 1;
7206 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7207 shader
->info
.num_input_vgprs
+= 1;
7208 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7209 shader
->info
.num_input_vgprs
+= 1;
7210 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7211 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7212 shader
->info
.num_input_vgprs
+= 1;
7214 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7215 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7216 shader
->info
.num_input_vgprs
+= 1;
7218 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7219 shader
->info
.num_input_vgprs
+= 1;
7220 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7221 shader
->info
.num_input_vgprs
+= 1;
7224 si_calculate_max_simd_waves(shader
);
7225 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7230 * Create, compile and return a shader part (prolog or epilog).
7232 * \param sscreen screen
7233 * \param list list of shader parts of the same category
7234 * \param type shader type
7235 * \param key shader part key
7236 * \param prolog whether the part being requested is a prolog
7237 * \param tm LLVM target machine
7238 * \param debug debug callback
7239 * \param build the callback responsible for building the main function
7240 * \return non-NULL on success
7242 static struct si_shader_part
*
7243 si_get_shader_part(struct si_screen
*sscreen
,
7244 struct si_shader_part
**list
,
7245 enum pipe_shader_type type
,
7247 union si_shader_part_key
*key
,
7248 struct ac_llvm_compiler
*compiler
,
7249 struct pipe_debug_callback
*debug
,
7250 void (*build
)(struct si_shader_context
*,
7251 union si_shader_part_key
*),
7254 struct si_shader_part
*result
;
7256 mtx_lock(&sscreen
->shader_parts_mutex
);
7258 /* Find existing. */
7259 for (result
= *list
; result
; result
= result
->next
) {
7260 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7261 mtx_unlock(&sscreen
->shader_parts_mutex
);
7266 /* Compile a new one. */
7267 result
= CALLOC_STRUCT(si_shader_part
);
7270 struct si_shader shader
= {};
7273 case PIPE_SHADER_VERTEX
:
7274 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7275 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7276 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7278 case PIPE_SHADER_TESS_CTRL
:
7280 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7282 case PIPE_SHADER_GEOMETRY
:
7284 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7286 case PIPE_SHADER_FRAGMENT
:
7288 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7290 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7293 unreachable("bad shader part");
7296 struct si_shader_context ctx
;
7297 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
7298 ctx
.shader
= &shader
;
7304 si_llvm_optimize_module(&ctx
);
7306 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7307 ctx
.ac
.module
, debug
, ctx
.type
, name
, false)) {
7313 result
->next
= *list
;
7317 si_llvm_dispose(&ctx
);
7318 mtx_unlock(&sscreen
->shader_parts_mutex
);
7322 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7324 LLVMValueRef ptr
[2], list
;
7325 bool merged_shader
= is_merged_shader(ctx
);
7327 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7328 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7329 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7334 * Build the vertex shader prolog function.
7336 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7337 * All inputs are returned unmodified. The vertex load indices are
7338 * stored after them, which will be used by the API VS for fetching inputs.
7340 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7345 * (VertexID + BaseVertex),
7346 * (InstanceID + StartInstance),
7347 * (InstanceID / 2 + StartInstance)
7349 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7350 union si_shader_part_key
*key
)
7352 struct si_function_info fninfo
;
7353 LLVMTypeRef
*returns
;
7354 LLVMValueRef ret
, func
;
7356 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7357 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7358 LLVMValueRef input_vgprs
[9];
7359 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7361 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7363 si_init_function_info(&fninfo
);
7365 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7366 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7367 sizeof(LLVMTypeRef
));
7370 /* Declare input and output SGPRs. */
7371 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7372 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7373 returns
[num_returns
++] = ctx
->i32
;
7376 /* Preloaded VGPRs (outputs must be floats) */
7377 for (i
= 0; i
< num_input_vgprs
; i
++) {
7378 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7379 returns
[num_returns
++] = ctx
->f32
;
7382 /* Vertex load indices. */
7383 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7384 returns
[num_returns
++] = ctx
->f32
;
7386 /* Create the function. */
7387 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7388 func
= ctx
->main_fn
;
7390 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7391 if (!key
->vs_prolog
.is_monolithic
)
7392 si_init_exec_from_input(ctx
, 3, 0);
7394 if (key
->vs_prolog
.as_ls
&&
7395 ctx
->screen
->has_ls_vgpr_init_bug
) {
7396 /* If there are no HS threads, SPI loads the LS VGPRs
7397 * starting at VGPR 0. Shift them back to where they
7400 LLVMValueRef has_hs_threads
=
7401 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7402 si_unpack_param(ctx
, 3, 8, 8),
7405 for (i
= 4; i
> 0; --i
) {
7406 input_vgprs
[i
+ 1] =
7407 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7409 input_vgprs
[i
- 1], "");
7414 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7415 unsigned instance_id_vgpr
=
7416 ctx
->screen
->info
.chip_class
>= GFX10
?
7418 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7420 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7421 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7423 /* InstanceID = VertexID >> 16;
7424 * VertexID = VertexID & 0xffff;
7426 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7427 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7428 LLVMConstInt(ctx
->i32
, 16, 0), "");
7429 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7430 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7433 /* Copy inputs to outputs. This should be no-op, as the registers match,
7434 * but it will prevent the compiler from overwriting them unintentionally.
7436 ret
= ctx
->return_value
;
7437 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7438 LLVMValueRef p
= LLVMGetParam(func
, i
);
7439 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7441 for (i
= 0; i
< num_input_vgprs
; i
++) {
7442 LLVMValueRef p
= input_vgprs
[i
];
7444 if (i
== vertex_id_vgpr
)
7445 p
= ctx
->abi
.vertex_id
;
7446 else if (i
== instance_id_vgpr
)
7447 p
= ctx
->abi
.instance_id
;
7449 p
= ac_to_float(&ctx
->ac
, p
);
7450 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7451 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7454 struct lp_build_if_state wrap_if_state
;
7455 LLVMValueRef original_ret
= ret
;
7456 bool wrapped
= false;
7458 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7459 LLVMValueRef num_threads
;
7462 num_threads
= si_unpack_param(ctx
, 3, 0, 8);
7463 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7464 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7465 lp_build_if(&wrap_if_state
, &ctx
->gallivm
, ena
);
7469 /* Compute vertex load indices from instance divisors. */
7470 LLVMValueRef instance_divisor_constbuf
= NULL
;
7472 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7473 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7474 LLVMValueRef buf_index
=
7475 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7476 instance_divisor_constbuf
=
7477 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7480 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7481 bool divisor_is_one
=
7482 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7483 bool divisor_is_fetched
=
7484 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7485 LLVMValueRef index
= NULL
;
7487 if (divisor_is_one
) {
7488 index
= ctx
->abi
.instance_id
;
7489 } else if (divisor_is_fetched
) {
7490 LLVMValueRef udiv_factors
[4];
7492 for (unsigned j
= 0; j
< 4; j
++) {
7494 buffer_load_const(ctx
, instance_divisor_constbuf
,
7495 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7496 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7498 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7499 * Such InstanceID might not be achievable in a reasonable time though.
7501 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7502 udiv_factors
[0], udiv_factors
[1],
7503 udiv_factors
[2], udiv_factors
[3]);
7506 if (divisor_is_one
|| divisor_is_fetched
) {
7507 /* Add StartInstance. */
7508 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7509 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7510 SI_SGPR_START_INSTANCE
), "");
7512 /* VertexID + BaseVertex */
7513 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7515 LLVMGetParam(func
, user_sgpr_base
+
7516 SI_SGPR_BASE_VERTEX
), "");
7519 index
= ac_to_float(&ctx
->ac
, index
);
7520 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7521 fninfo
.num_params
+ i
, "");
7525 lp_build_endif(&wrap_if_state
);
7527 LLVMValueRef values
[2] = {
7531 LLVMBasicBlockRef bbs
[2] = {
7532 wrap_if_state
.true_block
,
7533 wrap_if_state
.entry_block
7535 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7538 si_llvm_build_ret(ctx
, ret
);
7541 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7542 struct ac_llvm_compiler
*compiler
,
7543 struct si_shader
*shader
,
7544 struct pipe_debug_callback
*debug
,
7545 struct si_shader
*main_part
,
7546 const struct si_vs_prolog_bits
*key
)
7548 struct si_shader_selector
*vs
= main_part
->selector
;
7550 if (!si_vs_needs_prolog(vs
, key
))
7553 /* Get the prolog. */
7554 union si_shader_part_key prolog_key
;
7555 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7556 key
, shader
, &prolog_key
);
7559 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7560 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7561 debug
, si_build_vs_prolog_function
,
7562 "Vertex Shader Prolog");
7563 return shader
->prolog
!= NULL
;
7567 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7569 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7570 struct ac_llvm_compiler
*compiler
,
7571 struct si_shader
*shader
,
7572 struct pipe_debug_callback
*debug
)
7574 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7575 &shader
->key
.part
.vs
.prolog
);
7579 * Compile the TCS epilog function. This writes tesselation factors to memory
7580 * based on the output primitive type of the tesselator (determined by TES).
7582 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7583 union si_shader_part_key
*key
)
7585 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7586 struct si_function_info fninfo
;
7589 si_init_function_info(&fninfo
);
7591 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7592 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7593 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7594 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7595 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7596 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7597 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7598 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7599 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7600 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7601 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7602 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7603 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7604 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7605 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7606 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7607 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7608 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7609 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7610 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7612 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7613 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7614 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7615 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7616 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7617 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7618 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7619 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7620 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7621 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7624 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7625 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7626 unsigned tess_factors_idx
=
7627 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7628 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7629 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7631 for (unsigned i
= 0; i
< 6; i
++)
7632 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7634 /* Create the function. */
7635 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7636 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7637 ac_declare_lds_as_pointer(&ctx
->ac
);
7638 func
= ctx
->main_fn
;
7640 LLVMValueRef invoc0_tess_factors
[6];
7641 for (unsigned i
= 0; i
< 6; i
++)
7642 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7644 si_write_tess_factors(bld_base
,
7645 LLVMGetParam(func
, tess_factors_idx
),
7646 LLVMGetParam(func
, tess_factors_idx
+ 1),
7647 LLVMGetParam(func
, tess_factors_idx
+ 2),
7648 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7650 LLVMBuildRetVoid(ctx
->ac
.builder
);
7654 * Select and compile (or reuse) TCS parts (epilog).
7656 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7657 struct ac_llvm_compiler
*compiler
,
7658 struct si_shader
*shader
,
7659 struct pipe_debug_callback
*debug
)
7661 if (sscreen
->info
.chip_class
>= GFX9
) {
7662 struct si_shader
*ls_main_part
=
7663 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7665 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7666 &shader
->key
.part
.tcs
.ls_prolog
))
7669 shader
->previous_stage
= ls_main_part
;
7672 /* Get the epilog. */
7673 union si_shader_part_key epilog_key
;
7674 memset(&epilog_key
, 0, sizeof(epilog_key
));
7675 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7677 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7678 PIPE_SHADER_TESS_CTRL
, false,
7679 &epilog_key
, compiler
, debug
,
7680 si_build_tcs_epilog_function
,
7681 "Tessellation Control Shader Epilog");
7682 return shader
->epilog
!= NULL
;
7686 * Select and compile (or reuse) GS parts (prolog).
7688 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7689 struct ac_llvm_compiler
*compiler
,
7690 struct si_shader
*shader
,
7691 struct pipe_debug_callback
*debug
)
7693 if (sscreen
->info
.chip_class
>= GFX9
) {
7694 struct si_shader
*es_main_part
=
7695 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7697 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7698 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7699 &shader
->key
.part
.gs
.vs_prolog
))
7702 shader
->previous_stage
= es_main_part
;
7705 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7708 union si_shader_part_key prolog_key
;
7709 memset(&prolog_key
, 0, sizeof(prolog_key
));
7710 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7711 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7713 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7714 PIPE_SHADER_GEOMETRY
, true,
7715 &prolog_key
, compiler
, debug
,
7716 si_build_gs_prolog_function
,
7717 "Geometry Shader Prolog");
7718 return shader
->prolog2
!= NULL
;
7722 * Build the pixel shader prolog function. This handles:
7723 * - two-side color selection and interpolation
7724 * - overriding interpolation parameters for the API PS
7725 * - polygon stippling
7727 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7728 * overriden by other states. (e.g. per-sample interpolation)
7729 * Interpolated colors are stored after the preloaded VGPRs.
7731 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7732 union si_shader_part_key
*key
)
7734 struct si_function_info fninfo
;
7735 LLVMValueRef ret
, func
;
7736 int num_returns
, i
, num_color_channels
;
7738 assert(si_need_ps_prolog(key
));
7740 si_init_function_info(&fninfo
);
7742 /* Declare inputs. */
7743 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7744 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7746 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7747 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7749 /* Declare outputs (same as inputs + add colors if needed) */
7750 num_returns
= fninfo
.num_params
;
7751 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7752 for (i
= 0; i
< num_color_channels
; i
++)
7753 fninfo
.types
[num_returns
++] = ctx
->f32
;
7755 /* Create the function. */
7756 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7758 func
= ctx
->main_fn
;
7760 /* Copy inputs to outputs. This should be no-op, as the registers match,
7761 * but it will prevent the compiler from overwriting them unintentionally.
7763 ret
= ctx
->return_value
;
7764 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7765 LLVMValueRef p
= LLVMGetParam(func
, i
);
7766 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7769 /* Polygon stippling. */
7770 if (key
->ps_prolog
.states
.poly_stipple
) {
7771 /* POS_FIXED_PT is always last. */
7772 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7773 key
->ps_prolog
.num_input_vgprs
- 1;
7774 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7776 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7779 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7780 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7781 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7782 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7784 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7785 * The hw doesn't compute CENTROID if the whole wave only
7786 * contains fully-covered quads.
7788 * PRIM_MASK is after user SGPRs.
7790 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7791 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7792 LLVMConstInt(ctx
->i32
, 31, 0), "");
7793 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7796 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7797 /* Read PERSP_CENTER. */
7798 for (i
= 0; i
< 2; i
++)
7799 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7800 /* Read PERSP_CENTROID. */
7801 for (i
= 0; i
< 2; i
++)
7802 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7803 /* Select PERSP_CENTROID. */
7804 for (i
= 0; i
< 2; i
++) {
7805 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7806 center
[i
], centroid
[i
], "");
7807 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7808 tmp
, base
+ 4 + i
, "");
7811 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7812 /* Read LINEAR_CENTER. */
7813 for (i
= 0; i
< 2; i
++)
7814 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7815 /* Read LINEAR_CENTROID. */
7816 for (i
= 0; i
< 2; i
++)
7817 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7818 /* Select LINEAR_CENTROID. */
7819 for (i
= 0; i
< 2; i
++) {
7820 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7821 center
[i
], centroid
[i
], "");
7822 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7823 tmp
, base
+ 10 + i
, "");
7828 /* Force per-sample interpolation. */
7829 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7830 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7831 LLVMValueRef persp_sample
[2];
7833 /* Read PERSP_SAMPLE. */
7834 for (i
= 0; i
< 2; i
++)
7835 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7836 /* Overwrite PERSP_CENTER. */
7837 for (i
= 0; i
< 2; i
++)
7838 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7839 persp_sample
[i
], base
+ 2 + i
, "");
7840 /* Overwrite PERSP_CENTROID. */
7841 for (i
= 0; i
< 2; i
++)
7842 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7843 persp_sample
[i
], base
+ 4 + i
, "");
7845 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7846 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7847 LLVMValueRef linear_sample
[2];
7849 /* Read LINEAR_SAMPLE. */
7850 for (i
= 0; i
< 2; i
++)
7851 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7852 /* Overwrite LINEAR_CENTER. */
7853 for (i
= 0; i
< 2; i
++)
7854 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7855 linear_sample
[i
], base
+ 8 + i
, "");
7856 /* Overwrite LINEAR_CENTROID. */
7857 for (i
= 0; i
< 2; i
++)
7858 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7859 linear_sample
[i
], base
+ 10 + i
, "");
7862 /* Force center interpolation. */
7863 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7864 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7865 LLVMValueRef persp_center
[2];
7867 /* Read PERSP_CENTER. */
7868 for (i
= 0; i
< 2; i
++)
7869 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7870 /* Overwrite PERSP_SAMPLE. */
7871 for (i
= 0; i
< 2; i
++)
7872 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7873 persp_center
[i
], base
+ i
, "");
7874 /* Overwrite PERSP_CENTROID. */
7875 for (i
= 0; i
< 2; i
++)
7876 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7877 persp_center
[i
], base
+ 4 + i
, "");
7879 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7880 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7881 LLVMValueRef linear_center
[2];
7883 /* Read LINEAR_CENTER. */
7884 for (i
= 0; i
< 2; i
++)
7885 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7886 /* Overwrite LINEAR_SAMPLE. */
7887 for (i
= 0; i
< 2; i
++)
7888 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7889 linear_center
[i
], base
+ 6 + i
, "");
7890 /* Overwrite LINEAR_CENTROID. */
7891 for (i
= 0; i
< 2; i
++)
7892 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7893 linear_center
[i
], base
+ 10 + i
, "");
7896 /* Interpolate colors. */
7897 unsigned color_out_idx
= 0;
7898 for (i
= 0; i
< 2; i
++) {
7899 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7900 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7901 key
->ps_prolog
.face_vgpr_index
;
7902 LLVMValueRef interp
[2], color
[4];
7903 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7908 /* If the interpolation qualifier is not CONSTANT (-1). */
7909 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7910 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7911 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7913 /* Get the (i,j) updated by bc_optimize handling. */
7914 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7916 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7917 interp_vgpr
+ 1, "");
7918 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7921 /* Use the absolute location of the input. */
7922 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7924 if (key
->ps_prolog
.states
.color_two_side
) {
7925 face
= LLVMGetParam(func
, face_vgpr
);
7926 face
= ac_to_integer(&ctx
->ac
, face
);
7929 interp_fs_input(ctx
,
7930 key
->ps_prolog
.color_attr_index
[i
],
7931 TGSI_SEMANTIC_COLOR
, i
,
7932 key
->ps_prolog
.num_interp_inputs
,
7933 key
->ps_prolog
.colors_read
, interp_ij
,
7934 prim_mask
, face
, color
);
7937 unsigned chan
= u_bit_scan(&writemask
);
7938 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7939 fninfo
.num_params
+ color_out_idx
++, "");
7943 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7946 * "When per-sample shading is active due to the use of a fragment
7947 * input qualified by sample or due to the use of the gl_SampleID
7948 * or gl_SamplePosition variables, only the bit for the current
7949 * sample is set in gl_SampleMaskIn. When state specifies multiple
7950 * fragment shader invocations for a given fragment, the sample
7951 * mask for any single fragment shader invocation may specify a
7952 * subset of the covered samples for the fragment. In this case,
7953 * the bit corresponding to each covered sample will be set in
7954 * exactly one fragment shader invocation."
7956 * The samplemask loaded by hardware is always the coverage of the
7957 * entire pixel/fragment, so mask bits out based on the sample ID.
7959 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7960 /* The bit pattern matches that used by fixed function fragment
7962 static const uint16_t ps_iter_masks
[] = {
7963 0xffff, /* not used */
7969 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7971 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7972 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7973 key
->ps_prolog
.ancillary_vgpr_index
;
7974 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7975 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7977 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7978 samplemask
= LLVMBuildAnd(
7981 LLVMBuildShl(ctx
->ac
.builder
,
7982 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7985 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7987 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7988 ancillary_vgpr
+ 1, "");
7991 /* Tell LLVM to insert WQM instruction sequence when needed. */
7992 if (key
->ps_prolog
.wqm
) {
7993 LLVMAddTargetDependentFunctionAttr(func
,
7994 "amdgpu-ps-wqm-outputs", "");
7997 si_llvm_build_ret(ctx
, ret
);
8001 * Build the pixel shader epilog function. This handles everything that must be
8002 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8004 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8005 union si_shader_part_key
*key
)
8007 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8008 struct si_function_info fninfo
;
8009 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8011 struct si_ps_exports exp
= {};
8013 si_init_function_info(&fninfo
);
8015 /* Declare input SGPRs. */
8016 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8017 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8018 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8019 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8020 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
8022 /* Declare input VGPRs. */
8023 unsigned required_num_params
=
8024 fninfo
.num_sgpr_params
+
8025 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8026 key
->ps_epilog
.writes_z
+
8027 key
->ps_epilog
.writes_stencil
+
8028 key
->ps_epilog
.writes_samplemask
;
8030 required_num_params
= MAX2(required_num_params
,
8031 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8033 while (fninfo
.num_params
< required_num_params
)
8034 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
8036 /* Create the function. */
8037 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
8038 /* Disable elimination of unused inputs. */
8039 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8040 "InitialPSInputAddr", 0xffffff);
8042 /* Process colors. */
8043 unsigned vgpr
= fninfo
.num_sgpr_params
;
8044 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8045 int last_color_export
= -1;
8047 /* Find the last color export. */
8048 if (!key
->ps_epilog
.writes_z
&&
8049 !key
->ps_epilog
.writes_stencil
&&
8050 !key
->ps_epilog
.writes_samplemask
) {
8051 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8053 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8054 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8055 /* Just set this if any of the colorbuffers are enabled. */
8057 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8058 last_color_export
= 0;
8060 for (i
= 0; i
< 8; i
++)
8061 if (colors_written
& (1 << i
) &&
8062 (spi_format
>> (i
* 4)) & 0xf)
8063 last_color_export
= i
;
8067 while (colors_written
) {
8068 LLVMValueRef color
[4];
8069 int mrt
= u_bit_scan(&colors_written
);
8071 for (i
= 0; i
< 4; i
++)
8072 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8074 si_export_mrt_color(bld_base
, color
, mrt
,
8075 fninfo
.num_params
- 1,
8076 mrt
== last_color_export
, &exp
);
8079 /* Process depth, stencil, samplemask. */
8080 if (key
->ps_epilog
.writes_z
)
8081 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8082 if (key
->ps_epilog
.writes_stencil
)
8083 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8084 if (key
->ps_epilog
.writes_samplemask
)
8085 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8087 if (depth
|| stencil
|| samplemask
)
8088 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8089 else if (last_color_export
== -1)
8090 ac_build_export_null(&ctx
->ac
);
8093 si_emit_ps_exports(ctx
, &exp
);
8096 LLVMBuildRetVoid(ctx
->ac
.builder
);
8100 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8102 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8103 struct ac_llvm_compiler
*compiler
,
8104 struct si_shader
*shader
,
8105 struct pipe_debug_callback
*debug
)
8107 union si_shader_part_key prolog_key
;
8108 union si_shader_part_key epilog_key
;
8110 /* Get the prolog. */
8111 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8113 /* The prolog is a no-op if these aren't set. */
8114 if (si_need_ps_prolog(&prolog_key
)) {
8116 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8117 PIPE_SHADER_FRAGMENT
, true,
8118 &prolog_key
, compiler
, debug
,
8119 si_build_ps_prolog_function
,
8120 "Fragment Shader Prolog");
8121 if (!shader
->prolog
)
8125 /* Get the epilog. */
8126 si_get_ps_epilog_key(shader
, &epilog_key
);
8129 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8130 PIPE_SHADER_FRAGMENT
, false,
8131 &epilog_key
, compiler
, debug
,
8132 si_build_ps_epilog_function
,
8133 "Fragment Shader Epilog");
8134 if (!shader
->epilog
)
8137 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8138 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8139 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8140 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8143 /* Set up the enable bits for per-sample shading if needed. */
8144 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8145 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8146 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8147 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8148 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8149 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8151 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8152 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8153 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8154 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8155 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8156 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8158 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8159 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8160 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8161 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8162 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8163 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8165 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8166 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8167 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8168 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8169 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8170 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8173 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8174 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8175 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8176 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8177 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8180 /* At least one pair of interpolation weights must be enabled. */
8181 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8182 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8183 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8186 /* Samplemask fixup requires the sample ID. */
8187 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8188 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8189 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8192 /* The sample mask input is always enabled, because the API shader always
8193 * passes it through to the epilog. Disable it here if it's unused.
8195 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8196 !shader
->selector
->info
.reads_samplemask
)
8197 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8202 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8205 /* If tessellation is all offchip and on-chip GS isn't used, this
8206 * workaround is not needed.
8210 /* SPI barrier management bug:
8211 * Make sure we have at least 4k of LDS in use to avoid the bug.
8212 * It applies to workgroup sizes of more than one wavefront.
8214 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8215 sscreen
->info
.family
== CHIP_KABINI
)
8216 *lds_size
= MAX2(*lds_size
, 8);
8219 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8220 struct si_shader
*shader
)
8222 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8224 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8226 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8227 si_get_max_workgroup_size(shader
) > 64) {
8228 si_multiwave_lds_size_workaround(sscreen
,
8229 &shader
->config
.lds_size
);
8233 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8234 struct si_shader
*shader
,
8235 struct pipe_debug_callback
*debug
)
8237 struct si_shader_selector
*sel
= shader
->selector
;
8238 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8241 /* LS, ES, VS are compiled on demand if the main part hasn't been
8242 * compiled for that stage.
8244 * GS are compiled on demand if the main part hasn't been compiled
8245 * for the chosen NGG-ness.
8247 * Vertex shaders are compiled on demand when a vertex fetch
8248 * workaround must be applied.
8250 if (shader
->is_monolithic
) {
8251 /* Monolithic shader (compiled as a whole, has many variants,
8252 * may take a long time to compile).
8254 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8258 /* The shader consists of several parts:
8260 * - the middle part is the user shader, it has 1 variant only
8261 * and it was compiled during the creation of the shader
8263 * - the prolog part is inserted at the beginning
8264 * - the epilog part is inserted at the end
8266 * The prolog and epilog have many (but simple) variants.
8268 * Starting with gfx9, geometry and tessellation control
8269 * shaders also contain the prolog and user shader parts of
8270 * the previous shader stage.
8276 /* Copy the compiled TGSI shader data over. */
8277 shader
->is_binary_shared
= true;
8278 shader
->binary
= mainp
->binary
;
8279 shader
->config
= mainp
->config
;
8280 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8281 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8282 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8283 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8284 memcpy(shader
->info
.vs_output_param_offset
,
8285 mainp
->info
.vs_output_param_offset
,
8286 sizeof(mainp
->info
.vs_output_param_offset
));
8287 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8288 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8289 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8291 /* Select prologs and/or epilogs. */
8292 switch (sel
->type
) {
8293 case PIPE_SHADER_VERTEX
:
8294 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8297 case PIPE_SHADER_TESS_CTRL
:
8298 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8301 case PIPE_SHADER_TESS_EVAL
:
8303 case PIPE_SHADER_GEOMETRY
:
8304 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8307 case PIPE_SHADER_FRAGMENT
:
8308 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8311 /* Make sure we have at least as many VGPRs as there
8312 * are allocated inputs.
8314 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8315 shader
->info
.num_input_vgprs
);
8320 /* Update SGPR and VGPR counts. */
8321 if (shader
->prolog
) {
8322 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8323 shader
->prolog
->config
.num_sgprs
);
8324 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8325 shader
->prolog
->config
.num_vgprs
);
8327 if (shader
->previous_stage
) {
8328 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8329 shader
->previous_stage
->config
.num_sgprs
);
8330 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8331 shader
->previous_stage
->config
.num_vgprs
);
8332 shader
->config
.spilled_sgprs
=
8333 MAX2(shader
->config
.spilled_sgprs
,
8334 shader
->previous_stage
->config
.spilled_sgprs
);
8335 shader
->config
.spilled_vgprs
=
8336 MAX2(shader
->config
.spilled_vgprs
,
8337 shader
->previous_stage
->config
.spilled_vgprs
);
8338 shader
->info
.private_mem_vgprs
=
8339 MAX2(shader
->info
.private_mem_vgprs
,
8340 shader
->previous_stage
->info
.private_mem_vgprs
);
8341 shader
->config
.scratch_bytes_per_wave
=
8342 MAX2(shader
->config
.scratch_bytes_per_wave
,
8343 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8344 shader
->info
.uses_instanceid
|=
8345 shader
->previous_stage
->info
.uses_instanceid
;
8347 if (shader
->prolog2
) {
8348 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8349 shader
->prolog2
->config
.num_sgprs
);
8350 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8351 shader
->prolog2
->config
.num_vgprs
);
8353 if (shader
->epilog
) {
8354 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8355 shader
->epilog
->config
.num_sgprs
);
8356 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8357 shader
->epilog
->config
.num_vgprs
);
8359 si_calculate_max_simd_waves(shader
);
8362 if (shader
->key
.as_ngg
) {
8363 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8364 gfx10_ngg_calculate_subgroup_info(shader
);
8365 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8366 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8369 si_fix_resource_usage(sscreen
, shader
);
8370 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8373 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8374 fprintf(stderr
, "LLVM failed to upload shader\n");
8381 void si_shader_destroy(struct si_shader
*shader
)
8383 if (shader
->scratch_bo
)
8384 si_resource_reference(&shader
->scratch_bo
, NULL
);
8386 si_resource_reference(&shader
->bo
, NULL
);
8388 if (!shader
->is_binary_shared
)
8389 si_shader_binary_clean(&shader
->binary
);
8391 free(shader
->shader_log
);