2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <llvm/Config/llvm-config.h>
27 #include "util/u_memory.h"
28 #include "util/u_string.h"
29 #include "tgsi/tgsi_build.h"
30 #include "tgsi/tgsi_strings.h"
31 #include "tgsi/tgsi_util.h"
32 #include "tgsi/tgsi_dump.h"
33 #include "tgsi/tgsi_from_mesa.h"
35 #include "ac_binary.h"
36 #include "ac_exp_param.h"
37 #include "ac_shader_util.h"
39 #include "ac_llvm_util.h"
40 #include "si_shader_internal.h"
44 #include "compiler/nir/nir.h"
45 #include "compiler/nir/nir_serialize.h"
47 static const char scratch_rsrc_dword0_symbol
[] =
48 "SCRATCH_RSRC_DWORD0";
50 static const char scratch_rsrc_dword1_symbol
[] =
51 "SCRATCH_RSRC_DWORD1";
53 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
54 struct si_screen
*sscreen
,
55 struct ac_llvm_compiler
*compiler
,
59 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
60 struct lp_build_tgsi_context
*bld_base
,
61 struct lp_build_emit_data
*emit_data
);
63 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
65 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
70 union si_shader_part_key
*key
);
71 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
72 union si_shader_part_key
*key
);
73 static void si_fix_resource_usage(struct si_screen
*sscreen
,
74 struct si_shader
*shader
);
76 /* Ideally pass the sample mask input to the PS epilog as v14, which
77 * is its usual location, so that the shader doesn't have to add v_mov.
79 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
81 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
84 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
90 /** Whether the shader runs as a combination of multiple API shaders */
91 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
93 if (ctx
->screen
->info
.chip_class
<= GFX8
)
96 return ctx
->shader
->key
.as_ls
||
97 ctx
->shader
->key
.as_es
||
98 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
99 ctx
->type
== PIPE_SHADER_GEOMETRY
;
102 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
103 static bool is_merged_shader(struct si_shader_context
*ctx
)
105 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
109 * Returns a unique index for a per-patch semantic name and index. The index
110 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
113 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
115 switch (semantic_name
) {
116 case TGSI_SEMANTIC_TESSOUTER
:
118 case TGSI_SEMANTIC_TESSINNER
:
120 case TGSI_SEMANTIC_PATCH
:
125 assert(!"invalid semantic name");
131 * Returns a unique index for a semantic name and index. The index must be
132 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
135 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
138 switch (semantic_name
) {
139 case TGSI_SEMANTIC_POSITION
:
141 case TGSI_SEMANTIC_GENERIC
:
142 /* Since some shader stages use the the highest used IO index
143 * to determine the size to allocate for inputs/outputs
144 * (in LDS, tess and GS rings). GENERIC should be placed right
145 * after POSITION to make that size as small as possible.
147 if (index
< SI_MAX_IO_GENERIC
)
150 assert(!"invalid generic index");
152 case TGSI_SEMANTIC_FOG
:
153 return SI_MAX_IO_GENERIC
+ 1;
154 case TGSI_SEMANTIC_COLOR
:
156 return SI_MAX_IO_GENERIC
+ 2 + index
;
157 case TGSI_SEMANTIC_BCOLOR
:
159 /* If it's a varying, COLOR and BCOLOR alias. */
161 return SI_MAX_IO_GENERIC
+ 2 + index
;
163 return SI_MAX_IO_GENERIC
+ 4 + index
;
164 case TGSI_SEMANTIC_TEXCOORD
:
166 return SI_MAX_IO_GENERIC
+ 6 + index
;
168 /* These are rarely used between LS and HS or ES and GS. */
169 case TGSI_SEMANTIC_CLIPDIST
:
171 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
172 case TGSI_SEMANTIC_CLIPVERTEX
:
173 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
174 case TGSI_SEMANTIC_PSIZE
:
175 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
177 /* These can't be written by LS, HS, and ES. */
178 case TGSI_SEMANTIC_LAYER
:
179 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
180 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
181 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
182 case TGSI_SEMANTIC_PRIMID
:
183 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
184 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
186 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
187 assert(!"invalid semantic name");
193 * Get the value of a shader input parameter and extract a bitfield.
195 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
196 LLVMValueRef value
, unsigned rshift
,
199 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
200 value
= ac_to_integer(&ctx
->ac
, value
);
203 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
204 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
206 if (rshift
+ bitwidth
< 32) {
207 unsigned mask
= (1 << bitwidth
) - 1;
208 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
209 LLVMConstInt(ctx
->i32
, mask
, 0), "");
215 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
216 struct ac_arg param
, unsigned rshift
,
219 LLVMValueRef value
= ac_get_arg(&ctx
->ac
, param
);
221 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
224 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
227 case PIPE_SHADER_TESS_CTRL
:
228 return si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 0, 8);
230 case PIPE_SHADER_TESS_EVAL
:
231 return ac_get_arg(&ctx
->ac
, ctx
->tes_rel_patch_id
);
239 /* Tessellation shaders pass outputs to the next shader using LDS.
241 * LS outputs = TCS inputs
242 * TCS outputs = TES inputs
245 * - TCS inputs for patch 0
246 * - TCS inputs for patch 1
247 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
249 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
250 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
251 * - TCS outputs for patch 1
252 * - Per-patch TCS outputs for patch 1
253 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
254 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
257 * All three shaders VS(LS), TCS, TES share the same LDS space.
261 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
263 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 8, 13);
266 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
268 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
270 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
271 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
273 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
276 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
278 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
280 return LLVMConstInt(ctx
->i32
, stride
, 0);
283 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
285 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
286 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 0, 13);
288 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
289 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
290 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
291 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
292 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
293 num_patch_outputs
* 4;
294 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
298 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
300 return LLVMBuildMul(ctx
->ac
.builder
,
301 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 0, 16),
302 LLVMConstInt(ctx
->i32
, 4, 0), "");
306 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
308 return LLVMBuildMul(ctx
->ac
.builder
,
309 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 16, 16),
310 LLVMConstInt(ctx
->i32
, 4, 0), "");
314 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
316 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
317 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
319 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
323 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
325 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
326 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
327 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
329 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
333 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
335 LLVMValueRef patch0_patch_data_offset
=
336 get_tcs_out_patch0_patch_data_offset(ctx
);
337 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
338 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
340 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
343 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
345 unsigned tcs_out_vertices
=
346 ctx
->shader
->selector
?
347 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
349 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
350 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
351 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
353 return si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 6, 6);
356 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
361 case PIPE_SHADER_VERTEX
:
362 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
363 return LLVMConstInt(ctx
->i32
, stride
, 0);
365 case PIPE_SHADER_TESS_CTRL
:
366 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
367 ctx
->shader
->is_monolithic
) {
368 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
369 return LLVMConstInt(ctx
->i32
, stride
, 0);
371 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 24, 8);
379 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
380 LLVMValueRef i32
, unsigned index
)
385 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
386 LLVMConstInt(ctx
->i32
, 16, 0), "");
388 return LLVMBuildSExt(ctx
->ac
.builder
,
389 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
394 void si_llvm_load_input_vs(
395 struct si_shader_context
*ctx
,
396 unsigned input_index
,
399 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
400 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
402 if (vs_blit_property
) {
403 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
404 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
405 LLVMIntULE
, vertex_id
,
407 /* Use LLVMIntNE, because we have 3 vertices and only
408 * the middle one should use y2.
410 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
411 LLVMIntNE
, vertex_id
,
414 unsigned param_vs_blit_inputs
= ctx
->vs_blit_inputs
.arg_index
;
415 if (input_index
== 0) {
417 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
418 param_vs_blit_inputs
);
419 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
420 param_vs_blit_inputs
+ 1);
422 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
423 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
424 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
425 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
427 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
429 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
432 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
433 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
434 out
[2] = LLVMGetParam(ctx
->main_fn
,
435 param_vs_blit_inputs
+ 2);
436 out
[3] = ctx
->ac
.f32_1
;
440 /* Color or texture coordinates: */
441 assert(input_index
== 1);
443 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
444 for (int i
= 0; i
< 4; i
++) {
445 out
[i
] = LLVMGetParam(ctx
->main_fn
,
446 param_vs_blit_inputs
+ 3 + i
);
449 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
450 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
451 param_vs_blit_inputs
+ 3);
452 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
453 param_vs_blit_inputs
+ 4);
454 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
455 param_vs_blit_inputs
+ 5);
456 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
457 param_vs_blit_inputs
+ 6);
459 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
461 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
463 out
[2] = LLVMGetParam(ctx
->main_fn
,
464 param_vs_blit_inputs
+ 7);
465 out
[3] = LLVMGetParam(ctx
->main_fn
,
466 param_vs_blit_inputs
+ 8);
471 union si_vs_fix_fetch fix_fetch
;
472 LLVMValueRef t_list_ptr
;
473 LLVMValueRef t_offset
;
475 LLVMValueRef vertex_index
;
478 /* Load the T list */
479 t_list_ptr
= ac_get_arg(&ctx
->ac
, ctx
->vertex_buffers
);
481 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
483 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
485 vertex_index
= LLVMGetParam(ctx
->main_fn
,
486 ctx
->vertex_index0
.arg_index
+
489 /* Use the open-coded implementation for all loads of doubles and
490 * of dword-sized data that needs fixups. We need to insert conversion
491 * code anyway, and the amd/common code does it for us.
493 * Note: On LLVM <= 8, we can only open-code formats with
494 * channel size >= 4 bytes.
496 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
497 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
499 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
500 (fix_fetch
.u
.log_size
== 2)) {
501 tmp
= ac_build_opencoded_load_format(
502 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
503 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
504 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
505 for (unsigned i
= 0; i
< 4; ++i
)
506 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
510 /* Do multiple loads for special formats. */
511 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
512 LLVMValueRef fetches
[4];
513 unsigned num_fetches
;
514 unsigned fetch_stride
;
515 unsigned channels_per_fetch
;
517 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
518 num_fetches
= MIN2(required_channels
, 3);
519 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
520 channels_per_fetch
= 1;
524 channels_per_fetch
= required_channels
;
527 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
528 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
529 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
530 channels_per_fetch
, 0, true);
533 if (num_fetches
== 1 && channels_per_fetch
> 1) {
534 LLVMValueRef fetch
= fetches
[0];
535 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
536 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
537 fetches
[i
] = LLVMBuildExtractElement(
538 ctx
->ac
.builder
, fetch
, tmp
, "");
540 num_fetches
= channels_per_fetch
;
541 channels_per_fetch
= 1;
544 for (unsigned i
= num_fetches
; i
< 4; ++i
)
545 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
547 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
548 required_channels
== 4) {
549 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
550 fetches
[3] = ctx
->ac
.i32_1
;
552 fetches
[3] = ctx
->ac
.f32_1
;
553 } else if (fix_fetch
.u
.log_size
== 3 &&
554 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
555 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
556 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
557 required_channels
== 4) {
558 /* For 2_10_10_10, the hardware returns an unsigned value;
559 * convert it to a signed one.
561 LLVMValueRef tmp
= fetches
[3];
562 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
564 /* First, recover the sign-extended signed integer value. */
565 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
566 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
568 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
570 /* For the integer-like cases, do a natural sign extension.
572 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
573 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
576 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
577 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
578 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
579 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
581 /* Convert back to the right type. */
582 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
584 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
585 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
586 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
587 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
588 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
589 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
595 for (unsigned i
= 0; i
< 4; ++i
)
596 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
599 static void declare_input_vs(
600 struct si_shader_context
*ctx
,
601 unsigned input_index
,
602 const struct tgsi_full_declaration
*decl
,
605 si_llvm_load_input_vs(ctx
, input_index
, out
);
608 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
615 case PIPE_SHADER_VERTEX
:
616 return ac_get_arg(&ctx
->ac
, ctx
->vs_prim_id
);
617 case PIPE_SHADER_TESS_CTRL
:
618 return ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
);
619 case PIPE_SHADER_TESS_EVAL
:
620 return ac_get_arg(&ctx
->ac
, ctx
->args
.tes_patch_id
);
621 case PIPE_SHADER_GEOMETRY
:
622 return ac_get_arg(&ctx
->ac
, ctx
->args
.gs_prim_id
);
630 * Return the value of tgsi_ind_register for indexing.
631 * This is the indirect index with the constant offset added to it.
633 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
634 const struct tgsi_ind_register
*ind
,
640 if (ind
->File
== TGSI_FILE_ADDRESS
) {
641 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
642 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
644 struct tgsi_full_src_register src
= {};
646 src
.Register
.File
= ind
->File
;
647 src
.Register
.Index
= ind
->Index
;
649 /* Set the second index to 0 for constants. */
650 if (ind
->File
== TGSI_FILE_CONSTANT
)
651 src
.Register
.Dimension
= 1;
653 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
656 result
= ac_to_integer(&ctx
->ac
, result
);
659 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
660 LLVMConstInt(ctx
->i32
, rel_index
, 0));
664 * Like si_get_indirect_index, but restricts the return value to a (possibly
665 * undefined) value inside [0..num).
667 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
668 const struct tgsi_ind_register
*ind
,
669 int rel_index
, unsigned num
)
671 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
673 return si_llvm_bound_index(ctx
, result
, num
);
676 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
677 LLVMValueRef vertex_dw_stride
,
678 LLVMValueRef base_addr
,
679 LLVMValueRef vertex_index
,
680 LLVMValueRef param_index
,
681 ubyte name
, ubyte index
)
683 if (vertex_dw_stride
) {
684 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
685 vertex_dw_stride
, base_addr
);
689 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
690 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
693 int param
= name
== TGSI_SEMANTIC_PATCH
||
694 name
== TGSI_SEMANTIC_TESSINNER
||
695 name
== TGSI_SEMANTIC_TESSOUTER
?
696 si_shader_io_get_unique_index_patch(name
, index
) :
697 si_shader_io_get_unique_index(name
, index
, false);
699 /* Add the base address of the element. */
700 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
701 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
705 * Calculate a dword address given an input or output register and a stride.
707 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
708 const struct tgsi_full_dst_register
*dst
,
709 const struct tgsi_full_src_register
*src
,
710 LLVMValueRef vertex_dw_stride
,
711 LLVMValueRef base_addr
)
713 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
714 ubyte
*name
, *index
, *array_first
;
716 struct tgsi_full_dst_register reg
;
717 LLVMValueRef vertex_index
= NULL
;
718 LLVMValueRef ind_index
= NULL
;
720 /* Set the register description. The address computation is the same
721 * for sources and destinations. */
723 reg
.Register
.File
= src
->Register
.File
;
724 reg
.Register
.Index
= src
->Register
.Index
;
725 reg
.Register
.Indirect
= src
->Register
.Indirect
;
726 reg
.Register
.Dimension
= src
->Register
.Dimension
;
727 reg
.Indirect
= src
->Indirect
;
728 reg
.Dimension
= src
->Dimension
;
729 reg
.DimIndirect
= src
->DimIndirect
;
733 /* If the register is 2-dimensional (e.g. an array of vertices
734 * in a primitive), calculate the base address of the vertex. */
735 if (reg
.Register
.Dimension
) {
736 if (reg
.Dimension
.Indirect
)
737 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
738 1, reg
.Dimension
.Index
);
740 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
743 /* Get information about the register. */
744 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
745 name
= info
->input_semantic_name
;
746 index
= info
->input_semantic_index
;
747 array_first
= info
->input_array_first
;
748 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
749 name
= info
->output_semantic_name
;
750 index
= info
->output_semantic_index
;
751 array_first
= info
->output_array_first
;
757 if (reg
.Register
.Indirect
) {
758 /* Add the relative address of the element. */
759 if (reg
.Indirect
.ArrayID
)
760 input_index
= array_first
[reg
.Indirect
.ArrayID
];
762 input_index
= reg
.Register
.Index
;
764 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
765 1, reg
.Register
.Index
- input_index
);
767 input_index
= reg
.Register
.Index
;
770 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
771 base_addr
, vertex_index
,
772 ind_index
, name
[input_index
],
776 /* The offchip buffer layout for TCS->TES is
778 * - attribute 0 of patch 0 vertex 0
779 * - attribute 0 of patch 0 vertex 1
780 * - attribute 0 of patch 0 vertex 2
782 * - attribute 0 of patch 1 vertex 0
783 * - attribute 0 of patch 1 vertex 1
785 * - attribute 1 of patch 0 vertex 0
786 * - attribute 1 of patch 0 vertex 1
788 * - per patch attribute 0 of patch 0
789 * - per patch attribute 0 of patch 1
792 * Note that every attribute has 4 components.
794 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
795 LLVMValueRef rel_patch_id
,
796 LLVMValueRef vertex_index
,
797 LLVMValueRef param_index
)
799 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
800 LLVMValueRef param_stride
, constant16
;
802 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
803 num_patches
= si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 6);
804 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
807 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
809 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
810 vertices_per_patch
, vertex_index
);
811 param_stride
= total_vertices
;
813 base_addr
= rel_patch_id
;
814 param_stride
= num_patches
;
817 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
818 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
821 LLVMValueRef patch_data_offset
=
822 si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 12, 20);
824 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
825 patch_data_offset
, "");
830 /* This is a generic helper that can be shared by the NIR and TGSI backends */
831 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
832 struct si_shader_context
*ctx
,
833 LLVMValueRef vertex_index
,
834 LLVMValueRef param_index
,
835 ubyte name
, ubyte index
)
837 unsigned param_index_base
;
839 param_index_base
= name
== TGSI_SEMANTIC_PATCH
||
840 name
== TGSI_SEMANTIC_TESSINNER
||
841 name
== TGSI_SEMANTIC_TESSOUTER
?
842 si_shader_io_get_unique_index_patch(name
, index
) :
843 si_shader_io_get_unique_index(name
, index
, false);
846 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
847 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
850 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
853 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
854 vertex_index
, param_index
);
857 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
858 struct si_shader_context
*ctx
,
859 const struct tgsi_full_dst_register
*dst
,
860 const struct tgsi_full_src_register
*src
)
862 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
863 ubyte
*name
, *index
, *array_first
;
864 struct tgsi_full_src_register reg
;
865 LLVMValueRef vertex_index
= NULL
;
866 LLVMValueRef param_index
= NULL
;
869 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
871 if (reg
.Register
.Dimension
) {
872 if (reg
.Dimension
.Indirect
)
873 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
874 1, reg
.Dimension
.Index
);
876 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
879 /* Get information about the register. */
880 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
881 name
= info
->input_semantic_name
;
882 index
= info
->input_semantic_index
;
883 array_first
= info
->input_array_first
;
884 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
885 name
= info
->output_semantic_name
;
886 index
= info
->output_semantic_index
;
887 array_first
= info
->output_array_first
;
893 if (reg
.Register
.Indirect
) {
894 if (reg
.Indirect
.ArrayID
)
895 param_base
= array_first
[reg
.Indirect
.ArrayID
];
897 param_base
= reg
.Register
.Index
;
899 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
900 1, reg
.Register
.Index
- param_base
);
902 param_base
= reg
.Register
.Index
;
905 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
906 param_index
, name
[param_base
],
910 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
911 LLVMTypeRef type
, unsigned swizzle
,
912 LLVMValueRef buffer
, LLVMValueRef offset
,
913 LLVMValueRef base
, bool can_speculate
)
915 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
916 LLVMValueRef value
, value2
;
917 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
920 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
921 0, ac_glc
, can_speculate
, false);
923 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
926 if (!llvm_type_is_64bit(ctx
, type
)) {
927 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
928 0, ac_glc
, can_speculate
, false);
930 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
931 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
932 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
935 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
936 swizzle
* 4, ac_glc
, can_speculate
, false);
938 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
939 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
941 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
945 * Load from LSHS LDS storage.
947 * \param type output value type
948 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
949 * \param dw_addr address in dwords
951 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
952 LLVMTypeRef type
, unsigned swizzle
,
953 LLVMValueRef dw_addr
)
955 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
959 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
961 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
962 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
964 return ac_build_gather_values(&ctx
->ac
, values
,
968 /* Split 64-bit loads. */
969 if (llvm_type_is_64bit(ctx
, type
)) {
972 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
973 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
974 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
977 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
978 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
980 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
982 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
986 * Store to LSHS LDS storage.
988 * \param swizzle offset (typically 0..3)
989 * \param dw_addr address in dwords
990 * \param value value to store
992 static void lshs_lds_store(struct si_shader_context
*ctx
,
993 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
996 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
997 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
999 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1004 TESS_OFFCHIP_RING_TCS
,
1005 TESS_OFFCHIP_RING_TES
,
1008 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1009 enum si_tess_ring ring
)
1011 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1012 LLVMValueRef addr
= ac_get_arg(&ctx
->ac
,
1013 ring
== TESS_OFFCHIP_RING_TES
?
1014 ctx
->tes_offchip_addr
:
1015 ctx
->tcs_out_lds_layout
);
1017 /* TCS only receives high 13 bits of the address. */
1018 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1019 addr
= LLVMBuildAnd(builder
, addr
,
1020 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1023 if (ring
== TCS_FACTOR_RING
) {
1024 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1025 addr
= LLVMBuildAdd(builder
, addr
,
1026 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1029 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1030 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1031 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1032 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1034 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1035 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1036 S_008F0C_OOB_SELECT(3) |
1037 S_008F0C_RESOURCE_LEVEL(1);
1039 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1040 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1042 LLVMValueRef desc
[4];
1044 desc
[1] = LLVMConstInt(ctx
->i32
,
1045 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1046 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1047 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1049 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1052 static LLVMValueRef
fetch_input_tcs(
1053 struct lp_build_tgsi_context
*bld_base
,
1054 const struct tgsi_full_src_register
*reg
,
1055 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1057 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1058 LLVMValueRef dw_addr
, stride
;
1059 unsigned swizzle
= swizzle_in
& 0xffff;
1060 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1061 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1062 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1064 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1067 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1069 LLVMValueRef vertex_index
,
1070 LLVMValueRef param_index
,
1071 unsigned const_index
,
1073 unsigned driver_location
,
1075 unsigned num_components
,
1080 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1081 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1082 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1083 LLVMValueRef dw_addr
, stride
;
1086 driver_location
= driver_location
/ 4;
1089 name
= info
->input_semantic_name
[driver_location
];
1090 index
= info
->input_semantic_index
[driver_location
];
1092 name
= info
->output_semantic_name
[driver_location
];
1093 index
= info
->output_semantic_index
[driver_location
];
1096 assert((name
== TGSI_SEMANTIC_PATCH
||
1097 name
== TGSI_SEMANTIC_TESSINNER
||
1098 name
== TGSI_SEMANTIC_TESSOUTER
) == is_patch
);
1101 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1102 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1106 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1108 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1109 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1114 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1117 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1118 vertex_index
, param_index
,
1121 LLVMValueRef value
[4];
1122 for (unsigned i
= 0; i
< num_components
; i
++) {
1123 unsigned offset
= i
;
1124 if (llvm_type_is_64bit(ctx
, type
))
1127 offset
+= component
;
1128 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1131 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1134 static LLVMValueRef
fetch_output_tcs(
1135 struct lp_build_tgsi_context
*bld_base
,
1136 const struct tgsi_full_src_register
*reg
,
1137 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1139 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1140 LLVMValueRef dw_addr
, stride
;
1141 unsigned swizzle
= (swizzle_in
& 0xffff);
1143 if (reg
->Register
.Dimension
) {
1144 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1145 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1146 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1148 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1149 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1152 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1155 static LLVMValueRef
fetch_input_tes(
1156 struct lp_build_tgsi_context
*bld_base
,
1157 const struct tgsi_full_src_register
*reg
,
1158 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1160 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1161 LLVMValueRef base
, addr
;
1162 unsigned swizzle
= (swizzle_in
& 0xffff);
1164 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1165 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1167 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1168 ctx
->tess_offchip_ring
, base
, addr
, true);
1171 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1173 LLVMValueRef vertex_index
,
1174 LLVMValueRef param_index
,
1175 unsigned const_index
,
1177 unsigned driver_location
,
1179 unsigned num_components
,
1184 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1185 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1186 LLVMValueRef base
, addr
;
1188 driver_location
= driver_location
/ 4;
1189 ubyte name
= info
->input_semantic_name
[driver_location
];
1190 ubyte index
= info
->input_semantic_index
[driver_location
];
1192 assert((name
== TGSI_SEMANTIC_PATCH
||
1193 name
== TGSI_SEMANTIC_TESSINNER
||
1194 name
== TGSI_SEMANTIC_TESSOUTER
) == is_patch
);
1196 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1199 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1202 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1206 /* TODO: This will generate rather ordinary llvm code, although it
1207 * should be easy for the optimiser to fix up. In future we might want
1208 * to refactor buffer_load(), but for now this maximises code sharing
1209 * between the NIR and TGSI backends.
1211 LLVMValueRef value
[4];
1212 for (unsigned i
= 0; i
< num_components
; i
++) {
1213 unsigned offset
= i
;
1214 if (llvm_type_is_64bit(ctx
, type
)) {
1217 ubyte name
= info
->input_semantic_name
[driver_location
+ 1];
1218 ubyte index
= info
->input_semantic_index
[driver_location
+ 1];
1219 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1225 offset
= offset
% 4;
1228 offset
+= component
;
1229 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1230 ctx
->tess_offchip_ring
, base
, addr
, true);
1233 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1236 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1237 const struct tgsi_full_instruction
*inst
,
1238 const struct tgsi_opcode_info
*info
,
1240 LLVMValueRef dst
[4])
1242 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1243 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1244 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1245 unsigned chan_index
;
1246 LLVMValueRef dw_addr
, stride
;
1247 LLVMValueRef buffer
, base
, buf_addr
;
1248 LLVMValueRef values
[4];
1249 bool skip_lds_store
;
1250 bool is_tess_factor
= false, is_tess_inner
= false;
1252 /* Only handle per-patch and per-vertex outputs here.
1253 * Vectors will be lowered to scalars and this function will be called again.
1255 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1256 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1257 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1261 if (reg
->Register
.Dimension
) {
1262 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1263 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1264 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1265 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1267 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1268 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1269 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1271 if (!reg
->Register
.Indirect
) {
1272 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1274 /* Always write tess factors into LDS for the TCS epilog. */
1275 if (name
== TGSI_SEMANTIC_TESSINNER
||
1276 name
== TGSI_SEMANTIC_TESSOUTER
) {
1277 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1278 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1279 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1280 is_tess_factor
= true;
1281 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1286 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1288 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1289 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1291 uint32_t writemask
= reg
->Register
.WriteMask
;
1293 chan_index
= u_bit_scan(&writemask
);
1294 LLVMValueRef value
= dst
[chan_index
];
1296 if (inst
->Instruction
.Saturate
)
1297 value
= ac_build_clamp(&ctx
->ac
, value
);
1299 /* Skip LDS stores if there is no LDS read of this output. */
1300 if (!skip_lds_store
)
1301 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1303 value
= ac_to_integer(&ctx
->ac
, value
);
1304 values
[chan_index
] = value
;
1306 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1307 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1309 4 * chan_index
, ac_glc
);
1312 /* Write tess factors into VGPRs for the epilog. */
1313 if (is_tess_factor
&&
1314 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1315 if (!is_tess_inner
) {
1316 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1317 ctx
->invoc0_tess_factors
[chan_index
]);
1318 } else if (chan_index
< 2) {
1319 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1320 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1325 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1326 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1328 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1333 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1334 const struct nir_variable
*var
,
1335 LLVMValueRef vertex_index
,
1336 LLVMValueRef param_index
,
1337 unsigned const_index
,
1341 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1342 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1343 const unsigned component
= var
->data
.location_frac
;
1344 const bool is_patch
= var
->data
.patch
;
1345 unsigned driver_location
= var
->data
.driver_location
;
1346 LLVMValueRef dw_addr
, stride
;
1347 LLVMValueRef buffer
, base
, addr
;
1348 LLVMValueRef values
[8];
1349 bool skip_lds_store
;
1350 bool is_tess_factor
= false, is_tess_inner
= false;
1352 driver_location
= driver_location
/ 4;
1353 ubyte name
= info
->output_semantic_name
[driver_location
];
1354 ubyte index
= info
->output_semantic_index
[driver_location
];
1356 bool is_const
= !param_index
;
1358 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1360 assert((name
== TGSI_SEMANTIC_PATCH
||
1361 name
== TGSI_SEMANTIC_TESSINNER
||
1362 name
== TGSI_SEMANTIC_TESSOUTER
) == is_patch
);
1365 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1366 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1367 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1368 vertex_index
, param_index
,
1371 skip_lds_store
= !info
->reads_pervertex_outputs
;
1373 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1374 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1375 vertex_index
, param_index
,
1378 skip_lds_store
= !info
->reads_perpatch_outputs
;
1380 if (is_const
&& const_index
== 0) {
1381 int name
= info
->output_semantic_name
[driver_location
];
1383 /* Always write tess factors into LDS for the TCS epilog. */
1384 if (name
== TGSI_SEMANTIC_TESSINNER
||
1385 name
== TGSI_SEMANTIC_TESSOUTER
) {
1386 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1387 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1388 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1389 is_tess_factor
= true;
1390 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1395 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1397 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1399 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1400 param_index
, name
, index
);
1402 for (unsigned chan
= 0; chan
< 8; chan
++) {
1403 if (!(writemask
& (1 << chan
)))
1405 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1407 unsigned buffer_store_offset
= chan
% 4;
1409 ubyte name
= info
->output_semantic_name
[driver_location
+ 1];
1410 ubyte index
= info
->output_semantic_index
[driver_location
+ 1];
1411 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1417 /* Skip LDS stores if there is no LDS read of this output. */
1418 if (!skip_lds_store
)
1419 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1421 value
= ac_to_integer(&ctx
->ac
, value
);
1422 values
[chan
] = value
;
1424 if (writemask
!= 0xF && !is_tess_factor
) {
1425 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1427 4 * buffer_store_offset
,
1431 /* Write tess factors into VGPRs for the epilog. */
1432 if (is_tess_factor
&&
1433 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1434 if (!is_tess_inner
) {
1435 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1436 ctx
->invoc0_tess_factors
[chan
]);
1437 } else if (chan
< 2) {
1438 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1439 ctx
->invoc0_tess_factors
[4 + chan
]);
1444 if (writemask
== 0xF && !is_tess_factor
) {
1445 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1447 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1452 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1453 unsigned input_index
,
1454 unsigned vtx_offset_param
,
1458 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1459 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1460 struct si_shader
*shader
= ctx
->shader
;
1461 LLVMValueRef vtx_offset
, soffset
;
1462 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1463 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1464 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1468 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1470 /* GFX9 has the ESGS ring in LDS. */
1471 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1472 unsigned index
= vtx_offset_param
;
1474 switch (index
/ 2) {
1476 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx01_offset
,
1477 index
% 2 ? 16 : 0, 16);
1480 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx23_offset
,
1481 index
% 2 ? 16 : 0, 16);
1484 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx45_offset
,
1485 index
% 2 ? 16 : 0, 16);
1492 unsigned offset
= param
* 4 + swizzle
;
1493 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1494 LLVMConstInt(ctx
->i32
, offset
, false), "");
1496 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1497 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1498 if (llvm_type_is_64bit(ctx
, type
)) {
1499 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1500 &ctx
->ac
.i32_1
, 1, "");
1501 LLVMValueRef values
[2] = {
1503 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1505 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1507 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1510 /* GFX6: input load from the ESGS ring in memory. */
1511 if (swizzle
== ~0) {
1512 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1514 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1515 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1518 return ac_build_gather_values(&ctx
->ac
, values
,
1522 /* Get the vertex offset parameter on GFX6. */
1523 LLVMValueRef gs_vtx_offset
= ac_get_arg(&ctx
->ac
,
1524 ctx
->gs_vtx_offset
[vtx_offset_param
]);
1526 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1527 LLVMConstInt(ctx
->i32
, 4, 0), "");
1529 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1531 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1532 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1533 if (llvm_type_is_64bit(ctx
, type
)) {
1534 LLVMValueRef value2
;
1535 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1537 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1538 ctx
->i32_0
, vtx_offset
, soffset
,
1539 0, ac_glc
, true, false);
1540 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1542 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1545 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1547 unsigned driver_location
,
1549 unsigned num_components
,
1550 unsigned vertex_index
,
1551 unsigned const_index
,
1554 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1556 LLVMValueRef value
[4];
1557 for (unsigned i
= 0; i
< num_components
; i
++) {
1558 unsigned offset
= i
;
1559 if (llvm_type_is_64bit(ctx
, type
))
1562 offset
+= component
;
1563 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4 + const_index
,
1564 vertex_index
, type
, offset
);
1567 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1570 static LLVMValueRef
fetch_input_gs(
1571 struct lp_build_tgsi_context
*bld_base
,
1572 const struct tgsi_full_src_register
*reg
,
1573 enum tgsi_opcode_type type
,
1574 unsigned swizzle_in
)
1576 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1577 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1578 unsigned swizzle
= swizzle_in
& 0xffff;
1580 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1581 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1582 return si_get_primitive_id(ctx
, swizzle
);
1584 if (!reg
->Register
.Dimension
)
1587 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1588 reg
->Dimension
.Index
,
1589 tgsi2llvmtype(bld_base
, type
),
1593 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1595 switch (interpolate
) {
1596 case TGSI_INTERPOLATE_CONSTANT
:
1599 case TGSI_INTERPOLATE_LINEAR
:
1600 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1601 return SI_PARAM_LINEAR_SAMPLE
;
1602 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1603 return SI_PARAM_LINEAR_CENTROID
;
1605 return SI_PARAM_LINEAR_CENTER
;
1607 case TGSI_INTERPOLATE_COLOR
:
1608 case TGSI_INTERPOLATE_PERSPECTIVE
:
1609 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1610 return SI_PARAM_PERSP_SAMPLE
;
1611 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1612 return SI_PARAM_PERSP_CENTROID
;
1614 return SI_PARAM_PERSP_CENTER
;
1617 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1622 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1623 unsigned attr_index
, unsigned chan
,
1624 LLVMValueRef prim_mask
,
1625 LLVMValueRef i
, LLVMValueRef j
)
1628 return ac_build_fs_interp(&ctx
->ac
,
1629 LLVMConstInt(ctx
->i32
, chan
, 0),
1630 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1633 return ac_build_fs_interp_mov(&ctx
->ac
,
1634 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1635 LLVMConstInt(ctx
->i32
, chan
, 0),
1636 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1641 * Interpolate a fragment shader input.
1643 * @param ctx context
1644 * @param input_index index of the input in hardware
1645 * @param semantic_name TGSI_SEMANTIC_*
1646 * @param semantic_index semantic index
1647 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1648 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1649 * @param interp_param interpolation weights (i,j)
1650 * @param prim_mask SI_PARAM_PRIM_MASK
1651 * @param face SI_PARAM_FRONT_FACE
1652 * @param result the return value (4 components)
1654 static void interp_fs_input(struct si_shader_context
*ctx
,
1655 unsigned input_index
,
1656 unsigned semantic_name
,
1657 unsigned semantic_index
,
1658 unsigned num_interp_inputs
,
1659 unsigned colors_read_mask
,
1660 LLVMValueRef interp_param
,
1661 LLVMValueRef prim_mask
,
1663 LLVMValueRef result
[4])
1665 LLVMValueRef i
= NULL
, j
= NULL
;
1668 /* fs.constant returns the param from the middle vertex, so it's not
1669 * really useful for flat shading. It's meant to be used for custom
1670 * interpolation (but the intrinsic can't fetch from the other two
1673 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1674 * to do the right thing. The only reason we use fs.constant is that
1675 * fs.interp cannot be used on integers, because they can be equal
1678 * When interp is false we will use fs.constant or for newer llvm,
1679 * amdgcn.interp.mov.
1681 bool interp
= interp_param
!= NULL
;
1684 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1685 LLVMVectorType(ctx
->f32
, 2), "");
1687 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1689 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1693 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1694 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1695 LLVMValueRef is_face_positive
;
1697 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1698 * otherwise it's at offset "num_inputs".
1700 unsigned back_attr_offset
= num_interp_inputs
;
1701 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1702 back_attr_offset
+= 1;
1704 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1705 face
, ctx
->i32_0
, "");
1707 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1708 LLVMValueRef front
, back
;
1710 front
= si_build_fs_interp(ctx
,
1713 back
= si_build_fs_interp(ctx
,
1714 back_attr_offset
, chan
,
1717 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1723 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1724 result
[0] = si_build_fs_interp(ctx
, input_index
,
1725 0, prim_mask
, i
, j
);
1727 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1728 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1730 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1731 result
[chan
] = si_build_fs_interp(ctx
,
1738 void si_llvm_load_input_fs(
1739 struct si_shader_context
*ctx
,
1740 unsigned input_index
,
1741 LLVMValueRef out
[4])
1743 struct si_shader
*shader
= ctx
->shader
;
1744 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1745 LLVMValueRef main_fn
= ctx
->main_fn
;
1746 LLVMValueRef interp_param
= NULL
;
1747 int interp_param_idx
;
1748 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1749 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1750 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1751 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1753 /* Get colors from input VGPRs (set by the prolog). */
1754 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1755 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1756 unsigned mask
= colors_read
>> (semantic_index
* 4);
1757 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1758 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1759 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1761 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1762 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1763 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1764 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1768 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1769 if (interp_param_idx
== -1)
1771 else if (interp_param_idx
) {
1772 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1775 interp_fs_input(ctx
, input_index
, semantic_name
,
1776 semantic_index
, 0, /* this param is unused */
1777 shader
->selector
->info
.colors_read
, interp_param
,
1778 ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
),
1779 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1783 static void declare_input_fs(
1784 struct si_shader_context
*ctx
,
1785 unsigned input_index
,
1786 const struct tgsi_full_declaration
*decl
,
1787 LLVMValueRef out
[4])
1789 si_llvm_load_input_fs(ctx
, input_index
, out
);
1792 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1794 return si_unpack_param(ctx
, ctx
->args
.ancillary
, 8, 4);
1797 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1799 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1801 /* For non-indexed draws, the base vertex set by the driver
1802 * (for direct draws) or the CP (for indirect draws) is the
1803 * first vertex ID, but GLSL expects 0 to be returned.
1805 LLVMValueRef vs_state
= ac_get_arg(&ctx
->ac
,
1806 ctx
->vs_state_bits
);
1807 LLVMValueRef indexed
;
1809 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1810 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1812 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
1813 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
),
1817 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1819 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1821 LLVMValueRef values
[3];
1822 LLVMValueRef result
;
1824 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1826 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1827 unsigned sizes
[3] = {
1828 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1829 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1830 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1833 for (i
= 0; i
< 3; ++i
)
1834 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1836 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1838 result
= ac_get_arg(&ctx
->ac
, ctx
->block_size
);
1845 * Load a dword from a constant buffer.
1847 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1848 LLVMValueRef resource
,
1849 LLVMValueRef offset
)
1851 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1855 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1857 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1858 LLVMValueRef desc
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1859 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1860 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1862 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1863 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1864 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1866 LLVMValueRef pos
[4] = {
1867 buffer_load_const(ctx
, resource
, offset0
),
1868 buffer_load_const(ctx
, resource
, offset1
),
1869 LLVMConstReal(ctx
->f32
, 0),
1870 LLVMConstReal(ctx
->f32
, 0)
1873 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1876 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1878 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1879 return ac_to_integer(&ctx
->ac
, ac_get_arg(&ctx
->ac
, ctx
->args
.sample_coverage
));
1882 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1884 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1885 LLVMValueRef coord
[4] = {
1886 ac_get_arg(&ctx
->ac
, ctx
->tes_u
),
1887 ac_get_arg(&ctx
->ac
, ctx
->tes_v
),
1892 /* For triangles, the vector should be (u, v, 1-u-v). */
1893 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1894 PIPE_PRIM_TRIANGLES
) {
1895 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1896 LLVMBuildFAdd(ctx
->ac
.builder
,
1897 coord
[0], coord
[1], ""), "");
1899 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1902 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1903 unsigned semantic_name
)
1905 LLVMValueRef base
, addr
;
1907 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1909 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1910 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1911 LLVMConstInt(ctx
->i32
, param
, 0));
1913 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1914 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1918 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1919 unsigned semantic_name
)
1921 LLVMValueRef buf
, slot
, val
[4];
1924 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1925 buf
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1926 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1927 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1929 for (i
= 0; i
< 4; i
++)
1930 val
[i
] = buffer_load_const(ctx
, buf
,
1931 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1932 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1935 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1936 unsigned varying_id
,
1937 bool load_default_state
)
1939 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1940 unsigned semantic_name
;
1942 if (load_default_state
) {
1943 switch (varying_id
) {
1944 case VARYING_SLOT_TESS_LEVEL_INNER
:
1945 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
1947 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1948 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
1951 unreachable("unknown tess level");
1953 return load_tess_level_default(ctx
, semantic_name
);
1956 switch (varying_id
) {
1957 case VARYING_SLOT_TESS_LEVEL_INNER
:
1958 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1960 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1961 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1964 unreachable("unknown tess level");
1967 return load_tess_level(ctx
, semantic_name
);
1971 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1973 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1974 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1975 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 13, 6);
1976 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1977 return get_num_tcs_out_vertices(ctx
);
1979 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1982 void si_load_system_value(struct si_shader_context
*ctx
,
1984 const struct tgsi_full_declaration
*decl
)
1986 LLVMValueRef value
= 0;
1988 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1990 switch (decl
->Semantic
.Name
) {
1991 case TGSI_SEMANTIC_INSTANCEID
:
1992 value
= ctx
->abi
.instance_id
;
1995 case TGSI_SEMANTIC_VERTEXID
:
1996 value
= LLVMBuildAdd(ctx
->ac
.builder
,
1998 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
), "");
2001 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2002 /* Unused. Clarify the meaning in indexed vs. non-indexed
2003 * draws if this is ever used again. */
2007 case TGSI_SEMANTIC_BASEVERTEX
:
2008 value
= get_base_vertex(&ctx
->abi
);
2011 case TGSI_SEMANTIC_BASEINSTANCE
:
2012 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.start_instance
);
2015 case TGSI_SEMANTIC_DRAWID
:
2016 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.draw_id
);
2019 case TGSI_SEMANTIC_INVOCATIONID
:
2020 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2021 value
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
2022 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2023 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2024 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2025 ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
),
2026 LLVMConstInt(ctx
->i32
, 127, 0), "");
2028 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
);
2031 assert(!"INVOCATIONID not implemented");
2035 case TGSI_SEMANTIC_POSITION
:
2037 LLVMValueRef pos
[4] = {
2038 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2039 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2040 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2041 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2042 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2044 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2048 case TGSI_SEMANTIC_FACE
:
2049 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.front_face
);
2052 case TGSI_SEMANTIC_SAMPLEID
:
2053 value
= si_get_sample_id(ctx
);
2056 case TGSI_SEMANTIC_SAMPLEPOS
: {
2057 LLVMValueRef pos
[4] = {
2058 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2059 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2060 LLVMConstReal(ctx
->f32
, 0),
2061 LLVMConstReal(ctx
->f32
, 0)
2063 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2064 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2065 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2069 case TGSI_SEMANTIC_SAMPLEMASK
:
2070 /* This can only occur with the OpenGL Core profile, which
2071 * doesn't support smoothing.
2073 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2076 case TGSI_SEMANTIC_TESSCOORD
:
2077 value
= si_load_tess_coord(&ctx
->abi
);
2080 case TGSI_SEMANTIC_VERTICESIN
:
2081 value
= si_load_patch_vertices_in(&ctx
->abi
);
2084 case TGSI_SEMANTIC_TESSINNER
:
2085 case TGSI_SEMANTIC_TESSOUTER
:
2086 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2089 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2090 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2091 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2094 case TGSI_SEMANTIC_PRIMID
:
2095 value
= si_get_primitive_id(ctx
, 0);
2098 case TGSI_SEMANTIC_GRID_SIZE
:
2099 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.num_work_groups
);
2102 case TGSI_SEMANTIC_BLOCK_SIZE
:
2103 value
= get_block_size(&ctx
->abi
);
2106 case TGSI_SEMANTIC_BLOCK_ID
:
2108 LLVMValueRef values
[3];
2110 for (int i
= 0; i
< 3; i
++) {
2111 values
[i
] = ctx
->i32_0
;
2112 if (ctx
->args
.workgroup_ids
[i
].used
) {
2113 values
[i
] = ac_get_arg(&ctx
->ac
, ctx
->args
.workgroup_ids
[i
]);
2116 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2120 case TGSI_SEMANTIC_THREAD_ID
:
2121 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.local_invocation_ids
);
2124 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2125 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2128 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2129 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2132 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2133 value
= ac_get_thread_id(&ctx
->ac
);
2136 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2138 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2139 if (ctx
->ac
.wave_size
== 64)
2140 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2141 value
= LLVMBuildShl(ctx
->ac
.builder
,
2142 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2143 if (ctx
->ac
.wave_size
== 32)
2144 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2145 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2149 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2150 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2151 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2152 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2154 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2155 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2156 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2157 /* All bits set except LSB */
2158 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2161 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2163 if (ctx
->ac
.wave_size
== 64)
2164 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2165 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2166 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2167 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2168 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2169 if (ctx
->ac
.wave_size
== 32)
2170 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2171 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2175 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2176 value
= ac_get_arg(&ctx
->ac
, ctx
->cs_user_data
);
2180 assert(!"unknown system value");
2184 ctx
->system_values
[index
] = value
;
2187 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2189 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2190 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2192 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2195 assert(!ctx
->ac
.lds
);
2197 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2198 LLVMArrayType(ctx
->i8
, lds_size
),
2201 LLVMSetAlignment(var
, 64 * 1024);
2203 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2206 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2207 const struct tgsi_full_declaration
*decl
)
2209 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2210 assert(decl
->Range
.First
== decl
->Range
.Last
);
2212 si_declare_compute_memory(ctx
);
2215 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2218 ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2219 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2221 /* Do the bounds checking with a descriptor, because
2222 * doing computation and manual bounds checking of 64-bit
2223 * addresses generates horrible VALU code with very high
2224 * VGPR usage and very low SIMD occupancy.
2226 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2228 LLVMValueRef desc0
, desc1
;
2230 desc1
= LLVMConstInt(ctx
->i32
,
2231 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2233 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2234 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2235 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2236 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2238 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2239 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2240 S_008F0C_OOB_SELECT(3) |
2241 S_008F0C_RESOURCE_LEVEL(1);
2243 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2244 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2246 LLVMValueRef desc_elems
[] = {
2249 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2250 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2253 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2256 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2258 LLVMValueRef list_ptr
= ac_get_arg(&ctx
->ac
,
2259 ctx
->const_and_shader_buffers
);
2261 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2262 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2265 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2267 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2268 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2270 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2272 if (sel
->info
.const_buffers_declared
== 1 &&
2273 sel
->info
.shader_buffers_declared
== 0) {
2274 return load_const_buffer_desc_fast_path(ctx
);
2277 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2278 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2279 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2281 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2285 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2287 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2288 LLVMValueRef rsrc_ptr
= ac_get_arg(&ctx
->ac
,
2289 ctx
->const_and_shader_buffers
);
2291 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2292 index
= LLVMBuildSub(ctx
->ac
.builder
,
2293 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2296 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2299 static LLVMValueRef
fetch_constant(
2300 struct lp_build_tgsi_context
*bld_base
,
2301 const struct tgsi_full_src_register
*reg
,
2302 enum tgsi_opcode_type type
,
2303 unsigned swizzle_in
)
2305 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2306 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2307 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2309 unsigned swizzle
= swizzle_in
& 0xffff;
2311 LLVMValueRef addr
, bufp
;
2313 if (swizzle_in
== LP_CHAN_ALL
) {
2315 LLVMValueRef values
[4];
2316 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2317 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2319 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2322 /* Split 64-bit loads. */
2323 if (tgsi_type_is_64bit(type
)) {
2324 LLVMValueRef lo
, hi
;
2326 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2327 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2328 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2332 idx
= reg
->Register
.Index
* 4 + swizzle
;
2333 if (reg
->Register
.Indirect
) {
2334 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2336 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2339 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2340 if (sel
->info
.const_buffers_declared
== 1 &&
2341 sel
->info
.shader_buffers_declared
== 0) {
2342 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2343 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2344 return bitcast(bld_base
, type
, result
);
2347 assert(reg
->Register
.Dimension
);
2348 buf
= reg
->Dimension
.Index
;
2350 if (reg
->Dimension
.Indirect
) {
2351 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2353 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2354 reg
->Dimension
.Index
,
2355 ctx
->num_const_buffers
);
2356 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2357 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2358 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2360 bufp
= load_const_buffer_desc(ctx
, buf
);
2362 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2365 /* Initialize arguments for the shader export intrinsic */
2366 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2367 LLVMValueRef
*values
,
2369 struct ac_export_args
*args
)
2371 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2372 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2374 bool is_int8
, is_int10
;
2376 /* Default is 0xf. Adjusted below depending on the format. */
2377 args
->enabled_channels
= 0xf; /* writemask */
2379 /* Specify whether the EXEC mask represents the valid mask */
2380 args
->valid_mask
= 0;
2382 /* Specify whether this is the last export */
2385 /* Specify the target we are exporting */
2386 args
->target
= target
;
2388 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2389 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2390 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2391 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2393 assert(cbuf
>= 0 && cbuf
< 8);
2394 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2395 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2396 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2399 args
->compr
= false;
2400 args
->out
[0] = f32undef
;
2401 args
->out
[1] = f32undef
;
2402 args
->out
[2] = f32undef
;
2403 args
->out
[3] = f32undef
;
2405 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2406 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2407 unsigned bits
, bool hi
) = NULL
;
2409 switch (spi_shader_col_format
) {
2410 case V_028714_SPI_SHADER_ZERO
:
2411 args
->enabled_channels
= 0; /* writemask */
2412 args
->target
= V_008DFC_SQ_EXP_NULL
;
2415 case V_028714_SPI_SHADER_32_R
:
2416 args
->enabled_channels
= 1; /* writemask */
2417 args
->out
[0] = values
[0];
2420 case V_028714_SPI_SHADER_32_GR
:
2421 args
->enabled_channels
= 0x3; /* writemask */
2422 args
->out
[0] = values
[0];
2423 args
->out
[1] = values
[1];
2426 case V_028714_SPI_SHADER_32_AR
:
2427 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2428 args
->enabled_channels
= 0x3; /* writemask */
2429 args
->out
[0] = values
[0];
2430 args
->out
[1] = values
[3];
2432 args
->enabled_channels
= 0x9; /* writemask */
2433 args
->out
[0] = values
[0];
2434 args
->out
[3] = values
[3];
2438 case V_028714_SPI_SHADER_FP16_ABGR
:
2439 packf
= ac_build_cvt_pkrtz_f16
;
2442 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2443 packf
= ac_build_cvt_pknorm_u16
;
2446 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2447 packf
= ac_build_cvt_pknorm_i16
;
2450 case V_028714_SPI_SHADER_UINT16_ABGR
:
2451 packi
= ac_build_cvt_pk_u16
;
2454 case V_028714_SPI_SHADER_SINT16_ABGR
:
2455 packi
= ac_build_cvt_pk_i16
;
2458 case V_028714_SPI_SHADER_32_ABGR
:
2459 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2463 /* Pack f16 or norm_i16/u16. */
2465 for (chan
= 0; chan
< 2; chan
++) {
2466 LLVMValueRef pack_args
[2] = {
2468 values
[2 * chan
+ 1]
2470 LLVMValueRef packed
;
2472 packed
= packf(&ctx
->ac
, pack_args
);
2473 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2475 args
->compr
= 1; /* COMPR flag */
2479 for (chan
= 0; chan
< 2; chan
++) {
2480 LLVMValueRef pack_args
[2] = {
2481 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2482 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2484 LLVMValueRef packed
;
2486 packed
= packi(&ctx
->ac
, pack_args
,
2487 is_int8
? 8 : is_int10
? 10 : 16,
2489 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2491 args
->compr
= 1; /* COMPR flag */
2495 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2498 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2500 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2501 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2502 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2503 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2504 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2505 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2506 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2507 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2509 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2512 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2513 SI_PARAM_ALPHA_REF
);
2514 LLVMValueRef alpha_pass
=
2515 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2516 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2518 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2522 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2524 unsigned samplemask_param
)
2526 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2527 LLVMValueRef coverage
;
2529 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2530 coverage
= LLVMGetParam(ctx
->main_fn
,
2532 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2534 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2536 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2538 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2541 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2542 LLVMConstReal(ctx
->f32
,
2543 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2545 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2548 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2549 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2553 unsigned const_chan
;
2554 LLVMValueRef base_elt
;
2555 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
2556 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2557 SI_VS_CONST_CLIP_PLANES
, 0);
2558 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2560 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2561 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2566 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2568 /* Compute dot products of position and user clip plane vectors */
2569 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2570 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2572 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2573 const_chan
) * 4, 0);
2574 base_elt
= buffer_load_const(ctx
, const_resource
,
2576 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2577 out_elts
[const_chan
], args
->out
[chan
]);
2581 args
->enabled_channels
= 0xf;
2582 args
->valid_mask
= 0;
2584 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2589 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2593 if (so
->num_outputs
)
2594 fprintf(stderr
, "STREAMOUT\n");
2596 for (i
= 0; i
< so
->num_outputs
; i
++) {
2597 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2598 so
->output
[i
].start_component
;
2599 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2600 i
, so
->output
[i
].output_buffer
,
2601 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2602 so
->output
[i
].register_index
,
2603 mask
& 1 ? "x" : "",
2604 mask
& 2 ? "y" : "",
2605 mask
& 4 ? "z" : "",
2606 mask
& 8 ? "w" : "");
2610 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2611 LLVMValueRef
const *so_buffers
,
2612 LLVMValueRef
const *so_write_offsets
,
2613 struct pipe_stream_output
*stream_out
,
2614 struct si_shader_output_values
*shader_out
)
2616 unsigned buf_idx
= stream_out
->output_buffer
;
2617 unsigned start
= stream_out
->start_component
;
2618 unsigned num_comps
= stream_out
->num_components
;
2619 LLVMValueRef out
[4];
2621 assert(num_comps
&& num_comps
<= 4);
2622 if (!num_comps
|| num_comps
> 4)
2625 /* Load the output as int. */
2626 for (int j
= 0; j
< num_comps
; j
++) {
2627 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2629 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2632 /* Pack the output. */
2633 LLVMValueRef vdata
= NULL
;
2635 switch (num_comps
) {
2636 case 1: /* as i32 */
2639 case 2: /* as v2i32 */
2640 case 3: /* as v3i32 */
2641 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2642 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2645 /* as v4i32 (aligned to 4) */
2646 out
[3] = LLVMGetUndef(ctx
->i32
);
2648 case 4: /* as v4i32 */
2649 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2653 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2655 so_write_offsets
[buf_idx
],
2657 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
);
2661 * Write streamout data to buffers for vertex stream @p stream (different
2662 * vertex streams can occur for GS copy shaders).
2664 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2665 struct si_shader_output_values
*outputs
,
2666 unsigned noutput
, unsigned stream
)
2668 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2669 struct pipe_stream_output_info
*so
= &sel
->so
;
2670 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2673 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2674 LLVMValueRef so_vtx_count
=
2675 si_unpack_param(ctx
, ctx
->streamout_config
, 16, 7);
2677 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2679 /* can_emit = tid < so_vtx_count; */
2680 LLVMValueRef can_emit
=
2681 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2683 /* Emit the streamout code conditionally. This actually avoids
2684 * out-of-bounds buffer access. The hw tells us via the SGPR
2685 * (so_vtx_count) which threads are allowed to emit streamout data. */
2686 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2688 /* The buffer offset is computed as follows:
2689 * ByteOffset = streamout_offset[buffer_id]*4 +
2690 * (streamout_write_index + thread_id)*stride[buffer_id] +
2694 LLVMValueRef so_write_index
=
2695 ac_get_arg(&ctx
->ac
,
2696 ctx
->streamout_write_index
);
2698 /* Compute (streamout_write_index + thread_id). */
2699 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2701 /* Load the descriptor and compute the write offset for each
2702 * enabled buffer. */
2703 LLVMValueRef so_write_offset
[4] = {};
2704 LLVMValueRef so_buffers
[4];
2705 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
,
2708 for (i
= 0; i
< 4; i
++) {
2712 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2713 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2715 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2717 LLVMValueRef so_offset
= ac_get_arg(&ctx
->ac
,
2718 ctx
->streamout_offset
[i
]);
2719 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2721 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2722 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2726 /* Write streamout data. */
2727 for (i
= 0; i
< so
->num_outputs
; i
++) {
2728 unsigned reg
= so
->output
[i
].register_index
;
2733 if (stream
!= so
->output
[i
].stream
)
2736 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2737 &so
->output
[i
], &outputs
[reg
]);
2740 ac_build_endif(&ctx
->ac
, 6501);
2743 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2744 LLVMValueRef
*values
)
2746 struct ac_export_args args
;
2748 si_llvm_init_export_args(ctx
, values
,
2749 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2750 ac_build_export(&ctx
->ac
, &args
);
2753 static void si_build_param_exports(struct si_shader_context
*ctx
,
2754 struct si_shader_output_values
*outputs
,
2757 struct si_shader
*shader
= ctx
->shader
;
2758 unsigned param_count
= 0;
2760 for (unsigned i
= 0; i
< noutput
; i
++) {
2761 unsigned semantic_name
= outputs
[i
].semantic_name
;
2762 unsigned semantic_index
= outputs
[i
].semantic_index
;
2764 if (outputs
[i
].vertex_stream
[0] != 0 &&
2765 outputs
[i
].vertex_stream
[1] != 0 &&
2766 outputs
[i
].vertex_stream
[2] != 0 &&
2767 outputs
[i
].vertex_stream
[3] != 0)
2770 switch (semantic_name
) {
2771 case TGSI_SEMANTIC_LAYER
:
2772 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2773 case TGSI_SEMANTIC_CLIPDIST
:
2774 case TGSI_SEMANTIC_COLOR
:
2775 case TGSI_SEMANTIC_BCOLOR
:
2776 case TGSI_SEMANTIC_PRIMID
:
2777 case TGSI_SEMANTIC_FOG
:
2778 case TGSI_SEMANTIC_TEXCOORD
:
2779 case TGSI_SEMANTIC_GENERIC
:
2785 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2786 semantic_index
< SI_MAX_IO_GENERIC
) &&
2787 shader
->key
.opt
.kill_outputs
&
2788 (1ull << si_shader_io_get_unique_index(semantic_name
,
2789 semantic_index
, true)))
2792 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2794 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2795 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2798 shader
->info
.nr_param_exports
= param_count
;
2802 * Vertex color clamping.
2804 * This uses a state constant loaded in a user data SGPR and
2805 * an IF statement is added that clamps all colors if the constant
2808 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2809 struct si_shader_output_values
*outputs
,
2812 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2813 bool has_colors
= false;
2815 /* Store original colors to alloca variables. */
2816 for (unsigned i
= 0; i
< noutput
; i
++) {
2817 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2818 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2821 for (unsigned j
= 0; j
< 4; j
++) {
2822 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2823 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2831 /* The state is in the first bit of the user SGPR. */
2832 LLVMValueRef cond
= ac_get_arg(&ctx
->ac
, ctx
->vs_state_bits
);
2833 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2835 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2837 /* Store clamped colors to alloca variables within the conditional block. */
2838 for (unsigned i
= 0; i
< noutput
; i
++) {
2839 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2840 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2843 for (unsigned j
= 0; j
< 4; j
++) {
2844 LLVMBuildStore(ctx
->ac
.builder
,
2845 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2849 ac_build_endif(&ctx
->ac
, 6502);
2851 /* Load clamped colors */
2852 for (unsigned i
= 0; i
< noutput
; i
++) {
2853 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2854 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2857 for (unsigned j
= 0; j
< 4; j
++) {
2858 outputs
[i
].values
[j
] =
2859 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2864 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2865 * (position and parameter data only).
2867 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2868 struct si_shader_output_values
*outputs
,
2871 struct si_shader
*shader
= ctx
->shader
;
2872 struct ac_export_args pos_args
[4] = {};
2873 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2877 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2879 /* Build position exports. */
2880 for (i
= 0; i
< noutput
; i
++) {
2881 switch (outputs
[i
].semantic_name
) {
2882 case TGSI_SEMANTIC_POSITION
:
2883 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2884 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2886 case TGSI_SEMANTIC_PSIZE
:
2887 psize_value
= outputs
[i
].values
[0];
2889 case TGSI_SEMANTIC_LAYER
:
2890 layer_value
= outputs
[i
].values
[0];
2892 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2893 viewport_index_value
= outputs
[i
].values
[0];
2895 case TGSI_SEMANTIC_EDGEFLAG
:
2896 edgeflag_value
= outputs
[i
].values
[0];
2898 case TGSI_SEMANTIC_CLIPDIST
:
2899 if (!shader
->key
.opt
.clip_disable
) {
2900 unsigned index
= 2 + outputs
[i
].semantic_index
;
2901 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2902 V_008DFC_SQ_EXP_POS
+ index
,
2906 case TGSI_SEMANTIC_CLIPVERTEX
:
2907 if (!shader
->key
.opt
.clip_disable
) {
2908 si_llvm_emit_clipvertex(ctx
, pos_args
,
2915 /* We need to add the position output manually if it's missing. */
2916 if (!pos_args
[0].out
[0]) {
2917 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2918 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2919 pos_args
[0].done
= 0; /* last export? */
2920 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2921 pos_args
[0].compr
= 0; /* COMPR flag */
2922 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2923 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2924 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2925 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2928 bool pos_writes_edgeflag
= shader
->selector
->info
.writes_edgeflag
&&
2929 !shader
->key
.as_ngg
;
2931 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2932 if (shader
->selector
->info
.writes_psize
||
2933 pos_writes_edgeflag
||
2934 shader
->selector
->info
.writes_viewport_index
||
2935 shader
->selector
->info
.writes_layer
) {
2936 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2937 (pos_writes_edgeflag
<< 1) |
2938 (shader
->selector
->info
.writes_layer
<< 2);
2940 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2941 pos_args
[1].done
= 0; /* last export? */
2942 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2943 pos_args
[1].compr
= 0; /* COMPR flag */
2944 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2945 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2946 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2947 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2949 if (shader
->selector
->info
.writes_psize
)
2950 pos_args
[1].out
[0] = psize_value
;
2952 if (pos_writes_edgeflag
) {
2953 /* The output is a float, but the hw expects an integer
2954 * with the first bit containing the edge flag. */
2955 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2958 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2962 /* The LLVM intrinsic expects a float. */
2963 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2966 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2967 /* GFX9 has the layer in out.z[10:0] and the viewport
2968 * index in out.z[19:16].
2970 if (shader
->selector
->info
.writes_layer
)
2971 pos_args
[1].out
[2] = layer_value
;
2973 if (shader
->selector
->info
.writes_viewport_index
) {
2974 LLVMValueRef v
= viewport_index_value
;
2976 v
= ac_to_integer(&ctx
->ac
, v
);
2977 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2978 LLVMConstInt(ctx
->i32
, 16, 0), "");
2979 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2980 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2981 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2982 pos_args
[1].enabled_channels
|= 1 << 2;
2985 if (shader
->selector
->info
.writes_layer
)
2986 pos_args
[1].out
[2] = layer_value
;
2988 if (shader
->selector
->info
.writes_viewport_index
) {
2989 pos_args
[1].out
[3] = viewport_index_value
;
2990 pos_args
[1].enabled_channels
|= 1 << 3;
2995 for (i
= 0; i
< 4; i
++)
2996 if (pos_args
[i
].out
[0])
2997 shader
->info
.nr_pos_exports
++;
2999 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3000 * Setting valid_mask=1 prevents it and has no other effect.
3002 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3003 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3004 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3005 pos_args
[0].valid_mask
= 1;
3008 for (i
= 0; i
< 4; i
++) {
3009 if (!pos_args
[i
].out
[0])
3012 /* Specify the target we are exporting */
3013 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3015 if (pos_idx
== shader
->info
.nr_pos_exports
)
3016 /* Specify that this is the last export */
3017 pos_args
[i
].done
= 1;
3019 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3022 /* Build parameter exports. */
3023 si_build_param_exports(ctx
, outputs
, noutput
);
3027 * Forward all outputs from the vertex shader to the TES. This is only used
3028 * for the fixed function TCS.
3030 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3032 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3033 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3034 LLVMValueRef lds_vertex_stride
, lds_base
;
3037 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3038 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3039 buffer_offset
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3041 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3042 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3043 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3046 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3048 unsigned i
= u_bit_scan64(&inputs
);
3050 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3051 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3054 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3055 get_rel_patch_id(ctx
),
3057 LLVMConstInt(ctx
->i32
, i
, 0));
3059 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3061 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3062 buffer_offset
, 0, ac_glc
);
3066 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3067 LLVMValueRef rel_patch_id
,
3068 LLVMValueRef invocation_id
,
3069 LLVMValueRef tcs_out_current_patch_data_offset
,
3070 LLVMValueRef invoc0_tf_outer
[4],
3071 LLVMValueRef invoc0_tf_inner
[2])
3073 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3074 struct si_shader
*shader
= ctx
->shader
;
3075 unsigned tess_inner_index
, tess_outer_index
;
3076 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3077 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3078 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3080 /* Add a barrier before loading tess factors from LDS. */
3081 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3082 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3084 /* Do this only for invocation 0, because the tess levels are per-patch,
3087 * This can't jump, because invocation 0 executes this. It should
3088 * at least mask out the loads and stores for other invocations.
3090 ac_build_ifcc(&ctx
->ac
,
3091 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3092 invocation_id
, ctx
->i32_0
, ""), 6503);
3094 /* Determine the layout of one tess factor element in the buffer. */
3095 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3096 case PIPE_PRIM_LINES
:
3097 stride
= 2; /* 2 dwords, 1 vec2 store */
3101 case PIPE_PRIM_TRIANGLES
:
3102 stride
= 4; /* 4 dwords, 1 vec4 store */
3106 case PIPE_PRIM_QUADS
:
3107 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3116 for (i
= 0; i
< 4; i
++) {
3117 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3118 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3121 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3122 /* Tess factors are in VGPRs. */
3123 for (i
= 0; i
< outer_comps
; i
++)
3124 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3125 for (i
= 0; i
< inner_comps
; i
++)
3126 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3128 /* Load tess_inner and tess_outer from LDS.
3129 * Any invocation can write them, so we can't get them from a temporary.
3131 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3132 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3134 lds_base
= tcs_out_current_patch_data_offset
;
3135 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3136 LLVMConstInt(ctx
->i32
,
3137 tess_inner_index
* 4, 0), "");
3138 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3139 LLVMConstInt(ctx
->i32
,
3140 tess_outer_index
* 4, 0), "");
3142 for (i
= 0; i
< outer_comps
; i
++) {
3144 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3146 for (i
= 0; i
< inner_comps
; i
++) {
3147 inner
[i
] = out
[outer_comps
+i
] =
3148 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3152 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3153 /* For isolines, the hardware expects tess factors in the
3154 * reverse order from what GLSL / TGSI specify.
3156 LLVMValueRef tmp
= out
[0];
3161 /* Convert the outputs to vectors for stores. */
3162 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3166 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3168 /* Get the buffer. */
3169 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3171 /* Get the offset. */
3172 tf_base
= ac_get_arg(&ctx
->ac
,
3173 ctx
->tcs_factor_offset
);
3174 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3175 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3177 ac_build_ifcc(&ctx
->ac
,
3178 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3179 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3181 /* Store the dynamic HS control word. */
3183 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3184 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3185 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3186 1, ctx
->i32_0
, tf_base
,
3191 ac_build_endif(&ctx
->ac
, 6504);
3193 /* Store the tessellation factors. */
3194 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3195 MIN2(stride
, 4), byteoffset
, tf_base
,
3199 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3200 stride
- 4, byteoffset
, tf_base
,
3203 /* Store the tess factors into the offchip buffer if TES reads them. */
3204 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3205 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3206 LLVMValueRef tf_inner_offset
;
3207 unsigned param_outer
, param_inner
;
3209 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3210 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3212 param_outer
= si_shader_io_get_unique_index_patch(
3213 TGSI_SEMANTIC_TESSOUTER
, 0);
3214 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3215 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3217 unsigned outer_vec_size
=
3218 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3219 outer_comps
: util_next_power_of_two(outer_comps
);
3220 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3222 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3223 outer_comps
, tf_outer_offset
,
3226 param_inner
= si_shader_io_get_unique_index_patch(
3227 TGSI_SEMANTIC_TESSINNER
, 0);
3228 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3229 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3231 inner_vec
= inner_comps
== 1 ? inner
[0] :
3232 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3233 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3234 inner_comps
, tf_inner_offset
,
3239 ac_build_endif(&ctx
->ac
, 6503);
3243 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3244 struct ac_arg param
, unsigned return_index
)
3246 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3247 ac_get_arg(&ctx
->ac
, param
),
3252 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3253 struct ac_arg param
, unsigned return_index
)
3255 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3256 LLVMValueRef p
= ac_get_arg(&ctx
->ac
, param
);
3258 return LLVMBuildInsertValue(builder
, ret
,
3259 ac_to_float(&ctx
->ac
, p
),
3264 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3265 struct ac_arg param
, unsigned return_index
)
3267 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3268 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, param
);
3269 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3270 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3273 /* This only writes the tessellation factor levels. */
3274 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3275 unsigned max_outputs
,
3276 LLVMValueRef
*addrs
)
3278 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3279 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3280 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3281 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3283 si_copy_tcs_inputs(bld_base
);
3285 rel_patch_id
= get_rel_patch_id(ctx
);
3286 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3287 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3289 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3290 LLVMBasicBlockRef blocks
[2] = {
3291 LLVMGetInsertBlock(builder
),
3292 ctx
->merged_wrap_if_entry_block
3294 LLVMValueRef values
[2];
3296 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3298 values
[0] = rel_patch_id
;
3299 values
[1] = LLVMGetUndef(ctx
->i32
);
3300 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3302 values
[0] = tf_lds_offset
;
3303 values
[1] = LLVMGetUndef(ctx
->i32
);
3304 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3306 values
[0] = invocation_id
;
3307 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3308 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3311 /* Return epilog parameters from this function. */
3312 LLVMValueRef ret
= ctx
->return_value
;
3315 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3316 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3317 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3318 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3319 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3320 /* Tess offchip and tess factor offsets are at the beginning. */
3321 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3322 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3323 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3325 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3326 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3327 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3328 GFX6_SGPR_TCS_OUT_LAYOUT
);
3329 /* Tess offchip and tess factor offsets are after user SGPRs. */
3330 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
,
3331 GFX6_TCS_NUM_USER_SGPR
);
3332 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
,
3333 GFX6_TCS_NUM_USER_SGPR
+ 1);
3334 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3338 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3339 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3340 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3342 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3343 * the invocation_id output does not alias the tcs_rel_ids input,
3344 * which saves a V_MOV on gfx9.
3348 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3349 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3351 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3352 vgpr
++; /* skip the tess factor LDS offset */
3353 for (unsigned i
= 0; i
< 6; i
++) {
3354 LLVMValueRef value
=
3355 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3356 value
= ac_to_float(&ctx
->ac
, value
);
3357 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3360 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3362 ctx
->return_value
= ret
;
3365 /* Pass TCS inputs from LS to TCS on GFX9. */
3366 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3368 LLVMValueRef ret
= ctx
->return_value
;
3370 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3371 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3372 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3373 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3374 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3375 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3377 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3378 8 + SI_SGPR_RW_BUFFERS
);
3379 ret
= si_insert_input_ptr(ctx
, ret
,
3380 ctx
->bindless_samplers_and_images
,
3381 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3383 ret
= si_insert_input_ret(ctx
, ret
, ctx
->vs_state_bits
,
3384 8 + SI_SGPR_VS_STATE_BITS
);
3386 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3387 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3388 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_offsets
,
3389 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3390 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3391 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3393 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3394 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3395 ac_to_float(&ctx
->ac
,
3396 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
)),
3398 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3399 ac_to_float(&ctx
->ac
,
3400 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_rel_ids
)),
3402 ctx
->return_value
= ret
;
3405 /* Pass GS inputs from ES to GS on GFX9. */
3406 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3408 LLVMValueRef ret
= ctx
->return_value
;
3410 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3411 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3412 if (ctx
->shader
->key
.as_ngg
)
3413 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->gs_tg_info
, 2);
3415 ret
= si_insert_input_ret(ctx
, ret
, ctx
->gs2vs_offset
, 2);
3416 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3417 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3419 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3420 8 + SI_SGPR_RW_BUFFERS
);
3421 ret
= si_insert_input_ptr(ctx
, ret
,
3422 ctx
->bindless_samplers_and_images
,
3423 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3424 if (ctx
->screen
->use_ngg
) {
3425 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->vs_state_bits
,
3426 8 + SI_SGPR_VS_STATE_BITS
);
3430 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3431 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3433 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3435 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx01_offset
, vgpr
++);
3436 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx23_offset
, vgpr
++);
3437 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_prim_id
, vgpr
++);
3438 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_invocation_id
, vgpr
++);
3439 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx45_offset
, vgpr
++);
3440 ctx
->return_value
= ret
;
3443 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3444 unsigned max_outputs
,
3445 LLVMValueRef
*addrs
)
3447 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3448 struct si_shader
*shader
= ctx
->shader
;
3449 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3451 LLVMValueRef vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->rel_auto_id
);
3452 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3453 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3454 vertex_dw_stride
, "");
3456 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3457 * its inputs from it. */
3458 for (i
= 0; i
< info
->num_outputs
; i
++) {
3459 unsigned name
= info
->output_semantic_name
[i
];
3460 unsigned index
= info
->output_semantic_index
[i
];
3462 /* The ARB_shader_viewport_layer_array spec contains the
3465 * 2) What happens if gl_ViewportIndex or gl_Layer is
3466 * written in the vertex shader and a geometry shader is
3469 * RESOLVED: The value written by the last vertex processing
3470 * stage is used. If the last vertex processing stage
3471 * (vertex, tessellation evaluation or geometry) does not
3472 * statically assign to gl_ViewportIndex or gl_Layer, index
3473 * or layer zero is assumed.
3475 * So writes to those outputs in VS-as-LS are simply ignored.
3477 if (name
== TGSI_SEMANTIC_LAYER
||
3478 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3481 int param
= si_shader_io_get_unique_index(name
, index
, false);
3482 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3483 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3485 for (chan
= 0; chan
< 4; chan
++) {
3486 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3489 lshs_lds_store(ctx
, chan
, dw_addr
,
3490 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3494 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3495 si_set_ls_return_value_for_tcs(ctx
);
3498 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3499 unsigned max_outputs
,
3500 LLVMValueRef
*addrs
)
3502 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3503 struct si_shader
*es
= ctx
->shader
;
3504 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3505 LLVMValueRef lds_base
= NULL
;
3509 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3510 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3511 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3512 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 24, 4);
3513 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3514 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3515 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3516 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3517 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3520 for (i
= 0; i
< info
->num_outputs
; i
++) {
3523 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3524 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3527 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3528 info
->output_semantic_index
[i
], false);
3530 for (chan
= 0; chan
< 4; chan
++) {
3531 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3534 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3535 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3537 /* GFX9 has the ESGS ring in LDS. */
3538 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3539 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3540 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3541 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3545 ac_build_buffer_store_dword(&ctx
->ac
,
3548 ac_get_arg(&ctx
->ac
, ctx
->es2gs_offset
),
3549 (4 * param
+ chan
) * 4,
3550 ac_glc
| ac_slc
| ac_swizzled
);
3554 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3555 si_set_es_return_value_for_gs(ctx
);
3558 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3560 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3561 return si_unpack_param(ctx
, ctx
->merged_wave_info
, 16, 8);
3563 return ac_get_arg(&ctx
->ac
, ctx
->gs_wave_id
);
3566 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3568 if (ctx
->shader
->key
.as_ngg
) {
3569 gfx10_ngg_gs_emit_epilogue(ctx
);
3573 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3574 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3576 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3577 si_get_gs_wave_id(ctx
));
3579 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3580 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3583 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3584 unsigned max_outputs
,
3585 LLVMValueRef
*addrs
)
3587 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3588 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3590 assert(info
->num_outputs
<= max_outputs
);
3592 emit_gs_epilogue(ctx
);
3595 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3597 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3598 emit_gs_epilogue(ctx
);
3601 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3602 unsigned max_outputs
,
3603 LLVMValueRef
*addrs
)
3605 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3606 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3607 struct si_shader_output_values
*outputs
= NULL
;
3610 assert(!ctx
->shader
->is_gs_copy_shader
);
3611 assert(info
->num_outputs
<= max_outputs
);
3613 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3615 for (i
= 0; i
< info
->num_outputs
; i
++) {
3616 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3617 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3619 for (j
= 0; j
< 4; j
++) {
3620 outputs
[i
].values
[j
] =
3621 LLVMBuildLoad(ctx
->ac
.builder
,
3624 outputs
[i
].vertex_stream
[j
] =
3625 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3629 if (!ctx
->screen
->use_ngg_streamout
&&
3630 ctx
->shader
->selector
->so
.num_outputs
)
3631 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3633 /* Export PrimitiveID. */
3634 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3635 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3636 outputs
[i
].semantic_index
= 0;
3637 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3638 for (j
= 1; j
< 4; j
++)
3639 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3641 memset(outputs
[i
].vertex_stream
, 0,
3642 sizeof(outputs
[i
].vertex_stream
));
3646 si_llvm_export_vs(ctx
, outputs
, i
);
3650 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3651 unsigned max_outputs
,
3652 LLVMValueRef
*addrs
)
3654 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3655 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3656 LLVMValueRef pos
[4] = {};
3658 assert(info
->num_outputs
<= max_outputs
);
3660 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3661 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3664 for (unsigned chan
= 0; chan
< 4; chan
++)
3665 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3668 assert(pos
[0] != NULL
);
3670 /* Return the position output. */
3671 LLVMValueRef ret
= ctx
->return_value
;
3672 for (unsigned chan
= 0; chan
< 4; chan
++)
3673 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3674 ctx
->return_value
= ret
;
3677 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3679 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3681 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3682 &ctx
->outputs
[0][0]);
3685 struct si_ps_exports
{
3687 struct ac_export_args args
[10];
3690 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3691 LLVMValueRef depth
, LLVMValueRef stencil
,
3692 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3694 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3695 struct ac_export_args args
;
3697 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3699 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3702 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3703 LLVMValueRef
*color
, unsigned index
,
3704 unsigned samplemask_param
,
3705 bool is_last
, struct si_ps_exports
*exp
)
3707 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3711 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3712 for (i
= 0; i
< 4; i
++)
3713 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3716 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3717 color
[3] = ctx
->ac
.f32_1
;
3721 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3722 si_alpha_test(bld_base
, color
[3]);
3724 /* Line & polygon smoothing */
3725 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3726 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3729 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3730 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3731 struct ac_export_args args
[8];
3734 /* Get the export arguments, also find out what the last one is. */
3735 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3736 si_llvm_init_export_args(ctx
, color
,
3737 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3738 if (args
[c
].enabled_channels
)
3742 /* Emit all exports. */
3743 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3744 if (is_last
&& last
== c
) {
3745 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3746 args
[c
].done
= 1; /* DONE bit */
3747 } else if (!args
[c
].enabled_channels
)
3748 continue; /* unnecessary NULL export */
3750 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3753 struct ac_export_args args
;
3756 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3759 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3760 args
.done
= 1; /* DONE bit */
3761 } else if (!args
.enabled_channels
)
3762 return; /* unnecessary NULL export */
3764 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3768 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3769 struct si_ps_exports
*exp
)
3771 for (unsigned i
= 0; i
< exp
->num
; i
++)
3772 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3776 * Return PS outputs in this order:
3778 * v[0:3] = color0.xyzw
3779 * v[4:7] = color1.xyzw
3784 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3786 * The alpha-ref SGPR is returned via its original location.
3788 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3789 unsigned max_outputs
,
3790 LLVMValueRef
*addrs
)
3792 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3793 struct si_shader
*shader
= ctx
->shader
;
3794 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3795 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3796 unsigned i
, j
, first_vgpr
, vgpr
;
3798 LLVMValueRef color
[8][4] = {};
3799 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3802 if (ctx
->postponed_kill
)
3803 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3805 /* Read the output values. */
3806 for (i
= 0; i
< info
->num_outputs
; i
++) {
3807 unsigned semantic_name
= info
->output_semantic_name
[i
];
3808 unsigned semantic_index
= info
->output_semantic_index
[i
];
3810 switch (semantic_name
) {
3811 case TGSI_SEMANTIC_COLOR
:
3812 assert(semantic_index
< 8);
3813 for (j
= 0; j
< 4; j
++) {
3814 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3815 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3816 color
[semantic_index
][j
] = result
;
3819 case TGSI_SEMANTIC_POSITION
:
3820 depth
= LLVMBuildLoad(builder
,
3821 addrs
[4 * i
+ 2], "");
3823 case TGSI_SEMANTIC_STENCIL
:
3824 stencil
= LLVMBuildLoad(builder
,
3825 addrs
[4 * i
+ 1], "");
3827 case TGSI_SEMANTIC_SAMPLEMASK
:
3828 samplemask
= LLVMBuildLoad(builder
,
3829 addrs
[4 * i
+ 0], "");
3832 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3837 /* Fill the return structure. */
3838 ret
= ctx
->return_value
;
3841 ret
= LLVMBuildInsertValue(builder
, ret
,
3842 ac_to_integer(&ctx
->ac
,
3843 LLVMGetParam(ctx
->main_fn
,
3844 SI_PARAM_ALPHA_REF
)),
3845 SI_SGPR_ALPHA_REF
, "");
3848 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3849 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3853 for (j
= 0; j
< 4; j
++)
3854 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3857 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3859 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3861 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3863 /* Add the input sample mask for smoothing at the end. */
3864 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3865 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3866 ret
= LLVMBuildInsertValue(builder
, ret
,
3867 LLVMGetParam(ctx
->main_fn
,
3868 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3870 ctx
->return_value
= ret
;
3873 static void membar_emit(
3874 const struct lp_build_tgsi_action
*action
,
3875 struct lp_build_tgsi_context
*bld_base
,
3876 struct lp_build_emit_data
*emit_data
)
3878 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3879 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3880 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3881 unsigned wait_flags
= 0;
3883 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3884 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3886 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3887 TGSI_MEMBAR_SHADER_BUFFER
|
3888 TGSI_MEMBAR_SHADER_IMAGE
))
3889 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3891 if (flags
& TGSI_MEMBAR_SHARED
)
3892 wait_flags
|= AC_WAIT_LGKM
;
3894 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3897 static void clock_emit(
3898 const struct lp_build_tgsi_action
*action
,
3899 struct lp_build_tgsi_context
*bld_base
,
3900 struct lp_build_emit_data
*emit_data
)
3902 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3903 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3905 emit_data
->output
[0] =
3906 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3907 emit_data
->output
[1] =
3908 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3911 static void si_llvm_emit_ddxy(
3912 const struct lp_build_tgsi_action
*action
,
3913 struct lp_build_tgsi_context
*bld_base
,
3914 struct lp_build_emit_data
*emit_data
)
3916 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3917 unsigned opcode
= emit_data
->info
->opcode
;
3922 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3923 mask
= AC_TID_MASK_LEFT
;
3924 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3925 mask
= AC_TID_MASK_TOP
;
3927 mask
= AC_TID_MASK_TOP_LEFT
;
3929 /* for DDX we want to next X pixel, DDY next Y pixel. */
3930 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3932 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3933 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3934 emit_data
->output
[emit_data
->chan
] = val
;
3937 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3938 struct lp_build_tgsi_context
*bld_base
,
3939 struct lp_build_emit_data
*emit_data
)
3941 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3942 struct si_shader
*shader
= ctx
->shader
;
3943 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3944 LLVMValueRef interp_param
;
3945 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3946 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3947 int input_base
, input_array_size
;
3950 LLVMValueRef prim_mask
= ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
);
3951 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3952 int interp_param_idx
;
3956 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3957 /* offset is in second src, first two channels */
3958 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3960 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3962 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3963 LLVMValueRef sample_position
;
3964 LLVMValueRef sample_id
;
3965 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3967 /* fetch sample ID, then fetch its sample position,
3968 * and place into first two channels.
3970 sample_id
= lp_build_emit_fetch(bld_base
,
3971 emit_data
->inst
, 1, TGSI_CHAN_X
);
3972 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3974 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3975 * Language 4.50 spec says about interpolateAtSample:
3977 * "Returns the value of the input interpolant variable at
3978 * the location of sample number sample. If multisample
3979 * buffers are not available, the input variable will be
3980 * evaluated at the center of the pixel. If sample sample
3981 * does not exist, the position used to interpolate the
3982 * input variable is undefined."
3984 * This means that sample_id values outside of the valid are
3985 * in fact valid input, and the usual mechanism for loading the
3986 * sample position doesn't work.
3988 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3989 LLVMValueRef center
[4] = {
3990 LLVMConstReal(ctx
->f32
, 0.5),
3991 LLVMConstReal(ctx
->f32
, 0.5),
3996 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
3998 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4001 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4004 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4005 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4007 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4010 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4012 if (input
->Register
.Indirect
) {
4013 unsigned array_id
= input
->Indirect
.ArrayID
;
4016 input_base
= info
->input_array_first
[array_id
];
4017 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4019 input_base
= inst
->Src
[0].Register
.Index
;
4020 input_array_size
= info
->num_inputs
- input_base
;
4023 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4024 1, input
->Register
.Index
- input_base
);
4026 input_base
= inst
->Src
[0].Register
.Index
;
4027 input_array_size
= 1;
4028 array_idx
= ctx
->i32_0
;
4031 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4033 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4034 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4035 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4037 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4039 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4040 if (interp_param_idx
== -1)
4042 else if (interp_param_idx
)
4043 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4045 interp_param
= NULL
;
4047 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4048 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4049 LLVMValueRef ij_out
[2];
4050 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4053 * take the I then J parameters, and the DDX/Y for it, and
4054 * calculate the IJ inputs for the interpolator.
4055 * temp1 = ddx * offset/sample.x + I;
4056 * interp_param.I = ddy * offset/sample.y + temp1;
4057 * temp1 = ddx * offset/sample.x + J;
4058 * interp_param.J = ddy * offset/sample.y + temp1;
4060 for (i
= 0; i
< 2; i
++) {
4061 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4062 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4063 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4064 ddxy_out
, ix_ll
, "");
4065 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4066 ddxy_out
, iy_ll
, "");
4067 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4068 interp_param
, ix_ll
, "");
4071 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4073 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4074 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4076 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4080 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4082 for (chan
= 0; chan
< 4; chan
++) {
4083 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4084 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4086 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4087 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4090 i
= LLVMBuildExtractElement(
4091 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4092 j
= LLVMBuildExtractElement(
4093 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4095 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4098 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4099 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4102 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4103 ctx
->ac
.builder
, gather
, array_idx
, "");
4107 static void vote_all_emit(
4108 const struct lp_build_tgsi_action
*action
,
4109 struct lp_build_tgsi_context
*bld_base
,
4110 struct lp_build_emit_data
*emit_data
)
4112 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4114 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4115 emit_data
->output
[emit_data
->chan
] =
4116 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4119 static void vote_any_emit(
4120 const struct lp_build_tgsi_action
*action
,
4121 struct lp_build_tgsi_context
*bld_base
,
4122 struct lp_build_emit_data
*emit_data
)
4124 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4126 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4127 emit_data
->output
[emit_data
->chan
] =
4128 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4131 static void vote_eq_emit(
4132 const struct lp_build_tgsi_action
*action
,
4133 struct lp_build_tgsi_context
*bld_base
,
4134 struct lp_build_emit_data
*emit_data
)
4136 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4138 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4139 emit_data
->output
[emit_data
->chan
] =
4140 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4143 static void ballot_emit(
4144 const struct lp_build_tgsi_action
*action
,
4145 struct lp_build_tgsi_context
*bld_base
,
4146 struct lp_build_emit_data
*emit_data
)
4148 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4149 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4152 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4153 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4155 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4157 if (ctx
->ac
.wave_size
== 32) {
4158 emit_data
->output
[1] = ctx
->i32_0
;
4160 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4161 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4165 static void read_lane_emit(
4166 const struct lp_build_tgsi_action
*action
,
4167 struct lp_build_tgsi_context
*bld_base
,
4168 struct lp_build_emit_data
*emit_data
)
4170 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4172 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4173 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4174 0, emit_data
->src_chan
);
4176 /* Always read the source invocation (= lane) from the X channel. */
4177 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4179 emit_data
->arg_count
= 2;
4182 /* We currently have no other way to prevent LLVM from lifting the icmp
4183 * calls to a dominating basic block.
4185 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4187 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4188 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4190 emit_data
->output
[emit_data
->chan
] =
4191 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4192 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4193 AC_FUNC_ATTR_READNONE
|
4194 AC_FUNC_ATTR_CONVERGENT
);
4197 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4198 struct lp_build_emit_data
*emit_data
)
4200 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4201 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4205 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4207 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4208 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4212 /* Emit one vertex from the geometry shader */
4213 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4215 LLVMValueRef
*addrs
)
4217 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4219 if (ctx
->shader
->key
.as_ngg
) {
4220 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4224 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4225 struct si_shader
*shader
= ctx
->shader
;
4226 LLVMValueRef soffset
= ac_get_arg(&ctx
->ac
, ctx
->gs2vs_offset
);
4227 LLVMValueRef gs_next_vertex
;
4228 LLVMValueRef can_emit
;
4229 unsigned chan
, offset
;
4232 /* Write vertex attribute values to GSVS ring */
4233 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4234 ctx
->gs_next_vertex
[stream
],
4237 /* If this thread has already emitted the declared maximum number of
4238 * vertices, skip the write: excessive vertex emissions are not
4239 * supposed to have any effect.
4241 * If the shader has no writes to memory, kill it instead. This skips
4242 * further memory loads and may allow LLVM to skip to the end
4245 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4246 LLVMConstInt(ctx
->i32
,
4247 shader
->selector
->gs_max_out_vertices
, 0), "");
4249 bool use_kill
= !info
->writes_memory
;
4251 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4253 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4257 for (i
= 0; i
< info
->num_outputs
; i
++) {
4258 for (chan
= 0; chan
< 4; chan
++) {
4259 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4260 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4263 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4264 LLVMValueRef voffset
=
4265 LLVMConstInt(ctx
->i32
, offset
*
4266 shader
->selector
->gs_max_out_vertices
, 0);
4269 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4270 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4271 LLVMConstInt(ctx
->i32
, 4, 0), "");
4273 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4275 ac_build_buffer_store_dword(&ctx
->ac
,
4276 ctx
->gsvs_ring
[stream
],
4278 voffset
, soffset
, 0,
4279 ac_glc
| ac_slc
| ac_swizzled
);
4283 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4284 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4286 /* Signal vertex emission if vertex data was written. */
4288 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4289 si_get_gs_wave_id(ctx
));
4293 ac_build_endif(&ctx
->ac
, 6505);
4296 /* Emit one vertex from the geometry shader */
4297 static void si_tgsi_emit_vertex(
4298 const struct lp_build_tgsi_action
*action
,
4299 struct lp_build_tgsi_context
*bld_base
,
4300 struct lp_build_emit_data
*emit_data
)
4302 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4303 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4305 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4308 /* Cut one primitive from the geometry shader */
4309 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4312 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4314 if (ctx
->shader
->key
.as_ngg
) {
4315 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4319 /* Signal primitive cut */
4320 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4321 si_get_gs_wave_id(ctx
));
4324 /* Cut one primitive from the geometry shader */
4325 static void si_tgsi_emit_primitive(
4326 const struct lp_build_tgsi_action
*action
,
4327 struct lp_build_tgsi_context
*bld_base
,
4328 struct lp_build_emit_data
*emit_data
)
4330 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4332 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4335 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4336 struct lp_build_tgsi_context
*bld_base
,
4337 struct lp_build_emit_data
*emit_data
)
4339 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4341 /* GFX6 only (thanks to a hw bug workaround):
4342 * The real barrier instruction isn’t needed, because an entire patch
4343 * always fits into a single wave.
4345 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4346 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4347 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4351 ac_build_s_barrier(&ctx
->ac
);
4354 void si_create_function(struct si_shader_context
*ctx
,
4356 LLVMTypeRef
*returns
, unsigned num_returns
,
4357 unsigned max_workgroup_size
)
4359 si_llvm_create_func(ctx
, name
, returns
, num_returns
);
4360 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4362 if (ctx
->screen
->info
.address32_hi
) {
4363 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4364 "amdgpu-32bit-address-high-bits",
4365 ctx
->screen
->info
.address32_hi
);
4368 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4369 "no-signed-zeros-fp-math",
4372 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4375 static void declare_streamout_params(struct si_shader_context
*ctx
,
4376 struct pipe_stream_output_info
*so
)
4378 if (ctx
->screen
->use_ngg_streamout
) {
4379 if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
4380 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4384 /* Streamout SGPRs. */
4385 if (so
->num_outputs
) {
4386 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_config
);
4387 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_write_index
);
4388 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4389 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4392 /* A streamout buffer offset is loaded if the stride is non-zero. */
4393 for (int i
= 0; i
< 4; i
++) {
4397 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_offset
[i
]);
4401 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4403 switch (shader
->selector
->type
) {
4404 case PIPE_SHADER_VERTEX
:
4405 case PIPE_SHADER_TESS_EVAL
:
4406 return shader
->key
.as_ngg
? 128 : 0;
4408 case PIPE_SHADER_TESS_CTRL
:
4409 /* Return this so that LLVM doesn't remove s_barrier
4410 * instructions on chips where we use s_barrier. */
4411 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4413 case PIPE_SHADER_GEOMETRY
:
4414 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4416 case PIPE_SHADER_COMPUTE
:
4417 break; /* see below */
4423 const unsigned *properties
= shader
->selector
->info
.properties
;
4424 unsigned max_work_group_size
=
4425 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4426 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4427 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4429 if (!max_work_group_size
) {
4430 /* This is a variable group size compute shader,
4431 * compile it for the maximum possible group size.
4433 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4435 return max_work_group_size
;
4438 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4441 enum ac_arg_type const_shader_buf_type
;
4443 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4444 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4445 const_shader_buf_type
= AC_ARG_CONST_FLOAT_PTR
;
4447 const_shader_buf_type
= AC_ARG_CONST_DESC_PTR
;
4449 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, const_shader_buf_type
,
4450 assign_params
? &ctx
->const_and_shader_buffers
:
4451 &ctx
->other_const_and_shader_buffers
);
4454 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4457 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4458 assign_params
? &ctx
->samplers_and_images
:
4459 &ctx
->other_samplers_and_images
);
4462 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4465 declare_const_and_shader_buffers(ctx
, assign_params
);
4466 declare_samplers_and_images(ctx
, assign_params
);
4469 static void declare_global_desc_pointers(struct si_shader_context
*ctx
)
4471 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4473 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4474 &ctx
->bindless_samplers_and_images
);
4477 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
)
4479 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4480 if (!ctx
->shader
->is_gs_copy_shader
) {
4481 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.base_vertex
);
4482 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.start_instance
);
4483 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.draw_id
);
4487 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4488 unsigned *num_prolog_vgprs
)
4490 struct si_shader
*shader
= ctx
->shader
;
4492 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.vertex_id
);
4493 if (shader
->key
.as_ls
) {
4494 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->rel_auto_id
);
4495 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4496 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4497 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4499 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4500 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4502 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4503 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4504 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4505 &ctx
->vs_prim_id
); /* user vgpr or PrimID (legacy) */
4506 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4508 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4509 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vs_prim_id
);
4510 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4513 if (!shader
->is_gs_copy_shader
) {
4514 /* Vertex load indices. */
4515 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vertex_index0
);
4516 for (unsigned i
= 1; i
< shader
->selector
->info
.num_inputs
; i
++)
4517 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
4518 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4522 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4523 unsigned vs_blit_property
)
4525 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4526 &ctx
->vs_blit_inputs
); /* i16 x1, y1 */
4527 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* i16 x1, y1 */
4528 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* depth */
4530 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4531 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color0 */
4532 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color1 */
4533 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color2 */
4534 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color3 */
4535 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4536 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x1 */
4537 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y1 */
4538 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x2 */
4539 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y2 */
4540 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.z */
4541 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.w */
4545 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
)
4547 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_u
);
4548 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_v
);
4549 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->tes_rel_patch_id
);
4550 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tes_patch_id
);
4554 /* Convenient merged shader definitions. */
4555 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4556 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4559 static void add_arg_checked(struct ac_shader_args
*args
,
4560 enum ac_arg_regfile file
,
4561 unsigned registers
, enum ac_arg_type type
,
4565 assert(args
->arg_count
== idx
);
4566 ac_add_arg(args
, file
, registers
, type
, arg
);
4569 static void create_function(struct si_shader_context
*ctx
)
4571 struct si_shader
*shader
= ctx
->shader
;
4572 LLVMTypeRef returns
[16+32*4];
4573 unsigned i
, num_return_sgprs
;
4574 unsigned num_returns
= 0;
4575 unsigned num_prolog_vgprs
= 0;
4576 unsigned type
= ctx
->type
;
4577 unsigned vs_blit_property
=
4578 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4580 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
4582 /* Set MERGED shaders. */
4583 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4584 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4585 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4586 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4587 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4591 case PIPE_SHADER_VERTEX
:
4592 declare_global_desc_pointers(ctx
);
4594 if (vs_blit_property
) {
4595 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4598 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4602 declare_per_stage_desc_pointers(ctx
, true);
4603 declare_vs_specific_input_sgprs(ctx
);
4604 if (!shader
->is_gs_copy_shader
) {
4605 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4606 &ctx
->vertex_buffers
);
4609 if (shader
->key
.as_es
) {
4610 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4611 &ctx
->es2gs_offset
);
4612 } else if (shader
->key
.as_ls
) {
4613 /* no extra parameters */
4615 /* The locations of the other parameters are assigned dynamically. */
4616 declare_streamout_params(ctx
, &shader
->selector
->so
);
4620 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4623 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4624 for (i
= 0; i
< 4; i
++)
4625 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4629 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4630 declare_global_desc_pointers(ctx
);
4631 declare_per_stage_desc_pointers(ctx
, true);
4632 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4633 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4634 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4635 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4636 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4637 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4640 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4641 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4643 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4644 * placed after the user SGPRs.
4646 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4647 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4648 for (i
= 0; i
< 11; i
++)
4649 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4652 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4653 /* Merged stages have 8 system SGPRs at the beginning. */
4654 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4655 declare_per_stage_desc_pointers(ctx
,
4656 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4657 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4658 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4659 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4660 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4661 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4662 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4664 declare_global_desc_pointers(ctx
);
4665 declare_per_stage_desc_pointers(ctx
,
4666 ctx
->type
== PIPE_SHADER_VERTEX
);
4667 declare_vs_specific_input_sgprs(ctx
);
4669 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4670 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4671 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4672 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
, &ctx
->vertex_buffers
);
4674 /* VGPRs (first TCS, then VS) */
4675 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4676 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4678 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4679 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4681 /* LS return values are inputs to the TCS main shader part. */
4682 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4683 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4684 for (i
= 0; i
< 2; i
++)
4685 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4687 /* TCS return values are inputs to the TCS epilog.
4689 * param_tcs_offchip_offset, param_tcs_factor_offset,
4690 * param_tcs_offchip_layout, and param_rw_buffers
4691 * should be passed to the epilog.
4693 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4694 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4695 for (i
= 0; i
< 11; i
++)
4696 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4700 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4701 /* Merged stages have 8 system SGPRs at the beginning. */
4702 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4703 declare_per_stage_desc_pointers(ctx
,
4704 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4706 if (ctx
->shader
->key
.as_ngg
)
4707 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_tg_info
);
4709 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4711 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4712 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4713 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4714 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4715 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4717 declare_global_desc_pointers(ctx
);
4718 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4719 declare_per_stage_desc_pointers(ctx
,
4720 (ctx
->type
== PIPE_SHADER_VERTEX
||
4721 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4724 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4725 if (vs_blit_property
)
4726 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4728 declare_vs_specific_input_sgprs(ctx
);
4730 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4731 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4732 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4733 /* Declare as many input SGPRs as the VS has. */
4736 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4737 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4738 &ctx
->vertex_buffers
);
4741 /* VGPRs (first GS, then VS/TES) */
4742 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx01_offset
);
4743 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx23_offset
);
4744 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4745 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4746 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx45_offset
);
4748 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4749 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4750 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4751 declare_tes_input_vgprs(ctx
);
4754 if (ctx
->shader
->key
.as_es
&&
4755 (ctx
->type
== PIPE_SHADER_VERTEX
||
4756 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4757 unsigned num_user_sgprs
;
4759 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4760 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4762 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4764 /* ES return values are inputs to GS. */
4765 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4766 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4767 for (i
= 0; i
< 5; i
++)
4768 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4772 case PIPE_SHADER_TESS_EVAL
:
4773 declare_global_desc_pointers(ctx
);
4774 declare_per_stage_desc_pointers(ctx
, true);
4775 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4776 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4777 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4779 if (shader
->key
.as_es
) {
4780 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4781 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4782 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->es2gs_offset
);
4784 declare_streamout_params(ctx
, &shader
->selector
->so
);
4785 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4789 declare_tes_input_vgprs(ctx
);
4792 case PIPE_SHADER_GEOMETRY
:
4793 declare_global_desc_pointers(ctx
);
4794 declare_per_stage_desc_pointers(ctx
, true);
4795 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4796 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_wave_id
);
4799 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[0]);
4800 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[1]);
4801 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4802 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[2]);
4803 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[3]);
4804 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[4]);
4805 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[5]);
4806 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4809 case PIPE_SHADER_FRAGMENT
:
4810 declare_global_desc_pointers(ctx
);
4811 declare_per_stage_desc_pointers(ctx
, true);
4812 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
,
4813 SI_PARAM_ALPHA_REF
);
4814 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4815 &ctx
->args
.prim_mask
, SI_PARAM_PRIM_MASK
);
4817 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_sample
,
4818 SI_PARAM_PERSP_SAMPLE
);
4819 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4820 &ctx
->args
.persp_center
, SI_PARAM_PERSP_CENTER
);
4821 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4822 &ctx
->args
.persp_centroid
, SI_PARAM_PERSP_CENTROID
);
4823 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4824 NULL
, SI_PARAM_PERSP_PULL_MODEL
);
4825 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4826 &ctx
->args
.linear_sample
, SI_PARAM_LINEAR_SAMPLE
);
4827 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4828 &ctx
->args
.linear_center
, SI_PARAM_LINEAR_CENTER
);
4829 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4830 &ctx
->args
.linear_centroid
, SI_PARAM_LINEAR_CENTROID
);
4831 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_FLOAT
,
4832 NULL
, SI_PARAM_LINE_STIPPLE_TEX
);
4833 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4834 &ctx
->args
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4835 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4836 &ctx
->args
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4837 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4838 &ctx
->args
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4839 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4840 &ctx
->args
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4841 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4842 &ctx
->args
.front_face
, SI_PARAM_FRONT_FACE
);
4843 shader
->info
.face_vgpr_index
= 20;
4844 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4845 &ctx
->args
.ancillary
, SI_PARAM_ANCILLARY
);
4846 shader
->info
.ancillary_vgpr_index
= 21;
4847 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4848 &ctx
->args
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4849 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4850 &ctx
->pos_fixed_pt
, SI_PARAM_POS_FIXED_PT
);
4852 /* Color inputs from the prolog. */
4853 if (shader
->selector
->info
.colors_read
) {
4854 unsigned num_color_elements
=
4855 util_bitcount(shader
->selector
->info
.colors_read
);
4857 for (i
= 0; i
< num_color_elements
; i
++)
4858 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
4860 num_prolog_vgprs
+= num_color_elements
;
4863 /* Outputs for the epilog. */
4864 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4867 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4868 shader
->selector
->info
.writes_z
+
4869 shader
->selector
->info
.writes_stencil
+
4870 shader
->selector
->info
.writes_samplemask
+
4871 1 /* SampleMaskIn */;
4873 num_returns
= MAX2(num_returns
,
4875 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4877 for (i
= 0; i
< num_return_sgprs
; i
++)
4878 returns
[i
] = ctx
->i32
;
4879 for (; i
< num_returns
; i
++)
4880 returns
[i
] = ctx
->f32
;
4883 case PIPE_SHADER_COMPUTE
:
4884 declare_global_desc_pointers(ctx
);
4885 declare_per_stage_desc_pointers(ctx
, true);
4886 if (shader
->selector
->info
.uses_grid_size
)
4887 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
,
4888 &ctx
->args
.num_work_groups
);
4889 if (shader
->selector
->info
.uses_block_size
&&
4890 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4891 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
, &ctx
->block_size
);
4893 unsigned cs_user_data_dwords
=
4894 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
4895 if (cs_user_data_dwords
) {
4896 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, cs_user_data_dwords
, AC_ARG_INT
,
4897 &ctx
->cs_user_data
);
4900 /* Hardware SGPRs. */
4901 for (i
= 0; i
< 3; i
++) {
4902 if (shader
->selector
->info
.uses_block_id
[i
]) {
4903 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4904 &ctx
->args
.workgroup_ids
[i
]);
4907 if (shader
->selector
->info
.uses_subgroup_info
)
4908 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.tg_size
);
4910 /* Hardware VGPRs. */
4911 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4912 &ctx
->args
.local_invocation_ids
);
4915 assert(0 && "unimplemented shader");
4919 si_create_function(ctx
, "main", returns
, num_returns
,
4920 si_get_max_workgroup_size(shader
));
4922 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4923 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4924 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4925 "InitialPSInputAddr",
4926 S_0286D0_PERSP_SAMPLE_ENA(1) |
4927 S_0286D0_PERSP_CENTER_ENA(1) |
4928 S_0286D0_PERSP_CENTROID_ENA(1) |
4929 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4930 S_0286D0_LINEAR_CENTER_ENA(1) |
4931 S_0286D0_LINEAR_CENTROID_ENA(1) |
4932 S_0286D0_FRONT_FACE_ENA(1) |
4933 S_0286D0_ANCILLARY_ENA(1) |
4934 S_0286D0_POS_FIXED_PT_ENA(1));
4937 shader
->info
.num_input_sgprs
= ctx
->args
.num_sgprs_used
;
4938 shader
->info
.num_input_vgprs
= ctx
->args
.num_vgprs_used
;
4940 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4941 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4943 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4944 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
4945 /* The LSHS size is not known until draw time, so we append it
4946 * at the end of whatever LDS use there may be in the rest of
4947 * the shader (currently none, unless LLVM decides to do its
4948 * own LDS-based lowering).
4950 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
4951 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4952 "__lds_end", AC_ADDR_SPACE_LDS
);
4953 LLVMSetAlignment(ctx
->ac
.lds
, 256);
4955 ac_declare_lds_as_pointer(&ctx
->ac
);
4959 /* Unlike radv, we override these arguments in the prolog, so to the
4960 * API shader they appear as normal arguments.
4962 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4963 ctx
->abi
.vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.vertex_id
);
4964 ctx
->abi
.instance_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.instance_id
);
4965 } else if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
4966 ctx
->abi
.persp_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.persp_centroid
);
4967 ctx
->abi
.linear_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.linear_centroid
);
4971 /* Ensure that the esgs ring is declared.
4973 * We declare it with 64KB alignment as a hint that the
4974 * pointer value will always be 0.
4976 static void declare_esgs_ring(struct si_shader_context
*ctx
)
4981 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
4983 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
4984 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4987 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
4988 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
4992 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
4995 static void preload_ring_buffers(struct si_shader_context
*ctx
)
4997 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4999 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
5001 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5002 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5004 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5006 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5009 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5011 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
5012 /* Declare the ESGS ring as an explicit LDS symbol. */
5013 declare_esgs_ring(ctx
);
5015 ac_declare_lds_as_pointer(&ctx
->ac
);
5016 ctx
->esgs_ring
= ctx
->ac
.lds
;
5021 if (ctx
->shader
->is_gs_copy_shader
) {
5022 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5025 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5026 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5027 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5028 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5029 LLVMValueRef base_ring
;
5031 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5033 /* The conceptual layout of the GSVS ring is
5034 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5035 * but the real memory layout is swizzled across
5037 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5039 * Override the buffer descriptor accordingly.
5041 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5042 uint64_t stream_offset
= 0;
5044 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5045 unsigned num_components
;
5047 unsigned num_records
;
5048 LLVMValueRef ring
, tmp
;
5050 num_components
= sel
->info
.num_stream_output_components
[stream
];
5051 if (!num_components
)
5054 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5056 /* Limit on the stride field for <= GFX7. */
5057 assert(stride
< (1 << 14));
5059 num_records
= ctx
->ac
.wave_size
;
5061 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5062 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5063 tmp
= LLVMBuildAdd(builder
, tmp
,
5064 LLVMConstInt(ctx
->i64
,
5065 stream_offset
, 0), "");
5066 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5068 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5069 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5070 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5071 tmp
= LLVMBuildOr(builder
, tmp
,
5072 LLVMConstInt(ctx
->i32
,
5073 S_008F04_STRIDE(stride
) |
5074 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5075 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5076 ring
= LLVMBuildInsertElement(builder
, ring
,
5077 LLVMConstInt(ctx
->i32
, num_records
, 0),
5078 LLVMConstInt(ctx
->i32
, 2, 0), "");
5081 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5082 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5083 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5084 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5085 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5086 S_008F0C_ADD_TID_ENABLE(1);
5088 if (ctx
->ac
.chip_class
>= GFX10
) {
5089 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5090 S_008F0C_OOB_SELECT(2) |
5091 S_008F0C_RESOURCE_LEVEL(1);
5093 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5094 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5095 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5098 ring
= LLVMBuildInsertElement(builder
, ring
,
5099 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5100 LLVMConstInt(ctx
->i32
, 3, 0), "");
5102 ctx
->gsvs_ring
[stream
] = ring
;
5104 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5105 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5109 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5110 LLVMValueRef param_rw_buffers
,
5111 struct ac_arg param_pos_fixed_pt
)
5113 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5114 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5116 /* Use the fixed-point gl_FragCoord input.
5117 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5118 * per coordinate to get the repeating effect.
5120 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5121 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5123 /* Load the buffer descriptor. */
5124 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5125 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5127 /* The stipple pattern is 32x32, each row has 32 bits. */
5128 offset
= LLVMBuildMul(builder
, address
[1],
5129 LLVMConstInt(ctx
->i32
, 4, 0), "");
5130 row
= buffer_load_const(ctx
, desc
, offset
);
5131 row
= ac_to_integer(&ctx
->ac
, row
);
5132 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5133 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5134 ac_build_kill_if_false(&ctx
->ac
, bit
);
5137 /* For the UMR disassembler. */
5138 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5139 #define DEBUGGER_NUM_MARKERS 5
5141 static bool si_shader_binary_open(struct si_screen
*screen
,
5142 struct si_shader
*shader
,
5143 struct ac_rtld_binary
*rtld
)
5145 const struct si_shader_selector
*sel
= shader
->selector
;
5146 const char *part_elfs
[5];
5147 size_t part_sizes
[5];
5148 unsigned num_parts
= 0;
5150 #define add_part(shader_or_part) \
5151 if (shader_or_part) { \
5152 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5153 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5157 add_part(shader
->prolog
);
5158 add_part(shader
->previous_stage
);
5159 add_part(shader
->prolog2
);
5161 add_part(shader
->epilog
);
5165 struct ac_rtld_symbol lds_symbols
[2];
5166 unsigned num_lds_symbols
= 0;
5168 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5169 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5170 /* We add this symbol even on LLVM <= 8 to ensure that
5171 * shader->config.lds_size is set correctly below.
5173 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5174 sym
->name
= "esgs_ring";
5175 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5176 sym
->align
= 64 * 1024;
5179 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5180 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5181 sym
->name
= "ngg_emit";
5182 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5186 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5187 .info
= &screen
->info
,
5189 .halt_at_entry
= screen
->options
.halt_shaders
,
5191 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5192 .wave_size
= si_get_shader_wave_size(shader
),
5193 .num_parts
= num_parts
,
5194 .elf_ptrs
= part_elfs
,
5195 .elf_sizes
= part_sizes
,
5196 .num_shared_lds_symbols
= num_lds_symbols
,
5197 .shared_lds_symbols
= lds_symbols
});
5199 if (rtld
->lds_size
> 0) {
5200 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5201 shader
->config
.lds_size
=
5202 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5208 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5210 struct ac_rtld_binary rtld
;
5211 si_shader_binary_open(screen
, shader
, &rtld
);
5212 return rtld
.exec_size
;
5215 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5217 uint64_t *scratch_va
= data
;
5219 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5220 *value
= (uint32_t)*scratch_va
;
5223 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5224 /* Enable scratch coalescing. */
5225 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5226 S_008F04_SWIZZLE_ENABLE(1);
5233 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5234 uint64_t scratch_va
)
5236 struct ac_rtld_binary binary
;
5237 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5240 si_resource_reference(&shader
->bo
, NULL
);
5241 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5242 sscreen
->info
.cpdma_prefetch_writes_memory
?
5243 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5244 PIPE_USAGE_IMMUTABLE
,
5245 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5251 struct ac_rtld_upload_info u
= {};
5253 u
.get_external_symbol
= si_get_external_symbol
;
5254 u
.cb_data
= &scratch_va
;
5255 u
.rx_va
= shader
->bo
->gpu_address
;
5256 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5257 PIPE_TRANSFER_READ_WRITE
|
5258 PIPE_TRANSFER_UNSYNCHRONIZED
|
5259 RADEON_TRANSFER_TEMPORARY
);
5263 bool ok
= ac_rtld_upload(&u
);
5265 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5266 ac_rtld_close(&binary
);
5271 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5272 const struct si_shader_binary
*binary
,
5273 enum pipe_shader_type shader_type
,
5275 struct pipe_debug_callback
*debug
,
5276 const char *name
, FILE *file
)
5278 struct ac_rtld_binary rtld_binary
;
5280 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5281 .info
= &screen
->info
,
5282 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5283 .wave_size
= wave_size
,
5285 .elf_ptrs
= &binary
->elf_buffer
,
5286 .elf_sizes
= &binary
->elf_size
}))
5292 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5295 if (nbytes
> INT_MAX
)
5298 if (debug
&& debug
->debug_message
) {
5299 /* Very long debug messages are cut off, so send the
5300 * disassembly one line at a time. This causes more
5301 * overhead, but on the plus side it simplifies
5302 * parsing of resulting logs.
5304 pipe_debug_message(debug
, SHADER_INFO
,
5305 "Shader Disassembly Begin");
5308 while (line
< nbytes
) {
5309 int count
= nbytes
- line
;
5310 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5312 count
= nl
- (disasm
+ line
);
5315 pipe_debug_message(debug
, SHADER_INFO
,
5316 "%.*s", count
, disasm
+ line
);
5322 pipe_debug_message(debug
, SHADER_INFO
,
5323 "Shader Disassembly End");
5327 fprintf(file
, "Shader %s disassembly:\n", name
);
5328 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5332 ac_rtld_close(&rtld_binary
);
5335 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5337 struct si_screen
*sscreen
= shader
->selector
->screen
;
5338 struct ac_shader_config
*conf
= &shader
->config
;
5339 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5340 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5341 unsigned lds_per_wave
= 0;
5342 unsigned max_simd_waves
;
5344 max_simd_waves
= sscreen
->info
.max_wave64_per_simd
;
5346 /* Compute LDS usage for PS. */
5347 switch (shader
->selector
->type
) {
5348 case PIPE_SHADER_FRAGMENT
:
5349 /* The minimum usage per wave is (num_inputs * 48). The maximum
5350 * usage is (num_inputs * 48 * 16).
5351 * We can get anything in between and it varies between waves.
5353 * The 48 bytes per input for a single primitive is equal to
5354 * 4 bytes/component * 4 components/input * 3 points.
5356 * Other stages don't know the size at compile time or don't
5357 * allocate LDS per wave, but instead they do it per thread group.
5359 lds_per_wave
= conf
->lds_size
* lds_increment
+
5360 align(num_inputs
* 48, lds_increment
);
5362 case PIPE_SHADER_COMPUTE
:
5363 if (shader
->selector
) {
5364 unsigned max_workgroup_size
=
5365 si_get_max_workgroup_size(shader
);
5366 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5367 DIV_ROUND_UP(max_workgroup_size
,
5368 sscreen
->compute_wave_size
);
5374 /* Compute the per-SIMD wave counts. */
5375 if (conf
->num_sgprs
) {
5377 MIN2(max_simd_waves
,
5378 sscreen
->info
.num_physical_sgprs_per_simd
/ conf
->num_sgprs
);
5381 if (conf
->num_vgprs
) {
5382 /* Always print wave limits as Wave64, so that we can compare
5383 * Wave32 and Wave64 with shader-db fairly. */
5384 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
;
5385 max_simd_waves
= MIN2(max_simd_waves
, max_vgprs
/ conf
->num_vgprs
);
5388 /* LDS is 64KB per CU (4 SIMDs) on GFX6-9, which is 16KB per SIMD (usage above
5389 * 16KB makes some SIMDs unoccupied).
5391 * LDS is 128KB in WGP mode and 64KB in CU mode. Assume the WGP mode is used.
5393 unsigned max_lds_size
= sscreen
->info
.chip_class
>= GFX10
? 128*1024 : 64*1024;
5394 unsigned max_lds_per_simd
= max_lds_size
/ 4;
5396 max_simd_waves
= MIN2(max_simd_waves
, max_lds_per_simd
/ lds_per_wave
);
5398 shader
->info
.max_simd_waves
= max_simd_waves
;
5401 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5402 struct si_shader
*shader
,
5403 struct pipe_debug_callback
*debug
)
5405 const struct ac_shader_config
*conf
= &shader
->config
;
5407 if (screen
->options
.debug_disassembly
)
5408 si_shader_dump_disassembly(screen
, &shader
->binary
,
5409 shader
->selector
->type
,
5410 si_get_shader_wave_size(shader
),
5411 debug
, "main", NULL
);
5413 pipe_debug_message(debug
, SHADER_INFO
,
5414 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5415 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5416 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5417 conf
->num_sgprs
, conf
->num_vgprs
,
5418 si_get_shader_binary_size(screen
, shader
),
5419 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5420 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5421 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5424 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5425 struct si_shader
*shader
,
5427 bool check_debug_option
)
5429 const struct ac_shader_config
*conf
= &shader
->config
;
5431 if (!check_debug_option
||
5432 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5433 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5434 fprintf(file
, "*** SHADER CONFIG ***\n"
5435 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5436 "SPI_PS_INPUT_ENA = 0x%04x\n",
5437 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5440 fprintf(file
, "*** SHADER STATS ***\n"
5443 "Spilled SGPRs: %d\n"
5444 "Spilled VGPRs: %d\n"
5445 "Private memory VGPRs: %d\n"
5446 "Code Size: %d bytes\n"
5448 "Scratch: %d bytes per wave\n"
5450 "********************\n\n\n",
5451 conf
->num_sgprs
, conf
->num_vgprs
,
5452 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5453 shader
->info
.private_mem_vgprs
,
5454 si_get_shader_binary_size(sscreen
, shader
),
5455 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5456 shader
->info
.max_simd_waves
);
5460 const char *si_get_shader_name(const struct si_shader
*shader
)
5462 switch (shader
->selector
->type
) {
5463 case PIPE_SHADER_VERTEX
:
5464 if (shader
->key
.as_es
)
5465 return "Vertex Shader as ES";
5466 else if (shader
->key
.as_ls
)
5467 return "Vertex Shader as LS";
5468 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5469 return "Vertex Shader as Primitive Discard CS";
5470 else if (shader
->key
.as_ngg
)
5471 return "Vertex Shader as ESGS";
5473 return "Vertex Shader as VS";
5474 case PIPE_SHADER_TESS_CTRL
:
5475 return "Tessellation Control Shader";
5476 case PIPE_SHADER_TESS_EVAL
:
5477 if (shader
->key
.as_es
)
5478 return "Tessellation Evaluation Shader as ES";
5479 else if (shader
->key
.as_ngg
)
5480 return "Tessellation Evaluation Shader as ESGS";
5482 return "Tessellation Evaluation Shader as VS";
5483 case PIPE_SHADER_GEOMETRY
:
5484 if (shader
->is_gs_copy_shader
)
5485 return "GS Copy Shader as VS";
5487 return "Geometry Shader";
5488 case PIPE_SHADER_FRAGMENT
:
5489 return "Pixel Shader";
5490 case PIPE_SHADER_COMPUTE
:
5491 return "Compute Shader";
5493 return "Unknown Shader";
5497 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5498 struct pipe_debug_callback
*debug
,
5499 FILE *file
, bool check_debug_option
)
5501 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5503 if (!check_debug_option
||
5504 si_can_dump_shader(sscreen
, shader_type
))
5505 si_dump_shader_key(shader
, file
);
5507 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5508 if (shader
->previous_stage
&&
5509 shader
->previous_stage
->binary
.llvm_ir_string
) {
5510 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5511 si_get_shader_name(shader
));
5512 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5515 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5516 si_get_shader_name(shader
));
5517 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5520 if (!check_debug_option
||
5521 (si_can_dump_shader(sscreen
, shader_type
) &&
5522 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5523 unsigned wave_size
= si_get_shader_wave_size(shader
);
5525 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5528 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5529 shader_type
, wave_size
, debug
, "prolog", file
);
5530 if (shader
->previous_stage
)
5531 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5532 shader_type
, wave_size
, debug
, "previous stage", file
);
5533 if (shader
->prolog2
)
5534 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5535 shader_type
, wave_size
, debug
, "prolog2", file
);
5537 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5538 wave_size
, debug
, "main", file
);
5541 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5542 shader_type
, wave_size
, debug
, "epilog", file
);
5543 fprintf(file
, "\n");
5546 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5549 static int si_compile_llvm(struct si_screen
*sscreen
,
5550 struct si_shader_binary
*binary
,
5551 struct ac_shader_config
*conf
,
5552 struct ac_llvm_compiler
*compiler
,
5554 struct pipe_debug_callback
*debug
,
5555 enum pipe_shader_type shader_type
,
5558 bool less_optimized
)
5560 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5562 if (si_can_dump_shader(sscreen
, shader_type
)) {
5563 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5565 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5566 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5567 ac_dump_module(mod
);
5568 fprintf(stderr
, "\n");
5572 if (sscreen
->record_llvm_ir
) {
5573 char *ir
= LLVMPrintModuleToString(mod
);
5574 binary
->llvm_ir_string
= strdup(ir
);
5575 LLVMDisposeMessage(ir
);
5578 if (!si_replace_shader(count
, binary
)) {
5579 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5580 less_optimized
, wave_size
);
5585 struct ac_rtld_binary rtld
;
5586 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5587 .info
= &sscreen
->info
,
5588 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5589 .wave_size
= wave_size
,
5591 .elf_ptrs
= &binary
->elf_buffer
,
5592 .elf_sizes
= &binary
->elf_size
}))
5595 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5596 ac_rtld_close(&rtld
);
5600 /* Enable 64-bit and 16-bit denormals, because there is no performance
5603 * If denormals are enabled, all floating-point output modifiers are
5606 * Don't enable denormals for 32-bit floats, because:
5607 * - Floating-point output modifiers would be ignored by the hw.
5608 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5609 * have to stop using those.
5610 * - GFX6 & GFX7 would be very slow.
5612 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5617 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5619 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5620 LLVMBuildRetVoid(ctx
->ac
.builder
);
5622 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5625 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5627 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5628 struct ac_llvm_compiler
*compiler
,
5629 struct si_shader_selector
*gs_selector
,
5630 struct pipe_debug_callback
*debug
)
5632 struct si_shader_context ctx
;
5633 struct si_shader
*shader
;
5634 LLVMBuilderRef builder
;
5635 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5636 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5640 shader
= CALLOC_STRUCT(si_shader
);
5644 /* We can leave the fence as permanently signaled because the GS copy
5645 * shader only becomes visible globally after it has been compiled. */
5646 util_queue_fence_init(&shader
->ready
);
5648 shader
->selector
= gs_selector
;
5649 shader
->is_gs_copy_shader
= true;
5651 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5652 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false),
5654 ctx
.shader
= shader
;
5655 ctx
.type
= PIPE_SHADER_VERTEX
;
5657 builder
= ctx
.ac
.builder
;
5659 create_function(&ctx
);
5660 preload_ring_buffers(&ctx
);
5662 LLVMValueRef voffset
=
5663 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5664 LLVMConstInt(ctx
.i32
, 4, 0), "");
5666 /* Fetch the vertex stream ID.*/
5667 LLVMValueRef stream_id
;
5669 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5670 stream_id
= si_unpack_param(&ctx
, ctx
.streamout_config
, 24, 2);
5672 stream_id
= ctx
.i32_0
;
5674 /* Fill in output information. */
5675 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5676 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5677 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5679 for (int chan
= 0; chan
< 4; chan
++) {
5680 outputs
[i
].vertex_stream
[chan
] =
5681 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5685 LLVMBasicBlockRef end_bb
;
5686 LLVMValueRef switch_inst
;
5688 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5689 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5691 for (int stream
= 0; stream
< 4; stream
++) {
5692 LLVMBasicBlockRef bb
;
5695 if (!gsinfo
->num_stream_output_components
[stream
])
5698 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5701 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5702 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5703 LLVMPositionBuilderAtEnd(builder
, bb
);
5705 /* Fetch vertex data from GSVS ring */
5707 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5708 for (unsigned chan
= 0; chan
< 4; chan
++) {
5709 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5710 outputs
[i
].vertex_stream
[chan
] != stream
) {
5711 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5715 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5716 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5719 outputs
[i
].values
[chan
] =
5720 ac_build_buffer_load(&ctx
.ac
,
5721 ctx
.gsvs_ring
[0], 1,
5723 soffset
, 0, ac_glc
| ac_slc
,
5728 /* Streamout and exports. */
5729 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5730 si_llvm_emit_streamout(&ctx
, outputs
,
5731 gsinfo
->num_outputs
,
5736 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5738 LLVMBuildBr(builder
, end_bb
);
5741 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5743 LLVMBuildRetVoid(ctx
.ac
.builder
);
5745 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5746 si_llvm_optimize_module(&ctx
);
5749 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5750 &ctx
.shader
->config
, ctx
.compiler
,
5752 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5753 "GS Copy Shader", false) == 0) {
5754 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5755 fprintf(stderr
, "GS Copy Shader:\n");
5756 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5758 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5759 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5764 si_llvm_dispose(&ctx
);
5770 si_fix_resource_usage(sscreen
, shader
);
5775 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5776 const struct si_vs_prolog_bits
*prolog
,
5777 const char *prefix
, FILE *f
)
5779 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5780 prefix
, prolog
->instance_divisor_is_one
);
5781 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5782 prefix
, prolog
->instance_divisor_is_fetched
);
5783 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5784 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5785 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5786 prefix
, prolog
->ls_vgpr_fix
);
5788 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5789 fprintf(f
, " mono.vs.fix_fetch = {");
5790 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5791 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5797 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5798 fix
.u
.num_channels_m1
, fix
.u
.format
);
5803 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5805 const struct si_shader_key
*key
= &shader
->key
;
5806 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5808 fprintf(f
, "SHADER KEY\n");
5810 switch (shader_type
) {
5811 case PIPE_SHADER_VERTEX
:
5812 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5813 "part.vs.prolog", f
);
5814 fprintf(f
, " as_es = %u\n", key
->as_es
);
5815 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5816 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5817 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5818 key
->mono
.u
.vs_export_prim_id
);
5819 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5820 key
->opt
.vs_as_prim_discard_cs
);
5821 fprintf(f
, " opt.cs_prim_type = %s\n",
5822 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5823 fprintf(f
, " opt.cs_indexed = %u\n",
5824 key
->opt
.cs_indexed
);
5825 fprintf(f
, " opt.cs_instancing = %u\n",
5826 key
->opt
.cs_instancing
);
5827 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5828 key
->opt
.cs_primitive_restart
);
5829 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5830 key
->opt
.cs_provoking_vertex_first
);
5831 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5832 key
->opt
.cs_need_correct_orientation
);
5833 fprintf(f
, " opt.cs_cull_front = %u\n",
5834 key
->opt
.cs_cull_front
);
5835 fprintf(f
, " opt.cs_cull_back = %u\n",
5836 key
->opt
.cs_cull_back
);
5837 fprintf(f
, " opt.cs_cull_z = %u\n",
5838 key
->opt
.cs_cull_z
);
5839 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5840 key
->opt
.cs_halfz_clip_space
);
5843 case PIPE_SHADER_TESS_CTRL
:
5844 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5845 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5846 "part.tcs.ls_prolog", f
);
5848 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5849 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5852 case PIPE_SHADER_TESS_EVAL
:
5853 fprintf(f
, " as_es = %u\n", key
->as_es
);
5854 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5855 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5856 key
->mono
.u
.vs_export_prim_id
);
5859 case PIPE_SHADER_GEOMETRY
:
5860 if (shader
->is_gs_copy_shader
)
5863 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5864 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5865 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5866 "part.gs.vs_prolog", f
);
5868 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5869 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5870 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5873 case PIPE_SHADER_COMPUTE
:
5876 case PIPE_SHADER_FRAGMENT
:
5877 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5878 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5879 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5880 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5881 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5882 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5883 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5884 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5885 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5886 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5887 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5888 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5889 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5890 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5891 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5892 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5893 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5894 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5895 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5896 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5897 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5898 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5905 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5906 shader_type
== PIPE_SHADER_TESS_EVAL
||
5907 shader_type
== PIPE_SHADER_VERTEX
) &&
5908 !key
->as_es
&& !key
->as_ls
) {
5909 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5910 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5914 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5915 struct si_screen
*sscreen
,
5916 struct ac_llvm_compiler
*compiler
,
5920 struct lp_build_tgsi_context
*bld_base
;
5922 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
,
5923 nir
? 64 : wave_size
);
5925 bld_base
= &ctx
->bld_base
;
5926 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5928 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5929 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5930 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5932 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5934 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5936 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5937 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5938 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5939 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5941 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5942 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5943 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5944 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5945 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5946 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5947 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5948 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5950 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5951 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5952 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5955 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5957 struct si_shader
*shader
= ctx
->shader
;
5958 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5960 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5961 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5962 shader
->key
.as_ls
||
5966 ac_optimize_vs_outputs(&ctx
->ac
,
5968 shader
->info
.vs_output_param_offset
,
5970 &shader
->info
.nr_param_exports
);
5973 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5974 struct ac_arg param
, unsigned bitoffset
)
5976 LLVMValueRef args
[] = {
5977 ac_get_arg(&ctx
->ac
, param
),
5978 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5980 ac_build_intrinsic(&ctx
->ac
,
5981 "llvm.amdgcn.init.exec.from.input",
5982 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5985 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5986 const struct si_vs_prolog_bits
*key
)
5988 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5990 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
5993 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
5994 struct nir_shader
*nir
, bool free_nir
)
5996 struct si_shader
*shader
= ctx
->shader
;
5997 struct si_shader_selector
*sel
= shader
->selector
;
5998 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6000 // TODO clean all this up!
6001 switch (ctx
->type
) {
6002 case PIPE_SHADER_VERTEX
:
6003 ctx
->load_input
= declare_input_vs
;
6004 if (shader
->key
.as_ls
)
6005 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6006 else if (shader
->key
.as_es
)
6007 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6008 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6009 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6010 else if (shader
->key
.as_ngg
)
6011 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6013 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6014 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6015 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6017 case PIPE_SHADER_TESS_CTRL
:
6018 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6019 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6020 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6021 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6022 bld_base
->emit_store
= store_output_tcs
;
6023 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6024 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6025 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6026 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6028 case PIPE_SHADER_TESS_EVAL
:
6029 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6030 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6031 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6032 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6033 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6034 if (shader
->key
.as_es
)
6035 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6036 else if (shader
->key
.as_ngg
)
6037 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6039 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6040 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6042 case PIPE_SHADER_GEOMETRY
:
6043 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6044 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6045 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6046 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6047 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6048 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6050 case PIPE_SHADER_FRAGMENT
:
6051 ctx
->load_input
= declare_input_fs
;
6052 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6053 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6054 ctx
->abi
.load_sample_position
= load_sample_position
;
6055 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6056 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6057 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6059 case PIPE_SHADER_COMPUTE
:
6060 ctx
->abi
.load_local_group_size
= get_block_size
;
6063 assert(!"Unsupported shader type");
6067 ctx
->abi
.load_ubo
= load_ubo
;
6068 ctx
->abi
.load_ssbo
= load_ssbo
;
6070 create_function(ctx
);
6071 preload_ring_buffers(ctx
);
6073 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6074 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6075 for (unsigned i
= 0; i
< 6; i
++) {
6076 ctx
->invoc0_tess_factors
[i
] =
6077 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6081 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6082 for (unsigned i
= 0; i
< 4; i
++) {
6083 ctx
->gs_next_vertex
[i
] =
6084 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6086 if (shader
->key
.as_ngg
) {
6087 for (unsigned i
= 0; i
< 4; ++i
) {
6088 ctx
->gs_curprim_verts
[i
] =
6089 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6090 ctx
->gs_generated_prims
[i
] =
6091 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6094 unsigned scratch_size
= 8;
6095 if (sel
->so
.num_outputs
)
6098 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6099 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6100 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6101 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6102 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6104 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6105 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6106 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6107 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6111 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6112 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6113 /* Unconditionally declare scratch space base for streamout and
6114 * vertex compaction. Whether space is actually allocated is
6115 * determined during linking / PM4 creation.
6117 * Add an extra dword per vertex to ensure an odd stride, which
6118 * avoids bank conflicts for SoA accesses.
6120 declare_esgs_ring(ctx
);
6122 /* This is really only needed when streamout and / or vertex
6123 * compaction is enabled.
6125 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6126 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6127 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6128 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6129 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6132 /* For GFX9 merged shaders:
6133 * - Set EXEC for the first shader. If the prolog is present, set
6134 * EXEC there instead.
6135 * - Add a barrier before the second shader.
6136 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6137 * an if-statement. This is required for correctness in geometry
6138 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6141 * For monolithic merged shaders, the first shader is wrapped in an
6142 * if-block together with its prolog in si_build_wrapper_function.
6144 * NGG vertex and tess eval shaders running as the last
6145 * vertex/geometry stage handle execution explicitly using
6148 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6149 if (!shader
->is_monolithic
&&
6150 sel
->info
.num_instructions
> 1 && /* not empty shader */
6151 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6152 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6153 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6154 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6155 si_init_exec_from_input(ctx
,
6156 ctx
->merged_wave_info
, 0);
6157 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6158 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6159 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6160 LLVMValueRef num_threads
;
6161 bool nested_barrier
;
6163 if (!shader
->is_monolithic
||
6164 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6165 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6166 ac_init_exec_full_mask(&ctx
->ac
);
6168 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6169 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6170 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6171 gfx10_ngg_gs_emit_prologue(ctx
);
6172 nested_barrier
= false;
6174 nested_barrier
= true;
6177 /* Number of patches / primitives */
6178 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 8, 8);
6180 /* Number of vertices */
6181 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 0, 8);
6182 nested_barrier
= false;
6186 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6187 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6189 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6190 ctx
->merged_wrap_if_label
= 11500;
6191 ac_build_ifcc(&ctx
->ac
, ena
, ctx
->merged_wrap_if_label
);
6193 if (nested_barrier
) {
6194 /* Execute a barrier before the second shader in
6197 * Execute the barrier inside the conditional block,
6198 * so that empty waves can jump directly to s_endpgm,
6199 * which will also signal the barrier.
6201 * This is possible in gfx9, because an empty wave
6202 * for the second shader does not participate in
6203 * the epilogue. With NGG, empty waves may still
6204 * be required to export data (e.g. GS output vertices),
6205 * so we cannot let them exit early.
6207 * If the shader is TCS and the TCS epilog is present
6208 * and contains a barrier, it will wait there and then
6211 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6216 if (sel
->force_correct_derivs_after_kill
) {
6217 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6218 /* true = don't kill. */
6219 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6220 ctx
->postponed_kill
);
6224 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6225 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6229 bool success
= si_nir_build_llvm(ctx
, nir
);
6233 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6238 si_llvm_build_ret(ctx
, ctx
->return_value
);
6243 * Compute the VS prolog key, which contains all the information needed to
6244 * build the VS prolog function, and set shader->info bits where needed.
6246 * \param info Shader info of the vertex shader.
6247 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6248 * \param prolog_key Key of the VS prolog
6249 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6250 * \param key Output shader part key.
6252 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6253 unsigned num_input_sgprs
,
6254 const struct si_vs_prolog_bits
*prolog_key
,
6255 struct si_shader
*shader_out
,
6256 union si_shader_part_key
*key
)
6258 memset(key
, 0, sizeof(*key
));
6259 key
->vs_prolog
.states
= *prolog_key
;
6260 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6261 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6262 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6263 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6264 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6266 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6267 key
->vs_prolog
.as_ls
= 1;
6268 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6269 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6270 key
->vs_prolog
.as_es
= 1;
6271 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6272 } else if (shader_out
->key
.as_ngg
) {
6273 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6276 /* Enable loading the InstanceID VGPR. */
6277 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6279 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6280 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6281 shader_out
->info
.uses_instanceid
= true;
6285 * Compute the PS prolog key, which contains all the information needed to
6286 * build the PS prolog function, and set related bits in shader->config.
6288 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6289 union si_shader_part_key
*key
,
6290 bool separate_prolog
)
6292 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6294 memset(key
, 0, sizeof(*key
));
6295 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6296 key
->ps_prolog
.colors_read
= info
->colors_read
;
6297 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6298 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6299 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6300 (key
->ps_prolog
.colors_read
||
6301 key
->ps_prolog
.states
.force_persp_sample_interp
||
6302 key
->ps_prolog
.states
.force_linear_sample_interp
||
6303 key
->ps_prolog
.states
.force_persp_center_interp
||
6304 key
->ps_prolog
.states
.force_linear_center_interp
||
6305 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6306 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6307 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6309 if (info
->colors_read
) {
6310 unsigned *color
= shader
->selector
->color_attr_index
;
6312 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6313 /* BCOLORs are stored after the last input. */
6314 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6315 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6316 if (separate_prolog
)
6317 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6320 for (unsigned i
= 0; i
< 2; i
++) {
6321 unsigned interp
= info
->input_interpolate
[color
[i
]];
6322 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6324 if (!(info
->colors_read
& (0xf << i
*4)))
6327 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6329 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6330 interp
== TGSI_INTERPOLATE_COLOR
)
6331 interp
= TGSI_INTERPOLATE_CONSTANT
;
6334 case TGSI_INTERPOLATE_CONSTANT
:
6335 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6337 case TGSI_INTERPOLATE_PERSPECTIVE
:
6338 case TGSI_INTERPOLATE_COLOR
:
6339 /* Force the interpolation location for colors here. */
6340 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6341 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6342 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6343 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6346 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6347 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6348 if (separate_prolog
) {
6349 shader
->config
.spi_ps_input_ena
|=
6350 S_0286CC_PERSP_SAMPLE_ENA(1);
6353 case TGSI_INTERPOLATE_LOC_CENTER
:
6354 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6355 if (separate_prolog
) {
6356 shader
->config
.spi_ps_input_ena
|=
6357 S_0286CC_PERSP_CENTER_ENA(1);
6360 case TGSI_INTERPOLATE_LOC_CENTROID
:
6361 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6362 if (separate_prolog
) {
6363 shader
->config
.spi_ps_input_ena
|=
6364 S_0286CC_PERSP_CENTROID_ENA(1);
6371 case TGSI_INTERPOLATE_LINEAR
:
6372 /* Force the interpolation location for colors here. */
6373 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6374 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6375 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6376 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6378 /* The VGPR assignment for non-monolithic shaders
6379 * works because InitialPSInputAddr is set on the
6380 * main shader and PERSP_PULL_MODEL is never used.
6383 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6384 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6385 separate_prolog
? 6 : 9;
6386 if (separate_prolog
) {
6387 shader
->config
.spi_ps_input_ena
|=
6388 S_0286CC_LINEAR_SAMPLE_ENA(1);
6391 case TGSI_INTERPOLATE_LOC_CENTER
:
6392 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6393 separate_prolog
? 8 : 11;
6394 if (separate_prolog
) {
6395 shader
->config
.spi_ps_input_ena
|=
6396 S_0286CC_LINEAR_CENTER_ENA(1);
6399 case TGSI_INTERPOLATE_LOC_CENTROID
:
6400 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6401 separate_prolog
? 10 : 13;
6402 if (separate_prolog
) {
6403 shader
->config
.spi_ps_input_ena
|=
6404 S_0286CC_LINEAR_CENTROID_ENA(1);
6419 * Check whether a PS prolog is required based on the key.
6421 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6423 return key
->ps_prolog
.colors_read
||
6424 key
->ps_prolog
.states
.force_persp_sample_interp
||
6425 key
->ps_prolog
.states
.force_linear_sample_interp
||
6426 key
->ps_prolog
.states
.force_persp_center_interp
||
6427 key
->ps_prolog
.states
.force_linear_center_interp
||
6428 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6429 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6430 key
->ps_prolog
.states
.poly_stipple
||
6431 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6435 * Compute the PS epilog key, which contains all the information needed to
6436 * build the PS epilog function.
6438 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6439 union si_shader_part_key
*key
)
6441 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6442 memset(key
, 0, sizeof(*key
));
6443 key
->ps_epilog
.colors_written
= info
->colors_written
;
6444 key
->ps_epilog
.writes_z
= info
->writes_z
;
6445 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6446 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6447 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6451 * Build the GS prolog function. Rotate the input vertices for triangle strips
6454 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6455 union si_shader_part_key
*key
)
6457 unsigned num_sgprs
, num_vgprs
;
6458 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6459 LLVMTypeRef returns
[48];
6460 LLVMValueRef func
, ret
;
6462 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6464 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6465 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6466 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6468 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6469 num_vgprs
= 5; /* ES inputs are not needed by GS */
6471 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6475 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6476 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
6477 returns
[i
] = ctx
->i32
;
6480 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6481 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
6482 returns
[num_sgprs
+ i
] = ctx
->f32
;
6485 /* Create the function. */
6486 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6488 func
= ctx
->main_fn
;
6490 /* Set the full EXEC mask for the prolog, because we are only fiddling
6491 * with registers here. The main shader part will set the correct EXEC
6494 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6495 ac_init_exec_full_mask(&ctx
->ac
);
6497 /* Copy inputs to outputs. This should be no-op, as the registers match,
6498 * but it will prevent the compiler from overwriting them unintentionally.
6500 ret
= ctx
->return_value
;
6501 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6502 LLVMValueRef p
= LLVMGetParam(func
, i
);
6503 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6505 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6506 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6507 p
= ac_to_float(&ctx
->ac
, p
);
6508 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6511 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6512 /* Remap the input vertices for every other primitive. */
6513 const struct ac_arg gfx6_vtx_params
[6] = {
6514 { .used
= true, .arg_index
= num_sgprs
},
6515 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6516 { .used
= true, .arg_index
= num_sgprs
+ 3 },
6517 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6518 { .used
= true, .arg_index
= num_sgprs
+ 5 },
6519 { .used
= true, .arg_index
= num_sgprs
+ 6 },
6521 const struct ac_arg gfx9_vtx_params
[3] = {
6522 { .used
= true, .arg_index
= num_sgprs
},
6523 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6524 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6526 LLVMValueRef vtx_in
[6], vtx_out
[6];
6527 LLVMValueRef prim_id
, rotate
;
6529 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6530 for (unsigned i
= 0; i
< 3; i
++) {
6531 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6532 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6535 for (unsigned i
= 0; i
< 6; i
++)
6536 vtx_in
[i
] = ac_get_arg(&ctx
->ac
, gfx6_vtx_params
[i
]);
6539 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6540 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6542 for (unsigned i
= 0; i
< 6; ++i
) {
6543 LLVMValueRef base
, rotated
;
6545 rotated
= vtx_in
[(i
+ 4) % 6];
6546 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6549 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6550 for (unsigned i
= 0; i
< 3; i
++) {
6551 LLVMValueRef hi
, out
;
6553 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6554 LLVMConstInt(ctx
->i32
, 16, 0), "");
6555 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6556 out
= ac_to_float(&ctx
->ac
, out
);
6557 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6558 gfx9_vtx_params
[i
].arg_index
, "");
6561 for (unsigned i
= 0; i
< 6; i
++) {
6564 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6565 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6566 gfx6_vtx_params
[i
].arg_index
, "");
6571 LLVMBuildRet(builder
, ret
);
6575 * Given a list of shader part functions, build a wrapper function that
6576 * runs them in sequence to form a monolithic shader.
6578 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6579 LLVMValueRef
*parts
,
6582 unsigned next_shader_first_part
)
6584 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6585 /* PS epilog has one arg per color component; gfx9 merged shader
6586 * prologs need to forward 32 user SGPRs.
6588 LLVMValueRef initial
[64], out
[64];
6589 LLVMTypeRef function_type
;
6590 unsigned num_first_params
;
6591 unsigned num_out
, initial_num_out
;
6592 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6593 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6594 unsigned num_sgprs
, num_vgprs
;
6597 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6599 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6600 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6601 AC_FUNC_ATTR_ALWAYSINLINE
);
6602 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6605 /* The parameters of the wrapper function correspond to those of the
6606 * first part in terms of SGPRs and VGPRs, but we use the types of the
6607 * main part to get the right types. This is relevant for the
6608 * dereferenceable attribute on descriptor table pointers.
6613 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6614 num_first_params
= LLVMCountParamTypes(function_type
);
6616 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6617 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6619 if (ac_is_sgpr_param(param
)) {
6620 assert(num_vgprs
== 0);
6621 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6623 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6628 while (gprs
< num_sgprs
+ num_vgprs
) {
6629 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], ctx
->args
.arg_count
);
6630 LLVMTypeRef type
= LLVMTypeOf(param
);
6631 unsigned size
= ac_get_type_size(type
) / 4;
6633 /* This is going to get casted anyways, so we don't have to
6634 * have the exact same type. But we do have to preserve the
6635 * pointer-ness so that LLVM knows about it.
6637 enum ac_arg_type arg_type
= AC_ARG_INT
;
6638 if (LLVMGetTypeKind(type
) == LLVMPointerTypeKind
) {
6639 arg_type
= AC_ARG_CONST_PTR
;
6642 ac_add_arg(&ctx
->args
, gprs
< num_sgprs
? AC_ARG_SGPR
: AC_ARG_VGPR
,
6643 size
, arg_type
, NULL
);
6645 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6646 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6647 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6652 /* Prepare the return type. */
6653 unsigned num_returns
= 0;
6654 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6656 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6657 return_type
= LLVMGetReturnType(last_func_type
);
6659 switch (LLVMGetTypeKind(return_type
)) {
6660 case LLVMStructTypeKind
:
6661 num_returns
= LLVMCountStructElementTypes(return_type
);
6662 assert(num_returns
<= ARRAY_SIZE(returns
));
6663 LLVMGetStructElementTypes(return_type
, returns
);
6665 case LLVMVoidTypeKind
:
6668 unreachable("unexpected type");
6671 si_create_function(ctx
, "wrapper", returns
, num_returns
,
6672 si_get_max_workgroup_size(ctx
->shader
));
6674 if (is_merged_shader(ctx
))
6675 ac_init_exec_full_mask(&ctx
->ac
);
6677 /* Record the arguments of the function as if they were an output of
6683 for (unsigned i
= 0; i
< ctx
->args
.arg_count
; ++i
) {
6684 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6685 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6686 LLVMTypeRef out_type
= ctx
->args
.args
[i
].file
== AC_ARG_SGPR
? ctx
->i32
: ctx
->f32
;
6687 unsigned size
= ac_get_type_size(param_type
) / 4;
6690 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6691 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6692 param_type
= ctx
->i32
;
6695 if (param_type
!= out_type
)
6696 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6697 out
[num_out
++] = param
;
6699 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6701 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6702 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6703 param_type
= ctx
->i64
;
6706 if (param_type
!= vector_type
)
6707 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6709 for (unsigned j
= 0; j
< size
; ++j
)
6710 out
[num_out
++] = LLVMBuildExtractElement(
6711 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6714 if (ctx
->args
.args
[i
].file
== AC_ARG_SGPR
)
6715 num_out_sgpr
= num_out
;
6718 memcpy(initial
, out
, sizeof(out
));
6719 initial_num_out
= num_out
;
6720 initial_num_out_sgpr
= num_out_sgpr
;
6722 /* Now chain the parts. */
6723 LLVMValueRef ret
= NULL
;
6724 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6725 LLVMValueRef in
[48];
6726 LLVMTypeRef ret_type
;
6727 unsigned out_idx
= 0;
6728 unsigned num_params
= LLVMCountParams(parts
[part
]);
6730 /* Merged shaders are executed conditionally depending
6731 * on the number of enabled threads passed in the input SGPRs. */
6732 if (is_multi_part_shader(ctx
) && part
== 0) {
6733 LLVMValueRef ena
, count
= initial
[3];
6735 count
= LLVMBuildAnd(builder
, count
,
6736 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6737 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6738 ac_get_thread_id(&ctx
->ac
), count
, "");
6739 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6742 /* Derive arguments for the next part from outputs of the
6745 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6747 LLVMTypeRef param_type
;
6749 unsigned param_size
;
6750 LLVMValueRef arg
= NULL
;
6752 param
= LLVMGetParam(parts
[part
], param_idx
);
6753 param_type
= LLVMTypeOf(param
);
6754 param_size
= ac_get_type_size(param_type
) / 4;
6755 is_sgpr
= ac_is_sgpr_param(param
);
6758 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6759 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6760 } else if (out_idx
< num_out_sgpr
) {
6761 /* Skip returned SGPRs the current part doesn't
6762 * declare on the input. */
6763 out_idx
= num_out_sgpr
;
6766 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6768 if (param_size
== 1)
6771 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6773 if (LLVMTypeOf(arg
) != param_type
) {
6774 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6775 if (LLVMGetPointerAddressSpace(param_type
) ==
6776 AC_ADDR_SPACE_CONST_32BIT
) {
6777 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6778 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6780 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6781 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6784 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6788 in
[param_idx
] = arg
;
6789 out_idx
+= param_size
;
6792 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6794 if (is_multi_part_shader(ctx
) &&
6795 part
+ 1 == next_shader_first_part
) {
6796 ac_build_endif(&ctx
->ac
, 6506);
6798 /* The second half of the merged shader should use
6799 * the inputs from the toplevel (wrapper) function,
6800 * not the return value from the last call.
6802 * That's because the last call was executed condi-
6803 * tionally, so we can't consume it in the main
6806 memcpy(out
, initial
, sizeof(initial
));
6807 num_out
= initial_num_out
;
6808 num_out_sgpr
= initial_num_out_sgpr
;
6812 /* Extract the returned GPRs. */
6813 ret_type
= LLVMTypeOf(ret
);
6817 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6818 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6820 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6822 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6824 LLVMBuildExtractValue(builder
, ret
, i
, "");
6826 assert(num_out
< ARRAY_SIZE(out
));
6827 out
[num_out
++] = val
;
6829 if (LLVMTypeOf(val
) == ctx
->i32
) {
6830 assert(num_out_sgpr
+ 1 == num_out
);
6831 num_out_sgpr
= num_out
;
6837 /* Return the value from the last part. */
6838 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6839 LLVMBuildRetVoid(builder
);
6841 LLVMBuildRet(builder
, ret
);
6844 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6845 struct si_shader_selector
*sel
)
6847 if (!compiler
->low_opt_passes
)
6850 /* Assume a slow CPU. */
6851 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6852 sel
->screen
->info
.chip_class
<= GFX8
);
6854 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6856 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6857 sel
->info
.num_memory_instructions
> 1000;
6860 static struct nir_shader
*get_nir_shader(struct si_shader_selector
*sel
,
6867 } else if (sel
->nir_binary
) {
6868 struct pipe_screen
*screen
= &sel
->screen
->b
;
6869 const void *options
=
6870 screen
->get_compiler_options(screen
, PIPE_SHADER_IR_NIR
,
6873 struct blob_reader blob_reader
;
6874 blob_reader_init(&blob_reader
, sel
->nir_binary
, sel
->nir_size
);
6876 return nir_deserialize(NULL
, options
, &blob_reader
);
6881 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6882 struct ac_llvm_compiler
*compiler
,
6883 struct si_shader
*shader
,
6884 struct pipe_debug_callback
*debug
)
6886 struct si_shader_selector
*sel
= shader
->selector
;
6887 struct si_shader_context ctx
;
6889 struct nir_shader
*nir
= get_nir_shader(sel
, &free_nir
);
6892 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6893 * conversion fails. */
6894 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6895 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6897 tgsi_dump(sel
->tokens
, 0);
6899 nir_print_shader(nir
, stderr
);
6900 si_dump_streamout(&sel
->so
);
6903 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
),
6905 si_llvm_context_set_ir(&ctx
, shader
, nir
);
6907 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6908 sizeof(shader
->info
.vs_output_param_offset
));
6910 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6912 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6913 si_llvm_dispose(&ctx
);
6917 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6918 LLVMValueRef parts
[2];
6919 bool need_prolog
= sel
->vs_needs_prolog
;
6921 parts
[1] = ctx
.main_fn
;
6924 union si_shader_part_key prolog_key
;
6925 si_get_vs_prolog_key(&sel
->info
,
6926 shader
->info
.num_input_sgprs
,
6927 &shader
->key
.part
.vs
.prolog
,
6928 shader
, &prolog_key
);
6929 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6930 parts
[0] = ctx
.main_fn
;
6933 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6934 1 + need_prolog
, need_prolog
, 0);
6936 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6937 si_build_prim_discard_compute_shader(&ctx
);
6938 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6939 if (sscreen
->info
.chip_class
>= GFX9
) {
6940 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6941 LLVMValueRef parts
[4];
6942 bool vs_needs_prolog
=
6943 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6946 parts
[2] = ctx
.main_fn
;
6949 union si_shader_part_key tcs_epilog_key
;
6950 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6951 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6952 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6953 parts
[3] = ctx
.main_fn
;
6955 /* VS as LS main part */
6956 nir
= get_nir_shader(ls
, &free_nir
);
6957 struct si_shader shader_ls
= {};
6958 shader_ls
.selector
= ls
;
6959 shader_ls
.key
.as_ls
= 1;
6960 shader_ls
.key
.mono
= shader
->key
.mono
;
6961 shader_ls
.key
.opt
= shader
->key
.opt
;
6962 shader_ls
.is_monolithic
= true;
6963 si_llvm_context_set_ir(&ctx
, &shader_ls
, nir
);
6965 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6966 si_llvm_dispose(&ctx
);
6969 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6970 parts
[1] = ctx
.main_fn
;
6973 if (vs_needs_prolog
) {
6974 union si_shader_part_key vs_prolog_key
;
6975 si_get_vs_prolog_key(&ls
->info
,
6976 shader_ls
.info
.num_input_sgprs
,
6977 &shader
->key
.part
.tcs
.ls_prolog
,
6978 shader
, &vs_prolog_key
);
6979 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6980 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6981 parts
[0] = ctx
.main_fn
;
6984 /* Reset the shader context. */
6985 ctx
.shader
= shader
;
6986 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6988 si_build_wrapper_function(&ctx
,
6989 parts
+ !vs_needs_prolog
,
6990 4 - !vs_needs_prolog
, vs_needs_prolog
,
6991 vs_needs_prolog
? 2 : 1);
6993 LLVMValueRef parts
[2];
6994 union si_shader_part_key epilog_key
;
6996 parts
[0] = ctx
.main_fn
;
6998 memset(&epilog_key
, 0, sizeof(epilog_key
));
6999 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7000 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7001 parts
[1] = ctx
.main_fn
;
7003 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7005 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7006 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7007 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7008 LLVMValueRef es_prolog
= NULL
;
7009 LLVMValueRef es_main
= NULL
;
7010 LLVMValueRef gs_prolog
= NULL
;
7011 LLVMValueRef gs_main
= ctx
.main_fn
;
7014 union si_shader_part_key gs_prolog_key
;
7015 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7016 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7017 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7018 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7019 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7020 gs_prolog
= ctx
.main_fn
;
7023 nir
= get_nir_shader(es
, &free_nir
);
7024 struct si_shader shader_es
= {};
7025 shader_es
.selector
= es
;
7026 shader_es
.key
.as_es
= 1;
7027 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7028 shader_es
.key
.mono
= shader
->key
.mono
;
7029 shader_es
.key
.opt
= shader
->key
.opt
;
7030 shader_es
.is_monolithic
= true;
7031 si_llvm_context_set_ir(&ctx
, &shader_es
, nir
);
7033 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
7034 si_llvm_dispose(&ctx
);
7037 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7038 es_main
= ctx
.main_fn
;
7041 if (es
->vs_needs_prolog
) {
7042 union si_shader_part_key vs_prolog_key
;
7043 si_get_vs_prolog_key(&es
->info
,
7044 shader_es
.info
.num_input_sgprs
,
7045 &shader
->key
.part
.gs
.vs_prolog
,
7046 shader
, &vs_prolog_key
);
7047 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7048 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7049 es_prolog
= ctx
.main_fn
;
7052 /* Reset the shader context. */
7053 ctx
.shader
= shader
;
7054 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7056 /* Prepare the array of shader parts. */
7057 LLVMValueRef parts
[4];
7058 unsigned num_parts
= 0, main_part
, next_first_part
;
7061 parts
[num_parts
++] = es_prolog
;
7063 parts
[main_part
= num_parts
++] = es_main
;
7064 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7065 parts
[num_parts
++] = gs_main
;
7067 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7068 main_part
, next_first_part
);
7070 LLVMValueRef parts
[2];
7071 union si_shader_part_key prolog_key
;
7073 parts
[1] = ctx
.main_fn
;
7075 memset(&prolog_key
, 0, sizeof(prolog_key
));
7076 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7077 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7078 parts
[0] = ctx
.main_fn
;
7080 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7082 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7083 LLVMValueRef parts
[3];
7084 union si_shader_part_key prolog_key
;
7085 union si_shader_part_key epilog_key
;
7088 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7089 need_prolog
= si_need_ps_prolog(&prolog_key
);
7091 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7094 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7095 parts
[0] = ctx
.main_fn
;
7098 si_get_ps_epilog_key(shader
, &epilog_key
);
7099 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7100 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7102 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7103 need_prolog
? 1 : 0, 0);
7106 si_llvm_optimize_module(&ctx
);
7108 /* Post-optimization transformations and analysis. */
7109 si_optimize_vs_outputs(&ctx
);
7111 if ((debug
&& debug
->debug_message
) ||
7112 si_can_dump_shader(sscreen
, ctx
.type
)) {
7113 ctx
.shader
->info
.private_mem_vgprs
=
7114 ac_count_scratch_private_memory(ctx
.main_fn
);
7117 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7118 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7119 LLVMPointerTypeKind
);
7121 /* Compile to bytecode. */
7122 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7123 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7124 si_get_shader_name(shader
),
7125 si_should_optimize_less(compiler
, shader
->selector
));
7126 si_llvm_dispose(&ctx
);
7128 fprintf(stderr
, "LLVM failed to compile shader\n");
7132 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7133 * LLVM 3.9svn has this bug.
7135 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7136 unsigned wave_size
= sscreen
->compute_wave_size
;
7137 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
*
7138 (wave_size
== 32 ? 2 : 1);
7139 unsigned max_sgprs
= sscreen
->info
.num_physical_sgprs_per_simd
;
7140 unsigned max_sgprs_per_wave
= 128;
7141 unsigned simds_per_tg
= 4; /* assuming WGP mode on gfx10 */
7142 unsigned threads_per_tg
= si_get_max_workgroup_size(shader
);
7143 unsigned waves_per_tg
= DIV_ROUND_UP(threads_per_tg
, wave_size
);
7144 unsigned waves_per_simd
= DIV_ROUND_UP(waves_per_tg
, simds_per_tg
);
7146 max_vgprs
= max_vgprs
/ waves_per_simd
;
7147 max_sgprs
= MIN2(max_sgprs
/ waves_per_simd
, max_sgprs_per_wave
);
7149 if (shader
->config
.num_sgprs
> max_sgprs
||
7150 shader
->config
.num_vgprs
> max_vgprs
) {
7151 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7152 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7153 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7154 max_sgprs
, max_vgprs
);
7156 /* Just terminate the process, because dependent
7157 * shaders can hang due to bad input data, but use
7158 * the env var to allow shader-db to work.
7160 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7165 /* Add the scratch offset to input SGPRs. */
7166 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7167 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7169 /* Calculate the number of fragment input VGPRs. */
7170 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7171 shader
->info
.num_input_vgprs
= ac_get_fs_input_vgpr_cnt(&shader
->config
,
7172 &shader
->info
.face_vgpr_index
,
7173 &shader
->info
.ancillary_vgpr_index
);
7176 si_calculate_max_simd_waves(shader
);
7177 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7182 * Create, compile and return a shader part (prolog or epilog).
7184 * \param sscreen screen
7185 * \param list list of shader parts of the same category
7186 * \param type shader type
7187 * \param key shader part key
7188 * \param prolog whether the part being requested is a prolog
7189 * \param tm LLVM target machine
7190 * \param debug debug callback
7191 * \param build the callback responsible for building the main function
7192 * \return non-NULL on success
7194 static struct si_shader_part
*
7195 si_get_shader_part(struct si_screen
*sscreen
,
7196 struct si_shader_part
**list
,
7197 enum pipe_shader_type type
,
7199 union si_shader_part_key
*key
,
7200 struct ac_llvm_compiler
*compiler
,
7201 struct pipe_debug_callback
*debug
,
7202 void (*build
)(struct si_shader_context
*,
7203 union si_shader_part_key
*),
7206 struct si_shader_part
*result
;
7208 simple_mtx_lock(&sscreen
->shader_parts_mutex
);
7210 /* Find existing. */
7211 for (result
= *list
; result
; result
= result
->next
) {
7212 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7213 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7218 /* Compile a new one. */
7219 result
= CALLOC_STRUCT(si_shader_part
);
7222 struct si_shader shader
= {};
7225 case PIPE_SHADER_VERTEX
:
7226 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7227 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7228 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7230 case PIPE_SHADER_TESS_CTRL
:
7232 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7234 case PIPE_SHADER_GEOMETRY
:
7236 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7238 case PIPE_SHADER_FRAGMENT
:
7240 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7242 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7245 unreachable("bad shader part");
7248 struct si_shader_context ctx
;
7249 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7250 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7253 ctx
.shader
= &shader
;
7259 si_llvm_optimize_module(&ctx
);
7261 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7262 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7269 result
->next
= *list
;
7273 si_llvm_dispose(&ctx
);
7274 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7278 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7280 LLVMValueRef ptr
[2], list
;
7281 bool merged_shader
= is_merged_shader(ctx
);
7283 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7284 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7285 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7290 * Build the vertex shader prolog function.
7292 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7293 * All inputs are returned unmodified. The vertex load indices are
7294 * stored after them, which will be used by the API VS for fetching inputs.
7296 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7301 * (VertexID + BaseVertex),
7302 * (InstanceID + StartInstance),
7303 * (InstanceID / 2 + StartInstance)
7305 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7306 union si_shader_part_key
*key
)
7308 LLVMTypeRef
*returns
;
7309 LLVMValueRef ret
, func
;
7311 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7312 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7313 struct ac_arg input_sgpr_param
[key
->vs_prolog
.num_input_sgprs
];
7314 struct ac_arg input_vgpr_param
[9];
7315 LLVMValueRef input_vgprs
[9];
7316 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7318 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7320 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7322 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7323 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7324 sizeof(LLVMTypeRef
));
7327 /* Declare input and output SGPRs. */
7328 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7329 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7330 &input_sgpr_param
[i
]);
7331 returns
[num_returns
++] = ctx
->i32
;
7334 struct ac_arg merged_wave_info
= input_sgpr_param
[3];
7336 /* Preloaded VGPRs (outputs must be floats) */
7337 for (i
= 0; i
< num_input_vgprs
; i
++) {
7338 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &input_vgpr_param
[i
]);
7339 returns
[num_returns
++] = ctx
->f32
;
7342 /* Vertex load indices. */
7343 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7344 returns
[num_returns
++] = ctx
->f32
;
7346 /* Create the function. */
7347 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, 0);
7348 func
= ctx
->main_fn
;
7350 for (i
= 0; i
< num_input_vgprs
; i
++) {
7351 input_vgprs
[i
] = ac_get_arg(&ctx
->ac
, input_vgpr_param
[i
]);
7354 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7355 if (!key
->vs_prolog
.is_monolithic
)
7356 si_init_exec_from_input(ctx
, merged_wave_info
, 0);
7358 if (key
->vs_prolog
.as_ls
&&
7359 ctx
->screen
->info
.has_ls_vgpr_init_bug
) {
7360 /* If there are no HS threads, SPI loads the LS VGPRs
7361 * starting at VGPR 0. Shift them back to where they
7364 LLVMValueRef has_hs_threads
=
7365 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7366 si_unpack_param(ctx
, input_sgpr_param
[3], 8, 8),
7369 for (i
= 4; i
> 0; --i
) {
7370 input_vgprs
[i
+ 1] =
7371 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7373 input_vgprs
[i
- 1], "");
7378 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7379 unsigned instance_id_vgpr
=
7380 ctx
->screen
->info
.chip_class
>= GFX10
?
7382 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7384 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7385 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7387 /* InstanceID = VertexID >> 16;
7388 * VertexID = VertexID & 0xffff;
7390 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7391 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7392 LLVMConstInt(ctx
->i32
, 16, 0), "");
7393 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7394 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7397 /* Copy inputs to outputs. This should be no-op, as the registers match,
7398 * but it will prevent the compiler from overwriting them unintentionally.
7400 ret
= ctx
->return_value
;
7401 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7402 LLVMValueRef p
= LLVMGetParam(func
, i
);
7403 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7405 for (i
= 0; i
< num_input_vgprs
; i
++) {
7406 LLVMValueRef p
= input_vgprs
[i
];
7408 if (i
== vertex_id_vgpr
)
7409 p
= ctx
->abi
.vertex_id
;
7410 else if (i
== instance_id_vgpr
)
7411 p
= ctx
->abi
.instance_id
;
7413 p
= ac_to_float(&ctx
->ac
, p
);
7414 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7415 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7418 LLVMValueRef original_ret
= ret
;
7419 bool wrapped
= false;
7420 LLVMBasicBlockRef if_entry_block
= NULL
;
7422 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7423 LLVMValueRef num_threads
;
7426 num_threads
= si_unpack_param(ctx
, merged_wave_info
, 0, 8);
7427 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7428 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7429 if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
7430 ac_build_ifcc(&ctx
->ac
, ena
, 11501);
7434 /* Compute vertex load indices from instance divisors. */
7435 LLVMValueRef instance_divisor_constbuf
= NULL
;
7437 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7438 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7439 LLVMValueRef buf_index
=
7440 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7441 instance_divisor_constbuf
=
7442 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7445 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7446 bool divisor_is_one
=
7447 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7448 bool divisor_is_fetched
=
7449 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7450 LLVMValueRef index
= NULL
;
7452 if (divisor_is_one
) {
7453 index
= ctx
->abi
.instance_id
;
7454 } else if (divisor_is_fetched
) {
7455 LLVMValueRef udiv_factors
[4];
7457 for (unsigned j
= 0; j
< 4; j
++) {
7459 buffer_load_const(ctx
, instance_divisor_constbuf
,
7460 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7461 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7463 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7464 * Such InstanceID might not be achievable in a reasonable time though.
7466 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7467 udiv_factors
[0], udiv_factors
[1],
7468 udiv_factors
[2], udiv_factors
[3]);
7471 if (divisor_is_one
|| divisor_is_fetched
) {
7472 /* Add StartInstance. */
7473 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7474 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7475 SI_SGPR_START_INSTANCE
), "");
7477 /* VertexID + BaseVertex */
7478 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7480 LLVMGetParam(func
, user_sgpr_base
+
7481 SI_SGPR_BASE_VERTEX
), "");
7484 index
= ac_to_float(&ctx
->ac
, index
);
7485 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7486 ctx
->args
.arg_count
+ i
, "");
7490 LLVMBasicBlockRef bbs
[2] = {
7491 LLVMGetInsertBlock(ctx
->ac
.builder
),
7494 ac_build_endif(&ctx
->ac
, 11501);
7496 LLVMValueRef values
[2] = {
7500 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7503 si_llvm_build_ret(ctx
, ret
);
7506 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7507 struct ac_llvm_compiler
*compiler
,
7508 struct si_shader
*shader
,
7509 struct pipe_debug_callback
*debug
,
7510 struct si_shader
*main_part
,
7511 const struct si_vs_prolog_bits
*key
)
7513 struct si_shader_selector
*vs
= main_part
->selector
;
7515 if (!si_vs_needs_prolog(vs
, key
))
7518 /* Get the prolog. */
7519 union si_shader_part_key prolog_key
;
7520 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7521 key
, shader
, &prolog_key
);
7524 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7525 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7526 debug
, si_build_vs_prolog_function
,
7527 "Vertex Shader Prolog");
7528 return shader
->prolog
!= NULL
;
7532 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7534 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7535 struct ac_llvm_compiler
*compiler
,
7536 struct si_shader
*shader
,
7537 struct pipe_debug_callback
*debug
)
7539 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7540 &shader
->key
.part
.vs
.prolog
);
7544 * Compile the TCS epilog function. This writes tesselation factors to memory
7545 * based on the output primitive type of the tesselator (determined by TES).
7547 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7548 union si_shader_part_key
*key
)
7550 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7552 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7554 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7555 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7556 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7557 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7558 &ctx
->tcs_offchip_offset
);
7559 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* wave info */
7560 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7561 &ctx
->tcs_factor_offset
);
7562 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7563 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7564 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7565 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7566 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7567 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7568 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7569 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7570 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7571 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7572 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7573 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7574 &ctx
->tcs_offchip_layout
);
7575 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7576 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7577 &ctx
->tcs_out_lds_layout
);
7579 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7580 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7581 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7582 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7583 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7584 &ctx
->tcs_offchip_layout
);
7585 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7586 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7587 &ctx
->tcs_out_lds_layout
);
7588 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7589 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7590 &ctx
->tcs_offchip_offset
);
7591 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7592 &ctx
->tcs_factor_offset
);
7595 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7596 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7597 struct ac_arg rel_patch_id
; /* patch index within the wave (REL_PATCH_ID) */
7598 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &rel_patch_id
);
7599 struct ac_arg invocation_id
; /* invocation ID within the patch */
7600 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &invocation_id
);
7601 struct ac_arg tcs_out_current_patch_data_offset
; /* LDS offset where tess factors should be loaded from */
7602 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
7603 &tcs_out_current_patch_data_offset
);
7605 struct ac_arg tess_factors
[6];
7606 for (unsigned i
= 0; i
< 6; i
++)
7607 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &tess_factors
[i
]);
7609 /* Create the function. */
7610 si_create_function(ctx
, "tcs_epilog", NULL
, 0,
7611 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7612 ac_declare_lds_as_pointer(&ctx
->ac
);
7614 LLVMValueRef invoc0_tess_factors
[6];
7615 for (unsigned i
= 0; i
< 6; i
++)
7616 invoc0_tess_factors
[i
] = ac_get_arg(&ctx
->ac
, tess_factors
[i
]);
7618 si_write_tess_factors(bld_base
,
7619 ac_get_arg(&ctx
->ac
, rel_patch_id
),
7620 ac_get_arg(&ctx
->ac
, invocation_id
),
7621 ac_get_arg(&ctx
->ac
, tcs_out_current_patch_data_offset
),
7622 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7624 LLVMBuildRetVoid(ctx
->ac
.builder
);
7628 * Select and compile (or reuse) TCS parts (epilog).
7630 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7631 struct ac_llvm_compiler
*compiler
,
7632 struct si_shader
*shader
,
7633 struct pipe_debug_callback
*debug
)
7635 if (sscreen
->info
.chip_class
>= GFX9
) {
7636 struct si_shader
*ls_main_part
=
7637 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7639 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7640 &shader
->key
.part
.tcs
.ls_prolog
))
7643 shader
->previous_stage
= ls_main_part
;
7646 /* Get the epilog. */
7647 union si_shader_part_key epilog_key
;
7648 memset(&epilog_key
, 0, sizeof(epilog_key
));
7649 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7651 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7652 PIPE_SHADER_TESS_CTRL
, false,
7653 &epilog_key
, compiler
, debug
,
7654 si_build_tcs_epilog_function
,
7655 "Tessellation Control Shader Epilog");
7656 return shader
->epilog
!= NULL
;
7660 * Select and compile (or reuse) GS parts (prolog).
7662 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7663 struct ac_llvm_compiler
*compiler
,
7664 struct si_shader
*shader
,
7665 struct pipe_debug_callback
*debug
)
7667 if (sscreen
->info
.chip_class
>= GFX9
) {
7668 struct si_shader
*es_main_part
;
7669 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7671 if (shader
->key
.as_ngg
)
7672 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7674 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7676 if (es_type
== PIPE_SHADER_VERTEX
&&
7677 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7678 &shader
->key
.part
.gs
.vs_prolog
))
7681 shader
->previous_stage
= es_main_part
;
7684 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7687 union si_shader_part_key prolog_key
;
7688 memset(&prolog_key
, 0, sizeof(prolog_key
));
7689 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7690 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7692 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7693 PIPE_SHADER_GEOMETRY
, true,
7694 &prolog_key
, compiler
, debug
,
7695 si_build_gs_prolog_function
,
7696 "Geometry Shader Prolog");
7697 return shader
->prolog2
!= NULL
;
7701 * Build the pixel shader prolog function. This handles:
7702 * - two-side color selection and interpolation
7703 * - overriding interpolation parameters for the API PS
7704 * - polygon stippling
7706 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7707 * overriden by other states. (e.g. per-sample interpolation)
7708 * Interpolated colors are stored after the preloaded VGPRs.
7710 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7711 union si_shader_part_key
*key
)
7713 LLVMValueRef ret
, func
;
7714 int num_returns
, i
, num_color_channels
;
7716 assert(si_need_ps_prolog(key
));
7718 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7720 /* Declare inputs. */
7721 LLVMTypeRef return_types
[AC_MAX_ARGS
];
7723 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7724 assert(key
->ps_prolog
.num_input_sgprs
+
7725 key
->ps_prolog
.num_input_vgprs
+
7726 num_color_channels
<= AC_MAX_ARGS
);
7727 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++) {
7728 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7729 return_types
[num_returns
++] = ctx
->i32
;
7733 struct ac_arg pos_fixed_pt
;
7734 struct ac_arg ancillary
;
7735 struct ac_arg param_sample_mask
;
7736 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++) {
7737 struct ac_arg
*arg
= NULL
;
7738 if (i
== key
->ps_prolog
.ancillary_vgpr_index
) {
7740 } else if (i
== key
->ps_prolog
.ancillary_vgpr_index
+ 1) {
7741 arg
= ¶m_sample_mask
;
7742 } else if (i
== key
->ps_prolog
.num_input_vgprs
- 1) {
7743 /* POS_FIXED_PT is always last. */
7744 arg
= &pos_fixed_pt
;
7746 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, arg
);
7747 return_types
[num_returns
++] = ctx
->f32
;
7750 /* Declare outputs (same as inputs + add colors if needed) */
7751 for (i
= 0; i
< num_color_channels
; i
++)
7752 return_types
[num_returns
++] = ctx
->f32
;
7754 /* Create the function. */
7755 si_create_function(ctx
, "ps_prolog", return_types
, num_returns
, 0);
7756 func
= ctx
->main_fn
;
7758 /* Copy inputs to outputs. This should be no-op, as the registers match,
7759 * but it will prevent the compiler from overwriting them unintentionally.
7761 ret
= ctx
->return_value
;
7762 for (i
= 0; i
< ctx
->args
.arg_count
; i
++) {
7763 LLVMValueRef p
= LLVMGetParam(func
, i
);
7764 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7767 /* Polygon stippling. */
7768 if (key
->ps_prolog
.states
.poly_stipple
) {
7769 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7771 si_llvm_emit_polygon_stipple(ctx
, list
, pos_fixed_pt
);
7774 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7775 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7776 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7777 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7779 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7780 * The hw doesn't compute CENTROID if the whole wave only
7781 * contains fully-covered quads.
7783 * PRIM_MASK is after user SGPRs.
7785 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7786 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7787 LLVMConstInt(ctx
->i32
, 31, 0), "");
7788 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7791 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7792 /* Read PERSP_CENTER. */
7793 for (i
= 0; i
< 2; i
++)
7794 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7795 /* Read PERSP_CENTROID. */
7796 for (i
= 0; i
< 2; i
++)
7797 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7798 /* Select PERSP_CENTROID. */
7799 for (i
= 0; i
< 2; i
++) {
7800 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7801 center
[i
], centroid
[i
], "");
7802 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7803 tmp
, base
+ 4 + i
, "");
7806 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7807 /* Read LINEAR_CENTER. */
7808 for (i
= 0; i
< 2; i
++)
7809 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7810 /* Read LINEAR_CENTROID. */
7811 for (i
= 0; i
< 2; i
++)
7812 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7813 /* Select LINEAR_CENTROID. */
7814 for (i
= 0; i
< 2; i
++) {
7815 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7816 center
[i
], centroid
[i
], "");
7817 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7818 tmp
, base
+ 10 + i
, "");
7823 /* Force per-sample interpolation. */
7824 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7825 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7826 LLVMValueRef persp_sample
[2];
7828 /* Read PERSP_SAMPLE. */
7829 for (i
= 0; i
< 2; i
++)
7830 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7831 /* Overwrite PERSP_CENTER. */
7832 for (i
= 0; i
< 2; i
++)
7833 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7834 persp_sample
[i
], base
+ 2 + i
, "");
7835 /* Overwrite PERSP_CENTROID. */
7836 for (i
= 0; i
< 2; i
++)
7837 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7838 persp_sample
[i
], base
+ 4 + i
, "");
7840 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7841 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7842 LLVMValueRef linear_sample
[2];
7844 /* Read LINEAR_SAMPLE. */
7845 for (i
= 0; i
< 2; i
++)
7846 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7847 /* Overwrite LINEAR_CENTER. */
7848 for (i
= 0; i
< 2; i
++)
7849 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7850 linear_sample
[i
], base
+ 8 + i
, "");
7851 /* Overwrite LINEAR_CENTROID. */
7852 for (i
= 0; i
< 2; i
++)
7853 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7854 linear_sample
[i
], base
+ 10 + i
, "");
7857 /* Force center interpolation. */
7858 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7859 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7860 LLVMValueRef persp_center
[2];
7862 /* Read PERSP_CENTER. */
7863 for (i
= 0; i
< 2; i
++)
7864 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7865 /* Overwrite PERSP_SAMPLE. */
7866 for (i
= 0; i
< 2; i
++)
7867 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7868 persp_center
[i
], base
+ i
, "");
7869 /* Overwrite PERSP_CENTROID. */
7870 for (i
= 0; i
< 2; i
++)
7871 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7872 persp_center
[i
], base
+ 4 + i
, "");
7874 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7875 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7876 LLVMValueRef linear_center
[2];
7878 /* Read LINEAR_CENTER. */
7879 for (i
= 0; i
< 2; i
++)
7880 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7881 /* Overwrite LINEAR_SAMPLE. */
7882 for (i
= 0; i
< 2; i
++)
7883 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7884 linear_center
[i
], base
+ 6 + i
, "");
7885 /* Overwrite LINEAR_CENTROID. */
7886 for (i
= 0; i
< 2; i
++)
7887 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7888 linear_center
[i
], base
+ 10 + i
, "");
7891 /* Interpolate colors. */
7892 unsigned color_out_idx
= 0;
7893 for (i
= 0; i
< 2; i
++) {
7894 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7895 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7896 key
->ps_prolog
.face_vgpr_index
;
7897 LLVMValueRef interp
[2], color
[4];
7898 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7903 /* If the interpolation qualifier is not CONSTANT (-1). */
7904 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7905 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7906 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7908 /* Get the (i,j) updated by bc_optimize handling. */
7909 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7911 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7912 interp_vgpr
+ 1, "");
7913 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7916 /* Use the absolute location of the input. */
7917 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7919 if (key
->ps_prolog
.states
.color_two_side
) {
7920 face
= LLVMGetParam(func
, face_vgpr
);
7921 face
= ac_to_integer(&ctx
->ac
, face
);
7924 interp_fs_input(ctx
,
7925 key
->ps_prolog
.color_attr_index
[i
],
7926 TGSI_SEMANTIC_COLOR
, i
,
7927 key
->ps_prolog
.num_interp_inputs
,
7928 key
->ps_prolog
.colors_read
, interp_ij
,
7929 prim_mask
, face
, color
);
7932 unsigned chan
= u_bit_scan(&writemask
);
7933 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7934 ctx
->args
.arg_count
+ color_out_idx
++, "");
7938 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7941 * "When per-sample shading is active due to the use of a fragment
7942 * input qualified by sample or due to the use of the gl_SampleID
7943 * or gl_SamplePosition variables, only the bit for the current
7944 * sample is set in gl_SampleMaskIn. When state specifies multiple
7945 * fragment shader invocations for a given fragment, the sample
7946 * mask for any single fragment shader invocation may specify a
7947 * subset of the covered samples for the fragment. In this case,
7948 * the bit corresponding to each covered sample will be set in
7949 * exactly one fragment shader invocation."
7951 * The samplemask loaded by hardware is always the coverage of the
7952 * entire pixel/fragment, so mask bits out based on the sample ID.
7954 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7955 /* The bit pattern matches that used by fixed function fragment
7957 static const uint16_t ps_iter_masks
[] = {
7958 0xffff, /* not used */
7964 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7966 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7967 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary
, 8, 4);
7968 LLVMValueRef samplemask
= ac_get_arg(&ctx
->ac
, param_sample_mask
);
7970 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7971 samplemask
= LLVMBuildAnd(
7974 LLVMBuildShl(ctx
->ac
.builder
,
7975 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7978 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7980 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7981 param_sample_mask
.arg_index
, "");
7984 /* Tell LLVM to insert WQM instruction sequence when needed. */
7985 if (key
->ps_prolog
.wqm
) {
7986 LLVMAddTargetDependentFunctionAttr(func
,
7987 "amdgpu-ps-wqm-outputs", "");
7990 si_llvm_build_ret(ctx
, ret
);
7994 * Build the pixel shader epilog function. This handles everything that must be
7995 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7997 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7998 union si_shader_part_key
*key
)
8000 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8001 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8003 struct si_ps_exports exp
= {};
8005 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
8007 /* Declare input SGPRs. */
8008 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->rw_buffers
);
8009 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8010 &ctx
->bindless_samplers_and_images
);
8011 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8012 &ctx
->const_and_shader_buffers
);
8013 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8014 &ctx
->samplers_and_images
);
8015 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
,
8016 NULL
, SI_PARAM_ALPHA_REF
);
8018 /* Declare input VGPRs. */
8019 unsigned required_num_params
=
8020 ctx
->args
.num_sgprs_used
+
8021 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8022 key
->ps_epilog
.writes_z
+
8023 key
->ps_epilog
.writes_stencil
+
8024 key
->ps_epilog
.writes_samplemask
;
8026 required_num_params
= MAX2(required_num_params
,
8027 ctx
->args
.num_sgprs_used
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8029 while (ctx
->args
.arg_count
< required_num_params
)
8030 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
8032 /* Create the function. */
8033 si_create_function(ctx
, "ps_epilog", NULL
, 0, 0);
8034 /* Disable elimination of unused inputs. */
8035 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8036 "InitialPSInputAddr", 0xffffff);
8038 /* Process colors. */
8039 unsigned vgpr
= ctx
->args
.num_sgprs_used
;
8040 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8041 int last_color_export
= -1;
8043 /* Find the last color export. */
8044 if (!key
->ps_epilog
.writes_z
&&
8045 !key
->ps_epilog
.writes_stencil
&&
8046 !key
->ps_epilog
.writes_samplemask
) {
8047 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8049 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8050 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8051 /* Just set this if any of the colorbuffers are enabled. */
8053 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8054 last_color_export
= 0;
8056 for (i
= 0; i
< 8; i
++)
8057 if (colors_written
& (1 << i
) &&
8058 (spi_format
>> (i
* 4)) & 0xf)
8059 last_color_export
= i
;
8063 while (colors_written
) {
8064 LLVMValueRef color
[4];
8065 int mrt
= u_bit_scan(&colors_written
);
8067 for (i
= 0; i
< 4; i
++)
8068 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8070 si_export_mrt_color(bld_base
, color
, mrt
,
8071 ctx
->args
.arg_count
- 1,
8072 mrt
== last_color_export
, &exp
);
8075 /* Process depth, stencil, samplemask. */
8076 if (key
->ps_epilog
.writes_z
)
8077 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8078 if (key
->ps_epilog
.writes_stencil
)
8079 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8080 if (key
->ps_epilog
.writes_samplemask
)
8081 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8083 if (depth
|| stencil
|| samplemask
)
8084 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8085 else if (last_color_export
== -1)
8086 ac_build_export_null(&ctx
->ac
);
8089 si_emit_ps_exports(ctx
, &exp
);
8092 LLVMBuildRetVoid(ctx
->ac
.builder
);
8096 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8098 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8099 struct ac_llvm_compiler
*compiler
,
8100 struct si_shader
*shader
,
8101 struct pipe_debug_callback
*debug
)
8103 union si_shader_part_key prolog_key
;
8104 union si_shader_part_key epilog_key
;
8106 /* Get the prolog. */
8107 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8109 /* The prolog is a no-op if these aren't set. */
8110 if (si_need_ps_prolog(&prolog_key
)) {
8112 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8113 PIPE_SHADER_FRAGMENT
, true,
8114 &prolog_key
, compiler
, debug
,
8115 si_build_ps_prolog_function
,
8116 "Fragment Shader Prolog");
8117 if (!shader
->prolog
)
8121 /* Get the epilog. */
8122 si_get_ps_epilog_key(shader
, &epilog_key
);
8125 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8126 PIPE_SHADER_FRAGMENT
, false,
8127 &epilog_key
, compiler
, debug
,
8128 si_build_ps_epilog_function
,
8129 "Fragment Shader Epilog");
8130 if (!shader
->epilog
)
8133 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8134 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8135 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8136 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8139 /* Set up the enable bits for per-sample shading if needed. */
8140 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8141 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8142 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8143 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8144 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8145 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8147 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8148 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8149 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8150 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8151 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8152 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8154 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8155 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8156 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8157 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8158 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8159 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8161 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8162 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8163 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8164 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8165 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8166 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8169 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8170 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8171 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8172 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8173 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8176 /* At least one pair of interpolation weights must be enabled. */
8177 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8178 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8179 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8182 /* Samplemask fixup requires the sample ID. */
8183 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8184 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8185 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8188 /* The sample mask input is always enabled, because the API shader always
8189 * passes it through to the epilog. Disable it here if it's unused.
8191 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8192 !shader
->selector
->info
.reads_samplemask
)
8193 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8198 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8201 /* If tessellation is all offchip and on-chip GS isn't used, this
8202 * workaround is not needed.
8206 /* SPI barrier management bug:
8207 * Make sure we have at least 4k of LDS in use to avoid the bug.
8208 * It applies to workgroup sizes of more than one wavefront.
8210 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8211 sscreen
->info
.family
== CHIP_KABINI
)
8212 *lds_size
= MAX2(*lds_size
, 8);
8215 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8216 struct si_shader
*shader
)
8218 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8220 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8222 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8223 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8224 si_multiwave_lds_size_workaround(sscreen
,
8225 &shader
->config
.lds_size
);
8229 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8230 struct si_shader
*shader
,
8231 struct pipe_debug_callback
*debug
)
8233 struct si_shader_selector
*sel
= shader
->selector
;
8234 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8237 /* LS, ES, VS are compiled on demand if the main part hasn't been
8238 * compiled for that stage.
8240 * GS are compiled on demand if the main part hasn't been compiled
8241 * for the chosen NGG-ness.
8243 * Vertex shaders are compiled on demand when a vertex fetch
8244 * workaround must be applied.
8246 if (shader
->is_monolithic
) {
8247 /* Monolithic shader (compiled as a whole, has many variants,
8248 * may take a long time to compile).
8250 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8254 /* The shader consists of several parts:
8256 * - the middle part is the user shader, it has 1 variant only
8257 * and it was compiled during the creation of the shader
8259 * - the prolog part is inserted at the beginning
8260 * - the epilog part is inserted at the end
8262 * The prolog and epilog have many (but simple) variants.
8264 * Starting with gfx9, geometry and tessellation control
8265 * shaders also contain the prolog and user shader parts of
8266 * the previous shader stage.
8272 /* Copy the compiled TGSI shader data over. */
8273 shader
->is_binary_shared
= true;
8274 shader
->binary
= mainp
->binary
;
8275 shader
->config
= mainp
->config
;
8276 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8277 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8278 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8279 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8280 memcpy(shader
->info
.vs_output_param_offset
,
8281 mainp
->info
.vs_output_param_offset
,
8282 sizeof(mainp
->info
.vs_output_param_offset
));
8283 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8284 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8285 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8287 /* Select prologs and/or epilogs. */
8288 switch (sel
->type
) {
8289 case PIPE_SHADER_VERTEX
:
8290 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8293 case PIPE_SHADER_TESS_CTRL
:
8294 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8297 case PIPE_SHADER_TESS_EVAL
:
8299 case PIPE_SHADER_GEOMETRY
:
8300 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8303 case PIPE_SHADER_FRAGMENT
:
8304 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8307 /* Make sure we have at least as many VGPRs as there
8308 * are allocated inputs.
8310 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8311 shader
->info
.num_input_vgprs
);
8316 /* Update SGPR and VGPR counts. */
8317 if (shader
->prolog
) {
8318 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8319 shader
->prolog
->config
.num_sgprs
);
8320 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8321 shader
->prolog
->config
.num_vgprs
);
8323 if (shader
->previous_stage
) {
8324 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8325 shader
->previous_stage
->config
.num_sgprs
);
8326 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8327 shader
->previous_stage
->config
.num_vgprs
);
8328 shader
->config
.spilled_sgprs
=
8329 MAX2(shader
->config
.spilled_sgprs
,
8330 shader
->previous_stage
->config
.spilled_sgprs
);
8331 shader
->config
.spilled_vgprs
=
8332 MAX2(shader
->config
.spilled_vgprs
,
8333 shader
->previous_stage
->config
.spilled_vgprs
);
8334 shader
->info
.private_mem_vgprs
=
8335 MAX2(shader
->info
.private_mem_vgprs
,
8336 shader
->previous_stage
->info
.private_mem_vgprs
);
8337 shader
->config
.scratch_bytes_per_wave
=
8338 MAX2(shader
->config
.scratch_bytes_per_wave
,
8339 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8340 shader
->info
.uses_instanceid
|=
8341 shader
->previous_stage
->info
.uses_instanceid
;
8343 if (shader
->prolog2
) {
8344 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8345 shader
->prolog2
->config
.num_sgprs
);
8346 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8347 shader
->prolog2
->config
.num_vgprs
);
8349 if (shader
->epilog
) {
8350 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8351 shader
->epilog
->config
.num_sgprs
);
8352 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8353 shader
->epilog
->config
.num_vgprs
);
8355 si_calculate_max_simd_waves(shader
);
8358 if (shader
->key
.as_ngg
) {
8359 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8360 gfx10_ngg_calculate_subgroup_info(shader
);
8361 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8362 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8365 si_fix_resource_usage(sscreen
, shader
);
8366 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8369 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8370 fprintf(stderr
, "LLVM failed to upload shader\n");
8377 void si_shader_destroy(struct si_shader
*shader
)
8379 if (shader
->scratch_bo
)
8380 si_resource_reference(&shader
->scratch_bo
, NULL
);
8382 si_resource_reference(&shader
->bo
, NULL
);
8384 if (!shader
->is_binary_shared
)
8385 si_shader_binary_clean(&shader
->binary
);
8387 free(shader
->shader_log
);