2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include <llvm/Config/llvm-config.h>
27 #include "util/u_memory.h"
28 #include "util/u_string.h"
29 #include "tgsi/tgsi_build.h"
30 #include "tgsi/tgsi_strings.h"
31 #include "tgsi/tgsi_util.h"
32 #include "tgsi/tgsi_dump.h"
33 #include "tgsi/tgsi_from_mesa.h"
35 #include "ac_binary.h"
36 #include "ac_exp_param.h"
37 #include "ac_shader_util.h"
39 #include "ac_llvm_util.h"
40 #include "si_shader_internal.h"
44 #include "compiler/nir/nir.h"
45 #include "compiler/nir/nir_serialize.h"
47 static const char scratch_rsrc_dword0_symbol
[] =
48 "SCRATCH_RSRC_DWORD0";
50 static const char scratch_rsrc_dword1_symbol
[] =
51 "SCRATCH_RSRC_DWORD1";
53 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
54 struct si_screen
*sscreen
,
55 struct ac_llvm_compiler
*compiler
,
59 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
60 struct lp_build_tgsi_context
*bld_base
,
61 struct lp_build_emit_data
*emit_data
);
63 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
65 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
70 union si_shader_part_key
*key
);
71 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
72 union si_shader_part_key
*key
);
73 static void si_fix_resource_usage(struct si_screen
*sscreen
,
74 struct si_shader
*shader
);
76 /* Ideally pass the sample mask input to the PS epilog as v14, which
77 * is its usual location, so that the shader doesn't have to add v_mov.
79 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
81 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
84 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
90 /** Whether the shader runs as a combination of multiple API shaders */
91 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
93 if (ctx
->screen
->info
.chip_class
<= GFX8
)
96 return ctx
->shader
->key
.as_ls
||
97 ctx
->shader
->key
.as_es
||
98 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
99 ctx
->type
== PIPE_SHADER_GEOMETRY
;
102 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
103 static bool is_merged_shader(struct si_shader_context
*ctx
)
105 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
109 * Returns a unique index for a per-patch semantic name and index. The index
110 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
113 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
115 switch (semantic_name
) {
116 case TGSI_SEMANTIC_TESSOUTER
:
118 case TGSI_SEMANTIC_TESSINNER
:
120 case TGSI_SEMANTIC_PATCH
:
125 assert(!"invalid semantic name");
131 * Returns a unique index for a semantic name and index. The index must be
132 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
135 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
138 switch (semantic_name
) {
139 case TGSI_SEMANTIC_POSITION
:
141 case TGSI_SEMANTIC_GENERIC
:
142 /* Since some shader stages use the the highest used IO index
143 * to determine the size to allocate for inputs/outputs
144 * (in LDS, tess and GS rings). GENERIC should be placed right
145 * after POSITION to make that size as small as possible.
147 if (index
< SI_MAX_IO_GENERIC
)
150 assert(!"invalid generic index");
152 case TGSI_SEMANTIC_FOG
:
153 return SI_MAX_IO_GENERIC
+ 1;
154 case TGSI_SEMANTIC_COLOR
:
156 return SI_MAX_IO_GENERIC
+ 2 + index
;
157 case TGSI_SEMANTIC_BCOLOR
:
159 /* If it's a varying, COLOR and BCOLOR alias. */
161 return SI_MAX_IO_GENERIC
+ 2 + index
;
163 return SI_MAX_IO_GENERIC
+ 4 + index
;
164 case TGSI_SEMANTIC_TEXCOORD
:
166 return SI_MAX_IO_GENERIC
+ 6 + index
;
168 /* These are rarely used between LS and HS or ES and GS. */
169 case TGSI_SEMANTIC_CLIPDIST
:
171 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
172 case TGSI_SEMANTIC_CLIPVERTEX
:
173 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
174 case TGSI_SEMANTIC_PSIZE
:
175 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
177 /* These can't be written by LS, HS, and ES. */
178 case TGSI_SEMANTIC_LAYER
:
179 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
180 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
181 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
182 case TGSI_SEMANTIC_PRIMID
:
183 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
184 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
186 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
187 assert(!"invalid semantic name");
193 * Get the value of a shader input parameter and extract a bitfield.
195 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
196 LLVMValueRef value
, unsigned rshift
,
199 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
200 value
= ac_to_integer(&ctx
->ac
, value
);
203 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
204 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
206 if (rshift
+ bitwidth
< 32) {
207 unsigned mask
= (1 << bitwidth
) - 1;
208 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
209 LLVMConstInt(ctx
->i32
, mask
, 0), "");
215 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
216 struct ac_arg param
, unsigned rshift
,
219 LLVMValueRef value
= ac_get_arg(&ctx
->ac
, param
);
221 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
224 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
227 case PIPE_SHADER_TESS_CTRL
:
228 return si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 0, 8);
230 case PIPE_SHADER_TESS_EVAL
:
231 return ac_get_arg(&ctx
->ac
, ctx
->tes_rel_patch_id
);
239 /* Tessellation shaders pass outputs to the next shader using LDS.
241 * LS outputs = TCS inputs
242 * TCS outputs = TES inputs
245 * - TCS inputs for patch 0
246 * - TCS inputs for patch 1
247 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
249 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
250 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
251 * - TCS outputs for patch 1
252 * - Per-patch TCS outputs for patch 1
253 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
254 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
257 * All three shaders VS(LS), TCS, TES share the same LDS space.
261 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
263 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 8, 13);
266 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
268 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
270 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
271 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
273 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
276 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
278 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
280 return LLVMConstInt(ctx
->i32
, stride
, 0);
283 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
285 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
286 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 0, 13);
288 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
289 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
290 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
291 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
292 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
293 num_patch_outputs
* 4;
294 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
298 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
300 return LLVMBuildMul(ctx
->ac
.builder
,
301 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 0, 16),
302 LLVMConstInt(ctx
->i32
, 4, 0), "");
306 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
308 return LLVMBuildMul(ctx
->ac
.builder
,
309 si_unpack_param(ctx
, ctx
->tcs_out_lds_offsets
, 16, 16),
310 LLVMConstInt(ctx
->i32
, 4, 0), "");
314 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
316 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
317 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
319 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
323 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
325 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
326 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
327 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
329 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
333 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
335 LLVMValueRef patch0_patch_data_offset
=
336 get_tcs_out_patch0_patch_data_offset(ctx
);
337 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
338 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
340 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
343 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
345 unsigned tcs_out_vertices
=
346 ctx
->shader
->selector
?
347 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
349 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
350 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
351 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
353 return si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 6, 6);
356 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
361 case PIPE_SHADER_VERTEX
:
362 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
363 return LLVMConstInt(ctx
->i32
, stride
, 0);
365 case PIPE_SHADER_TESS_CTRL
:
366 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
367 ctx
->shader
->is_monolithic
) {
368 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
369 return LLVMConstInt(ctx
->i32
, stride
, 0);
371 return si_unpack_param(ctx
, ctx
->vs_state_bits
, 24, 8);
379 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
380 LLVMValueRef i32
, unsigned index
)
385 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
386 LLVMConstInt(ctx
->i32
, 16, 0), "");
388 return LLVMBuildSExt(ctx
->ac
.builder
,
389 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
394 void si_llvm_load_input_vs(
395 struct si_shader_context
*ctx
,
396 unsigned input_index
,
399 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
400 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
402 if (vs_blit_property
) {
403 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
404 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
405 LLVMIntULE
, vertex_id
,
407 /* Use LLVMIntNE, because we have 3 vertices and only
408 * the middle one should use y2.
410 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
411 LLVMIntNE
, vertex_id
,
414 unsigned param_vs_blit_inputs
= ctx
->vs_blit_inputs
.arg_index
;
415 if (input_index
== 0) {
417 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
418 param_vs_blit_inputs
);
419 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
420 param_vs_blit_inputs
+ 1);
422 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
423 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
424 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
425 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
427 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
429 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
432 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
433 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
434 out
[2] = LLVMGetParam(ctx
->main_fn
,
435 param_vs_blit_inputs
+ 2);
436 out
[3] = ctx
->ac
.f32_1
;
440 /* Color or texture coordinates: */
441 assert(input_index
== 1);
443 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
444 for (int i
= 0; i
< 4; i
++) {
445 out
[i
] = LLVMGetParam(ctx
->main_fn
,
446 param_vs_blit_inputs
+ 3 + i
);
449 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
450 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
451 param_vs_blit_inputs
+ 3);
452 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
453 param_vs_blit_inputs
+ 4);
454 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
455 param_vs_blit_inputs
+ 5);
456 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
457 param_vs_blit_inputs
+ 6);
459 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
461 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
463 out
[2] = LLVMGetParam(ctx
->main_fn
,
464 param_vs_blit_inputs
+ 7);
465 out
[3] = LLVMGetParam(ctx
->main_fn
,
466 param_vs_blit_inputs
+ 8);
471 union si_vs_fix_fetch fix_fetch
;
472 LLVMValueRef t_list_ptr
;
473 LLVMValueRef t_offset
;
475 LLVMValueRef vertex_index
;
478 /* Load the T list */
479 t_list_ptr
= ac_get_arg(&ctx
->ac
, ctx
->vertex_buffers
);
481 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
483 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
485 vertex_index
= LLVMGetParam(ctx
->main_fn
,
486 ctx
->vertex_index0
.arg_index
+
489 /* Use the open-coded implementation for all loads of doubles and
490 * of dword-sized data that needs fixups. We need to insert conversion
491 * code anyway, and the amd/common code does it for us.
493 * Note: On LLVM <= 8, we can only open-code formats with
494 * channel size >= 4 bytes.
496 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
497 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
499 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
500 (fix_fetch
.u
.log_size
== 2)) {
501 tmp
= ac_build_opencoded_load_format(
502 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
503 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
504 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
505 for (unsigned i
= 0; i
< 4; ++i
)
506 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
510 /* Do multiple loads for special formats. */
511 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
512 LLVMValueRef fetches
[4];
513 unsigned num_fetches
;
514 unsigned fetch_stride
;
515 unsigned channels_per_fetch
;
517 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
518 num_fetches
= MIN2(required_channels
, 3);
519 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
520 channels_per_fetch
= 1;
524 channels_per_fetch
= required_channels
;
527 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
528 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
529 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
530 channels_per_fetch
, 0, true);
533 if (num_fetches
== 1 && channels_per_fetch
> 1) {
534 LLVMValueRef fetch
= fetches
[0];
535 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
536 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
537 fetches
[i
] = LLVMBuildExtractElement(
538 ctx
->ac
.builder
, fetch
, tmp
, "");
540 num_fetches
= channels_per_fetch
;
541 channels_per_fetch
= 1;
544 for (unsigned i
= num_fetches
; i
< 4; ++i
)
545 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
547 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
548 required_channels
== 4) {
549 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
550 fetches
[3] = ctx
->ac
.i32_1
;
552 fetches
[3] = ctx
->ac
.f32_1
;
553 } else if (fix_fetch
.u
.log_size
== 3 &&
554 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
555 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
556 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
557 required_channels
== 4) {
558 /* For 2_10_10_10, the hardware returns an unsigned value;
559 * convert it to a signed one.
561 LLVMValueRef tmp
= fetches
[3];
562 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
564 /* First, recover the sign-extended signed integer value. */
565 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
566 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
568 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
570 /* For the integer-like cases, do a natural sign extension.
572 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
573 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
576 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
577 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
578 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
579 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
581 /* Convert back to the right type. */
582 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
584 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
585 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
586 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
587 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
588 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
589 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
595 for (unsigned i
= 0; i
< 4; ++i
)
596 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
599 static void declare_input_vs(
600 struct si_shader_context
*ctx
,
601 unsigned input_index
,
602 const struct tgsi_full_declaration
*decl
,
605 si_llvm_load_input_vs(ctx
, input_index
, out
);
608 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
615 case PIPE_SHADER_VERTEX
:
616 return ac_get_arg(&ctx
->ac
, ctx
->vs_prim_id
);
617 case PIPE_SHADER_TESS_CTRL
:
618 return ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
);
619 case PIPE_SHADER_TESS_EVAL
:
620 return ac_get_arg(&ctx
->ac
, ctx
->args
.tes_patch_id
);
621 case PIPE_SHADER_GEOMETRY
:
622 return ac_get_arg(&ctx
->ac
, ctx
->args
.gs_prim_id
);
630 * Return the value of tgsi_ind_register for indexing.
631 * This is the indirect index with the constant offset added to it.
633 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
634 const struct tgsi_ind_register
*ind
,
640 if (ind
->File
== TGSI_FILE_ADDRESS
) {
641 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
642 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
644 struct tgsi_full_src_register src
= {};
646 src
.Register
.File
= ind
->File
;
647 src
.Register
.Index
= ind
->Index
;
649 /* Set the second index to 0 for constants. */
650 if (ind
->File
== TGSI_FILE_CONSTANT
)
651 src
.Register
.Dimension
= 1;
653 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
656 result
= ac_to_integer(&ctx
->ac
, result
);
659 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
660 LLVMConstInt(ctx
->i32
, rel_index
, 0));
664 * Like si_get_indirect_index, but restricts the return value to a (possibly
665 * undefined) value inside [0..num).
667 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
668 const struct tgsi_ind_register
*ind
,
669 int rel_index
, unsigned num
)
671 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
673 return si_llvm_bound_index(ctx
, result
, num
);
676 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
677 LLVMValueRef vertex_dw_stride
,
678 LLVMValueRef base_addr
,
679 LLVMValueRef vertex_index
,
680 LLVMValueRef param_index
,
681 unsigned input_index
,
686 if (vertex_dw_stride
) {
687 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
688 vertex_dw_stride
, base_addr
);
692 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
693 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
696 int param
= is_patch
?
697 si_shader_io_get_unique_index_patch(name
[input_index
],
698 index
[input_index
]) :
699 si_shader_io_get_unique_index(name
[input_index
],
700 index
[input_index
], false);
702 /* Add the base address of the element. */
703 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
704 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
708 * Calculate a dword address given an input or output register and a stride.
710 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
711 const struct tgsi_full_dst_register
*dst
,
712 const struct tgsi_full_src_register
*src
,
713 LLVMValueRef vertex_dw_stride
,
714 LLVMValueRef base_addr
)
716 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
717 ubyte
*name
, *index
, *array_first
;
719 struct tgsi_full_dst_register reg
;
720 LLVMValueRef vertex_index
= NULL
;
721 LLVMValueRef ind_index
= NULL
;
723 /* Set the register description. The address computation is the same
724 * for sources and destinations. */
726 reg
.Register
.File
= src
->Register
.File
;
727 reg
.Register
.Index
= src
->Register
.Index
;
728 reg
.Register
.Indirect
= src
->Register
.Indirect
;
729 reg
.Register
.Dimension
= src
->Register
.Dimension
;
730 reg
.Indirect
= src
->Indirect
;
731 reg
.Dimension
= src
->Dimension
;
732 reg
.DimIndirect
= src
->DimIndirect
;
736 /* If the register is 2-dimensional (e.g. an array of vertices
737 * in a primitive), calculate the base address of the vertex. */
738 if (reg
.Register
.Dimension
) {
739 if (reg
.Dimension
.Indirect
)
740 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
741 1, reg
.Dimension
.Index
);
743 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
746 /* Get information about the register. */
747 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
748 name
= info
->input_semantic_name
;
749 index
= info
->input_semantic_index
;
750 array_first
= info
->input_array_first
;
751 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
752 name
= info
->output_semantic_name
;
753 index
= info
->output_semantic_index
;
754 array_first
= info
->output_array_first
;
760 if (reg
.Register
.Indirect
) {
761 /* Add the relative address of the element. */
762 if (reg
.Indirect
.ArrayID
)
763 input_index
= array_first
[reg
.Indirect
.ArrayID
];
765 input_index
= reg
.Register
.Index
;
767 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
768 1, reg
.Register
.Index
- input_index
);
770 input_index
= reg
.Register
.Index
;
773 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
774 base_addr
, vertex_index
,
775 ind_index
, input_index
,
777 !reg
.Register
.Dimension
);
780 /* The offchip buffer layout for TCS->TES is
782 * - attribute 0 of patch 0 vertex 0
783 * - attribute 0 of patch 0 vertex 1
784 * - attribute 0 of patch 0 vertex 2
786 * - attribute 0 of patch 1 vertex 0
787 * - attribute 0 of patch 1 vertex 1
789 * - attribute 1 of patch 0 vertex 0
790 * - attribute 1 of patch 0 vertex 1
792 * - per patch attribute 0 of patch 0
793 * - per patch attribute 0 of patch 1
796 * Note that every attribute has 4 components.
798 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
799 LLVMValueRef rel_patch_id
,
800 LLVMValueRef vertex_index
,
801 LLVMValueRef param_index
)
803 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
804 LLVMValueRef param_stride
, constant16
;
806 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
807 num_patches
= si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 6);
808 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
811 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
813 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
814 vertices_per_patch
, vertex_index
);
815 param_stride
= total_vertices
;
817 base_addr
= rel_patch_id
;
818 param_stride
= num_patches
;
821 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
822 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
825 LLVMValueRef patch_data_offset
=
826 si_unpack_param(ctx
, ctx
->tcs_offchip_layout
, 12, 20);
828 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
829 patch_data_offset
, "");
834 /* This is a generic helper that can be shared by the NIR and TGSI backends */
835 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
836 struct si_shader_context
*ctx
,
837 LLVMValueRef vertex_index
,
838 LLVMValueRef param_index
,
844 unsigned param_index_base
;
846 param_index_base
= is_patch
?
847 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
848 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
851 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
852 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
855 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
858 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
859 vertex_index
, param_index
);
862 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
863 struct si_shader_context
*ctx
,
864 const struct tgsi_full_dst_register
*dst
,
865 const struct tgsi_full_src_register
*src
)
867 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
868 ubyte
*name
, *index
, *array_first
;
869 struct tgsi_full_src_register reg
;
870 LLVMValueRef vertex_index
= NULL
;
871 LLVMValueRef param_index
= NULL
;
874 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
876 if (reg
.Register
.Dimension
) {
878 if (reg
.Dimension
.Indirect
)
879 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
880 1, reg
.Dimension
.Index
);
882 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
885 /* Get information about the register. */
886 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
887 name
= info
->input_semantic_name
;
888 index
= info
->input_semantic_index
;
889 array_first
= info
->input_array_first
;
890 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
891 name
= info
->output_semantic_name
;
892 index
= info
->output_semantic_index
;
893 array_first
= info
->output_array_first
;
899 if (reg
.Register
.Indirect
) {
900 if (reg
.Indirect
.ArrayID
)
901 param_base
= array_first
[reg
.Indirect
.ArrayID
];
903 param_base
= reg
.Register
.Index
;
905 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
906 1, reg
.Register
.Index
- param_base
);
909 param_base
= reg
.Register
.Index
;
912 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
913 param_index
, param_base
,
914 name
, index
, !reg
.Register
.Dimension
);
917 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
918 LLVMTypeRef type
, unsigned swizzle
,
919 LLVMValueRef buffer
, LLVMValueRef offset
,
920 LLVMValueRef base
, bool can_speculate
)
922 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
923 LLVMValueRef value
, value2
;
924 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
927 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
928 0, ac_glc
, can_speculate
, false);
930 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
933 if (!llvm_type_is_64bit(ctx
, type
)) {
934 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
935 0, ac_glc
, can_speculate
, false);
937 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
938 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
939 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
942 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
943 swizzle
* 4, ac_glc
, can_speculate
, false);
945 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
946 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
948 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
952 * Load from LSHS LDS storage.
954 * \param type output value type
955 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
956 * \param dw_addr address in dwords
958 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
959 LLVMTypeRef type
, unsigned swizzle
,
960 LLVMValueRef dw_addr
)
962 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
966 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
968 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
969 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
971 return ac_build_gather_values(&ctx
->ac
, values
,
975 /* Split 64-bit loads. */
976 if (llvm_type_is_64bit(ctx
, type
)) {
979 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
980 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
981 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
984 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
985 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
987 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
989 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
993 * Store to LSHS LDS storage.
995 * \param swizzle offset (typically 0..3)
996 * \param dw_addr address in dwords
997 * \param value value to store
999 static void lshs_lds_store(struct si_shader_context
*ctx
,
1000 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1003 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1004 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1006 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1011 TESS_OFFCHIP_RING_TCS
,
1012 TESS_OFFCHIP_RING_TES
,
1015 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1016 enum si_tess_ring ring
)
1018 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1019 LLVMValueRef addr
= ac_get_arg(&ctx
->ac
,
1020 ring
== TESS_OFFCHIP_RING_TES
?
1021 ctx
->tes_offchip_addr
:
1022 ctx
->tcs_out_lds_layout
);
1024 /* TCS only receives high 13 bits of the address. */
1025 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1026 addr
= LLVMBuildAnd(builder
, addr
,
1027 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1030 if (ring
== TCS_FACTOR_RING
) {
1031 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1032 addr
= LLVMBuildAdd(builder
, addr
,
1033 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1036 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1037 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1038 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1039 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1041 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1042 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1043 S_008F0C_OOB_SELECT(3) |
1044 S_008F0C_RESOURCE_LEVEL(1);
1046 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1047 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1049 LLVMValueRef desc
[4];
1051 desc
[1] = LLVMConstInt(ctx
->i32
,
1052 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1053 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1054 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1056 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1059 static LLVMValueRef
fetch_input_tcs(
1060 struct lp_build_tgsi_context
*bld_base
,
1061 const struct tgsi_full_src_register
*reg
,
1062 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1064 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1065 LLVMValueRef dw_addr
, stride
;
1066 unsigned swizzle
= swizzle_in
& 0xffff;
1067 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1068 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1069 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1071 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1074 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1076 LLVMValueRef vertex_index
,
1077 LLVMValueRef param_index
,
1078 unsigned const_index
,
1080 unsigned driver_location
,
1082 unsigned num_components
,
1087 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1088 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1089 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1090 LLVMValueRef dw_addr
, stride
;
1092 driver_location
= driver_location
/ 4;
1095 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1096 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1100 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1102 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1103 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1108 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1114 names
= info
->input_semantic_name
;
1115 indices
= info
->input_semantic_index
;
1117 names
= info
->output_semantic_name
;
1118 indices
= info
->output_semantic_index
;
1121 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1122 vertex_index
, param_index
,
1127 LLVMValueRef value
[4];
1128 for (unsigned i
= 0; i
< num_components
; i
++) {
1129 unsigned offset
= i
;
1130 if (llvm_type_is_64bit(ctx
, type
))
1133 offset
+= component
;
1134 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1137 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1140 static LLVMValueRef
fetch_output_tcs(
1141 struct lp_build_tgsi_context
*bld_base
,
1142 const struct tgsi_full_src_register
*reg
,
1143 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1145 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1146 LLVMValueRef dw_addr
, stride
;
1147 unsigned swizzle
= (swizzle_in
& 0xffff);
1149 if (reg
->Register
.Dimension
) {
1150 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1151 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1152 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1154 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1155 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1158 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1161 static LLVMValueRef
fetch_input_tes(
1162 struct lp_build_tgsi_context
*bld_base
,
1163 const struct tgsi_full_src_register
*reg
,
1164 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1166 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1167 LLVMValueRef base
, addr
;
1168 unsigned swizzle
= (swizzle_in
& 0xffff);
1170 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1171 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1173 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1174 ctx
->tess_offchip_ring
, base
, addr
, true);
1177 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1179 LLVMValueRef vertex_index
,
1180 LLVMValueRef param_index
,
1181 unsigned const_index
,
1183 unsigned driver_location
,
1185 unsigned num_components
,
1190 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1191 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1192 LLVMValueRef base
, addr
;
1194 driver_location
= driver_location
/ 4;
1196 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1199 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1202 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1203 param_index
, driver_location
,
1204 info
->input_semantic_name
,
1205 info
->input_semantic_index
,
1208 /* TODO: This will generate rather ordinary llvm code, although it
1209 * should be easy for the optimiser to fix up. In future we might want
1210 * to refactor buffer_load(), but for now this maximises code sharing
1211 * between the NIR and TGSI backends.
1213 LLVMValueRef value
[4];
1214 for (unsigned i
= 0; i
< num_components
; i
++) {
1215 unsigned offset
= i
;
1216 if (llvm_type_is_64bit(ctx
, type
)) {
1219 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1222 driver_location
+ 1,
1223 info
->input_semantic_name
,
1224 info
->input_semantic_index
,
1228 offset
= offset
% 4;
1231 offset
+= component
;
1232 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1233 ctx
->tess_offchip_ring
, base
, addr
, true);
1236 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1239 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1240 const struct tgsi_full_instruction
*inst
,
1241 const struct tgsi_opcode_info
*info
,
1243 LLVMValueRef dst
[4])
1245 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1246 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1247 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1248 unsigned chan_index
;
1249 LLVMValueRef dw_addr
, stride
;
1250 LLVMValueRef buffer
, base
, buf_addr
;
1251 LLVMValueRef values
[4];
1252 bool skip_lds_store
;
1253 bool is_tess_factor
= false, is_tess_inner
= false;
1255 /* Only handle per-patch and per-vertex outputs here.
1256 * Vectors will be lowered to scalars and this function will be called again.
1258 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1259 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1260 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1264 if (reg
->Register
.Dimension
) {
1265 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1266 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1267 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1268 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1270 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1271 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1272 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1274 if (!reg
->Register
.Indirect
) {
1275 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1277 /* Always write tess factors into LDS for the TCS epilog. */
1278 if (name
== TGSI_SEMANTIC_TESSINNER
||
1279 name
== TGSI_SEMANTIC_TESSOUTER
) {
1280 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1281 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1282 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1283 is_tess_factor
= true;
1284 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1289 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1291 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1292 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1294 uint32_t writemask
= reg
->Register
.WriteMask
;
1296 chan_index
= u_bit_scan(&writemask
);
1297 LLVMValueRef value
= dst
[chan_index
];
1299 if (inst
->Instruction
.Saturate
)
1300 value
= ac_build_clamp(&ctx
->ac
, value
);
1302 /* Skip LDS stores if there is no LDS read of this output. */
1303 if (!skip_lds_store
)
1304 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1306 value
= ac_to_integer(&ctx
->ac
, value
);
1307 values
[chan_index
] = value
;
1309 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1310 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1312 4 * chan_index
, ac_glc
);
1315 /* Write tess factors into VGPRs for the epilog. */
1316 if (is_tess_factor
&&
1317 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1318 if (!is_tess_inner
) {
1319 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1320 ctx
->invoc0_tess_factors
[chan_index
]);
1321 } else if (chan_index
< 2) {
1322 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1323 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1328 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1329 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1331 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1336 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1337 const struct nir_variable
*var
,
1338 LLVMValueRef vertex_index
,
1339 LLVMValueRef param_index
,
1340 unsigned const_index
,
1344 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1345 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1346 const unsigned component
= var
->data
.location_frac
;
1347 const bool is_patch
= var
->data
.patch
;
1348 unsigned driver_location
= var
->data
.driver_location
;
1349 LLVMValueRef dw_addr
, stride
;
1350 LLVMValueRef buffer
, base
, addr
;
1351 LLVMValueRef values
[8];
1352 bool skip_lds_store
;
1353 bool is_tess_factor
= false, is_tess_inner
= false;
1355 driver_location
= driver_location
/ 4;
1357 bool is_const
= !param_index
;
1359 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1362 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1363 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1364 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1365 vertex_index
, param_index
,
1367 info
->output_semantic_name
,
1368 info
->output_semantic_index
,
1371 skip_lds_store
= !info
->reads_pervertex_outputs
;
1373 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1374 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1375 vertex_index
, param_index
,
1377 info
->output_semantic_name
,
1378 info
->output_semantic_index
,
1381 skip_lds_store
= !info
->reads_perpatch_outputs
;
1383 if (is_const
&& const_index
== 0) {
1384 int name
= info
->output_semantic_name
[driver_location
];
1386 /* Always write tess factors into LDS for the TCS epilog. */
1387 if (name
== TGSI_SEMANTIC_TESSINNER
||
1388 name
== TGSI_SEMANTIC_TESSOUTER
) {
1389 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1390 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1391 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1392 is_tess_factor
= true;
1393 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1398 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1400 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1402 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1403 param_index
, driver_location
,
1404 info
->output_semantic_name
,
1405 info
->output_semantic_index
,
1408 for (unsigned chan
= 0; chan
< 8; chan
++) {
1409 if (!(writemask
& (1 << chan
)))
1411 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1413 unsigned buffer_store_offset
= chan
% 4;
1415 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1418 driver_location
+ 1,
1419 info
->output_semantic_name
,
1420 info
->output_semantic_index
,
1424 /* Skip LDS stores if there is no LDS read of this output. */
1425 if (!skip_lds_store
)
1426 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1428 value
= ac_to_integer(&ctx
->ac
, value
);
1429 values
[chan
] = value
;
1431 if (writemask
!= 0xF && !is_tess_factor
) {
1432 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1434 4 * buffer_store_offset
,
1438 /* Write tess factors into VGPRs for the epilog. */
1439 if (is_tess_factor
&&
1440 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1441 if (!is_tess_inner
) {
1442 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1443 ctx
->invoc0_tess_factors
[chan
]);
1444 } else if (chan
< 2) {
1445 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1446 ctx
->invoc0_tess_factors
[4 + chan
]);
1451 if (writemask
== 0xF && !is_tess_factor
) {
1452 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1454 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1459 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1460 unsigned input_index
,
1461 unsigned vtx_offset_param
,
1465 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1466 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1467 struct si_shader
*shader
= ctx
->shader
;
1468 LLVMValueRef vtx_offset
, soffset
;
1469 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1470 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1471 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1475 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1477 /* GFX9 has the ESGS ring in LDS. */
1478 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1479 unsigned index
= vtx_offset_param
;
1481 switch (index
/ 2) {
1483 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx01_offset
,
1484 index
% 2 ? 16 : 0, 16);
1487 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx23_offset
,
1488 index
% 2 ? 16 : 0, 16);
1491 vtx_offset
= si_unpack_param(ctx
, ctx
->gs_vtx45_offset
,
1492 index
% 2 ? 16 : 0, 16);
1499 unsigned offset
= param
* 4 + swizzle
;
1500 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1501 LLVMConstInt(ctx
->i32
, offset
, false), "");
1503 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1504 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1505 if (llvm_type_is_64bit(ctx
, type
)) {
1506 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1507 &ctx
->ac
.i32_1
, 1, "");
1508 LLVMValueRef values
[2] = {
1510 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1512 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1514 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1517 /* GFX6: input load from the ESGS ring in memory. */
1518 if (swizzle
== ~0) {
1519 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1521 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1522 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1525 return ac_build_gather_values(&ctx
->ac
, values
,
1529 /* Get the vertex offset parameter on GFX6. */
1530 LLVMValueRef gs_vtx_offset
= ac_get_arg(&ctx
->ac
,
1531 ctx
->gs_vtx_offset
[vtx_offset_param
]);
1533 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1534 LLVMConstInt(ctx
->i32
, 4, 0), "");
1536 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1538 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1539 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1540 if (llvm_type_is_64bit(ctx
, type
)) {
1541 LLVMValueRef value2
;
1542 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1544 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1545 ctx
->i32_0
, vtx_offset
, soffset
,
1546 0, ac_glc
, true, false);
1547 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1549 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1552 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1554 unsigned driver_location
,
1556 unsigned num_components
,
1557 unsigned vertex_index
,
1558 unsigned const_index
,
1561 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1563 LLVMValueRef value
[4];
1564 for (unsigned i
= 0; i
< num_components
; i
++) {
1565 unsigned offset
= i
;
1566 if (llvm_type_is_64bit(ctx
, type
))
1569 offset
+= component
;
1570 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4 + const_index
,
1571 vertex_index
, type
, offset
);
1574 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1577 static LLVMValueRef
fetch_input_gs(
1578 struct lp_build_tgsi_context
*bld_base
,
1579 const struct tgsi_full_src_register
*reg
,
1580 enum tgsi_opcode_type type
,
1581 unsigned swizzle_in
)
1583 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1584 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1585 unsigned swizzle
= swizzle_in
& 0xffff;
1587 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1588 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1589 return si_get_primitive_id(ctx
, swizzle
);
1591 if (!reg
->Register
.Dimension
)
1594 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1595 reg
->Dimension
.Index
,
1596 tgsi2llvmtype(bld_base
, type
),
1600 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1602 switch (interpolate
) {
1603 case TGSI_INTERPOLATE_CONSTANT
:
1606 case TGSI_INTERPOLATE_LINEAR
:
1607 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1608 return SI_PARAM_LINEAR_SAMPLE
;
1609 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1610 return SI_PARAM_LINEAR_CENTROID
;
1612 return SI_PARAM_LINEAR_CENTER
;
1614 case TGSI_INTERPOLATE_COLOR
:
1615 case TGSI_INTERPOLATE_PERSPECTIVE
:
1616 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1617 return SI_PARAM_PERSP_SAMPLE
;
1618 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1619 return SI_PARAM_PERSP_CENTROID
;
1621 return SI_PARAM_PERSP_CENTER
;
1624 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1629 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1630 unsigned attr_index
, unsigned chan
,
1631 LLVMValueRef prim_mask
,
1632 LLVMValueRef i
, LLVMValueRef j
)
1635 return ac_build_fs_interp(&ctx
->ac
,
1636 LLVMConstInt(ctx
->i32
, chan
, 0),
1637 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1640 return ac_build_fs_interp_mov(&ctx
->ac
,
1641 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1642 LLVMConstInt(ctx
->i32
, chan
, 0),
1643 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1648 * Interpolate a fragment shader input.
1650 * @param ctx context
1651 * @param input_index index of the input in hardware
1652 * @param semantic_name TGSI_SEMANTIC_*
1653 * @param semantic_index semantic index
1654 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1655 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1656 * @param interp_param interpolation weights (i,j)
1657 * @param prim_mask SI_PARAM_PRIM_MASK
1658 * @param face SI_PARAM_FRONT_FACE
1659 * @param result the return value (4 components)
1661 static void interp_fs_input(struct si_shader_context
*ctx
,
1662 unsigned input_index
,
1663 unsigned semantic_name
,
1664 unsigned semantic_index
,
1665 unsigned num_interp_inputs
,
1666 unsigned colors_read_mask
,
1667 LLVMValueRef interp_param
,
1668 LLVMValueRef prim_mask
,
1670 LLVMValueRef result
[4])
1672 LLVMValueRef i
= NULL
, j
= NULL
;
1675 /* fs.constant returns the param from the middle vertex, so it's not
1676 * really useful for flat shading. It's meant to be used for custom
1677 * interpolation (but the intrinsic can't fetch from the other two
1680 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1681 * to do the right thing. The only reason we use fs.constant is that
1682 * fs.interp cannot be used on integers, because they can be equal
1685 * When interp is false we will use fs.constant or for newer llvm,
1686 * amdgcn.interp.mov.
1688 bool interp
= interp_param
!= NULL
;
1691 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1692 LLVMVectorType(ctx
->f32
, 2), "");
1694 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1696 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1700 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1701 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1702 LLVMValueRef is_face_positive
;
1704 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1705 * otherwise it's at offset "num_inputs".
1707 unsigned back_attr_offset
= num_interp_inputs
;
1708 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1709 back_attr_offset
+= 1;
1711 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1712 face
, ctx
->i32_0
, "");
1714 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1715 LLVMValueRef front
, back
;
1717 front
= si_build_fs_interp(ctx
,
1720 back
= si_build_fs_interp(ctx
,
1721 back_attr_offset
, chan
,
1724 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1730 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1731 result
[0] = si_build_fs_interp(ctx
, input_index
,
1732 0, prim_mask
, i
, j
);
1734 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1735 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1737 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1738 result
[chan
] = si_build_fs_interp(ctx
,
1745 void si_llvm_load_input_fs(
1746 struct si_shader_context
*ctx
,
1747 unsigned input_index
,
1748 LLVMValueRef out
[4])
1750 struct si_shader
*shader
= ctx
->shader
;
1751 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1752 LLVMValueRef main_fn
= ctx
->main_fn
;
1753 LLVMValueRef interp_param
= NULL
;
1754 int interp_param_idx
;
1755 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1756 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1757 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1758 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1760 /* Get colors from input VGPRs (set by the prolog). */
1761 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1762 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1763 unsigned mask
= colors_read
>> (semantic_index
* 4);
1764 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1765 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1766 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1768 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1769 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1770 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1771 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1775 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1776 if (interp_param_idx
== -1)
1778 else if (interp_param_idx
) {
1779 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1782 interp_fs_input(ctx
, input_index
, semantic_name
,
1783 semantic_index
, 0, /* this param is unused */
1784 shader
->selector
->info
.colors_read
, interp_param
,
1785 ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
),
1786 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1790 static void declare_input_fs(
1791 struct si_shader_context
*ctx
,
1792 unsigned input_index
,
1793 const struct tgsi_full_declaration
*decl
,
1794 LLVMValueRef out
[4])
1796 si_llvm_load_input_fs(ctx
, input_index
, out
);
1799 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1801 return si_unpack_param(ctx
, ctx
->args
.ancillary
, 8, 4);
1804 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1806 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1808 /* For non-indexed draws, the base vertex set by the driver
1809 * (for direct draws) or the CP (for indirect draws) is the
1810 * first vertex ID, but GLSL expects 0 to be returned.
1812 LLVMValueRef vs_state
= ac_get_arg(&ctx
->ac
,
1813 ctx
->vs_state_bits
);
1814 LLVMValueRef indexed
;
1816 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1817 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1819 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
,
1820 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
),
1824 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1826 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1828 LLVMValueRef values
[3];
1829 LLVMValueRef result
;
1831 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1833 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1834 unsigned sizes
[3] = {
1835 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1836 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1837 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1840 for (i
= 0; i
< 3; ++i
)
1841 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1843 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1845 result
= ac_get_arg(&ctx
->ac
, ctx
->block_size
);
1852 * Load a dword from a constant buffer.
1854 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1855 LLVMValueRef resource
,
1856 LLVMValueRef offset
)
1858 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1862 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1864 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1865 LLVMValueRef desc
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1866 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1867 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1869 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1870 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1871 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1873 LLVMValueRef pos
[4] = {
1874 buffer_load_const(ctx
, resource
, offset0
),
1875 buffer_load_const(ctx
, resource
, offset1
),
1876 LLVMConstReal(ctx
->f32
, 0),
1877 LLVMConstReal(ctx
->f32
, 0)
1880 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1883 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1885 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1886 return ac_to_integer(&ctx
->ac
, ac_get_arg(&ctx
->ac
, ctx
->args
.sample_coverage
));
1889 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1891 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1892 LLVMValueRef coord
[4] = {
1893 ac_get_arg(&ctx
->ac
, ctx
->tes_u
),
1894 ac_get_arg(&ctx
->ac
, ctx
->tes_v
),
1899 /* For triangles, the vector should be (u, v, 1-u-v). */
1900 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1901 PIPE_PRIM_TRIANGLES
) {
1902 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1903 LLVMBuildFAdd(ctx
->ac
.builder
,
1904 coord
[0], coord
[1], ""), "");
1906 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1909 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1910 unsigned semantic_name
)
1912 LLVMValueRef base
, addr
;
1914 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1916 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
1917 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1918 LLVMConstInt(ctx
->i32
, param
, 0));
1920 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1921 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1925 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1926 unsigned semantic_name
)
1928 LLVMValueRef buf
, slot
, val
[4];
1931 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1932 buf
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
1933 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1934 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1936 for (i
= 0; i
< 4; i
++)
1937 val
[i
] = buffer_load_const(ctx
, buf
,
1938 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1939 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1942 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1943 unsigned varying_id
,
1944 bool load_default_state
)
1946 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1947 unsigned semantic_name
;
1949 if (load_default_state
) {
1950 switch (varying_id
) {
1951 case VARYING_SLOT_TESS_LEVEL_INNER
:
1952 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
1954 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1955 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
1958 unreachable("unknown tess level");
1960 return load_tess_level_default(ctx
, semantic_name
);
1963 switch (varying_id
) {
1964 case VARYING_SLOT_TESS_LEVEL_INNER
:
1965 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1967 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1968 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1971 unreachable("unknown tess level");
1974 return load_tess_level(ctx
, semantic_name
);
1978 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
1980 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1981 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
1982 return si_unpack_param(ctx
, ctx
->tcs_out_lds_layout
, 13, 6);
1983 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
1984 return get_num_tcs_out_vertices(ctx
);
1986 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
1989 void si_load_system_value(struct si_shader_context
*ctx
,
1991 const struct tgsi_full_declaration
*decl
)
1993 LLVMValueRef value
= 0;
1995 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
1997 switch (decl
->Semantic
.Name
) {
1998 case TGSI_SEMANTIC_INSTANCEID
:
1999 value
= ctx
->abi
.instance_id
;
2002 case TGSI_SEMANTIC_VERTEXID
:
2003 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2005 ac_get_arg(&ctx
->ac
, ctx
->args
.base_vertex
), "");
2008 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2009 /* Unused. Clarify the meaning in indexed vs. non-indexed
2010 * draws if this is ever used again. */
2014 case TGSI_SEMANTIC_BASEVERTEX
:
2015 value
= get_base_vertex(&ctx
->abi
);
2018 case TGSI_SEMANTIC_BASEINSTANCE
:
2019 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.start_instance
);
2022 case TGSI_SEMANTIC_DRAWID
:
2023 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.draw_id
);
2026 case TGSI_SEMANTIC_INVOCATIONID
:
2027 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2028 value
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
2029 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2030 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2031 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2032 ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
),
2033 LLVMConstInt(ctx
->i32
, 127, 0), "");
2035 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.gs_invocation_id
);
2038 assert(!"INVOCATIONID not implemented");
2042 case TGSI_SEMANTIC_POSITION
:
2044 LLVMValueRef pos
[4] = {
2045 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2046 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2047 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2048 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2049 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2051 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2055 case TGSI_SEMANTIC_FACE
:
2056 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.front_face
);
2059 case TGSI_SEMANTIC_SAMPLEID
:
2060 value
= si_get_sample_id(ctx
);
2063 case TGSI_SEMANTIC_SAMPLEPOS
: {
2064 LLVMValueRef pos
[4] = {
2065 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2066 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2067 LLVMConstReal(ctx
->f32
, 0),
2068 LLVMConstReal(ctx
->f32
, 0)
2070 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2071 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2072 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2076 case TGSI_SEMANTIC_SAMPLEMASK
:
2077 /* This can only occur with the OpenGL Core profile, which
2078 * doesn't support smoothing.
2080 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2083 case TGSI_SEMANTIC_TESSCOORD
:
2084 value
= si_load_tess_coord(&ctx
->abi
);
2087 case TGSI_SEMANTIC_VERTICESIN
:
2088 value
= si_load_patch_vertices_in(&ctx
->abi
);
2091 case TGSI_SEMANTIC_TESSINNER
:
2092 case TGSI_SEMANTIC_TESSOUTER
:
2093 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2096 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2097 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2098 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2101 case TGSI_SEMANTIC_PRIMID
:
2102 value
= si_get_primitive_id(ctx
, 0);
2105 case TGSI_SEMANTIC_GRID_SIZE
:
2106 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.num_work_groups
);
2109 case TGSI_SEMANTIC_BLOCK_SIZE
:
2110 value
= get_block_size(&ctx
->abi
);
2113 case TGSI_SEMANTIC_BLOCK_ID
:
2115 LLVMValueRef values
[3];
2117 for (int i
= 0; i
< 3; i
++) {
2118 values
[i
] = ctx
->i32_0
;
2119 if (ctx
->args
.workgroup_ids
[i
].used
) {
2120 values
[i
] = ac_get_arg(&ctx
->ac
, ctx
->args
.workgroup_ids
[i
]);
2123 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2127 case TGSI_SEMANTIC_THREAD_ID
:
2128 value
= ac_get_arg(&ctx
->ac
, ctx
->args
.local_invocation_ids
);
2131 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2132 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2135 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2136 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2139 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2140 value
= ac_get_thread_id(&ctx
->ac
);
2143 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2145 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2146 if (ctx
->ac
.wave_size
== 64)
2147 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2148 value
= LLVMBuildShl(ctx
->ac
.builder
,
2149 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2150 if (ctx
->ac
.wave_size
== 32)
2151 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2152 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2156 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2157 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2158 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2159 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2161 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2162 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2163 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2164 /* All bits set except LSB */
2165 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2168 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2170 if (ctx
->ac
.wave_size
== 64)
2171 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2172 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2173 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2174 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2175 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2176 if (ctx
->ac
.wave_size
== 32)
2177 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2178 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2182 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2183 value
= ac_get_arg(&ctx
->ac
, ctx
->cs_user_data
);
2187 assert(!"unknown system value");
2191 ctx
->system_values
[index
] = value
;
2194 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2196 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2197 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2199 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2202 assert(!ctx
->ac
.lds
);
2204 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2205 LLVMArrayType(ctx
->i8
, lds_size
),
2208 LLVMSetAlignment(var
, 64 * 1024);
2210 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2213 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2214 const struct tgsi_full_declaration
*decl
)
2216 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2217 assert(decl
->Range
.First
== decl
->Range
.Last
);
2219 si_declare_compute_memory(ctx
);
2222 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2225 ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2226 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2228 /* Do the bounds checking with a descriptor, because
2229 * doing computation and manual bounds checking of 64-bit
2230 * addresses generates horrible VALU code with very high
2231 * VGPR usage and very low SIMD occupancy.
2233 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2235 LLVMValueRef desc0
, desc1
;
2237 desc1
= LLVMConstInt(ctx
->i32
,
2238 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2240 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2241 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2242 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2243 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2245 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2246 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2247 S_008F0C_OOB_SELECT(3) |
2248 S_008F0C_RESOURCE_LEVEL(1);
2250 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2251 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2253 LLVMValueRef desc_elems
[] = {
2256 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2257 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2260 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2263 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2265 LLVMValueRef list_ptr
= ac_get_arg(&ctx
->ac
,
2266 ctx
->const_and_shader_buffers
);
2268 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2269 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2272 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2274 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2275 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2277 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2279 if (sel
->info
.const_buffers_declared
== 1 &&
2280 sel
->info
.shader_buffers_declared
== 0) {
2281 return load_const_buffer_desc_fast_path(ctx
);
2284 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2285 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2286 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2288 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2292 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2294 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2295 LLVMValueRef rsrc_ptr
= ac_get_arg(&ctx
->ac
,
2296 ctx
->const_and_shader_buffers
);
2298 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2299 index
= LLVMBuildSub(ctx
->ac
.builder
,
2300 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2303 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2306 static LLVMValueRef
fetch_constant(
2307 struct lp_build_tgsi_context
*bld_base
,
2308 const struct tgsi_full_src_register
*reg
,
2309 enum tgsi_opcode_type type
,
2310 unsigned swizzle_in
)
2312 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2313 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2314 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2316 unsigned swizzle
= swizzle_in
& 0xffff;
2318 LLVMValueRef addr
, bufp
;
2320 if (swizzle_in
== LP_CHAN_ALL
) {
2322 LLVMValueRef values
[4];
2323 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2324 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2326 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2329 /* Split 64-bit loads. */
2330 if (tgsi_type_is_64bit(type
)) {
2331 LLVMValueRef lo
, hi
;
2333 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2334 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2335 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2339 idx
= reg
->Register
.Index
* 4 + swizzle
;
2340 if (reg
->Register
.Indirect
) {
2341 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2343 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2346 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2347 if (sel
->info
.const_buffers_declared
== 1 &&
2348 sel
->info
.shader_buffers_declared
== 0) {
2349 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2350 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2351 return bitcast(bld_base
, type
, result
);
2354 assert(reg
->Register
.Dimension
);
2355 buf
= reg
->Dimension
.Index
;
2357 if (reg
->Dimension
.Indirect
) {
2358 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->const_and_shader_buffers
);
2360 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2361 reg
->Dimension
.Index
,
2362 ctx
->num_const_buffers
);
2363 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2364 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2365 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2367 bufp
= load_const_buffer_desc(ctx
, buf
);
2369 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2372 /* Initialize arguments for the shader export intrinsic */
2373 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2374 LLVMValueRef
*values
,
2376 struct ac_export_args
*args
)
2378 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2379 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2381 bool is_int8
, is_int10
;
2383 /* Default is 0xf. Adjusted below depending on the format. */
2384 args
->enabled_channels
= 0xf; /* writemask */
2386 /* Specify whether the EXEC mask represents the valid mask */
2387 args
->valid_mask
= 0;
2389 /* Specify whether this is the last export */
2392 /* Specify the target we are exporting */
2393 args
->target
= target
;
2395 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2396 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2397 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2398 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2400 assert(cbuf
>= 0 && cbuf
< 8);
2401 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2402 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2403 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2406 args
->compr
= false;
2407 args
->out
[0] = f32undef
;
2408 args
->out
[1] = f32undef
;
2409 args
->out
[2] = f32undef
;
2410 args
->out
[3] = f32undef
;
2412 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2413 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2414 unsigned bits
, bool hi
) = NULL
;
2416 switch (spi_shader_col_format
) {
2417 case V_028714_SPI_SHADER_ZERO
:
2418 args
->enabled_channels
= 0; /* writemask */
2419 args
->target
= V_008DFC_SQ_EXP_NULL
;
2422 case V_028714_SPI_SHADER_32_R
:
2423 args
->enabled_channels
= 1; /* writemask */
2424 args
->out
[0] = values
[0];
2427 case V_028714_SPI_SHADER_32_GR
:
2428 args
->enabled_channels
= 0x3; /* writemask */
2429 args
->out
[0] = values
[0];
2430 args
->out
[1] = values
[1];
2433 case V_028714_SPI_SHADER_32_AR
:
2434 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2435 args
->enabled_channels
= 0x3; /* writemask */
2436 args
->out
[0] = values
[0];
2437 args
->out
[1] = values
[3];
2439 args
->enabled_channels
= 0x9; /* writemask */
2440 args
->out
[0] = values
[0];
2441 args
->out
[3] = values
[3];
2445 case V_028714_SPI_SHADER_FP16_ABGR
:
2446 packf
= ac_build_cvt_pkrtz_f16
;
2449 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2450 packf
= ac_build_cvt_pknorm_u16
;
2453 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2454 packf
= ac_build_cvt_pknorm_i16
;
2457 case V_028714_SPI_SHADER_UINT16_ABGR
:
2458 packi
= ac_build_cvt_pk_u16
;
2461 case V_028714_SPI_SHADER_SINT16_ABGR
:
2462 packi
= ac_build_cvt_pk_i16
;
2465 case V_028714_SPI_SHADER_32_ABGR
:
2466 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2470 /* Pack f16 or norm_i16/u16. */
2472 for (chan
= 0; chan
< 2; chan
++) {
2473 LLVMValueRef pack_args
[2] = {
2475 values
[2 * chan
+ 1]
2477 LLVMValueRef packed
;
2479 packed
= packf(&ctx
->ac
, pack_args
);
2480 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2482 args
->compr
= 1; /* COMPR flag */
2486 for (chan
= 0; chan
< 2; chan
++) {
2487 LLVMValueRef pack_args
[2] = {
2488 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2489 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2491 LLVMValueRef packed
;
2493 packed
= packi(&ctx
->ac
, pack_args
,
2494 is_int8
? 8 : is_int10
? 10 : 16,
2496 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2498 args
->compr
= 1; /* COMPR flag */
2502 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2505 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2507 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2508 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2509 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2510 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2511 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2512 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2513 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2514 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2516 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2519 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2520 SI_PARAM_ALPHA_REF
);
2521 LLVMValueRef alpha_pass
=
2522 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2523 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2525 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2529 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2531 unsigned samplemask_param
)
2533 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2534 LLVMValueRef coverage
;
2536 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2537 coverage
= LLVMGetParam(ctx
->main_fn
,
2539 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2541 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2543 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2545 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2548 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2549 LLVMConstReal(ctx
->f32
,
2550 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2552 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2555 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2556 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2560 unsigned const_chan
;
2561 LLVMValueRef base_elt
;
2562 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
2563 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2564 SI_VS_CONST_CLIP_PLANES
, 0);
2565 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2567 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2568 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2573 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2575 /* Compute dot products of position and user clip plane vectors */
2576 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2577 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2579 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2580 const_chan
) * 4, 0);
2581 base_elt
= buffer_load_const(ctx
, const_resource
,
2583 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2584 out_elts
[const_chan
], args
->out
[chan
]);
2588 args
->enabled_channels
= 0xf;
2589 args
->valid_mask
= 0;
2591 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2596 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2600 if (so
->num_outputs
)
2601 fprintf(stderr
, "STREAMOUT\n");
2603 for (i
= 0; i
< so
->num_outputs
; i
++) {
2604 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2605 so
->output
[i
].start_component
;
2606 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2607 i
, so
->output
[i
].output_buffer
,
2608 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2609 so
->output
[i
].register_index
,
2610 mask
& 1 ? "x" : "",
2611 mask
& 2 ? "y" : "",
2612 mask
& 4 ? "z" : "",
2613 mask
& 8 ? "w" : "");
2617 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2618 LLVMValueRef
const *so_buffers
,
2619 LLVMValueRef
const *so_write_offsets
,
2620 struct pipe_stream_output
*stream_out
,
2621 struct si_shader_output_values
*shader_out
)
2623 unsigned buf_idx
= stream_out
->output_buffer
;
2624 unsigned start
= stream_out
->start_component
;
2625 unsigned num_comps
= stream_out
->num_components
;
2626 LLVMValueRef out
[4];
2628 assert(num_comps
&& num_comps
<= 4);
2629 if (!num_comps
|| num_comps
> 4)
2632 /* Load the output as int. */
2633 for (int j
= 0; j
< num_comps
; j
++) {
2634 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2636 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2639 /* Pack the output. */
2640 LLVMValueRef vdata
= NULL
;
2642 switch (num_comps
) {
2643 case 1: /* as i32 */
2646 case 2: /* as v2i32 */
2647 case 3: /* as v3i32 */
2648 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2649 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2652 /* as v4i32 (aligned to 4) */
2653 out
[3] = LLVMGetUndef(ctx
->i32
);
2655 case 4: /* as v4i32 */
2656 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2660 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2662 so_write_offsets
[buf_idx
],
2664 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
);
2668 * Write streamout data to buffers for vertex stream @p stream (different
2669 * vertex streams can occur for GS copy shaders).
2671 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2672 struct si_shader_output_values
*outputs
,
2673 unsigned noutput
, unsigned stream
)
2675 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2676 struct pipe_stream_output_info
*so
= &sel
->so
;
2677 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2680 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2681 LLVMValueRef so_vtx_count
=
2682 si_unpack_param(ctx
, ctx
->streamout_config
, 16, 7);
2684 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2686 /* can_emit = tid < so_vtx_count; */
2687 LLVMValueRef can_emit
=
2688 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2690 /* Emit the streamout code conditionally. This actually avoids
2691 * out-of-bounds buffer access. The hw tells us via the SGPR
2692 * (so_vtx_count) which threads are allowed to emit streamout data. */
2693 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2695 /* The buffer offset is computed as follows:
2696 * ByteOffset = streamout_offset[buffer_id]*4 +
2697 * (streamout_write_index + thread_id)*stride[buffer_id] +
2701 LLVMValueRef so_write_index
=
2702 ac_get_arg(&ctx
->ac
,
2703 ctx
->streamout_write_index
);
2705 /* Compute (streamout_write_index + thread_id). */
2706 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2708 /* Load the descriptor and compute the write offset for each
2709 * enabled buffer. */
2710 LLVMValueRef so_write_offset
[4] = {};
2711 LLVMValueRef so_buffers
[4];
2712 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
,
2715 for (i
= 0; i
< 4; i
++) {
2719 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2720 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2722 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2724 LLVMValueRef so_offset
= ac_get_arg(&ctx
->ac
,
2725 ctx
->streamout_offset
[i
]);
2726 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2728 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2729 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2733 /* Write streamout data. */
2734 for (i
= 0; i
< so
->num_outputs
; i
++) {
2735 unsigned reg
= so
->output
[i
].register_index
;
2740 if (stream
!= so
->output
[i
].stream
)
2743 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2744 &so
->output
[i
], &outputs
[reg
]);
2747 ac_build_endif(&ctx
->ac
, 6501);
2750 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2751 LLVMValueRef
*values
)
2753 struct ac_export_args args
;
2755 si_llvm_init_export_args(ctx
, values
,
2756 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2757 ac_build_export(&ctx
->ac
, &args
);
2760 static void si_build_param_exports(struct si_shader_context
*ctx
,
2761 struct si_shader_output_values
*outputs
,
2764 struct si_shader
*shader
= ctx
->shader
;
2765 unsigned param_count
= 0;
2767 for (unsigned i
= 0; i
< noutput
; i
++) {
2768 unsigned semantic_name
= outputs
[i
].semantic_name
;
2769 unsigned semantic_index
= outputs
[i
].semantic_index
;
2771 if (outputs
[i
].vertex_stream
[0] != 0 &&
2772 outputs
[i
].vertex_stream
[1] != 0 &&
2773 outputs
[i
].vertex_stream
[2] != 0 &&
2774 outputs
[i
].vertex_stream
[3] != 0)
2777 switch (semantic_name
) {
2778 case TGSI_SEMANTIC_LAYER
:
2779 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2780 case TGSI_SEMANTIC_CLIPDIST
:
2781 case TGSI_SEMANTIC_COLOR
:
2782 case TGSI_SEMANTIC_BCOLOR
:
2783 case TGSI_SEMANTIC_PRIMID
:
2784 case TGSI_SEMANTIC_FOG
:
2785 case TGSI_SEMANTIC_TEXCOORD
:
2786 case TGSI_SEMANTIC_GENERIC
:
2792 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2793 semantic_index
< SI_MAX_IO_GENERIC
) &&
2794 shader
->key
.opt
.kill_outputs
&
2795 (1ull << si_shader_io_get_unique_index(semantic_name
,
2796 semantic_index
, true)))
2799 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2801 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2802 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2805 shader
->info
.nr_param_exports
= param_count
;
2809 * Vertex color clamping.
2811 * This uses a state constant loaded in a user data SGPR and
2812 * an IF statement is added that clamps all colors if the constant
2815 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2816 struct si_shader_output_values
*outputs
,
2819 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2820 bool has_colors
= false;
2822 /* Store original colors to alloca variables. */
2823 for (unsigned i
= 0; i
< noutput
; i
++) {
2824 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2825 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2828 for (unsigned j
= 0; j
< 4; j
++) {
2829 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2830 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2838 /* The state is in the first bit of the user SGPR. */
2839 LLVMValueRef cond
= ac_get_arg(&ctx
->ac
, ctx
->vs_state_bits
);
2840 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2842 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2844 /* Store clamped colors to alloca variables within the conditional block. */
2845 for (unsigned i
= 0; i
< noutput
; i
++) {
2846 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2847 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2850 for (unsigned j
= 0; j
< 4; j
++) {
2851 LLVMBuildStore(ctx
->ac
.builder
,
2852 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2856 ac_build_endif(&ctx
->ac
, 6502);
2858 /* Load clamped colors */
2859 for (unsigned i
= 0; i
< noutput
; i
++) {
2860 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2861 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2864 for (unsigned j
= 0; j
< 4; j
++) {
2865 outputs
[i
].values
[j
] =
2866 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2871 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2872 * (position and parameter data only).
2874 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2875 struct si_shader_output_values
*outputs
,
2878 struct si_shader
*shader
= ctx
->shader
;
2879 struct ac_export_args pos_args
[4] = {};
2880 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2884 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2886 /* Build position exports. */
2887 for (i
= 0; i
< noutput
; i
++) {
2888 switch (outputs
[i
].semantic_name
) {
2889 case TGSI_SEMANTIC_POSITION
:
2890 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2891 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2893 case TGSI_SEMANTIC_PSIZE
:
2894 psize_value
= outputs
[i
].values
[0];
2896 case TGSI_SEMANTIC_LAYER
:
2897 layer_value
= outputs
[i
].values
[0];
2899 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2900 viewport_index_value
= outputs
[i
].values
[0];
2902 case TGSI_SEMANTIC_EDGEFLAG
:
2903 edgeflag_value
= outputs
[i
].values
[0];
2905 case TGSI_SEMANTIC_CLIPDIST
:
2906 if (!shader
->key
.opt
.clip_disable
) {
2907 unsigned index
= 2 + outputs
[i
].semantic_index
;
2908 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2909 V_008DFC_SQ_EXP_POS
+ index
,
2913 case TGSI_SEMANTIC_CLIPVERTEX
:
2914 if (!shader
->key
.opt
.clip_disable
) {
2915 si_llvm_emit_clipvertex(ctx
, pos_args
,
2922 /* We need to add the position output manually if it's missing. */
2923 if (!pos_args
[0].out
[0]) {
2924 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2925 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2926 pos_args
[0].done
= 0; /* last export? */
2927 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2928 pos_args
[0].compr
= 0; /* COMPR flag */
2929 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2930 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2931 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2932 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2935 bool pos_writes_edgeflag
= shader
->selector
->info
.writes_edgeflag
&&
2936 !shader
->key
.as_ngg
;
2938 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2939 if (shader
->selector
->info
.writes_psize
||
2940 pos_writes_edgeflag
||
2941 shader
->selector
->info
.writes_viewport_index
||
2942 shader
->selector
->info
.writes_layer
) {
2943 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2944 (pos_writes_edgeflag
<< 1) |
2945 (shader
->selector
->info
.writes_layer
<< 2);
2947 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2948 pos_args
[1].done
= 0; /* last export? */
2949 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2950 pos_args
[1].compr
= 0; /* COMPR flag */
2951 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2952 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2953 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2954 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2956 if (shader
->selector
->info
.writes_psize
)
2957 pos_args
[1].out
[0] = psize_value
;
2959 if (pos_writes_edgeflag
) {
2960 /* The output is a float, but the hw expects an integer
2961 * with the first bit containing the edge flag. */
2962 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2965 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2969 /* The LLVM intrinsic expects a float. */
2970 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2973 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2974 /* GFX9 has the layer in out.z[10:0] and the viewport
2975 * index in out.z[19:16].
2977 if (shader
->selector
->info
.writes_layer
)
2978 pos_args
[1].out
[2] = layer_value
;
2980 if (shader
->selector
->info
.writes_viewport_index
) {
2981 LLVMValueRef v
= viewport_index_value
;
2983 v
= ac_to_integer(&ctx
->ac
, v
);
2984 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
2985 LLVMConstInt(ctx
->i32
, 16, 0), "");
2986 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
2987 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
2988 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
2989 pos_args
[1].enabled_channels
|= 1 << 2;
2992 if (shader
->selector
->info
.writes_layer
)
2993 pos_args
[1].out
[2] = layer_value
;
2995 if (shader
->selector
->info
.writes_viewport_index
) {
2996 pos_args
[1].out
[3] = viewport_index_value
;
2997 pos_args
[1].enabled_channels
|= 1 << 3;
3002 for (i
= 0; i
< 4; i
++)
3003 if (pos_args
[i
].out
[0])
3004 shader
->info
.nr_pos_exports
++;
3006 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3007 * Setting valid_mask=1 prevents it and has no other effect.
3009 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3010 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3011 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3012 pos_args
[0].valid_mask
= 1;
3015 for (i
= 0; i
< 4; i
++) {
3016 if (!pos_args
[i
].out
[0])
3019 /* Specify the target we are exporting */
3020 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3022 if (pos_idx
== shader
->info
.nr_pos_exports
)
3023 /* Specify that this is the last export */
3024 pos_args
[i
].done
= 1;
3026 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3029 /* Build parameter exports. */
3030 si_build_param_exports(ctx
, outputs
, noutput
);
3034 * Forward all outputs from the vertex shader to the TES. This is only used
3035 * for the fixed function TCS.
3037 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3039 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3040 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3041 LLVMValueRef lds_vertex_stride
, lds_base
;
3044 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3045 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3046 buffer_offset
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3048 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3049 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3050 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3053 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3055 unsigned i
= u_bit_scan64(&inputs
);
3057 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3058 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3061 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3062 get_rel_patch_id(ctx
),
3064 LLVMConstInt(ctx
->i32
, i
, 0));
3066 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3068 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3069 buffer_offset
, 0, ac_glc
);
3073 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3074 LLVMValueRef rel_patch_id
,
3075 LLVMValueRef invocation_id
,
3076 LLVMValueRef tcs_out_current_patch_data_offset
,
3077 LLVMValueRef invoc0_tf_outer
[4],
3078 LLVMValueRef invoc0_tf_inner
[2])
3080 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3081 struct si_shader
*shader
= ctx
->shader
;
3082 unsigned tess_inner_index
, tess_outer_index
;
3083 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3084 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3085 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3087 /* Add a barrier before loading tess factors from LDS. */
3088 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3089 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3091 /* Do this only for invocation 0, because the tess levels are per-patch,
3094 * This can't jump, because invocation 0 executes this. It should
3095 * at least mask out the loads and stores for other invocations.
3097 ac_build_ifcc(&ctx
->ac
,
3098 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3099 invocation_id
, ctx
->i32_0
, ""), 6503);
3101 /* Determine the layout of one tess factor element in the buffer. */
3102 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3103 case PIPE_PRIM_LINES
:
3104 stride
= 2; /* 2 dwords, 1 vec2 store */
3108 case PIPE_PRIM_TRIANGLES
:
3109 stride
= 4; /* 4 dwords, 1 vec4 store */
3113 case PIPE_PRIM_QUADS
:
3114 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3123 for (i
= 0; i
< 4; i
++) {
3124 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3125 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3128 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3129 /* Tess factors are in VGPRs. */
3130 for (i
= 0; i
< outer_comps
; i
++)
3131 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3132 for (i
= 0; i
< inner_comps
; i
++)
3133 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3135 /* Load tess_inner and tess_outer from LDS.
3136 * Any invocation can write them, so we can't get them from a temporary.
3138 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3139 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3141 lds_base
= tcs_out_current_patch_data_offset
;
3142 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3143 LLVMConstInt(ctx
->i32
,
3144 tess_inner_index
* 4, 0), "");
3145 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3146 LLVMConstInt(ctx
->i32
,
3147 tess_outer_index
* 4, 0), "");
3149 for (i
= 0; i
< outer_comps
; i
++) {
3151 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3153 for (i
= 0; i
< inner_comps
; i
++) {
3154 inner
[i
] = out
[outer_comps
+i
] =
3155 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3159 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3160 /* For isolines, the hardware expects tess factors in the
3161 * reverse order from what GLSL / TGSI specify.
3163 LLVMValueRef tmp
= out
[0];
3168 /* Convert the outputs to vectors for stores. */
3169 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3173 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3175 /* Get the buffer. */
3176 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3178 /* Get the offset. */
3179 tf_base
= ac_get_arg(&ctx
->ac
,
3180 ctx
->tcs_factor_offset
);
3181 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3182 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3184 ac_build_ifcc(&ctx
->ac
,
3185 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3186 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3188 /* Store the dynamic HS control word. */
3190 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3191 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3192 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3193 1, ctx
->i32_0
, tf_base
,
3198 ac_build_endif(&ctx
->ac
, 6504);
3200 /* Store the tessellation factors. */
3201 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3202 MIN2(stride
, 4), byteoffset
, tf_base
,
3206 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3207 stride
- 4, byteoffset
, tf_base
,
3210 /* Store the tess factors into the offchip buffer if TES reads them. */
3211 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3212 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3213 LLVMValueRef tf_inner_offset
;
3214 unsigned param_outer
, param_inner
;
3216 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3217 base
= ac_get_arg(&ctx
->ac
, ctx
->tcs_offchip_offset
);
3219 param_outer
= si_shader_io_get_unique_index_patch(
3220 TGSI_SEMANTIC_TESSOUTER
, 0);
3221 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3222 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3224 unsigned outer_vec_size
=
3225 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3226 outer_comps
: util_next_power_of_two(outer_comps
);
3227 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3229 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3230 outer_comps
, tf_outer_offset
,
3233 param_inner
= si_shader_io_get_unique_index_patch(
3234 TGSI_SEMANTIC_TESSINNER
, 0);
3235 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3236 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3238 inner_vec
= inner_comps
== 1 ? inner
[0] :
3239 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3240 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3241 inner_comps
, tf_inner_offset
,
3246 ac_build_endif(&ctx
->ac
, 6503);
3250 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3251 struct ac_arg param
, unsigned return_index
)
3253 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3254 ac_get_arg(&ctx
->ac
, param
),
3259 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3260 struct ac_arg param
, unsigned return_index
)
3262 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3263 LLVMValueRef p
= ac_get_arg(&ctx
->ac
, param
);
3265 return LLVMBuildInsertValue(builder
, ret
,
3266 ac_to_float(&ctx
->ac
, p
),
3271 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3272 struct ac_arg param
, unsigned return_index
)
3274 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3275 LLVMValueRef ptr
= ac_get_arg(&ctx
->ac
, param
);
3276 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3277 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3280 /* This only writes the tessellation factor levels. */
3281 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3282 unsigned max_outputs
,
3283 LLVMValueRef
*addrs
)
3285 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3286 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3287 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3288 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3290 si_copy_tcs_inputs(bld_base
);
3292 rel_patch_id
= get_rel_patch_id(ctx
);
3293 invocation_id
= si_unpack_param(ctx
, ctx
->args
.tcs_rel_ids
, 8, 5);
3294 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3296 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3297 LLVMBasicBlockRef blocks
[2] = {
3298 LLVMGetInsertBlock(builder
),
3299 ctx
->merged_wrap_if_entry_block
3301 LLVMValueRef values
[2];
3303 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3305 values
[0] = rel_patch_id
;
3306 values
[1] = LLVMGetUndef(ctx
->i32
);
3307 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3309 values
[0] = tf_lds_offset
;
3310 values
[1] = LLVMGetUndef(ctx
->i32
);
3311 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3313 values
[0] = invocation_id
;
3314 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3315 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3318 /* Return epilog parameters from this function. */
3319 LLVMValueRef ret
= ctx
->return_value
;
3322 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3323 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3324 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3325 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3326 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3327 /* Tess offchip and tess factor offsets are at the beginning. */
3328 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3329 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3330 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3332 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3333 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3334 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3335 GFX6_SGPR_TCS_OUT_LAYOUT
);
3336 /* Tess offchip and tess factor offsets are after user SGPRs. */
3337 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
,
3338 GFX6_TCS_NUM_USER_SGPR
);
3339 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
,
3340 GFX6_TCS_NUM_USER_SGPR
+ 1);
3341 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3345 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3346 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3347 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3349 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3350 * the invocation_id output does not alias the tcs_rel_ids input,
3351 * which saves a V_MOV on gfx9.
3355 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3356 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3358 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3359 vgpr
++; /* skip the tess factor LDS offset */
3360 for (unsigned i
= 0; i
< 6; i
++) {
3361 LLVMValueRef value
=
3362 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3363 value
= ac_to_float(&ctx
->ac
, value
);
3364 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3367 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3369 ctx
->return_value
= ret
;
3372 /* Pass TCS inputs from LS to TCS on GFX9. */
3373 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3375 LLVMValueRef ret
= ctx
->return_value
;
3377 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3378 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3379 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_offset
, 2);
3380 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3381 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_factor_offset
, 4);
3382 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3384 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3385 8 + SI_SGPR_RW_BUFFERS
);
3386 ret
= si_insert_input_ptr(ctx
, ret
,
3387 ctx
->bindless_samplers_and_images
,
3388 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3390 ret
= si_insert_input_ret(ctx
, ret
, ctx
->vs_state_bits
,
3391 8 + SI_SGPR_VS_STATE_BITS
);
3393 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_offchip_layout
,
3394 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3395 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_offsets
,
3396 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3397 ret
= si_insert_input_ret(ctx
, ret
, ctx
->tcs_out_lds_layout
,
3398 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3400 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3401 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3402 ac_to_float(&ctx
->ac
,
3403 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_patch_id
)),
3405 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3406 ac_to_float(&ctx
->ac
,
3407 ac_get_arg(&ctx
->ac
, ctx
->args
.tcs_rel_ids
)),
3409 ctx
->return_value
= ret
;
3412 /* Pass GS inputs from ES to GS on GFX9. */
3413 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3415 LLVMValueRef ret
= ctx
->return_value
;
3417 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_const_and_shader_buffers
, 0);
3418 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->other_samplers_and_images
, 1);
3419 if (ctx
->shader
->key
.as_ngg
)
3420 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->gs_tg_info
, 2);
3422 ret
= si_insert_input_ret(ctx
, ret
, ctx
->gs2vs_offset
, 2);
3423 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_wave_info
, 3);
3424 ret
= si_insert_input_ret(ctx
, ret
, ctx
->merged_scratch_offset
, 5);
3426 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->rw_buffers
,
3427 8 + SI_SGPR_RW_BUFFERS
);
3428 ret
= si_insert_input_ptr(ctx
, ret
,
3429 ctx
->bindless_samplers_and_images
,
3430 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3431 if (ctx
->screen
->use_ngg
) {
3432 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->vs_state_bits
,
3433 8 + SI_SGPR_VS_STATE_BITS
);
3437 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3438 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3440 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3442 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx01_offset
, vgpr
++);
3443 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx23_offset
, vgpr
++);
3444 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_prim_id
, vgpr
++);
3445 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->args
.gs_invocation_id
, vgpr
++);
3446 ret
= si_insert_input_ret_float(ctx
, ret
, ctx
->gs_vtx45_offset
, vgpr
++);
3447 ctx
->return_value
= ret
;
3450 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3451 unsigned max_outputs
,
3452 LLVMValueRef
*addrs
)
3454 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3455 struct si_shader
*shader
= ctx
->shader
;
3456 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3458 LLVMValueRef vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->rel_auto_id
);
3459 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3460 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3461 vertex_dw_stride
, "");
3463 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3464 * its inputs from it. */
3465 for (i
= 0; i
< info
->num_outputs
; i
++) {
3466 unsigned name
= info
->output_semantic_name
[i
];
3467 unsigned index
= info
->output_semantic_index
[i
];
3469 /* The ARB_shader_viewport_layer_array spec contains the
3472 * 2) What happens if gl_ViewportIndex or gl_Layer is
3473 * written in the vertex shader and a geometry shader is
3476 * RESOLVED: The value written by the last vertex processing
3477 * stage is used. If the last vertex processing stage
3478 * (vertex, tessellation evaluation or geometry) does not
3479 * statically assign to gl_ViewportIndex or gl_Layer, index
3480 * or layer zero is assumed.
3482 * So writes to those outputs in VS-as-LS are simply ignored.
3484 if (name
== TGSI_SEMANTIC_LAYER
||
3485 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3488 int param
= si_shader_io_get_unique_index(name
, index
, false);
3489 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3490 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3492 for (chan
= 0; chan
< 4; chan
++) {
3493 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3496 lshs_lds_store(ctx
, chan
, dw_addr
,
3497 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3501 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3502 si_set_ls_return_value_for_tcs(ctx
);
3505 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3506 unsigned max_outputs
,
3507 LLVMValueRef
*addrs
)
3509 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3510 struct si_shader
*es
= ctx
->shader
;
3511 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3512 LLVMValueRef lds_base
= NULL
;
3516 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3517 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3518 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3519 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 24, 4);
3520 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3521 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3522 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3523 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3524 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3527 for (i
= 0; i
< info
->num_outputs
; i
++) {
3530 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3531 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3534 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3535 info
->output_semantic_index
[i
], false);
3537 for (chan
= 0; chan
< 4; chan
++) {
3538 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3541 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3542 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3544 /* GFX9 has the ESGS ring in LDS. */
3545 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3546 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3547 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3548 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3552 ac_build_buffer_store_dword(&ctx
->ac
,
3555 ac_get_arg(&ctx
->ac
, ctx
->es2gs_offset
),
3556 (4 * param
+ chan
) * 4,
3557 ac_glc
| ac_slc
| ac_swizzled
);
3561 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3562 si_set_es_return_value_for_gs(ctx
);
3565 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3567 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3568 return si_unpack_param(ctx
, ctx
->merged_wave_info
, 16, 8);
3570 return ac_get_arg(&ctx
->ac
, ctx
->gs_wave_id
);
3573 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3575 if (ctx
->shader
->key
.as_ngg
) {
3576 gfx10_ngg_gs_emit_epilogue(ctx
);
3580 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3581 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3583 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3584 si_get_gs_wave_id(ctx
));
3586 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3587 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3590 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3591 unsigned max_outputs
,
3592 LLVMValueRef
*addrs
)
3594 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3595 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3597 assert(info
->num_outputs
<= max_outputs
);
3599 emit_gs_epilogue(ctx
);
3602 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3604 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3605 emit_gs_epilogue(ctx
);
3608 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3609 unsigned max_outputs
,
3610 LLVMValueRef
*addrs
)
3612 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3613 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3614 struct si_shader_output_values
*outputs
= NULL
;
3617 assert(!ctx
->shader
->is_gs_copy_shader
);
3618 assert(info
->num_outputs
<= max_outputs
);
3620 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3622 for (i
= 0; i
< info
->num_outputs
; i
++) {
3623 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3624 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3626 for (j
= 0; j
< 4; j
++) {
3627 outputs
[i
].values
[j
] =
3628 LLVMBuildLoad(ctx
->ac
.builder
,
3631 outputs
[i
].vertex_stream
[j
] =
3632 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3636 if (!ctx
->screen
->use_ngg_streamout
&&
3637 ctx
->shader
->selector
->so
.num_outputs
)
3638 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3640 /* Export PrimitiveID. */
3641 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3642 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3643 outputs
[i
].semantic_index
= 0;
3644 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3645 for (j
= 1; j
< 4; j
++)
3646 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3648 memset(outputs
[i
].vertex_stream
, 0,
3649 sizeof(outputs
[i
].vertex_stream
));
3653 si_llvm_export_vs(ctx
, outputs
, i
);
3657 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3658 unsigned max_outputs
,
3659 LLVMValueRef
*addrs
)
3661 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3662 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3663 LLVMValueRef pos
[4] = {};
3665 assert(info
->num_outputs
<= max_outputs
);
3667 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3668 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3671 for (unsigned chan
= 0; chan
< 4; chan
++)
3672 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3675 assert(pos
[0] != NULL
);
3677 /* Return the position output. */
3678 LLVMValueRef ret
= ctx
->return_value
;
3679 for (unsigned chan
= 0; chan
< 4; chan
++)
3680 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3681 ctx
->return_value
= ret
;
3684 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3686 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3688 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3689 &ctx
->outputs
[0][0]);
3692 struct si_ps_exports
{
3694 struct ac_export_args args
[10];
3697 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3698 LLVMValueRef depth
, LLVMValueRef stencil
,
3699 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3701 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3702 struct ac_export_args args
;
3704 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3706 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3709 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3710 LLVMValueRef
*color
, unsigned index
,
3711 unsigned samplemask_param
,
3712 bool is_last
, struct si_ps_exports
*exp
)
3714 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3718 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3719 for (i
= 0; i
< 4; i
++)
3720 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3723 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3724 color
[3] = ctx
->ac
.f32_1
;
3728 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3729 si_alpha_test(bld_base
, color
[3]);
3731 /* Line & polygon smoothing */
3732 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3733 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3736 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3737 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3738 struct ac_export_args args
[8];
3741 /* Get the export arguments, also find out what the last one is. */
3742 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3743 si_llvm_init_export_args(ctx
, color
,
3744 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3745 if (args
[c
].enabled_channels
)
3749 /* Emit all exports. */
3750 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3751 if (is_last
&& last
== c
) {
3752 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3753 args
[c
].done
= 1; /* DONE bit */
3754 } else if (!args
[c
].enabled_channels
)
3755 continue; /* unnecessary NULL export */
3757 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3760 struct ac_export_args args
;
3763 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3766 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3767 args
.done
= 1; /* DONE bit */
3768 } else if (!args
.enabled_channels
)
3769 return; /* unnecessary NULL export */
3771 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3775 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3776 struct si_ps_exports
*exp
)
3778 for (unsigned i
= 0; i
< exp
->num
; i
++)
3779 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3783 * Return PS outputs in this order:
3785 * v[0:3] = color0.xyzw
3786 * v[4:7] = color1.xyzw
3791 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3793 * The alpha-ref SGPR is returned via its original location.
3795 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3796 unsigned max_outputs
,
3797 LLVMValueRef
*addrs
)
3799 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3800 struct si_shader
*shader
= ctx
->shader
;
3801 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3802 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3803 unsigned i
, j
, first_vgpr
, vgpr
;
3805 LLVMValueRef color
[8][4] = {};
3806 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3809 if (ctx
->postponed_kill
)
3810 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3812 /* Read the output values. */
3813 for (i
= 0; i
< info
->num_outputs
; i
++) {
3814 unsigned semantic_name
= info
->output_semantic_name
[i
];
3815 unsigned semantic_index
= info
->output_semantic_index
[i
];
3817 switch (semantic_name
) {
3818 case TGSI_SEMANTIC_COLOR
:
3819 assert(semantic_index
< 8);
3820 for (j
= 0; j
< 4; j
++) {
3821 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3822 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3823 color
[semantic_index
][j
] = result
;
3826 case TGSI_SEMANTIC_POSITION
:
3827 depth
= LLVMBuildLoad(builder
,
3828 addrs
[4 * i
+ 2], "");
3830 case TGSI_SEMANTIC_STENCIL
:
3831 stencil
= LLVMBuildLoad(builder
,
3832 addrs
[4 * i
+ 1], "");
3834 case TGSI_SEMANTIC_SAMPLEMASK
:
3835 samplemask
= LLVMBuildLoad(builder
,
3836 addrs
[4 * i
+ 0], "");
3839 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3844 /* Fill the return structure. */
3845 ret
= ctx
->return_value
;
3848 ret
= LLVMBuildInsertValue(builder
, ret
,
3849 ac_to_integer(&ctx
->ac
,
3850 LLVMGetParam(ctx
->main_fn
,
3851 SI_PARAM_ALPHA_REF
)),
3852 SI_SGPR_ALPHA_REF
, "");
3855 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3856 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3860 for (j
= 0; j
< 4; j
++)
3861 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3864 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3866 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3868 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3870 /* Add the input sample mask for smoothing at the end. */
3871 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3872 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3873 ret
= LLVMBuildInsertValue(builder
, ret
,
3874 LLVMGetParam(ctx
->main_fn
,
3875 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3877 ctx
->return_value
= ret
;
3880 static void membar_emit(
3881 const struct lp_build_tgsi_action
*action
,
3882 struct lp_build_tgsi_context
*bld_base
,
3883 struct lp_build_emit_data
*emit_data
)
3885 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3886 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3887 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3888 unsigned wait_flags
= 0;
3890 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3891 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3893 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3894 TGSI_MEMBAR_SHADER_BUFFER
|
3895 TGSI_MEMBAR_SHADER_IMAGE
))
3896 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3898 if (flags
& TGSI_MEMBAR_SHARED
)
3899 wait_flags
|= AC_WAIT_LGKM
;
3901 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3904 static void clock_emit(
3905 const struct lp_build_tgsi_action
*action
,
3906 struct lp_build_tgsi_context
*bld_base
,
3907 struct lp_build_emit_data
*emit_data
)
3909 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3910 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3912 emit_data
->output
[0] =
3913 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3914 emit_data
->output
[1] =
3915 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3918 static void si_llvm_emit_ddxy(
3919 const struct lp_build_tgsi_action
*action
,
3920 struct lp_build_tgsi_context
*bld_base
,
3921 struct lp_build_emit_data
*emit_data
)
3923 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3924 unsigned opcode
= emit_data
->info
->opcode
;
3929 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3930 mask
= AC_TID_MASK_LEFT
;
3931 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3932 mask
= AC_TID_MASK_TOP
;
3934 mask
= AC_TID_MASK_TOP_LEFT
;
3936 /* for DDX we want to next X pixel, DDY next Y pixel. */
3937 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3939 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3940 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3941 emit_data
->output
[emit_data
->chan
] = val
;
3944 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3945 struct lp_build_tgsi_context
*bld_base
,
3946 struct lp_build_emit_data
*emit_data
)
3948 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3949 struct si_shader
*shader
= ctx
->shader
;
3950 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3951 LLVMValueRef interp_param
;
3952 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3953 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3954 int input_base
, input_array_size
;
3957 LLVMValueRef prim_mask
= ac_get_arg(&ctx
->ac
, ctx
->args
.prim_mask
);
3958 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3959 int interp_param_idx
;
3963 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3964 /* offset is in second src, first two channels */
3965 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3967 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3969 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3970 LLVMValueRef sample_position
;
3971 LLVMValueRef sample_id
;
3972 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3974 /* fetch sample ID, then fetch its sample position,
3975 * and place into first two channels.
3977 sample_id
= lp_build_emit_fetch(bld_base
,
3978 emit_data
->inst
, 1, TGSI_CHAN_X
);
3979 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3981 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3982 * Language 4.50 spec says about interpolateAtSample:
3984 * "Returns the value of the input interpolant variable at
3985 * the location of sample number sample. If multisample
3986 * buffers are not available, the input variable will be
3987 * evaluated at the center of the pixel. If sample sample
3988 * does not exist, the position used to interpolate the
3989 * input variable is undefined."
3991 * This means that sample_id values outside of the valid are
3992 * in fact valid input, and the usual mechanism for loading the
3993 * sample position doesn't work.
3995 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
3996 LLVMValueRef center
[4] = {
3997 LLVMConstReal(ctx
->f32
, 0.5),
3998 LLVMConstReal(ctx
->f32
, 0.5),
4003 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4005 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4008 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4011 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4012 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4014 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4017 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4019 if (input
->Register
.Indirect
) {
4020 unsigned array_id
= input
->Indirect
.ArrayID
;
4023 input_base
= info
->input_array_first
[array_id
];
4024 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4026 input_base
= inst
->Src
[0].Register
.Index
;
4027 input_array_size
= info
->num_inputs
- input_base
;
4030 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4031 1, input
->Register
.Index
- input_base
);
4033 input_base
= inst
->Src
[0].Register
.Index
;
4034 input_array_size
= 1;
4035 array_idx
= ctx
->i32_0
;
4038 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4040 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4041 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4042 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4044 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4046 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4047 if (interp_param_idx
== -1)
4049 else if (interp_param_idx
)
4050 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4052 interp_param
= NULL
;
4054 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4055 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4056 LLVMValueRef ij_out
[2];
4057 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4060 * take the I then J parameters, and the DDX/Y for it, and
4061 * calculate the IJ inputs for the interpolator.
4062 * temp1 = ddx * offset/sample.x + I;
4063 * interp_param.I = ddy * offset/sample.y + temp1;
4064 * temp1 = ddx * offset/sample.x + J;
4065 * interp_param.J = ddy * offset/sample.y + temp1;
4067 for (i
= 0; i
< 2; i
++) {
4068 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4069 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4070 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4071 ddxy_out
, ix_ll
, "");
4072 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4073 ddxy_out
, iy_ll
, "");
4074 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4075 interp_param
, ix_ll
, "");
4078 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4080 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4081 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4083 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4087 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4089 for (chan
= 0; chan
< 4; chan
++) {
4090 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4091 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4093 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4094 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4097 i
= LLVMBuildExtractElement(
4098 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4099 j
= LLVMBuildExtractElement(
4100 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4102 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4105 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4106 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4109 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4110 ctx
->ac
.builder
, gather
, array_idx
, "");
4114 static void vote_all_emit(
4115 const struct lp_build_tgsi_action
*action
,
4116 struct lp_build_tgsi_context
*bld_base
,
4117 struct lp_build_emit_data
*emit_data
)
4119 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4121 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4122 emit_data
->output
[emit_data
->chan
] =
4123 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4126 static void vote_any_emit(
4127 const struct lp_build_tgsi_action
*action
,
4128 struct lp_build_tgsi_context
*bld_base
,
4129 struct lp_build_emit_data
*emit_data
)
4131 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4133 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4134 emit_data
->output
[emit_data
->chan
] =
4135 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4138 static void vote_eq_emit(
4139 const struct lp_build_tgsi_action
*action
,
4140 struct lp_build_tgsi_context
*bld_base
,
4141 struct lp_build_emit_data
*emit_data
)
4143 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4145 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4146 emit_data
->output
[emit_data
->chan
] =
4147 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4150 static void ballot_emit(
4151 const struct lp_build_tgsi_action
*action
,
4152 struct lp_build_tgsi_context
*bld_base
,
4153 struct lp_build_emit_data
*emit_data
)
4155 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4156 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4159 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4160 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4162 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4164 if (ctx
->ac
.wave_size
== 32) {
4165 emit_data
->output
[1] = ctx
->i32_0
;
4167 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4168 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4172 static void read_lane_emit(
4173 const struct lp_build_tgsi_action
*action
,
4174 struct lp_build_tgsi_context
*bld_base
,
4175 struct lp_build_emit_data
*emit_data
)
4177 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4179 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4180 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4181 0, emit_data
->src_chan
);
4183 /* Always read the source invocation (= lane) from the X channel. */
4184 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4186 emit_data
->arg_count
= 2;
4189 /* We currently have no other way to prevent LLVM from lifting the icmp
4190 * calls to a dominating basic block.
4192 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4194 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4195 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4197 emit_data
->output
[emit_data
->chan
] =
4198 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4199 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4200 AC_FUNC_ATTR_READNONE
|
4201 AC_FUNC_ATTR_CONVERGENT
);
4204 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4205 struct lp_build_emit_data
*emit_data
)
4207 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4208 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4212 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4214 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4215 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4219 /* Emit one vertex from the geometry shader */
4220 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4222 LLVMValueRef
*addrs
)
4224 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4226 if (ctx
->shader
->key
.as_ngg
) {
4227 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4231 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4232 struct si_shader
*shader
= ctx
->shader
;
4233 LLVMValueRef soffset
= ac_get_arg(&ctx
->ac
, ctx
->gs2vs_offset
);
4234 LLVMValueRef gs_next_vertex
;
4235 LLVMValueRef can_emit
;
4236 unsigned chan
, offset
;
4239 /* Write vertex attribute values to GSVS ring */
4240 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4241 ctx
->gs_next_vertex
[stream
],
4244 /* If this thread has already emitted the declared maximum number of
4245 * vertices, skip the write: excessive vertex emissions are not
4246 * supposed to have any effect.
4248 * If the shader has no writes to memory, kill it instead. This skips
4249 * further memory loads and may allow LLVM to skip to the end
4252 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4253 LLVMConstInt(ctx
->i32
,
4254 shader
->selector
->gs_max_out_vertices
, 0), "");
4256 bool use_kill
= !info
->writes_memory
;
4258 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4260 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4264 for (i
= 0; i
< info
->num_outputs
; i
++) {
4265 for (chan
= 0; chan
< 4; chan
++) {
4266 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4267 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4270 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4271 LLVMValueRef voffset
=
4272 LLVMConstInt(ctx
->i32
, offset
*
4273 shader
->selector
->gs_max_out_vertices
, 0);
4276 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4277 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4278 LLVMConstInt(ctx
->i32
, 4, 0), "");
4280 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4282 ac_build_buffer_store_dword(&ctx
->ac
,
4283 ctx
->gsvs_ring
[stream
],
4285 voffset
, soffset
, 0,
4286 ac_glc
| ac_slc
| ac_swizzled
);
4290 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4291 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4293 /* Signal vertex emission if vertex data was written. */
4295 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4296 si_get_gs_wave_id(ctx
));
4300 ac_build_endif(&ctx
->ac
, 6505);
4303 /* Emit one vertex from the geometry shader */
4304 static void si_tgsi_emit_vertex(
4305 const struct lp_build_tgsi_action
*action
,
4306 struct lp_build_tgsi_context
*bld_base
,
4307 struct lp_build_emit_data
*emit_data
)
4309 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4310 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4312 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4315 /* Cut one primitive from the geometry shader */
4316 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4319 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4321 if (ctx
->shader
->key
.as_ngg
) {
4322 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4326 /* Signal primitive cut */
4327 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4328 si_get_gs_wave_id(ctx
));
4331 /* Cut one primitive from the geometry shader */
4332 static void si_tgsi_emit_primitive(
4333 const struct lp_build_tgsi_action
*action
,
4334 struct lp_build_tgsi_context
*bld_base
,
4335 struct lp_build_emit_data
*emit_data
)
4337 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4339 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4342 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4343 struct lp_build_tgsi_context
*bld_base
,
4344 struct lp_build_emit_data
*emit_data
)
4346 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4348 /* GFX6 only (thanks to a hw bug workaround):
4349 * The real barrier instruction isn’t needed, because an entire patch
4350 * always fits into a single wave.
4352 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4353 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4354 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4358 ac_build_s_barrier(&ctx
->ac
);
4361 void si_create_function(struct si_shader_context
*ctx
,
4363 LLVMTypeRef
*returns
, unsigned num_returns
,
4364 unsigned max_workgroup_size
)
4366 si_llvm_create_func(ctx
, name
, returns
, num_returns
);
4367 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4369 if (ctx
->screen
->info
.address32_hi
) {
4370 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4371 "amdgpu-32bit-address-high-bits",
4372 ctx
->screen
->info
.address32_hi
);
4375 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4376 "no-signed-zeros-fp-math",
4379 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4382 static void declare_streamout_params(struct si_shader_context
*ctx
,
4383 struct pipe_stream_output_info
*so
)
4385 if (ctx
->screen
->use_ngg_streamout
) {
4386 if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
4387 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4391 /* Streamout SGPRs. */
4392 if (so
->num_outputs
) {
4393 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_config
);
4394 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_write_index
);
4395 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4396 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4399 /* A streamout buffer offset is loaded if the stride is non-zero. */
4400 for (int i
= 0; i
< 4; i
++) {
4404 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->streamout_offset
[i
]);
4408 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4410 switch (shader
->selector
->type
) {
4411 case PIPE_SHADER_VERTEX
:
4412 case PIPE_SHADER_TESS_EVAL
:
4413 return shader
->key
.as_ngg
? 128 : 0;
4415 case PIPE_SHADER_TESS_CTRL
:
4416 /* Return this so that LLVM doesn't remove s_barrier
4417 * instructions on chips where we use s_barrier. */
4418 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4420 case PIPE_SHADER_GEOMETRY
:
4421 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4423 case PIPE_SHADER_COMPUTE
:
4424 break; /* see below */
4430 const unsigned *properties
= shader
->selector
->info
.properties
;
4431 unsigned max_work_group_size
=
4432 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4433 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4434 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4436 if (!max_work_group_size
) {
4437 /* This is a variable group size compute shader,
4438 * compile it for the maximum possible group size.
4440 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4442 return max_work_group_size
;
4445 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4448 enum ac_arg_type const_shader_buf_type
;
4450 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4451 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4452 const_shader_buf_type
= AC_ARG_CONST_FLOAT_PTR
;
4454 const_shader_buf_type
= AC_ARG_CONST_DESC_PTR
;
4456 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, const_shader_buf_type
,
4457 assign_params
? &ctx
->const_and_shader_buffers
:
4458 &ctx
->other_const_and_shader_buffers
);
4461 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4464 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4465 assign_params
? &ctx
->samplers_and_images
:
4466 &ctx
->other_samplers_and_images
);
4469 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4472 declare_const_and_shader_buffers(ctx
, assign_params
);
4473 declare_samplers_and_images(ctx
, assign_params
);
4476 static void declare_global_desc_pointers(struct si_shader_context
*ctx
)
4478 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4480 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_IMAGE_PTR
,
4481 &ctx
->bindless_samplers_and_images
);
4484 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
)
4486 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4487 if (!ctx
->shader
->is_gs_copy_shader
) {
4488 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.base_vertex
);
4489 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.start_instance
);
4490 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.draw_id
);
4494 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4495 unsigned *num_prolog_vgprs
)
4497 struct si_shader
*shader
= ctx
->shader
;
4499 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.vertex_id
);
4500 if (shader
->key
.as_ls
) {
4501 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->rel_auto_id
);
4502 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4503 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4504 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4506 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4507 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4509 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4510 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* user VGPR */
4511 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4512 &ctx
->vs_prim_id
); /* user vgpr or PrimID (legacy) */
4513 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4515 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.instance_id
);
4516 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vs_prim_id
);
4517 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4520 if (!shader
->is_gs_copy_shader
) {
4521 /* Vertex load indices. */
4522 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->vertex_index0
);
4523 for (unsigned i
= 1; i
< shader
->selector
->info
.num_inputs
; i
++)
4524 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
4525 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4529 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4530 unsigned vs_blit_property
)
4532 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4533 &ctx
->vs_blit_inputs
); /* i16 x1, y1 */
4534 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* i16 x1, y1 */
4535 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* depth */
4537 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4538 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color0 */
4539 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color1 */
4540 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color2 */
4541 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* color3 */
4542 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4543 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x1 */
4544 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y1 */
4545 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.x2 */
4546 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.y2 */
4547 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.z */
4548 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
, NULL
); /* texcoord.w */
4552 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
)
4554 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_u
);
4555 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, &ctx
->tes_v
);
4556 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->tes_rel_patch_id
);
4557 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tes_patch_id
);
4561 /* Convenient merged shader definitions. */
4562 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4563 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4566 static void add_arg_checked(struct ac_shader_args
*args
,
4567 enum ac_arg_regfile file
,
4568 unsigned registers
, enum ac_arg_type type
,
4572 assert(args
->arg_count
== idx
);
4573 ac_add_arg(args
, file
, registers
, type
, arg
);
4576 static void create_function(struct si_shader_context
*ctx
)
4578 struct si_shader
*shader
= ctx
->shader
;
4579 LLVMTypeRef returns
[16+32*4];
4580 unsigned i
, num_return_sgprs
;
4581 unsigned num_returns
= 0;
4582 unsigned num_prolog_vgprs
= 0;
4583 unsigned type
= ctx
->type
;
4584 unsigned vs_blit_property
=
4585 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4587 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
4589 /* Set MERGED shaders. */
4590 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4591 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4592 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4593 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4594 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4598 case PIPE_SHADER_VERTEX
:
4599 declare_global_desc_pointers(ctx
);
4601 if (vs_blit_property
) {
4602 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4605 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4609 declare_per_stage_desc_pointers(ctx
, true);
4610 declare_vs_specific_input_sgprs(ctx
);
4611 if (!shader
->is_gs_copy_shader
) {
4612 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4613 &ctx
->vertex_buffers
);
4616 if (shader
->key
.as_es
) {
4617 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4618 &ctx
->es2gs_offset
);
4619 } else if (shader
->key
.as_ls
) {
4620 /* no extra parameters */
4622 /* The locations of the other parameters are assigned dynamically. */
4623 declare_streamout_params(ctx
, &shader
->selector
->so
);
4627 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4630 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4631 for (i
= 0; i
< 4; i
++)
4632 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4636 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4637 declare_global_desc_pointers(ctx
);
4638 declare_per_stage_desc_pointers(ctx
, true);
4639 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4640 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4641 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4642 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4643 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4644 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4647 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4648 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4650 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4651 * placed after the user SGPRs.
4653 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4654 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4655 for (i
= 0; i
< 11; i
++)
4656 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4659 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4660 /* Merged stages have 8 system SGPRs at the beginning. */
4661 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4662 declare_per_stage_desc_pointers(ctx
,
4663 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4664 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4665 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4666 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_factor_offset
);
4667 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4668 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4669 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused */
4671 declare_global_desc_pointers(ctx
);
4672 declare_per_stage_desc_pointers(ctx
,
4673 ctx
->type
== PIPE_SHADER_VERTEX
);
4674 declare_vs_specific_input_sgprs(ctx
);
4676 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4677 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_offsets
);
4678 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_out_lds_layout
);
4679 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
, &ctx
->vertex_buffers
);
4681 /* VGPRs (first TCS, then VS) */
4682 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_patch_id
);
4683 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.tcs_rel_ids
);
4685 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4686 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4688 /* LS return values are inputs to the TCS main shader part. */
4689 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4690 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4691 for (i
= 0; i
< 2; i
++)
4692 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4694 /* TCS return values are inputs to the TCS epilog.
4696 * param_tcs_offchip_offset, param_tcs_factor_offset,
4697 * param_tcs_offchip_layout, and param_rw_buffers
4698 * should be passed to the epilog.
4700 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4701 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4702 for (i
= 0; i
< 11; i
++)
4703 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4707 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4708 /* Merged stages have 8 system SGPRs at the beginning. */
4709 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4710 declare_per_stage_desc_pointers(ctx
,
4711 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4713 if (ctx
->shader
->key
.as_ngg
)
4714 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_tg_info
);
4716 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4718 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_wave_info
);
4719 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4720 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->merged_scratch_offset
);
4721 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4722 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4724 declare_global_desc_pointers(ctx
);
4725 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4726 declare_per_stage_desc_pointers(ctx
,
4727 (ctx
->type
== PIPE_SHADER_VERTEX
||
4728 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4731 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4732 if (vs_blit_property
)
4733 declare_vs_blit_inputs(ctx
, vs_blit_property
);
4735 declare_vs_specific_input_sgprs(ctx
);
4737 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4738 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4739 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4740 /* Declare as many input SGPRs as the VS has. */
4743 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4744 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_CONST_DESC_PTR
,
4745 &ctx
->vertex_buffers
);
4748 /* VGPRs (first GS, then VS/TES) */
4749 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx01_offset
);
4750 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx23_offset
);
4751 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4752 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4753 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx45_offset
);
4755 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4756 declare_vs_input_vgprs(ctx
, &num_prolog_vgprs
);
4757 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4758 declare_tes_input_vgprs(ctx
);
4761 if (ctx
->shader
->key
.as_es
&&
4762 (ctx
->type
== PIPE_SHADER_VERTEX
||
4763 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4764 unsigned num_user_sgprs
;
4766 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4767 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4769 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4771 /* ES return values are inputs to GS. */
4772 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4773 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4774 for (i
= 0; i
< 5; i
++)
4775 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4779 case PIPE_SHADER_TESS_EVAL
:
4780 declare_global_desc_pointers(ctx
);
4781 declare_per_stage_desc_pointers(ctx
, true);
4782 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->vs_state_bits
);
4783 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_layout
);
4784 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tes_offchip_addr
);
4786 if (shader
->key
.as_es
) {
4787 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4788 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
4789 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->es2gs_offset
);
4791 declare_streamout_params(ctx
, &shader
->selector
->so
);
4792 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->tcs_offchip_offset
);
4796 declare_tes_input_vgprs(ctx
);
4799 case PIPE_SHADER_GEOMETRY
:
4800 declare_global_desc_pointers(ctx
);
4801 declare_per_stage_desc_pointers(ctx
, true);
4802 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs2vs_offset
);
4803 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->gs_wave_id
);
4806 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[0]);
4807 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[1]);
4808 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_prim_id
);
4809 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[2]);
4810 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[3]);
4811 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[4]);
4812 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->gs_vtx_offset
[5]);
4813 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &ctx
->args
.gs_invocation_id
);
4816 case PIPE_SHADER_FRAGMENT
:
4817 declare_global_desc_pointers(ctx
);
4818 declare_per_stage_desc_pointers(ctx
, true);
4819 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
,
4820 SI_PARAM_ALPHA_REF
);
4821 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4822 &ctx
->args
.prim_mask
, SI_PARAM_PRIM_MASK
);
4824 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
, &ctx
->args
.persp_sample
,
4825 SI_PARAM_PERSP_SAMPLE
);
4826 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4827 &ctx
->args
.persp_center
, SI_PARAM_PERSP_CENTER
);
4828 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4829 &ctx
->args
.persp_centroid
, SI_PARAM_PERSP_CENTROID
);
4830 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4831 NULL
, SI_PARAM_PERSP_PULL_MODEL
);
4832 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4833 &ctx
->args
.linear_sample
, SI_PARAM_LINEAR_SAMPLE
);
4834 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4835 &ctx
->args
.linear_center
, SI_PARAM_LINEAR_CENTER
);
4836 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 2, AC_ARG_INT
,
4837 &ctx
->args
.linear_centroid
, SI_PARAM_LINEAR_CENTROID
);
4838 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_FLOAT
,
4839 NULL
, SI_PARAM_LINE_STIPPLE_TEX
);
4840 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4841 &ctx
->args
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4842 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4843 &ctx
->args
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4844 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4845 &ctx
->args
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4846 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4847 &ctx
->args
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4848 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4849 &ctx
->args
.front_face
, SI_PARAM_FRONT_FACE
);
4850 shader
->info
.face_vgpr_index
= 20;
4851 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4852 &ctx
->args
.ancillary
, SI_PARAM_ANCILLARY
);
4853 shader
->info
.ancillary_vgpr_index
= 21;
4854 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
,
4855 &ctx
->args
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4856 add_arg_checked(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
4857 &ctx
->pos_fixed_pt
, SI_PARAM_POS_FIXED_PT
);
4859 /* Color inputs from the prolog. */
4860 if (shader
->selector
->info
.colors_read
) {
4861 unsigned num_color_elements
=
4862 util_bitcount(shader
->selector
->info
.colors_read
);
4864 for (i
= 0; i
< num_color_elements
; i
++)
4865 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
4867 num_prolog_vgprs
+= num_color_elements
;
4870 /* Outputs for the epilog. */
4871 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4874 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4875 shader
->selector
->info
.writes_z
+
4876 shader
->selector
->info
.writes_stencil
+
4877 shader
->selector
->info
.writes_samplemask
+
4878 1 /* SampleMaskIn */;
4880 num_returns
= MAX2(num_returns
,
4882 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4884 for (i
= 0; i
< num_return_sgprs
; i
++)
4885 returns
[i
] = ctx
->i32
;
4886 for (; i
< num_returns
; i
++)
4887 returns
[i
] = ctx
->f32
;
4890 case PIPE_SHADER_COMPUTE
:
4891 declare_global_desc_pointers(ctx
);
4892 declare_per_stage_desc_pointers(ctx
, true);
4893 if (shader
->selector
->info
.uses_grid_size
)
4894 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
,
4895 &ctx
->args
.num_work_groups
);
4896 if (shader
->selector
->info
.uses_block_size
&&
4897 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4898 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 3, AC_ARG_INT
, &ctx
->block_size
);
4900 unsigned cs_user_data_dwords
=
4901 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
4902 if (cs_user_data_dwords
) {
4903 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, cs_user_data_dwords
, AC_ARG_INT
,
4904 &ctx
->cs_user_data
);
4907 /* Hardware SGPRs. */
4908 for (i
= 0; i
< 3; i
++) {
4909 if (shader
->selector
->info
.uses_block_id
[i
]) {
4910 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
4911 &ctx
->args
.workgroup_ids
[i
]);
4914 if (shader
->selector
->info
.uses_subgroup_info
)
4915 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->args
.tg_size
);
4917 /* Hardware VGPRs. */
4918 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 3, AC_ARG_INT
,
4919 &ctx
->args
.local_invocation_ids
);
4922 assert(0 && "unimplemented shader");
4926 si_create_function(ctx
, "main", returns
, num_returns
,
4927 si_get_max_workgroup_size(shader
));
4929 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4930 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4931 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4932 "InitialPSInputAddr",
4933 S_0286D0_PERSP_SAMPLE_ENA(1) |
4934 S_0286D0_PERSP_CENTER_ENA(1) |
4935 S_0286D0_PERSP_CENTROID_ENA(1) |
4936 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4937 S_0286D0_LINEAR_CENTER_ENA(1) |
4938 S_0286D0_LINEAR_CENTROID_ENA(1) |
4939 S_0286D0_FRONT_FACE_ENA(1) |
4940 S_0286D0_ANCILLARY_ENA(1) |
4941 S_0286D0_POS_FIXED_PT_ENA(1));
4944 shader
->info
.num_input_sgprs
= ctx
->args
.num_sgprs_used
;
4945 shader
->info
.num_input_vgprs
= ctx
->args
.num_vgprs_used
;
4947 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
4948 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
4950 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4951 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
4952 /* The LSHS size is not known until draw time, so we append it
4953 * at the end of whatever LDS use there may be in the rest of
4954 * the shader (currently none, unless LLVM decides to do its
4955 * own LDS-based lowering).
4957 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
4958 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4959 "__lds_end", AC_ADDR_SPACE_LDS
);
4960 LLVMSetAlignment(ctx
->ac
.lds
, 256);
4962 ac_declare_lds_as_pointer(&ctx
->ac
);
4966 /* Unlike radv, we override these arguments in the prolog, so to the
4967 * API shader they appear as normal arguments.
4969 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4970 ctx
->abi
.vertex_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.vertex_id
);
4971 ctx
->abi
.instance_id
= ac_get_arg(&ctx
->ac
, ctx
->args
.instance_id
);
4972 } else if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
4973 ctx
->abi
.persp_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.persp_centroid
);
4974 ctx
->abi
.linear_centroid
= ac_get_arg(&ctx
->ac
, ctx
->args
.linear_centroid
);
4978 /* Ensure that the esgs ring is declared.
4980 * We declare it with 64KB alignment as a hint that the
4981 * pointer value will always be 0.
4983 static void declare_esgs_ring(struct si_shader_context
*ctx
)
4988 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
4990 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
4991 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
4994 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
4995 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
4999 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5002 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5004 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5006 LLVMValueRef buf_ptr
= ac_get_arg(&ctx
->ac
, ctx
->rw_buffers
);
5008 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5009 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5011 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5013 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5016 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5018 if (USE_LDS_SYMBOLS
&& LLVM_VERSION_MAJOR
>= 9) {
5019 /* Declare the ESGS ring as an explicit LDS symbol. */
5020 declare_esgs_ring(ctx
);
5022 ac_declare_lds_as_pointer(&ctx
->ac
);
5023 ctx
->esgs_ring
= ctx
->ac
.lds
;
5028 if (ctx
->shader
->is_gs_copy_shader
) {
5029 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5032 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5033 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5034 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5035 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5036 LLVMValueRef base_ring
;
5038 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5040 /* The conceptual layout of the GSVS ring is
5041 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5042 * but the real memory layout is swizzled across
5044 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5046 * Override the buffer descriptor accordingly.
5048 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5049 uint64_t stream_offset
= 0;
5051 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5052 unsigned num_components
;
5054 unsigned num_records
;
5055 LLVMValueRef ring
, tmp
;
5057 num_components
= sel
->info
.num_stream_output_components
[stream
];
5058 if (!num_components
)
5061 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5063 /* Limit on the stride field for <= GFX7. */
5064 assert(stride
< (1 << 14));
5066 num_records
= ctx
->ac
.wave_size
;
5068 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5069 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5070 tmp
= LLVMBuildAdd(builder
, tmp
,
5071 LLVMConstInt(ctx
->i64
,
5072 stream_offset
, 0), "");
5073 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5075 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5076 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5077 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5078 tmp
= LLVMBuildOr(builder
, tmp
,
5079 LLVMConstInt(ctx
->i32
,
5080 S_008F04_STRIDE(stride
) |
5081 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5082 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5083 ring
= LLVMBuildInsertElement(builder
, ring
,
5084 LLVMConstInt(ctx
->i32
, num_records
, 0),
5085 LLVMConstInt(ctx
->i32
, 2, 0), "");
5088 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5089 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5090 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5091 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5092 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5093 S_008F0C_ADD_TID_ENABLE(1);
5095 if (ctx
->ac
.chip_class
>= GFX10
) {
5096 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5097 S_008F0C_OOB_SELECT(2) |
5098 S_008F0C_RESOURCE_LEVEL(1);
5100 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5101 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5102 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5105 ring
= LLVMBuildInsertElement(builder
, ring
,
5106 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5107 LLVMConstInt(ctx
->i32
, 3, 0), "");
5109 ctx
->gsvs_ring
[stream
] = ring
;
5111 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5112 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5116 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5117 LLVMValueRef param_rw_buffers
,
5118 struct ac_arg param_pos_fixed_pt
)
5120 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5121 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5123 /* Use the fixed-point gl_FragCoord input.
5124 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5125 * per coordinate to get the repeating effect.
5127 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5128 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5130 /* Load the buffer descriptor. */
5131 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5132 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5134 /* The stipple pattern is 32x32, each row has 32 bits. */
5135 offset
= LLVMBuildMul(builder
, address
[1],
5136 LLVMConstInt(ctx
->i32
, 4, 0), "");
5137 row
= buffer_load_const(ctx
, desc
, offset
);
5138 row
= ac_to_integer(&ctx
->ac
, row
);
5139 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5140 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5141 ac_build_kill_if_false(&ctx
->ac
, bit
);
5144 /* For the UMR disassembler. */
5145 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5146 #define DEBUGGER_NUM_MARKERS 5
5148 static bool si_shader_binary_open(struct si_screen
*screen
,
5149 struct si_shader
*shader
,
5150 struct ac_rtld_binary
*rtld
)
5152 const struct si_shader_selector
*sel
= shader
->selector
;
5153 const char *part_elfs
[5];
5154 size_t part_sizes
[5];
5155 unsigned num_parts
= 0;
5157 #define add_part(shader_or_part) \
5158 if (shader_or_part) { \
5159 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5160 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5164 add_part(shader
->prolog
);
5165 add_part(shader
->previous_stage
);
5166 add_part(shader
->prolog2
);
5168 add_part(shader
->epilog
);
5172 struct ac_rtld_symbol lds_symbols
[2];
5173 unsigned num_lds_symbols
= 0;
5175 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5176 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5177 /* We add this symbol even on LLVM <= 8 to ensure that
5178 * shader->config.lds_size is set correctly below.
5180 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5181 sym
->name
= "esgs_ring";
5182 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5183 sym
->align
= 64 * 1024;
5186 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5187 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5188 sym
->name
= "ngg_emit";
5189 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5193 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5194 .info
= &screen
->info
,
5196 .halt_at_entry
= screen
->options
.halt_shaders
,
5198 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5199 .wave_size
= si_get_shader_wave_size(shader
),
5200 .num_parts
= num_parts
,
5201 .elf_ptrs
= part_elfs
,
5202 .elf_sizes
= part_sizes
,
5203 .num_shared_lds_symbols
= num_lds_symbols
,
5204 .shared_lds_symbols
= lds_symbols
});
5206 if (rtld
->lds_size
> 0) {
5207 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5208 shader
->config
.lds_size
=
5209 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5215 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5217 struct ac_rtld_binary rtld
;
5218 si_shader_binary_open(screen
, shader
, &rtld
);
5219 return rtld
.exec_size
;
5222 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5224 uint64_t *scratch_va
= data
;
5226 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5227 *value
= (uint32_t)*scratch_va
;
5230 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5231 /* Enable scratch coalescing. */
5232 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5233 S_008F04_SWIZZLE_ENABLE(1);
5240 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5241 uint64_t scratch_va
)
5243 struct ac_rtld_binary binary
;
5244 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5247 si_resource_reference(&shader
->bo
, NULL
);
5248 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5249 sscreen
->info
.cpdma_prefetch_writes_memory
?
5250 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5251 PIPE_USAGE_IMMUTABLE
,
5252 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5258 struct ac_rtld_upload_info u
= {};
5260 u
.get_external_symbol
= si_get_external_symbol
;
5261 u
.cb_data
= &scratch_va
;
5262 u
.rx_va
= shader
->bo
->gpu_address
;
5263 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5264 PIPE_TRANSFER_READ_WRITE
|
5265 PIPE_TRANSFER_UNSYNCHRONIZED
|
5266 RADEON_TRANSFER_TEMPORARY
);
5270 bool ok
= ac_rtld_upload(&u
);
5272 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5273 ac_rtld_close(&binary
);
5278 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5279 const struct si_shader_binary
*binary
,
5280 enum pipe_shader_type shader_type
,
5282 struct pipe_debug_callback
*debug
,
5283 const char *name
, FILE *file
)
5285 struct ac_rtld_binary rtld_binary
;
5287 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5288 .info
= &screen
->info
,
5289 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5290 .wave_size
= wave_size
,
5292 .elf_ptrs
= &binary
->elf_buffer
,
5293 .elf_sizes
= &binary
->elf_size
}))
5299 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5302 if (nbytes
> INT_MAX
)
5305 if (debug
&& debug
->debug_message
) {
5306 /* Very long debug messages are cut off, so send the
5307 * disassembly one line at a time. This causes more
5308 * overhead, but on the plus side it simplifies
5309 * parsing of resulting logs.
5311 pipe_debug_message(debug
, SHADER_INFO
,
5312 "Shader Disassembly Begin");
5315 while (line
< nbytes
) {
5316 int count
= nbytes
- line
;
5317 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5319 count
= nl
- (disasm
+ line
);
5322 pipe_debug_message(debug
, SHADER_INFO
,
5323 "%.*s", count
, disasm
+ line
);
5329 pipe_debug_message(debug
, SHADER_INFO
,
5330 "Shader Disassembly End");
5334 fprintf(file
, "Shader %s disassembly:\n", name
);
5335 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5339 ac_rtld_close(&rtld_binary
);
5342 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5344 struct si_screen
*sscreen
= shader
->selector
->screen
;
5345 struct ac_shader_config
*conf
= &shader
->config
;
5346 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5347 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5348 unsigned lds_per_wave
= 0;
5349 unsigned max_simd_waves
;
5351 max_simd_waves
= sscreen
->info
.max_wave64_per_simd
;
5353 /* Compute LDS usage for PS. */
5354 switch (shader
->selector
->type
) {
5355 case PIPE_SHADER_FRAGMENT
:
5356 /* The minimum usage per wave is (num_inputs * 48). The maximum
5357 * usage is (num_inputs * 48 * 16).
5358 * We can get anything in between and it varies between waves.
5360 * The 48 bytes per input for a single primitive is equal to
5361 * 4 bytes/component * 4 components/input * 3 points.
5363 * Other stages don't know the size at compile time or don't
5364 * allocate LDS per wave, but instead they do it per thread group.
5366 lds_per_wave
= conf
->lds_size
* lds_increment
+
5367 align(num_inputs
* 48, lds_increment
);
5369 case PIPE_SHADER_COMPUTE
:
5370 if (shader
->selector
) {
5371 unsigned max_workgroup_size
=
5372 si_get_max_workgroup_size(shader
);
5373 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5374 DIV_ROUND_UP(max_workgroup_size
,
5375 sscreen
->compute_wave_size
);
5381 /* Compute the per-SIMD wave counts. */
5382 if (conf
->num_sgprs
) {
5384 MIN2(max_simd_waves
,
5385 sscreen
->info
.num_physical_sgprs_per_simd
/ conf
->num_sgprs
);
5388 if (conf
->num_vgprs
) {
5389 /* Always print wave limits as Wave64, so that we can compare
5390 * Wave32 and Wave64 with shader-db fairly. */
5391 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
;
5392 max_simd_waves
= MIN2(max_simd_waves
, max_vgprs
/ conf
->num_vgprs
);
5395 /* LDS is 64KB per CU (4 SIMDs) on GFX6-9, which is 16KB per SIMD (usage above
5396 * 16KB makes some SIMDs unoccupied).
5398 * LDS is 128KB in WGP mode and 64KB in CU mode. Assume the WGP mode is used.
5400 unsigned max_lds_size
= sscreen
->info
.chip_class
>= GFX10
? 128*1024 : 64*1024;
5401 unsigned max_lds_per_simd
= max_lds_size
/ 4;
5403 max_simd_waves
= MIN2(max_simd_waves
, max_lds_per_simd
/ lds_per_wave
);
5405 shader
->info
.max_simd_waves
= max_simd_waves
;
5408 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5409 struct si_shader
*shader
,
5410 struct pipe_debug_callback
*debug
)
5412 const struct ac_shader_config
*conf
= &shader
->config
;
5414 if (screen
->options
.debug_disassembly
)
5415 si_shader_dump_disassembly(screen
, &shader
->binary
,
5416 shader
->selector
->type
,
5417 si_get_shader_wave_size(shader
),
5418 debug
, "main", NULL
);
5420 pipe_debug_message(debug
, SHADER_INFO
,
5421 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5422 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5423 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5424 conf
->num_sgprs
, conf
->num_vgprs
,
5425 si_get_shader_binary_size(screen
, shader
),
5426 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5427 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5428 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5431 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5432 struct si_shader
*shader
,
5434 bool check_debug_option
)
5436 const struct ac_shader_config
*conf
= &shader
->config
;
5438 if (!check_debug_option
||
5439 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5440 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5441 fprintf(file
, "*** SHADER CONFIG ***\n"
5442 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5443 "SPI_PS_INPUT_ENA = 0x%04x\n",
5444 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5447 fprintf(file
, "*** SHADER STATS ***\n"
5450 "Spilled SGPRs: %d\n"
5451 "Spilled VGPRs: %d\n"
5452 "Private memory VGPRs: %d\n"
5453 "Code Size: %d bytes\n"
5455 "Scratch: %d bytes per wave\n"
5457 "********************\n\n\n",
5458 conf
->num_sgprs
, conf
->num_vgprs
,
5459 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5460 shader
->info
.private_mem_vgprs
,
5461 si_get_shader_binary_size(sscreen
, shader
),
5462 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5463 shader
->info
.max_simd_waves
);
5467 const char *si_get_shader_name(const struct si_shader
*shader
)
5469 switch (shader
->selector
->type
) {
5470 case PIPE_SHADER_VERTEX
:
5471 if (shader
->key
.as_es
)
5472 return "Vertex Shader as ES";
5473 else if (shader
->key
.as_ls
)
5474 return "Vertex Shader as LS";
5475 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5476 return "Vertex Shader as Primitive Discard CS";
5477 else if (shader
->key
.as_ngg
)
5478 return "Vertex Shader as ESGS";
5480 return "Vertex Shader as VS";
5481 case PIPE_SHADER_TESS_CTRL
:
5482 return "Tessellation Control Shader";
5483 case PIPE_SHADER_TESS_EVAL
:
5484 if (shader
->key
.as_es
)
5485 return "Tessellation Evaluation Shader as ES";
5486 else if (shader
->key
.as_ngg
)
5487 return "Tessellation Evaluation Shader as ESGS";
5489 return "Tessellation Evaluation Shader as VS";
5490 case PIPE_SHADER_GEOMETRY
:
5491 if (shader
->is_gs_copy_shader
)
5492 return "GS Copy Shader as VS";
5494 return "Geometry Shader";
5495 case PIPE_SHADER_FRAGMENT
:
5496 return "Pixel Shader";
5497 case PIPE_SHADER_COMPUTE
:
5498 return "Compute Shader";
5500 return "Unknown Shader";
5504 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5505 struct pipe_debug_callback
*debug
,
5506 FILE *file
, bool check_debug_option
)
5508 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5510 if (!check_debug_option
||
5511 si_can_dump_shader(sscreen
, shader_type
))
5512 si_dump_shader_key(shader
, file
);
5514 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5515 if (shader
->previous_stage
&&
5516 shader
->previous_stage
->binary
.llvm_ir_string
) {
5517 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5518 si_get_shader_name(shader
));
5519 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5522 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5523 si_get_shader_name(shader
));
5524 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5527 if (!check_debug_option
||
5528 (si_can_dump_shader(sscreen
, shader_type
) &&
5529 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5530 unsigned wave_size
= si_get_shader_wave_size(shader
);
5532 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5535 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5536 shader_type
, wave_size
, debug
, "prolog", file
);
5537 if (shader
->previous_stage
)
5538 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5539 shader_type
, wave_size
, debug
, "previous stage", file
);
5540 if (shader
->prolog2
)
5541 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5542 shader_type
, wave_size
, debug
, "prolog2", file
);
5544 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5545 wave_size
, debug
, "main", file
);
5548 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5549 shader_type
, wave_size
, debug
, "epilog", file
);
5550 fprintf(file
, "\n");
5553 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5556 static int si_compile_llvm(struct si_screen
*sscreen
,
5557 struct si_shader_binary
*binary
,
5558 struct ac_shader_config
*conf
,
5559 struct ac_llvm_compiler
*compiler
,
5561 struct pipe_debug_callback
*debug
,
5562 enum pipe_shader_type shader_type
,
5565 bool less_optimized
)
5567 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5569 if (si_can_dump_shader(sscreen
, shader_type
)) {
5570 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5572 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5573 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5574 ac_dump_module(mod
);
5575 fprintf(stderr
, "\n");
5579 if (sscreen
->record_llvm_ir
) {
5580 char *ir
= LLVMPrintModuleToString(mod
);
5581 binary
->llvm_ir_string
= strdup(ir
);
5582 LLVMDisposeMessage(ir
);
5585 if (!si_replace_shader(count
, binary
)) {
5586 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5587 less_optimized
, wave_size
);
5592 struct ac_rtld_binary rtld
;
5593 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5594 .info
= &sscreen
->info
,
5595 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5596 .wave_size
= wave_size
,
5598 .elf_ptrs
= &binary
->elf_buffer
,
5599 .elf_sizes
= &binary
->elf_size
}))
5602 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5603 ac_rtld_close(&rtld
);
5607 /* Enable 64-bit and 16-bit denormals, because there is no performance
5610 * If denormals are enabled, all floating-point output modifiers are
5613 * Don't enable denormals for 32-bit floats, because:
5614 * - Floating-point output modifiers would be ignored by the hw.
5615 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5616 * have to stop using those.
5617 * - GFX6 & GFX7 would be very slow.
5619 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5624 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5626 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5627 LLVMBuildRetVoid(ctx
->ac
.builder
);
5629 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5632 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5634 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5635 struct ac_llvm_compiler
*compiler
,
5636 struct si_shader_selector
*gs_selector
,
5637 struct pipe_debug_callback
*debug
)
5639 struct si_shader_context ctx
;
5640 struct si_shader
*shader
;
5641 LLVMBuilderRef builder
;
5642 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5643 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5647 shader
= CALLOC_STRUCT(si_shader
);
5651 /* We can leave the fence as permanently signaled because the GS copy
5652 * shader only becomes visible globally after it has been compiled. */
5653 util_queue_fence_init(&shader
->ready
);
5655 shader
->selector
= gs_selector
;
5656 shader
->is_gs_copy_shader
= true;
5658 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5659 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false),
5661 ctx
.shader
= shader
;
5662 ctx
.type
= PIPE_SHADER_VERTEX
;
5664 builder
= ctx
.ac
.builder
;
5666 create_function(&ctx
);
5667 preload_ring_buffers(&ctx
);
5669 LLVMValueRef voffset
=
5670 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5671 LLVMConstInt(ctx
.i32
, 4, 0), "");
5673 /* Fetch the vertex stream ID.*/
5674 LLVMValueRef stream_id
;
5676 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5677 stream_id
= si_unpack_param(&ctx
, ctx
.streamout_config
, 24, 2);
5679 stream_id
= ctx
.i32_0
;
5681 /* Fill in output information. */
5682 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5683 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5684 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5686 for (int chan
= 0; chan
< 4; chan
++) {
5687 outputs
[i
].vertex_stream
[chan
] =
5688 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5692 LLVMBasicBlockRef end_bb
;
5693 LLVMValueRef switch_inst
;
5695 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5696 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5698 for (int stream
= 0; stream
< 4; stream
++) {
5699 LLVMBasicBlockRef bb
;
5702 if (!gsinfo
->num_stream_output_components
[stream
])
5705 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5708 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5709 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5710 LLVMPositionBuilderAtEnd(builder
, bb
);
5712 /* Fetch vertex data from GSVS ring */
5714 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5715 for (unsigned chan
= 0; chan
< 4; chan
++) {
5716 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5717 outputs
[i
].vertex_stream
[chan
] != stream
) {
5718 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5722 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5723 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5726 outputs
[i
].values
[chan
] =
5727 ac_build_buffer_load(&ctx
.ac
,
5728 ctx
.gsvs_ring
[0], 1,
5730 soffset
, 0, ac_glc
| ac_slc
,
5735 /* Streamout and exports. */
5736 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5737 si_llvm_emit_streamout(&ctx
, outputs
,
5738 gsinfo
->num_outputs
,
5743 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5745 LLVMBuildBr(builder
, end_bb
);
5748 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5750 LLVMBuildRetVoid(ctx
.ac
.builder
);
5752 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5753 si_llvm_optimize_module(&ctx
);
5756 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5757 &ctx
.shader
->config
, ctx
.compiler
,
5759 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5760 "GS Copy Shader", false) == 0) {
5761 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5762 fprintf(stderr
, "GS Copy Shader:\n");
5763 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5765 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5766 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5771 si_llvm_dispose(&ctx
);
5777 si_fix_resource_usage(sscreen
, shader
);
5782 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5783 const struct si_vs_prolog_bits
*prolog
,
5784 const char *prefix
, FILE *f
)
5786 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5787 prefix
, prolog
->instance_divisor_is_one
);
5788 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5789 prefix
, prolog
->instance_divisor_is_fetched
);
5790 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5791 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5792 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5793 prefix
, prolog
->ls_vgpr_fix
);
5795 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5796 fprintf(f
, " mono.vs.fix_fetch = {");
5797 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5798 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5804 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5805 fix
.u
.num_channels_m1
, fix
.u
.format
);
5810 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5812 const struct si_shader_key
*key
= &shader
->key
;
5813 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5815 fprintf(f
, "SHADER KEY\n");
5817 switch (shader_type
) {
5818 case PIPE_SHADER_VERTEX
:
5819 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5820 "part.vs.prolog", f
);
5821 fprintf(f
, " as_es = %u\n", key
->as_es
);
5822 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5823 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5824 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5825 key
->mono
.u
.vs_export_prim_id
);
5826 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5827 key
->opt
.vs_as_prim_discard_cs
);
5828 fprintf(f
, " opt.cs_prim_type = %s\n",
5829 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5830 fprintf(f
, " opt.cs_indexed = %u\n",
5831 key
->opt
.cs_indexed
);
5832 fprintf(f
, " opt.cs_instancing = %u\n",
5833 key
->opt
.cs_instancing
);
5834 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5835 key
->opt
.cs_primitive_restart
);
5836 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5837 key
->opt
.cs_provoking_vertex_first
);
5838 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5839 key
->opt
.cs_need_correct_orientation
);
5840 fprintf(f
, " opt.cs_cull_front = %u\n",
5841 key
->opt
.cs_cull_front
);
5842 fprintf(f
, " opt.cs_cull_back = %u\n",
5843 key
->opt
.cs_cull_back
);
5844 fprintf(f
, " opt.cs_cull_z = %u\n",
5845 key
->opt
.cs_cull_z
);
5846 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5847 key
->opt
.cs_halfz_clip_space
);
5850 case PIPE_SHADER_TESS_CTRL
:
5851 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5852 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5853 "part.tcs.ls_prolog", f
);
5855 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5856 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5859 case PIPE_SHADER_TESS_EVAL
:
5860 fprintf(f
, " as_es = %u\n", key
->as_es
);
5861 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5862 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5863 key
->mono
.u
.vs_export_prim_id
);
5866 case PIPE_SHADER_GEOMETRY
:
5867 if (shader
->is_gs_copy_shader
)
5870 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5871 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5872 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5873 "part.gs.vs_prolog", f
);
5875 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5876 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5877 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5880 case PIPE_SHADER_COMPUTE
:
5883 case PIPE_SHADER_FRAGMENT
:
5884 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5885 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5886 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5887 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5888 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5889 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5890 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5891 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5892 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5893 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5894 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5895 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5896 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5897 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5898 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5899 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5900 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5901 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5902 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5903 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5904 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5905 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5912 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5913 shader_type
== PIPE_SHADER_TESS_EVAL
||
5914 shader_type
== PIPE_SHADER_VERTEX
) &&
5915 !key
->as_es
&& !key
->as_ls
) {
5916 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5917 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5921 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5922 struct si_screen
*sscreen
,
5923 struct ac_llvm_compiler
*compiler
,
5927 struct lp_build_tgsi_context
*bld_base
;
5929 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
,
5930 nir
? 64 : wave_size
);
5932 bld_base
= &ctx
->bld_base
;
5933 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5935 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5936 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5937 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5939 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5941 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5943 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5944 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5945 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5946 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5948 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5949 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5950 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5951 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5952 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5953 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5954 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5955 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5957 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5958 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5959 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
5962 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
5964 struct si_shader
*shader
= ctx
->shader
;
5965 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
5967 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
5968 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
5969 shader
->key
.as_ls
||
5973 ac_optimize_vs_outputs(&ctx
->ac
,
5975 shader
->info
.vs_output_param_offset
,
5977 &shader
->info
.nr_param_exports
);
5980 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
5981 struct ac_arg param
, unsigned bitoffset
)
5983 LLVMValueRef args
[] = {
5984 ac_get_arg(&ctx
->ac
, param
),
5985 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
5987 ac_build_intrinsic(&ctx
->ac
,
5988 "llvm.amdgcn.init.exec.from.input",
5989 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
5992 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
5993 const struct si_vs_prolog_bits
*key
)
5995 /* VGPR initialization fixup for Vega10 and Raven is always done in the
5997 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6000 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
,
6001 struct nir_shader
*nir
, bool free_nir
)
6003 struct si_shader
*shader
= ctx
->shader
;
6004 struct si_shader_selector
*sel
= shader
->selector
;
6005 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6007 // TODO clean all this up!
6008 switch (ctx
->type
) {
6009 case PIPE_SHADER_VERTEX
:
6010 ctx
->load_input
= declare_input_vs
;
6011 if (shader
->key
.as_ls
)
6012 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6013 else if (shader
->key
.as_es
)
6014 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6015 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6016 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6017 else if (shader
->key
.as_ngg
)
6018 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6020 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6021 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6022 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6024 case PIPE_SHADER_TESS_CTRL
:
6025 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6026 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6027 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6028 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6029 bld_base
->emit_store
= store_output_tcs
;
6030 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6031 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6032 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6033 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6035 case PIPE_SHADER_TESS_EVAL
:
6036 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6037 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6038 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6039 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6040 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6041 if (shader
->key
.as_es
)
6042 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6043 else if (shader
->key
.as_ngg
)
6044 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6046 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6047 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6049 case PIPE_SHADER_GEOMETRY
:
6050 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6051 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6052 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6053 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6054 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6055 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6057 case PIPE_SHADER_FRAGMENT
:
6058 ctx
->load_input
= declare_input_fs
;
6059 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6060 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6061 ctx
->abi
.load_sample_position
= load_sample_position
;
6062 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6063 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6064 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6066 case PIPE_SHADER_COMPUTE
:
6067 ctx
->abi
.load_local_group_size
= get_block_size
;
6070 assert(!"Unsupported shader type");
6074 ctx
->abi
.load_ubo
= load_ubo
;
6075 ctx
->abi
.load_ssbo
= load_ssbo
;
6077 create_function(ctx
);
6078 preload_ring_buffers(ctx
);
6080 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6081 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6082 for (unsigned i
= 0; i
< 6; i
++) {
6083 ctx
->invoc0_tess_factors
[i
] =
6084 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6088 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6089 for (unsigned i
= 0; i
< 4; i
++) {
6090 ctx
->gs_next_vertex
[i
] =
6091 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6093 if (shader
->key
.as_ngg
) {
6094 for (unsigned i
= 0; i
< 4; ++i
) {
6095 ctx
->gs_curprim_verts
[i
] =
6096 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6097 ctx
->gs_generated_prims
[i
] =
6098 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6101 unsigned scratch_size
= 8;
6102 if (sel
->so
.num_outputs
)
6105 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6106 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6107 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6108 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6109 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6111 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6112 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6113 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6114 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6118 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6119 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6120 /* Unconditionally declare scratch space base for streamout and
6121 * vertex compaction. Whether space is actually allocated is
6122 * determined during linking / PM4 creation.
6124 * Add an extra dword per vertex to ensure an odd stride, which
6125 * avoids bank conflicts for SoA accesses.
6127 declare_esgs_ring(ctx
);
6129 /* This is really only needed when streamout and / or vertex
6130 * compaction is enabled.
6132 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6133 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6134 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6135 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6136 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6139 /* For GFX9 merged shaders:
6140 * - Set EXEC for the first shader. If the prolog is present, set
6141 * EXEC there instead.
6142 * - Add a barrier before the second shader.
6143 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6144 * an if-statement. This is required for correctness in geometry
6145 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6148 * For monolithic merged shaders, the first shader is wrapped in an
6149 * if-block together with its prolog in si_build_wrapper_function.
6151 * NGG vertex and tess eval shaders running as the last
6152 * vertex/geometry stage handle execution explicitly using
6155 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6156 if (!shader
->is_monolithic
&&
6157 sel
->info
.num_instructions
> 1 && /* not empty shader */
6158 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6159 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6160 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6161 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6162 si_init_exec_from_input(ctx
,
6163 ctx
->merged_wave_info
, 0);
6164 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6165 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6166 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6167 LLVMValueRef num_threads
;
6168 bool nested_barrier
;
6170 if (!shader
->is_monolithic
||
6171 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6172 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6173 ac_init_exec_full_mask(&ctx
->ac
);
6175 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6176 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6177 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6178 gfx10_ngg_gs_emit_prologue(ctx
);
6179 nested_barrier
= false;
6181 nested_barrier
= true;
6184 /* Number of patches / primitives */
6185 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 8, 8);
6187 /* Number of vertices */
6188 num_threads
= si_unpack_param(ctx
, ctx
->merged_wave_info
, 0, 8);
6189 nested_barrier
= false;
6193 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6194 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6196 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6197 ctx
->merged_wrap_if_label
= 11500;
6198 ac_build_ifcc(&ctx
->ac
, ena
, ctx
->merged_wrap_if_label
);
6200 if (nested_barrier
) {
6201 /* Execute a barrier before the second shader in
6204 * Execute the barrier inside the conditional block,
6205 * so that empty waves can jump directly to s_endpgm,
6206 * which will also signal the barrier.
6208 * This is possible in gfx9, because an empty wave
6209 * for the second shader does not participate in
6210 * the epilogue. With NGG, empty waves may still
6211 * be required to export data (e.g. GS output vertices),
6212 * so we cannot let them exit early.
6214 * If the shader is TCS and the TCS epilog is present
6215 * and contains a barrier, it will wait there and then
6218 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6223 if (sel
->force_correct_derivs_after_kill
) {
6224 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6225 /* true = don't kill. */
6226 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6227 ctx
->postponed_kill
);
6231 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6232 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6236 bool success
= si_nir_build_llvm(ctx
, nir
);
6240 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6245 si_llvm_build_ret(ctx
, ctx
->return_value
);
6250 * Compute the VS prolog key, which contains all the information needed to
6251 * build the VS prolog function, and set shader->info bits where needed.
6253 * \param info Shader info of the vertex shader.
6254 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6255 * \param prolog_key Key of the VS prolog
6256 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6257 * \param key Output shader part key.
6259 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6260 unsigned num_input_sgprs
,
6261 const struct si_vs_prolog_bits
*prolog_key
,
6262 struct si_shader
*shader_out
,
6263 union si_shader_part_key
*key
)
6265 memset(key
, 0, sizeof(*key
));
6266 key
->vs_prolog
.states
= *prolog_key
;
6267 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6268 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6269 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6270 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6271 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6273 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6274 key
->vs_prolog
.as_ls
= 1;
6275 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6276 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6277 key
->vs_prolog
.as_es
= 1;
6278 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6279 } else if (shader_out
->key
.as_ngg
) {
6280 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6283 /* Enable loading the InstanceID VGPR. */
6284 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6286 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6287 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6288 shader_out
->info
.uses_instanceid
= true;
6292 * Compute the PS prolog key, which contains all the information needed to
6293 * build the PS prolog function, and set related bits in shader->config.
6295 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6296 union si_shader_part_key
*key
,
6297 bool separate_prolog
)
6299 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6301 memset(key
, 0, sizeof(*key
));
6302 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6303 key
->ps_prolog
.colors_read
= info
->colors_read
;
6304 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6305 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6306 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6307 (key
->ps_prolog
.colors_read
||
6308 key
->ps_prolog
.states
.force_persp_sample_interp
||
6309 key
->ps_prolog
.states
.force_linear_sample_interp
||
6310 key
->ps_prolog
.states
.force_persp_center_interp
||
6311 key
->ps_prolog
.states
.force_linear_center_interp
||
6312 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6313 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6314 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6316 if (info
->colors_read
) {
6317 unsigned *color
= shader
->selector
->color_attr_index
;
6319 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6320 /* BCOLORs are stored after the last input. */
6321 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6322 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6323 if (separate_prolog
)
6324 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6327 for (unsigned i
= 0; i
< 2; i
++) {
6328 unsigned interp
= info
->input_interpolate
[color
[i
]];
6329 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6331 if (!(info
->colors_read
& (0xf << i
*4)))
6334 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6336 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6337 interp
== TGSI_INTERPOLATE_COLOR
)
6338 interp
= TGSI_INTERPOLATE_CONSTANT
;
6341 case TGSI_INTERPOLATE_CONSTANT
:
6342 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6344 case TGSI_INTERPOLATE_PERSPECTIVE
:
6345 case TGSI_INTERPOLATE_COLOR
:
6346 /* Force the interpolation location for colors here. */
6347 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6348 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6349 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6350 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6353 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6354 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6355 if (separate_prolog
) {
6356 shader
->config
.spi_ps_input_ena
|=
6357 S_0286CC_PERSP_SAMPLE_ENA(1);
6360 case TGSI_INTERPOLATE_LOC_CENTER
:
6361 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6362 if (separate_prolog
) {
6363 shader
->config
.spi_ps_input_ena
|=
6364 S_0286CC_PERSP_CENTER_ENA(1);
6367 case TGSI_INTERPOLATE_LOC_CENTROID
:
6368 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6369 if (separate_prolog
) {
6370 shader
->config
.spi_ps_input_ena
|=
6371 S_0286CC_PERSP_CENTROID_ENA(1);
6378 case TGSI_INTERPOLATE_LINEAR
:
6379 /* Force the interpolation location for colors here. */
6380 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6381 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6382 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6383 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6385 /* The VGPR assignment for non-monolithic shaders
6386 * works because InitialPSInputAddr is set on the
6387 * main shader and PERSP_PULL_MODEL is never used.
6390 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6391 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6392 separate_prolog
? 6 : 9;
6393 if (separate_prolog
) {
6394 shader
->config
.spi_ps_input_ena
|=
6395 S_0286CC_LINEAR_SAMPLE_ENA(1);
6398 case TGSI_INTERPOLATE_LOC_CENTER
:
6399 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6400 separate_prolog
? 8 : 11;
6401 if (separate_prolog
) {
6402 shader
->config
.spi_ps_input_ena
|=
6403 S_0286CC_LINEAR_CENTER_ENA(1);
6406 case TGSI_INTERPOLATE_LOC_CENTROID
:
6407 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6408 separate_prolog
? 10 : 13;
6409 if (separate_prolog
) {
6410 shader
->config
.spi_ps_input_ena
|=
6411 S_0286CC_LINEAR_CENTROID_ENA(1);
6426 * Check whether a PS prolog is required based on the key.
6428 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6430 return key
->ps_prolog
.colors_read
||
6431 key
->ps_prolog
.states
.force_persp_sample_interp
||
6432 key
->ps_prolog
.states
.force_linear_sample_interp
||
6433 key
->ps_prolog
.states
.force_persp_center_interp
||
6434 key
->ps_prolog
.states
.force_linear_center_interp
||
6435 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6436 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6437 key
->ps_prolog
.states
.poly_stipple
||
6438 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6442 * Compute the PS epilog key, which contains all the information needed to
6443 * build the PS epilog function.
6445 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6446 union si_shader_part_key
*key
)
6448 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6449 memset(key
, 0, sizeof(*key
));
6450 key
->ps_epilog
.colors_written
= info
->colors_written
;
6451 key
->ps_epilog
.writes_z
= info
->writes_z
;
6452 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6453 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6454 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6458 * Build the GS prolog function. Rotate the input vertices for triangle strips
6461 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6462 union si_shader_part_key
*key
)
6464 unsigned num_sgprs
, num_vgprs
;
6465 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6466 LLVMTypeRef returns
[48];
6467 LLVMValueRef func
, ret
;
6469 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6471 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6472 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6473 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6475 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6476 num_vgprs
= 5; /* ES inputs are not needed by GS */
6478 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6482 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6483 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
6484 returns
[i
] = ctx
->i32
;
6487 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6488 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
);
6489 returns
[num_sgprs
+ i
] = ctx
->f32
;
6492 /* Create the function. */
6493 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6495 func
= ctx
->main_fn
;
6497 /* Set the full EXEC mask for the prolog, because we are only fiddling
6498 * with registers here. The main shader part will set the correct EXEC
6501 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6502 ac_init_exec_full_mask(&ctx
->ac
);
6504 /* Copy inputs to outputs. This should be no-op, as the registers match,
6505 * but it will prevent the compiler from overwriting them unintentionally.
6507 ret
= ctx
->return_value
;
6508 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6509 LLVMValueRef p
= LLVMGetParam(func
, i
);
6510 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6512 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6513 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6514 p
= ac_to_float(&ctx
->ac
, p
);
6515 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6518 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6519 /* Remap the input vertices for every other primitive. */
6520 const struct ac_arg gfx6_vtx_params
[6] = {
6521 { .used
= true, .arg_index
= num_sgprs
},
6522 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6523 { .used
= true, .arg_index
= num_sgprs
+ 3 },
6524 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6525 { .used
= true, .arg_index
= num_sgprs
+ 5 },
6526 { .used
= true, .arg_index
= num_sgprs
+ 6 },
6528 const struct ac_arg gfx9_vtx_params
[3] = {
6529 { .used
= true, .arg_index
= num_sgprs
},
6530 { .used
= true, .arg_index
= num_sgprs
+ 1 },
6531 { .used
= true, .arg_index
= num_sgprs
+ 4 },
6533 LLVMValueRef vtx_in
[6], vtx_out
[6];
6534 LLVMValueRef prim_id
, rotate
;
6536 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6537 for (unsigned i
= 0; i
< 3; i
++) {
6538 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6539 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6542 for (unsigned i
= 0; i
< 6; i
++)
6543 vtx_in
[i
] = ac_get_arg(&ctx
->ac
, gfx6_vtx_params
[i
]);
6546 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6547 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6549 for (unsigned i
= 0; i
< 6; ++i
) {
6550 LLVMValueRef base
, rotated
;
6552 rotated
= vtx_in
[(i
+ 4) % 6];
6553 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6556 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6557 for (unsigned i
= 0; i
< 3; i
++) {
6558 LLVMValueRef hi
, out
;
6560 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6561 LLVMConstInt(ctx
->i32
, 16, 0), "");
6562 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6563 out
= ac_to_float(&ctx
->ac
, out
);
6564 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6565 gfx9_vtx_params
[i
].arg_index
, "");
6568 for (unsigned i
= 0; i
< 6; i
++) {
6571 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6572 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6573 gfx6_vtx_params
[i
].arg_index
, "");
6578 LLVMBuildRet(builder
, ret
);
6582 * Given a list of shader part functions, build a wrapper function that
6583 * runs them in sequence to form a monolithic shader.
6585 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6586 LLVMValueRef
*parts
,
6589 unsigned next_shader_first_part
)
6591 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6592 /* PS epilog has one arg per color component; gfx9 merged shader
6593 * prologs need to forward 32 user SGPRs.
6595 LLVMValueRef initial
[64], out
[64];
6596 LLVMTypeRef function_type
;
6597 unsigned num_first_params
;
6598 unsigned num_out
, initial_num_out
;
6599 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6600 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6601 unsigned num_sgprs
, num_vgprs
;
6604 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
6606 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6607 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6608 AC_FUNC_ATTR_ALWAYSINLINE
);
6609 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6612 /* The parameters of the wrapper function correspond to those of the
6613 * first part in terms of SGPRs and VGPRs, but we use the types of the
6614 * main part to get the right types. This is relevant for the
6615 * dereferenceable attribute on descriptor table pointers.
6620 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6621 num_first_params
= LLVMCountParamTypes(function_type
);
6623 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6624 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6626 if (ac_is_sgpr_param(param
)) {
6627 assert(num_vgprs
== 0);
6628 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6630 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6635 while (gprs
< num_sgprs
+ num_vgprs
) {
6636 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], ctx
->args
.arg_count
);
6637 LLVMTypeRef type
= LLVMTypeOf(param
);
6638 unsigned size
= ac_get_type_size(type
) / 4;
6640 /* This is going to get casted anyways, so we don't have to
6641 * have the exact same type. But we do have to preserve the
6642 * pointer-ness so that LLVM knows about it.
6644 enum ac_arg_type arg_type
= AC_ARG_INT
;
6645 if (LLVMGetTypeKind(type
) == LLVMPointerTypeKind
) {
6646 arg_type
= AC_ARG_CONST_PTR
;
6649 ac_add_arg(&ctx
->args
, gprs
< num_sgprs
? AC_ARG_SGPR
: AC_ARG_VGPR
,
6650 size
, arg_type
, NULL
);
6652 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6653 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6654 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6659 /* Prepare the return type. */
6660 unsigned num_returns
= 0;
6661 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6663 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6664 return_type
= LLVMGetReturnType(last_func_type
);
6666 switch (LLVMGetTypeKind(return_type
)) {
6667 case LLVMStructTypeKind
:
6668 num_returns
= LLVMCountStructElementTypes(return_type
);
6669 assert(num_returns
<= ARRAY_SIZE(returns
));
6670 LLVMGetStructElementTypes(return_type
, returns
);
6672 case LLVMVoidTypeKind
:
6675 unreachable("unexpected type");
6678 si_create_function(ctx
, "wrapper", returns
, num_returns
,
6679 si_get_max_workgroup_size(ctx
->shader
));
6681 if (is_merged_shader(ctx
))
6682 ac_init_exec_full_mask(&ctx
->ac
);
6684 /* Record the arguments of the function as if they were an output of
6690 for (unsigned i
= 0; i
< ctx
->args
.arg_count
; ++i
) {
6691 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6692 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6693 LLVMTypeRef out_type
= ctx
->args
.args
[i
].file
== AC_ARG_SGPR
? ctx
->i32
: ctx
->f32
;
6694 unsigned size
= ac_get_type_size(param_type
) / 4;
6697 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6698 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6699 param_type
= ctx
->i32
;
6702 if (param_type
!= out_type
)
6703 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6704 out
[num_out
++] = param
;
6706 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6708 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6709 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6710 param_type
= ctx
->i64
;
6713 if (param_type
!= vector_type
)
6714 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6716 for (unsigned j
= 0; j
< size
; ++j
)
6717 out
[num_out
++] = LLVMBuildExtractElement(
6718 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6721 if (ctx
->args
.args
[i
].file
== AC_ARG_SGPR
)
6722 num_out_sgpr
= num_out
;
6725 memcpy(initial
, out
, sizeof(out
));
6726 initial_num_out
= num_out
;
6727 initial_num_out_sgpr
= num_out_sgpr
;
6729 /* Now chain the parts. */
6730 LLVMValueRef ret
= NULL
;
6731 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6732 LLVMValueRef in
[48];
6733 LLVMTypeRef ret_type
;
6734 unsigned out_idx
= 0;
6735 unsigned num_params
= LLVMCountParams(parts
[part
]);
6737 /* Merged shaders are executed conditionally depending
6738 * on the number of enabled threads passed in the input SGPRs. */
6739 if (is_multi_part_shader(ctx
) && part
== 0) {
6740 LLVMValueRef ena
, count
= initial
[3];
6742 count
= LLVMBuildAnd(builder
, count
,
6743 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6744 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6745 ac_get_thread_id(&ctx
->ac
), count
, "");
6746 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6749 /* Derive arguments for the next part from outputs of the
6752 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6754 LLVMTypeRef param_type
;
6756 unsigned param_size
;
6757 LLVMValueRef arg
= NULL
;
6759 param
= LLVMGetParam(parts
[part
], param_idx
);
6760 param_type
= LLVMTypeOf(param
);
6761 param_size
= ac_get_type_size(param_type
) / 4;
6762 is_sgpr
= ac_is_sgpr_param(param
);
6765 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6766 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6767 } else if (out_idx
< num_out_sgpr
) {
6768 /* Skip returned SGPRs the current part doesn't
6769 * declare on the input. */
6770 out_idx
= num_out_sgpr
;
6773 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6775 if (param_size
== 1)
6778 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6780 if (LLVMTypeOf(arg
) != param_type
) {
6781 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6782 if (LLVMGetPointerAddressSpace(param_type
) ==
6783 AC_ADDR_SPACE_CONST_32BIT
) {
6784 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6785 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6787 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6788 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6791 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6795 in
[param_idx
] = arg
;
6796 out_idx
+= param_size
;
6799 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6801 if (is_multi_part_shader(ctx
) &&
6802 part
+ 1 == next_shader_first_part
) {
6803 ac_build_endif(&ctx
->ac
, 6506);
6805 /* The second half of the merged shader should use
6806 * the inputs from the toplevel (wrapper) function,
6807 * not the return value from the last call.
6809 * That's because the last call was executed condi-
6810 * tionally, so we can't consume it in the main
6813 memcpy(out
, initial
, sizeof(initial
));
6814 num_out
= initial_num_out
;
6815 num_out_sgpr
= initial_num_out_sgpr
;
6819 /* Extract the returned GPRs. */
6820 ret_type
= LLVMTypeOf(ret
);
6824 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6825 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6827 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6829 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6831 LLVMBuildExtractValue(builder
, ret
, i
, "");
6833 assert(num_out
< ARRAY_SIZE(out
));
6834 out
[num_out
++] = val
;
6836 if (LLVMTypeOf(val
) == ctx
->i32
) {
6837 assert(num_out_sgpr
+ 1 == num_out
);
6838 num_out_sgpr
= num_out
;
6844 /* Return the value from the last part. */
6845 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6846 LLVMBuildRetVoid(builder
);
6848 LLVMBuildRet(builder
, ret
);
6851 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6852 struct si_shader_selector
*sel
)
6854 if (!compiler
->low_opt_passes
)
6857 /* Assume a slow CPU. */
6858 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6859 sel
->screen
->info
.chip_class
<= GFX8
);
6861 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6863 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6864 sel
->info
.num_memory_instructions
> 1000;
6867 static struct nir_shader
*get_nir_shader(struct si_shader_selector
*sel
,
6874 } else if (sel
->nir_binary
) {
6875 struct pipe_screen
*screen
= &sel
->screen
->b
;
6876 const void *options
=
6877 screen
->get_compiler_options(screen
, PIPE_SHADER_IR_NIR
,
6880 struct blob_reader blob_reader
;
6881 blob_reader_init(&blob_reader
, sel
->nir_binary
, sel
->nir_size
);
6883 return nir_deserialize(NULL
, options
, &blob_reader
);
6888 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6889 struct ac_llvm_compiler
*compiler
,
6890 struct si_shader
*shader
,
6891 struct pipe_debug_callback
*debug
)
6893 struct si_shader_selector
*sel
= shader
->selector
;
6894 struct si_shader_context ctx
;
6896 struct nir_shader
*nir
= get_nir_shader(sel
, &free_nir
);
6899 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6900 * conversion fails. */
6901 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6902 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6904 tgsi_dump(sel
->tokens
, 0);
6906 nir_print_shader(nir
, stderr
);
6907 si_dump_streamout(&sel
->so
);
6910 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
),
6912 si_llvm_context_set_ir(&ctx
, shader
, nir
);
6914 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6915 sizeof(shader
->info
.vs_output_param_offset
));
6917 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6919 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6920 si_llvm_dispose(&ctx
);
6924 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6925 LLVMValueRef parts
[2];
6926 bool need_prolog
= sel
->vs_needs_prolog
;
6928 parts
[1] = ctx
.main_fn
;
6931 union si_shader_part_key prolog_key
;
6932 si_get_vs_prolog_key(&sel
->info
,
6933 shader
->info
.num_input_sgprs
,
6934 &shader
->key
.part
.vs
.prolog
,
6935 shader
, &prolog_key
);
6936 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6937 parts
[0] = ctx
.main_fn
;
6940 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6941 1 + need_prolog
, need_prolog
, 0);
6943 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6944 si_build_prim_discard_compute_shader(&ctx
);
6945 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6946 if (sscreen
->info
.chip_class
>= GFX9
) {
6947 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6948 LLVMValueRef parts
[4];
6949 bool vs_needs_prolog
=
6950 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6953 parts
[2] = ctx
.main_fn
;
6956 union si_shader_part_key tcs_epilog_key
;
6957 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6958 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6959 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6960 parts
[3] = ctx
.main_fn
;
6962 /* VS as LS main part */
6963 nir
= get_nir_shader(ls
, &free_nir
);
6964 struct si_shader shader_ls
= {};
6965 shader_ls
.selector
= ls
;
6966 shader_ls
.key
.as_ls
= 1;
6967 shader_ls
.key
.mono
= shader
->key
.mono
;
6968 shader_ls
.key
.opt
= shader
->key
.opt
;
6969 shader_ls
.is_monolithic
= true;
6970 si_llvm_context_set_ir(&ctx
, &shader_ls
, nir
);
6972 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
6973 si_llvm_dispose(&ctx
);
6976 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6977 parts
[1] = ctx
.main_fn
;
6980 if (vs_needs_prolog
) {
6981 union si_shader_part_key vs_prolog_key
;
6982 si_get_vs_prolog_key(&ls
->info
,
6983 shader_ls
.info
.num_input_sgprs
,
6984 &shader
->key
.part
.tcs
.ls_prolog
,
6985 shader
, &vs_prolog_key
);
6986 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6987 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6988 parts
[0] = ctx
.main_fn
;
6991 /* Reset the shader context. */
6992 ctx
.shader
= shader
;
6993 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6995 si_build_wrapper_function(&ctx
,
6996 parts
+ !vs_needs_prolog
,
6997 4 - !vs_needs_prolog
, vs_needs_prolog
,
6998 vs_needs_prolog
? 2 : 1);
7000 LLVMValueRef parts
[2];
7001 union si_shader_part_key epilog_key
;
7003 parts
[0] = ctx
.main_fn
;
7005 memset(&epilog_key
, 0, sizeof(epilog_key
));
7006 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7007 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7008 parts
[1] = ctx
.main_fn
;
7010 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7012 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7013 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7014 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7015 LLVMValueRef es_prolog
= NULL
;
7016 LLVMValueRef es_main
= NULL
;
7017 LLVMValueRef gs_prolog
= NULL
;
7018 LLVMValueRef gs_main
= ctx
.main_fn
;
7021 union si_shader_part_key gs_prolog_key
;
7022 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7023 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7024 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7025 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7026 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7027 gs_prolog
= ctx
.main_fn
;
7030 nir
= get_nir_shader(es
, &free_nir
);
7031 struct si_shader shader_es
= {};
7032 shader_es
.selector
= es
;
7033 shader_es
.key
.as_es
= 1;
7034 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7035 shader_es
.key
.mono
= shader
->key
.mono
;
7036 shader_es
.key
.opt
= shader
->key
.opt
;
7037 shader_es
.is_monolithic
= true;
7038 si_llvm_context_set_ir(&ctx
, &shader_es
, nir
);
7040 if (!si_compile_tgsi_main(&ctx
, nir
, free_nir
)) {
7041 si_llvm_dispose(&ctx
);
7044 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7045 es_main
= ctx
.main_fn
;
7048 if (es
->vs_needs_prolog
) {
7049 union si_shader_part_key vs_prolog_key
;
7050 si_get_vs_prolog_key(&es
->info
,
7051 shader_es
.info
.num_input_sgprs
,
7052 &shader
->key
.part
.gs
.vs_prolog
,
7053 shader
, &vs_prolog_key
);
7054 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7055 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7056 es_prolog
= ctx
.main_fn
;
7059 /* Reset the shader context. */
7060 ctx
.shader
= shader
;
7061 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7063 /* Prepare the array of shader parts. */
7064 LLVMValueRef parts
[4];
7065 unsigned num_parts
= 0, main_part
, next_first_part
;
7068 parts
[num_parts
++] = es_prolog
;
7070 parts
[main_part
= num_parts
++] = es_main
;
7071 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7072 parts
[num_parts
++] = gs_main
;
7074 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7075 main_part
, next_first_part
);
7077 LLVMValueRef parts
[2];
7078 union si_shader_part_key prolog_key
;
7080 parts
[1] = ctx
.main_fn
;
7082 memset(&prolog_key
, 0, sizeof(prolog_key
));
7083 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7084 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7085 parts
[0] = ctx
.main_fn
;
7087 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7089 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7090 LLVMValueRef parts
[3];
7091 union si_shader_part_key prolog_key
;
7092 union si_shader_part_key epilog_key
;
7095 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7096 need_prolog
= si_need_ps_prolog(&prolog_key
);
7098 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7101 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7102 parts
[0] = ctx
.main_fn
;
7105 si_get_ps_epilog_key(shader
, &epilog_key
);
7106 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7107 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7109 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7110 need_prolog
? 1 : 0, 0);
7113 si_llvm_optimize_module(&ctx
);
7115 /* Post-optimization transformations and analysis. */
7116 si_optimize_vs_outputs(&ctx
);
7118 if ((debug
&& debug
->debug_message
) ||
7119 si_can_dump_shader(sscreen
, ctx
.type
)) {
7120 ctx
.shader
->info
.private_mem_vgprs
=
7121 ac_count_scratch_private_memory(ctx
.main_fn
);
7124 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7125 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7126 LLVMPointerTypeKind
);
7128 /* Compile to bytecode. */
7129 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7130 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7131 si_get_shader_name(shader
),
7132 si_should_optimize_less(compiler
, shader
->selector
));
7133 si_llvm_dispose(&ctx
);
7135 fprintf(stderr
, "LLVM failed to compile shader\n");
7139 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7140 * LLVM 3.9svn has this bug.
7142 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7143 unsigned wave_size
= sscreen
->compute_wave_size
;
7144 unsigned max_vgprs
= sscreen
->info
.num_physical_wave64_vgprs_per_simd
*
7145 (wave_size
== 32 ? 2 : 1);
7146 unsigned max_sgprs
= sscreen
->info
.num_physical_sgprs_per_simd
;
7147 unsigned max_sgprs_per_wave
= 128;
7148 unsigned simds_per_tg
= 4; /* assuming WGP mode on gfx10 */
7149 unsigned threads_per_tg
= si_get_max_workgroup_size(shader
);
7150 unsigned waves_per_tg
= DIV_ROUND_UP(threads_per_tg
, wave_size
);
7151 unsigned waves_per_simd
= DIV_ROUND_UP(waves_per_tg
, simds_per_tg
);
7153 max_vgprs
= max_vgprs
/ waves_per_simd
;
7154 max_sgprs
= MIN2(max_sgprs
/ waves_per_simd
, max_sgprs_per_wave
);
7156 if (shader
->config
.num_sgprs
> max_sgprs
||
7157 shader
->config
.num_vgprs
> max_vgprs
) {
7158 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7159 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7160 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7161 max_sgprs
, max_vgprs
);
7163 /* Just terminate the process, because dependent
7164 * shaders can hang due to bad input data, but use
7165 * the env var to allow shader-db to work.
7167 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7172 /* Add the scratch offset to input SGPRs. */
7173 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7174 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7176 /* Calculate the number of fragment input VGPRs. */
7177 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7178 shader
->info
.num_input_vgprs
= ac_get_fs_input_vgpr_cnt(&shader
->config
,
7179 &shader
->info
.face_vgpr_index
,
7180 &shader
->info
.ancillary_vgpr_index
);
7183 si_calculate_max_simd_waves(shader
);
7184 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7189 * Create, compile and return a shader part (prolog or epilog).
7191 * \param sscreen screen
7192 * \param list list of shader parts of the same category
7193 * \param type shader type
7194 * \param key shader part key
7195 * \param prolog whether the part being requested is a prolog
7196 * \param tm LLVM target machine
7197 * \param debug debug callback
7198 * \param build the callback responsible for building the main function
7199 * \return non-NULL on success
7201 static struct si_shader_part
*
7202 si_get_shader_part(struct si_screen
*sscreen
,
7203 struct si_shader_part
**list
,
7204 enum pipe_shader_type type
,
7206 union si_shader_part_key
*key
,
7207 struct ac_llvm_compiler
*compiler
,
7208 struct pipe_debug_callback
*debug
,
7209 void (*build
)(struct si_shader_context
*,
7210 union si_shader_part_key
*),
7213 struct si_shader_part
*result
;
7215 simple_mtx_lock(&sscreen
->shader_parts_mutex
);
7217 /* Find existing. */
7218 for (result
= *list
; result
; result
= result
->next
) {
7219 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7220 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7225 /* Compile a new one. */
7226 result
= CALLOC_STRUCT(si_shader_part
);
7229 struct si_shader shader
= {};
7232 case PIPE_SHADER_VERTEX
:
7233 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7234 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7235 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7237 case PIPE_SHADER_TESS_CTRL
:
7239 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7241 case PIPE_SHADER_GEOMETRY
:
7243 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7245 case PIPE_SHADER_FRAGMENT
:
7247 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7249 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7252 unreachable("bad shader part");
7255 struct si_shader_context ctx
;
7256 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7257 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7260 ctx
.shader
= &shader
;
7266 si_llvm_optimize_module(&ctx
);
7268 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7269 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7276 result
->next
= *list
;
7280 si_llvm_dispose(&ctx
);
7281 simple_mtx_unlock(&sscreen
->shader_parts_mutex
);
7285 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7287 LLVMValueRef ptr
[2], list
;
7288 bool merged_shader
= is_merged_shader(ctx
);
7290 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7291 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7292 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7297 * Build the vertex shader prolog function.
7299 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7300 * All inputs are returned unmodified. The vertex load indices are
7301 * stored after them, which will be used by the API VS for fetching inputs.
7303 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7308 * (VertexID + BaseVertex),
7309 * (InstanceID + StartInstance),
7310 * (InstanceID / 2 + StartInstance)
7312 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7313 union si_shader_part_key
*key
)
7315 LLVMTypeRef
*returns
;
7316 LLVMValueRef ret
, func
;
7318 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7319 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7320 struct ac_arg input_sgpr_param
[key
->vs_prolog
.num_input_sgprs
];
7321 struct ac_arg input_vgpr_param
[9];
7322 LLVMValueRef input_vgprs
[9];
7323 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7325 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7327 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7329 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7330 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7331 sizeof(LLVMTypeRef
));
7334 /* Declare input and output SGPRs. */
7335 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7336 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7337 &input_sgpr_param
[i
]);
7338 returns
[num_returns
++] = ctx
->i32
;
7341 struct ac_arg merged_wave_info
= input_sgpr_param
[3];
7343 /* Preloaded VGPRs (outputs must be floats) */
7344 for (i
= 0; i
< num_input_vgprs
; i
++) {
7345 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &input_vgpr_param
[i
]);
7346 returns
[num_returns
++] = ctx
->f32
;
7349 /* Vertex load indices. */
7350 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7351 returns
[num_returns
++] = ctx
->f32
;
7353 /* Create the function. */
7354 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, 0);
7355 func
= ctx
->main_fn
;
7357 for (i
= 0; i
< num_input_vgprs
; i
++) {
7358 input_vgprs
[i
] = ac_get_arg(&ctx
->ac
, input_vgpr_param
[i
]);
7361 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7362 if (!key
->vs_prolog
.is_monolithic
)
7363 si_init_exec_from_input(ctx
, merged_wave_info
, 0);
7365 if (key
->vs_prolog
.as_ls
&&
7366 ctx
->screen
->info
.has_ls_vgpr_init_bug
) {
7367 /* If there are no HS threads, SPI loads the LS VGPRs
7368 * starting at VGPR 0. Shift them back to where they
7371 LLVMValueRef has_hs_threads
=
7372 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7373 si_unpack_param(ctx
, input_sgpr_param
[3], 8, 8),
7376 for (i
= 4; i
> 0; --i
) {
7377 input_vgprs
[i
+ 1] =
7378 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7380 input_vgprs
[i
- 1], "");
7385 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7386 unsigned instance_id_vgpr
=
7387 ctx
->screen
->info
.chip_class
>= GFX10
?
7389 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7391 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7392 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7394 /* InstanceID = VertexID >> 16;
7395 * VertexID = VertexID & 0xffff;
7397 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7398 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7399 LLVMConstInt(ctx
->i32
, 16, 0), "");
7400 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7401 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7404 /* Copy inputs to outputs. This should be no-op, as the registers match,
7405 * but it will prevent the compiler from overwriting them unintentionally.
7407 ret
= ctx
->return_value
;
7408 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7409 LLVMValueRef p
= LLVMGetParam(func
, i
);
7410 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7412 for (i
= 0; i
< num_input_vgprs
; i
++) {
7413 LLVMValueRef p
= input_vgprs
[i
];
7415 if (i
== vertex_id_vgpr
)
7416 p
= ctx
->abi
.vertex_id
;
7417 else if (i
== instance_id_vgpr
)
7418 p
= ctx
->abi
.instance_id
;
7420 p
= ac_to_float(&ctx
->ac
, p
);
7421 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7422 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7425 LLVMValueRef original_ret
= ret
;
7426 bool wrapped
= false;
7427 LLVMBasicBlockRef if_entry_block
= NULL
;
7429 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7430 LLVMValueRef num_threads
;
7433 num_threads
= si_unpack_param(ctx
, merged_wave_info
, 0, 8);
7434 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7435 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7436 if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
7437 ac_build_ifcc(&ctx
->ac
, ena
, 11501);
7441 /* Compute vertex load indices from instance divisors. */
7442 LLVMValueRef instance_divisor_constbuf
= NULL
;
7444 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7445 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7446 LLVMValueRef buf_index
=
7447 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7448 instance_divisor_constbuf
=
7449 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7452 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7453 bool divisor_is_one
=
7454 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7455 bool divisor_is_fetched
=
7456 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7457 LLVMValueRef index
= NULL
;
7459 if (divisor_is_one
) {
7460 index
= ctx
->abi
.instance_id
;
7461 } else if (divisor_is_fetched
) {
7462 LLVMValueRef udiv_factors
[4];
7464 for (unsigned j
= 0; j
< 4; j
++) {
7466 buffer_load_const(ctx
, instance_divisor_constbuf
,
7467 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7468 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7470 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7471 * Such InstanceID might not be achievable in a reasonable time though.
7473 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7474 udiv_factors
[0], udiv_factors
[1],
7475 udiv_factors
[2], udiv_factors
[3]);
7478 if (divisor_is_one
|| divisor_is_fetched
) {
7479 /* Add StartInstance. */
7480 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7481 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7482 SI_SGPR_START_INSTANCE
), "");
7484 /* VertexID + BaseVertex */
7485 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7487 LLVMGetParam(func
, user_sgpr_base
+
7488 SI_SGPR_BASE_VERTEX
), "");
7491 index
= ac_to_float(&ctx
->ac
, index
);
7492 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7493 ctx
->args
.arg_count
+ i
, "");
7497 LLVMBasicBlockRef bbs
[2] = {
7498 LLVMGetInsertBlock(ctx
->ac
.builder
),
7501 ac_build_endif(&ctx
->ac
, 11501);
7503 LLVMValueRef values
[2] = {
7507 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7510 si_llvm_build_ret(ctx
, ret
);
7513 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7514 struct ac_llvm_compiler
*compiler
,
7515 struct si_shader
*shader
,
7516 struct pipe_debug_callback
*debug
,
7517 struct si_shader
*main_part
,
7518 const struct si_vs_prolog_bits
*key
)
7520 struct si_shader_selector
*vs
= main_part
->selector
;
7522 if (!si_vs_needs_prolog(vs
, key
))
7525 /* Get the prolog. */
7526 union si_shader_part_key prolog_key
;
7527 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7528 key
, shader
, &prolog_key
);
7531 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7532 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7533 debug
, si_build_vs_prolog_function
,
7534 "Vertex Shader Prolog");
7535 return shader
->prolog
!= NULL
;
7539 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7541 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7542 struct ac_llvm_compiler
*compiler
,
7543 struct si_shader
*shader
,
7544 struct pipe_debug_callback
*debug
)
7546 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7547 &shader
->key
.part
.vs
.prolog
);
7551 * Compile the TCS epilog function. This writes tesselation factors to memory
7552 * based on the output primitive type of the tesselator (determined by TES).
7554 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7555 union si_shader_part_key
*key
)
7557 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7559 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7561 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7562 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7563 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7564 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7565 &ctx
->tcs_offchip_offset
);
7566 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
); /* wave info */
7567 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7568 &ctx
->tcs_factor_offset
);
7569 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7570 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7571 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7572 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7573 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7574 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7575 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7576 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7577 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7578 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7579 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7580 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7581 &ctx
->tcs_offchip_layout
);
7582 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7583 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7584 &ctx
->tcs_out_lds_layout
);
7586 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7587 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7588 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7589 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7590 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7591 &ctx
->tcs_offchip_layout
);
7592 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7593 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7594 &ctx
->tcs_out_lds_layout
);
7595 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7596 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7597 &ctx
->tcs_offchip_offset
);
7598 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
7599 &ctx
->tcs_factor_offset
);
7602 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7603 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, NULL
); /* VGPR gap */
7604 struct ac_arg rel_patch_id
; /* patch index within the wave (REL_PATCH_ID) */
7605 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &rel_patch_id
);
7606 struct ac_arg invocation_id
; /* invocation ID within the patch */
7607 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &invocation_id
);
7608 struct ac_arg tcs_out_current_patch_data_offset
; /* LDS offset where tess factors should be loaded from */
7609 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
,
7610 &tcs_out_current_patch_data_offset
);
7612 struct ac_arg tess_factors
[6];
7613 for (unsigned i
= 0; i
< 6; i
++)
7614 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_INT
, &tess_factors
[i
]);
7616 /* Create the function. */
7617 si_create_function(ctx
, "tcs_epilog", NULL
, 0,
7618 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7619 ac_declare_lds_as_pointer(&ctx
->ac
);
7621 LLVMValueRef invoc0_tess_factors
[6];
7622 for (unsigned i
= 0; i
< 6; i
++)
7623 invoc0_tess_factors
[i
] = ac_get_arg(&ctx
->ac
, tess_factors
[i
]);
7625 si_write_tess_factors(bld_base
,
7626 ac_get_arg(&ctx
->ac
, rel_patch_id
),
7627 ac_get_arg(&ctx
->ac
, invocation_id
),
7628 ac_get_arg(&ctx
->ac
, tcs_out_current_patch_data_offset
),
7629 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7631 LLVMBuildRetVoid(ctx
->ac
.builder
);
7635 * Select and compile (or reuse) TCS parts (epilog).
7637 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7638 struct ac_llvm_compiler
*compiler
,
7639 struct si_shader
*shader
,
7640 struct pipe_debug_callback
*debug
)
7642 if (sscreen
->info
.chip_class
>= GFX9
) {
7643 struct si_shader
*ls_main_part
=
7644 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7646 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7647 &shader
->key
.part
.tcs
.ls_prolog
))
7650 shader
->previous_stage
= ls_main_part
;
7653 /* Get the epilog. */
7654 union si_shader_part_key epilog_key
;
7655 memset(&epilog_key
, 0, sizeof(epilog_key
));
7656 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7658 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7659 PIPE_SHADER_TESS_CTRL
, false,
7660 &epilog_key
, compiler
, debug
,
7661 si_build_tcs_epilog_function
,
7662 "Tessellation Control Shader Epilog");
7663 return shader
->epilog
!= NULL
;
7667 * Select and compile (or reuse) GS parts (prolog).
7669 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7670 struct ac_llvm_compiler
*compiler
,
7671 struct si_shader
*shader
,
7672 struct pipe_debug_callback
*debug
)
7674 if (sscreen
->info
.chip_class
>= GFX9
) {
7675 struct si_shader
*es_main_part
;
7676 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7678 if (shader
->key
.as_ngg
)
7679 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7681 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7683 if (es_type
== PIPE_SHADER_VERTEX
&&
7684 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7685 &shader
->key
.part
.gs
.vs_prolog
))
7688 shader
->previous_stage
= es_main_part
;
7691 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7694 union si_shader_part_key prolog_key
;
7695 memset(&prolog_key
, 0, sizeof(prolog_key
));
7696 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7697 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7699 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7700 PIPE_SHADER_GEOMETRY
, true,
7701 &prolog_key
, compiler
, debug
,
7702 si_build_gs_prolog_function
,
7703 "Geometry Shader Prolog");
7704 return shader
->prolog2
!= NULL
;
7708 * Build the pixel shader prolog function. This handles:
7709 * - two-side color selection and interpolation
7710 * - overriding interpolation parameters for the API PS
7711 * - polygon stippling
7713 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7714 * overriden by other states. (e.g. per-sample interpolation)
7715 * Interpolated colors are stored after the preloaded VGPRs.
7717 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7718 union si_shader_part_key
*key
)
7720 LLVMValueRef ret
, func
;
7721 int num_returns
, i
, num_color_channels
;
7723 assert(si_need_ps_prolog(key
));
7725 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
7727 /* Declare inputs. */
7728 LLVMTypeRef return_types
[AC_MAX_ARGS
];
7730 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7731 assert(key
->ps_prolog
.num_input_sgprs
+
7732 key
->ps_prolog
.num_input_vgprs
+
7733 num_color_channels
<= AC_MAX_ARGS
);
7734 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++) {
7735 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, NULL
);
7736 return_types
[num_returns
++] = ctx
->i32
;
7740 struct ac_arg pos_fixed_pt
;
7741 struct ac_arg ancillary
;
7742 struct ac_arg param_sample_mask
;
7743 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++) {
7744 struct ac_arg
*arg
= NULL
;
7745 if (i
== key
->ps_prolog
.ancillary_vgpr_index
) {
7747 } else if (i
== key
->ps_prolog
.ancillary_vgpr_index
+ 1) {
7748 arg
= ¶m_sample_mask
;
7749 } else if (i
== key
->ps_prolog
.num_input_vgprs
- 1) {
7750 /* POS_FIXED_PT is always last. */
7751 arg
= &pos_fixed_pt
;
7753 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, arg
);
7754 return_types
[num_returns
++] = ctx
->f32
;
7757 /* Declare outputs (same as inputs + add colors if needed) */
7758 for (i
= 0; i
< num_color_channels
; i
++)
7759 return_types
[num_returns
++] = ctx
->f32
;
7761 /* Create the function. */
7762 si_create_function(ctx
, "ps_prolog", return_types
, num_returns
, 0);
7763 func
= ctx
->main_fn
;
7765 /* Copy inputs to outputs. This should be no-op, as the registers match,
7766 * but it will prevent the compiler from overwriting them unintentionally.
7768 ret
= ctx
->return_value
;
7769 for (i
= 0; i
< ctx
->args
.arg_count
; i
++) {
7770 LLVMValueRef p
= LLVMGetParam(func
, i
);
7771 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7774 /* Polygon stippling. */
7775 if (key
->ps_prolog
.states
.poly_stipple
) {
7776 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7778 si_llvm_emit_polygon_stipple(ctx
, list
, pos_fixed_pt
);
7781 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7782 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7783 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7784 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7786 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7787 * The hw doesn't compute CENTROID if the whole wave only
7788 * contains fully-covered quads.
7790 * PRIM_MASK is after user SGPRs.
7792 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7793 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7794 LLVMConstInt(ctx
->i32
, 31, 0), "");
7795 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7798 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7799 /* Read PERSP_CENTER. */
7800 for (i
= 0; i
< 2; i
++)
7801 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7802 /* Read PERSP_CENTROID. */
7803 for (i
= 0; i
< 2; i
++)
7804 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7805 /* Select PERSP_CENTROID. */
7806 for (i
= 0; i
< 2; i
++) {
7807 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7808 center
[i
], centroid
[i
], "");
7809 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7810 tmp
, base
+ 4 + i
, "");
7813 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7814 /* Read LINEAR_CENTER. */
7815 for (i
= 0; i
< 2; i
++)
7816 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7817 /* Read LINEAR_CENTROID. */
7818 for (i
= 0; i
< 2; i
++)
7819 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7820 /* Select LINEAR_CENTROID. */
7821 for (i
= 0; i
< 2; i
++) {
7822 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7823 center
[i
], centroid
[i
], "");
7824 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7825 tmp
, base
+ 10 + i
, "");
7830 /* Force per-sample interpolation. */
7831 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7832 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7833 LLVMValueRef persp_sample
[2];
7835 /* Read PERSP_SAMPLE. */
7836 for (i
= 0; i
< 2; i
++)
7837 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7838 /* Overwrite PERSP_CENTER. */
7839 for (i
= 0; i
< 2; i
++)
7840 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7841 persp_sample
[i
], base
+ 2 + i
, "");
7842 /* Overwrite PERSP_CENTROID. */
7843 for (i
= 0; i
< 2; i
++)
7844 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7845 persp_sample
[i
], base
+ 4 + i
, "");
7847 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7848 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7849 LLVMValueRef linear_sample
[2];
7851 /* Read LINEAR_SAMPLE. */
7852 for (i
= 0; i
< 2; i
++)
7853 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7854 /* Overwrite LINEAR_CENTER. */
7855 for (i
= 0; i
< 2; i
++)
7856 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7857 linear_sample
[i
], base
+ 8 + i
, "");
7858 /* Overwrite LINEAR_CENTROID. */
7859 for (i
= 0; i
< 2; i
++)
7860 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7861 linear_sample
[i
], base
+ 10 + i
, "");
7864 /* Force center interpolation. */
7865 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7866 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7867 LLVMValueRef persp_center
[2];
7869 /* Read PERSP_CENTER. */
7870 for (i
= 0; i
< 2; i
++)
7871 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7872 /* Overwrite PERSP_SAMPLE. */
7873 for (i
= 0; i
< 2; i
++)
7874 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7875 persp_center
[i
], base
+ i
, "");
7876 /* Overwrite PERSP_CENTROID. */
7877 for (i
= 0; i
< 2; i
++)
7878 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7879 persp_center
[i
], base
+ 4 + i
, "");
7881 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7882 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7883 LLVMValueRef linear_center
[2];
7885 /* Read LINEAR_CENTER. */
7886 for (i
= 0; i
< 2; i
++)
7887 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7888 /* Overwrite LINEAR_SAMPLE. */
7889 for (i
= 0; i
< 2; i
++)
7890 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7891 linear_center
[i
], base
+ 6 + i
, "");
7892 /* Overwrite LINEAR_CENTROID. */
7893 for (i
= 0; i
< 2; i
++)
7894 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7895 linear_center
[i
], base
+ 10 + i
, "");
7898 /* Interpolate colors. */
7899 unsigned color_out_idx
= 0;
7900 for (i
= 0; i
< 2; i
++) {
7901 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7902 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7903 key
->ps_prolog
.face_vgpr_index
;
7904 LLVMValueRef interp
[2], color
[4];
7905 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7910 /* If the interpolation qualifier is not CONSTANT (-1). */
7911 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7912 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7913 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7915 /* Get the (i,j) updated by bc_optimize handling. */
7916 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7918 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7919 interp_vgpr
+ 1, "");
7920 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7923 /* Use the absolute location of the input. */
7924 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7926 if (key
->ps_prolog
.states
.color_two_side
) {
7927 face
= LLVMGetParam(func
, face_vgpr
);
7928 face
= ac_to_integer(&ctx
->ac
, face
);
7931 interp_fs_input(ctx
,
7932 key
->ps_prolog
.color_attr_index
[i
],
7933 TGSI_SEMANTIC_COLOR
, i
,
7934 key
->ps_prolog
.num_interp_inputs
,
7935 key
->ps_prolog
.colors_read
, interp_ij
,
7936 prim_mask
, face
, color
);
7939 unsigned chan
= u_bit_scan(&writemask
);
7940 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7941 ctx
->args
.arg_count
+ color_out_idx
++, "");
7945 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7948 * "When per-sample shading is active due to the use of a fragment
7949 * input qualified by sample or due to the use of the gl_SampleID
7950 * or gl_SamplePosition variables, only the bit for the current
7951 * sample is set in gl_SampleMaskIn. When state specifies multiple
7952 * fragment shader invocations for a given fragment, the sample
7953 * mask for any single fragment shader invocation may specify a
7954 * subset of the covered samples for the fragment. In this case,
7955 * the bit corresponding to each covered sample will be set in
7956 * exactly one fragment shader invocation."
7958 * The samplemask loaded by hardware is always the coverage of the
7959 * entire pixel/fragment, so mask bits out based on the sample ID.
7961 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7962 /* The bit pattern matches that used by fixed function fragment
7964 static const uint16_t ps_iter_masks
[] = {
7965 0xffff, /* not used */
7971 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7973 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7974 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary
, 8, 4);
7975 LLVMValueRef samplemask
= ac_get_arg(&ctx
->ac
, param_sample_mask
);
7977 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7978 samplemask
= LLVMBuildAnd(
7981 LLVMBuildShl(ctx
->ac
.builder
,
7982 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7985 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7987 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7988 param_sample_mask
.arg_index
, "");
7991 /* Tell LLVM to insert WQM instruction sequence when needed. */
7992 if (key
->ps_prolog
.wqm
) {
7993 LLVMAddTargetDependentFunctionAttr(func
,
7994 "amdgpu-ps-wqm-outputs", "");
7997 si_llvm_build_ret(ctx
, ret
);
8001 * Build the pixel shader epilog function. This handles everything that must be
8002 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8004 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8005 union si_shader_part_key
*key
)
8007 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8008 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8010 struct si_ps_exports exp
= {};
8012 memset(&ctx
->args
, 0, sizeof(ctx
->args
));
8014 /* Declare input SGPRs. */
8015 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
, &ctx
->rw_buffers
);
8016 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8017 &ctx
->bindless_samplers_and_images
);
8018 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8019 &ctx
->const_and_shader_buffers
);
8020 ac_add_arg(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_INT
,
8021 &ctx
->samplers_and_images
);
8022 add_arg_checked(&ctx
->args
, AC_ARG_SGPR
, 1, AC_ARG_FLOAT
,
8023 NULL
, SI_PARAM_ALPHA_REF
);
8025 /* Declare input VGPRs. */
8026 unsigned required_num_params
=
8027 ctx
->args
.num_sgprs_used
+
8028 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8029 key
->ps_epilog
.writes_z
+
8030 key
->ps_epilog
.writes_stencil
+
8031 key
->ps_epilog
.writes_samplemask
;
8033 required_num_params
= MAX2(required_num_params
,
8034 ctx
->args
.num_sgprs_used
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8036 while (ctx
->args
.arg_count
< required_num_params
)
8037 ac_add_arg(&ctx
->args
, AC_ARG_VGPR
, 1, AC_ARG_FLOAT
, NULL
);
8039 /* Create the function. */
8040 si_create_function(ctx
, "ps_epilog", NULL
, 0, 0);
8041 /* Disable elimination of unused inputs. */
8042 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8043 "InitialPSInputAddr", 0xffffff);
8045 /* Process colors. */
8046 unsigned vgpr
= ctx
->args
.num_sgprs_used
;
8047 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8048 int last_color_export
= -1;
8050 /* Find the last color export. */
8051 if (!key
->ps_epilog
.writes_z
&&
8052 !key
->ps_epilog
.writes_stencil
&&
8053 !key
->ps_epilog
.writes_samplemask
) {
8054 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8056 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8057 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8058 /* Just set this if any of the colorbuffers are enabled. */
8060 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8061 last_color_export
= 0;
8063 for (i
= 0; i
< 8; i
++)
8064 if (colors_written
& (1 << i
) &&
8065 (spi_format
>> (i
* 4)) & 0xf)
8066 last_color_export
= i
;
8070 while (colors_written
) {
8071 LLVMValueRef color
[4];
8072 int mrt
= u_bit_scan(&colors_written
);
8074 for (i
= 0; i
< 4; i
++)
8075 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8077 si_export_mrt_color(bld_base
, color
, mrt
,
8078 ctx
->args
.arg_count
- 1,
8079 mrt
== last_color_export
, &exp
);
8082 /* Process depth, stencil, samplemask. */
8083 if (key
->ps_epilog
.writes_z
)
8084 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8085 if (key
->ps_epilog
.writes_stencil
)
8086 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8087 if (key
->ps_epilog
.writes_samplemask
)
8088 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8090 if (depth
|| stencil
|| samplemask
)
8091 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8092 else if (last_color_export
== -1)
8093 ac_build_export_null(&ctx
->ac
);
8096 si_emit_ps_exports(ctx
, &exp
);
8099 LLVMBuildRetVoid(ctx
->ac
.builder
);
8103 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8105 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8106 struct ac_llvm_compiler
*compiler
,
8107 struct si_shader
*shader
,
8108 struct pipe_debug_callback
*debug
)
8110 union si_shader_part_key prolog_key
;
8111 union si_shader_part_key epilog_key
;
8113 /* Get the prolog. */
8114 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8116 /* The prolog is a no-op if these aren't set. */
8117 if (si_need_ps_prolog(&prolog_key
)) {
8119 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8120 PIPE_SHADER_FRAGMENT
, true,
8121 &prolog_key
, compiler
, debug
,
8122 si_build_ps_prolog_function
,
8123 "Fragment Shader Prolog");
8124 if (!shader
->prolog
)
8128 /* Get the epilog. */
8129 si_get_ps_epilog_key(shader
, &epilog_key
);
8132 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8133 PIPE_SHADER_FRAGMENT
, false,
8134 &epilog_key
, compiler
, debug
,
8135 si_build_ps_epilog_function
,
8136 "Fragment Shader Epilog");
8137 if (!shader
->epilog
)
8140 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8141 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8142 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8143 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8146 /* Set up the enable bits for per-sample shading if needed. */
8147 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8148 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8149 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8150 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8151 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8152 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8154 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8155 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8156 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8157 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8158 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8159 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8161 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8162 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8163 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8164 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8165 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8166 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8168 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8169 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8170 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8171 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8172 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8173 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8176 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8177 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8178 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8179 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8180 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8183 /* At least one pair of interpolation weights must be enabled. */
8184 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8185 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8186 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8189 /* Samplemask fixup requires the sample ID. */
8190 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8191 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8192 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8195 /* The sample mask input is always enabled, because the API shader always
8196 * passes it through to the epilog. Disable it here if it's unused.
8198 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8199 !shader
->selector
->info
.reads_samplemask
)
8200 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8205 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8208 /* If tessellation is all offchip and on-chip GS isn't used, this
8209 * workaround is not needed.
8213 /* SPI barrier management bug:
8214 * Make sure we have at least 4k of LDS in use to avoid the bug.
8215 * It applies to workgroup sizes of more than one wavefront.
8217 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8218 sscreen
->info
.family
== CHIP_KABINI
)
8219 *lds_size
= MAX2(*lds_size
, 8);
8222 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8223 struct si_shader
*shader
)
8225 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8227 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8229 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8230 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8231 si_multiwave_lds_size_workaround(sscreen
,
8232 &shader
->config
.lds_size
);
8236 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8237 struct si_shader
*shader
,
8238 struct pipe_debug_callback
*debug
)
8240 struct si_shader_selector
*sel
= shader
->selector
;
8241 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8244 /* LS, ES, VS are compiled on demand if the main part hasn't been
8245 * compiled for that stage.
8247 * GS are compiled on demand if the main part hasn't been compiled
8248 * for the chosen NGG-ness.
8250 * Vertex shaders are compiled on demand when a vertex fetch
8251 * workaround must be applied.
8253 if (shader
->is_monolithic
) {
8254 /* Monolithic shader (compiled as a whole, has many variants,
8255 * may take a long time to compile).
8257 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8261 /* The shader consists of several parts:
8263 * - the middle part is the user shader, it has 1 variant only
8264 * and it was compiled during the creation of the shader
8266 * - the prolog part is inserted at the beginning
8267 * - the epilog part is inserted at the end
8269 * The prolog and epilog have many (but simple) variants.
8271 * Starting with gfx9, geometry and tessellation control
8272 * shaders also contain the prolog and user shader parts of
8273 * the previous shader stage.
8279 /* Copy the compiled TGSI shader data over. */
8280 shader
->is_binary_shared
= true;
8281 shader
->binary
= mainp
->binary
;
8282 shader
->config
= mainp
->config
;
8283 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8284 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8285 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8286 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8287 memcpy(shader
->info
.vs_output_param_offset
,
8288 mainp
->info
.vs_output_param_offset
,
8289 sizeof(mainp
->info
.vs_output_param_offset
));
8290 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8291 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8292 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8294 /* Select prologs and/or epilogs. */
8295 switch (sel
->type
) {
8296 case PIPE_SHADER_VERTEX
:
8297 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8300 case PIPE_SHADER_TESS_CTRL
:
8301 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8304 case PIPE_SHADER_TESS_EVAL
:
8306 case PIPE_SHADER_GEOMETRY
:
8307 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8310 case PIPE_SHADER_FRAGMENT
:
8311 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8314 /* Make sure we have at least as many VGPRs as there
8315 * are allocated inputs.
8317 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8318 shader
->info
.num_input_vgprs
);
8323 /* Update SGPR and VGPR counts. */
8324 if (shader
->prolog
) {
8325 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8326 shader
->prolog
->config
.num_sgprs
);
8327 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8328 shader
->prolog
->config
.num_vgprs
);
8330 if (shader
->previous_stage
) {
8331 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8332 shader
->previous_stage
->config
.num_sgprs
);
8333 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8334 shader
->previous_stage
->config
.num_vgprs
);
8335 shader
->config
.spilled_sgprs
=
8336 MAX2(shader
->config
.spilled_sgprs
,
8337 shader
->previous_stage
->config
.spilled_sgprs
);
8338 shader
->config
.spilled_vgprs
=
8339 MAX2(shader
->config
.spilled_vgprs
,
8340 shader
->previous_stage
->config
.spilled_vgprs
);
8341 shader
->info
.private_mem_vgprs
=
8342 MAX2(shader
->info
.private_mem_vgprs
,
8343 shader
->previous_stage
->info
.private_mem_vgprs
);
8344 shader
->config
.scratch_bytes_per_wave
=
8345 MAX2(shader
->config
.scratch_bytes_per_wave
,
8346 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8347 shader
->info
.uses_instanceid
|=
8348 shader
->previous_stage
->info
.uses_instanceid
;
8350 if (shader
->prolog2
) {
8351 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8352 shader
->prolog2
->config
.num_sgprs
);
8353 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8354 shader
->prolog2
->config
.num_vgprs
);
8356 if (shader
->epilog
) {
8357 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8358 shader
->epilog
->config
.num_sgprs
);
8359 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8360 shader
->epilog
->config
.num_vgprs
);
8362 si_calculate_max_simd_waves(shader
);
8365 if (shader
->key
.as_ngg
) {
8366 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8367 gfx10_ngg_calculate_subgroup_info(shader
);
8368 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8369 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8372 si_fix_resource_usage(sscreen
, shader
);
8373 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8376 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8377 fprintf(stderr
, "LLVM failed to upload shader\n");
8384 void si_shader_destroy(struct si_shader
*shader
)
8386 if (shader
->scratch_bo
)
8387 si_resource_reference(&shader
->scratch_bo
, NULL
);
8389 si_resource_reference(&shader
->bo
, NULL
);
8391 if (!shader
->is_binary_shared
)
8392 si_shader_binary_clean(&shader
->binary
);
8394 free(shader
->shader_log
);