2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_strings.h"
29 #include "tgsi/tgsi_util.h"
30 #include "tgsi/tgsi_dump.h"
31 #include "tgsi/tgsi_from_mesa.h"
33 #include "ac_binary.h"
34 #include "ac_exp_param.h"
35 #include "ac_shader_util.h"
37 #include "ac_llvm_util.h"
38 #include "si_shader_internal.h"
42 #include "compiler/nir/nir.h"
44 static const char scratch_rsrc_dword0_symbol
[] =
45 "SCRATCH_RSRC_DWORD0";
47 static const char scratch_rsrc_dword1_symbol
[] =
48 "SCRATCH_RSRC_DWORD1";
50 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
51 struct si_screen
*sscreen
,
52 struct ac_llvm_compiler
*compiler
);
54 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
55 struct lp_build_tgsi_context
*bld_base
,
56 struct lp_build_emit_data
*emit_data
);
58 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
61 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
62 union si_shader_part_key
*key
);
63 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
64 union si_shader_part_key
*key
);
65 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
66 union si_shader_part_key
*key
);
67 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
68 union si_shader_part_key
*key
);
69 static void si_fix_resource_usage(struct si_screen
*sscreen
,
70 struct si_shader
*shader
);
72 /* Ideally pass the sample mask input to the PS epilog as v14, which
73 * is its usual location, so that the shader doesn't have to add v_mov.
75 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
77 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
80 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
86 /** Whether the shader runs as a combination of multiple API shaders */
87 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
89 if (ctx
->screen
->info
.chip_class
<= GFX8
)
92 return ctx
->shader
->key
.as_ls
||
93 ctx
->shader
->key
.as_es
||
94 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
95 ctx
->type
== PIPE_SHADER_GEOMETRY
;
98 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
99 static bool is_merged_shader(struct si_shader_context
*ctx
)
101 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
104 void si_init_function_info(struct si_function_info
*fninfo
)
106 fninfo
->num_params
= 0;
107 fninfo
->num_sgpr_params
= 0;
110 unsigned add_arg_assign(struct si_function_info
*fninfo
,
111 enum si_arg_regfile regfile
, LLVMTypeRef type
,
112 LLVMValueRef
*assign
)
114 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
116 unsigned idx
= fninfo
->num_params
++;
117 assert(idx
< ARRAY_SIZE(fninfo
->types
));
119 if (regfile
== ARG_SGPR
)
120 fninfo
->num_sgpr_params
= fninfo
->num_params
;
122 fninfo
->types
[idx
] = type
;
123 fninfo
->assign
[idx
] = assign
;
127 static unsigned add_arg(struct si_function_info
*fninfo
,
128 enum si_arg_regfile regfile
, LLVMTypeRef type
)
130 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
133 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
134 enum si_arg_regfile regfile
, LLVMTypeRef type
,
135 LLVMValueRef
*assign
, unsigned idx
)
137 MAYBE_UNUSED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
138 assert(actual
== idx
);
141 static void add_arg_checked(struct si_function_info
*fninfo
,
142 enum si_arg_regfile regfile
, LLVMTypeRef type
,
145 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
149 * Returns a unique index for a per-patch semantic name and index. The index
150 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
153 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
155 switch (semantic_name
) {
156 case TGSI_SEMANTIC_TESSOUTER
:
158 case TGSI_SEMANTIC_TESSINNER
:
160 case TGSI_SEMANTIC_PATCH
:
165 assert(!"invalid semantic name");
171 * Returns a unique index for a semantic name and index. The index must be
172 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
175 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
178 switch (semantic_name
) {
179 case TGSI_SEMANTIC_POSITION
:
181 case TGSI_SEMANTIC_GENERIC
:
182 /* Since some shader stages use the the highest used IO index
183 * to determine the size to allocate for inputs/outputs
184 * (in LDS, tess and GS rings). GENERIC should be placed right
185 * after POSITION to make that size as small as possible.
187 if (index
< SI_MAX_IO_GENERIC
)
190 assert(!"invalid generic index");
192 case TGSI_SEMANTIC_PSIZE
:
193 return SI_MAX_IO_GENERIC
+ 1;
194 case TGSI_SEMANTIC_CLIPDIST
:
196 return SI_MAX_IO_GENERIC
+ 2 + index
;
197 case TGSI_SEMANTIC_FOG
:
198 return SI_MAX_IO_GENERIC
+ 4;
199 case TGSI_SEMANTIC_LAYER
:
200 return SI_MAX_IO_GENERIC
+ 5;
201 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
202 return SI_MAX_IO_GENERIC
+ 6;
203 case TGSI_SEMANTIC_PRIMID
:
204 return SI_MAX_IO_GENERIC
+ 7;
205 case TGSI_SEMANTIC_COLOR
:
207 return SI_MAX_IO_GENERIC
+ 8 + index
;
208 case TGSI_SEMANTIC_BCOLOR
:
210 /* If it's a varying, COLOR and BCOLOR alias. */
212 return SI_MAX_IO_GENERIC
+ 8 + index
;
214 return SI_MAX_IO_GENERIC
+ 10 + index
;
215 case TGSI_SEMANTIC_TEXCOORD
:
217 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 12 + 8 <= 63);
218 return SI_MAX_IO_GENERIC
+ 12 + index
;
219 case TGSI_SEMANTIC_CLIPVERTEX
:
222 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
223 assert(!"invalid semantic name");
229 * Get the value of a shader input parameter and extract a bitfield.
231 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
232 LLVMValueRef value
, unsigned rshift
,
235 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
236 value
= ac_to_integer(&ctx
->ac
, value
);
239 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
240 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
242 if (rshift
+ bitwidth
< 32) {
243 unsigned mask
= (1 << bitwidth
) - 1;
244 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
245 LLVMConstInt(ctx
->i32
, mask
, 0), "");
251 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
252 unsigned param
, unsigned rshift
,
255 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
257 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
260 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
263 case PIPE_SHADER_TESS_CTRL
:
264 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
266 case PIPE_SHADER_TESS_EVAL
:
267 return LLVMGetParam(ctx
->main_fn
,
268 ctx
->param_tes_rel_patch_id
);
276 /* Tessellation shaders pass outputs to the next shader using LDS.
278 * LS outputs = TCS inputs
279 * TCS outputs = TES inputs
282 * - TCS inputs for patch 0
283 * - TCS inputs for patch 1
284 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
286 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
287 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
288 * - TCS outputs for patch 1
289 * - Per-patch TCS outputs for patch 1
290 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
291 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
294 * All three shaders VS(LS), TCS, TES share the same LDS space.
298 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
300 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
303 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
305 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
307 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
308 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
310 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
313 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
315 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
317 return LLVMConstInt(ctx
->i32
, stride
, 0);
320 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
322 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
323 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
325 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
326 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
327 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
328 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
329 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
330 num_patch_outputs
* 4;
331 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
335 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
337 return LLVMBuildMul(ctx
->ac
.builder
,
339 ctx
->param_tcs_out_lds_offsets
,
341 LLVMConstInt(ctx
->i32
, 4, 0), "");
345 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
347 return LLVMBuildMul(ctx
->ac
.builder
,
349 ctx
->param_tcs_out_lds_offsets
,
351 LLVMConstInt(ctx
->i32
, 4, 0), "");
355 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
357 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
358 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
360 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
364 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
366 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
367 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
368 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
370 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
374 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
376 LLVMValueRef patch0_patch_data_offset
=
377 get_tcs_out_patch0_patch_data_offset(ctx
);
378 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
379 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
381 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
384 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
386 unsigned tcs_out_vertices
=
387 ctx
->shader
->selector
?
388 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
390 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
391 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
392 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
394 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
397 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
402 case PIPE_SHADER_VERTEX
:
403 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
404 return LLVMConstInt(ctx
->i32
, stride
, 0);
406 case PIPE_SHADER_TESS_CTRL
:
407 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
408 ctx
->shader
->is_monolithic
) {
409 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
410 return LLVMConstInt(ctx
->i32
, stride
, 0);
412 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
420 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
421 LLVMValueRef i32
, unsigned index
)
426 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
427 LLVMConstInt(ctx
->i32
, 16, 0), "");
429 return LLVMBuildSExt(ctx
->ac
.builder
,
430 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
435 void si_llvm_load_input_vs(
436 struct si_shader_context
*ctx
,
437 unsigned input_index
,
440 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
441 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
443 if (vs_blit_property
) {
444 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
445 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
446 LLVMIntULE
, vertex_id
,
448 /* Use LLVMIntNE, because we have 3 vertices and only
449 * the middle one should use y2.
451 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
452 LLVMIntNE
, vertex_id
,
455 if (input_index
== 0) {
457 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
458 ctx
->param_vs_blit_inputs
);
459 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
460 ctx
->param_vs_blit_inputs
+ 1);
462 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
463 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
464 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
465 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
467 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
469 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
472 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
473 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
474 out
[2] = LLVMGetParam(ctx
->main_fn
,
475 ctx
->param_vs_blit_inputs
+ 2);
476 out
[3] = ctx
->ac
.f32_1
;
480 /* Color or texture coordinates: */
481 assert(input_index
== 1);
483 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
484 for (int i
= 0; i
< 4; i
++) {
485 out
[i
] = LLVMGetParam(ctx
->main_fn
,
486 ctx
->param_vs_blit_inputs
+ 3 + i
);
489 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
490 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
491 ctx
->param_vs_blit_inputs
+ 3);
492 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
493 ctx
->param_vs_blit_inputs
+ 4);
494 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
495 ctx
->param_vs_blit_inputs
+ 5);
496 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
497 ctx
->param_vs_blit_inputs
+ 6);
499 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
501 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
503 out
[2] = LLVMGetParam(ctx
->main_fn
,
504 ctx
->param_vs_blit_inputs
+ 7);
505 out
[3] = LLVMGetParam(ctx
->main_fn
,
506 ctx
->param_vs_blit_inputs
+ 8);
511 union si_vs_fix_fetch fix_fetch
;
512 LLVMValueRef t_list_ptr
;
513 LLVMValueRef t_offset
;
515 LLVMValueRef vertex_index
;
518 /* Load the T list */
519 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
521 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
523 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
525 vertex_index
= LLVMGetParam(ctx
->main_fn
,
526 ctx
->param_vertex_index0
+
529 /* Use the open-coded implementation for all loads of doubles and
530 * of dword-sized data that needs fixups. We need to insert conversion
531 * code anyway, and the amd/common code does it for us.
533 * Note: On LLVM <= 8, we can only open-code formats with
534 * channel size >= 4 bytes.
536 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
537 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
539 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
540 (fix_fetch
.u
.log_size
== 2)) {
541 tmp
= ac_build_opencoded_load_format(
542 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
543 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
544 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
,
546 for (unsigned i
= 0; i
< 4; ++i
)
547 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
551 /* Do multiple loads for special formats. */
552 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
553 LLVMValueRef fetches
[4];
554 unsigned num_fetches
;
555 unsigned fetch_stride
;
556 unsigned channels_per_fetch
;
558 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
559 num_fetches
= MIN2(required_channels
, 3);
560 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
561 channels_per_fetch
= 1;
565 channels_per_fetch
= required_channels
;
568 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
569 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
570 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
571 channels_per_fetch
, false, true);
574 if (num_fetches
== 1 && channels_per_fetch
> 1) {
575 LLVMValueRef fetch
= fetches
[0];
576 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
577 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
578 fetches
[i
] = LLVMBuildExtractElement(
579 ctx
->ac
.builder
, fetch
, tmp
, "");
581 num_fetches
= channels_per_fetch
;
582 channels_per_fetch
= 1;
585 for (unsigned i
= num_fetches
; i
< 4; ++i
)
586 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
588 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
589 required_channels
== 4) {
590 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
591 fetches
[3] = ctx
->ac
.i32_1
;
593 fetches
[3] = ctx
->ac
.f32_1
;
594 } else if (fix_fetch
.u
.log_size
== 3 &&
595 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
596 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
597 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
598 required_channels
== 4) {
599 /* For 2_10_10_10, the hardware returns an unsigned value;
600 * convert it to a signed one.
602 LLVMValueRef tmp
= fetches
[3];
603 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
605 /* First, recover the sign-extended signed integer value. */
606 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
607 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
609 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
611 /* For the integer-like cases, do a natural sign extension.
613 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
614 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
617 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
618 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
619 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
620 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
622 /* Convert back to the right type. */
623 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
625 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
626 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
627 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
628 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
629 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
630 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
636 for (unsigned i
= 0; i
< 4; ++i
)
637 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
640 static void declare_input_vs(
641 struct si_shader_context
*ctx
,
642 unsigned input_index
,
643 const struct tgsi_full_declaration
*decl
,
646 si_llvm_load_input_vs(ctx
, input_index
, out
);
649 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
656 case PIPE_SHADER_VERTEX
:
657 return LLVMGetParam(ctx
->main_fn
,
658 ctx
->param_vs_prim_id
);
659 case PIPE_SHADER_TESS_CTRL
:
660 return ctx
->abi
.tcs_patch_id
;
661 case PIPE_SHADER_TESS_EVAL
:
662 return ctx
->abi
.tes_patch_id
;
663 case PIPE_SHADER_GEOMETRY
:
664 return ctx
->abi
.gs_prim_id
;
672 * Return the value of tgsi_ind_register for indexing.
673 * This is the indirect index with the constant offset added to it.
675 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
676 const struct tgsi_ind_register
*ind
,
682 if (ind
->File
== TGSI_FILE_ADDRESS
) {
683 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
684 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
686 struct tgsi_full_src_register src
= {};
688 src
.Register
.File
= ind
->File
;
689 src
.Register
.Index
= ind
->Index
;
691 /* Set the second index to 0 for constants. */
692 if (ind
->File
== TGSI_FILE_CONSTANT
)
693 src
.Register
.Dimension
= 1;
695 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
698 result
= ac_to_integer(&ctx
->ac
, result
);
701 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
702 LLVMConstInt(ctx
->i32
, rel_index
, 0));
706 * Like si_get_indirect_index, but restricts the return value to a (possibly
707 * undefined) value inside [0..num).
709 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
710 const struct tgsi_ind_register
*ind
,
711 int rel_index
, unsigned num
)
713 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
715 return si_llvm_bound_index(ctx
, result
, num
);
718 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
719 LLVMValueRef vertex_dw_stride
,
720 LLVMValueRef base_addr
,
721 LLVMValueRef vertex_index
,
722 LLVMValueRef param_index
,
723 unsigned input_index
,
728 if (vertex_dw_stride
) {
729 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
730 vertex_dw_stride
, base_addr
);
734 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
735 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
738 int param
= is_patch
?
739 si_shader_io_get_unique_index_patch(name
[input_index
],
740 index
[input_index
]) :
741 si_shader_io_get_unique_index(name
[input_index
],
742 index
[input_index
], false);
744 /* Add the base address of the element. */
745 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
746 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
750 * Calculate a dword address given an input or output register and a stride.
752 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
753 const struct tgsi_full_dst_register
*dst
,
754 const struct tgsi_full_src_register
*src
,
755 LLVMValueRef vertex_dw_stride
,
756 LLVMValueRef base_addr
)
758 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
759 ubyte
*name
, *index
, *array_first
;
761 struct tgsi_full_dst_register reg
;
762 LLVMValueRef vertex_index
= NULL
;
763 LLVMValueRef ind_index
= NULL
;
765 /* Set the register description. The address computation is the same
766 * for sources and destinations. */
768 reg
.Register
.File
= src
->Register
.File
;
769 reg
.Register
.Index
= src
->Register
.Index
;
770 reg
.Register
.Indirect
= src
->Register
.Indirect
;
771 reg
.Register
.Dimension
= src
->Register
.Dimension
;
772 reg
.Indirect
= src
->Indirect
;
773 reg
.Dimension
= src
->Dimension
;
774 reg
.DimIndirect
= src
->DimIndirect
;
778 /* If the register is 2-dimensional (e.g. an array of vertices
779 * in a primitive), calculate the base address of the vertex. */
780 if (reg
.Register
.Dimension
) {
781 if (reg
.Dimension
.Indirect
)
782 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
783 1, reg
.Dimension
.Index
);
785 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
788 /* Get information about the register. */
789 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
790 name
= info
->input_semantic_name
;
791 index
= info
->input_semantic_index
;
792 array_first
= info
->input_array_first
;
793 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
794 name
= info
->output_semantic_name
;
795 index
= info
->output_semantic_index
;
796 array_first
= info
->output_array_first
;
802 if (reg
.Register
.Indirect
) {
803 /* Add the relative address of the element. */
804 if (reg
.Indirect
.ArrayID
)
805 input_index
= array_first
[reg
.Indirect
.ArrayID
];
807 input_index
= reg
.Register
.Index
;
809 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
810 1, reg
.Register
.Index
- input_index
);
812 input_index
= reg
.Register
.Index
;
815 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
816 base_addr
, vertex_index
,
817 ind_index
, input_index
,
819 !reg
.Register
.Dimension
);
822 /* The offchip buffer layout for TCS->TES is
824 * - attribute 0 of patch 0 vertex 0
825 * - attribute 0 of patch 0 vertex 1
826 * - attribute 0 of patch 0 vertex 2
828 * - attribute 0 of patch 1 vertex 0
829 * - attribute 0 of patch 1 vertex 1
831 * - attribute 1 of patch 0 vertex 0
832 * - attribute 1 of patch 0 vertex 1
834 * - per patch attribute 0 of patch 0
835 * - per patch attribute 0 of patch 1
838 * Note that every attribute has 4 components.
840 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
841 LLVMValueRef rel_patch_id
,
842 LLVMValueRef vertex_index
,
843 LLVMValueRef param_index
)
845 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
846 LLVMValueRef param_stride
, constant16
;
848 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
849 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
850 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
853 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
855 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
856 vertices_per_patch
, vertex_index
);
857 param_stride
= total_vertices
;
859 base_addr
= rel_patch_id
;
860 param_stride
= num_patches
;
863 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
864 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
867 LLVMValueRef patch_data_offset
=
868 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
870 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
871 patch_data_offset
, "");
876 /* This is a generic helper that can be shared by the NIR and TGSI backends */
877 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
878 struct si_shader_context
*ctx
,
879 LLVMValueRef vertex_index
,
880 LLVMValueRef param_index
,
886 unsigned param_index_base
;
888 param_index_base
= is_patch
?
889 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
890 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
893 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
894 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
897 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
900 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
901 vertex_index
, param_index
);
904 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
905 struct si_shader_context
*ctx
,
906 const struct tgsi_full_dst_register
*dst
,
907 const struct tgsi_full_src_register
*src
)
909 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
910 ubyte
*name
, *index
, *array_first
;
911 struct tgsi_full_src_register reg
;
912 LLVMValueRef vertex_index
= NULL
;
913 LLVMValueRef param_index
= NULL
;
916 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
918 if (reg
.Register
.Dimension
) {
920 if (reg
.Dimension
.Indirect
)
921 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
922 1, reg
.Dimension
.Index
);
924 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
927 /* Get information about the register. */
928 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
929 name
= info
->input_semantic_name
;
930 index
= info
->input_semantic_index
;
931 array_first
= info
->input_array_first
;
932 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
933 name
= info
->output_semantic_name
;
934 index
= info
->output_semantic_index
;
935 array_first
= info
->output_array_first
;
941 if (reg
.Register
.Indirect
) {
942 if (reg
.Indirect
.ArrayID
)
943 param_base
= array_first
[reg
.Indirect
.ArrayID
];
945 param_base
= reg
.Register
.Index
;
947 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
948 1, reg
.Register
.Index
- param_base
);
951 param_base
= reg
.Register
.Index
;
954 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
955 param_index
, param_base
,
956 name
, index
, !reg
.Register
.Dimension
);
959 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
960 LLVMTypeRef type
, unsigned swizzle
,
961 LLVMValueRef buffer
, LLVMValueRef offset
,
962 LLVMValueRef base
, bool can_speculate
)
964 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
965 LLVMValueRef value
, value2
;
966 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
969 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
970 0, 1, 0, can_speculate
, false);
972 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
975 if (!llvm_type_is_64bit(ctx
, type
)) {
976 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
977 0, 1, 0, can_speculate
, false);
979 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
980 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
981 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
984 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
985 swizzle
* 4, 1, 0, can_speculate
, false);
987 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
988 swizzle
* 4 + 4, 1, 0, can_speculate
, false);
990 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
994 * Load from LSHS LDS storage.
996 * \param type output value type
997 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
998 * \param dw_addr address in dwords
1000 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
1001 LLVMTypeRef type
, unsigned swizzle
,
1002 LLVMValueRef dw_addr
)
1004 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1007 if (swizzle
== ~0) {
1008 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1010 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1011 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
1013 return ac_build_gather_values(&ctx
->ac
, values
,
1017 /* Split 64-bit loads. */
1018 if (llvm_type_is_64bit(ctx
, type
)) {
1019 LLVMValueRef lo
, hi
;
1021 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1022 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1023 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1026 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1027 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1029 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1031 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1035 * Store to LSHS LDS storage.
1037 * \param swizzle offset (typically 0..3)
1038 * \param dw_addr address in dwords
1039 * \param value value to store
1041 static void lshs_lds_store(struct si_shader_context
*ctx
,
1042 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1045 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1046 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1048 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1053 TESS_OFFCHIP_RING_TCS
,
1054 TESS_OFFCHIP_RING_TES
,
1057 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1058 enum si_tess_ring ring
)
1060 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1061 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1062 ctx
->param_tcs_out_lds_layout
;
1063 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1065 /* TCS only receives high 13 bits of the address. */
1066 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1067 addr
= LLVMBuildAnd(builder
, addr
,
1068 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1071 if (ring
== TCS_FACTOR_RING
) {
1072 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1073 addr
= LLVMBuildAdd(builder
, addr
,
1074 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1077 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1078 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1079 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1080 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1082 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1083 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1084 S_008F0C_OOB_SELECT(3) |
1085 S_008F0C_RESOURCE_LEVEL(1);
1087 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1088 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1090 LLVMValueRef desc
[4];
1092 desc
[1] = LLVMConstInt(ctx
->i32
,
1093 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1094 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1095 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1097 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1100 static LLVMValueRef
fetch_input_tcs(
1101 struct lp_build_tgsi_context
*bld_base
,
1102 const struct tgsi_full_src_register
*reg
,
1103 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1105 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1106 LLVMValueRef dw_addr
, stride
;
1107 unsigned swizzle
= swizzle_in
& 0xffff;
1108 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1109 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1110 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1112 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1115 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1117 LLVMValueRef vertex_index
,
1118 LLVMValueRef param_index
,
1119 unsigned const_index
,
1121 unsigned driver_location
,
1123 unsigned num_components
,
1128 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1129 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1130 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1131 LLVMValueRef dw_addr
, stride
;
1133 driver_location
= driver_location
/ 4;
1136 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1137 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1141 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1143 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1144 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1149 /* Add the constant index to the indirect index */
1150 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1151 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1153 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1159 names
= info
->input_semantic_name
;
1160 indices
= info
->input_semantic_index
;
1162 names
= info
->output_semantic_name
;
1163 indices
= info
->output_semantic_index
;
1166 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1167 vertex_index
, param_index
,
1172 LLVMValueRef value
[4];
1173 for (unsigned i
= 0; i
< num_components
; i
++) {
1174 unsigned offset
= i
;
1175 if (llvm_type_is_64bit(ctx
, type
))
1178 offset
+= component
;
1179 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1182 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1185 static LLVMValueRef
fetch_output_tcs(
1186 struct lp_build_tgsi_context
*bld_base
,
1187 const struct tgsi_full_src_register
*reg
,
1188 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1190 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1191 LLVMValueRef dw_addr
, stride
;
1192 unsigned swizzle
= (swizzle_in
& 0xffff);
1194 if (reg
->Register
.Dimension
) {
1195 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1196 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1197 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1199 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1200 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1203 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1206 static LLVMValueRef
fetch_input_tes(
1207 struct lp_build_tgsi_context
*bld_base
,
1208 const struct tgsi_full_src_register
*reg
,
1209 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1211 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1212 LLVMValueRef base
, addr
;
1213 unsigned swizzle
= (swizzle_in
& 0xffff);
1215 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1216 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1218 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1219 ctx
->tess_offchip_ring
, base
, addr
, true);
1222 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1224 LLVMValueRef vertex_index
,
1225 LLVMValueRef param_index
,
1226 unsigned const_index
,
1228 unsigned driver_location
,
1230 unsigned num_components
,
1235 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1236 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1237 LLVMValueRef base
, addr
;
1239 driver_location
= driver_location
/ 4;
1241 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1244 /* Add the constant index to the indirect index */
1245 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1246 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1248 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1251 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1252 param_index
, driver_location
,
1253 info
->input_semantic_name
,
1254 info
->input_semantic_index
,
1257 /* TODO: This will generate rather ordinary llvm code, although it
1258 * should be easy for the optimiser to fix up. In future we might want
1259 * to refactor buffer_load(), but for now this maximises code sharing
1260 * between the NIR and TGSI backends.
1262 LLVMValueRef value
[4];
1263 for (unsigned i
= 0; i
< num_components
; i
++) {
1264 unsigned offset
= i
;
1265 if (llvm_type_is_64bit(ctx
, type
)) {
1268 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1271 driver_location
+ 1,
1272 info
->input_semantic_name
,
1273 info
->input_semantic_index
,
1277 offset
= offset
% 4;
1280 offset
+= component
;
1281 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1282 ctx
->tess_offchip_ring
, base
, addr
, true);
1285 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1288 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1289 const struct tgsi_full_instruction
*inst
,
1290 const struct tgsi_opcode_info
*info
,
1292 LLVMValueRef dst
[4])
1294 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1295 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1296 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1297 unsigned chan_index
;
1298 LLVMValueRef dw_addr
, stride
;
1299 LLVMValueRef buffer
, base
, buf_addr
;
1300 LLVMValueRef values
[4];
1301 bool skip_lds_store
;
1302 bool is_tess_factor
= false, is_tess_inner
= false;
1304 /* Only handle per-patch and per-vertex outputs here.
1305 * Vectors will be lowered to scalars and this function will be called again.
1307 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1308 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1309 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1313 if (reg
->Register
.Dimension
) {
1314 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1315 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1316 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1317 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1319 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1320 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1321 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1323 if (!reg
->Register
.Indirect
) {
1324 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1326 /* Always write tess factors into LDS for the TCS epilog. */
1327 if (name
== TGSI_SEMANTIC_TESSINNER
||
1328 name
== TGSI_SEMANTIC_TESSOUTER
) {
1329 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1330 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1331 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1332 is_tess_factor
= true;
1333 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1338 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1340 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1341 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1343 uint32_t writemask
= reg
->Register
.WriteMask
;
1345 chan_index
= u_bit_scan(&writemask
);
1346 LLVMValueRef value
= dst
[chan_index
];
1348 if (inst
->Instruction
.Saturate
)
1349 value
= ac_build_clamp(&ctx
->ac
, value
);
1351 /* Skip LDS stores if there is no LDS read of this output. */
1352 if (!skip_lds_store
)
1353 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1355 value
= ac_to_integer(&ctx
->ac
, value
);
1356 values
[chan_index
] = value
;
1358 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1359 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1361 4 * chan_index
, 1, 0, false);
1364 /* Write tess factors into VGPRs for the epilog. */
1365 if (is_tess_factor
&&
1366 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1367 if (!is_tess_inner
) {
1368 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1369 ctx
->invoc0_tess_factors
[chan_index
]);
1370 } else if (chan_index
< 2) {
1371 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1372 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1377 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1378 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1380 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1381 base
, 0, 1, 0, false);
1385 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1386 const struct nir_variable
*var
,
1387 LLVMValueRef vertex_index
,
1388 LLVMValueRef param_index
,
1389 unsigned const_index
,
1393 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1394 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1395 const unsigned component
= var
->data
.location_frac
;
1396 const bool is_patch
= var
->data
.patch
;
1397 unsigned driver_location
= var
->data
.driver_location
;
1398 LLVMValueRef dw_addr
, stride
;
1399 LLVMValueRef buffer
, base
, addr
;
1400 LLVMValueRef values
[8];
1401 bool skip_lds_store
;
1402 bool is_tess_factor
= false, is_tess_inner
= false;
1404 driver_location
= driver_location
/ 4;
1407 /* Add the constant index to the indirect index */
1408 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
1409 LLVMConstInt(ctx
->i32
, const_index
, 0), "");
1411 if (const_index
!= 0)
1412 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1416 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1417 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1418 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1419 vertex_index
, param_index
,
1421 info
->output_semantic_name
,
1422 info
->output_semantic_index
,
1425 skip_lds_store
= !info
->reads_pervertex_outputs
;
1427 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1428 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1429 vertex_index
, param_index
,
1431 info
->output_semantic_name
,
1432 info
->output_semantic_index
,
1435 skip_lds_store
= !info
->reads_perpatch_outputs
;
1438 int name
= info
->output_semantic_name
[driver_location
];
1440 /* Always write tess factors into LDS for the TCS epilog. */
1441 if (name
== TGSI_SEMANTIC_TESSINNER
||
1442 name
== TGSI_SEMANTIC_TESSOUTER
) {
1443 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1444 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1445 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1446 is_tess_factor
= true;
1447 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1452 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1454 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1456 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1457 param_index
, driver_location
,
1458 info
->output_semantic_name
,
1459 info
->output_semantic_index
,
1462 for (unsigned chan
= 0; chan
< 8; chan
++) {
1463 if (!(writemask
& (1 << chan
)))
1465 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1467 unsigned buffer_store_offset
= chan
% 4;
1469 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1472 driver_location
+ 1,
1473 info
->output_semantic_name
,
1474 info
->output_semantic_index
,
1478 /* Skip LDS stores if there is no LDS read of this output. */
1479 if (!skip_lds_store
)
1480 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1482 value
= ac_to_integer(&ctx
->ac
, value
);
1483 values
[chan
] = value
;
1485 if (writemask
!= 0xF && !is_tess_factor
) {
1486 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1488 4 * buffer_store_offset
,
1492 /* Write tess factors into VGPRs for the epilog. */
1493 if (is_tess_factor
&&
1494 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1495 if (!is_tess_inner
) {
1496 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1497 ctx
->invoc0_tess_factors
[chan
]);
1498 } else if (chan
< 2) {
1499 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1500 ctx
->invoc0_tess_factors
[4 + chan
]);
1505 if (writemask
== 0xF && !is_tess_factor
) {
1506 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1508 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1509 base
, 0, 1, 0, false);
1513 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1514 unsigned input_index
,
1515 unsigned vtx_offset_param
,
1519 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1520 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1521 struct si_shader
*shader
= ctx
->shader
;
1522 LLVMValueRef vtx_offset
, soffset
;
1523 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1524 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1525 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1529 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1531 /* GFX9 has the ESGS ring in LDS. */
1532 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1533 unsigned index
= vtx_offset_param
;
1535 switch (index
/ 2) {
1537 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1538 index
% 2 ? 16 : 0, 16);
1541 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1542 index
% 2 ? 16 : 0, 16);
1545 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1546 index
% 2 ? 16 : 0, 16);
1553 unsigned offset
= param
* 4 + swizzle
;
1554 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1555 LLVMConstInt(ctx
->i32
, offset
, false), "");
1557 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1558 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1559 if (llvm_type_is_64bit(ctx
, type
)) {
1560 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1561 &ctx
->ac
.i32_1
, 1, "");
1562 LLVMValueRef values
[2] = {
1564 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1566 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1568 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1571 /* GFX6: input load from the ESGS ring in memory. */
1572 if (swizzle
== ~0) {
1573 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1575 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1576 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1579 return ac_build_gather_values(&ctx
->ac
, values
,
1583 /* Get the vertex offset parameter on GFX6. */
1584 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1586 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1587 LLVMConstInt(ctx
->i32
, 4, 0), "");
1589 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1591 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1592 vtx_offset
, soffset
, 0, 1, 0, true, false);
1593 if (llvm_type_is_64bit(ctx
, type
)) {
1594 LLVMValueRef value2
;
1595 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1597 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1598 ctx
->i32_0
, vtx_offset
, soffset
,
1599 0, 1, 0, true, false);
1600 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1602 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1605 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1607 unsigned driver_location
,
1609 unsigned num_components
,
1610 unsigned vertex_index
,
1611 unsigned const_index
,
1614 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1616 LLVMValueRef value
[4];
1617 for (unsigned i
= 0; i
< num_components
; i
++) {
1618 unsigned offset
= i
;
1619 if (llvm_type_is_64bit(ctx
, type
))
1622 offset
+= component
;
1623 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4,
1624 vertex_index
, type
, offset
);
1627 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1630 static LLVMValueRef
fetch_input_gs(
1631 struct lp_build_tgsi_context
*bld_base
,
1632 const struct tgsi_full_src_register
*reg
,
1633 enum tgsi_opcode_type type
,
1634 unsigned swizzle_in
)
1636 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1637 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1638 unsigned swizzle
= swizzle_in
& 0xffff;
1640 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1641 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1642 return si_get_primitive_id(ctx
, swizzle
);
1644 if (!reg
->Register
.Dimension
)
1647 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1648 reg
->Dimension
.Index
,
1649 tgsi2llvmtype(bld_base
, type
),
1653 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1655 switch (interpolate
) {
1656 case TGSI_INTERPOLATE_CONSTANT
:
1659 case TGSI_INTERPOLATE_LINEAR
:
1660 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1661 return SI_PARAM_LINEAR_SAMPLE
;
1662 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1663 return SI_PARAM_LINEAR_CENTROID
;
1665 return SI_PARAM_LINEAR_CENTER
;
1667 case TGSI_INTERPOLATE_COLOR
:
1668 case TGSI_INTERPOLATE_PERSPECTIVE
:
1669 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1670 return SI_PARAM_PERSP_SAMPLE
;
1671 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1672 return SI_PARAM_PERSP_CENTROID
;
1674 return SI_PARAM_PERSP_CENTER
;
1677 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1682 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1683 unsigned attr_index
, unsigned chan
,
1684 LLVMValueRef prim_mask
,
1685 LLVMValueRef i
, LLVMValueRef j
)
1688 return ac_build_fs_interp(&ctx
->ac
,
1689 LLVMConstInt(ctx
->i32
, chan
, 0),
1690 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1693 return ac_build_fs_interp_mov(&ctx
->ac
,
1694 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1695 LLVMConstInt(ctx
->i32
, chan
, 0),
1696 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1701 * Interpolate a fragment shader input.
1703 * @param ctx context
1704 * @param input_index index of the input in hardware
1705 * @param semantic_name TGSI_SEMANTIC_*
1706 * @param semantic_index semantic index
1707 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1708 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1709 * @param interp_param interpolation weights (i,j)
1710 * @param prim_mask SI_PARAM_PRIM_MASK
1711 * @param face SI_PARAM_FRONT_FACE
1712 * @param result the return value (4 components)
1714 static void interp_fs_input(struct si_shader_context
*ctx
,
1715 unsigned input_index
,
1716 unsigned semantic_name
,
1717 unsigned semantic_index
,
1718 unsigned num_interp_inputs
,
1719 unsigned colors_read_mask
,
1720 LLVMValueRef interp_param
,
1721 LLVMValueRef prim_mask
,
1723 LLVMValueRef result
[4])
1725 LLVMValueRef i
= NULL
, j
= NULL
;
1728 /* fs.constant returns the param from the middle vertex, so it's not
1729 * really useful for flat shading. It's meant to be used for custom
1730 * interpolation (but the intrinsic can't fetch from the other two
1733 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1734 * to do the right thing. The only reason we use fs.constant is that
1735 * fs.interp cannot be used on integers, because they can be equal
1738 * When interp is false we will use fs.constant or for newer llvm,
1739 * amdgcn.interp.mov.
1741 bool interp
= interp_param
!= NULL
;
1744 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1745 LLVMVectorType(ctx
->f32
, 2), "");
1747 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1749 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1753 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1754 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1755 LLVMValueRef is_face_positive
;
1757 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1758 * otherwise it's at offset "num_inputs".
1760 unsigned back_attr_offset
= num_interp_inputs
;
1761 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1762 back_attr_offset
+= 1;
1764 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1765 face
, ctx
->i32_0
, "");
1767 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1768 LLVMValueRef front
, back
;
1770 front
= si_build_fs_interp(ctx
,
1773 back
= si_build_fs_interp(ctx
,
1774 back_attr_offset
, chan
,
1777 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1783 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1784 result
[0] = si_build_fs_interp(ctx
, input_index
,
1785 0, prim_mask
, i
, j
);
1787 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1788 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1790 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1791 result
[chan
] = si_build_fs_interp(ctx
,
1798 void si_llvm_load_input_fs(
1799 struct si_shader_context
*ctx
,
1800 unsigned input_index
,
1801 LLVMValueRef out
[4])
1803 struct si_shader
*shader
= ctx
->shader
;
1804 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1805 LLVMValueRef main_fn
= ctx
->main_fn
;
1806 LLVMValueRef interp_param
= NULL
;
1807 int interp_param_idx
;
1808 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1809 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1810 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1811 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1813 /* Get colors from input VGPRs (set by the prolog). */
1814 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1815 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1816 unsigned mask
= colors_read
>> (semantic_index
* 4);
1817 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1818 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1819 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1821 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1822 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1823 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1824 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1828 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1829 if (interp_param_idx
== -1)
1831 else if (interp_param_idx
) {
1832 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1835 interp_fs_input(ctx
, input_index
, semantic_name
,
1836 semantic_index
, 0, /* this param is unused */
1837 shader
->selector
->info
.colors_read
, interp_param
,
1839 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1843 static void declare_input_fs(
1844 struct si_shader_context
*ctx
,
1845 unsigned input_index
,
1846 const struct tgsi_full_declaration
*decl
,
1847 LLVMValueRef out
[4])
1849 si_llvm_load_input_fs(ctx
, input_index
, out
);
1852 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1854 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1857 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1859 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1861 /* For non-indexed draws, the base vertex set by the driver
1862 * (for direct draws) or the CP (for indirect draws) is the
1863 * first vertex ID, but GLSL expects 0 to be returned.
1865 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1866 ctx
->param_vs_state_bits
);
1867 LLVMValueRef indexed
;
1869 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1870 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1872 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1876 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1878 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1880 LLVMValueRef values
[3];
1881 LLVMValueRef result
;
1883 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1885 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1886 unsigned sizes
[3] = {
1887 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1888 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1889 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1892 for (i
= 0; i
< 3; ++i
)
1893 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1895 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1897 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1904 * Load a dword from a constant buffer.
1906 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1907 LLVMValueRef resource
,
1908 LLVMValueRef offset
)
1910 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1911 0, 0, 0, true, true);
1914 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1916 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1917 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1918 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1919 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1921 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1922 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1923 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1925 LLVMValueRef pos
[4] = {
1926 buffer_load_const(ctx
, resource
, offset0
),
1927 buffer_load_const(ctx
, resource
, offset1
),
1928 LLVMConstReal(ctx
->f32
, 0),
1929 LLVMConstReal(ctx
->f32
, 0)
1932 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1935 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1937 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1938 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1941 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1943 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1944 LLVMValueRef coord
[4] = {
1945 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1946 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1951 /* For triangles, the vector should be (u, v, 1-u-v). */
1952 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1953 PIPE_PRIM_TRIANGLES
) {
1954 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1955 LLVMBuildFAdd(ctx
->ac
.builder
,
1956 coord
[0], coord
[1], ""), "");
1958 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1961 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1962 unsigned semantic_name
)
1964 LLVMValueRef base
, addr
;
1966 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1968 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1969 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1970 LLVMConstInt(ctx
->i32
, param
, 0));
1972 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1973 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1977 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1978 unsigned varying_id
)
1980 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1981 unsigned semantic_name
;
1983 switch (varying_id
) {
1984 case VARYING_SLOT_TESS_LEVEL_INNER
:
1985 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
1987 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1988 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
1991 unreachable("unknown tess level");
1994 return load_tess_level(ctx
, semantic_name
);
1998 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2000 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2001 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2002 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2003 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2004 return get_num_tcs_out_vertices(ctx
);
2006 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2009 void si_load_system_value(struct si_shader_context
*ctx
,
2011 const struct tgsi_full_declaration
*decl
)
2013 LLVMValueRef value
= 0;
2015 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2017 switch (decl
->Semantic
.Name
) {
2018 case TGSI_SEMANTIC_INSTANCEID
:
2019 value
= ctx
->abi
.instance_id
;
2022 case TGSI_SEMANTIC_VERTEXID
:
2023 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2025 ctx
->abi
.base_vertex
, "");
2028 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2029 /* Unused. Clarify the meaning in indexed vs. non-indexed
2030 * draws if this is ever used again. */
2034 case TGSI_SEMANTIC_BASEVERTEX
:
2035 value
= get_base_vertex(&ctx
->abi
);
2038 case TGSI_SEMANTIC_BASEINSTANCE
:
2039 value
= ctx
->abi
.start_instance
;
2042 case TGSI_SEMANTIC_DRAWID
:
2043 value
= ctx
->abi
.draw_id
;
2046 case TGSI_SEMANTIC_INVOCATIONID
:
2047 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2048 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2049 else if (ctx
->type
== PIPE_SHADER_GEOMETRY
)
2050 value
= ctx
->abi
.gs_invocation_id
;
2052 assert(!"INVOCATIONID not implemented");
2055 case TGSI_SEMANTIC_POSITION
:
2057 LLVMValueRef pos
[4] = {
2058 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2059 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2060 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2061 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2062 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2064 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2068 case TGSI_SEMANTIC_FACE
:
2069 value
= ctx
->abi
.front_face
;
2072 case TGSI_SEMANTIC_SAMPLEID
:
2073 value
= si_get_sample_id(ctx
);
2076 case TGSI_SEMANTIC_SAMPLEPOS
: {
2077 LLVMValueRef pos
[4] = {
2078 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2079 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2080 LLVMConstReal(ctx
->f32
, 0),
2081 LLVMConstReal(ctx
->f32
, 0)
2083 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2084 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2085 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2089 case TGSI_SEMANTIC_SAMPLEMASK
:
2090 /* This can only occur with the OpenGL Core profile, which
2091 * doesn't support smoothing.
2093 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2096 case TGSI_SEMANTIC_TESSCOORD
:
2097 value
= si_load_tess_coord(&ctx
->abi
);
2100 case TGSI_SEMANTIC_VERTICESIN
:
2101 value
= si_load_patch_vertices_in(&ctx
->abi
);
2104 case TGSI_SEMANTIC_TESSINNER
:
2105 case TGSI_SEMANTIC_TESSOUTER
:
2106 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2109 case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI
:
2110 case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
:
2112 LLVMValueRef buf
, slot
, val
[4];
2115 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
2116 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2117 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
2118 offset
= decl
->Semantic
.Name
== TGSI_SEMANTIC_DEFAULT_TESSINNER_SI
? 4 : 0;
2120 for (i
= 0; i
< 4; i
++)
2121 val
[i
] = buffer_load_const(ctx
, buf
,
2122 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
2123 value
= ac_build_gather_values(&ctx
->ac
, val
, 4);
2127 case TGSI_SEMANTIC_PRIMID
:
2128 value
= si_get_primitive_id(ctx
, 0);
2131 case TGSI_SEMANTIC_GRID_SIZE
:
2132 value
= ctx
->abi
.num_work_groups
;
2135 case TGSI_SEMANTIC_BLOCK_SIZE
:
2136 value
= get_block_size(&ctx
->abi
);
2139 case TGSI_SEMANTIC_BLOCK_ID
:
2141 LLVMValueRef values
[3];
2143 for (int i
= 0; i
< 3; i
++) {
2144 values
[i
] = ctx
->i32_0
;
2145 if (ctx
->abi
.workgroup_ids
[i
]) {
2146 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2149 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2153 case TGSI_SEMANTIC_THREAD_ID
:
2154 value
= ctx
->abi
.local_invocation_ids
;
2157 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2158 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2161 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2162 value
= LLVMConstInt(ctx
->i32
, 64, 0);
2165 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2166 value
= ac_get_thread_id(&ctx
->ac
);
2169 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2171 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2172 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2173 value
= LLVMBuildShl(ctx
->ac
.builder
, LLVMConstInt(ctx
->i64
, 1, 0), id
, "");
2174 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2178 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2179 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2180 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2181 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2183 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2184 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2185 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2186 /* All bits set except LSB */
2187 value
= LLVMConstInt(ctx
->i64
, -2, 0);
2190 value
= LLVMConstInt(ctx
->i64
, -1, 0);
2192 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2193 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2194 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2195 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2196 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2197 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2201 case TGSI_SEMANTIC_CS_USER_DATA
:
2202 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2206 assert(!"unknown system value");
2210 ctx
->system_values
[index
] = value
;
2213 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2215 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2216 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2218 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2221 assert(!ctx
->ac
.lds
);
2223 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2224 LLVMArrayType(ctx
->i8
, lds_size
),
2227 LLVMSetAlignment(var
, 64 * 1024);
2229 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2232 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2233 const struct tgsi_full_declaration
*decl
)
2235 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2236 assert(decl
->Range
.First
== decl
->Range
.Last
);
2238 si_declare_compute_memory(ctx
);
2241 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2244 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2245 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2247 /* Do the bounds checking with a descriptor, because
2248 * doing computation and manual bounds checking of 64-bit
2249 * addresses generates horrible VALU code with very high
2250 * VGPR usage and very low SIMD occupancy.
2252 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2254 LLVMValueRef desc0
, desc1
;
2256 desc1
= LLVMConstInt(ctx
->i32
,
2257 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2259 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2260 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2261 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2262 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2264 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2265 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2266 S_008F0C_OOB_SELECT(3) |
2267 S_008F0C_RESOURCE_LEVEL(1);
2269 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2270 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2272 LLVMValueRef desc_elems
[] = {
2275 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2276 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2279 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2282 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2284 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2285 ctx
->param_const_and_shader_buffers
);
2287 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2288 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2291 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2293 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2294 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2296 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2298 if (sel
->info
.const_buffers_declared
== 1 &&
2299 sel
->info
.shader_buffers_declared
== 0) {
2300 return load_const_buffer_desc_fast_path(ctx
);
2303 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2304 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2305 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2307 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2311 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2313 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2314 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2315 ctx
->param_const_and_shader_buffers
);
2317 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2318 index
= LLVMBuildSub(ctx
->ac
.builder
,
2319 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2322 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2325 static LLVMValueRef
fetch_constant(
2326 struct lp_build_tgsi_context
*bld_base
,
2327 const struct tgsi_full_src_register
*reg
,
2328 enum tgsi_opcode_type type
,
2329 unsigned swizzle_in
)
2331 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2332 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2333 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2335 unsigned swizzle
= swizzle_in
& 0xffff;
2337 LLVMValueRef addr
, bufp
;
2339 if (swizzle_in
== LP_CHAN_ALL
) {
2341 LLVMValueRef values
[4];
2342 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2343 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2345 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2348 /* Split 64-bit loads. */
2349 if (tgsi_type_is_64bit(type
)) {
2350 LLVMValueRef lo
, hi
;
2352 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2353 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2354 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2358 idx
= reg
->Register
.Index
* 4 + swizzle
;
2359 if (reg
->Register
.Indirect
) {
2360 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2362 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2365 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2366 if (sel
->info
.const_buffers_declared
== 1 &&
2367 sel
->info
.shader_buffers_declared
== 0) {
2368 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2369 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2370 return bitcast(bld_base
, type
, result
);
2373 assert(reg
->Register
.Dimension
);
2374 buf
= reg
->Dimension
.Index
;
2376 if (reg
->Dimension
.Indirect
) {
2377 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2379 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2380 reg
->Dimension
.Index
,
2381 ctx
->num_const_buffers
);
2382 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2383 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2384 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2386 bufp
= load_const_buffer_desc(ctx
, buf
);
2388 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2391 /* Initialize arguments for the shader export intrinsic */
2392 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2393 LLVMValueRef
*values
,
2395 struct ac_export_args
*args
)
2397 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2398 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2400 bool is_int8
, is_int10
;
2402 /* Default is 0xf. Adjusted below depending on the format. */
2403 args
->enabled_channels
= 0xf; /* writemask */
2405 /* Specify whether the EXEC mask represents the valid mask */
2406 args
->valid_mask
= 0;
2408 /* Specify whether this is the last export */
2411 /* Specify the target we are exporting */
2412 args
->target
= target
;
2414 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2415 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2416 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2417 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2419 assert(cbuf
>= 0 && cbuf
< 8);
2420 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2421 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2422 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2425 args
->compr
= false;
2426 args
->out
[0] = f32undef
;
2427 args
->out
[1] = f32undef
;
2428 args
->out
[2] = f32undef
;
2429 args
->out
[3] = f32undef
;
2431 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2432 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2433 unsigned bits
, bool hi
) = NULL
;
2435 switch (spi_shader_col_format
) {
2436 case V_028714_SPI_SHADER_ZERO
:
2437 args
->enabled_channels
= 0; /* writemask */
2438 args
->target
= V_008DFC_SQ_EXP_NULL
;
2441 case V_028714_SPI_SHADER_32_R
:
2442 args
->enabled_channels
= 1; /* writemask */
2443 args
->out
[0] = values
[0];
2446 case V_028714_SPI_SHADER_32_GR
:
2447 args
->enabled_channels
= 0x3; /* writemask */
2448 args
->out
[0] = values
[0];
2449 args
->out
[1] = values
[1];
2452 case V_028714_SPI_SHADER_32_AR
:
2453 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2454 args
->enabled_channels
= 0x3; /* writemask */
2455 args
->out
[0] = values
[0];
2456 args
->out
[1] = values
[3];
2458 args
->enabled_channels
= 0x9; /* writemask */
2459 args
->out
[0] = values
[0];
2460 args
->out
[3] = values
[3];
2464 case V_028714_SPI_SHADER_FP16_ABGR
:
2465 packf
= ac_build_cvt_pkrtz_f16
;
2468 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2469 packf
= ac_build_cvt_pknorm_u16
;
2472 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2473 packf
= ac_build_cvt_pknorm_i16
;
2476 case V_028714_SPI_SHADER_UINT16_ABGR
:
2477 packi
= ac_build_cvt_pk_u16
;
2480 case V_028714_SPI_SHADER_SINT16_ABGR
:
2481 packi
= ac_build_cvt_pk_i16
;
2484 case V_028714_SPI_SHADER_32_ABGR
:
2485 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2489 /* Pack f16 or norm_i16/u16. */
2491 for (chan
= 0; chan
< 2; chan
++) {
2492 LLVMValueRef pack_args
[2] = {
2494 values
[2 * chan
+ 1]
2496 LLVMValueRef packed
;
2498 packed
= packf(&ctx
->ac
, pack_args
);
2499 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2501 args
->compr
= 1; /* COMPR flag */
2505 for (chan
= 0; chan
< 2; chan
++) {
2506 LLVMValueRef pack_args
[2] = {
2507 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2508 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2510 LLVMValueRef packed
;
2512 packed
= packi(&ctx
->ac
, pack_args
,
2513 is_int8
? 8 : is_int10
? 10 : 16,
2515 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2517 args
->compr
= 1; /* COMPR flag */
2521 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2524 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2526 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2527 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2528 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2529 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2530 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2531 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2532 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2533 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2535 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2538 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2539 SI_PARAM_ALPHA_REF
);
2540 LLVMValueRef alpha_pass
=
2541 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2542 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2544 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2548 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2550 unsigned samplemask_param
)
2552 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2553 LLVMValueRef coverage
;
2555 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2556 coverage
= LLVMGetParam(ctx
->main_fn
,
2558 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2560 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2562 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2564 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2567 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2568 LLVMConstReal(ctx
->f32
,
2569 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2571 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2574 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2575 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2579 unsigned const_chan
;
2580 LLVMValueRef base_elt
;
2581 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2582 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2583 SI_VS_CONST_CLIP_PLANES
, 0);
2584 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2586 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2587 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2592 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2594 /* Compute dot products of position and user clip plane vectors */
2595 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2596 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2598 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2599 const_chan
) * 4, 0);
2600 base_elt
= buffer_load_const(ctx
, const_resource
,
2602 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2603 out_elts
[const_chan
], args
->out
[chan
]);
2607 args
->enabled_channels
= 0xf;
2608 args
->valid_mask
= 0;
2610 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2615 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2619 if (so
->num_outputs
)
2620 fprintf(stderr
, "STREAMOUT\n");
2622 for (i
= 0; i
< so
->num_outputs
; i
++) {
2623 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2624 so
->output
[i
].start_component
;
2625 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2626 i
, so
->output
[i
].output_buffer
,
2627 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2628 so
->output
[i
].register_index
,
2629 mask
& 1 ? "x" : "",
2630 mask
& 2 ? "y" : "",
2631 mask
& 4 ? "z" : "",
2632 mask
& 8 ? "w" : "");
2636 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2637 LLVMValueRef
const *so_buffers
,
2638 LLVMValueRef
const *so_write_offsets
,
2639 struct pipe_stream_output
*stream_out
,
2640 struct si_shader_output_values
*shader_out
)
2642 unsigned buf_idx
= stream_out
->output_buffer
;
2643 unsigned start
= stream_out
->start_component
;
2644 unsigned num_comps
= stream_out
->num_components
;
2645 LLVMValueRef out
[4];
2647 assert(num_comps
&& num_comps
<= 4);
2648 if (!num_comps
|| num_comps
> 4)
2651 /* Load the output as int. */
2652 for (int j
= 0; j
< num_comps
; j
++) {
2653 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2655 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2658 /* Pack the output. */
2659 LLVMValueRef vdata
= NULL
;
2661 switch (num_comps
) {
2662 case 1: /* as i32 */
2665 case 2: /* as v2i32 */
2666 case 3: /* as v3i32 */
2667 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2668 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2671 /* as v4i32 (aligned to 4) */
2672 out
[3] = LLVMGetUndef(ctx
->i32
);
2674 case 4: /* as v4i32 */
2675 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2679 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2681 so_write_offsets
[buf_idx
],
2683 stream_out
->dst_offset
* 4, 1, 1, false);
2687 * Write streamout data to buffers for vertex stream @p stream (different
2688 * vertex streams can occur for GS copy shaders).
2690 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2691 struct si_shader_output_values
*outputs
,
2692 unsigned noutput
, unsigned stream
)
2694 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2695 struct pipe_stream_output_info
*so
= &sel
->so
;
2696 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2698 struct lp_build_if_state if_ctx
;
2700 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2701 LLVMValueRef so_vtx_count
=
2702 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2704 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2706 /* can_emit = tid < so_vtx_count; */
2707 LLVMValueRef can_emit
=
2708 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2710 /* Emit the streamout code conditionally. This actually avoids
2711 * out-of-bounds buffer access. The hw tells us via the SGPR
2712 * (so_vtx_count) which threads are allowed to emit streamout data. */
2713 lp_build_if(&if_ctx
, &ctx
->gallivm
, can_emit
);
2715 /* The buffer offset is computed as follows:
2716 * ByteOffset = streamout_offset[buffer_id]*4 +
2717 * (streamout_write_index + thread_id)*stride[buffer_id] +
2721 LLVMValueRef so_write_index
=
2722 LLVMGetParam(ctx
->main_fn
,
2723 ctx
->param_streamout_write_index
);
2725 /* Compute (streamout_write_index + thread_id). */
2726 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2728 /* Load the descriptor and compute the write offset for each
2729 * enabled buffer. */
2730 LLVMValueRef so_write_offset
[4] = {};
2731 LLVMValueRef so_buffers
[4];
2732 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2733 ctx
->param_rw_buffers
);
2735 for (i
= 0; i
< 4; i
++) {
2739 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2740 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2742 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2744 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2745 ctx
->param_streamout_offset
[i
]);
2746 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2748 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2749 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2753 /* Write streamout data. */
2754 for (i
= 0; i
< so
->num_outputs
; i
++) {
2755 unsigned reg
= so
->output
[i
].register_index
;
2760 if (stream
!= so
->output
[i
].stream
)
2763 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2764 &so
->output
[i
], &outputs
[reg
]);
2767 lp_build_endif(&if_ctx
);
2770 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2771 LLVMValueRef
*values
)
2773 struct ac_export_args args
;
2775 si_llvm_init_export_args(ctx
, values
,
2776 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2777 ac_build_export(&ctx
->ac
, &args
);
2780 static void si_build_param_exports(struct si_shader_context
*ctx
,
2781 struct si_shader_output_values
*outputs
,
2784 struct si_shader
*shader
= ctx
->shader
;
2785 unsigned param_count
= 0;
2787 for (unsigned i
= 0; i
< noutput
; i
++) {
2788 unsigned semantic_name
= outputs
[i
].semantic_name
;
2789 unsigned semantic_index
= outputs
[i
].semantic_index
;
2791 if (outputs
[i
].vertex_stream
[0] != 0 &&
2792 outputs
[i
].vertex_stream
[1] != 0 &&
2793 outputs
[i
].vertex_stream
[2] != 0 &&
2794 outputs
[i
].vertex_stream
[3] != 0)
2797 switch (semantic_name
) {
2798 case TGSI_SEMANTIC_LAYER
:
2799 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2800 case TGSI_SEMANTIC_CLIPDIST
:
2801 case TGSI_SEMANTIC_COLOR
:
2802 case TGSI_SEMANTIC_BCOLOR
:
2803 case TGSI_SEMANTIC_PRIMID
:
2804 case TGSI_SEMANTIC_FOG
:
2805 case TGSI_SEMANTIC_TEXCOORD
:
2806 case TGSI_SEMANTIC_GENERIC
:
2812 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2813 semantic_index
< SI_MAX_IO_GENERIC
) &&
2814 shader
->key
.opt
.kill_outputs
&
2815 (1ull << si_shader_io_get_unique_index(semantic_name
,
2816 semantic_index
, true)))
2819 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2821 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2822 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2825 shader
->info
.nr_param_exports
= param_count
;
2829 * Vertex color clamping.
2831 * This uses a state constant loaded in a user data SGPR and
2832 * an IF statement is added that clamps all colors if the constant
2835 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2836 struct si_shader_output_values
*outputs
,
2839 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2840 bool has_colors
= false;
2842 /* Store original colors to alloca variables. */
2843 for (unsigned i
= 0; i
< noutput
; i
++) {
2844 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2845 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2848 for (unsigned j
= 0; j
< 4; j
++) {
2849 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2850 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2858 /* The state is in the first bit of the user SGPR. */
2859 LLVMValueRef cond
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2860 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2862 struct lp_build_if_state if_ctx
;
2863 lp_build_if(&if_ctx
, &ctx
->gallivm
, cond
);
2865 /* Store clamped colors to alloca variables within the conditional block. */
2866 for (unsigned i
= 0; i
< noutput
; i
++) {
2867 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2868 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2871 for (unsigned j
= 0; j
< 4; j
++) {
2872 LLVMBuildStore(ctx
->ac
.builder
,
2873 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2877 lp_build_endif(&if_ctx
);
2879 /* Load clamped colors */
2880 for (unsigned i
= 0; i
< noutput
; i
++) {
2881 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2882 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2885 for (unsigned j
= 0; j
< 4; j
++) {
2886 outputs
[i
].values
[j
] =
2887 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2892 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2893 * (position and parameter data only).
2895 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2896 struct si_shader_output_values
*outputs
,
2899 struct si_shader
*shader
= ctx
->shader
;
2900 struct ac_export_args pos_args
[4] = {};
2901 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2905 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2907 /* Build position exports. */
2908 for (i
= 0; i
< noutput
; i
++) {
2909 switch (outputs
[i
].semantic_name
) {
2910 case TGSI_SEMANTIC_POSITION
:
2911 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2912 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2914 case TGSI_SEMANTIC_PSIZE
:
2915 psize_value
= outputs
[i
].values
[0];
2917 case TGSI_SEMANTIC_LAYER
:
2918 layer_value
= outputs
[i
].values
[0];
2920 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2921 viewport_index_value
= outputs
[i
].values
[0];
2923 case TGSI_SEMANTIC_EDGEFLAG
:
2924 edgeflag_value
= outputs
[i
].values
[0];
2926 case TGSI_SEMANTIC_CLIPDIST
:
2927 if (!shader
->key
.opt
.clip_disable
) {
2928 unsigned index
= 2 + outputs
[i
].semantic_index
;
2929 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2930 V_008DFC_SQ_EXP_POS
+ index
,
2934 case TGSI_SEMANTIC_CLIPVERTEX
:
2935 if (!shader
->key
.opt
.clip_disable
) {
2936 si_llvm_emit_clipvertex(ctx
, pos_args
,
2943 /* We need to add the position output manually if it's missing. */
2944 if (!pos_args
[0].out
[0]) {
2945 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2946 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2947 pos_args
[0].done
= 0; /* last export? */
2948 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2949 pos_args
[0].compr
= 0; /* COMPR flag */
2950 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2951 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2952 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2953 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2956 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2957 if (shader
->selector
->info
.writes_psize
||
2958 shader
->selector
->info
.writes_edgeflag
||
2959 shader
->selector
->info
.writes_viewport_index
||
2960 shader
->selector
->info
.writes_layer
) {
2961 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2962 (shader
->selector
->info
.writes_edgeflag
<< 1) |
2963 (shader
->selector
->info
.writes_layer
<< 2);
2965 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2966 pos_args
[1].done
= 0; /* last export? */
2967 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2968 pos_args
[1].compr
= 0; /* COMPR flag */
2969 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2970 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2971 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2972 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2974 if (shader
->selector
->info
.writes_psize
)
2975 pos_args
[1].out
[0] = psize_value
;
2977 if (shader
->selector
->info
.writes_edgeflag
) {
2978 /* The output is a float, but the hw expects an integer
2979 * with the first bit containing the edge flag. */
2980 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
2983 edgeflag_value
= ac_build_umin(&ctx
->ac
,
2987 /* The LLVM intrinsic expects a float. */
2988 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
2991 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
2992 /* GFX9 has the layer in out.z[10:0] and the viewport
2993 * index in out.z[19:16].
2995 if (shader
->selector
->info
.writes_layer
)
2996 pos_args
[1].out
[2] = layer_value
;
2998 if (shader
->selector
->info
.writes_viewport_index
) {
2999 LLVMValueRef v
= viewport_index_value
;
3001 v
= ac_to_integer(&ctx
->ac
, v
);
3002 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3003 LLVMConstInt(ctx
->i32
, 16, 0), "");
3004 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3005 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3006 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3007 pos_args
[1].enabled_channels
|= 1 << 2;
3010 if (shader
->selector
->info
.writes_layer
)
3011 pos_args
[1].out
[2] = layer_value
;
3013 if (shader
->selector
->info
.writes_viewport_index
) {
3014 pos_args
[1].out
[3] = viewport_index_value
;
3015 pos_args
[1].enabled_channels
|= 1 << 3;
3020 for (i
= 0; i
< 4; i
++)
3021 if (pos_args
[i
].out
[0])
3022 shader
->info
.nr_pos_exports
++;
3024 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3025 * Setting valid_mask=1 prevents it and has no other effect.
3027 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3028 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3029 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3030 pos_args
[0].valid_mask
= 1;
3033 for (i
= 0; i
< 4; i
++) {
3034 if (!pos_args
[i
].out
[0])
3037 /* Specify the target we are exporting */
3038 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3040 if (pos_idx
== shader
->info
.nr_pos_exports
)
3041 /* Specify that this is the last export */
3042 pos_args
[i
].done
= 1;
3044 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3047 /* Build parameter exports. */
3048 si_build_param_exports(ctx
, outputs
, noutput
);
3052 * Forward all outputs from the vertex shader to the TES. This is only used
3053 * for the fixed function TCS.
3055 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3057 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3058 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3059 LLVMValueRef lds_vertex_stride
, lds_base
;
3062 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3063 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3064 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3066 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3067 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3068 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3071 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3073 unsigned i
= u_bit_scan64(&inputs
);
3075 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3076 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3079 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3080 get_rel_patch_id(ctx
),
3082 LLVMConstInt(ctx
->i32
, i
, 0));
3084 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3086 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3087 buffer_offset
, 0, 1, 0, false);
3091 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3092 LLVMValueRef rel_patch_id
,
3093 LLVMValueRef invocation_id
,
3094 LLVMValueRef tcs_out_current_patch_data_offset
,
3095 LLVMValueRef invoc0_tf_outer
[4],
3096 LLVMValueRef invoc0_tf_inner
[2])
3098 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3099 struct si_shader
*shader
= ctx
->shader
;
3100 unsigned tess_inner_index
, tess_outer_index
;
3101 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3102 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3103 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3104 struct lp_build_if_state if_ctx
, inner_if_ctx
;
3106 /* Add a barrier before loading tess factors from LDS. */
3107 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3108 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3110 /* Do this only for invocation 0, because the tess levels are per-patch,
3113 * This can't jump, because invocation 0 executes this. It should
3114 * at least mask out the loads and stores for other invocations.
3116 lp_build_if(&if_ctx
, &ctx
->gallivm
,
3117 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3118 invocation_id
, ctx
->i32_0
, ""));
3120 /* Determine the layout of one tess factor element in the buffer. */
3121 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3122 case PIPE_PRIM_LINES
:
3123 stride
= 2; /* 2 dwords, 1 vec2 store */
3127 case PIPE_PRIM_TRIANGLES
:
3128 stride
= 4; /* 4 dwords, 1 vec4 store */
3132 case PIPE_PRIM_QUADS
:
3133 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3142 for (i
= 0; i
< 4; i
++) {
3143 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3144 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3147 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3148 /* Tess factors are in VGPRs. */
3149 for (i
= 0; i
< outer_comps
; i
++)
3150 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3151 for (i
= 0; i
< inner_comps
; i
++)
3152 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3154 /* Load tess_inner and tess_outer from LDS.
3155 * Any invocation can write them, so we can't get them from a temporary.
3157 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3158 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3160 lds_base
= tcs_out_current_patch_data_offset
;
3161 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3162 LLVMConstInt(ctx
->i32
,
3163 tess_inner_index
* 4, 0), "");
3164 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3165 LLVMConstInt(ctx
->i32
,
3166 tess_outer_index
* 4, 0), "");
3168 for (i
= 0; i
< outer_comps
; i
++) {
3170 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3172 for (i
= 0; i
< inner_comps
; i
++) {
3173 inner
[i
] = out
[outer_comps
+i
] =
3174 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3178 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3179 /* For isolines, the hardware expects tess factors in the
3180 * reverse order from what GLSL / TGSI specify.
3182 LLVMValueRef tmp
= out
[0];
3187 /* Convert the outputs to vectors for stores. */
3188 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3192 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3194 /* Get the buffer. */
3195 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3197 /* Get the offset. */
3198 tf_base
= LLVMGetParam(ctx
->main_fn
,
3199 ctx
->param_tcs_factor_offset
);
3200 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3201 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3203 lp_build_if(&inner_if_ctx
, &ctx
->gallivm
,
3204 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3205 rel_patch_id
, ctx
->i32_0
, ""));
3207 /* Store the dynamic HS control word. */
3209 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3210 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3211 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3212 1, ctx
->i32_0
, tf_base
,
3213 offset
, 1, 0, false);
3217 lp_build_endif(&inner_if_ctx
);
3219 /* Store the tessellation factors. */
3220 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3221 MIN2(stride
, 4), byteoffset
, tf_base
,
3222 offset
, 1, 0, false);
3225 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3226 stride
- 4, byteoffset
, tf_base
,
3227 offset
, 1, 0, false);
3229 /* Store the tess factors into the offchip buffer if TES reads them. */
3230 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3231 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3232 LLVMValueRef tf_inner_offset
;
3233 unsigned param_outer
, param_inner
;
3235 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3236 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3238 param_outer
= si_shader_io_get_unique_index_patch(
3239 TGSI_SEMANTIC_TESSOUTER
, 0);
3240 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3241 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3243 unsigned outer_vec_size
=
3244 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3245 outer_comps
: util_next_power_of_two(outer_comps
);
3246 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3248 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3249 outer_comps
, tf_outer_offset
,
3250 base
, 0, 1, 0, false);
3252 param_inner
= si_shader_io_get_unique_index_patch(
3253 TGSI_SEMANTIC_TESSINNER
, 0);
3254 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3255 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3257 inner_vec
= inner_comps
== 1 ? inner
[0] :
3258 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3259 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3260 inner_comps
, tf_inner_offset
,
3261 base
, 0, 1, 0, false);
3265 lp_build_endif(&if_ctx
);
3269 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3270 unsigned param
, unsigned return_index
)
3272 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3273 LLVMGetParam(ctx
->main_fn
, param
),
3278 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3279 unsigned param
, unsigned return_index
)
3281 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3282 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3284 return LLVMBuildInsertValue(builder
, ret
,
3285 ac_to_float(&ctx
->ac
, p
),
3290 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3291 unsigned param
, unsigned return_index
)
3293 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3294 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3295 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3296 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3299 /* This only writes the tessellation factor levels. */
3300 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3301 unsigned max_outputs
,
3302 LLVMValueRef
*addrs
)
3304 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3305 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3306 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3307 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3309 si_copy_tcs_inputs(bld_base
);
3311 rel_patch_id
= get_rel_patch_id(ctx
);
3312 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3313 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3315 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3316 LLVMBasicBlockRef blocks
[2] = {
3317 LLVMGetInsertBlock(builder
),
3318 ctx
->merged_wrap_if_state
.entry_block
3320 LLVMValueRef values
[2];
3322 lp_build_endif(&ctx
->merged_wrap_if_state
);
3324 values
[0] = rel_patch_id
;
3325 values
[1] = LLVMGetUndef(ctx
->i32
);
3326 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3328 values
[0] = tf_lds_offset
;
3329 values
[1] = LLVMGetUndef(ctx
->i32
);
3330 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3332 values
[0] = invocation_id
;
3333 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3334 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3337 /* Return epilog parameters from this function. */
3338 LLVMValueRef ret
= ctx
->return_value
;
3341 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3342 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3343 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3344 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3345 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3346 /* Tess offchip and tess factor offsets are at the beginning. */
3347 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3348 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3349 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3351 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3352 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3353 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3354 GFX6_SGPR_TCS_OUT_LAYOUT
);
3355 /* Tess offchip and tess factor offsets are after user SGPRs. */
3356 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3357 GFX6_TCS_NUM_USER_SGPR
);
3358 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3359 GFX6_TCS_NUM_USER_SGPR
+ 1);
3360 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3364 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3365 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3366 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3368 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3369 * the invocation_id output does not alias the tcs_rel_ids input,
3370 * which saves a V_MOV on gfx9.
3374 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3375 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3377 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3378 vgpr
++; /* skip the tess factor LDS offset */
3379 for (unsigned i
= 0; i
< 6; i
++) {
3380 LLVMValueRef value
=
3381 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3382 value
= ac_to_float(&ctx
->ac
, value
);
3383 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3386 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3388 ctx
->return_value
= ret
;
3391 /* Pass TCS inputs from LS to TCS on GFX9. */
3392 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3394 LLVMValueRef ret
= ctx
->return_value
;
3396 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3397 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3398 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3399 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3400 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3401 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3403 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3404 8 + SI_SGPR_RW_BUFFERS
);
3405 ret
= si_insert_input_ptr(ctx
, ret
,
3406 ctx
->param_bindless_samplers_and_images
,
3407 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3409 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3410 8 + SI_SGPR_VS_STATE_BITS
);
3412 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3413 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3414 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3415 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3416 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3417 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3419 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3420 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3421 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3423 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3424 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3426 ctx
->return_value
= ret
;
3429 /* Pass GS inputs from ES to GS on GFX9. */
3430 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3432 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3433 LLVMValueRef ret
= ctx
->return_value
;
3435 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3436 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3437 if (ctx
->shader
->key
.as_ngg
)
3438 ret
= LLVMBuildInsertValue(builder
, ret
, ctx
->gs_tg_info
, 2, "");
3440 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3441 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3442 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3444 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3445 8 + SI_SGPR_RW_BUFFERS
);
3446 ret
= si_insert_input_ptr(ctx
, ret
,
3447 ctx
->param_bindless_samplers_and_images
,
3448 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3449 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
3450 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
,
3451 8 + SI_SGPR_VS_STATE_BITS
);
3455 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3456 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3458 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3460 for (unsigned i
= 0; i
< 5; i
++) {
3461 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3462 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3464 ctx
->return_value
= ret
;
3467 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3468 unsigned max_outputs
,
3469 LLVMValueRef
*addrs
)
3471 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3472 struct si_shader
*shader
= ctx
->shader
;
3473 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3475 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3476 ctx
->param_rel_auto_id
);
3477 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3478 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3479 vertex_dw_stride
, "");
3481 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3482 * its inputs from it. */
3483 for (i
= 0; i
< info
->num_outputs
; i
++) {
3484 unsigned name
= info
->output_semantic_name
[i
];
3485 unsigned index
= info
->output_semantic_index
[i
];
3487 /* The ARB_shader_viewport_layer_array spec contains the
3490 * 2) What happens if gl_ViewportIndex or gl_Layer is
3491 * written in the vertex shader and a geometry shader is
3494 * RESOLVED: The value written by the last vertex processing
3495 * stage is used. If the last vertex processing stage
3496 * (vertex, tessellation evaluation or geometry) does not
3497 * statically assign to gl_ViewportIndex or gl_Layer, index
3498 * or layer zero is assumed.
3500 * So writes to those outputs in VS-as-LS are simply ignored.
3502 if (name
== TGSI_SEMANTIC_LAYER
||
3503 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3506 int param
= si_shader_io_get_unique_index(name
, index
, false);
3507 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3508 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3510 for (chan
= 0; chan
< 4; chan
++) {
3511 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3514 lshs_lds_store(ctx
, chan
, dw_addr
,
3515 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3519 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3520 si_set_ls_return_value_for_tcs(ctx
);
3523 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3524 unsigned max_outputs
,
3525 LLVMValueRef
*addrs
)
3527 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3528 struct si_shader
*es
= ctx
->shader
;
3529 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3530 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3531 ctx
->param_es2gs_offset
);
3532 LLVMValueRef lds_base
= NULL
;
3536 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3537 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3538 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3539 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3540 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3541 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3542 LLVMConstInt(ctx
->i32
, 64, false), ""), "");
3543 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3544 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3547 for (i
= 0; i
< info
->num_outputs
; i
++) {
3550 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3551 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3554 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3555 info
->output_semantic_index
[i
], false);
3557 for (chan
= 0; chan
< 4; chan
++) {
3558 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3561 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3562 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3564 /* GFX9 has the ESGS ring in LDS. */
3565 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3566 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3567 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3568 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3572 ac_build_buffer_store_dword(&ctx
->ac
,
3574 out_val
, 1, NULL
, soffset
,
3575 (4 * param
+ chan
) * 4,
3580 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3581 si_set_es_return_value_for_gs(ctx
);
3584 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3586 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3587 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3589 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3592 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3594 if (ctx
->shader
->key
.as_ngg
) {
3595 gfx10_ngg_gs_emit_epilogue(ctx
);
3599 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3600 si_get_gs_wave_id(ctx
));
3602 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3603 lp_build_endif(&ctx
->merged_wrap_if_state
);
3606 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3607 unsigned max_outputs
,
3608 LLVMValueRef
*addrs
)
3610 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3611 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3613 assert(info
->num_outputs
<= max_outputs
);
3615 emit_gs_epilogue(ctx
);
3618 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3620 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3621 emit_gs_epilogue(ctx
);
3624 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3625 unsigned max_outputs
,
3626 LLVMValueRef
*addrs
)
3628 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3629 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3630 struct si_shader_output_values
*outputs
= NULL
;
3633 assert(!ctx
->shader
->is_gs_copy_shader
);
3634 assert(info
->num_outputs
<= max_outputs
);
3636 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3638 for (i
= 0; i
< info
->num_outputs
; i
++) {
3639 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3640 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3642 for (j
= 0; j
< 4; j
++) {
3643 outputs
[i
].values
[j
] =
3644 LLVMBuildLoad(ctx
->ac
.builder
,
3647 outputs
[i
].vertex_stream
[j
] =
3648 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3652 if (ctx
->shader
->selector
->so
.num_outputs
)
3653 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3655 /* Export PrimitiveID. */
3656 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3657 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3658 outputs
[i
].semantic_index
= 0;
3659 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3660 for (j
= 1; j
< 4; j
++)
3661 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3663 memset(outputs
[i
].vertex_stream
, 0,
3664 sizeof(outputs
[i
].vertex_stream
));
3668 si_llvm_export_vs(ctx
, outputs
, i
);
3672 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3673 unsigned max_outputs
,
3674 LLVMValueRef
*addrs
)
3676 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3677 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3678 LLVMValueRef pos
[4] = {};
3680 assert(info
->num_outputs
<= max_outputs
);
3682 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3683 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3686 for (unsigned chan
= 0; chan
< 4; chan
++)
3687 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3690 assert(pos
[0] != NULL
);
3692 /* Return the position output. */
3693 LLVMValueRef ret
= ctx
->return_value
;
3694 for (unsigned chan
= 0; chan
< 4; chan
++)
3695 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3696 ctx
->return_value
= ret
;
3699 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3701 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3703 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3704 &ctx
->outputs
[0][0]);
3707 struct si_ps_exports
{
3709 struct ac_export_args args
[10];
3712 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3713 LLVMValueRef depth
, LLVMValueRef stencil
,
3714 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3716 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3717 struct ac_export_args args
;
3719 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3721 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3724 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3725 LLVMValueRef
*color
, unsigned index
,
3726 unsigned samplemask_param
,
3727 bool is_last
, struct si_ps_exports
*exp
)
3729 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3733 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3734 for (i
= 0; i
< 4; i
++)
3735 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3738 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3739 color
[3] = ctx
->ac
.f32_1
;
3743 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3744 si_alpha_test(bld_base
, color
[3]);
3746 /* Line & polygon smoothing */
3747 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3748 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3751 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3752 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3753 struct ac_export_args args
[8];
3756 /* Get the export arguments, also find out what the last one is. */
3757 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3758 si_llvm_init_export_args(ctx
, color
,
3759 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3760 if (args
[c
].enabled_channels
)
3764 /* Emit all exports. */
3765 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3766 if (is_last
&& last
== c
) {
3767 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3768 args
[c
].done
= 1; /* DONE bit */
3769 } else if (!args
[c
].enabled_channels
)
3770 continue; /* unnecessary NULL export */
3772 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3775 struct ac_export_args args
;
3778 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3781 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3782 args
.done
= 1; /* DONE bit */
3783 } else if (!args
.enabled_channels
)
3784 return; /* unnecessary NULL export */
3786 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3790 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3791 struct si_ps_exports
*exp
)
3793 for (unsigned i
= 0; i
< exp
->num
; i
++)
3794 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3798 * Return PS outputs in this order:
3800 * v[0:3] = color0.xyzw
3801 * v[4:7] = color1.xyzw
3806 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3808 * The alpha-ref SGPR is returned via its original location.
3810 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3811 unsigned max_outputs
,
3812 LLVMValueRef
*addrs
)
3814 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3815 struct si_shader
*shader
= ctx
->shader
;
3816 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3817 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3818 unsigned i
, j
, first_vgpr
, vgpr
;
3820 LLVMValueRef color
[8][4] = {};
3821 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3824 if (ctx
->postponed_kill
)
3825 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3827 /* Read the output values. */
3828 for (i
= 0; i
< info
->num_outputs
; i
++) {
3829 unsigned semantic_name
= info
->output_semantic_name
[i
];
3830 unsigned semantic_index
= info
->output_semantic_index
[i
];
3832 switch (semantic_name
) {
3833 case TGSI_SEMANTIC_COLOR
:
3834 assert(semantic_index
< 8);
3835 for (j
= 0; j
< 4; j
++) {
3836 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3837 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3838 color
[semantic_index
][j
] = result
;
3841 case TGSI_SEMANTIC_POSITION
:
3842 depth
= LLVMBuildLoad(builder
,
3843 addrs
[4 * i
+ 2], "");
3845 case TGSI_SEMANTIC_STENCIL
:
3846 stencil
= LLVMBuildLoad(builder
,
3847 addrs
[4 * i
+ 1], "");
3849 case TGSI_SEMANTIC_SAMPLEMASK
:
3850 samplemask
= LLVMBuildLoad(builder
,
3851 addrs
[4 * i
+ 0], "");
3854 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3859 /* Fill the return structure. */
3860 ret
= ctx
->return_value
;
3863 ret
= LLVMBuildInsertValue(builder
, ret
,
3864 ac_to_integer(&ctx
->ac
,
3865 LLVMGetParam(ctx
->main_fn
,
3866 SI_PARAM_ALPHA_REF
)),
3867 SI_SGPR_ALPHA_REF
, "");
3870 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3871 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3875 for (j
= 0; j
< 4; j
++)
3876 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3879 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3881 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3883 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3885 /* Add the input sample mask for smoothing at the end. */
3886 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3887 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3888 ret
= LLVMBuildInsertValue(builder
, ret
,
3889 LLVMGetParam(ctx
->main_fn
,
3890 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3892 ctx
->return_value
= ret
;
3895 static void membar_emit(
3896 const struct lp_build_tgsi_action
*action
,
3897 struct lp_build_tgsi_context
*bld_base
,
3898 struct lp_build_emit_data
*emit_data
)
3900 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3901 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3902 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3903 unsigned waitcnt
= NOOP_WAITCNT
;
3905 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3906 waitcnt
&= VM_CNT
& LGKM_CNT
;
3908 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3909 TGSI_MEMBAR_SHADER_BUFFER
|
3910 TGSI_MEMBAR_SHADER_IMAGE
))
3913 if (flags
& TGSI_MEMBAR_SHARED
)
3914 waitcnt
&= LGKM_CNT
;
3916 if (waitcnt
!= NOOP_WAITCNT
)
3917 ac_build_waitcnt(&ctx
->ac
, waitcnt
);
3920 static void clock_emit(
3921 const struct lp_build_tgsi_action
*action
,
3922 struct lp_build_tgsi_context
*bld_base
,
3923 struct lp_build_emit_data
*emit_data
)
3925 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3926 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3928 emit_data
->output
[0] =
3929 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3930 emit_data
->output
[1] =
3931 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3934 static void si_llvm_emit_ddxy(
3935 const struct lp_build_tgsi_action
*action
,
3936 struct lp_build_tgsi_context
*bld_base
,
3937 struct lp_build_emit_data
*emit_data
)
3939 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3940 unsigned opcode
= emit_data
->info
->opcode
;
3945 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3946 mask
= AC_TID_MASK_LEFT
;
3947 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3948 mask
= AC_TID_MASK_TOP
;
3950 mask
= AC_TID_MASK_TOP_LEFT
;
3952 /* for DDX we want to next X pixel, DDY next Y pixel. */
3953 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3955 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3956 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3957 emit_data
->output
[emit_data
->chan
] = val
;
3960 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3961 struct lp_build_tgsi_context
*bld_base
,
3962 struct lp_build_emit_data
*emit_data
)
3964 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3965 struct si_shader
*shader
= ctx
->shader
;
3966 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3967 LLVMValueRef interp_param
;
3968 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3969 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3970 int input_base
, input_array_size
;
3973 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
3974 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3975 int interp_param_idx
;
3979 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
3980 /* offset is in second src, first two channels */
3981 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3983 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
3985 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
3986 LLVMValueRef sample_position
;
3987 LLVMValueRef sample_id
;
3988 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3990 /* fetch sample ID, then fetch its sample position,
3991 * and place into first two channels.
3993 sample_id
= lp_build_emit_fetch(bld_base
,
3994 emit_data
->inst
, 1, TGSI_CHAN_X
);
3995 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
3997 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
3998 * Language 4.50 spec says about interpolateAtSample:
4000 * "Returns the value of the input interpolant variable at
4001 * the location of sample number sample. If multisample
4002 * buffers are not available, the input variable will be
4003 * evaluated at the center of the pixel. If sample sample
4004 * does not exist, the position used to interpolate the
4005 * input variable is undefined."
4007 * This means that sample_id values outside of the valid are
4008 * in fact valid input, and the usual mechanism for loading the
4009 * sample position doesn't work.
4011 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4012 LLVMValueRef center
[4] = {
4013 LLVMConstReal(ctx
->f32
, 0.5),
4014 LLVMConstReal(ctx
->f32
, 0.5),
4019 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4021 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4024 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4027 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4028 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4030 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4033 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4035 if (input
->Register
.Indirect
) {
4036 unsigned array_id
= input
->Indirect
.ArrayID
;
4039 input_base
= info
->input_array_first
[array_id
];
4040 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4042 input_base
= inst
->Src
[0].Register
.Index
;
4043 input_array_size
= info
->num_inputs
- input_base
;
4046 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4047 1, input
->Register
.Index
- input_base
);
4049 input_base
= inst
->Src
[0].Register
.Index
;
4050 input_array_size
= 1;
4051 array_idx
= ctx
->i32_0
;
4054 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4056 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4057 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4058 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4060 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4062 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4063 if (interp_param_idx
== -1)
4065 else if (interp_param_idx
)
4066 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4068 interp_param
= NULL
;
4070 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4071 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4072 LLVMValueRef ij_out
[2];
4073 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4076 * take the I then J parameters, and the DDX/Y for it, and
4077 * calculate the IJ inputs for the interpolator.
4078 * temp1 = ddx * offset/sample.x + I;
4079 * interp_param.I = ddy * offset/sample.y + temp1;
4080 * temp1 = ddx * offset/sample.x + J;
4081 * interp_param.J = ddy * offset/sample.y + temp1;
4083 for (i
= 0; i
< 2; i
++) {
4084 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4085 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4086 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4087 ddxy_out
, ix_ll
, "");
4088 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4089 ddxy_out
, iy_ll
, "");
4090 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4091 interp_param
, ix_ll
, "");
4094 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4096 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4097 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4099 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4103 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4105 for (chan
= 0; chan
< 4; chan
++) {
4106 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4107 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4109 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4110 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4113 i
= LLVMBuildExtractElement(
4114 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4115 j
= LLVMBuildExtractElement(
4116 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4118 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4121 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4122 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4125 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4126 ctx
->ac
.builder
, gather
, array_idx
, "");
4130 static void vote_all_emit(
4131 const struct lp_build_tgsi_action
*action
,
4132 struct lp_build_tgsi_context
*bld_base
,
4133 struct lp_build_emit_data
*emit_data
)
4135 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4137 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4138 emit_data
->output
[emit_data
->chan
] =
4139 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4142 static void vote_any_emit(
4143 const struct lp_build_tgsi_action
*action
,
4144 struct lp_build_tgsi_context
*bld_base
,
4145 struct lp_build_emit_data
*emit_data
)
4147 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4149 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4150 emit_data
->output
[emit_data
->chan
] =
4151 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4154 static void vote_eq_emit(
4155 const struct lp_build_tgsi_action
*action
,
4156 struct lp_build_tgsi_context
*bld_base
,
4157 struct lp_build_emit_data
*emit_data
)
4159 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4161 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4162 emit_data
->output
[emit_data
->chan
] =
4163 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4166 static void ballot_emit(
4167 const struct lp_build_tgsi_action
*action
,
4168 struct lp_build_tgsi_context
*bld_base
,
4169 struct lp_build_emit_data
*emit_data
)
4171 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4172 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4175 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4176 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4177 tmp
= LLVMBuildBitCast(builder
, tmp
, ctx
->v2i32
, "");
4179 emit_data
->output
[0] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_0
, "");
4180 emit_data
->output
[1] = LLVMBuildExtractElement(builder
, tmp
, ctx
->i32_1
, "");
4183 static void read_lane_emit(
4184 const struct lp_build_tgsi_action
*action
,
4185 struct lp_build_tgsi_context
*bld_base
,
4186 struct lp_build_emit_data
*emit_data
)
4188 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4190 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4191 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4192 0, emit_data
->src_chan
);
4194 /* Always read the source invocation (= lane) from the X channel. */
4195 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4197 emit_data
->arg_count
= 2;
4200 /* We currently have no other way to prevent LLVM from lifting the icmp
4201 * calls to a dominating basic block.
4203 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4205 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4206 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4208 emit_data
->output
[emit_data
->chan
] =
4209 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4210 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4211 AC_FUNC_ATTR_READNONE
|
4212 AC_FUNC_ATTR_CONVERGENT
);
4215 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4216 struct lp_build_emit_data
*emit_data
)
4218 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4219 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4223 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4225 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4226 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4230 /* Emit one vertex from the geometry shader */
4231 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4233 LLVMValueRef
*addrs
)
4235 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4237 if (ctx
->shader
->key
.as_ngg
) {
4238 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4242 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4243 struct si_shader
*shader
= ctx
->shader
;
4244 struct lp_build_if_state if_state
;
4245 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4246 ctx
->param_gs2vs_offset
);
4247 LLVMValueRef gs_next_vertex
;
4248 LLVMValueRef can_emit
;
4249 unsigned chan
, offset
;
4252 /* Write vertex attribute values to GSVS ring */
4253 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4254 ctx
->gs_next_vertex
[stream
],
4257 /* If this thread has already emitted the declared maximum number of
4258 * vertices, skip the write: excessive vertex emissions are not
4259 * supposed to have any effect.
4261 * If the shader has no writes to memory, kill it instead. This skips
4262 * further memory loads and may allow LLVM to skip to the end
4265 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4266 LLVMConstInt(ctx
->i32
,
4267 shader
->selector
->gs_max_out_vertices
, 0), "");
4269 bool use_kill
= !info
->writes_memory
;
4271 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4273 lp_build_if(&if_state
, &ctx
->gallivm
, can_emit
);
4277 for (i
= 0; i
< info
->num_outputs
; i
++) {
4278 for (chan
= 0; chan
< 4; chan
++) {
4279 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4280 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4283 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4284 LLVMValueRef voffset
=
4285 LLVMConstInt(ctx
->i32
, offset
*
4286 shader
->selector
->gs_max_out_vertices
, 0);
4289 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4290 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4291 LLVMConstInt(ctx
->i32
, 4, 0), "");
4293 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4295 ac_build_buffer_store_dword(&ctx
->ac
,
4296 ctx
->gsvs_ring
[stream
],
4298 voffset
, soffset
, 0,
4303 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4304 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4306 /* Signal vertex emission if vertex data was written. */
4308 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4309 si_get_gs_wave_id(ctx
));
4313 lp_build_endif(&if_state
);
4316 /* Emit one vertex from the geometry shader */
4317 static void si_tgsi_emit_vertex(
4318 const struct lp_build_tgsi_action
*action
,
4319 struct lp_build_tgsi_context
*bld_base
,
4320 struct lp_build_emit_data
*emit_data
)
4322 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4323 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4325 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4328 /* Cut one primitive from the geometry shader */
4329 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4332 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4334 if (ctx
->shader
->key
.as_ngg
) {
4335 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4339 /* Signal primitive cut */
4340 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4341 si_get_gs_wave_id(ctx
));
4344 /* Cut one primitive from the geometry shader */
4345 static void si_tgsi_emit_primitive(
4346 const struct lp_build_tgsi_action
*action
,
4347 struct lp_build_tgsi_context
*bld_base
,
4348 struct lp_build_emit_data
*emit_data
)
4350 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4352 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4355 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4356 struct lp_build_tgsi_context
*bld_base
,
4357 struct lp_build_emit_data
*emit_data
)
4359 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4361 /* GFX6 only (thanks to a hw bug workaround):
4362 * The real barrier instruction isn’t needed, because an entire patch
4363 * always fits into a single wave.
4365 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4366 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4367 ac_build_waitcnt(&ctx
->ac
, LGKM_CNT
& VM_CNT
);
4371 ac_build_s_barrier(&ctx
->ac
);
4374 void si_create_function(struct si_shader_context
*ctx
,
4376 LLVMTypeRef
*returns
, unsigned num_returns
,
4377 struct si_function_info
*fninfo
,
4378 unsigned max_workgroup_size
)
4382 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4383 fninfo
->types
, fninfo
->num_params
);
4384 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4386 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4387 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4389 /* The combination of:
4393 * allows the optimization passes to move loads and reduces
4394 * SGPR spilling significantly.
4396 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4397 AC_FUNC_ATTR_INREG
);
4399 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4400 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4401 AC_FUNC_ATTR_NOALIAS
);
4402 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4406 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4407 if (fninfo
->assign
[i
])
4408 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4411 if (ctx
->screen
->info
.address32_hi
) {
4412 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4413 "amdgpu-32bit-address-high-bits",
4414 ctx
->screen
->info
.address32_hi
);
4417 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4419 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4420 "no-signed-zeros-fp-math",
4423 if (ctx
->screen
->debug_flags
& DBG(UNSAFE_MATH
)) {
4424 /* These were copied from some LLVM test. */
4425 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4426 "less-precise-fpmad",
4428 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4431 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4434 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4440 static void declare_streamout_params(struct si_shader_context
*ctx
,
4441 struct pipe_stream_output_info
*so
,
4442 struct si_function_info
*fninfo
)
4446 /* Streamout SGPRs. */
4447 if (so
->num_outputs
) {
4448 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4449 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4451 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4453 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4455 /* A streamout buffer offset is loaded if the stride is non-zero. */
4456 for (i
= 0; i
< 4; i
++) {
4460 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4464 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4466 switch (shader
->selector
->type
) {
4467 case PIPE_SHADER_VERTEX
:
4468 case PIPE_SHADER_TESS_EVAL
:
4469 return shader
->key
.as_ngg
? 128 : 0;
4471 case PIPE_SHADER_TESS_CTRL
:
4472 /* Return this so that LLVM doesn't remove s_barrier
4473 * instructions on chips where we use s_barrier. */
4474 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 64;
4476 case PIPE_SHADER_GEOMETRY
:
4477 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 64;
4479 case PIPE_SHADER_COMPUTE
:
4480 break; /* see below */
4486 const unsigned *properties
= shader
->selector
->info
.properties
;
4487 unsigned max_work_group_size
=
4488 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4489 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4490 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4492 if (!max_work_group_size
) {
4493 /* This is a variable group size compute shader,
4494 * compile it for the maximum possible group size.
4496 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4498 return max_work_group_size
;
4501 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4502 struct si_function_info
*fninfo
,
4505 LLVMTypeRef const_shader_buf_type
;
4507 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4508 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4509 const_shader_buf_type
= ctx
->f32
;
4511 const_shader_buf_type
= ctx
->v4i32
;
4513 unsigned const_and_shader_buffers
=
4514 add_arg(fninfo
, ARG_SGPR
,
4515 ac_array_in_const32_addr_space(const_shader_buf_type
));
4518 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4521 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4522 struct si_function_info
*fninfo
,
4525 unsigned samplers_and_images
=
4526 add_arg(fninfo
, ARG_SGPR
,
4527 ac_array_in_const32_addr_space(ctx
->v8i32
));
4530 ctx
->param_samplers_and_images
= samplers_and_images
;
4533 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4534 struct si_function_info
*fninfo
,
4537 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4538 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4541 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4542 struct si_function_info
*fninfo
)
4544 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4545 ac_array_in_const32_addr_space(ctx
->v4i32
));
4546 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4547 ac_array_in_const32_addr_space(ctx
->v8i32
));
4550 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4551 struct si_function_info
*fninfo
)
4553 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4554 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4555 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4556 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4559 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4560 struct si_function_info
*fninfo
,
4561 unsigned *num_prolog_vgprs
)
4563 struct si_shader
*shader
= ctx
->shader
;
4565 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4566 if (shader
->key
.as_ls
) {
4567 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4568 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4569 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user VGPR */
4570 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4572 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4573 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4575 } else if (ctx
->screen
->info
.chip_class
== GFX10
&&
4576 !shader
->is_gs_copy_shader
) {
4577 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr */
4578 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr */
4579 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4581 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4582 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4583 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4586 if (!shader
->is_gs_copy_shader
) {
4587 /* Vertex load indices. */
4588 ctx
->param_vertex_index0
= fninfo
->num_params
;
4589 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4590 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4591 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4595 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4596 struct si_function_info
*fninfo
,
4597 unsigned vs_blit_property
)
4599 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4600 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4601 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4602 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4604 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4605 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4606 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4607 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4608 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4609 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4610 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4611 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4612 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4613 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4614 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4615 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4619 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4620 struct si_function_info
*fninfo
)
4622 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4623 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4624 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4625 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4629 /* Convenient merged shader definitions. */
4630 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4631 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4634 static void create_function(struct si_shader_context
*ctx
)
4636 struct si_shader
*shader
= ctx
->shader
;
4637 struct si_function_info fninfo
;
4638 LLVMTypeRef returns
[16+32*4];
4639 unsigned i
, num_return_sgprs
;
4640 unsigned num_returns
= 0;
4641 unsigned num_prolog_vgprs
= 0;
4642 unsigned type
= ctx
->type
;
4643 unsigned vs_blit_property
=
4644 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS
];
4646 si_init_function_info(&fninfo
);
4648 /* Set MERGED shaders. */
4649 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4650 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4651 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4652 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4653 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4656 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4659 case PIPE_SHADER_VERTEX
:
4660 declare_global_desc_pointers(ctx
, &fninfo
);
4662 if (vs_blit_property
) {
4663 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4666 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4670 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4671 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4672 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4673 ac_array_in_const32_addr_space(ctx
->v4i32
));
4675 if (shader
->key
.as_es
) {
4676 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4677 } else if (shader
->key
.as_ls
) {
4678 /* no extra parameters */
4680 if (shader
->is_gs_copy_shader
) {
4681 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4682 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4685 /* The locations of the other parameters are assigned dynamically. */
4686 declare_streamout_params(ctx
, &shader
->selector
->so
,
4691 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4694 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4695 for (i
= 0; i
< 4; i
++)
4696 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4700 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4701 declare_global_desc_pointers(ctx
, &fninfo
);
4702 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4703 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4704 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4705 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4706 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4707 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4708 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4711 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4712 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4714 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4715 * placed after the user SGPRs.
4717 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4718 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4719 for (i
= 0; i
< 11; i
++)
4720 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4723 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4724 /* Merged stages have 8 system SGPRs at the beginning. */
4725 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4726 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4727 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4728 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4729 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4730 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4731 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4732 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4733 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4735 declare_global_desc_pointers(ctx
, &fninfo
);
4736 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4737 ctx
->type
== PIPE_SHADER_VERTEX
);
4738 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4740 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4741 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4742 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4743 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4744 ac_array_in_const32_addr_space(ctx
->v4i32
));
4746 /* VGPRs (first TCS, then VS) */
4747 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4748 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4750 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4751 declare_vs_input_vgprs(ctx
, &fninfo
,
4754 /* LS return values are inputs to the TCS main shader part. */
4755 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4756 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4757 for (i
= 0; i
< 2; i
++)
4758 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4760 /* TCS return values are inputs to the TCS epilog.
4762 * param_tcs_offchip_offset, param_tcs_factor_offset,
4763 * param_tcs_offchip_layout, and param_rw_buffers
4764 * should be passed to the epilog.
4766 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4767 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4768 for (i
= 0; i
< 11; i
++)
4769 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4773 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4774 /* Merged stages have 8 system SGPRs at the beginning. */
4775 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4776 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4777 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4779 if (ctx
->shader
->key
.as_ngg
)
4780 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->gs_tg_info
);
4782 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4784 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4785 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4786 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4787 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4788 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4790 declare_global_desc_pointers(ctx
, &fninfo
);
4791 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4792 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4793 (ctx
->type
== PIPE_SHADER_VERTEX
||
4794 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4797 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4798 if (vs_blit_property
)
4799 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4801 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4803 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4804 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4805 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4806 /* Declare as many input SGPRs as the VS has. */
4809 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4810 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4811 ac_array_in_const32_addr_space(ctx
->v4i32
));
4814 /* VGPRs (first GS, then VS/TES) */
4815 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4816 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4817 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4818 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4819 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4821 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4822 declare_vs_input_vgprs(ctx
, &fninfo
,
4824 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4825 declare_tes_input_vgprs(ctx
, &fninfo
);
4828 if (ctx
->shader
->key
.as_es
&&
4829 (ctx
->type
== PIPE_SHADER_VERTEX
||
4830 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4831 unsigned num_user_sgprs
;
4833 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4834 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4836 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4838 /* ES return values are inputs to GS. */
4839 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4840 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4841 for (i
= 0; i
< 5; i
++)
4842 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4846 case PIPE_SHADER_TESS_EVAL
:
4847 declare_global_desc_pointers(ctx
, &fninfo
);
4848 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4849 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4850 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4851 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4853 if (shader
->key
.as_es
) {
4854 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4855 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4856 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4858 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4859 declare_streamout_params(ctx
, &shader
->selector
->so
,
4861 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4865 declare_tes_input_vgprs(ctx
, &fninfo
);
4868 case PIPE_SHADER_GEOMETRY
:
4869 declare_global_desc_pointers(ctx
, &fninfo
);
4870 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4871 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4872 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4875 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4876 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4877 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4878 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4879 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4880 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4881 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4882 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4885 case PIPE_SHADER_FRAGMENT
:
4886 declare_global_desc_pointers(ctx
, &fninfo
);
4887 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4888 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4889 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4890 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4892 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4893 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4894 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4895 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4896 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4897 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4898 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4899 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4900 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4901 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4902 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4903 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4904 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4905 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4906 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4907 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4908 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4909 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4910 shader
->info
.face_vgpr_index
= 20;
4911 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4912 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4913 shader
->info
.ancillary_vgpr_index
= 21;
4914 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4915 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4916 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4918 /* Color inputs from the prolog. */
4919 if (shader
->selector
->info
.colors_read
) {
4920 unsigned num_color_elements
=
4921 util_bitcount(shader
->selector
->info
.colors_read
);
4923 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4924 for (i
= 0; i
< num_color_elements
; i
++)
4925 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4927 num_prolog_vgprs
+= num_color_elements
;
4930 /* Outputs for the epilog. */
4931 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4934 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4935 shader
->selector
->info
.writes_z
+
4936 shader
->selector
->info
.writes_stencil
+
4937 shader
->selector
->info
.writes_samplemask
+
4938 1 /* SampleMaskIn */;
4940 num_returns
= MAX2(num_returns
,
4942 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4944 for (i
= 0; i
< num_return_sgprs
; i
++)
4945 returns
[i
] = ctx
->i32
;
4946 for (; i
< num_returns
; i
++)
4947 returns
[i
] = ctx
->f32
;
4950 case PIPE_SHADER_COMPUTE
:
4951 declare_global_desc_pointers(ctx
, &fninfo
);
4952 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4953 if (shader
->selector
->info
.uses_grid_size
)
4954 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4955 if (shader
->selector
->info
.uses_block_size
&&
4956 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4957 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4959 unsigned cs_user_data_dwords
=
4960 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_DWORDS
];
4961 if (cs_user_data_dwords
) {
4962 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
4963 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
4966 for (i
= 0; i
< 3; i
++) {
4967 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4968 if (shader
->selector
->info
.uses_block_id
[i
])
4969 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4972 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
4975 assert(0 && "unimplemented shader");
4979 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4980 si_get_max_workgroup_size(shader
));
4982 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4983 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4984 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4985 "InitialPSInputAddr",
4986 S_0286D0_PERSP_SAMPLE_ENA(1) |
4987 S_0286D0_PERSP_CENTER_ENA(1) |
4988 S_0286D0_PERSP_CENTROID_ENA(1) |
4989 S_0286D0_LINEAR_SAMPLE_ENA(1) |
4990 S_0286D0_LINEAR_CENTER_ENA(1) |
4991 S_0286D0_LINEAR_CENTROID_ENA(1) |
4992 S_0286D0_FRONT_FACE_ENA(1) |
4993 S_0286D0_ANCILLARY_ENA(1) |
4994 S_0286D0_POS_FIXED_PT_ENA(1));
4997 shader
->info
.num_input_sgprs
= 0;
4998 shader
->info
.num_input_vgprs
= 0;
5000 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5001 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5003 for (; i
< fninfo
.num_params
; ++i
)
5004 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5006 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5007 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5009 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5010 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5011 /* The LSHS size is not known until draw time, so we append it
5012 * at the end of whatever LDS use there may be in the rest of
5013 * the shader (currently none, unless LLVM decides to do its
5014 * own LDS-based lowering).
5016 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
5017 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5018 "__lds_end", AC_ADDR_SPACE_LDS
);
5019 LLVMSetAlignment(ctx
->ac
.lds
, 256);
5021 ac_declare_lds_as_pointer(&ctx
->ac
);
5026 /* Ensure that the esgs ring is declared.
5028 * We declare it with 64KB alignment as a hint that the
5029 * pointer value will always be 0.
5031 static void declare_esgs_ring(struct si_shader_context
*ctx
)
5036 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
5038 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
5039 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5042 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
5043 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
5047 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5050 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5052 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5054 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5055 ctx
->param_rw_buffers
);
5057 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5058 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5060 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5062 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5065 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5067 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5068 /* Declare the ESGS ring as an explicit LDS symbol. */
5069 declare_esgs_ring(ctx
);
5071 ac_declare_lds_as_pointer(&ctx
->ac
);
5072 ctx
->esgs_ring
= ctx
->ac
.lds
;
5077 if (ctx
->shader
->is_gs_copy_shader
) {
5078 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5081 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5082 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5083 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5084 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5085 LLVMValueRef base_ring
;
5087 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5089 /* The conceptual layout of the GSVS ring is
5090 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5091 * but the real memory layout is swizzled across
5093 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5095 * Override the buffer descriptor accordingly.
5097 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5098 uint64_t stream_offset
= 0;
5100 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5101 unsigned num_components
;
5103 unsigned num_records
;
5104 LLVMValueRef ring
, tmp
;
5106 num_components
= sel
->info
.num_stream_output_components
[stream
];
5107 if (!num_components
)
5110 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5112 /* Limit on the stride field for <= GFX7. */
5113 assert(stride
< (1 << 14));
5117 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5118 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5119 tmp
= LLVMBuildAdd(builder
, tmp
,
5120 LLVMConstInt(ctx
->i64
,
5121 stream_offset
, 0), "");
5122 stream_offset
+= stride
* 64;
5124 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5125 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5126 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5127 tmp
= LLVMBuildOr(builder
, tmp
,
5128 LLVMConstInt(ctx
->i32
,
5129 S_008F04_STRIDE(stride
) |
5130 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5131 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5132 ring
= LLVMBuildInsertElement(builder
, ring
,
5133 LLVMConstInt(ctx
->i32
, num_records
, 0),
5134 LLVMConstInt(ctx
->i32
, 2, 0), "");
5137 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5138 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5139 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5140 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5141 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5142 S_008F0C_ADD_TID_ENABLE(1);
5144 if (ctx
->ac
.chip_class
>= GFX10
) {
5145 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5146 S_008F0C_OOB_SELECT(2) |
5147 S_008F0C_RESOURCE_LEVEL(1);
5149 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5150 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5151 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5154 ring
= LLVMBuildInsertElement(builder
, ring
,
5155 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5156 LLVMConstInt(ctx
->i32
, 3, 0), "");
5158 ctx
->gsvs_ring
[stream
] = ring
;
5160 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5161 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5165 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5166 LLVMValueRef param_rw_buffers
,
5167 unsigned param_pos_fixed_pt
)
5169 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5170 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5172 /* Use the fixed-point gl_FragCoord input.
5173 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5174 * per coordinate to get the repeating effect.
5176 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5177 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5179 /* Load the buffer descriptor. */
5180 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5181 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5183 /* The stipple pattern is 32x32, each row has 32 bits. */
5184 offset
= LLVMBuildMul(builder
, address
[1],
5185 LLVMConstInt(ctx
->i32
, 4, 0), "");
5186 row
= buffer_load_const(ctx
, desc
, offset
);
5187 row
= ac_to_integer(&ctx
->ac
, row
);
5188 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5189 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5190 ac_build_kill_if_false(&ctx
->ac
, bit
);
5193 /* For the UMR disassembler. */
5194 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5195 #define DEBUGGER_NUM_MARKERS 5
5197 static bool si_shader_binary_open(struct si_screen
*screen
,
5198 struct si_shader
*shader
,
5199 struct ac_rtld_binary
*rtld
)
5201 const struct si_shader_selector
*sel
= shader
->selector
;
5202 enum pipe_shader_type shader_type
= sel
? sel
->type
: PIPE_SHADER_COMPUTE
;
5203 const char *part_elfs
[5];
5204 size_t part_sizes
[5];
5205 unsigned num_parts
= 0;
5207 #define add_part(shader_or_part) \
5208 if (shader_or_part) { \
5209 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5210 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5214 add_part(shader
->prolog
);
5215 add_part(shader
->previous_stage
);
5216 add_part(shader
->prolog2
);
5218 add_part(shader
->epilog
);
5222 struct ac_rtld_symbol lds_symbols
[2];
5223 unsigned num_lds_symbols
= 0;
5224 unsigned esgs_ring_size
= 0;
5226 if (sel
&& screen
->info
.chip_class
>= GFX9
&&
5227 sel
->type
== PIPE_SHADER_GEOMETRY
&& !shader
->is_gs_copy_shader
) {
5228 esgs_ring_size
= shader
->gs_info
.esgs_ring_size
;;
5231 if (sel
&& shader
->key
.as_ngg
) {
5232 if (sel
->so
.num_outputs
) {
5233 unsigned esgs_vertex_bytes
= 4 * (4 * sel
->info
.num_outputs
+ 1);
5234 esgs_ring_size
= MAX2(esgs_ring_size
,
5235 shader
->ngg
.max_out_verts
* esgs_vertex_bytes
);
5238 /* GS stores Primitive IDs into LDS at the address corresponding
5239 * to the provoking vertex. All vertex threads load and export
5240 * PrimitiveID for their thread.
5242 if (sel
->type
== PIPE_SHADER_VERTEX
&&
5243 shader
->key
.mono
.u
.vs_export_prim_id
)
5244 esgs_ring_size
= MAX2(esgs_ring_size
, shader
->ngg
.max_out_verts
* 4);
5247 if (esgs_ring_size
) {
5248 /* We add this symbol even on LLVM <= 8 to ensure that
5249 * shader->config.lds_size is set correctly below.
5251 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5252 sym
->name
= "esgs_ring";
5253 sym
->size
= esgs_ring_size
;
5254 sym
->align
= 64 * 1024;
5257 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5258 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5259 sym
->name
= "ngg_emit";
5260 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5264 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5265 .info
= &screen
->info
,
5267 .halt_at_entry
= screen
->options
.halt_shaders
,
5269 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5270 .num_parts
= num_parts
,
5271 .elf_ptrs
= part_elfs
,
5272 .elf_sizes
= part_sizes
,
5273 .num_shared_lds_symbols
= num_lds_symbols
,
5274 .shared_lds_symbols
= lds_symbols
});
5276 if (rtld
->lds_size
> 0) {
5277 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5278 shader
->config
.lds_size
=
5279 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5285 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5287 struct ac_rtld_binary rtld
;
5288 si_shader_binary_open(screen
, shader
, &rtld
);
5289 return rtld
.rx_size
;
5292 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5294 uint64_t *scratch_va
= data
;
5296 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5297 *value
= (uint32_t)*scratch_va
;
5300 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5301 /* Enable scratch coalescing. */
5302 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5303 S_008F04_SWIZZLE_ENABLE(1);
5304 if (HAVE_LLVM
< 0x0800) {
5305 /* Old LLVM created an R_ABS32_HI relocation for
5315 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5316 uint64_t scratch_va
)
5318 struct ac_rtld_binary binary
;
5319 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5322 si_resource_reference(&shader
->bo
, NULL
);
5323 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5324 sscreen
->cpdma_prefetch_writes_memory
?
5325 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5326 PIPE_USAGE_IMMUTABLE
,
5327 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5333 struct ac_rtld_upload_info u
= {};
5335 u
.get_external_symbol
= si_get_external_symbol
;
5336 u
.cb_data
= &scratch_va
;
5337 u
.rx_va
= shader
->bo
->gpu_address
;
5338 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5339 PIPE_TRANSFER_READ_WRITE
|
5340 PIPE_TRANSFER_UNSYNCHRONIZED
|
5341 RADEON_TRANSFER_TEMPORARY
);
5345 bool ok
= ac_rtld_upload(&u
);
5347 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5348 ac_rtld_close(&binary
);
5353 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5354 const struct si_shader_binary
*binary
,
5355 struct pipe_debug_callback
*debug
,
5356 const char *name
, FILE *file
)
5358 struct ac_rtld_binary rtld_binary
;
5360 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5361 .info
= &screen
->info
,
5363 .elf_ptrs
= &binary
->elf_buffer
,
5364 .elf_sizes
= &binary
->elf_size
}))
5370 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5373 if (nbytes
> INT_MAX
)
5376 if (debug
&& debug
->debug_message
) {
5377 /* Very long debug messages are cut off, so send the
5378 * disassembly one line at a time. This causes more
5379 * overhead, but on the plus side it simplifies
5380 * parsing of resulting logs.
5382 pipe_debug_message(debug
, SHADER_INFO
,
5383 "Shader Disassembly Begin");
5386 while (line
< nbytes
) {
5387 int count
= nbytes
- line
;
5388 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5390 count
= nl
- (disasm
+ line
);
5393 pipe_debug_message(debug
, SHADER_INFO
,
5394 "%.*s", count
, disasm
+ line
);
5400 pipe_debug_message(debug
, SHADER_INFO
,
5401 "Shader Disassembly End");
5405 fprintf(file
, "Shader %s disassembly:\n", name
);
5406 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5410 ac_rtld_close(&rtld_binary
);
5413 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5415 struct si_screen
*sscreen
= shader
->selector
->screen
;
5416 struct ac_shader_config
*conf
= &shader
->config
;
5417 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5418 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5419 unsigned lds_per_wave
= 0;
5420 unsigned max_simd_waves
;
5422 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5424 /* Compute LDS usage for PS. */
5425 switch (shader
->selector
->type
) {
5426 case PIPE_SHADER_FRAGMENT
:
5427 /* The minimum usage per wave is (num_inputs * 48). The maximum
5428 * usage is (num_inputs * 48 * 16).
5429 * We can get anything in between and it varies between waves.
5431 * The 48 bytes per input for a single primitive is equal to
5432 * 4 bytes/component * 4 components/input * 3 points.
5434 * Other stages don't know the size at compile time or don't
5435 * allocate LDS per wave, but instead they do it per thread group.
5437 lds_per_wave
= conf
->lds_size
* lds_increment
+
5438 align(num_inputs
* 48, lds_increment
);
5440 case PIPE_SHADER_COMPUTE
:
5441 if (shader
->selector
) {
5442 unsigned max_workgroup_size
=
5443 si_get_max_workgroup_size(shader
);
5444 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5445 DIV_ROUND_UP(max_workgroup_size
, 64);
5450 /* Compute the per-SIMD wave counts. */
5451 if (conf
->num_sgprs
) {
5453 MIN2(max_simd_waves
,
5454 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5457 if (conf
->num_vgprs
)
5458 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5460 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5461 * 16KB makes some SIMDs unoccupied). */
5463 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5465 shader
->info
.max_simd_waves
= max_simd_waves
;
5468 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5469 struct si_shader
*shader
,
5470 struct pipe_debug_callback
*debug
)
5472 const struct ac_shader_config
*conf
= &shader
->config
;
5474 if (screen
->options
.debug_disassembly
)
5475 si_shader_dump_disassembly(screen
, &shader
->binary
, debug
, "main", NULL
);
5477 pipe_debug_message(debug
, SHADER_INFO
,
5478 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5479 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5480 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5481 conf
->num_sgprs
, conf
->num_vgprs
,
5482 si_get_shader_binary_size(screen
, shader
),
5483 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5484 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5485 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5488 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5489 struct si_shader
*shader
,
5492 bool check_debug_option
)
5494 const struct ac_shader_config
*conf
= &shader
->config
;
5496 if (!check_debug_option
||
5497 si_can_dump_shader(sscreen
, processor
)) {
5498 if (processor
== PIPE_SHADER_FRAGMENT
) {
5499 fprintf(file
, "*** SHADER CONFIG ***\n"
5500 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5501 "SPI_PS_INPUT_ENA = 0x%04x\n",
5502 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5505 fprintf(file
, "*** SHADER STATS ***\n"
5508 "Spilled SGPRs: %d\n"
5509 "Spilled VGPRs: %d\n"
5510 "Private memory VGPRs: %d\n"
5511 "Code Size: %d bytes\n"
5513 "Scratch: %d bytes per wave\n"
5515 "********************\n\n\n",
5516 conf
->num_sgprs
, conf
->num_vgprs
,
5517 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5518 shader
->info
.private_mem_vgprs
,
5519 si_get_shader_binary_size(sscreen
, shader
),
5520 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5521 shader
->info
.max_simd_waves
);
5525 const char *si_get_shader_name(const struct si_shader
*shader
, unsigned processor
)
5527 switch (processor
) {
5528 case PIPE_SHADER_VERTEX
:
5529 if (shader
->key
.as_es
)
5530 return "Vertex Shader as ES";
5531 else if (shader
->key
.as_ls
)
5532 return "Vertex Shader as LS";
5533 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5534 return "Vertex Shader as Primitive Discard CS";
5535 else if (shader
->key
.as_ngg
)
5536 return "Vertex Shader as ESGS";
5538 return "Vertex Shader as VS";
5539 case PIPE_SHADER_TESS_CTRL
:
5540 return "Tessellation Control Shader";
5541 case PIPE_SHADER_TESS_EVAL
:
5542 if (shader
->key
.as_es
)
5543 return "Tessellation Evaluation Shader as ES";
5544 else if (shader
->key
.as_ngg
)
5545 return "Tessellation Evaluation Shader as ESGS";
5547 return "Tessellation Evaluation Shader as VS";
5548 case PIPE_SHADER_GEOMETRY
:
5549 if (shader
->is_gs_copy_shader
)
5550 return "GS Copy Shader as VS";
5552 return "Geometry Shader";
5553 case PIPE_SHADER_FRAGMENT
:
5554 return "Pixel Shader";
5555 case PIPE_SHADER_COMPUTE
:
5556 return "Compute Shader";
5558 return "Unknown Shader";
5562 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5563 struct pipe_debug_callback
*debug
, unsigned processor
,
5564 FILE *file
, bool check_debug_option
)
5566 if (!check_debug_option
||
5567 si_can_dump_shader(sscreen
, processor
))
5568 si_dump_shader_key(processor
, shader
, file
);
5570 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5571 if (shader
->previous_stage
&&
5572 shader
->previous_stage
->binary
.llvm_ir_string
) {
5573 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5574 si_get_shader_name(shader
, processor
));
5575 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5578 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5579 si_get_shader_name(shader
, processor
));
5580 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5583 if (!check_debug_option
||
5584 (si_can_dump_shader(sscreen
, processor
) &&
5585 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5586 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
, processor
));
5589 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5590 debug
, "prolog", file
);
5591 if (shader
->previous_stage
)
5592 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5593 debug
, "previous stage", file
);
5594 if (shader
->prolog2
)
5595 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5596 debug
, "prolog2", file
);
5598 si_shader_dump_disassembly(sscreen
, &shader
->binary
, debug
, "main", file
);
5601 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5602 debug
, "epilog", file
);
5603 fprintf(file
, "\n");
5606 si_shader_dump_stats(sscreen
, shader
, processor
, file
,
5607 check_debug_option
);
5610 static int si_compile_llvm(struct si_screen
*sscreen
,
5611 struct si_shader_binary
*binary
,
5612 struct ac_shader_config
*conf
,
5613 struct ac_llvm_compiler
*compiler
,
5615 struct pipe_debug_callback
*debug
,
5618 bool less_optimized
)
5620 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5622 if (si_can_dump_shader(sscreen
, processor
)) {
5623 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5625 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5626 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5627 ac_dump_module(mod
);
5628 fprintf(stderr
, "\n");
5632 if (sscreen
->record_llvm_ir
) {
5633 char *ir
= LLVMPrintModuleToString(mod
);
5634 binary
->llvm_ir_string
= strdup(ir
);
5635 LLVMDisposeMessage(ir
);
5638 if (!si_replace_shader(count
, binary
)) {
5639 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5645 struct ac_rtld_binary rtld
;
5646 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5647 .info
= &sscreen
->info
,
5649 .elf_ptrs
= &binary
->elf_buffer
,
5650 .elf_sizes
= &binary
->elf_size
}))
5653 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5654 ac_rtld_close(&rtld
);
5658 /* Enable 64-bit and 16-bit denormals, because there is no performance
5661 * If denormals are enabled, all floating-point output modifiers are
5664 * Don't enable denormals for 32-bit floats, because:
5665 * - Floating-point output modifiers would be ignored by the hw.
5666 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5667 * have to stop using those.
5668 * - GFX6 & GFX7 would be very slow.
5670 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5675 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5677 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5678 LLVMBuildRetVoid(ctx
->ac
.builder
);
5680 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5683 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5685 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5686 struct ac_llvm_compiler
*compiler
,
5687 struct si_shader_selector
*gs_selector
,
5688 struct pipe_debug_callback
*debug
)
5690 struct si_shader_context ctx
;
5691 struct si_shader
*shader
;
5692 LLVMBuilderRef builder
;
5693 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5694 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5698 shader
= CALLOC_STRUCT(si_shader
);
5702 /* We can leave the fence as permanently signaled because the GS copy
5703 * shader only becomes visible globally after it has been compiled. */
5704 util_queue_fence_init(&shader
->ready
);
5706 shader
->selector
= gs_selector
;
5707 shader
->is_gs_copy_shader
= true;
5709 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
5710 ctx
.shader
= shader
;
5711 ctx
.type
= PIPE_SHADER_VERTEX
;
5713 builder
= ctx
.ac
.builder
;
5715 create_function(&ctx
);
5716 preload_ring_buffers(&ctx
);
5718 LLVMValueRef voffset
=
5719 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5720 LLVMConstInt(ctx
.i32
, 4, 0), "");
5722 /* Fetch the vertex stream ID.*/
5723 LLVMValueRef stream_id
;
5725 if (gs_selector
->so
.num_outputs
)
5726 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5728 stream_id
= ctx
.i32_0
;
5730 /* Fill in output information. */
5731 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5732 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5733 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5735 for (int chan
= 0; chan
< 4; chan
++) {
5736 outputs
[i
].vertex_stream
[chan
] =
5737 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5741 LLVMBasicBlockRef end_bb
;
5742 LLVMValueRef switch_inst
;
5744 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5745 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5747 for (int stream
= 0; stream
< 4; stream
++) {
5748 LLVMBasicBlockRef bb
;
5751 if (!gsinfo
->num_stream_output_components
[stream
])
5754 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5757 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5758 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5759 LLVMPositionBuilderAtEnd(builder
, bb
);
5761 /* Fetch vertex data from GSVS ring */
5763 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5764 for (unsigned chan
= 0; chan
< 4; chan
++) {
5765 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5766 outputs
[i
].vertex_stream
[chan
] != stream
) {
5767 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5771 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5772 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5775 outputs
[i
].values
[chan
] =
5776 ac_build_buffer_load(&ctx
.ac
,
5777 ctx
.gsvs_ring
[0], 1,
5784 /* Streamout and exports. */
5785 if (gs_selector
->so
.num_outputs
) {
5786 si_llvm_emit_streamout(&ctx
, outputs
,
5787 gsinfo
->num_outputs
,
5792 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5794 LLVMBuildBr(builder
, end_bb
);
5797 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5799 LLVMBuildRetVoid(ctx
.ac
.builder
);
5801 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5802 si_llvm_optimize_module(&ctx
);
5805 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5806 &ctx
.shader
->config
, ctx
.compiler
,
5808 debug
, PIPE_SHADER_GEOMETRY
,
5809 "GS Copy Shader", false) == 0) {
5810 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5811 fprintf(stderr
, "GS Copy Shader:\n");
5812 si_shader_dump(sscreen
, ctx
.shader
, debug
,
5813 PIPE_SHADER_GEOMETRY
, stderr
, true);
5815 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5816 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5821 si_llvm_dispose(&ctx
);
5827 si_fix_resource_usage(sscreen
, shader
);
5832 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5833 const struct si_vs_prolog_bits
*prolog
,
5834 const char *prefix
, FILE *f
)
5836 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5837 prefix
, prolog
->instance_divisor_is_one
);
5838 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5839 prefix
, prolog
->instance_divisor_is_fetched
);
5840 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5841 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5842 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5843 prefix
, prolog
->ls_vgpr_fix
);
5845 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5846 fprintf(f
, " mono.vs.fix_fetch = {");
5847 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5848 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5854 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5855 fix
.u
.num_channels_m1
, fix
.u
.format
);
5860 static void si_dump_shader_key(unsigned processor
, const struct si_shader
*shader
,
5863 const struct si_shader_key
*key
= &shader
->key
;
5865 fprintf(f
, "SHADER KEY\n");
5867 switch (processor
) {
5868 case PIPE_SHADER_VERTEX
:
5869 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5870 "part.vs.prolog", f
);
5871 fprintf(f
, " as_es = %u\n", key
->as_es
);
5872 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5873 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5874 key
->mono
.u
.vs_export_prim_id
);
5875 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5876 key
->opt
.vs_as_prim_discard_cs
);
5877 fprintf(f
, " opt.cs_prim_type = %s\n",
5878 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5879 fprintf(f
, " opt.cs_indexed = %u\n",
5880 key
->opt
.cs_indexed
);
5881 fprintf(f
, " opt.cs_instancing = %u\n",
5882 key
->opt
.cs_instancing
);
5883 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5884 key
->opt
.cs_primitive_restart
);
5885 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5886 key
->opt
.cs_provoking_vertex_first
);
5887 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5888 key
->opt
.cs_need_correct_orientation
);
5889 fprintf(f
, " opt.cs_cull_front = %u\n",
5890 key
->opt
.cs_cull_front
);
5891 fprintf(f
, " opt.cs_cull_back = %u\n",
5892 key
->opt
.cs_cull_back
);
5893 fprintf(f
, " opt.cs_cull_z = %u\n",
5894 key
->opt
.cs_cull_z
);
5895 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5896 key
->opt
.cs_halfz_clip_space
);
5899 case PIPE_SHADER_TESS_CTRL
:
5900 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5901 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5902 "part.tcs.ls_prolog", f
);
5904 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5905 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5908 case PIPE_SHADER_TESS_EVAL
:
5909 fprintf(f
, " as_es = %u\n", key
->as_es
);
5910 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5911 key
->mono
.u
.vs_export_prim_id
);
5914 case PIPE_SHADER_GEOMETRY
:
5915 if (shader
->is_gs_copy_shader
)
5918 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5919 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5920 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5921 "part.gs.vs_prolog", f
);
5923 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5926 case PIPE_SHADER_COMPUTE
:
5929 case PIPE_SHADER_FRAGMENT
:
5930 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5931 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5932 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5933 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5934 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5935 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5936 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5937 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5938 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5939 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5940 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5941 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5942 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5943 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5944 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5945 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5946 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5953 if ((processor
== PIPE_SHADER_GEOMETRY
||
5954 processor
== PIPE_SHADER_TESS_EVAL
||
5955 processor
== PIPE_SHADER_VERTEX
) &&
5956 !key
->as_es
&& !key
->as_ls
) {
5957 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5958 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5962 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5963 struct si_screen
*sscreen
,
5964 struct ac_llvm_compiler
*compiler
)
5966 struct lp_build_tgsi_context
*bld_base
;
5968 si_llvm_context_init(ctx
, sscreen
, compiler
);
5970 bld_base
= &ctx
->bld_base
;
5971 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5973 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5974 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5975 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5977 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5979 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5981 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5982 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5983 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5984 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
5986 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
5987 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
5988 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
5989 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
5990 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
5991 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
5992 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
5993 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
5995 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
5996 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
5997 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6000 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
6002 struct si_shader
*shader
= ctx
->shader
;
6003 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6005 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
6006 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
6007 shader
->key
.as_ls
||
6011 ac_optimize_vs_outputs(&ctx
->ac
,
6013 shader
->info
.vs_output_param_offset
,
6015 &shader
->info
.nr_param_exports
);
6018 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6019 unsigned param
, unsigned bitoffset
)
6021 LLVMValueRef args
[] = {
6022 LLVMGetParam(ctx
->main_fn
, param
),
6023 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6025 ac_build_intrinsic(&ctx
->ac
,
6026 "llvm.amdgcn.init.exec.from.input",
6027 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
6030 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6031 const struct si_vs_prolog_bits
*key
)
6033 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6035 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6038 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
6040 struct si_shader
*shader
= ctx
->shader
;
6041 struct si_shader_selector
*sel
= shader
->selector
;
6042 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6044 // TODO clean all this up!
6045 switch (ctx
->type
) {
6046 case PIPE_SHADER_VERTEX
:
6047 ctx
->load_input
= declare_input_vs
;
6048 if (shader
->key
.as_ls
)
6049 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6050 else if (shader
->key
.as_es
)
6051 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6052 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6053 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6054 else if (shader
->key
.as_ngg
)
6055 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6057 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6058 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6059 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6061 case PIPE_SHADER_TESS_CTRL
:
6062 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6063 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6064 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6065 bld_base
->emit_store
= store_output_tcs
;
6066 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6067 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6068 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6069 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6071 case PIPE_SHADER_TESS_EVAL
:
6072 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6073 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6074 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6075 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6076 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6077 if (shader
->key
.as_es
)
6078 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6080 if (shader
->key
.as_ngg
)
6081 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6083 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6085 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6087 case PIPE_SHADER_GEOMETRY
:
6088 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6089 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6090 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6091 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6092 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6093 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6095 case PIPE_SHADER_FRAGMENT
:
6096 ctx
->load_input
= declare_input_fs
;
6097 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6098 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6099 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6100 ctx
->abi
.load_sample_position
= load_sample_position
;
6101 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6102 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6104 case PIPE_SHADER_COMPUTE
:
6105 ctx
->abi
.load_local_group_size
= get_block_size
;
6108 assert(!"Unsupported shader type");
6112 ctx
->abi
.load_ubo
= load_ubo
;
6113 ctx
->abi
.load_ssbo
= load_ssbo
;
6115 create_function(ctx
);
6116 preload_ring_buffers(ctx
);
6118 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6119 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6120 for (unsigned i
= 0; i
< 6; i
++) {
6121 ctx
->invoc0_tess_factors
[i
] =
6122 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6126 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6127 for (unsigned i
= 0; i
< 4; i
++) {
6128 ctx
->gs_next_vertex
[i
] =
6129 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6131 if (shader
->key
.as_ngg
) {
6132 for (unsigned i
= 0; i
< 4; ++i
) {
6133 ctx
->gs_curprim_verts
[i
] =
6134 lp_build_alloca(&ctx
->gallivm
, ctx
->ac
.i32
, "");
6135 ctx
->gs_generated_prims
[i
] =
6136 lp_build_alloca(&ctx
->gallivm
, ctx
->ac
.i32
, "");
6139 unsigned scratch_size
= 8;
6140 if (sel
->so
.num_outputs
)
6143 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6144 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6145 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6146 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6147 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6149 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6150 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6151 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6152 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6156 if (shader
->key
.as_ngg
&& ctx
->type
!= PIPE_SHADER_GEOMETRY
) {
6157 /* Unconditionally declare scratch space base for streamout and
6158 * vertex compaction. Whether space is actually allocated is
6159 * determined during linking / PM4 creation.
6161 * Add an extra dword per vertex to ensure an odd stride, which
6162 * avoids bank conflicts for SoA accesses.
6164 declare_esgs_ring(ctx
);
6166 /* This is really only needed when streamout and / or vertex
6167 * compaction is enabled.
6169 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6170 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6171 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6172 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6173 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6176 /* For GFX9 merged shaders:
6177 * - Set EXEC for the first shader. If the prolog is present, set
6178 * EXEC there instead.
6179 * - Add a barrier before the second shader.
6180 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6181 * an if-statement. This is required for correctness in geometry
6182 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6185 * For monolithic merged shaders, the first shader is wrapped in an
6186 * if-block together with its prolog in si_build_wrapper_function.
6188 * NGG vertex and tess eval shaders running as the last
6189 * vertex/geometry stage handle execution explicitly using
6192 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6193 if (!shader
->is_monolithic
&&
6194 sel
->info
.num_instructions
> 1 && /* not empty shader */
6195 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6196 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6197 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6198 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6199 si_init_exec_from_input(ctx
,
6200 ctx
->param_merged_wave_info
, 0);
6201 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6202 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6203 shader
->key
.as_ngg
) {
6204 LLVMValueRef num_threads
;
6205 bool nested_barrier
;
6207 if (!shader
->is_monolithic
||
6208 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6209 shader
->key
.as_ngg
))
6210 ac_init_exec_full_mask(&ctx
->ac
);
6212 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6213 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6214 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6215 gfx10_ngg_gs_emit_prologue(ctx
);
6216 nested_barrier
= false;
6218 nested_barrier
= true;
6221 /* Number of patches / primitives */
6222 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6224 /* Number of vertices */
6225 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 0, 8);
6226 nested_barrier
= false;
6230 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6231 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6232 lp_build_if(&ctx
->merged_wrap_if_state
, &ctx
->gallivm
, ena
);
6234 if (nested_barrier
) {
6235 /* Execute a barrier before the second shader in
6238 * Execute the barrier inside the conditional block,
6239 * so that empty waves can jump directly to s_endpgm,
6240 * which will also signal the barrier.
6242 * This is possible in gfx9, because an empty wave
6243 * for the second shader does not participate in
6244 * the epilogue. With NGG, empty waves may still
6245 * be required to export data (e.g. GS output vertices),
6246 * so we cannot let them exit early.
6248 * If the shader is TCS and the TCS epilog is present
6249 * and contains a barrier, it will wait there and then
6252 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6257 if (sel
->force_correct_derivs_after_kill
) {
6258 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6259 /* true = don't kill. */
6260 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6261 ctx
->postponed_kill
);
6265 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6266 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6270 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6271 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6276 si_llvm_build_ret(ctx
, ctx
->return_value
);
6281 * Compute the VS prolog key, which contains all the information needed to
6282 * build the VS prolog function, and set shader->info bits where needed.
6284 * \param info Shader info of the vertex shader.
6285 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6286 * \param prolog_key Key of the VS prolog
6287 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6288 * \param key Output shader part key.
6290 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6291 unsigned num_input_sgprs
,
6292 const struct si_vs_prolog_bits
*prolog_key
,
6293 struct si_shader
*shader_out
,
6294 union si_shader_part_key
*key
)
6296 memset(key
, 0, sizeof(*key
));
6297 key
->vs_prolog
.states
= *prolog_key
;
6298 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6299 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6300 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6301 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6302 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6304 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6305 key
->vs_prolog
.as_ls
= 1;
6306 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6307 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6308 key
->vs_prolog
.as_es
= 1;
6309 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6310 } else if (shader_out
->key
.as_ngg
) {
6311 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6314 /* Enable loading the InstanceID VGPR. */
6315 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6317 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6318 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6319 shader_out
->info
.uses_instanceid
= true;
6323 * Compute the PS prolog key, which contains all the information needed to
6324 * build the PS prolog function, and set related bits in shader->config.
6326 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6327 union si_shader_part_key
*key
,
6328 bool separate_prolog
)
6330 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6332 memset(key
, 0, sizeof(*key
));
6333 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6334 key
->ps_prolog
.colors_read
= info
->colors_read
;
6335 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6336 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6337 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6338 (key
->ps_prolog
.colors_read
||
6339 key
->ps_prolog
.states
.force_persp_sample_interp
||
6340 key
->ps_prolog
.states
.force_linear_sample_interp
||
6341 key
->ps_prolog
.states
.force_persp_center_interp
||
6342 key
->ps_prolog
.states
.force_linear_center_interp
||
6343 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6344 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6345 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6347 if (info
->colors_read
) {
6348 unsigned *color
= shader
->selector
->color_attr_index
;
6350 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6351 /* BCOLORs are stored after the last input. */
6352 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6353 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6354 if (separate_prolog
)
6355 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6358 for (unsigned i
= 0; i
< 2; i
++) {
6359 unsigned interp
= info
->input_interpolate
[color
[i
]];
6360 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6362 if (!(info
->colors_read
& (0xf << i
*4)))
6365 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6367 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6368 interp
== TGSI_INTERPOLATE_COLOR
)
6369 interp
= TGSI_INTERPOLATE_CONSTANT
;
6372 case TGSI_INTERPOLATE_CONSTANT
:
6373 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6375 case TGSI_INTERPOLATE_PERSPECTIVE
:
6376 case TGSI_INTERPOLATE_COLOR
:
6377 /* Force the interpolation location for colors here. */
6378 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6379 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6380 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6381 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6384 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6385 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6386 if (separate_prolog
) {
6387 shader
->config
.spi_ps_input_ena
|=
6388 S_0286CC_PERSP_SAMPLE_ENA(1);
6391 case TGSI_INTERPOLATE_LOC_CENTER
:
6392 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6393 if (separate_prolog
) {
6394 shader
->config
.spi_ps_input_ena
|=
6395 S_0286CC_PERSP_CENTER_ENA(1);
6398 case TGSI_INTERPOLATE_LOC_CENTROID
:
6399 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6400 if (separate_prolog
) {
6401 shader
->config
.spi_ps_input_ena
|=
6402 S_0286CC_PERSP_CENTROID_ENA(1);
6409 case TGSI_INTERPOLATE_LINEAR
:
6410 /* Force the interpolation location for colors here. */
6411 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6412 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6413 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6414 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6416 /* The VGPR assignment for non-monolithic shaders
6417 * works because InitialPSInputAddr is set on the
6418 * main shader and PERSP_PULL_MODEL is never used.
6421 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6422 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6423 separate_prolog
? 6 : 9;
6424 if (separate_prolog
) {
6425 shader
->config
.spi_ps_input_ena
|=
6426 S_0286CC_LINEAR_SAMPLE_ENA(1);
6429 case TGSI_INTERPOLATE_LOC_CENTER
:
6430 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6431 separate_prolog
? 8 : 11;
6432 if (separate_prolog
) {
6433 shader
->config
.spi_ps_input_ena
|=
6434 S_0286CC_LINEAR_CENTER_ENA(1);
6437 case TGSI_INTERPOLATE_LOC_CENTROID
:
6438 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6439 separate_prolog
? 10 : 13;
6440 if (separate_prolog
) {
6441 shader
->config
.spi_ps_input_ena
|=
6442 S_0286CC_LINEAR_CENTROID_ENA(1);
6457 * Check whether a PS prolog is required based on the key.
6459 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6461 return key
->ps_prolog
.colors_read
||
6462 key
->ps_prolog
.states
.force_persp_sample_interp
||
6463 key
->ps_prolog
.states
.force_linear_sample_interp
||
6464 key
->ps_prolog
.states
.force_persp_center_interp
||
6465 key
->ps_prolog
.states
.force_linear_center_interp
||
6466 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6467 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6468 key
->ps_prolog
.states
.poly_stipple
||
6469 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6473 * Compute the PS epilog key, which contains all the information needed to
6474 * build the PS epilog function.
6476 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6477 union si_shader_part_key
*key
)
6479 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6480 memset(key
, 0, sizeof(*key
));
6481 key
->ps_epilog
.colors_written
= info
->colors_written
;
6482 key
->ps_epilog
.writes_z
= info
->writes_z
;
6483 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6484 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6485 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6489 * Build the GS prolog function. Rotate the input vertices for triangle strips
6492 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6493 union si_shader_part_key
*key
)
6495 unsigned num_sgprs
, num_vgprs
;
6496 struct si_function_info fninfo
;
6497 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6498 LLVMTypeRef returns
[48];
6499 LLVMValueRef func
, ret
;
6501 si_init_function_info(&fninfo
);
6503 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6504 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6505 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6507 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6508 num_vgprs
= 5; /* ES inputs are not needed by GS */
6510 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6514 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6515 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6516 returns
[i
] = ctx
->i32
;
6519 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6520 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6521 returns
[num_sgprs
+ i
] = ctx
->f32
;
6524 /* Create the function. */
6525 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6527 func
= ctx
->main_fn
;
6529 /* Set the full EXEC mask for the prolog, because we are only fiddling
6530 * with registers here. The main shader part will set the correct EXEC
6533 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6534 ac_init_exec_full_mask(&ctx
->ac
);
6536 /* Copy inputs to outputs. This should be no-op, as the registers match,
6537 * but it will prevent the compiler from overwriting them unintentionally.
6539 ret
= ctx
->return_value
;
6540 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6541 LLVMValueRef p
= LLVMGetParam(func
, i
);
6542 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6544 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6545 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6546 p
= ac_to_float(&ctx
->ac
, p
);
6547 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6550 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6551 /* Remap the input vertices for every other primitive. */
6552 const unsigned gfx6_vtx_params
[6] = {
6560 const unsigned gfx9_vtx_params
[3] = {
6565 LLVMValueRef vtx_in
[6], vtx_out
[6];
6566 LLVMValueRef prim_id
, rotate
;
6568 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6569 for (unsigned i
= 0; i
< 3; i
++) {
6570 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6571 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6574 for (unsigned i
= 0; i
< 6; i
++)
6575 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6578 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6579 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6581 for (unsigned i
= 0; i
< 6; ++i
) {
6582 LLVMValueRef base
, rotated
;
6584 rotated
= vtx_in
[(i
+ 4) % 6];
6585 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6588 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6589 for (unsigned i
= 0; i
< 3; i
++) {
6590 LLVMValueRef hi
, out
;
6592 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6593 LLVMConstInt(ctx
->i32
, 16, 0), "");
6594 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6595 out
= ac_to_float(&ctx
->ac
, out
);
6596 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6597 gfx9_vtx_params
[i
], "");
6600 for (unsigned i
= 0; i
< 6; i
++) {
6603 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6604 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6605 gfx6_vtx_params
[i
], "");
6610 LLVMBuildRet(builder
, ret
);
6614 * Given a list of shader part functions, build a wrapper function that
6615 * runs them in sequence to form a monolithic shader.
6617 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6618 LLVMValueRef
*parts
,
6621 unsigned next_shader_first_part
)
6623 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6624 /* PS epilog has one arg per color component; gfx9 merged shader
6625 * prologs need to forward 32 user SGPRs.
6627 struct si_function_info fninfo
;
6628 LLVMValueRef initial
[64], out
[64];
6629 LLVMTypeRef function_type
;
6630 unsigned num_first_params
;
6631 unsigned num_out
, initial_num_out
;
6632 MAYBE_UNUSED
unsigned num_out_sgpr
; /* used in debug checks */
6633 MAYBE_UNUSED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6634 unsigned num_sgprs
, num_vgprs
;
6636 struct lp_build_if_state if_state
;
6638 si_init_function_info(&fninfo
);
6640 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6641 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6642 AC_FUNC_ATTR_ALWAYSINLINE
);
6643 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6646 /* The parameters of the wrapper function correspond to those of the
6647 * first part in terms of SGPRs and VGPRs, but we use the types of the
6648 * main part to get the right types. This is relevant for the
6649 * dereferenceable attribute on descriptor table pointers.
6654 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6655 num_first_params
= LLVMCountParamTypes(function_type
);
6657 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6658 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6660 if (ac_is_sgpr_param(param
)) {
6661 assert(num_vgprs
== 0);
6662 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6664 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6669 while (gprs
< num_sgprs
+ num_vgprs
) {
6670 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6671 LLVMTypeRef type
= LLVMTypeOf(param
);
6672 unsigned size
= ac_get_type_size(type
) / 4;
6674 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6676 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6677 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6678 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6683 /* Prepare the return type. */
6684 unsigned num_returns
= 0;
6685 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6687 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6688 return_type
= LLVMGetReturnType(last_func_type
);
6690 switch (LLVMGetTypeKind(return_type
)) {
6691 case LLVMStructTypeKind
:
6692 num_returns
= LLVMCountStructElementTypes(return_type
);
6693 assert(num_returns
<= ARRAY_SIZE(returns
));
6694 LLVMGetStructElementTypes(return_type
, returns
);
6696 case LLVMVoidTypeKind
:
6699 unreachable("unexpected type");
6702 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6703 si_get_max_workgroup_size(ctx
->shader
));
6705 if (is_merged_shader(ctx
))
6706 ac_init_exec_full_mask(&ctx
->ac
);
6708 /* Record the arguments of the function as if they were an output of
6714 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6715 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6716 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6717 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6718 unsigned size
= ac_get_type_size(param_type
) / 4;
6721 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6722 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6723 param_type
= ctx
->i32
;
6726 if (param_type
!= out_type
)
6727 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6728 out
[num_out
++] = param
;
6730 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6732 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6733 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6734 param_type
= ctx
->i64
;
6737 if (param_type
!= vector_type
)
6738 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6740 for (unsigned j
= 0; j
< size
; ++j
)
6741 out
[num_out
++] = LLVMBuildExtractElement(
6742 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6745 if (i
< fninfo
.num_sgpr_params
)
6746 num_out_sgpr
= num_out
;
6749 memcpy(initial
, out
, sizeof(out
));
6750 initial_num_out
= num_out
;
6751 initial_num_out_sgpr
= num_out_sgpr
;
6753 /* Now chain the parts. */
6755 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6756 LLVMValueRef in
[48];
6757 LLVMTypeRef ret_type
;
6758 unsigned out_idx
= 0;
6759 unsigned num_params
= LLVMCountParams(parts
[part
]);
6761 /* Merged shaders are executed conditionally depending
6762 * on the number of enabled threads passed in the input SGPRs. */
6763 if (is_multi_part_shader(ctx
) && part
== 0) {
6764 LLVMValueRef ena
, count
= initial
[3];
6766 count
= LLVMBuildAnd(builder
, count
,
6767 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6768 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6769 ac_get_thread_id(&ctx
->ac
), count
, "");
6770 lp_build_if(&if_state
, &ctx
->gallivm
, ena
);
6773 /* Derive arguments for the next part from outputs of the
6776 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6778 LLVMTypeRef param_type
;
6780 unsigned param_size
;
6781 LLVMValueRef arg
= NULL
;
6783 param
= LLVMGetParam(parts
[part
], param_idx
);
6784 param_type
= LLVMTypeOf(param
);
6785 param_size
= ac_get_type_size(param_type
) / 4;
6786 is_sgpr
= ac_is_sgpr_param(param
);
6789 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6790 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6791 } else if (out_idx
< num_out_sgpr
) {
6792 /* Skip returned SGPRs the current part doesn't
6793 * declare on the input. */
6794 out_idx
= num_out_sgpr
;
6797 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6799 if (param_size
== 1)
6802 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6804 if (LLVMTypeOf(arg
) != param_type
) {
6805 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6806 if (LLVMGetPointerAddressSpace(param_type
) ==
6807 AC_ADDR_SPACE_CONST_32BIT
) {
6808 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6809 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6811 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6812 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6815 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6819 in
[param_idx
] = arg
;
6820 out_idx
+= param_size
;
6823 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6825 if (is_multi_part_shader(ctx
) &&
6826 part
+ 1 == next_shader_first_part
) {
6827 lp_build_endif(&if_state
);
6829 /* The second half of the merged shader should use
6830 * the inputs from the toplevel (wrapper) function,
6831 * not the return value from the last call.
6833 * That's because the last call was executed condi-
6834 * tionally, so we can't consume it in the main
6837 memcpy(out
, initial
, sizeof(initial
));
6838 num_out
= initial_num_out
;
6839 num_out_sgpr
= initial_num_out_sgpr
;
6843 /* Extract the returned GPRs. */
6844 ret_type
= LLVMTypeOf(ret
);
6848 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6849 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6851 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6853 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6855 LLVMBuildExtractValue(builder
, ret
, i
, "");
6857 assert(num_out
< ARRAY_SIZE(out
));
6858 out
[num_out
++] = val
;
6860 if (LLVMTypeOf(val
) == ctx
->i32
) {
6861 assert(num_out_sgpr
+ 1 == num_out
);
6862 num_out_sgpr
= num_out
;
6868 /* Return the value from the last part. */
6869 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6870 LLVMBuildRetVoid(builder
);
6872 LLVMBuildRet(builder
, ret
);
6875 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6876 struct si_shader_selector
*sel
)
6878 if (!compiler
->low_opt_passes
)
6881 /* Assume a slow CPU. */
6882 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6883 sel
->screen
->info
.chip_class
<= GFX8
);
6885 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6887 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6888 sel
->info
.num_memory_instructions
> 1000;
6891 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6892 struct ac_llvm_compiler
*compiler
,
6893 struct si_shader
*shader
,
6894 struct pipe_debug_callback
*debug
)
6896 struct si_shader_selector
*sel
= shader
->selector
;
6897 struct si_shader_context ctx
;
6900 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6901 * conversion fails. */
6902 if (si_can_dump_shader(sscreen
, sel
->info
.processor
) &&
6903 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6905 tgsi_dump(sel
->tokens
, 0);
6907 nir_print_shader(sel
->nir
, stderr
);
6908 si_dump_streamout(&sel
->so
);
6911 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
6912 si_llvm_context_set_tgsi(&ctx
, shader
);
6914 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6915 sizeof(shader
->info
.vs_output_param_offset
));
6917 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6919 if (!si_compile_tgsi_main(&ctx
)) {
6920 si_llvm_dispose(&ctx
);
6924 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6925 LLVMValueRef parts
[2];
6926 bool need_prolog
= sel
->vs_needs_prolog
;
6928 parts
[1] = ctx
.main_fn
;
6931 union si_shader_part_key prolog_key
;
6932 si_get_vs_prolog_key(&sel
->info
,
6933 shader
->info
.num_input_sgprs
,
6934 &shader
->key
.part
.vs
.prolog
,
6935 shader
, &prolog_key
);
6936 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6937 parts
[0] = ctx
.main_fn
;
6940 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6941 1 + need_prolog
, need_prolog
, 0);
6943 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6944 si_build_prim_discard_compute_shader(&ctx
);
6945 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6946 if (sscreen
->info
.chip_class
>= GFX9
) {
6947 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6948 LLVMValueRef parts
[4];
6949 bool vs_needs_prolog
=
6950 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6953 parts
[2] = ctx
.main_fn
;
6956 union si_shader_part_key tcs_epilog_key
;
6957 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6958 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6959 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6960 parts
[3] = ctx
.main_fn
;
6962 /* VS as LS main part */
6963 struct si_shader shader_ls
= {};
6964 shader_ls
.selector
= ls
;
6965 shader_ls
.key
.as_ls
= 1;
6966 shader_ls
.key
.mono
= shader
->key
.mono
;
6967 shader_ls
.key
.opt
= shader
->key
.opt
;
6968 shader_ls
.is_monolithic
= true;
6969 si_llvm_context_set_tgsi(&ctx
, &shader_ls
);
6971 if (!si_compile_tgsi_main(&ctx
)) {
6972 si_llvm_dispose(&ctx
);
6975 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6976 parts
[1] = ctx
.main_fn
;
6979 if (vs_needs_prolog
) {
6980 union si_shader_part_key vs_prolog_key
;
6981 si_get_vs_prolog_key(&ls
->info
,
6982 shader_ls
.info
.num_input_sgprs
,
6983 &shader
->key
.part
.tcs
.ls_prolog
,
6984 shader
, &vs_prolog_key
);
6985 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
6986 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
6987 parts
[0] = ctx
.main_fn
;
6990 /* Reset the shader context. */
6991 ctx
.shader
= shader
;
6992 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
6994 si_build_wrapper_function(&ctx
,
6995 parts
+ !vs_needs_prolog
,
6996 4 - !vs_needs_prolog
, vs_needs_prolog
,
6997 vs_needs_prolog
? 2 : 1);
6999 LLVMValueRef parts
[2];
7000 union si_shader_part_key epilog_key
;
7002 parts
[0] = ctx
.main_fn
;
7004 memset(&epilog_key
, 0, sizeof(epilog_key
));
7005 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7006 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7007 parts
[1] = ctx
.main_fn
;
7009 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7011 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7012 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7013 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7014 LLVMValueRef es_prolog
= NULL
;
7015 LLVMValueRef es_main
= NULL
;
7016 LLVMValueRef gs_prolog
= NULL
;
7017 LLVMValueRef gs_main
= ctx
.main_fn
;
7020 union si_shader_part_key gs_prolog_key
;
7021 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7022 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7023 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7024 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7025 gs_prolog
= ctx
.main_fn
;
7028 struct si_shader shader_es
= {};
7029 shader_es
.selector
= es
;
7030 shader_es
.key
.as_es
= 1;
7031 shader_es
.key
.mono
= shader
->key
.mono
;
7032 shader_es
.key
.opt
= shader
->key
.opt
;
7033 shader_es
.is_monolithic
= true;
7034 si_llvm_context_set_tgsi(&ctx
, &shader_es
);
7036 if (!si_compile_tgsi_main(&ctx
)) {
7037 si_llvm_dispose(&ctx
);
7040 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7041 es_main
= ctx
.main_fn
;
7044 if (es
->vs_needs_prolog
) {
7045 union si_shader_part_key vs_prolog_key
;
7046 si_get_vs_prolog_key(&es
->info
,
7047 shader_es
.info
.num_input_sgprs
,
7048 &shader
->key
.part
.gs
.vs_prolog
,
7049 shader
, &vs_prolog_key
);
7050 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7051 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7052 es_prolog
= ctx
.main_fn
;
7055 /* Reset the shader context. */
7056 ctx
.shader
= shader
;
7057 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7059 /* Prepare the array of shader parts. */
7060 LLVMValueRef parts
[4];
7061 unsigned num_parts
= 0, main_part
, next_first_part
;
7064 parts
[num_parts
++] = es_prolog
;
7066 parts
[main_part
= num_parts
++] = es_main
;
7067 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7068 parts
[num_parts
++] = gs_main
;
7070 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7071 main_part
, next_first_part
);
7073 LLVMValueRef parts
[2];
7074 union si_shader_part_key prolog_key
;
7076 parts
[1] = ctx
.main_fn
;
7078 memset(&prolog_key
, 0, sizeof(prolog_key
));
7079 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7080 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7081 parts
[0] = ctx
.main_fn
;
7083 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7085 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7086 LLVMValueRef parts
[3];
7087 union si_shader_part_key prolog_key
;
7088 union si_shader_part_key epilog_key
;
7091 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7092 need_prolog
= si_need_ps_prolog(&prolog_key
);
7094 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7097 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7098 parts
[0] = ctx
.main_fn
;
7101 si_get_ps_epilog_key(shader
, &epilog_key
);
7102 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7103 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7105 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7106 need_prolog
? 1 : 0, 0);
7109 si_llvm_optimize_module(&ctx
);
7111 /* Post-optimization transformations and analysis. */
7112 si_optimize_vs_outputs(&ctx
);
7114 if ((debug
&& debug
->debug_message
) ||
7115 si_can_dump_shader(sscreen
, ctx
.type
)) {
7116 ctx
.shader
->info
.private_mem_vgprs
=
7117 ac_count_scratch_private_memory(ctx
.main_fn
);
7120 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7121 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7122 LLVMPointerTypeKind
);
7124 /* Compile to bytecode. */
7125 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7126 ctx
.ac
.module
, debug
, ctx
.type
,
7127 si_get_shader_name(shader
, ctx
.type
),
7128 si_should_optimize_less(compiler
, shader
->selector
));
7129 si_llvm_dispose(&ctx
);
7131 fprintf(stderr
, "LLVM failed to compile shader\n");
7135 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7136 * LLVM 3.9svn has this bug.
7138 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7139 unsigned wave_size
= 64;
7140 unsigned max_vgprs
= 256;
7141 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
7142 unsigned max_sgprs_per_wave
= 128;
7143 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7144 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7145 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7147 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7148 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7150 if (shader
->config
.num_sgprs
> max_sgprs
||
7151 shader
->config
.num_vgprs
> max_vgprs
) {
7152 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7153 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7154 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7155 max_sgprs
, max_vgprs
);
7157 /* Just terminate the process, because dependent
7158 * shaders can hang due to bad input data, but use
7159 * the env var to allow shader-db to work.
7161 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7166 /* Add the scratch offset to input SGPRs. */
7167 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7168 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7170 /* Calculate the number of fragment input VGPRs. */
7171 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7172 shader
->info
.num_input_vgprs
= 0;
7173 shader
->info
.face_vgpr_index
= -1;
7174 shader
->info
.ancillary_vgpr_index
= -1;
7176 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7177 shader
->info
.num_input_vgprs
+= 2;
7178 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7179 shader
->info
.num_input_vgprs
+= 2;
7180 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7181 shader
->info
.num_input_vgprs
+= 2;
7182 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7183 shader
->info
.num_input_vgprs
+= 3;
7184 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7185 shader
->info
.num_input_vgprs
+= 2;
7186 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7187 shader
->info
.num_input_vgprs
+= 2;
7188 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7189 shader
->info
.num_input_vgprs
+= 2;
7190 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7191 shader
->info
.num_input_vgprs
+= 1;
7192 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7193 shader
->info
.num_input_vgprs
+= 1;
7194 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7195 shader
->info
.num_input_vgprs
+= 1;
7196 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7197 shader
->info
.num_input_vgprs
+= 1;
7198 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7199 shader
->info
.num_input_vgprs
+= 1;
7200 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7201 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7202 shader
->info
.num_input_vgprs
+= 1;
7204 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7205 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7206 shader
->info
.num_input_vgprs
+= 1;
7208 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7209 shader
->info
.num_input_vgprs
+= 1;
7210 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7211 shader
->info
.num_input_vgprs
+= 1;
7214 si_calculate_max_simd_waves(shader
);
7215 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7220 * Create, compile and return a shader part (prolog or epilog).
7222 * \param sscreen screen
7223 * \param list list of shader parts of the same category
7224 * \param type shader type
7225 * \param key shader part key
7226 * \param prolog whether the part being requested is a prolog
7227 * \param tm LLVM target machine
7228 * \param debug debug callback
7229 * \param build the callback responsible for building the main function
7230 * \return non-NULL on success
7232 static struct si_shader_part
*
7233 si_get_shader_part(struct si_screen
*sscreen
,
7234 struct si_shader_part
**list
,
7235 enum pipe_shader_type type
,
7237 union si_shader_part_key
*key
,
7238 struct ac_llvm_compiler
*compiler
,
7239 struct pipe_debug_callback
*debug
,
7240 void (*build
)(struct si_shader_context
*,
7241 union si_shader_part_key
*),
7244 struct si_shader_part
*result
;
7246 mtx_lock(&sscreen
->shader_parts_mutex
);
7248 /* Find existing. */
7249 for (result
= *list
; result
; result
= result
->next
) {
7250 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7251 mtx_unlock(&sscreen
->shader_parts_mutex
);
7256 /* Compile a new one. */
7257 result
= CALLOC_STRUCT(si_shader_part
);
7260 struct si_shader shader
= {};
7261 struct si_shader_context ctx
;
7263 si_init_shader_ctx(&ctx
, sscreen
, compiler
);
7264 ctx
.shader
= &shader
;
7268 case PIPE_SHADER_VERTEX
:
7269 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7270 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7271 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7273 case PIPE_SHADER_TESS_CTRL
:
7275 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7277 case PIPE_SHADER_GEOMETRY
:
7280 case PIPE_SHADER_FRAGMENT
:
7282 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7284 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7287 unreachable("bad shader part");
7293 si_llvm_optimize_module(&ctx
);
7295 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7296 ctx
.ac
.module
, debug
, ctx
.type
, name
, false)) {
7302 result
->next
= *list
;
7306 si_llvm_dispose(&ctx
);
7307 mtx_unlock(&sscreen
->shader_parts_mutex
);
7311 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7313 LLVMValueRef ptr
[2], list
;
7314 bool merged_shader
= is_merged_shader(ctx
);
7316 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7317 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7318 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7323 * Build the vertex shader prolog function.
7325 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7326 * All inputs are returned unmodified. The vertex load indices are
7327 * stored after them, which will be used by the API VS for fetching inputs.
7329 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7334 * (VertexID + BaseVertex),
7335 * (InstanceID + StartInstance),
7336 * (InstanceID / 2 + StartInstance)
7338 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7339 union si_shader_part_key
*key
)
7341 struct si_function_info fninfo
;
7342 LLVMTypeRef
*returns
;
7343 LLVMValueRef ret
, func
;
7345 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7346 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7347 LLVMValueRef input_vgprs
[9];
7348 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7350 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7352 si_init_function_info(&fninfo
);
7354 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7355 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7356 sizeof(LLVMTypeRef
));
7359 /* Declare input and output SGPRs. */
7360 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7361 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7362 returns
[num_returns
++] = ctx
->i32
;
7365 /* Preloaded VGPRs (outputs must be floats) */
7366 for (i
= 0; i
< num_input_vgprs
; i
++) {
7367 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7368 returns
[num_returns
++] = ctx
->f32
;
7371 /* Vertex load indices. */
7372 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7373 returns
[num_returns
++] = ctx
->f32
;
7375 /* Create the function. */
7376 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7377 func
= ctx
->main_fn
;
7379 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7380 if (!key
->vs_prolog
.is_monolithic
)
7381 si_init_exec_from_input(ctx
, 3, 0);
7383 if (key
->vs_prolog
.as_ls
&&
7384 ctx
->screen
->has_ls_vgpr_init_bug
) {
7385 /* If there are no HS threads, SPI loads the LS VGPRs
7386 * starting at VGPR 0. Shift them back to where they
7389 LLVMValueRef has_hs_threads
=
7390 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7391 si_unpack_param(ctx
, 3, 8, 8),
7394 for (i
= 4; i
> 0; --i
) {
7395 input_vgprs
[i
+ 1] =
7396 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7398 input_vgprs
[i
- 1], "");
7403 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7404 unsigned instance_id_vgpr
=
7405 ctx
->screen
->info
.chip_class
>= GFX10
?
7407 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7409 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7410 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7412 /* InstanceID = VertexID >> 16;
7413 * VertexID = VertexID & 0xffff;
7415 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7416 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7417 LLVMConstInt(ctx
->i32
, 16, 0), "");
7418 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7419 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7422 /* Copy inputs to outputs. This should be no-op, as the registers match,
7423 * but it will prevent the compiler from overwriting them unintentionally.
7425 ret
= ctx
->return_value
;
7426 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7427 LLVMValueRef p
= LLVMGetParam(func
, i
);
7428 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7430 for (i
= 0; i
< num_input_vgprs
; i
++) {
7431 LLVMValueRef p
= input_vgprs
[i
];
7433 if (i
== vertex_id_vgpr
)
7434 p
= ctx
->abi
.vertex_id
;
7435 else if (i
== instance_id_vgpr
)
7436 p
= ctx
->abi
.instance_id
;
7438 p
= ac_to_float(&ctx
->ac
, p
);
7439 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7440 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7443 struct lp_build_if_state wrap_if_state
;
7444 LLVMValueRef original_ret
= ret
;
7445 bool wrapped
= false;
7447 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7448 LLVMValueRef num_threads
;
7451 num_threads
= si_unpack_param(ctx
, 3, 0, 8);
7452 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7453 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7454 lp_build_if(&wrap_if_state
, &ctx
->gallivm
, ena
);
7458 /* Compute vertex load indices from instance divisors. */
7459 LLVMValueRef instance_divisor_constbuf
= NULL
;
7461 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7462 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7463 LLVMValueRef buf_index
=
7464 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7465 instance_divisor_constbuf
=
7466 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7469 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7470 bool divisor_is_one
=
7471 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7472 bool divisor_is_fetched
=
7473 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7474 LLVMValueRef index
= NULL
;
7476 if (divisor_is_one
) {
7477 index
= ctx
->abi
.instance_id
;
7478 } else if (divisor_is_fetched
) {
7479 LLVMValueRef udiv_factors
[4];
7481 for (unsigned j
= 0; j
< 4; j
++) {
7483 buffer_load_const(ctx
, instance_divisor_constbuf
,
7484 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7485 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7487 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7488 * Such InstanceID might not be achievable in a reasonable time though.
7490 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7491 udiv_factors
[0], udiv_factors
[1],
7492 udiv_factors
[2], udiv_factors
[3]);
7495 if (divisor_is_one
|| divisor_is_fetched
) {
7496 /* Add StartInstance. */
7497 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7498 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7499 SI_SGPR_START_INSTANCE
), "");
7501 /* VertexID + BaseVertex */
7502 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7504 LLVMGetParam(func
, user_sgpr_base
+
7505 SI_SGPR_BASE_VERTEX
), "");
7508 index
= ac_to_float(&ctx
->ac
, index
);
7509 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7510 fninfo
.num_params
+ i
, "");
7514 lp_build_endif(&wrap_if_state
);
7516 LLVMValueRef values
[2] = {
7520 LLVMBasicBlockRef bbs
[2] = {
7521 wrap_if_state
.true_block
,
7522 wrap_if_state
.entry_block
7524 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7527 si_llvm_build_ret(ctx
, ret
);
7530 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7531 struct ac_llvm_compiler
*compiler
,
7532 struct si_shader
*shader
,
7533 struct pipe_debug_callback
*debug
,
7534 struct si_shader
*main_part
,
7535 const struct si_vs_prolog_bits
*key
)
7537 struct si_shader_selector
*vs
= main_part
->selector
;
7539 if (!si_vs_needs_prolog(vs
, key
))
7542 /* Get the prolog. */
7543 union si_shader_part_key prolog_key
;
7544 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7545 key
, shader
, &prolog_key
);
7548 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7549 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7550 debug
, si_build_vs_prolog_function
,
7551 "Vertex Shader Prolog");
7552 return shader
->prolog
!= NULL
;
7556 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7558 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7559 struct ac_llvm_compiler
*compiler
,
7560 struct si_shader
*shader
,
7561 struct pipe_debug_callback
*debug
)
7563 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7564 &shader
->key
.part
.vs
.prolog
);
7568 * Compile the TCS epilog function. This writes tesselation factors to memory
7569 * based on the output primitive type of the tesselator (determined by TES).
7571 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7572 union si_shader_part_key
*key
)
7574 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7575 struct si_function_info fninfo
;
7578 si_init_function_info(&fninfo
);
7580 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7581 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7582 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7583 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7584 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7585 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7586 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7587 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7588 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7589 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7590 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7591 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7592 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7593 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7594 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7595 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7596 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7597 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7598 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7599 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7601 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7602 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7603 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7604 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7605 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7606 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7607 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7608 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7609 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7610 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7613 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7614 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7615 unsigned tess_factors_idx
=
7616 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7617 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7618 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7620 for (unsigned i
= 0; i
< 6; i
++)
7621 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7623 /* Create the function. */
7624 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7625 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 64);
7626 ac_declare_lds_as_pointer(&ctx
->ac
);
7627 func
= ctx
->main_fn
;
7629 LLVMValueRef invoc0_tess_factors
[6];
7630 for (unsigned i
= 0; i
< 6; i
++)
7631 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7633 si_write_tess_factors(bld_base
,
7634 LLVMGetParam(func
, tess_factors_idx
),
7635 LLVMGetParam(func
, tess_factors_idx
+ 1),
7636 LLVMGetParam(func
, tess_factors_idx
+ 2),
7637 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7639 LLVMBuildRetVoid(ctx
->ac
.builder
);
7643 * Select and compile (or reuse) TCS parts (epilog).
7645 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7646 struct ac_llvm_compiler
*compiler
,
7647 struct si_shader
*shader
,
7648 struct pipe_debug_callback
*debug
)
7650 if (sscreen
->info
.chip_class
>= GFX9
) {
7651 struct si_shader
*ls_main_part
=
7652 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7654 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7655 &shader
->key
.part
.tcs
.ls_prolog
))
7658 shader
->previous_stage
= ls_main_part
;
7661 /* Get the epilog. */
7662 union si_shader_part_key epilog_key
;
7663 memset(&epilog_key
, 0, sizeof(epilog_key
));
7664 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7666 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7667 PIPE_SHADER_TESS_CTRL
, false,
7668 &epilog_key
, compiler
, debug
,
7669 si_build_tcs_epilog_function
,
7670 "Tessellation Control Shader Epilog");
7671 return shader
->epilog
!= NULL
;
7675 * Select and compile (or reuse) GS parts (prolog).
7677 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7678 struct ac_llvm_compiler
*compiler
,
7679 struct si_shader
*shader
,
7680 struct pipe_debug_callback
*debug
)
7682 if (sscreen
->info
.chip_class
>= GFX9
) {
7683 struct si_shader
*es_main_part
=
7684 shader
->key
.part
.gs
.es
->main_shader_part_es
;
7686 if (shader
->key
.part
.gs
.es
->type
== PIPE_SHADER_VERTEX
&&
7687 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7688 &shader
->key
.part
.gs
.vs_prolog
))
7691 shader
->previous_stage
= es_main_part
;
7694 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7697 union si_shader_part_key prolog_key
;
7698 memset(&prolog_key
, 0, sizeof(prolog_key
));
7699 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7701 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7702 PIPE_SHADER_GEOMETRY
, true,
7703 &prolog_key
, compiler
, debug
,
7704 si_build_gs_prolog_function
,
7705 "Geometry Shader Prolog");
7706 return shader
->prolog2
!= NULL
;
7710 * Build the pixel shader prolog function. This handles:
7711 * - two-side color selection and interpolation
7712 * - overriding interpolation parameters for the API PS
7713 * - polygon stippling
7715 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7716 * overriden by other states. (e.g. per-sample interpolation)
7717 * Interpolated colors are stored after the preloaded VGPRs.
7719 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7720 union si_shader_part_key
*key
)
7722 struct si_function_info fninfo
;
7723 LLVMValueRef ret
, func
;
7724 int num_returns
, i
, num_color_channels
;
7726 assert(si_need_ps_prolog(key
));
7728 si_init_function_info(&fninfo
);
7730 /* Declare inputs. */
7731 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7732 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7734 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7735 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7737 /* Declare outputs (same as inputs + add colors if needed) */
7738 num_returns
= fninfo
.num_params
;
7739 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7740 for (i
= 0; i
< num_color_channels
; i
++)
7741 fninfo
.types
[num_returns
++] = ctx
->f32
;
7743 /* Create the function. */
7744 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7746 func
= ctx
->main_fn
;
7748 /* Copy inputs to outputs. This should be no-op, as the registers match,
7749 * but it will prevent the compiler from overwriting them unintentionally.
7751 ret
= ctx
->return_value
;
7752 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7753 LLVMValueRef p
= LLVMGetParam(func
, i
);
7754 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7757 /* Polygon stippling. */
7758 if (key
->ps_prolog
.states
.poly_stipple
) {
7759 /* POS_FIXED_PT is always last. */
7760 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7761 key
->ps_prolog
.num_input_vgprs
- 1;
7762 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7764 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7767 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7768 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7769 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7770 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7772 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7773 * The hw doesn't compute CENTROID if the whole wave only
7774 * contains fully-covered quads.
7776 * PRIM_MASK is after user SGPRs.
7778 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7779 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7780 LLVMConstInt(ctx
->i32
, 31, 0), "");
7781 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7784 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7785 /* Read PERSP_CENTER. */
7786 for (i
= 0; i
< 2; i
++)
7787 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7788 /* Read PERSP_CENTROID. */
7789 for (i
= 0; i
< 2; i
++)
7790 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7791 /* Select PERSP_CENTROID. */
7792 for (i
= 0; i
< 2; i
++) {
7793 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7794 center
[i
], centroid
[i
], "");
7795 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7796 tmp
, base
+ 4 + i
, "");
7799 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7800 /* Read LINEAR_CENTER. */
7801 for (i
= 0; i
< 2; i
++)
7802 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7803 /* Read LINEAR_CENTROID. */
7804 for (i
= 0; i
< 2; i
++)
7805 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7806 /* Select LINEAR_CENTROID. */
7807 for (i
= 0; i
< 2; i
++) {
7808 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7809 center
[i
], centroid
[i
], "");
7810 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7811 tmp
, base
+ 10 + i
, "");
7816 /* Force per-sample interpolation. */
7817 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7818 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7819 LLVMValueRef persp_sample
[2];
7821 /* Read PERSP_SAMPLE. */
7822 for (i
= 0; i
< 2; i
++)
7823 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7824 /* Overwrite PERSP_CENTER. */
7825 for (i
= 0; i
< 2; i
++)
7826 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7827 persp_sample
[i
], base
+ 2 + i
, "");
7828 /* Overwrite PERSP_CENTROID. */
7829 for (i
= 0; i
< 2; i
++)
7830 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7831 persp_sample
[i
], base
+ 4 + i
, "");
7833 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7834 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7835 LLVMValueRef linear_sample
[2];
7837 /* Read LINEAR_SAMPLE. */
7838 for (i
= 0; i
< 2; i
++)
7839 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7840 /* Overwrite LINEAR_CENTER. */
7841 for (i
= 0; i
< 2; i
++)
7842 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7843 linear_sample
[i
], base
+ 8 + i
, "");
7844 /* Overwrite LINEAR_CENTROID. */
7845 for (i
= 0; i
< 2; i
++)
7846 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7847 linear_sample
[i
], base
+ 10 + i
, "");
7850 /* Force center interpolation. */
7851 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7852 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7853 LLVMValueRef persp_center
[2];
7855 /* Read PERSP_CENTER. */
7856 for (i
= 0; i
< 2; i
++)
7857 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7858 /* Overwrite PERSP_SAMPLE. */
7859 for (i
= 0; i
< 2; i
++)
7860 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7861 persp_center
[i
], base
+ i
, "");
7862 /* Overwrite PERSP_CENTROID. */
7863 for (i
= 0; i
< 2; i
++)
7864 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7865 persp_center
[i
], base
+ 4 + i
, "");
7867 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7868 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7869 LLVMValueRef linear_center
[2];
7871 /* Read LINEAR_CENTER. */
7872 for (i
= 0; i
< 2; i
++)
7873 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7874 /* Overwrite LINEAR_SAMPLE. */
7875 for (i
= 0; i
< 2; i
++)
7876 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7877 linear_center
[i
], base
+ 6 + i
, "");
7878 /* Overwrite LINEAR_CENTROID. */
7879 for (i
= 0; i
< 2; i
++)
7880 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7881 linear_center
[i
], base
+ 10 + i
, "");
7884 /* Interpolate colors. */
7885 unsigned color_out_idx
= 0;
7886 for (i
= 0; i
< 2; i
++) {
7887 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7888 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7889 key
->ps_prolog
.face_vgpr_index
;
7890 LLVMValueRef interp
[2], color
[4];
7891 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7896 /* If the interpolation qualifier is not CONSTANT (-1). */
7897 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7898 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7899 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7901 /* Get the (i,j) updated by bc_optimize handling. */
7902 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7904 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7905 interp_vgpr
+ 1, "");
7906 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7909 /* Use the absolute location of the input. */
7910 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7912 if (key
->ps_prolog
.states
.color_two_side
) {
7913 face
= LLVMGetParam(func
, face_vgpr
);
7914 face
= ac_to_integer(&ctx
->ac
, face
);
7917 interp_fs_input(ctx
,
7918 key
->ps_prolog
.color_attr_index
[i
],
7919 TGSI_SEMANTIC_COLOR
, i
,
7920 key
->ps_prolog
.num_interp_inputs
,
7921 key
->ps_prolog
.colors_read
, interp_ij
,
7922 prim_mask
, face
, color
);
7925 unsigned chan
= u_bit_scan(&writemask
);
7926 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7927 fninfo
.num_params
+ color_out_idx
++, "");
7931 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7934 * "When per-sample shading is active due to the use of a fragment
7935 * input qualified by sample or due to the use of the gl_SampleID
7936 * or gl_SamplePosition variables, only the bit for the current
7937 * sample is set in gl_SampleMaskIn. When state specifies multiple
7938 * fragment shader invocations for a given fragment, the sample
7939 * mask for any single fragment shader invocation may specify a
7940 * subset of the covered samples for the fragment. In this case,
7941 * the bit corresponding to each covered sample will be set in
7942 * exactly one fragment shader invocation."
7944 * The samplemask loaded by hardware is always the coverage of the
7945 * entire pixel/fragment, so mask bits out based on the sample ID.
7947 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7948 /* The bit pattern matches that used by fixed function fragment
7950 static const uint16_t ps_iter_masks
[] = {
7951 0xffff, /* not used */
7957 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7959 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7960 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7961 key
->ps_prolog
.ancillary_vgpr_index
;
7962 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7963 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7965 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7966 samplemask
= LLVMBuildAnd(
7969 LLVMBuildShl(ctx
->ac
.builder
,
7970 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
7973 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
7975 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
7976 ancillary_vgpr
+ 1, "");
7979 /* Tell LLVM to insert WQM instruction sequence when needed. */
7980 if (key
->ps_prolog
.wqm
) {
7981 LLVMAddTargetDependentFunctionAttr(func
,
7982 "amdgpu-ps-wqm-outputs", "");
7985 si_llvm_build_ret(ctx
, ret
);
7989 * Build the pixel shader epilog function. This handles everything that must be
7990 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
7992 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
7993 union si_shader_part_key
*key
)
7995 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7996 struct si_function_info fninfo
;
7997 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
7999 struct si_ps_exports exp
= {};
8001 si_init_function_info(&fninfo
);
8003 /* Declare input SGPRs. */
8004 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8005 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8006 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8007 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8008 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
8010 /* Declare input VGPRs. */
8011 unsigned required_num_params
=
8012 fninfo
.num_sgpr_params
+
8013 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8014 key
->ps_epilog
.writes_z
+
8015 key
->ps_epilog
.writes_stencil
+
8016 key
->ps_epilog
.writes_samplemask
;
8018 required_num_params
= MAX2(required_num_params
,
8019 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8021 while (fninfo
.num_params
< required_num_params
)
8022 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
8024 /* Create the function. */
8025 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
8026 /* Disable elimination of unused inputs. */
8027 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8028 "InitialPSInputAddr", 0xffffff);
8030 /* Process colors. */
8031 unsigned vgpr
= fninfo
.num_sgpr_params
;
8032 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8033 int last_color_export
= -1;
8035 /* Find the last color export. */
8036 if (!key
->ps_epilog
.writes_z
&&
8037 !key
->ps_epilog
.writes_stencil
&&
8038 !key
->ps_epilog
.writes_samplemask
) {
8039 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8041 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8042 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8043 /* Just set this if any of the colorbuffers are enabled. */
8045 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8046 last_color_export
= 0;
8048 for (i
= 0; i
< 8; i
++)
8049 if (colors_written
& (1 << i
) &&
8050 (spi_format
>> (i
* 4)) & 0xf)
8051 last_color_export
= i
;
8055 while (colors_written
) {
8056 LLVMValueRef color
[4];
8057 int mrt
= u_bit_scan(&colors_written
);
8059 for (i
= 0; i
< 4; i
++)
8060 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8062 si_export_mrt_color(bld_base
, color
, mrt
,
8063 fninfo
.num_params
- 1,
8064 mrt
== last_color_export
, &exp
);
8067 /* Process depth, stencil, samplemask. */
8068 if (key
->ps_epilog
.writes_z
)
8069 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8070 if (key
->ps_epilog
.writes_stencil
)
8071 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8072 if (key
->ps_epilog
.writes_samplemask
)
8073 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8075 if (depth
|| stencil
|| samplemask
)
8076 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8077 else if (last_color_export
== -1)
8078 ac_build_export_null(&ctx
->ac
);
8081 si_emit_ps_exports(ctx
, &exp
);
8084 LLVMBuildRetVoid(ctx
->ac
.builder
);
8088 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8090 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8091 struct ac_llvm_compiler
*compiler
,
8092 struct si_shader
*shader
,
8093 struct pipe_debug_callback
*debug
)
8095 union si_shader_part_key prolog_key
;
8096 union si_shader_part_key epilog_key
;
8098 /* Get the prolog. */
8099 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8101 /* The prolog is a no-op if these aren't set. */
8102 if (si_need_ps_prolog(&prolog_key
)) {
8104 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8105 PIPE_SHADER_FRAGMENT
, true,
8106 &prolog_key
, compiler
, debug
,
8107 si_build_ps_prolog_function
,
8108 "Fragment Shader Prolog");
8109 if (!shader
->prolog
)
8113 /* Get the epilog. */
8114 si_get_ps_epilog_key(shader
, &epilog_key
);
8117 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8118 PIPE_SHADER_FRAGMENT
, false,
8119 &epilog_key
, compiler
, debug
,
8120 si_build_ps_epilog_function
,
8121 "Fragment Shader Epilog");
8122 if (!shader
->epilog
)
8125 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8126 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8127 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8128 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8131 /* Set up the enable bits for per-sample shading if needed. */
8132 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8133 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8134 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8135 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8136 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8137 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8139 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8140 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8141 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8142 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8143 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8144 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8146 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8147 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8148 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8149 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8150 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8151 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8153 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8154 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8155 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8156 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8157 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8158 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8161 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8162 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8163 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8164 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8165 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8168 /* At least one pair of interpolation weights must be enabled. */
8169 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8170 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8171 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8174 /* Samplemask fixup requires the sample ID. */
8175 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8176 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8177 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8180 /* The sample mask input is always enabled, because the API shader always
8181 * passes it through to the epilog. Disable it here if it's unused.
8183 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8184 !shader
->selector
->info
.reads_samplemask
)
8185 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8190 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8193 /* If tessellation is all offchip and on-chip GS isn't used, this
8194 * workaround is not needed.
8198 /* SPI barrier management bug:
8199 * Make sure we have at least 4k of LDS in use to avoid the bug.
8200 * It applies to workgroup sizes of more than one wavefront.
8202 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8203 sscreen
->info
.family
== CHIP_KABINI
)
8204 *lds_size
= MAX2(*lds_size
, 8);
8207 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8208 struct si_shader
*shader
)
8210 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8212 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8214 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8215 si_get_max_workgroup_size(shader
) > 64) {
8216 si_multiwave_lds_size_workaround(sscreen
,
8217 &shader
->config
.lds_size
);
8221 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8222 struct si_shader
*shader
,
8223 struct pipe_debug_callback
*debug
)
8225 struct si_shader_selector
*sel
= shader
->selector
;
8226 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8229 /* LS, ES, VS are compiled on demand if the main part hasn't been
8230 * compiled for that stage.
8232 * GS are compiled on demand if the main part hasn't been compiled
8233 * for the chosen NGG-ness.
8235 * Vertex shaders are compiled on demand when a vertex fetch
8236 * workaround must be applied.
8238 if (shader
->is_monolithic
) {
8239 /* Monolithic shader (compiled as a whole, has many variants,
8240 * may take a long time to compile).
8242 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8246 /* The shader consists of several parts:
8248 * - the middle part is the user shader, it has 1 variant only
8249 * and it was compiled during the creation of the shader
8251 * - the prolog part is inserted at the beginning
8252 * - the epilog part is inserted at the end
8254 * The prolog and epilog have many (but simple) variants.
8256 * Starting with gfx9, geometry and tessellation control
8257 * shaders also contain the prolog and user shader parts of
8258 * the previous shader stage.
8264 /* Copy the compiled TGSI shader data over. */
8265 shader
->is_binary_shared
= true;
8266 shader
->binary
= mainp
->binary
;
8267 shader
->config
= mainp
->config
;
8268 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8269 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8270 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8271 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8272 memcpy(shader
->info
.vs_output_param_offset
,
8273 mainp
->info
.vs_output_param_offset
,
8274 sizeof(mainp
->info
.vs_output_param_offset
));
8275 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8276 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8277 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8279 /* Select prologs and/or epilogs. */
8280 switch (sel
->type
) {
8281 case PIPE_SHADER_VERTEX
:
8282 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8285 case PIPE_SHADER_TESS_CTRL
:
8286 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8289 case PIPE_SHADER_TESS_EVAL
:
8291 case PIPE_SHADER_GEOMETRY
:
8292 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8295 case PIPE_SHADER_FRAGMENT
:
8296 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8299 /* Make sure we have at least as many VGPRs as there
8300 * are allocated inputs.
8302 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8303 shader
->info
.num_input_vgprs
);
8307 /* Update SGPR and VGPR counts. */
8308 if (shader
->prolog
) {
8309 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8310 shader
->prolog
->config
.num_sgprs
);
8311 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8312 shader
->prolog
->config
.num_vgprs
);
8314 if (shader
->previous_stage
) {
8315 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8316 shader
->previous_stage
->config
.num_sgprs
);
8317 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8318 shader
->previous_stage
->config
.num_vgprs
);
8319 shader
->config
.spilled_sgprs
=
8320 MAX2(shader
->config
.spilled_sgprs
,
8321 shader
->previous_stage
->config
.spilled_sgprs
);
8322 shader
->config
.spilled_vgprs
=
8323 MAX2(shader
->config
.spilled_vgprs
,
8324 shader
->previous_stage
->config
.spilled_vgprs
);
8325 shader
->info
.private_mem_vgprs
=
8326 MAX2(shader
->info
.private_mem_vgprs
,
8327 shader
->previous_stage
->info
.private_mem_vgprs
);
8328 shader
->config
.scratch_bytes_per_wave
=
8329 MAX2(shader
->config
.scratch_bytes_per_wave
,
8330 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8331 shader
->info
.uses_instanceid
|=
8332 shader
->previous_stage
->info
.uses_instanceid
;
8334 if (shader
->prolog2
) {
8335 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8336 shader
->prolog2
->config
.num_sgprs
);
8337 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8338 shader
->prolog2
->config
.num_vgprs
);
8340 if (shader
->epilog
) {
8341 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8342 shader
->epilog
->config
.num_sgprs
);
8343 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8344 shader
->epilog
->config
.num_vgprs
);
8346 si_calculate_max_simd_waves(shader
);
8349 if (shader
->key
.as_ngg
) {
8350 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8351 gfx10_ngg_calculate_subgroup_info(shader
);
8352 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8353 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8356 si_fix_resource_usage(sscreen
, shader
);
8357 si_shader_dump(sscreen
, shader
, debug
, sel
->info
.processor
,
8361 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8362 fprintf(stderr
, "LLVM failed to upload shader\n");
8369 void si_shader_destroy(struct si_shader
*shader
)
8371 if (shader
->scratch_bo
)
8372 si_resource_reference(&shader
->scratch_bo
, NULL
);
8374 si_resource_reference(&shader
->bo
, NULL
);
8376 if (!shader
->is_binary_shared
)
8377 si_shader_binary_clean(&shader
->binary
);
8379 free(shader
->shader_log
);