2 * Copyright 2012 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 #include "util/u_memory.h"
26 #include "util/u_string.h"
27 #include "tgsi/tgsi_build.h"
28 #include "tgsi/tgsi_strings.h"
29 #include "tgsi/tgsi_util.h"
30 #include "tgsi/tgsi_dump.h"
31 #include "tgsi/tgsi_from_mesa.h"
33 #include "ac_binary.h"
34 #include "ac_exp_param.h"
35 #include "ac_shader_util.h"
37 #include "ac_llvm_util.h"
38 #include "si_shader_internal.h"
42 #include "compiler/nir/nir.h"
44 static const char scratch_rsrc_dword0_symbol
[] =
45 "SCRATCH_RSRC_DWORD0";
47 static const char scratch_rsrc_dword1_symbol
[] =
48 "SCRATCH_RSRC_DWORD1";
50 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
51 struct si_screen
*sscreen
,
52 struct ac_llvm_compiler
*compiler
,
56 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
57 struct lp_build_tgsi_context
*bld_base
,
58 struct lp_build_emit_data
*emit_data
);
60 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
);
62 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
63 union si_shader_part_key
*key
);
64 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
65 union si_shader_part_key
*key
);
66 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
67 union si_shader_part_key
*key
);
68 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
69 union si_shader_part_key
*key
);
70 static void si_fix_resource_usage(struct si_screen
*sscreen
,
71 struct si_shader
*shader
);
73 /* Ideally pass the sample mask input to the PS epilog as v14, which
74 * is its usual location, so that the shader doesn't have to add v_mov.
76 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
78 static bool llvm_type_is_64bit(struct si_shader_context
*ctx
,
81 if (type
== ctx
->ac
.i64
|| type
== ctx
->ac
.f64
)
87 /** Whether the shader runs as a combination of multiple API shaders */
88 static bool is_multi_part_shader(struct si_shader_context
*ctx
)
90 if (ctx
->screen
->info
.chip_class
<= GFX8
)
93 return ctx
->shader
->key
.as_ls
||
94 ctx
->shader
->key
.as_es
||
95 ctx
->type
== PIPE_SHADER_TESS_CTRL
||
96 ctx
->type
== PIPE_SHADER_GEOMETRY
;
99 /** Whether the shader runs on a merged HW stage (LSHS or ESGS) */
100 static bool is_merged_shader(struct si_shader_context
*ctx
)
102 return ctx
->shader
->key
.as_ngg
|| is_multi_part_shader(ctx
);
105 void si_init_function_info(struct si_function_info
*fninfo
)
107 fninfo
->num_params
= 0;
108 fninfo
->num_sgpr_params
= 0;
111 unsigned add_arg_assign(struct si_function_info
*fninfo
,
112 enum si_arg_regfile regfile
, LLVMTypeRef type
,
113 LLVMValueRef
*assign
)
115 assert(regfile
!= ARG_SGPR
|| fninfo
->num_sgpr_params
== fninfo
->num_params
);
117 unsigned idx
= fninfo
->num_params
++;
118 assert(idx
< ARRAY_SIZE(fninfo
->types
));
120 if (regfile
== ARG_SGPR
)
121 fninfo
->num_sgpr_params
= fninfo
->num_params
;
123 fninfo
->types
[idx
] = type
;
124 fninfo
->assign
[idx
] = assign
;
128 static unsigned add_arg(struct si_function_info
*fninfo
,
129 enum si_arg_regfile regfile
, LLVMTypeRef type
)
131 return add_arg_assign(fninfo
, regfile
, type
, NULL
);
134 static void add_arg_assign_checked(struct si_function_info
*fninfo
,
135 enum si_arg_regfile regfile
, LLVMTypeRef type
,
136 LLVMValueRef
*assign
, unsigned idx
)
138 ASSERTED
unsigned actual
= add_arg_assign(fninfo
, regfile
, type
, assign
);
139 assert(actual
== idx
);
142 static void add_arg_checked(struct si_function_info
*fninfo
,
143 enum si_arg_regfile regfile
, LLVMTypeRef type
,
146 add_arg_assign_checked(fninfo
, regfile
, type
, NULL
, idx
);
150 * Returns a unique index for a per-patch semantic name and index. The index
151 * must be less than 32, so that a 32-bit bitmask of used inputs or outputs
154 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name
, unsigned index
)
156 switch (semantic_name
) {
157 case TGSI_SEMANTIC_TESSOUTER
:
159 case TGSI_SEMANTIC_TESSINNER
:
161 case TGSI_SEMANTIC_PATCH
:
166 assert(!"invalid semantic name");
172 * Returns a unique index for a semantic name and index. The index must be
173 * less than 64, so that a 64-bit bitmask of used inputs or outputs can be
176 unsigned si_shader_io_get_unique_index(unsigned semantic_name
, unsigned index
,
179 switch (semantic_name
) {
180 case TGSI_SEMANTIC_POSITION
:
182 case TGSI_SEMANTIC_GENERIC
:
183 /* Since some shader stages use the the highest used IO index
184 * to determine the size to allocate for inputs/outputs
185 * (in LDS, tess and GS rings). GENERIC should be placed right
186 * after POSITION to make that size as small as possible.
188 if (index
< SI_MAX_IO_GENERIC
)
191 assert(!"invalid generic index");
193 case TGSI_SEMANTIC_FOG
:
194 return SI_MAX_IO_GENERIC
+ 1;
195 case TGSI_SEMANTIC_COLOR
:
197 return SI_MAX_IO_GENERIC
+ 2 + index
;
198 case TGSI_SEMANTIC_BCOLOR
:
200 /* If it's a varying, COLOR and BCOLOR alias. */
202 return SI_MAX_IO_GENERIC
+ 2 + index
;
204 return SI_MAX_IO_GENERIC
+ 4 + index
;
205 case TGSI_SEMANTIC_TEXCOORD
:
207 return SI_MAX_IO_GENERIC
+ 6 + index
;
209 /* These are rarely used between LS and HS or ES and GS. */
210 case TGSI_SEMANTIC_CLIPDIST
:
212 return SI_MAX_IO_GENERIC
+ 6 + 8 + index
;
213 case TGSI_SEMANTIC_CLIPVERTEX
:
214 return SI_MAX_IO_GENERIC
+ 6 + 8 + 2;
215 case TGSI_SEMANTIC_PSIZE
:
216 return SI_MAX_IO_GENERIC
+ 6 + 8 + 3;
218 /* These can't be written by LS, HS, and ES. */
219 case TGSI_SEMANTIC_LAYER
:
220 return SI_MAX_IO_GENERIC
+ 6 + 8 + 4;
221 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
222 return SI_MAX_IO_GENERIC
+ 6 + 8 + 5;
223 case TGSI_SEMANTIC_PRIMID
:
224 STATIC_ASSERT(SI_MAX_IO_GENERIC
+ 6 + 8 + 6 <= 63);
225 return SI_MAX_IO_GENERIC
+ 6 + 8 + 6;
227 fprintf(stderr
, "invalid semantic name = %u\n", semantic_name
);
228 assert(!"invalid semantic name");
234 * Get the value of a shader input parameter and extract a bitfield.
236 static LLVMValueRef
unpack_llvm_param(struct si_shader_context
*ctx
,
237 LLVMValueRef value
, unsigned rshift
,
240 if (LLVMGetTypeKind(LLVMTypeOf(value
)) == LLVMFloatTypeKind
)
241 value
= ac_to_integer(&ctx
->ac
, value
);
244 value
= LLVMBuildLShr(ctx
->ac
.builder
, value
,
245 LLVMConstInt(ctx
->i32
, rshift
, 0), "");
247 if (rshift
+ bitwidth
< 32) {
248 unsigned mask
= (1 << bitwidth
) - 1;
249 value
= LLVMBuildAnd(ctx
->ac
.builder
, value
,
250 LLVMConstInt(ctx
->i32
, mask
, 0), "");
256 LLVMValueRef
si_unpack_param(struct si_shader_context
*ctx
,
257 unsigned param
, unsigned rshift
,
260 LLVMValueRef value
= LLVMGetParam(ctx
->main_fn
, param
);
262 return unpack_llvm_param(ctx
, value
, rshift
, bitwidth
);
265 static LLVMValueRef
get_rel_patch_id(struct si_shader_context
*ctx
)
268 case PIPE_SHADER_TESS_CTRL
:
269 return unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 0, 8);
271 case PIPE_SHADER_TESS_EVAL
:
272 return LLVMGetParam(ctx
->main_fn
,
273 ctx
->param_tes_rel_patch_id
);
281 /* Tessellation shaders pass outputs to the next shader using LDS.
283 * LS outputs = TCS inputs
284 * TCS outputs = TES inputs
287 * - TCS inputs for patch 0
288 * - TCS inputs for patch 1
289 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
291 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
292 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
293 * - TCS outputs for patch 1
294 * - Per-patch TCS outputs for patch 1
295 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
296 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
299 * All three shaders VS(LS), TCS, TES share the same LDS space.
303 get_tcs_in_patch_stride(struct si_shader_context
*ctx
)
305 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 8, 13);
308 static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context
*ctx
)
310 assert(ctx
->type
== PIPE_SHADER_TESS_CTRL
);
312 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
313 return util_last_bit64(ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
) * 4;
315 return util_last_bit64(ctx
->shader
->selector
->outputs_written
) * 4;
318 static LLVMValueRef
get_tcs_out_vertex_dw_stride(struct si_shader_context
*ctx
)
320 unsigned stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
322 return LLVMConstInt(ctx
->i32
, stride
, 0);
325 static LLVMValueRef
get_tcs_out_patch_stride(struct si_shader_context
*ctx
)
327 if (ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
)
328 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 0, 13);
330 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
331 unsigned tcs_out_vertices
= info
->properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
];
332 unsigned vertex_dw_stride
= get_tcs_out_vertex_dw_stride_constant(ctx
);
333 unsigned num_patch_outputs
= util_last_bit64(ctx
->shader
->selector
->patch_outputs_written
);
334 unsigned patch_dw_stride
= tcs_out_vertices
* vertex_dw_stride
+
335 num_patch_outputs
* 4;
336 return LLVMConstInt(ctx
->i32
, patch_dw_stride
, 0);
340 get_tcs_out_patch0_offset(struct si_shader_context
*ctx
)
342 return LLVMBuildMul(ctx
->ac
.builder
,
344 ctx
->param_tcs_out_lds_offsets
,
346 LLVMConstInt(ctx
->i32
, 4, 0), "");
350 get_tcs_out_patch0_patch_data_offset(struct si_shader_context
*ctx
)
352 return LLVMBuildMul(ctx
->ac
.builder
,
354 ctx
->param_tcs_out_lds_offsets
,
356 LLVMConstInt(ctx
->i32
, 4, 0), "");
360 get_tcs_in_current_patch_offset(struct si_shader_context
*ctx
)
362 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
363 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
365 return LLVMBuildMul(ctx
->ac
.builder
, patch_stride
, rel_patch_id
, "");
369 get_tcs_out_current_patch_offset(struct si_shader_context
*ctx
)
371 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
372 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
373 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
375 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_offset
);
379 get_tcs_out_current_patch_data_offset(struct si_shader_context
*ctx
)
381 LLVMValueRef patch0_patch_data_offset
=
382 get_tcs_out_patch0_patch_data_offset(ctx
);
383 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
384 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
386 return ac_build_imad(&ctx
->ac
, patch_stride
, rel_patch_id
, patch0_patch_data_offset
);
389 static LLVMValueRef
get_num_tcs_out_vertices(struct si_shader_context
*ctx
)
391 unsigned tcs_out_vertices
=
392 ctx
->shader
->selector
?
393 ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TCS_VERTICES_OUT
] : 0;
395 /* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
396 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&& tcs_out_vertices
)
397 return LLVMConstInt(ctx
->i32
, tcs_out_vertices
, 0);
399 return si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 6, 6);
402 static LLVMValueRef
get_tcs_in_vertex_dw_stride(struct si_shader_context
*ctx
)
407 case PIPE_SHADER_VERTEX
:
408 stride
= ctx
->shader
->selector
->lshs_vertex_stride
/ 4;
409 return LLVMConstInt(ctx
->i32
, stride
, 0);
411 case PIPE_SHADER_TESS_CTRL
:
412 if (ctx
->screen
->info
.chip_class
>= GFX9
&&
413 ctx
->shader
->is_monolithic
) {
414 stride
= ctx
->shader
->key
.part
.tcs
.ls
->lshs_vertex_stride
/ 4;
415 return LLVMConstInt(ctx
->i32
, stride
, 0);
417 return si_unpack_param(ctx
, ctx
->param_vs_state_bits
, 24, 8);
425 static LLVMValueRef
unpack_sint16(struct si_shader_context
*ctx
,
426 LLVMValueRef i32
, unsigned index
)
431 return LLVMBuildAShr(ctx
->ac
.builder
, i32
,
432 LLVMConstInt(ctx
->i32
, 16, 0), "");
434 return LLVMBuildSExt(ctx
->ac
.builder
,
435 LLVMBuildTrunc(ctx
->ac
.builder
, i32
,
440 void si_llvm_load_input_vs(
441 struct si_shader_context
*ctx
,
442 unsigned input_index
,
445 const struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
446 unsigned vs_blit_property
= info
->properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
448 if (vs_blit_property
) {
449 LLVMValueRef vertex_id
= ctx
->abi
.vertex_id
;
450 LLVMValueRef sel_x1
= LLVMBuildICmp(ctx
->ac
.builder
,
451 LLVMIntULE
, vertex_id
,
453 /* Use LLVMIntNE, because we have 3 vertices and only
454 * the middle one should use y2.
456 LLVMValueRef sel_y1
= LLVMBuildICmp(ctx
->ac
.builder
,
457 LLVMIntNE
, vertex_id
,
460 if (input_index
== 0) {
462 LLVMValueRef x1y1
= LLVMGetParam(ctx
->main_fn
,
463 ctx
->param_vs_blit_inputs
);
464 LLVMValueRef x2y2
= LLVMGetParam(ctx
->main_fn
,
465 ctx
->param_vs_blit_inputs
+ 1);
467 LLVMValueRef x1
= unpack_sint16(ctx
, x1y1
, 0);
468 LLVMValueRef y1
= unpack_sint16(ctx
, x1y1
, 1);
469 LLVMValueRef x2
= unpack_sint16(ctx
, x2y2
, 0);
470 LLVMValueRef y2
= unpack_sint16(ctx
, x2y2
, 1);
472 LLVMValueRef x
= LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
474 LLVMValueRef y
= LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
477 out
[0] = LLVMBuildSIToFP(ctx
->ac
.builder
, x
, ctx
->f32
, "");
478 out
[1] = LLVMBuildSIToFP(ctx
->ac
.builder
, y
, ctx
->f32
, "");
479 out
[2] = LLVMGetParam(ctx
->main_fn
,
480 ctx
->param_vs_blit_inputs
+ 2);
481 out
[3] = ctx
->ac
.f32_1
;
485 /* Color or texture coordinates: */
486 assert(input_index
== 1);
488 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
489 for (int i
= 0; i
< 4; i
++) {
490 out
[i
] = LLVMGetParam(ctx
->main_fn
,
491 ctx
->param_vs_blit_inputs
+ 3 + i
);
494 assert(vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
);
495 LLVMValueRef x1
= LLVMGetParam(ctx
->main_fn
,
496 ctx
->param_vs_blit_inputs
+ 3);
497 LLVMValueRef y1
= LLVMGetParam(ctx
->main_fn
,
498 ctx
->param_vs_blit_inputs
+ 4);
499 LLVMValueRef x2
= LLVMGetParam(ctx
->main_fn
,
500 ctx
->param_vs_blit_inputs
+ 5);
501 LLVMValueRef y2
= LLVMGetParam(ctx
->main_fn
,
502 ctx
->param_vs_blit_inputs
+ 6);
504 out
[0] = LLVMBuildSelect(ctx
->ac
.builder
, sel_x1
,
506 out
[1] = LLVMBuildSelect(ctx
->ac
.builder
, sel_y1
,
508 out
[2] = LLVMGetParam(ctx
->main_fn
,
509 ctx
->param_vs_blit_inputs
+ 7);
510 out
[3] = LLVMGetParam(ctx
->main_fn
,
511 ctx
->param_vs_blit_inputs
+ 8);
516 union si_vs_fix_fetch fix_fetch
;
517 LLVMValueRef t_list_ptr
;
518 LLVMValueRef t_offset
;
520 LLVMValueRef vertex_index
;
523 /* Load the T list */
524 t_list_ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vertex_buffers
);
526 t_offset
= LLVMConstInt(ctx
->i32
, input_index
, 0);
528 t_list
= ac_build_load_to_sgpr(&ctx
->ac
, t_list_ptr
, t_offset
);
530 vertex_index
= LLVMGetParam(ctx
->main_fn
,
531 ctx
->param_vertex_index0
+
534 /* Use the open-coded implementation for all loads of doubles and
535 * of dword-sized data that needs fixups. We need to insert conversion
536 * code anyway, and the amd/common code does it for us.
538 * Note: On LLVM <= 8, we can only open-code formats with
539 * channel size >= 4 bytes.
541 bool opencode
= ctx
->shader
->key
.mono
.vs_fetch_opencode
& (1 << input_index
);
542 fix_fetch
.bits
= ctx
->shader
->key
.mono
.vs_fix_fetch
[input_index
].bits
;
544 (fix_fetch
.u
.log_size
== 3 && fix_fetch
.u
.format
== AC_FETCH_FORMAT_FLOAT
) ||
545 (fix_fetch
.u
.log_size
== 2)) {
546 tmp
= ac_build_opencoded_load_format(
547 &ctx
->ac
, fix_fetch
.u
.log_size
, fix_fetch
.u
.num_channels_m1
+ 1,
548 fix_fetch
.u
.format
, fix_fetch
.u
.reverse
, !opencode
,
549 t_list
, vertex_index
, ctx
->ac
.i32_0
, ctx
->ac
.i32_0
, 0, true);
550 for (unsigned i
= 0; i
< 4; ++i
)
551 out
[i
] = LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, LLVMConstInt(ctx
->i32
, i
, false), "");
555 /* Do multiple loads for special formats. */
556 unsigned required_channels
= util_last_bit(info
->input_usage_mask
[input_index
]);
557 LLVMValueRef fetches
[4];
558 unsigned num_fetches
;
559 unsigned fetch_stride
;
560 unsigned channels_per_fetch
;
562 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2) {
563 num_fetches
= MIN2(required_channels
, 3);
564 fetch_stride
= 1 << fix_fetch
.u
.log_size
;
565 channels_per_fetch
= 1;
569 channels_per_fetch
= required_channels
;
572 for (unsigned i
= 0; i
< num_fetches
; ++i
) {
573 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, fetch_stride
* i
, 0);
574 fetches
[i
] = ac_build_buffer_load_format(&ctx
->ac
, t_list
, vertex_index
, voffset
,
575 channels_per_fetch
, 0, true);
578 if (num_fetches
== 1 && channels_per_fetch
> 1) {
579 LLVMValueRef fetch
= fetches
[0];
580 for (unsigned i
= 0; i
< channels_per_fetch
; ++i
) {
581 tmp
= LLVMConstInt(ctx
->i32
, i
, false);
582 fetches
[i
] = LLVMBuildExtractElement(
583 ctx
->ac
.builder
, fetch
, tmp
, "");
585 num_fetches
= channels_per_fetch
;
586 channels_per_fetch
= 1;
589 for (unsigned i
= num_fetches
; i
< 4; ++i
)
590 fetches
[i
] = LLVMGetUndef(ctx
->f32
);
592 if (fix_fetch
.u
.log_size
<= 1 && fix_fetch
.u
.num_channels_m1
== 2 &&
593 required_channels
== 4) {
594 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_UINT
|| fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
)
595 fetches
[3] = ctx
->ac
.i32_1
;
597 fetches
[3] = ctx
->ac
.f32_1
;
598 } else if (fix_fetch
.u
.log_size
== 3 &&
599 (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
||
600 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
||
601 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SINT
) &&
602 required_channels
== 4) {
603 /* For 2_10_10_10, the hardware returns an unsigned value;
604 * convert it to a signed one.
606 LLVMValueRef tmp
= fetches
[3];
607 LLVMValueRef c30
= LLVMConstInt(ctx
->i32
, 30, 0);
609 /* First, recover the sign-extended signed integer value. */
610 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
)
611 tmp
= LLVMBuildFPToUI(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
613 tmp
= ac_to_integer(&ctx
->ac
, tmp
);
615 /* For the integer-like cases, do a natural sign extension.
617 * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0
618 * and happen to contain 0, 1, 2, 3 as the two LSBs of the
621 tmp
= LLVMBuildShl(ctx
->ac
.builder
, tmp
,
622 fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
?
623 LLVMConstInt(ctx
->i32
, 7, 0) : c30
, "");
624 tmp
= LLVMBuildAShr(ctx
->ac
.builder
, tmp
, c30
, "");
626 /* Convert back to the right type. */
627 if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SNORM
) {
629 LLVMValueRef neg_one
= LLVMConstReal(ctx
->f32
, -1.0);
630 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
631 clamp
= LLVMBuildFCmp(ctx
->ac
.builder
, LLVMRealULT
, tmp
, neg_one
, "");
632 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, clamp
, neg_one
, tmp
, "");
633 } else if (fix_fetch
.u
.format
== AC_FETCH_FORMAT_SSCALED
) {
634 tmp
= LLVMBuildSIToFP(ctx
->ac
.builder
, tmp
, ctx
->f32
, "");
640 for (unsigned i
= 0; i
< 4; ++i
)
641 out
[i
] = ac_to_float(&ctx
->ac
, fetches
[i
]);
644 static void declare_input_vs(
645 struct si_shader_context
*ctx
,
646 unsigned input_index
,
647 const struct tgsi_full_declaration
*decl
,
650 si_llvm_load_input_vs(ctx
, input_index
, out
);
653 LLVMValueRef
si_get_primitive_id(struct si_shader_context
*ctx
,
660 case PIPE_SHADER_VERTEX
:
661 return LLVMGetParam(ctx
->main_fn
,
662 ctx
->param_vs_prim_id
);
663 case PIPE_SHADER_TESS_CTRL
:
664 return ctx
->abi
.tcs_patch_id
;
665 case PIPE_SHADER_TESS_EVAL
:
666 return ctx
->abi
.tes_patch_id
;
667 case PIPE_SHADER_GEOMETRY
:
668 return ctx
->abi
.gs_prim_id
;
676 * Return the value of tgsi_ind_register for indexing.
677 * This is the indirect index with the constant offset added to it.
679 LLVMValueRef
si_get_indirect_index(struct si_shader_context
*ctx
,
680 const struct tgsi_ind_register
*ind
,
686 if (ind
->File
== TGSI_FILE_ADDRESS
) {
687 result
= ctx
->addrs
[ind
->Index
][ind
->Swizzle
];
688 result
= LLVMBuildLoad(ctx
->ac
.builder
, result
, "");
690 struct tgsi_full_src_register src
= {};
692 src
.Register
.File
= ind
->File
;
693 src
.Register
.Index
= ind
->Index
;
695 /* Set the second index to 0 for constants. */
696 if (ind
->File
== TGSI_FILE_CONSTANT
)
697 src
.Register
.Dimension
= 1;
699 result
= ctx
->bld_base
.emit_fetch_funcs
[ind
->File
](&ctx
->bld_base
, &src
,
702 result
= ac_to_integer(&ctx
->ac
, result
);
705 return ac_build_imad(&ctx
->ac
, result
, LLVMConstInt(ctx
->i32
, addr_mul
, 0),
706 LLVMConstInt(ctx
->i32
, rel_index
, 0));
710 * Like si_get_indirect_index, but restricts the return value to a (possibly
711 * undefined) value inside [0..num).
713 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
714 const struct tgsi_ind_register
*ind
,
715 int rel_index
, unsigned num
)
717 LLVMValueRef result
= si_get_indirect_index(ctx
, ind
, 1, rel_index
);
719 return si_llvm_bound_index(ctx
, result
, num
);
722 static LLVMValueRef
get_dw_address_from_generic_indices(struct si_shader_context
*ctx
,
723 LLVMValueRef vertex_dw_stride
,
724 LLVMValueRef base_addr
,
725 LLVMValueRef vertex_index
,
726 LLVMValueRef param_index
,
727 unsigned input_index
,
732 if (vertex_dw_stride
) {
733 base_addr
= ac_build_imad(&ctx
->ac
, vertex_index
,
734 vertex_dw_stride
, base_addr
);
738 base_addr
= ac_build_imad(&ctx
->ac
, param_index
,
739 LLVMConstInt(ctx
->i32
, 4, 0), base_addr
);
742 int param
= is_patch
?
743 si_shader_io_get_unique_index_patch(name
[input_index
],
744 index
[input_index
]) :
745 si_shader_io_get_unique_index(name
[input_index
],
746 index
[input_index
], false);
748 /* Add the base address of the element. */
749 return LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
750 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
754 * Calculate a dword address given an input or output register and a stride.
756 static LLVMValueRef
get_dw_address(struct si_shader_context
*ctx
,
757 const struct tgsi_full_dst_register
*dst
,
758 const struct tgsi_full_src_register
*src
,
759 LLVMValueRef vertex_dw_stride
,
760 LLVMValueRef base_addr
)
762 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
763 ubyte
*name
, *index
, *array_first
;
765 struct tgsi_full_dst_register reg
;
766 LLVMValueRef vertex_index
= NULL
;
767 LLVMValueRef ind_index
= NULL
;
769 /* Set the register description. The address computation is the same
770 * for sources and destinations. */
772 reg
.Register
.File
= src
->Register
.File
;
773 reg
.Register
.Index
= src
->Register
.Index
;
774 reg
.Register
.Indirect
= src
->Register
.Indirect
;
775 reg
.Register
.Dimension
= src
->Register
.Dimension
;
776 reg
.Indirect
= src
->Indirect
;
777 reg
.Dimension
= src
->Dimension
;
778 reg
.DimIndirect
= src
->DimIndirect
;
782 /* If the register is 2-dimensional (e.g. an array of vertices
783 * in a primitive), calculate the base address of the vertex. */
784 if (reg
.Register
.Dimension
) {
785 if (reg
.Dimension
.Indirect
)
786 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
787 1, reg
.Dimension
.Index
);
789 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
792 /* Get information about the register. */
793 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
794 name
= info
->input_semantic_name
;
795 index
= info
->input_semantic_index
;
796 array_first
= info
->input_array_first
;
797 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
798 name
= info
->output_semantic_name
;
799 index
= info
->output_semantic_index
;
800 array_first
= info
->output_array_first
;
806 if (reg
.Register
.Indirect
) {
807 /* Add the relative address of the element. */
808 if (reg
.Indirect
.ArrayID
)
809 input_index
= array_first
[reg
.Indirect
.ArrayID
];
811 input_index
= reg
.Register
.Index
;
813 ind_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
814 1, reg
.Register
.Index
- input_index
);
816 input_index
= reg
.Register
.Index
;
819 return get_dw_address_from_generic_indices(ctx
, vertex_dw_stride
,
820 base_addr
, vertex_index
,
821 ind_index
, input_index
,
823 !reg
.Register
.Dimension
);
826 /* The offchip buffer layout for TCS->TES is
828 * - attribute 0 of patch 0 vertex 0
829 * - attribute 0 of patch 0 vertex 1
830 * - attribute 0 of patch 0 vertex 2
832 * - attribute 0 of patch 1 vertex 0
833 * - attribute 0 of patch 1 vertex 1
835 * - attribute 1 of patch 0 vertex 0
836 * - attribute 1 of patch 0 vertex 1
838 * - per patch attribute 0 of patch 0
839 * - per patch attribute 0 of patch 1
842 * Note that every attribute has 4 components.
844 static LLVMValueRef
get_tcs_tes_buffer_address(struct si_shader_context
*ctx
,
845 LLVMValueRef rel_patch_id
,
846 LLVMValueRef vertex_index
,
847 LLVMValueRef param_index
)
849 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
850 LLVMValueRef param_stride
, constant16
;
852 vertices_per_patch
= get_num_tcs_out_vertices(ctx
);
853 num_patches
= si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 0, 6);
854 total_vertices
= LLVMBuildMul(ctx
->ac
.builder
, vertices_per_patch
,
857 constant16
= LLVMConstInt(ctx
->i32
, 16, 0);
859 base_addr
= ac_build_imad(&ctx
->ac
, rel_patch_id
,
860 vertices_per_patch
, vertex_index
);
861 param_stride
= total_vertices
;
863 base_addr
= rel_patch_id
;
864 param_stride
= num_patches
;
867 base_addr
= ac_build_imad(&ctx
->ac
, param_index
, param_stride
, base_addr
);
868 base_addr
= LLVMBuildMul(ctx
->ac
.builder
, base_addr
, constant16
, "");
871 LLVMValueRef patch_data_offset
=
872 si_unpack_param(ctx
, ctx
->param_tcs_offchip_layout
, 12, 20);
874 base_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_addr
,
875 patch_data_offset
, "");
880 /* This is a generic helper that can be shared by the NIR and TGSI backends */
881 static LLVMValueRef
get_tcs_tes_buffer_address_from_generic_indices(
882 struct si_shader_context
*ctx
,
883 LLVMValueRef vertex_index
,
884 LLVMValueRef param_index
,
890 unsigned param_index_base
;
892 param_index_base
= is_patch
?
893 si_shader_io_get_unique_index_patch(name
[param_base
], index
[param_base
]) :
894 si_shader_io_get_unique_index(name
[param_base
], index
[param_base
], false);
897 param_index
= LLVMBuildAdd(ctx
->ac
.builder
, param_index
,
898 LLVMConstInt(ctx
->i32
, param_index_base
, 0),
901 param_index
= LLVMConstInt(ctx
->i32
, param_index_base
, 0);
904 return get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
),
905 vertex_index
, param_index
);
908 static LLVMValueRef
get_tcs_tes_buffer_address_from_reg(
909 struct si_shader_context
*ctx
,
910 const struct tgsi_full_dst_register
*dst
,
911 const struct tgsi_full_src_register
*src
)
913 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
914 ubyte
*name
, *index
, *array_first
;
915 struct tgsi_full_src_register reg
;
916 LLVMValueRef vertex_index
= NULL
;
917 LLVMValueRef param_index
= NULL
;
920 reg
= src
? *src
: tgsi_full_src_register_from_dst(dst
);
922 if (reg
.Register
.Dimension
) {
924 if (reg
.Dimension
.Indirect
)
925 vertex_index
= si_get_indirect_index(ctx
, ®
.DimIndirect
,
926 1, reg
.Dimension
.Index
);
928 vertex_index
= LLVMConstInt(ctx
->i32
, reg
.Dimension
.Index
, 0);
931 /* Get information about the register. */
932 if (reg
.Register
.File
== TGSI_FILE_INPUT
) {
933 name
= info
->input_semantic_name
;
934 index
= info
->input_semantic_index
;
935 array_first
= info
->input_array_first
;
936 } else if (reg
.Register
.File
== TGSI_FILE_OUTPUT
) {
937 name
= info
->output_semantic_name
;
938 index
= info
->output_semantic_index
;
939 array_first
= info
->output_array_first
;
945 if (reg
.Register
.Indirect
) {
946 if (reg
.Indirect
.ArrayID
)
947 param_base
= array_first
[reg
.Indirect
.ArrayID
];
949 param_base
= reg
.Register
.Index
;
951 param_index
= si_get_indirect_index(ctx
, ®
.Indirect
,
952 1, reg
.Register
.Index
- param_base
);
955 param_base
= reg
.Register
.Index
;
958 return get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
959 param_index
, param_base
,
960 name
, index
, !reg
.Register
.Dimension
);
963 static LLVMValueRef
buffer_load(struct lp_build_tgsi_context
*bld_base
,
964 LLVMTypeRef type
, unsigned swizzle
,
965 LLVMValueRef buffer
, LLVMValueRef offset
,
966 LLVMValueRef base
, bool can_speculate
)
968 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
969 LLVMValueRef value
, value2
;
970 LLVMTypeRef vec_type
= LLVMVectorType(type
, 4);
973 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
974 0, ac_glc
, can_speculate
, false);
976 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
979 if (!llvm_type_is_64bit(ctx
, type
)) {
980 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 4, NULL
, base
, offset
,
981 0, ac_glc
, can_speculate
, false);
983 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, vec_type
, "");
984 return LLVMBuildExtractElement(ctx
->ac
.builder
, value
,
985 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
988 value
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
989 swizzle
* 4, ac_glc
, can_speculate
, false);
991 value2
= ac_build_buffer_load(&ctx
->ac
, buffer
, 1, NULL
, base
, offset
,
992 swizzle
* 4 + 4, ac_glc
, can_speculate
, false);
994 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
998 * Load from LSHS LDS storage.
1000 * \param type output value type
1001 * \param swizzle offset (typically 0..3); it can be ~0, which loads a vec4
1002 * \param dw_addr address in dwords
1004 static LLVMValueRef
lshs_lds_load(struct lp_build_tgsi_context
*bld_base
,
1005 LLVMTypeRef type
, unsigned swizzle
,
1006 LLVMValueRef dw_addr
)
1008 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1011 if (swizzle
== ~0) {
1012 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1014 for (unsigned chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++)
1015 values
[chan
] = lshs_lds_load(bld_base
, type
, chan
, dw_addr
);
1017 return ac_build_gather_values(&ctx
->ac
, values
,
1021 /* Split 64-bit loads. */
1022 if (llvm_type_is_64bit(ctx
, type
)) {
1023 LLVMValueRef lo
, hi
;
1025 lo
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
, dw_addr
);
1026 hi
= lshs_lds_load(bld_base
, ctx
->i32
, swizzle
+ 1, dw_addr
);
1027 return si_llvm_emit_fetch_64bit(bld_base
, type
, lo
, hi
);
1030 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1031 LLVMConstInt(ctx
->i32
, swizzle
, 0), "");
1033 value
= ac_lds_load(&ctx
->ac
, dw_addr
);
1035 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1039 * Store to LSHS LDS storage.
1041 * \param swizzle offset (typically 0..3)
1042 * \param dw_addr address in dwords
1043 * \param value value to store
1045 static void lshs_lds_store(struct si_shader_context
*ctx
,
1046 unsigned dw_offset_imm
, LLVMValueRef dw_addr
,
1049 dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, dw_addr
,
1050 LLVMConstInt(ctx
->i32
, dw_offset_imm
, 0), "");
1052 ac_lds_store(&ctx
->ac
, dw_addr
, value
);
1057 TESS_OFFCHIP_RING_TCS
,
1058 TESS_OFFCHIP_RING_TES
,
1061 static LLVMValueRef
get_tess_ring_descriptor(struct si_shader_context
*ctx
,
1062 enum si_tess_ring ring
)
1064 LLVMBuilderRef builder
= ctx
->ac
.builder
;
1065 unsigned param
= ring
== TESS_OFFCHIP_RING_TES
? ctx
->param_tes_offchip_addr
:
1066 ctx
->param_tcs_out_lds_layout
;
1067 LLVMValueRef addr
= LLVMGetParam(ctx
->main_fn
, param
);
1069 /* TCS only receives high 13 bits of the address. */
1070 if (ring
== TESS_OFFCHIP_RING_TCS
|| ring
== TCS_FACTOR_RING
) {
1071 addr
= LLVMBuildAnd(builder
, addr
,
1072 LLVMConstInt(ctx
->i32
, 0xfff80000, 0), "");
1075 if (ring
== TCS_FACTOR_RING
) {
1076 unsigned tf_offset
= ctx
->screen
->tess_offchip_ring_size
;
1077 addr
= LLVMBuildAdd(builder
, addr
,
1078 LLVMConstInt(ctx
->i32
, tf_offset
, 0), "");
1081 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
1082 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
1083 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
1084 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
1086 if (ctx
->screen
->info
.chip_class
>= GFX10
)
1087 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
1088 S_008F0C_OOB_SELECT(3) |
1089 S_008F0C_RESOURCE_LEVEL(1);
1091 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
1092 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
1094 LLVMValueRef desc
[4];
1096 desc
[1] = LLVMConstInt(ctx
->i32
,
1097 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
1098 desc
[2] = LLVMConstInt(ctx
->i32
, 0xffffffff, 0);
1099 desc
[3] = LLVMConstInt(ctx
->i32
, rsrc3
, false);
1101 return ac_build_gather_values(&ctx
->ac
, desc
, 4);
1104 static LLVMValueRef
fetch_input_tcs(
1105 struct lp_build_tgsi_context
*bld_base
,
1106 const struct tgsi_full_src_register
*reg
,
1107 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1109 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1110 LLVMValueRef dw_addr
, stride
;
1111 unsigned swizzle
= swizzle_in
& 0xffff;
1112 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1113 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1114 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1116 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1119 static LLVMValueRef
si_nir_load_tcs_varyings(struct ac_shader_abi
*abi
,
1121 LLVMValueRef vertex_index
,
1122 LLVMValueRef param_index
,
1123 unsigned const_index
,
1125 unsigned driver_location
,
1127 unsigned num_components
,
1132 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1133 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1134 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1135 LLVMValueRef dw_addr
, stride
;
1137 driver_location
= driver_location
/ 4;
1140 stride
= get_tcs_in_vertex_dw_stride(ctx
);
1141 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
1145 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1147 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1148 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1153 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1159 names
= info
->input_semantic_name
;
1160 indices
= info
->input_semantic_index
;
1162 names
= info
->output_semantic_name
;
1163 indices
= info
->output_semantic_index
;
1166 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1167 vertex_index
, param_index
,
1172 LLVMValueRef value
[4];
1173 for (unsigned i
= 0; i
< num_components
; i
++) {
1174 unsigned offset
= i
;
1175 if (llvm_type_is_64bit(ctx
, type
))
1178 offset
+= component
;
1179 value
[i
+ component
] = lshs_lds_load(bld_base
, type
, offset
, dw_addr
);
1182 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1185 static LLVMValueRef
fetch_output_tcs(
1186 struct lp_build_tgsi_context
*bld_base
,
1187 const struct tgsi_full_src_register
*reg
,
1188 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1190 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1191 LLVMValueRef dw_addr
, stride
;
1192 unsigned swizzle
= (swizzle_in
& 0xffff);
1194 if (reg
->Register
.Dimension
) {
1195 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1196 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1197 dw_addr
= get_dw_address(ctx
, NULL
, reg
, stride
, dw_addr
);
1199 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1200 dw_addr
= get_dw_address(ctx
, NULL
, reg
, NULL
, dw_addr
);
1203 return lshs_lds_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
, dw_addr
);
1206 static LLVMValueRef
fetch_input_tes(
1207 struct lp_build_tgsi_context
*bld_base
,
1208 const struct tgsi_full_src_register
*reg
,
1209 enum tgsi_opcode_type type
, unsigned swizzle_in
)
1211 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1212 LLVMValueRef base
, addr
;
1213 unsigned swizzle
= (swizzle_in
& 0xffff);
1215 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1216 addr
= get_tcs_tes_buffer_address_from_reg(ctx
, NULL
, reg
);
1218 return buffer_load(bld_base
, tgsi2llvmtype(bld_base
, type
), swizzle
,
1219 ctx
->tess_offchip_ring
, base
, addr
, true);
1222 LLVMValueRef
si_nir_load_input_tes(struct ac_shader_abi
*abi
,
1224 LLVMValueRef vertex_index
,
1225 LLVMValueRef param_index
,
1226 unsigned const_index
,
1228 unsigned driver_location
,
1230 unsigned num_components
,
1235 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1236 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1237 LLVMValueRef base
, addr
;
1239 driver_location
= driver_location
/ 4;
1241 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1244 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1247 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1248 param_index
, driver_location
,
1249 info
->input_semantic_name
,
1250 info
->input_semantic_index
,
1253 /* TODO: This will generate rather ordinary llvm code, although it
1254 * should be easy for the optimiser to fix up. In future we might want
1255 * to refactor buffer_load(), but for now this maximises code sharing
1256 * between the NIR and TGSI backends.
1258 LLVMValueRef value
[4];
1259 for (unsigned i
= 0; i
< num_components
; i
++) {
1260 unsigned offset
= i
;
1261 if (llvm_type_is_64bit(ctx
, type
)) {
1264 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1267 driver_location
+ 1,
1268 info
->input_semantic_name
,
1269 info
->input_semantic_index
,
1273 offset
= offset
% 4;
1276 offset
+= component
;
1277 value
[i
+ component
] = buffer_load(&ctx
->bld_base
, type
, offset
,
1278 ctx
->tess_offchip_ring
, base
, addr
, true);
1281 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1284 static void store_output_tcs(struct lp_build_tgsi_context
*bld_base
,
1285 const struct tgsi_full_instruction
*inst
,
1286 const struct tgsi_opcode_info
*info
,
1288 LLVMValueRef dst
[4])
1290 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1291 const struct tgsi_full_dst_register
*reg
= &inst
->Dst
[index
];
1292 const struct tgsi_shader_info
*sh_info
= &ctx
->shader
->selector
->info
;
1293 unsigned chan_index
;
1294 LLVMValueRef dw_addr
, stride
;
1295 LLVMValueRef buffer
, base
, buf_addr
;
1296 LLVMValueRef values
[4];
1297 bool skip_lds_store
;
1298 bool is_tess_factor
= false, is_tess_inner
= false;
1300 /* Only handle per-patch and per-vertex outputs here.
1301 * Vectors will be lowered to scalars and this function will be called again.
1303 if (reg
->Register
.File
!= TGSI_FILE_OUTPUT
||
1304 (dst
[0] && LLVMGetTypeKind(LLVMTypeOf(dst
[0])) == LLVMVectorTypeKind
)) {
1305 si_llvm_emit_store(bld_base
, inst
, info
, index
, dst
);
1309 if (reg
->Register
.Dimension
) {
1310 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1311 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1312 dw_addr
= get_dw_address(ctx
, reg
, NULL
, stride
, dw_addr
);
1313 skip_lds_store
= !sh_info
->reads_pervertex_outputs
;
1315 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1316 dw_addr
= get_dw_address(ctx
, reg
, NULL
, NULL
, dw_addr
);
1317 skip_lds_store
= !sh_info
->reads_perpatch_outputs
;
1319 if (!reg
->Register
.Indirect
) {
1320 int name
= sh_info
->output_semantic_name
[reg
->Register
.Index
];
1322 /* Always write tess factors into LDS for the TCS epilog. */
1323 if (name
== TGSI_SEMANTIC_TESSINNER
||
1324 name
== TGSI_SEMANTIC_TESSOUTER
) {
1325 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1326 skip_lds_store
= !sh_info
->reads_tessfactor_outputs
&&
1327 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1328 is_tess_factor
= true;
1329 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1334 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1336 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1337 buf_addr
= get_tcs_tes_buffer_address_from_reg(ctx
, reg
, NULL
);
1339 uint32_t writemask
= reg
->Register
.WriteMask
;
1341 chan_index
= u_bit_scan(&writemask
);
1342 LLVMValueRef value
= dst
[chan_index
];
1344 if (inst
->Instruction
.Saturate
)
1345 value
= ac_build_clamp(&ctx
->ac
, value
);
1347 /* Skip LDS stores if there is no LDS read of this output. */
1348 if (!skip_lds_store
)
1349 lshs_lds_store(ctx
, chan_index
, dw_addr
, value
);
1351 value
= ac_to_integer(&ctx
->ac
, value
);
1352 values
[chan_index
] = value
;
1354 if (reg
->Register
.WriteMask
!= 0xF && !is_tess_factor
) {
1355 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1357 4 * chan_index
, ac_glc
, false);
1360 /* Write tess factors into VGPRs for the epilog. */
1361 if (is_tess_factor
&&
1362 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1363 if (!is_tess_inner
) {
1364 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1365 ctx
->invoc0_tess_factors
[chan_index
]);
1366 } else if (chan_index
< 2) {
1367 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1368 ctx
->invoc0_tess_factors
[4 + chan_index
]);
1373 if (reg
->Register
.WriteMask
== 0xF && !is_tess_factor
) {
1374 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1376 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buf_addr
,
1377 base
, 0, ac_glc
, false);
1381 static void si_nir_store_output_tcs(struct ac_shader_abi
*abi
,
1382 const struct nir_variable
*var
,
1383 LLVMValueRef vertex_index
,
1384 LLVMValueRef param_index
,
1385 unsigned const_index
,
1389 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1390 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1391 const unsigned component
= var
->data
.location_frac
;
1392 const bool is_patch
= var
->data
.patch
;
1393 unsigned driver_location
= var
->data
.driver_location
;
1394 LLVMValueRef dw_addr
, stride
;
1395 LLVMValueRef buffer
, base
, addr
;
1396 LLVMValueRef values
[8];
1397 bool skip_lds_store
;
1398 bool is_tess_factor
= false, is_tess_inner
= false;
1400 driver_location
= driver_location
/ 4;
1402 bool is_const
= !param_index
;
1404 param_index
= LLVMConstInt(ctx
->i32
, const_index
, 0);
1407 stride
= get_tcs_out_vertex_dw_stride(ctx
);
1408 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
1409 dw_addr
= get_dw_address_from_generic_indices(ctx
, stride
, dw_addr
,
1410 vertex_index
, param_index
,
1412 info
->output_semantic_name
,
1413 info
->output_semantic_index
,
1416 skip_lds_store
= !info
->reads_pervertex_outputs
;
1418 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
1419 dw_addr
= get_dw_address_from_generic_indices(ctx
, NULL
, dw_addr
,
1420 vertex_index
, param_index
,
1422 info
->output_semantic_name
,
1423 info
->output_semantic_index
,
1426 skip_lds_store
= !info
->reads_perpatch_outputs
;
1428 if (is_const
&& const_index
== 0) {
1429 int name
= info
->output_semantic_name
[driver_location
];
1431 /* Always write tess factors into LDS for the TCS epilog. */
1432 if (name
== TGSI_SEMANTIC_TESSINNER
||
1433 name
== TGSI_SEMANTIC_TESSOUTER
) {
1434 /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
1435 skip_lds_store
= !info
->reads_tessfactor_outputs
&&
1436 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
;
1437 is_tess_factor
= true;
1438 is_tess_inner
= name
== TGSI_SEMANTIC_TESSINNER
;
1443 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
1445 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1447 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
, vertex_index
,
1448 param_index
, driver_location
,
1449 info
->output_semantic_name
,
1450 info
->output_semantic_index
,
1453 for (unsigned chan
= 0; chan
< 8; chan
++) {
1454 if (!(writemask
& (1 << chan
)))
1456 LLVMValueRef value
= ac_llvm_extract_elem(&ctx
->ac
, src
, chan
- component
);
1458 unsigned buffer_store_offset
= chan
% 4;
1460 addr
= get_tcs_tes_buffer_address_from_generic_indices(ctx
,
1463 driver_location
+ 1,
1464 info
->output_semantic_name
,
1465 info
->output_semantic_index
,
1469 /* Skip LDS stores if there is no LDS read of this output. */
1470 if (!skip_lds_store
)
1471 lshs_lds_store(ctx
, chan
, dw_addr
, value
);
1473 value
= ac_to_integer(&ctx
->ac
, value
);
1474 values
[chan
] = value
;
1476 if (writemask
!= 0xF && !is_tess_factor
) {
1477 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 1,
1479 4 * buffer_store_offset
,
1483 /* Write tess factors into VGPRs for the epilog. */
1484 if (is_tess_factor
&&
1485 ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
1486 if (!is_tess_inner
) {
1487 LLVMBuildStore(ctx
->ac
.builder
, value
, /* outer */
1488 ctx
->invoc0_tess_factors
[chan
]);
1489 } else if (chan
< 2) {
1490 LLVMBuildStore(ctx
->ac
.builder
, value
, /* inner */
1491 ctx
->invoc0_tess_factors
[4 + chan
]);
1496 if (writemask
== 0xF && !is_tess_factor
) {
1497 LLVMValueRef value
= ac_build_gather_values(&ctx
->ac
,
1499 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, addr
,
1500 base
, 0, ac_glc
, false);
1504 LLVMValueRef
si_llvm_load_input_gs(struct ac_shader_abi
*abi
,
1505 unsigned input_index
,
1506 unsigned vtx_offset_param
,
1510 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1511 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
1512 struct si_shader
*shader
= ctx
->shader
;
1513 LLVMValueRef vtx_offset
, soffset
;
1514 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1515 unsigned semantic_name
= info
->input_semantic_name
[input_index
];
1516 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1520 param
= si_shader_io_get_unique_index(semantic_name
, semantic_index
, false);
1522 /* GFX9 has the ESGS ring in LDS. */
1523 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
1524 unsigned index
= vtx_offset_param
;
1526 switch (index
/ 2) {
1528 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx01_offset
,
1529 index
% 2 ? 16 : 0, 16);
1532 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx23_offset
,
1533 index
% 2 ? 16 : 0, 16);
1536 vtx_offset
= si_unpack_param(ctx
, ctx
->param_gs_vtx45_offset
,
1537 index
% 2 ? 16 : 0, 16);
1544 unsigned offset
= param
* 4 + swizzle
;
1545 vtx_offset
= LLVMBuildAdd(ctx
->ac
.builder
, vtx_offset
,
1546 LLVMConstInt(ctx
->i32
, offset
, false), "");
1548 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->esgs_ring
, vtx_offset
);
1549 LLVMValueRef value
= LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "");
1550 if (llvm_type_is_64bit(ctx
, type
)) {
1551 ptr
= LLVMBuildGEP(ctx
->ac
.builder
, ptr
,
1552 &ctx
->ac
.i32_1
, 1, "");
1553 LLVMValueRef values
[2] = {
1555 LLVMBuildLoad(ctx
->ac
.builder
, ptr
, "")
1557 value
= ac_build_gather_values(&ctx
->ac
, values
, 2);
1559 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1562 /* GFX6: input load from the ESGS ring in memory. */
1563 if (swizzle
== ~0) {
1564 LLVMValueRef values
[TGSI_NUM_CHANNELS
];
1566 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1567 values
[chan
] = si_llvm_load_input_gs(abi
, input_index
, vtx_offset_param
,
1570 return ac_build_gather_values(&ctx
->ac
, values
,
1574 /* Get the vertex offset parameter on GFX6. */
1575 LLVMValueRef gs_vtx_offset
= ctx
->gs_vtx_offset
[vtx_offset_param
];
1577 vtx_offset
= LLVMBuildMul(ctx
->ac
.builder
, gs_vtx_offset
,
1578 LLVMConstInt(ctx
->i32
, 4, 0), "");
1580 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
) * 256, 0);
1582 value
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1, ctx
->i32_0
,
1583 vtx_offset
, soffset
, 0, ac_glc
, true, false);
1584 if (llvm_type_is_64bit(ctx
, type
)) {
1585 LLVMValueRef value2
;
1586 soffset
= LLVMConstInt(ctx
->i32
, (param
* 4 + swizzle
+ 1) * 256, 0);
1588 value2
= ac_build_buffer_load(&ctx
->ac
, ctx
->esgs_ring
, 1,
1589 ctx
->i32_0
, vtx_offset
, soffset
,
1590 0, ac_glc
, true, false);
1591 return si_llvm_emit_fetch_64bit(bld_base
, type
, value
, value2
);
1593 return LLVMBuildBitCast(ctx
->ac
.builder
, value
, type
, "");
1596 static LLVMValueRef
si_nir_load_input_gs(struct ac_shader_abi
*abi
,
1598 unsigned driver_location
,
1600 unsigned num_components
,
1601 unsigned vertex_index
,
1602 unsigned const_index
,
1605 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1607 LLVMValueRef value
[4];
1608 for (unsigned i
= 0; i
< num_components
; i
++) {
1609 unsigned offset
= i
;
1610 if (llvm_type_is_64bit(ctx
, type
))
1613 offset
+= component
;
1614 value
[i
+ component
] = si_llvm_load_input_gs(&ctx
->abi
, driver_location
/ 4 + const_index
,
1615 vertex_index
, type
, offset
);
1618 return ac_build_varying_gather_values(&ctx
->ac
, value
, num_components
, component
);
1621 static LLVMValueRef
fetch_input_gs(
1622 struct lp_build_tgsi_context
*bld_base
,
1623 const struct tgsi_full_src_register
*reg
,
1624 enum tgsi_opcode_type type
,
1625 unsigned swizzle_in
)
1627 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
1628 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
1629 unsigned swizzle
= swizzle_in
& 0xffff;
1631 unsigned semantic_name
= info
->input_semantic_name
[reg
->Register
.Index
];
1632 if (swizzle
!= ~0 && semantic_name
== TGSI_SEMANTIC_PRIMID
)
1633 return si_get_primitive_id(ctx
, swizzle
);
1635 if (!reg
->Register
.Dimension
)
1638 return si_llvm_load_input_gs(&ctx
->abi
, reg
->Register
.Index
,
1639 reg
->Dimension
.Index
,
1640 tgsi2llvmtype(bld_base
, type
),
1644 static int lookup_interp_param_index(unsigned interpolate
, unsigned location
)
1646 switch (interpolate
) {
1647 case TGSI_INTERPOLATE_CONSTANT
:
1650 case TGSI_INTERPOLATE_LINEAR
:
1651 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1652 return SI_PARAM_LINEAR_SAMPLE
;
1653 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1654 return SI_PARAM_LINEAR_CENTROID
;
1656 return SI_PARAM_LINEAR_CENTER
;
1658 case TGSI_INTERPOLATE_COLOR
:
1659 case TGSI_INTERPOLATE_PERSPECTIVE
:
1660 if (location
== TGSI_INTERPOLATE_LOC_SAMPLE
)
1661 return SI_PARAM_PERSP_SAMPLE
;
1662 else if (location
== TGSI_INTERPOLATE_LOC_CENTROID
)
1663 return SI_PARAM_PERSP_CENTROID
;
1665 return SI_PARAM_PERSP_CENTER
;
1668 fprintf(stderr
, "Warning: Unhandled interpolation mode.\n");
1673 static LLVMValueRef
si_build_fs_interp(struct si_shader_context
*ctx
,
1674 unsigned attr_index
, unsigned chan
,
1675 LLVMValueRef prim_mask
,
1676 LLVMValueRef i
, LLVMValueRef j
)
1679 return ac_build_fs_interp(&ctx
->ac
,
1680 LLVMConstInt(ctx
->i32
, chan
, 0),
1681 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1684 return ac_build_fs_interp_mov(&ctx
->ac
,
1685 LLVMConstInt(ctx
->i32
, 2, 0), /* P0 */
1686 LLVMConstInt(ctx
->i32
, chan
, 0),
1687 LLVMConstInt(ctx
->i32
, attr_index
, 0),
1692 * Interpolate a fragment shader input.
1694 * @param ctx context
1695 * @param input_index index of the input in hardware
1696 * @param semantic_name TGSI_SEMANTIC_*
1697 * @param semantic_index semantic index
1698 * @param num_interp_inputs number of all interpolated inputs (= BCOLOR offset)
1699 * @param colors_read_mask color components read (4 bits for each color, 8 bits in total)
1700 * @param interp_param interpolation weights (i,j)
1701 * @param prim_mask SI_PARAM_PRIM_MASK
1702 * @param face SI_PARAM_FRONT_FACE
1703 * @param result the return value (4 components)
1705 static void interp_fs_input(struct si_shader_context
*ctx
,
1706 unsigned input_index
,
1707 unsigned semantic_name
,
1708 unsigned semantic_index
,
1709 unsigned num_interp_inputs
,
1710 unsigned colors_read_mask
,
1711 LLVMValueRef interp_param
,
1712 LLVMValueRef prim_mask
,
1714 LLVMValueRef result
[4])
1716 LLVMValueRef i
= NULL
, j
= NULL
;
1719 /* fs.constant returns the param from the middle vertex, so it's not
1720 * really useful for flat shading. It's meant to be used for custom
1721 * interpolation (but the intrinsic can't fetch from the other two
1724 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
1725 * to do the right thing. The only reason we use fs.constant is that
1726 * fs.interp cannot be used on integers, because they can be equal
1729 * When interp is false we will use fs.constant or for newer llvm,
1730 * amdgcn.interp.mov.
1732 bool interp
= interp_param
!= NULL
;
1735 interp_param
= LLVMBuildBitCast(ctx
->ac
.builder
, interp_param
,
1736 LLVMVectorType(ctx
->f32
, 2), "");
1738 i
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1740 j
= LLVMBuildExtractElement(ctx
->ac
.builder
, interp_param
,
1744 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
1745 ctx
->shader
->key
.part
.ps
.prolog
.color_two_side
) {
1746 LLVMValueRef is_face_positive
;
1748 /* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
1749 * otherwise it's at offset "num_inputs".
1751 unsigned back_attr_offset
= num_interp_inputs
;
1752 if (semantic_index
== 1 && colors_read_mask
& 0xf)
1753 back_attr_offset
+= 1;
1755 is_face_positive
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
1756 face
, ctx
->i32_0
, "");
1758 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1759 LLVMValueRef front
, back
;
1761 front
= si_build_fs_interp(ctx
,
1764 back
= si_build_fs_interp(ctx
,
1765 back_attr_offset
, chan
,
1768 result
[chan
] = LLVMBuildSelect(ctx
->ac
.builder
,
1774 } else if (semantic_name
== TGSI_SEMANTIC_FOG
) {
1775 result
[0] = si_build_fs_interp(ctx
, input_index
,
1776 0, prim_mask
, i
, j
);
1778 result
[2] = LLVMConstReal(ctx
->f32
, 0.0f
);
1779 result
[3] = LLVMConstReal(ctx
->f32
, 1.0f
);
1781 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
1782 result
[chan
] = si_build_fs_interp(ctx
,
1789 void si_llvm_load_input_fs(
1790 struct si_shader_context
*ctx
,
1791 unsigned input_index
,
1792 LLVMValueRef out
[4])
1794 struct si_shader
*shader
= ctx
->shader
;
1795 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
1796 LLVMValueRef main_fn
= ctx
->main_fn
;
1797 LLVMValueRef interp_param
= NULL
;
1798 int interp_param_idx
;
1799 enum tgsi_semantic semantic_name
= info
->input_semantic_name
[input_index
];
1800 unsigned semantic_index
= info
->input_semantic_index
[input_index
];
1801 enum tgsi_interpolate_mode interp_mode
= info
->input_interpolate
[input_index
];
1802 enum tgsi_interpolate_loc interp_loc
= info
->input_interpolate_loc
[input_index
];
1804 /* Get colors from input VGPRs (set by the prolog). */
1805 if (semantic_name
== TGSI_SEMANTIC_COLOR
) {
1806 unsigned colors_read
= shader
->selector
->info
.colors_read
;
1807 unsigned mask
= colors_read
>> (semantic_index
* 4);
1808 unsigned offset
= SI_PARAM_POS_FIXED_PT
+ 1 +
1809 (semantic_index
? util_bitcount(colors_read
& 0xf) : 0);
1810 LLVMValueRef undef
= LLVMGetUndef(ctx
->f32
);
1812 out
[0] = mask
& 0x1 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1813 out
[1] = mask
& 0x2 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1814 out
[2] = mask
& 0x4 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1815 out
[3] = mask
& 0x8 ? LLVMGetParam(main_fn
, offset
++) : undef
;
1819 interp_param_idx
= lookup_interp_param_index(interp_mode
, interp_loc
);
1820 if (interp_param_idx
== -1)
1822 else if (interp_param_idx
) {
1823 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
1826 interp_fs_input(ctx
, input_index
, semantic_name
,
1827 semantic_index
, 0, /* this param is unused */
1828 shader
->selector
->info
.colors_read
, interp_param
,
1830 LLVMGetParam(main_fn
, SI_PARAM_FRONT_FACE
),
1834 static void declare_input_fs(
1835 struct si_shader_context
*ctx
,
1836 unsigned input_index
,
1837 const struct tgsi_full_declaration
*decl
,
1838 LLVMValueRef out
[4])
1840 si_llvm_load_input_fs(ctx
, input_index
, out
);
1843 LLVMValueRef
si_get_sample_id(struct si_shader_context
*ctx
)
1845 return si_unpack_param(ctx
, SI_PARAM_ANCILLARY
, 8, 4);
1848 static LLVMValueRef
get_base_vertex(struct ac_shader_abi
*abi
)
1850 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1852 /* For non-indexed draws, the base vertex set by the driver
1853 * (for direct draws) or the CP (for indirect draws) is the
1854 * first vertex ID, but GLSL expects 0 to be returned.
1856 LLVMValueRef vs_state
= LLVMGetParam(ctx
->main_fn
,
1857 ctx
->param_vs_state_bits
);
1858 LLVMValueRef indexed
;
1860 indexed
= LLVMBuildLShr(ctx
->ac
.builder
, vs_state
, ctx
->i32_1
, "");
1861 indexed
= LLVMBuildTrunc(ctx
->ac
.builder
, indexed
, ctx
->i1
, "");
1863 return LLVMBuildSelect(ctx
->ac
.builder
, indexed
, ctx
->abi
.base_vertex
,
1867 static LLVMValueRef
get_block_size(struct ac_shader_abi
*abi
)
1869 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1871 LLVMValueRef values
[3];
1872 LLVMValueRef result
;
1874 unsigned *properties
= ctx
->shader
->selector
->info
.properties
;
1876 if (properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] != 0) {
1877 unsigned sizes
[3] = {
1878 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
],
1879 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
],
1880 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
]
1883 for (i
= 0; i
< 3; ++i
)
1884 values
[i
] = LLVMConstInt(ctx
->i32
, sizes
[i
], 0);
1886 result
= ac_build_gather_values(&ctx
->ac
, values
, 3);
1888 result
= LLVMGetParam(ctx
->main_fn
, ctx
->param_block_size
);
1895 * Load a dword from a constant buffer.
1897 static LLVMValueRef
buffer_load_const(struct si_shader_context
*ctx
,
1898 LLVMValueRef resource
,
1899 LLVMValueRef offset
)
1901 return ac_build_buffer_load(&ctx
->ac
, resource
, 1, NULL
, offset
, NULL
,
1905 static LLVMValueRef
load_sample_position(struct ac_shader_abi
*abi
, LLVMValueRef sample_id
)
1907 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1908 LLVMValueRef desc
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1909 LLVMValueRef buf_index
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_SAMPLE_POSITIONS
, 0);
1910 LLVMValueRef resource
= ac_build_load_to_sgpr(&ctx
->ac
, desc
, buf_index
);
1912 /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
1913 LLVMValueRef offset0
= LLVMBuildMul(ctx
->ac
.builder
, sample_id
, LLVMConstInt(ctx
->i32
, 8, 0), "");
1914 LLVMValueRef offset1
= LLVMBuildAdd(ctx
->ac
.builder
, offset0
, LLVMConstInt(ctx
->i32
, 4, 0), "");
1916 LLVMValueRef pos
[4] = {
1917 buffer_load_const(ctx
, resource
, offset0
),
1918 buffer_load_const(ctx
, resource
, offset1
),
1919 LLVMConstReal(ctx
->f32
, 0),
1920 LLVMConstReal(ctx
->f32
, 0)
1923 return ac_build_gather_values(&ctx
->ac
, pos
, 4);
1926 static LLVMValueRef
load_sample_mask_in(struct ac_shader_abi
*abi
)
1928 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1929 return ac_to_integer(&ctx
->ac
, abi
->sample_coverage
);
1932 static LLVMValueRef
si_load_tess_coord(struct ac_shader_abi
*abi
)
1934 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1935 LLVMValueRef coord
[4] = {
1936 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_u
),
1937 LLVMGetParam(ctx
->main_fn
, ctx
->param_tes_v
),
1942 /* For triangles, the vector should be (u, v, 1-u-v). */
1943 if (ctx
->shader
->selector
->info
.properties
[TGSI_PROPERTY_TES_PRIM_MODE
] ==
1944 PIPE_PRIM_TRIANGLES
) {
1945 coord
[2] = LLVMBuildFSub(ctx
->ac
.builder
, ctx
->ac
.f32_1
,
1946 LLVMBuildFAdd(ctx
->ac
.builder
,
1947 coord
[0], coord
[1], ""), "");
1949 return ac_build_gather_values(&ctx
->ac
, coord
, 4);
1952 static LLVMValueRef
load_tess_level(struct si_shader_context
*ctx
,
1953 unsigned semantic_name
)
1955 LLVMValueRef base
, addr
;
1957 int param
= si_shader_io_get_unique_index_patch(semantic_name
, 0);
1959 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
1960 addr
= get_tcs_tes_buffer_address(ctx
, get_rel_patch_id(ctx
), NULL
,
1961 LLVMConstInt(ctx
->i32
, param
, 0));
1963 return buffer_load(&ctx
->bld_base
, ctx
->f32
,
1964 ~0, ctx
->tess_offchip_ring
, base
, addr
, true);
1968 static LLVMValueRef
load_tess_level_default(struct si_shader_context
*ctx
,
1969 unsigned semantic_name
)
1971 LLVMValueRef buf
, slot
, val
[4];
1974 slot
= LLVMConstInt(ctx
->i32
, SI_HS_CONST_DEFAULT_TESS_LEVELS
, 0);
1975 buf
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
1976 buf
= ac_build_load_to_sgpr(&ctx
->ac
, buf
, slot
);
1977 offset
= semantic_name
== TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
? 4 : 0;
1979 for (i
= 0; i
< 4; i
++)
1980 val
[i
] = buffer_load_const(ctx
, buf
,
1981 LLVMConstInt(ctx
->i32
, (offset
+ i
) * 4, 0));
1982 return ac_build_gather_values(&ctx
->ac
, val
, 4);
1985 static LLVMValueRef
si_load_tess_level(struct ac_shader_abi
*abi
,
1986 unsigned varying_id
,
1987 bool load_default_state
)
1989 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
1990 unsigned semantic_name
;
1992 if (load_default_state
) {
1993 switch (varying_id
) {
1994 case VARYING_SLOT_TESS_LEVEL_INNER
:
1995 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
;
1997 case VARYING_SLOT_TESS_LEVEL_OUTER
:
1998 semantic_name
= TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
;
2001 unreachable("unknown tess level");
2003 return load_tess_level_default(ctx
, semantic_name
);
2006 switch (varying_id
) {
2007 case VARYING_SLOT_TESS_LEVEL_INNER
:
2008 semantic_name
= TGSI_SEMANTIC_TESSINNER
;
2010 case VARYING_SLOT_TESS_LEVEL_OUTER
:
2011 semantic_name
= TGSI_SEMANTIC_TESSOUTER
;
2014 unreachable("unknown tess level");
2017 return load_tess_level(ctx
, semantic_name
);
2021 static LLVMValueRef
si_load_patch_vertices_in(struct ac_shader_abi
*abi
)
2023 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2024 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
)
2025 return si_unpack_param(ctx
, ctx
->param_tcs_out_lds_layout
, 13, 6);
2026 else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
)
2027 return get_num_tcs_out_vertices(ctx
);
2029 unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
2032 void si_load_system_value(struct si_shader_context
*ctx
,
2034 const struct tgsi_full_declaration
*decl
)
2036 LLVMValueRef value
= 0;
2038 assert(index
< RADEON_LLVM_MAX_SYSTEM_VALUES
);
2040 switch (decl
->Semantic
.Name
) {
2041 case TGSI_SEMANTIC_INSTANCEID
:
2042 value
= ctx
->abi
.instance_id
;
2045 case TGSI_SEMANTIC_VERTEXID
:
2046 value
= LLVMBuildAdd(ctx
->ac
.builder
,
2048 ctx
->abi
.base_vertex
, "");
2051 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
2052 /* Unused. Clarify the meaning in indexed vs. non-indexed
2053 * draws if this is ever used again. */
2057 case TGSI_SEMANTIC_BASEVERTEX
:
2058 value
= get_base_vertex(&ctx
->abi
);
2061 case TGSI_SEMANTIC_BASEINSTANCE
:
2062 value
= ctx
->abi
.start_instance
;
2065 case TGSI_SEMANTIC_DRAWID
:
2066 value
= ctx
->abi
.draw_id
;
2069 case TGSI_SEMANTIC_INVOCATIONID
:
2070 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
2071 value
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
2072 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
2073 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2074 value
= LLVMBuildAnd(ctx
->ac
.builder
,
2075 ctx
->abi
.gs_invocation_id
,
2076 LLVMConstInt(ctx
->i32
, 127, 0), "");
2078 value
= ctx
->abi
.gs_invocation_id
;
2081 assert(!"INVOCATIONID not implemented");
2085 case TGSI_SEMANTIC_POSITION
:
2087 LLVMValueRef pos
[4] = {
2088 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2089 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2090 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Z_FLOAT
),
2091 ac_build_fdiv(&ctx
->ac
, ctx
->ac
.f32_1
,
2092 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_W_FLOAT
)),
2094 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2098 case TGSI_SEMANTIC_FACE
:
2099 value
= ctx
->abi
.front_face
;
2102 case TGSI_SEMANTIC_SAMPLEID
:
2103 value
= si_get_sample_id(ctx
);
2106 case TGSI_SEMANTIC_SAMPLEPOS
: {
2107 LLVMValueRef pos
[4] = {
2108 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_X_FLOAT
),
2109 LLVMGetParam(ctx
->main_fn
, SI_PARAM_POS_Y_FLOAT
),
2110 LLVMConstReal(ctx
->f32
, 0),
2111 LLVMConstReal(ctx
->f32
, 0)
2113 pos
[0] = ac_build_fract(&ctx
->ac
, pos
[0], 32);
2114 pos
[1] = ac_build_fract(&ctx
->ac
, pos
[1], 32);
2115 value
= ac_build_gather_values(&ctx
->ac
, pos
, 4);
2119 case TGSI_SEMANTIC_SAMPLEMASK
:
2120 /* This can only occur with the OpenGL Core profile, which
2121 * doesn't support smoothing.
2123 value
= LLVMGetParam(ctx
->main_fn
, SI_PARAM_SAMPLE_COVERAGE
);
2126 case TGSI_SEMANTIC_TESSCOORD
:
2127 value
= si_load_tess_coord(&ctx
->abi
);
2130 case TGSI_SEMANTIC_VERTICESIN
:
2131 value
= si_load_patch_vertices_in(&ctx
->abi
);
2134 case TGSI_SEMANTIC_TESSINNER
:
2135 case TGSI_SEMANTIC_TESSOUTER
:
2136 value
= load_tess_level(ctx
, decl
->Semantic
.Name
);
2139 case TGSI_SEMANTIC_TESS_DEFAULT_OUTER_LEVEL
:
2140 case TGSI_SEMANTIC_TESS_DEFAULT_INNER_LEVEL
:
2141 value
= load_tess_level_default(ctx
, decl
->Semantic
.Name
);
2144 case TGSI_SEMANTIC_PRIMID
:
2145 value
= si_get_primitive_id(ctx
, 0);
2148 case TGSI_SEMANTIC_GRID_SIZE
:
2149 value
= ctx
->abi
.num_work_groups
;
2152 case TGSI_SEMANTIC_BLOCK_SIZE
:
2153 value
= get_block_size(&ctx
->abi
);
2156 case TGSI_SEMANTIC_BLOCK_ID
:
2158 LLVMValueRef values
[3];
2160 for (int i
= 0; i
< 3; i
++) {
2161 values
[i
] = ctx
->i32_0
;
2162 if (ctx
->abi
.workgroup_ids
[i
]) {
2163 values
[i
] = ctx
->abi
.workgroup_ids
[i
];
2166 value
= ac_build_gather_values(&ctx
->ac
, values
, 3);
2170 case TGSI_SEMANTIC_THREAD_ID
:
2171 value
= ctx
->abi
.local_invocation_ids
;
2174 case TGSI_SEMANTIC_HELPER_INVOCATION
:
2175 value
= ac_build_load_helper_invocation(&ctx
->ac
);
2178 case TGSI_SEMANTIC_SUBGROUP_SIZE
:
2179 value
= LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, 0);
2182 case TGSI_SEMANTIC_SUBGROUP_INVOCATION
:
2183 value
= ac_get_thread_id(&ctx
->ac
);
2186 case TGSI_SEMANTIC_SUBGROUP_EQ_MASK
:
2188 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2189 if (ctx
->ac
.wave_size
== 64)
2190 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2191 value
= LLVMBuildShl(ctx
->ac
.builder
,
2192 LLVMConstInt(ctx
->ac
.iN_wavemask
, 1, 0), id
, "");
2193 if (ctx
->ac
.wave_size
== 32)
2194 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2195 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2199 case TGSI_SEMANTIC_SUBGROUP_GE_MASK
:
2200 case TGSI_SEMANTIC_SUBGROUP_GT_MASK
:
2201 case TGSI_SEMANTIC_SUBGROUP_LE_MASK
:
2202 case TGSI_SEMANTIC_SUBGROUP_LT_MASK
:
2204 LLVMValueRef id
= ac_get_thread_id(&ctx
->ac
);
2205 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_GT_MASK
||
2206 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
) {
2207 /* All bits set except LSB */
2208 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -2, 0);
2211 value
= LLVMConstInt(ctx
->ac
.iN_wavemask
, -1, 0);
2213 if (ctx
->ac
.wave_size
== 64)
2214 id
= LLVMBuildZExt(ctx
->ac
.builder
, id
, ctx
->i64
, "");
2215 value
= LLVMBuildShl(ctx
->ac
.builder
, value
, id
, "");
2216 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LE_MASK
||
2217 decl
->Semantic
.Name
== TGSI_SEMANTIC_SUBGROUP_LT_MASK
)
2218 value
= LLVMBuildNot(ctx
->ac
.builder
, value
, "");
2219 if (ctx
->ac
.wave_size
== 32)
2220 value
= LLVMBuildZExt(ctx
->ac
.builder
, value
, ctx
->i64
, "");
2221 value
= LLVMBuildBitCast(ctx
->ac
.builder
, value
, ctx
->v2i32
, "");
2225 case TGSI_SEMANTIC_CS_USER_DATA_AMD
:
2226 value
= LLVMGetParam(ctx
->main_fn
, ctx
->param_cs_user_data
);
2230 assert(!"unknown system value");
2234 ctx
->system_values
[index
] = value
;
2237 void si_declare_compute_memory(struct si_shader_context
*ctx
)
2239 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2240 unsigned lds_size
= sel
->info
.properties
[TGSI_PROPERTY_CS_LOCAL_SIZE
];
2242 LLVMTypeRef i8p
= LLVMPointerType(ctx
->i8
, AC_ADDR_SPACE_LDS
);
2245 assert(!ctx
->ac
.lds
);
2247 var
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
2248 LLVMArrayType(ctx
->i8
, lds_size
),
2251 LLVMSetAlignment(var
, 64 * 1024);
2253 ctx
->ac
.lds
= LLVMBuildBitCast(ctx
->ac
.builder
, var
, i8p
, "");
2256 void si_tgsi_declare_compute_memory(struct si_shader_context
*ctx
,
2257 const struct tgsi_full_declaration
*decl
)
2259 assert(decl
->Declaration
.MemType
== TGSI_MEMORY_TYPE_SHARED
);
2260 assert(decl
->Range
.First
== decl
->Range
.Last
);
2262 si_declare_compute_memory(ctx
);
2265 static LLVMValueRef
load_const_buffer_desc_fast_path(struct si_shader_context
*ctx
)
2268 LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2269 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2271 /* Do the bounds checking with a descriptor, because
2272 * doing computation and manual bounds checking of 64-bit
2273 * addresses generates horrible VALU code with very high
2274 * VGPR usage and very low SIMD occupancy.
2276 ptr
= LLVMBuildPtrToInt(ctx
->ac
.builder
, ptr
, ctx
->ac
.intptr
, "");
2278 LLVMValueRef desc0
, desc1
;
2280 desc1
= LLVMConstInt(ctx
->i32
,
2281 S_008F04_BASE_ADDRESS_HI(ctx
->screen
->info
.address32_hi
), 0);
2283 uint32_t rsrc3
= S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
2284 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
2285 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
2286 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
);
2288 if (ctx
->screen
->info
.chip_class
>= GFX10
)
2289 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
2290 S_008F0C_OOB_SELECT(3) |
2291 S_008F0C_RESOURCE_LEVEL(1);
2293 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
2294 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
);
2296 LLVMValueRef desc_elems
[] = {
2299 LLVMConstInt(ctx
->i32
, (sel
->info
.const_file_max
[0] + 1) * 16, 0),
2300 LLVMConstInt(ctx
->i32
, rsrc3
, false)
2303 return ac_build_gather_values(&ctx
->ac
, desc_elems
, 4);
2306 static LLVMValueRef
load_const_buffer_desc(struct si_shader_context
*ctx
, int i
)
2308 LLVMValueRef list_ptr
= LLVMGetParam(ctx
->main_fn
,
2309 ctx
->param_const_and_shader_buffers
);
2311 return ac_build_load_to_sgpr(&ctx
->ac
, list_ptr
,
2312 LLVMConstInt(ctx
->i32
, si_get_constbuf_slot(i
), 0));
2315 static LLVMValueRef
load_ubo(struct ac_shader_abi
*abi
, LLVMValueRef index
)
2317 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2318 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2320 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2322 if (sel
->info
.const_buffers_declared
== 1 &&
2323 sel
->info
.shader_buffers_declared
== 0) {
2324 return load_const_buffer_desc_fast_path(ctx
);
2327 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_const_buffers
);
2328 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2329 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2331 return ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2335 load_ssbo(struct ac_shader_abi
*abi
, LLVMValueRef index
, bool write
)
2337 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
2338 LLVMValueRef rsrc_ptr
= LLVMGetParam(ctx
->main_fn
,
2339 ctx
->param_const_and_shader_buffers
);
2341 index
= si_llvm_bound_index(ctx
, index
, ctx
->num_shader_buffers
);
2342 index
= LLVMBuildSub(ctx
->ac
.builder
,
2343 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
- 1, 0),
2346 return ac_build_load_to_sgpr(&ctx
->ac
, rsrc_ptr
, index
);
2349 static LLVMValueRef
fetch_constant(
2350 struct lp_build_tgsi_context
*bld_base
,
2351 const struct tgsi_full_src_register
*reg
,
2352 enum tgsi_opcode_type type
,
2353 unsigned swizzle_in
)
2355 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2356 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2357 const struct tgsi_ind_register
*ireg
= ®
->Indirect
;
2359 unsigned swizzle
= swizzle_in
& 0xffff;
2361 LLVMValueRef addr
, bufp
;
2363 if (swizzle_in
== LP_CHAN_ALL
) {
2365 LLVMValueRef values
[4];
2366 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; ++chan
)
2367 values
[chan
] = fetch_constant(bld_base
, reg
, type
, chan
);
2369 return ac_build_gather_values(&ctx
->ac
, values
, 4);
2372 /* Split 64-bit loads. */
2373 if (tgsi_type_is_64bit(type
)) {
2374 LLVMValueRef lo
, hi
;
2376 lo
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, swizzle
);
2377 hi
= fetch_constant(bld_base
, reg
, TGSI_TYPE_UNSIGNED
, (swizzle_in
>> 16));
2378 return si_llvm_emit_fetch_64bit(bld_base
, tgsi2llvmtype(bld_base
, type
),
2382 idx
= reg
->Register
.Index
* 4 + swizzle
;
2383 if (reg
->Register
.Indirect
) {
2384 addr
= si_get_indirect_index(ctx
, ireg
, 16, idx
* 4);
2386 addr
= LLVMConstInt(ctx
->i32
, idx
* 4, 0);
2389 /* Fast path when user data SGPRs point to constant buffer 0 directly. */
2390 if (sel
->info
.const_buffers_declared
== 1 &&
2391 sel
->info
.shader_buffers_declared
== 0) {
2392 LLVMValueRef desc
= load_const_buffer_desc_fast_path(ctx
);
2393 LLVMValueRef result
= buffer_load_const(ctx
, desc
, addr
);
2394 return bitcast(bld_base
, type
, result
);
2397 assert(reg
->Register
.Dimension
);
2398 buf
= reg
->Dimension
.Index
;
2400 if (reg
->Dimension
.Indirect
) {
2401 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_const_and_shader_buffers
);
2403 index
= si_get_bounded_indirect_index(ctx
, ®
->DimIndirect
,
2404 reg
->Dimension
.Index
,
2405 ctx
->num_const_buffers
);
2406 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
2407 LLVMConstInt(ctx
->i32
, SI_NUM_SHADER_BUFFERS
, 0), "");
2408 bufp
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, index
);
2410 bufp
= load_const_buffer_desc(ctx
, buf
);
2412 return bitcast(bld_base
, type
, buffer_load_const(ctx
, bufp
, addr
));
2415 /* Initialize arguments for the shader export intrinsic */
2416 static void si_llvm_init_export_args(struct si_shader_context
*ctx
,
2417 LLVMValueRef
*values
,
2419 struct ac_export_args
*args
)
2421 LLVMValueRef f32undef
= LLVMGetUndef(ctx
->ac
.f32
);
2422 unsigned spi_shader_col_format
= V_028714_SPI_SHADER_32_ABGR
;
2424 bool is_int8
, is_int10
;
2426 /* Default is 0xf. Adjusted below depending on the format. */
2427 args
->enabled_channels
= 0xf; /* writemask */
2429 /* Specify whether the EXEC mask represents the valid mask */
2430 args
->valid_mask
= 0;
2432 /* Specify whether this is the last export */
2435 /* Specify the target we are exporting */
2436 args
->target
= target
;
2438 if (ctx
->type
== PIPE_SHADER_FRAGMENT
) {
2439 const struct si_shader_key
*key
= &ctx
->shader
->key
;
2440 unsigned col_formats
= key
->part
.ps
.epilog
.spi_shader_col_format
;
2441 int cbuf
= target
- V_008DFC_SQ_EXP_MRT
;
2443 assert(cbuf
>= 0 && cbuf
< 8);
2444 spi_shader_col_format
= (col_formats
>> (cbuf
* 4)) & 0xf;
2445 is_int8
= (key
->part
.ps
.epilog
.color_is_int8
>> cbuf
) & 0x1;
2446 is_int10
= (key
->part
.ps
.epilog
.color_is_int10
>> cbuf
) & 0x1;
2449 args
->compr
= false;
2450 args
->out
[0] = f32undef
;
2451 args
->out
[1] = f32undef
;
2452 args
->out
[2] = f32undef
;
2453 args
->out
[3] = f32undef
;
2455 LLVMValueRef (*packf
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2]) = NULL
;
2456 LLVMValueRef (*packi
)(struct ac_llvm_context
*ctx
, LLVMValueRef args
[2],
2457 unsigned bits
, bool hi
) = NULL
;
2459 switch (spi_shader_col_format
) {
2460 case V_028714_SPI_SHADER_ZERO
:
2461 args
->enabled_channels
= 0; /* writemask */
2462 args
->target
= V_008DFC_SQ_EXP_NULL
;
2465 case V_028714_SPI_SHADER_32_R
:
2466 args
->enabled_channels
= 1; /* writemask */
2467 args
->out
[0] = values
[0];
2470 case V_028714_SPI_SHADER_32_GR
:
2471 args
->enabled_channels
= 0x3; /* writemask */
2472 args
->out
[0] = values
[0];
2473 args
->out
[1] = values
[1];
2476 case V_028714_SPI_SHADER_32_AR
:
2477 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
2478 args
->enabled_channels
= 0x3; /* writemask */
2479 args
->out
[0] = values
[0];
2480 args
->out
[1] = values
[3];
2482 args
->enabled_channels
= 0x9; /* writemask */
2483 args
->out
[0] = values
[0];
2484 args
->out
[3] = values
[3];
2488 case V_028714_SPI_SHADER_FP16_ABGR
:
2489 packf
= ac_build_cvt_pkrtz_f16
;
2492 case V_028714_SPI_SHADER_UNORM16_ABGR
:
2493 packf
= ac_build_cvt_pknorm_u16
;
2496 case V_028714_SPI_SHADER_SNORM16_ABGR
:
2497 packf
= ac_build_cvt_pknorm_i16
;
2500 case V_028714_SPI_SHADER_UINT16_ABGR
:
2501 packi
= ac_build_cvt_pk_u16
;
2504 case V_028714_SPI_SHADER_SINT16_ABGR
:
2505 packi
= ac_build_cvt_pk_i16
;
2508 case V_028714_SPI_SHADER_32_ABGR
:
2509 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
2513 /* Pack f16 or norm_i16/u16. */
2515 for (chan
= 0; chan
< 2; chan
++) {
2516 LLVMValueRef pack_args
[2] = {
2518 values
[2 * chan
+ 1]
2520 LLVMValueRef packed
;
2522 packed
= packf(&ctx
->ac
, pack_args
);
2523 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2525 args
->compr
= 1; /* COMPR flag */
2529 for (chan
= 0; chan
< 2; chan
++) {
2530 LLVMValueRef pack_args
[2] = {
2531 ac_to_integer(&ctx
->ac
, values
[2 * chan
]),
2532 ac_to_integer(&ctx
->ac
, values
[2 * chan
+ 1])
2534 LLVMValueRef packed
;
2536 packed
= packi(&ctx
->ac
, pack_args
,
2537 is_int8
? 8 : is_int10
? 10 : 16,
2539 args
->out
[chan
] = ac_to_float(&ctx
->ac
, packed
);
2541 args
->compr
= 1; /* COMPR flag */
2545 static void si_alpha_test(struct lp_build_tgsi_context
*bld_base
,
2548 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2550 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_NEVER
) {
2551 static LLVMRealPredicate cond_map
[PIPE_FUNC_ALWAYS
+ 1] = {
2552 [PIPE_FUNC_LESS
] = LLVMRealOLT
,
2553 [PIPE_FUNC_EQUAL
] = LLVMRealOEQ
,
2554 [PIPE_FUNC_LEQUAL
] = LLVMRealOLE
,
2555 [PIPE_FUNC_GREATER
] = LLVMRealOGT
,
2556 [PIPE_FUNC_NOTEQUAL
] = LLVMRealONE
,
2557 [PIPE_FUNC_GEQUAL
] = LLVMRealOGE
,
2559 LLVMRealPredicate cond
= cond_map
[ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
];
2562 LLVMValueRef alpha_ref
= LLVMGetParam(ctx
->main_fn
,
2563 SI_PARAM_ALPHA_REF
);
2564 LLVMValueRef alpha_pass
=
2565 LLVMBuildFCmp(ctx
->ac
.builder
, cond
, alpha
, alpha_ref
, "");
2566 ac_build_kill_if_false(&ctx
->ac
, alpha_pass
);
2568 ac_build_kill_if_false(&ctx
->ac
, ctx
->i1false
);
2572 static LLVMValueRef
si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context
*bld_base
,
2574 unsigned samplemask_param
)
2576 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
2577 LLVMValueRef coverage
;
2579 /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */
2580 coverage
= LLVMGetParam(ctx
->main_fn
,
2582 coverage
= ac_to_integer(&ctx
->ac
, coverage
);
2584 coverage
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32",
2586 &coverage
, 1, AC_FUNC_ATTR_READNONE
);
2588 coverage
= LLVMBuildUIToFP(ctx
->ac
.builder
, coverage
,
2591 coverage
= LLVMBuildFMul(ctx
->ac
.builder
, coverage
,
2592 LLVMConstReal(ctx
->f32
,
2593 1.0 / SI_NUM_SMOOTH_AA_SAMPLES
), "");
2595 return LLVMBuildFMul(ctx
->ac
.builder
, alpha
, coverage
, "");
2598 static void si_llvm_emit_clipvertex(struct si_shader_context
*ctx
,
2599 struct ac_export_args
*pos
, LLVMValueRef
*out_elts
)
2603 unsigned const_chan
;
2604 LLVMValueRef base_elt
;
2605 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, ctx
->param_rw_buffers
);
2606 LLVMValueRef constbuf_index
= LLVMConstInt(ctx
->i32
,
2607 SI_VS_CONST_CLIP_PLANES
, 0);
2608 LLVMValueRef const_resource
= ac_build_load_to_sgpr(&ctx
->ac
, ptr
, constbuf_index
);
2610 for (reg_index
= 0; reg_index
< 2; reg_index
++) {
2611 struct ac_export_args
*args
= &pos
[2 + reg_index
];
2616 args
->out
[3] = LLVMConstReal(ctx
->f32
, 0.0f
);
2618 /* Compute dot products of position and user clip plane vectors */
2619 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2620 for (const_chan
= 0; const_chan
< TGSI_NUM_CHANNELS
; const_chan
++) {
2622 LLVMConstInt(ctx
->i32
, ((reg_index
* 4 + chan
) * 4 +
2623 const_chan
) * 4, 0);
2624 base_elt
= buffer_load_const(ctx
, const_resource
,
2626 args
->out
[chan
] = ac_build_fmad(&ctx
->ac
, base_elt
,
2627 out_elts
[const_chan
], args
->out
[chan
]);
2631 args
->enabled_channels
= 0xf;
2632 args
->valid_mask
= 0;
2634 args
->target
= V_008DFC_SQ_EXP_POS
+ 2 + reg_index
;
2639 static void si_dump_streamout(struct pipe_stream_output_info
*so
)
2643 if (so
->num_outputs
)
2644 fprintf(stderr
, "STREAMOUT\n");
2646 for (i
= 0; i
< so
->num_outputs
; i
++) {
2647 unsigned mask
= ((1 << so
->output
[i
].num_components
) - 1) <<
2648 so
->output
[i
].start_component
;
2649 fprintf(stderr
, " %i: BUF%i[%i..%i] <- OUT[%i].%s%s%s%s\n",
2650 i
, so
->output
[i
].output_buffer
,
2651 so
->output
[i
].dst_offset
, so
->output
[i
].dst_offset
+ so
->output
[i
].num_components
- 1,
2652 so
->output
[i
].register_index
,
2653 mask
& 1 ? "x" : "",
2654 mask
& 2 ? "y" : "",
2655 mask
& 4 ? "z" : "",
2656 mask
& 8 ? "w" : "");
2660 void si_emit_streamout_output(struct si_shader_context
*ctx
,
2661 LLVMValueRef
const *so_buffers
,
2662 LLVMValueRef
const *so_write_offsets
,
2663 struct pipe_stream_output
*stream_out
,
2664 struct si_shader_output_values
*shader_out
)
2666 unsigned buf_idx
= stream_out
->output_buffer
;
2667 unsigned start
= stream_out
->start_component
;
2668 unsigned num_comps
= stream_out
->num_components
;
2669 LLVMValueRef out
[4];
2671 assert(num_comps
&& num_comps
<= 4);
2672 if (!num_comps
|| num_comps
> 4)
2675 /* Load the output as int. */
2676 for (int j
= 0; j
< num_comps
; j
++) {
2677 assert(stream_out
->stream
== shader_out
->vertex_stream
[start
+ j
]);
2679 out
[j
] = ac_to_integer(&ctx
->ac
, shader_out
->values
[start
+ j
]);
2682 /* Pack the output. */
2683 LLVMValueRef vdata
= NULL
;
2685 switch (num_comps
) {
2686 case 1: /* as i32 */
2689 case 2: /* as v2i32 */
2690 case 3: /* as v3i32 */
2691 if (ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false)) {
2692 vdata
= ac_build_gather_values(&ctx
->ac
, out
, num_comps
);
2695 /* as v4i32 (aligned to 4) */
2696 out
[3] = LLVMGetUndef(ctx
->i32
);
2698 case 4: /* as v4i32 */
2699 vdata
= ac_build_gather_values(&ctx
->ac
, out
, util_next_power_of_two(num_comps
));
2703 ac_build_buffer_store_dword(&ctx
->ac
, so_buffers
[buf_idx
],
2705 so_write_offsets
[buf_idx
],
2707 stream_out
->dst_offset
* 4, ac_glc
| ac_slc
, false);
2711 * Write streamout data to buffers for vertex stream @p stream (different
2712 * vertex streams can occur for GS copy shaders).
2714 static void si_llvm_emit_streamout(struct si_shader_context
*ctx
,
2715 struct si_shader_output_values
*outputs
,
2716 unsigned noutput
, unsigned stream
)
2718 struct si_shader_selector
*sel
= ctx
->shader
->selector
;
2719 struct pipe_stream_output_info
*so
= &sel
->so
;
2720 LLVMBuilderRef builder
= ctx
->ac
.builder
;
2723 /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
2724 LLVMValueRef so_vtx_count
=
2725 si_unpack_param(ctx
, ctx
->param_streamout_config
, 16, 7);
2727 LLVMValueRef tid
= ac_get_thread_id(&ctx
->ac
);
2729 /* can_emit = tid < so_vtx_count; */
2730 LLVMValueRef can_emit
=
2731 LLVMBuildICmp(builder
, LLVMIntULT
, tid
, so_vtx_count
, "");
2733 /* Emit the streamout code conditionally. This actually avoids
2734 * out-of-bounds buffer access. The hw tells us via the SGPR
2735 * (so_vtx_count) which threads are allowed to emit streamout data. */
2736 ac_build_ifcc(&ctx
->ac
, can_emit
, 6501);
2738 /* The buffer offset is computed as follows:
2739 * ByteOffset = streamout_offset[buffer_id]*4 +
2740 * (streamout_write_index + thread_id)*stride[buffer_id] +
2744 LLVMValueRef so_write_index
=
2745 LLVMGetParam(ctx
->main_fn
,
2746 ctx
->param_streamout_write_index
);
2748 /* Compute (streamout_write_index + thread_id). */
2749 so_write_index
= LLVMBuildAdd(builder
, so_write_index
, tid
, "");
2751 /* Load the descriptor and compute the write offset for each
2752 * enabled buffer. */
2753 LLVMValueRef so_write_offset
[4] = {};
2754 LLVMValueRef so_buffers
[4];
2755 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
2756 ctx
->param_rw_buffers
);
2758 for (i
= 0; i
< 4; i
++) {
2762 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
,
2763 SI_VS_STREAMOUT_BUF0
+ i
, 0);
2765 so_buffers
[i
] = ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
2767 LLVMValueRef so_offset
= LLVMGetParam(ctx
->main_fn
,
2768 ctx
->param_streamout_offset
[i
]);
2769 so_offset
= LLVMBuildMul(builder
, so_offset
, LLVMConstInt(ctx
->i32
, 4, 0), "");
2771 so_write_offset
[i
] = ac_build_imad(&ctx
->ac
, so_write_index
,
2772 LLVMConstInt(ctx
->i32
, so
->stride
[i
]*4, 0),
2776 /* Write streamout data. */
2777 for (i
= 0; i
< so
->num_outputs
; i
++) {
2778 unsigned reg
= so
->output
[i
].register_index
;
2783 if (stream
!= so
->output
[i
].stream
)
2786 si_emit_streamout_output(ctx
, so_buffers
, so_write_offset
,
2787 &so
->output
[i
], &outputs
[reg
]);
2790 ac_build_endif(&ctx
->ac
, 6501);
2793 static void si_export_param(struct si_shader_context
*ctx
, unsigned index
,
2794 LLVMValueRef
*values
)
2796 struct ac_export_args args
;
2798 si_llvm_init_export_args(ctx
, values
,
2799 V_008DFC_SQ_EXP_PARAM
+ index
, &args
);
2800 ac_build_export(&ctx
->ac
, &args
);
2803 static void si_build_param_exports(struct si_shader_context
*ctx
,
2804 struct si_shader_output_values
*outputs
,
2807 struct si_shader
*shader
= ctx
->shader
;
2808 unsigned param_count
= 0;
2810 for (unsigned i
= 0; i
< noutput
; i
++) {
2811 unsigned semantic_name
= outputs
[i
].semantic_name
;
2812 unsigned semantic_index
= outputs
[i
].semantic_index
;
2814 if (outputs
[i
].vertex_stream
[0] != 0 &&
2815 outputs
[i
].vertex_stream
[1] != 0 &&
2816 outputs
[i
].vertex_stream
[2] != 0 &&
2817 outputs
[i
].vertex_stream
[3] != 0)
2820 switch (semantic_name
) {
2821 case TGSI_SEMANTIC_LAYER
:
2822 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2823 case TGSI_SEMANTIC_CLIPDIST
:
2824 case TGSI_SEMANTIC_COLOR
:
2825 case TGSI_SEMANTIC_BCOLOR
:
2826 case TGSI_SEMANTIC_PRIMID
:
2827 case TGSI_SEMANTIC_FOG
:
2828 case TGSI_SEMANTIC_TEXCOORD
:
2829 case TGSI_SEMANTIC_GENERIC
:
2835 if ((semantic_name
!= TGSI_SEMANTIC_GENERIC
||
2836 semantic_index
< SI_MAX_IO_GENERIC
) &&
2837 shader
->key
.opt
.kill_outputs
&
2838 (1ull << si_shader_io_get_unique_index(semantic_name
,
2839 semantic_index
, true)))
2842 si_export_param(ctx
, param_count
, outputs
[i
].values
);
2844 assert(i
< ARRAY_SIZE(shader
->info
.vs_output_param_offset
));
2845 shader
->info
.vs_output_param_offset
[i
] = param_count
++;
2848 shader
->info
.nr_param_exports
= param_count
;
2852 * Vertex color clamping.
2854 * This uses a state constant loaded in a user data SGPR and
2855 * an IF statement is added that clamps all colors if the constant
2858 static void si_vertex_color_clamping(struct si_shader_context
*ctx
,
2859 struct si_shader_output_values
*outputs
,
2862 LLVMValueRef addr
[SI_MAX_VS_OUTPUTS
][4];
2863 bool has_colors
= false;
2865 /* Store original colors to alloca variables. */
2866 for (unsigned i
= 0; i
< noutput
; i
++) {
2867 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2868 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2871 for (unsigned j
= 0; j
< 4; j
++) {
2872 addr
[i
][j
] = ac_build_alloca_undef(&ctx
->ac
, ctx
->f32
, "");
2873 LLVMBuildStore(ctx
->ac
.builder
, outputs
[i
].values
[j
], addr
[i
][j
]);
2881 /* The state is in the first bit of the user SGPR. */
2882 LLVMValueRef cond
= LLVMGetParam(ctx
->main_fn
, ctx
->param_vs_state_bits
);
2883 cond
= LLVMBuildTrunc(ctx
->ac
.builder
, cond
, ctx
->i1
, "");
2885 ac_build_ifcc(&ctx
->ac
, cond
, 6502);
2887 /* Store clamped colors to alloca variables within the conditional block. */
2888 for (unsigned i
= 0; i
< noutput
; i
++) {
2889 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2890 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2893 for (unsigned j
= 0; j
< 4; j
++) {
2894 LLVMBuildStore(ctx
->ac
.builder
,
2895 ac_build_clamp(&ctx
->ac
, outputs
[i
].values
[j
]),
2899 ac_build_endif(&ctx
->ac
, 6502);
2901 /* Load clamped colors */
2902 for (unsigned i
= 0; i
< noutput
; i
++) {
2903 if (outputs
[i
].semantic_name
!= TGSI_SEMANTIC_COLOR
&&
2904 outputs
[i
].semantic_name
!= TGSI_SEMANTIC_BCOLOR
)
2907 for (unsigned j
= 0; j
< 4; j
++) {
2908 outputs
[i
].values
[j
] =
2909 LLVMBuildLoad(ctx
->ac
.builder
, addr
[i
][j
], "");
2914 /* Generate export instructions for hardware VS shader stage or NGG GS stage
2915 * (position and parameter data only).
2917 void si_llvm_export_vs(struct si_shader_context
*ctx
,
2918 struct si_shader_output_values
*outputs
,
2921 struct si_shader
*shader
= ctx
->shader
;
2922 struct ac_export_args pos_args
[4] = {};
2923 LLVMValueRef psize_value
= NULL
, edgeflag_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
2927 si_vertex_color_clamping(ctx
, outputs
, noutput
);
2929 /* Build position exports. */
2930 for (i
= 0; i
< noutput
; i
++) {
2931 switch (outputs
[i
].semantic_name
) {
2932 case TGSI_SEMANTIC_POSITION
:
2933 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2934 V_008DFC_SQ_EXP_POS
, &pos_args
[0]);
2936 case TGSI_SEMANTIC_PSIZE
:
2937 psize_value
= outputs
[i
].values
[0];
2939 case TGSI_SEMANTIC_LAYER
:
2940 layer_value
= outputs
[i
].values
[0];
2942 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
2943 viewport_index_value
= outputs
[i
].values
[0];
2945 case TGSI_SEMANTIC_EDGEFLAG
:
2946 edgeflag_value
= outputs
[i
].values
[0];
2948 case TGSI_SEMANTIC_CLIPDIST
:
2949 if (!shader
->key
.opt
.clip_disable
) {
2950 unsigned index
= 2 + outputs
[i
].semantic_index
;
2951 si_llvm_init_export_args(ctx
, outputs
[i
].values
,
2952 V_008DFC_SQ_EXP_POS
+ index
,
2956 case TGSI_SEMANTIC_CLIPVERTEX
:
2957 if (!shader
->key
.opt
.clip_disable
) {
2958 si_llvm_emit_clipvertex(ctx
, pos_args
,
2965 /* We need to add the position output manually if it's missing. */
2966 if (!pos_args
[0].out
[0]) {
2967 pos_args
[0].enabled_channels
= 0xf; /* writemask */
2968 pos_args
[0].valid_mask
= 0; /* EXEC mask */
2969 pos_args
[0].done
= 0; /* last export? */
2970 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
2971 pos_args
[0].compr
= 0; /* COMPR flag */
2972 pos_args
[0].out
[0] = ctx
->ac
.f32_0
; /* X */
2973 pos_args
[0].out
[1] = ctx
->ac
.f32_0
; /* Y */
2974 pos_args
[0].out
[2] = ctx
->ac
.f32_0
; /* Z */
2975 pos_args
[0].out
[3] = ctx
->ac
.f32_1
; /* W */
2978 /* Write the misc vector (point size, edgeflag, layer, viewport). */
2979 if (shader
->selector
->info
.writes_psize
||
2980 shader
->selector
->pos_writes_edgeflag
||
2981 shader
->selector
->info
.writes_viewport_index
||
2982 shader
->selector
->info
.writes_layer
) {
2983 pos_args
[1].enabled_channels
= shader
->selector
->info
.writes_psize
|
2984 (shader
->selector
->pos_writes_edgeflag
<< 1) |
2985 (shader
->selector
->info
.writes_layer
<< 2);
2987 pos_args
[1].valid_mask
= 0; /* EXEC mask */
2988 pos_args
[1].done
= 0; /* last export? */
2989 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
2990 pos_args
[1].compr
= 0; /* COMPR flag */
2991 pos_args
[1].out
[0] = ctx
->ac
.f32_0
; /* X */
2992 pos_args
[1].out
[1] = ctx
->ac
.f32_0
; /* Y */
2993 pos_args
[1].out
[2] = ctx
->ac
.f32_0
; /* Z */
2994 pos_args
[1].out
[3] = ctx
->ac
.f32_0
; /* W */
2996 if (shader
->selector
->info
.writes_psize
)
2997 pos_args
[1].out
[0] = psize_value
;
2999 if (shader
->selector
->pos_writes_edgeflag
) {
3000 /* The output is a float, but the hw expects an integer
3001 * with the first bit containing the edge flag. */
3002 edgeflag_value
= LLVMBuildFPToUI(ctx
->ac
.builder
,
3005 edgeflag_value
= ac_build_umin(&ctx
->ac
,
3009 /* The LLVM intrinsic expects a float. */
3010 pos_args
[1].out
[1] = ac_to_float(&ctx
->ac
, edgeflag_value
);
3013 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3014 /* GFX9 has the layer in out.z[10:0] and the viewport
3015 * index in out.z[19:16].
3017 if (shader
->selector
->info
.writes_layer
)
3018 pos_args
[1].out
[2] = layer_value
;
3020 if (shader
->selector
->info
.writes_viewport_index
) {
3021 LLVMValueRef v
= viewport_index_value
;
3023 v
= ac_to_integer(&ctx
->ac
, v
);
3024 v
= LLVMBuildShl(ctx
->ac
.builder
, v
,
3025 LLVMConstInt(ctx
->i32
, 16, 0), "");
3026 v
= LLVMBuildOr(ctx
->ac
.builder
, v
,
3027 ac_to_integer(&ctx
->ac
, pos_args
[1].out
[2]), "");
3028 pos_args
[1].out
[2] = ac_to_float(&ctx
->ac
, v
);
3029 pos_args
[1].enabled_channels
|= 1 << 2;
3032 if (shader
->selector
->info
.writes_layer
)
3033 pos_args
[1].out
[2] = layer_value
;
3035 if (shader
->selector
->info
.writes_viewport_index
) {
3036 pos_args
[1].out
[3] = viewport_index_value
;
3037 pos_args
[1].enabled_channels
|= 1 << 3;
3042 for (i
= 0; i
< 4; i
++)
3043 if (pos_args
[i
].out
[0])
3044 shader
->info
.nr_pos_exports
++;
3046 /* Navi10-14 skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
3047 * Setting valid_mask=1 prevents it and has no other effect.
3049 if (ctx
->screen
->info
.family
== CHIP_NAVI10
||
3050 ctx
->screen
->info
.family
== CHIP_NAVI12
||
3051 ctx
->screen
->info
.family
== CHIP_NAVI14
)
3052 pos_args
[0].valid_mask
= 1;
3055 for (i
= 0; i
< 4; i
++) {
3056 if (!pos_args
[i
].out
[0])
3059 /* Specify the target we are exporting */
3060 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
3062 if (pos_idx
== shader
->info
.nr_pos_exports
)
3063 /* Specify that this is the last export */
3064 pos_args
[i
].done
= 1;
3066 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
3069 /* Build parameter exports. */
3070 si_build_param_exports(ctx
, outputs
, noutput
);
3074 * Forward all outputs from the vertex shader to the TES. This is only used
3075 * for the fixed function TCS.
3077 static void si_copy_tcs_inputs(struct lp_build_tgsi_context
*bld_base
)
3079 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3080 LLVMValueRef invocation_id
, buffer
, buffer_offset
;
3081 LLVMValueRef lds_vertex_stride
, lds_base
;
3084 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3085 buffer
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3086 buffer_offset
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3088 lds_vertex_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3089 lds_base
= get_tcs_in_current_patch_offset(ctx
);
3090 lds_base
= ac_build_imad(&ctx
->ac
, invocation_id
, lds_vertex_stride
,
3093 inputs
= ctx
->shader
->key
.mono
.u
.ff_tcs_inputs_to_copy
;
3095 unsigned i
= u_bit_scan64(&inputs
);
3097 LLVMValueRef lds_ptr
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3098 LLVMConstInt(ctx
->i32
, 4 * i
, 0),
3101 LLVMValueRef buffer_addr
= get_tcs_tes_buffer_address(ctx
,
3102 get_rel_patch_id(ctx
),
3104 LLVMConstInt(ctx
->i32
, i
, 0));
3106 LLVMValueRef value
= lshs_lds_load(bld_base
, ctx
->ac
.i32
, ~0, lds_ptr
);
3108 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, value
, 4, buffer_addr
,
3109 buffer_offset
, 0, ac_glc
, false);
3113 static void si_write_tess_factors(struct lp_build_tgsi_context
*bld_base
,
3114 LLVMValueRef rel_patch_id
,
3115 LLVMValueRef invocation_id
,
3116 LLVMValueRef tcs_out_current_patch_data_offset
,
3117 LLVMValueRef invoc0_tf_outer
[4],
3118 LLVMValueRef invoc0_tf_inner
[2])
3120 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3121 struct si_shader
*shader
= ctx
->shader
;
3122 unsigned tess_inner_index
, tess_outer_index
;
3123 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
3124 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
3125 unsigned stride
, outer_comps
, inner_comps
, i
, offset
;
3127 /* Add a barrier before loading tess factors from LDS. */
3128 if (!shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
)
3129 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
3131 /* Do this only for invocation 0, because the tess levels are per-patch,
3134 * This can't jump, because invocation 0 executes this. It should
3135 * at least mask out the loads and stores for other invocations.
3137 ac_build_ifcc(&ctx
->ac
,
3138 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3139 invocation_id
, ctx
->i32_0
, ""), 6503);
3141 /* Determine the layout of one tess factor element in the buffer. */
3142 switch (shader
->key
.part
.tcs
.epilog
.prim_mode
) {
3143 case PIPE_PRIM_LINES
:
3144 stride
= 2; /* 2 dwords, 1 vec2 store */
3148 case PIPE_PRIM_TRIANGLES
:
3149 stride
= 4; /* 4 dwords, 1 vec4 store */
3153 case PIPE_PRIM_QUADS
:
3154 stride
= 6; /* 6 dwords, 2 stores (vec4 + vec2) */
3163 for (i
= 0; i
< 4; i
++) {
3164 inner
[i
] = LLVMGetUndef(ctx
->i32
);
3165 outer
[i
] = LLVMGetUndef(ctx
->i32
);
3168 if (shader
->key
.part
.tcs
.epilog
.invoc0_tess_factors_are_def
) {
3169 /* Tess factors are in VGPRs. */
3170 for (i
= 0; i
< outer_comps
; i
++)
3171 outer
[i
] = out
[i
] = invoc0_tf_outer
[i
];
3172 for (i
= 0; i
< inner_comps
; i
++)
3173 inner
[i
] = out
[outer_comps
+i
] = invoc0_tf_inner
[i
];
3175 /* Load tess_inner and tess_outer from LDS.
3176 * Any invocation can write them, so we can't get them from a temporary.
3178 tess_inner_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSINNER
, 0);
3179 tess_outer_index
= si_shader_io_get_unique_index_patch(TGSI_SEMANTIC_TESSOUTER
, 0);
3181 lds_base
= tcs_out_current_patch_data_offset
;
3182 lds_inner
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3183 LLVMConstInt(ctx
->i32
,
3184 tess_inner_index
* 4, 0), "");
3185 lds_outer
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
,
3186 LLVMConstInt(ctx
->i32
,
3187 tess_outer_index
* 4, 0), "");
3189 for (i
= 0; i
< outer_comps
; i
++) {
3191 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_outer
);
3193 for (i
= 0; i
< inner_comps
; i
++) {
3194 inner
[i
] = out
[outer_comps
+i
] =
3195 lshs_lds_load(bld_base
, ctx
->ac
.i32
, i
, lds_inner
);
3199 if (shader
->key
.part
.tcs
.epilog
.prim_mode
== PIPE_PRIM_LINES
) {
3200 /* For isolines, the hardware expects tess factors in the
3201 * reverse order from what GLSL / TGSI specify.
3203 LLVMValueRef tmp
= out
[0];
3208 /* Convert the outputs to vectors for stores. */
3209 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
3213 vec1
= ac_build_gather_values(&ctx
->ac
, out
+4, stride
- 4);
3215 /* Get the buffer. */
3216 buffer
= get_tess_ring_descriptor(ctx
, TCS_FACTOR_RING
);
3218 /* Get the offset. */
3219 tf_base
= LLVMGetParam(ctx
->main_fn
,
3220 ctx
->param_tcs_factor_offset
);
3221 byteoffset
= LLVMBuildMul(ctx
->ac
.builder
, rel_patch_id
,
3222 LLVMConstInt(ctx
->i32
, 4 * stride
, 0), "");
3224 ac_build_ifcc(&ctx
->ac
,
3225 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntEQ
,
3226 rel_patch_id
, ctx
->i32_0
, ""), 6504);
3228 /* Store the dynamic HS control word. */
3230 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
3231 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
3232 LLVMConstInt(ctx
->i32
, 0x80000000, 0),
3233 1, ctx
->i32_0
, tf_base
,
3234 offset
, ac_glc
, false);
3238 ac_build_endif(&ctx
->ac
, 6504);
3240 /* Store the tessellation factors. */
3241 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
3242 MIN2(stride
, 4), byteoffset
, tf_base
,
3243 offset
, ac_glc
, false);
3246 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
3247 stride
- 4, byteoffset
, tf_base
,
3248 offset
, ac_glc
, false);
3250 /* Store the tess factors into the offchip buffer if TES reads them. */
3251 if (shader
->key
.part
.tcs
.epilog
.tes_reads_tess_factors
) {
3252 LLVMValueRef buf
, base
, inner_vec
, outer_vec
, tf_outer_offset
;
3253 LLVMValueRef tf_inner_offset
;
3254 unsigned param_outer
, param_inner
;
3256 buf
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TCS
);
3257 base
= LLVMGetParam(ctx
->main_fn
, ctx
->param_tcs_offchip_offset
);
3259 param_outer
= si_shader_io_get_unique_index_patch(
3260 TGSI_SEMANTIC_TESSOUTER
, 0);
3261 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3262 LLVMConstInt(ctx
->i32
, param_outer
, 0));
3264 unsigned outer_vec_size
=
3265 ac_has_vec3_support(ctx
->screen
->info
.chip_class
, false) ?
3266 outer_comps
: util_next_power_of_two(outer_comps
);
3267 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
, outer_vec_size
);
3269 ac_build_buffer_store_dword(&ctx
->ac
, buf
, outer_vec
,
3270 outer_comps
, tf_outer_offset
,
3271 base
, 0, ac_glc
, false);
3273 param_inner
= si_shader_io_get_unique_index_patch(
3274 TGSI_SEMANTIC_TESSINNER
, 0);
3275 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, rel_patch_id
, NULL
,
3276 LLVMConstInt(ctx
->i32
, param_inner
, 0));
3278 inner_vec
= inner_comps
== 1 ? inner
[0] :
3279 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
3280 ac_build_buffer_store_dword(&ctx
->ac
, buf
, inner_vec
,
3281 inner_comps
, tf_inner_offset
,
3282 base
, 0, ac_glc
, false);
3286 ac_build_endif(&ctx
->ac
, 6503);
3290 si_insert_input_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3291 unsigned param
, unsigned return_index
)
3293 return LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3294 LLVMGetParam(ctx
->main_fn
, param
),
3299 si_insert_input_ret_float(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3300 unsigned param
, unsigned return_index
)
3302 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3303 LLVMValueRef p
= LLVMGetParam(ctx
->main_fn
, param
);
3305 return LLVMBuildInsertValue(builder
, ret
,
3306 ac_to_float(&ctx
->ac
, p
),
3311 si_insert_input_ptr(struct si_shader_context
*ctx
, LLVMValueRef ret
,
3312 unsigned param
, unsigned return_index
)
3314 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3315 LLVMValueRef ptr
= LLVMGetParam(ctx
->main_fn
, param
);
3316 ptr
= LLVMBuildPtrToInt(builder
, ptr
, ctx
->i32
, "");
3317 return LLVMBuildInsertValue(builder
, ret
, ptr
, return_index
, "");
3320 /* This only writes the tessellation factor levels. */
3321 static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi
*abi
,
3322 unsigned max_outputs
,
3323 LLVMValueRef
*addrs
)
3325 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3326 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
3327 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3328 LLVMValueRef rel_patch_id
, invocation_id
, tf_lds_offset
;
3330 si_copy_tcs_inputs(bld_base
);
3332 rel_patch_id
= get_rel_patch_id(ctx
);
3333 invocation_id
= unpack_llvm_param(ctx
, ctx
->abi
.tcs_rel_ids
, 8, 5);
3334 tf_lds_offset
= get_tcs_out_current_patch_data_offset(ctx
);
3336 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3337 LLVMBasicBlockRef blocks
[2] = {
3338 LLVMGetInsertBlock(builder
),
3339 ctx
->merged_wrap_if_entry_block
3341 LLVMValueRef values
[2];
3343 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3345 values
[0] = rel_patch_id
;
3346 values
[1] = LLVMGetUndef(ctx
->i32
);
3347 rel_patch_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3349 values
[0] = tf_lds_offset
;
3350 values
[1] = LLVMGetUndef(ctx
->i32
);
3351 tf_lds_offset
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3353 values
[0] = invocation_id
;
3354 values
[1] = ctx
->i32_1
; /* cause the epilog to skip threads */
3355 invocation_id
= ac_build_phi(&ctx
->ac
, ctx
->i32
, 2, values
, blocks
);
3358 /* Return epilog parameters from this function. */
3359 LLVMValueRef ret
= ctx
->return_value
;
3362 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3363 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3364 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3365 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3366 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3367 /* Tess offchip and tess factor offsets are at the beginning. */
3368 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3369 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3370 vgpr
= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
+ 1;
3372 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3373 GFX6_SGPR_TCS_OFFCHIP_LAYOUT
);
3374 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3375 GFX6_SGPR_TCS_OUT_LAYOUT
);
3376 /* Tess offchip and tess factor offsets are after user SGPRs. */
3377 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
,
3378 GFX6_TCS_NUM_USER_SGPR
);
3379 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
,
3380 GFX6_TCS_NUM_USER_SGPR
+ 1);
3381 vgpr
= GFX6_TCS_NUM_USER_SGPR
+ 2;
3385 rel_patch_id
= ac_to_float(&ctx
->ac
, rel_patch_id
);
3386 invocation_id
= ac_to_float(&ctx
->ac
, invocation_id
);
3387 tf_lds_offset
= ac_to_float(&ctx
->ac
, tf_lds_offset
);
3389 /* Leave a hole corresponding to the two input VGPRs. This ensures that
3390 * the invocation_id output does not alias the tcs_rel_ids input,
3391 * which saves a V_MOV on gfx9.
3395 ret
= LLVMBuildInsertValue(builder
, ret
, rel_patch_id
, vgpr
++, "");
3396 ret
= LLVMBuildInsertValue(builder
, ret
, invocation_id
, vgpr
++, "");
3398 if (ctx
->shader
->selector
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
3399 vgpr
++; /* skip the tess factor LDS offset */
3400 for (unsigned i
= 0; i
< 6; i
++) {
3401 LLVMValueRef value
=
3402 LLVMBuildLoad(builder
, ctx
->invoc0_tess_factors
[i
], "");
3403 value
= ac_to_float(&ctx
->ac
, value
);
3404 ret
= LLVMBuildInsertValue(builder
, ret
, value
, vgpr
++, "");
3407 ret
= LLVMBuildInsertValue(builder
, ret
, tf_lds_offset
, vgpr
++, "");
3409 ctx
->return_value
= ret
;
3412 /* Pass TCS inputs from LS to TCS on GFX9. */
3413 static void si_set_ls_return_value_for_tcs(struct si_shader_context
*ctx
)
3415 LLVMValueRef ret
= ctx
->return_value
;
3417 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3418 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3419 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_offset
, 2);
3420 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3421 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_factor_offset
, 4);
3422 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3424 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3425 8 + SI_SGPR_RW_BUFFERS
);
3426 ret
= si_insert_input_ptr(ctx
, ret
,
3427 ctx
->param_bindless_samplers_and_images
,
3428 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3430 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_vs_state_bits
,
3431 8 + SI_SGPR_VS_STATE_BITS
);
3433 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_offchip_layout
,
3434 8 + GFX9_SGPR_TCS_OFFCHIP_LAYOUT
);
3435 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_offsets
,
3436 8 + GFX9_SGPR_TCS_OUT_OFFSETS
);
3437 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_tcs_out_lds_layout
,
3438 8 + GFX9_SGPR_TCS_OUT_LAYOUT
);
3440 unsigned vgpr
= 8 + GFX9_TCS_NUM_USER_SGPR
;
3441 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3442 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_patch_id
),
3444 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
3445 ac_to_float(&ctx
->ac
, ctx
->abi
.tcs_rel_ids
),
3447 ctx
->return_value
= ret
;
3450 /* Pass GS inputs from ES to GS on GFX9. */
3451 static void si_set_es_return_value_for_gs(struct si_shader_context
*ctx
)
3453 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3454 LLVMValueRef ret
= ctx
->return_value
;
3456 ret
= si_insert_input_ptr(ctx
, ret
, 0, 0);
3457 ret
= si_insert_input_ptr(ctx
, ret
, 1, 1);
3458 if (ctx
->shader
->key
.as_ngg
)
3459 ret
= LLVMBuildInsertValue(builder
, ret
, ctx
->gs_tg_info
, 2, "");
3461 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_gs2vs_offset
, 2);
3462 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_wave_info
, 3);
3463 ret
= si_insert_input_ret(ctx
, ret
, ctx
->param_merged_scratch_offset
, 5);
3465 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_rw_buffers
,
3466 8 + SI_SGPR_RW_BUFFERS
);
3467 ret
= si_insert_input_ptr(ctx
, ret
,
3468 ctx
->param_bindless_samplers_and_images
,
3469 8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES
);
3470 if (ctx
->screen
->use_ngg
) {
3471 ret
= si_insert_input_ptr(ctx
, ret
, ctx
->param_vs_state_bits
,
3472 8 + SI_SGPR_VS_STATE_BITS
);
3476 if (ctx
->type
== PIPE_SHADER_VERTEX
)
3477 vgpr
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
3479 vgpr
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
3481 for (unsigned i
= 0; i
< 5; i
++) {
3482 unsigned param
= ctx
->param_gs_vtx01_offset
+ i
;
3483 ret
= si_insert_input_ret_float(ctx
, ret
, param
, vgpr
++);
3485 ctx
->return_value
= ret
;
3488 static void si_llvm_emit_ls_epilogue(struct ac_shader_abi
*abi
,
3489 unsigned max_outputs
,
3490 LLVMValueRef
*addrs
)
3492 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3493 struct si_shader
*shader
= ctx
->shader
;
3494 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3496 LLVMValueRef vertex_id
= LLVMGetParam(ctx
->main_fn
,
3497 ctx
->param_rel_auto_id
);
3498 LLVMValueRef vertex_dw_stride
= get_tcs_in_vertex_dw_stride(ctx
);
3499 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->ac
.builder
, vertex_id
,
3500 vertex_dw_stride
, "");
3502 /* Write outputs to LDS. The next shader (TCS aka HS) will read
3503 * its inputs from it. */
3504 for (i
= 0; i
< info
->num_outputs
; i
++) {
3505 unsigned name
= info
->output_semantic_name
[i
];
3506 unsigned index
= info
->output_semantic_index
[i
];
3508 /* The ARB_shader_viewport_layer_array spec contains the
3511 * 2) What happens if gl_ViewportIndex or gl_Layer is
3512 * written in the vertex shader and a geometry shader is
3515 * RESOLVED: The value written by the last vertex processing
3516 * stage is used. If the last vertex processing stage
3517 * (vertex, tessellation evaluation or geometry) does not
3518 * statically assign to gl_ViewportIndex or gl_Layer, index
3519 * or layer zero is assumed.
3521 * So writes to those outputs in VS-as-LS are simply ignored.
3523 if (name
== TGSI_SEMANTIC_LAYER
||
3524 name
== TGSI_SEMANTIC_VIEWPORT_INDEX
)
3527 int param
= si_shader_io_get_unique_index(name
, index
, false);
3528 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->ac
.builder
, base_dw_addr
,
3529 LLVMConstInt(ctx
->i32
, param
* 4, 0), "");
3531 for (chan
= 0; chan
< 4; chan
++) {
3532 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3535 lshs_lds_store(ctx
, chan
, dw_addr
,
3536 LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], ""));
3540 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3541 si_set_ls_return_value_for_tcs(ctx
);
3544 static void si_llvm_emit_es_epilogue(struct ac_shader_abi
*abi
,
3545 unsigned max_outputs
,
3546 LLVMValueRef
*addrs
)
3548 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3549 struct si_shader
*es
= ctx
->shader
;
3550 struct tgsi_shader_info
*info
= &es
->selector
->info
;
3551 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
3552 ctx
->param_es2gs_offset
);
3553 LLVMValueRef lds_base
= NULL
;
3557 if (ctx
->screen
->info
.chip_class
>= GFX9
&& info
->num_outputs
) {
3558 unsigned itemsize_dw
= es
->selector
->esgs_itemsize
/ 4;
3559 LLVMValueRef vertex_idx
= ac_get_thread_id(&ctx
->ac
);
3560 LLVMValueRef wave_idx
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 24, 4);
3561 vertex_idx
= LLVMBuildOr(ctx
->ac
.builder
, vertex_idx
,
3562 LLVMBuildMul(ctx
->ac
.builder
, wave_idx
,
3563 LLVMConstInt(ctx
->i32
, ctx
->ac
.wave_size
, false), ""), "");
3564 lds_base
= LLVMBuildMul(ctx
->ac
.builder
, vertex_idx
,
3565 LLVMConstInt(ctx
->i32
, itemsize_dw
, 0), "");
3568 for (i
= 0; i
< info
->num_outputs
; i
++) {
3571 if (info
->output_semantic_name
[i
] == TGSI_SEMANTIC_VIEWPORT_INDEX
||
3572 info
->output_semantic_name
[i
] == TGSI_SEMANTIC_LAYER
)
3575 param
= si_shader_io_get_unique_index(info
->output_semantic_name
[i
],
3576 info
->output_semantic_index
[i
], false);
3578 for (chan
= 0; chan
< 4; chan
++) {
3579 if (!(info
->output_usagemask
[i
] & (1 << chan
)))
3582 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3583 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
3585 /* GFX9 has the ESGS ring in LDS. */
3586 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
3587 LLVMValueRef idx
= LLVMConstInt(ctx
->i32
, param
* 4 + chan
, false);
3588 idx
= LLVMBuildAdd(ctx
->ac
.builder
, lds_base
, idx
, "");
3589 ac_build_indexed_store(&ctx
->ac
, ctx
->esgs_ring
, idx
, out_val
);
3593 ac_build_buffer_store_dword(&ctx
->ac
,
3595 out_val
, 1, NULL
, soffset
,
3596 (4 * param
+ chan
) * 4,
3597 ac_glc
| ac_slc
, true);
3601 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3602 si_set_es_return_value_for_gs(ctx
);
3605 static LLVMValueRef
si_get_gs_wave_id(struct si_shader_context
*ctx
)
3607 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3608 return si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 16, 8);
3610 return LLVMGetParam(ctx
->main_fn
, ctx
->param_gs_wave_id
);
3613 static void emit_gs_epilogue(struct si_shader_context
*ctx
)
3615 if (ctx
->shader
->key
.as_ngg
) {
3616 gfx10_ngg_gs_emit_epilogue(ctx
);
3620 if (ctx
->screen
->info
.chip_class
>= GFX10
)
3621 LLVMBuildFence(ctx
->ac
.builder
, LLVMAtomicOrderingRelease
, false, "");
3623 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
,
3624 si_get_gs_wave_id(ctx
));
3626 if (ctx
->screen
->info
.chip_class
>= GFX9
)
3627 ac_build_endif(&ctx
->ac
, ctx
->merged_wrap_if_label
);
3630 static void si_llvm_emit_gs_epilogue(struct ac_shader_abi
*abi
,
3631 unsigned max_outputs
,
3632 LLVMValueRef
*addrs
)
3634 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3635 struct tgsi_shader_info UNUSED
*info
= &ctx
->shader
->selector
->info
;
3637 assert(info
->num_outputs
<= max_outputs
);
3639 emit_gs_epilogue(ctx
);
3642 static void si_tgsi_emit_gs_epilogue(struct lp_build_tgsi_context
*bld_base
)
3644 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3645 emit_gs_epilogue(ctx
);
3648 static void si_llvm_emit_vs_epilogue(struct ac_shader_abi
*abi
,
3649 unsigned max_outputs
,
3650 LLVMValueRef
*addrs
)
3652 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3653 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3654 struct si_shader_output_values
*outputs
= NULL
;
3657 assert(!ctx
->shader
->is_gs_copy_shader
);
3658 assert(info
->num_outputs
<= max_outputs
);
3660 outputs
= MALLOC((info
->num_outputs
+ 1) * sizeof(outputs
[0]));
3662 for (i
= 0; i
< info
->num_outputs
; i
++) {
3663 outputs
[i
].semantic_name
= info
->output_semantic_name
[i
];
3664 outputs
[i
].semantic_index
= info
->output_semantic_index
[i
];
3666 for (j
= 0; j
< 4; j
++) {
3667 outputs
[i
].values
[j
] =
3668 LLVMBuildLoad(ctx
->ac
.builder
,
3671 outputs
[i
].vertex_stream
[j
] =
3672 (info
->output_streams
[i
] >> (2 * j
)) & 3;
3676 if (!ctx
->screen
->use_ngg_streamout
&&
3677 ctx
->shader
->selector
->so
.num_outputs
)
3678 si_llvm_emit_streamout(ctx
, outputs
, i
, 0);
3680 /* Export PrimitiveID. */
3681 if (ctx
->shader
->key
.mono
.u
.vs_export_prim_id
) {
3682 outputs
[i
].semantic_name
= TGSI_SEMANTIC_PRIMID
;
3683 outputs
[i
].semantic_index
= 0;
3684 outputs
[i
].values
[0] = ac_to_float(&ctx
->ac
, si_get_primitive_id(ctx
, 0));
3685 for (j
= 1; j
< 4; j
++)
3686 outputs
[i
].values
[j
] = LLVMConstReal(ctx
->f32
, 0);
3688 memset(outputs
[i
].vertex_stream
, 0,
3689 sizeof(outputs
[i
].vertex_stream
));
3693 si_llvm_export_vs(ctx
, outputs
, i
);
3697 static void si_llvm_emit_prim_discard_cs_epilogue(struct ac_shader_abi
*abi
,
3698 unsigned max_outputs
,
3699 LLVMValueRef
*addrs
)
3701 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3702 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
3703 LLVMValueRef pos
[4] = {};
3705 assert(info
->num_outputs
<= max_outputs
);
3707 for (unsigned i
= 0; i
< info
->num_outputs
; i
++) {
3708 if (info
->output_semantic_name
[i
] != TGSI_SEMANTIC_POSITION
)
3711 for (unsigned chan
= 0; chan
< 4; chan
++)
3712 pos
[chan
] = LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
3715 assert(pos
[0] != NULL
);
3717 /* Return the position output. */
3718 LLVMValueRef ret
= ctx
->return_value
;
3719 for (unsigned chan
= 0; chan
< 4; chan
++)
3720 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, pos
[chan
], chan
, "");
3721 ctx
->return_value
= ret
;
3724 static void si_tgsi_emit_epilogue(struct lp_build_tgsi_context
*bld_base
)
3726 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3728 ctx
->abi
.emit_outputs(&ctx
->abi
, RADEON_LLVM_MAX_OUTPUTS
,
3729 &ctx
->outputs
[0][0]);
3732 struct si_ps_exports
{
3734 struct ac_export_args args
[10];
3737 static void si_export_mrt_z(struct lp_build_tgsi_context
*bld_base
,
3738 LLVMValueRef depth
, LLVMValueRef stencil
,
3739 LLVMValueRef samplemask
, struct si_ps_exports
*exp
)
3741 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3742 struct ac_export_args args
;
3744 ac_export_mrt_z(&ctx
->ac
, depth
, stencil
, samplemask
, &args
);
3746 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3749 static void si_export_mrt_color(struct lp_build_tgsi_context
*bld_base
,
3750 LLVMValueRef
*color
, unsigned index
,
3751 unsigned samplemask_param
,
3752 bool is_last
, struct si_ps_exports
*exp
)
3754 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3758 if (ctx
->shader
->key
.part
.ps
.epilog
.clamp_color
)
3759 for (i
= 0; i
< 4; i
++)
3760 color
[i
] = ac_build_clamp(&ctx
->ac
, color
[i
]);
3763 if (ctx
->shader
->key
.part
.ps
.epilog
.alpha_to_one
)
3764 color
[3] = ctx
->ac
.f32_1
;
3768 ctx
->shader
->key
.part
.ps
.epilog
.alpha_func
!= PIPE_FUNC_ALWAYS
)
3769 si_alpha_test(bld_base
, color
[3]);
3771 /* Line & polygon smoothing */
3772 if (ctx
->shader
->key
.part
.ps
.epilog
.poly_line_smoothing
)
3773 color
[3] = si_scale_alpha_by_sample_mask(bld_base
, color
[3],
3776 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
3777 if (ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
> 0) {
3778 struct ac_export_args args
[8];
3781 /* Get the export arguments, also find out what the last one is. */
3782 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3783 si_llvm_init_export_args(ctx
, color
,
3784 V_008DFC_SQ_EXP_MRT
+ c
, &args
[c
]);
3785 if (args
[c
].enabled_channels
)
3789 /* Emit all exports. */
3790 for (c
= 0; c
<= ctx
->shader
->key
.part
.ps
.epilog
.last_cbuf
; c
++) {
3791 if (is_last
&& last
== c
) {
3792 args
[c
].valid_mask
= 1; /* whether the EXEC mask is valid */
3793 args
[c
].done
= 1; /* DONE bit */
3794 } else if (!args
[c
].enabled_channels
)
3795 continue; /* unnecessary NULL export */
3797 memcpy(&exp
->args
[exp
->num
++], &args
[c
], sizeof(args
[c
]));
3800 struct ac_export_args args
;
3803 si_llvm_init_export_args(ctx
, color
, V_008DFC_SQ_EXP_MRT
+ index
,
3806 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
3807 args
.done
= 1; /* DONE bit */
3808 } else if (!args
.enabled_channels
)
3809 return; /* unnecessary NULL export */
3811 memcpy(&exp
->args
[exp
->num
++], &args
, sizeof(args
));
3815 static void si_emit_ps_exports(struct si_shader_context
*ctx
,
3816 struct si_ps_exports
*exp
)
3818 for (unsigned i
= 0; i
< exp
->num
; i
++)
3819 ac_build_export(&ctx
->ac
, &exp
->args
[i
]);
3823 * Return PS outputs in this order:
3825 * v[0:3] = color0.xyzw
3826 * v[4:7] = color1.xyzw
3831 * vN+3 = SampleMaskIn (used for OpenGL smoothing)
3833 * The alpha-ref SGPR is returned via its original location.
3835 static void si_llvm_return_fs_outputs(struct ac_shader_abi
*abi
,
3836 unsigned max_outputs
,
3837 LLVMValueRef
*addrs
)
3839 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
3840 struct si_shader
*shader
= ctx
->shader
;
3841 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3842 LLVMBuilderRef builder
= ctx
->ac
.builder
;
3843 unsigned i
, j
, first_vgpr
, vgpr
;
3845 LLVMValueRef color
[8][4] = {};
3846 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
3849 if (ctx
->postponed_kill
)
3850 ac_build_kill_if_false(&ctx
->ac
, LLVMBuildLoad(builder
, ctx
->postponed_kill
, ""));
3852 /* Read the output values. */
3853 for (i
= 0; i
< info
->num_outputs
; i
++) {
3854 unsigned semantic_name
= info
->output_semantic_name
[i
];
3855 unsigned semantic_index
= info
->output_semantic_index
[i
];
3857 switch (semantic_name
) {
3858 case TGSI_SEMANTIC_COLOR
:
3859 assert(semantic_index
< 8);
3860 for (j
= 0; j
< 4; j
++) {
3861 LLVMValueRef ptr
= addrs
[4 * i
+ j
];
3862 LLVMValueRef result
= LLVMBuildLoad(builder
, ptr
, "");
3863 color
[semantic_index
][j
] = result
;
3866 case TGSI_SEMANTIC_POSITION
:
3867 depth
= LLVMBuildLoad(builder
,
3868 addrs
[4 * i
+ 2], "");
3870 case TGSI_SEMANTIC_STENCIL
:
3871 stencil
= LLVMBuildLoad(builder
,
3872 addrs
[4 * i
+ 1], "");
3874 case TGSI_SEMANTIC_SAMPLEMASK
:
3875 samplemask
= LLVMBuildLoad(builder
,
3876 addrs
[4 * i
+ 0], "");
3879 fprintf(stderr
, "Warning: GFX6 unhandled fs output type:%d\n",
3884 /* Fill the return structure. */
3885 ret
= ctx
->return_value
;
3888 ret
= LLVMBuildInsertValue(builder
, ret
,
3889 ac_to_integer(&ctx
->ac
,
3890 LLVMGetParam(ctx
->main_fn
,
3891 SI_PARAM_ALPHA_REF
)),
3892 SI_SGPR_ALPHA_REF
, "");
3895 first_vgpr
= vgpr
= SI_SGPR_ALPHA_REF
+ 1;
3896 for (i
= 0; i
< ARRAY_SIZE(color
); i
++) {
3900 for (j
= 0; j
< 4; j
++)
3901 ret
= LLVMBuildInsertValue(builder
, ret
, color
[i
][j
], vgpr
++, "");
3904 ret
= LLVMBuildInsertValue(builder
, ret
, depth
, vgpr
++, "");
3906 ret
= LLVMBuildInsertValue(builder
, ret
, stencil
, vgpr
++, "");
3908 ret
= LLVMBuildInsertValue(builder
, ret
, samplemask
, vgpr
++, "");
3910 /* Add the input sample mask for smoothing at the end. */
3911 if (vgpr
< first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
)
3912 vgpr
= first_vgpr
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
;
3913 ret
= LLVMBuildInsertValue(builder
, ret
,
3914 LLVMGetParam(ctx
->main_fn
,
3915 SI_PARAM_SAMPLE_COVERAGE
), vgpr
++, "");
3917 ctx
->return_value
= ret
;
3920 static void membar_emit(
3921 const struct lp_build_tgsi_action
*action
,
3922 struct lp_build_tgsi_context
*bld_base
,
3923 struct lp_build_emit_data
*emit_data
)
3925 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3926 LLVMValueRef src0
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, 0);
3927 unsigned flags
= LLVMConstIntGetZExtValue(src0
);
3928 unsigned wait_flags
= 0;
3930 if (flags
& TGSI_MEMBAR_THREAD_GROUP
)
3931 wait_flags
|= AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3933 if (flags
& (TGSI_MEMBAR_ATOMIC_BUFFER
|
3934 TGSI_MEMBAR_SHADER_BUFFER
|
3935 TGSI_MEMBAR_SHADER_IMAGE
))
3936 wait_flags
|= AC_WAIT_VLOAD
| AC_WAIT_VSTORE
;
3938 if (flags
& TGSI_MEMBAR_SHARED
)
3939 wait_flags
|= AC_WAIT_LGKM
;
3941 ac_build_waitcnt(&ctx
->ac
, wait_flags
);
3944 static void clock_emit(
3945 const struct lp_build_tgsi_action
*action
,
3946 struct lp_build_tgsi_context
*bld_base
,
3947 struct lp_build_emit_data
*emit_data
)
3949 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3950 LLVMValueRef tmp
= ac_build_shader_clock(&ctx
->ac
);
3952 emit_data
->output
[0] =
3953 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_0
, "");
3954 emit_data
->output
[1] =
3955 LLVMBuildExtractElement(ctx
->ac
.builder
, tmp
, ctx
->i32_1
, "");
3958 static void si_llvm_emit_ddxy(
3959 const struct lp_build_tgsi_action
*action
,
3960 struct lp_build_tgsi_context
*bld_base
,
3961 struct lp_build_emit_data
*emit_data
)
3963 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3964 unsigned opcode
= emit_data
->info
->opcode
;
3969 if (opcode
== TGSI_OPCODE_DDX_FINE
)
3970 mask
= AC_TID_MASK_LEFT
;
3971 else if (opcode
== TGSI_OPCODE_DDY_FINE
)
3972 mask
= AC_TID_MASK_TOP
;
3974 mask
= AC_TID_MASK_TOP_LEFT
;
3976 /* for DDX we want to next X pixel, DDY next Y pixel. */
3977 idx
= (opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
) ? 1 : 2;
3979 val
= ac_to_integer(&ctx
->ac
, emit_data
->args
[0]);
3980 val
= ac_build_ddxy(&ctx
->ac
, mask
, idx
, val
);
3981 emit_data
->output
[emit_data
->chan
] = val
;
3984 static void build_interp_intrinsic(const struct lp_build_tgsi_action
*action
,
3985 struct lp_build_tgsi_context
*bld_base
,
3986 struct lp_build_emit_data
*emit_data
)
3988 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
3989 struct si_shader
*shader
= ctx
->shader
;
3990 const struct tgsi_shader_info
*info
= &shader
->selector
->info
;
3991 LLVMValueRef interp_param
;
3992 const struct tgsi_full_instruction
*inst
= emit_data
->inst
;
3993 const struct tgsi_full_src_register
*input
= &inst
->Src
[0];
3994 int input_base
, input_array_size
;
3997 LLVMValueRef prim_mask
= ctx
->abi
.prim_mask
;
3998 LLVMValueRef array_idx
, offset_x
= NULL
, offset_y
= NULL
;
3999 int interp_param_idx
;
4003 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
) {
4004 /* offset is in second src, first two channels */
4005 offset_x
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4007 offset_y
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 1,
4009 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4010 LLVMValueRef sample_position
;
4011 LLVMValueRef sample_id
;
4012 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
4014 /* fetch sample ID, then fetch its sample position,
4015 * and place into first two channels.
4017 sample_id
= lp_build_emit_fetch(bld_base
,
4018 emit_data
->inst
, 1, TGSI_CHAN_X
);
4019 sample_id
= ac_to_integer(&ctx
->ac
, sample_id
);
4021 /* Section 8.13.2 (Interpolation Functions) of the OpenGL Shading
4022 * Language 4.50 spec says about interpolateAtSample:
4024 * "Returns the value of the input interpolant variable at
4025 * the location of sample number sample. If multisample
4026 * buffers are not available, the input variable will be
4027 * evaluated at the center of the pixel. If sample sample
4028 * does not exist, the position used to interpolate the
4029 * input variable is undefined."
4031 * This means that sample_id values outside of the valid are
4032 * in fact valid input, and the usual mechanism for loading the
4033 * sample position doesn't work.
4035 if (ctx
->shader
->key
.mono
.u
.ps
.interpolate_at_sample_force_center
) {
4036 LLVMValueRef center
[4] = {
4037 LLVMConstReal(ctx
->f32
, 0.5),
4038 LLVMConstReal(ctx
->f32
, 0.5),
4043 sample_position
= ac_build_gather_values(&ctx
->ac
, center
, 4);
4045 sample_position
= load_sample_position(&ctx
->abi
, sample_id
);
4048 offset_x
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4051 offset_x
= LLVMBuildFSub(ctx
->ac
.builder
, offset_x
, halfval
, "");
4052 offset_y
= LLVMBuildExtractElement(ctx
->ac
.builder
, sample_position
,
4054 offset_y
= LLVMBuildFSub(ctx
->ac
.builder
, offset_y
, halfval
, "");
4057 assert(input
->Register
.File
== TGSI_FILE_INPUT
);
4059 if (input
->Register
.Indirect
) {
4060 unsigned array_id
= input
->Indirect
.ArrayID
;
4063 input_base
= info
->input_array_first
[array_id
];
4064 input_array_size
= info
->input_array_last
[array_id
] - input_base
+ 1;
4066 input_base
= inst
->Src
[0].Register
.Index
;
4067 input_array_size
= info
->num_inputs
- input_base
;
4070 array_idx
= si_get_indirect_index(ctx
, &input
->Indirect
,
4071 1, input
->Register
.Index
- input_base
);
4073 input_base
= inst
->Src
[0].Register
.Index
;
4074 input_array_size
= 1;
4075 array_idx
= ctx
->i32_0
;
4078 interp
= shader
->selector
->info
.input_interpolate
[input_base
];
4080 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4081 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
)
4082 location
= TGSI_INTERPOLATE_LOC_CENTER
;
4084 location
= TGSI_INTERPOLATE_LOC_CENTROID
;
4086 interp_param_idx
= lookup_interp_param_index(interp
, location
);
4087 if (interp_param_idx
== -1)
4089 else if (interp_param_idx
)
4090 interp_param
= LLVMGetParam(ctx
->main_fn
, interp_param_idx
);
4092 interp_param
= NULL
;
4094 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
4095 inst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
4096 LLVMValueRef ij_out
[2];
4097 LLVMValueRef ddxy_out
= ac_build_ddxy_interp(&ctx
->ac
, interp_param
);
4100 * take the I then J parameters, and the DDX/Y for it, and
4101 * calculate the IJ inputs for the interpolator.
4102 * temp1 = ddx * offset/sample.x + I;
4103 * interp_param.I = ddy * offset/sample.y + temp1;
4104 * temp1 = ddx * offset/sample.x + J;
4105 * interp_param.J = ddy * offset/sample.y + temp1;
4107 for (i
= 0; i
< 2; i
++) {
4108 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, 0);
4109 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, 0);
4110 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4111 ddxy_out
, ix_ll
, "");
4112 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4113 ddxy_out
, iy_ll
, "");
4114 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->ac
.builder
,
4115 interp_param
, ix_ll
, "");
4118 interp_el
= ac_to_float(&ctx
->ac
, interp_el
);
4120 temp
= ac_build_fmad(&ctx
->ac
, ddx_el
, offset_x
, interp_el
);
4121 ij_out
[i
] = ac_build_fmad(&ctx
->ac
, ddy_el
, offset_y
, temp
);
4123 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
4127 interp_param
= ac_to_float(&ctx
->ac
, interp_param
);
4129 for (chan
= 0; chan
< 4; chan
++) {
4130 LLVMValueRef gather
= LLVMGetUndef(LLVMVectorType(ctx
->f32
, input_array_size
));
4131 unsigned schan
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[0], chan
);
4133 for (unsigned idx
= 0; idx
< input_array_size
; ++idx
) {
4134 LLVMValueRef v
, i
= NULL
, j
= NULL
;
4137 i
= LLVMBuildExtractElement(
4138 ctx
->ac
.builder
, interp_param
, ctx
->i32_0
, "");
4139 j
= LLVMBuildExtractElement(
4140 ctx
->ac
.builder
, interp_param
, ctx
->i32_1
, "");
4142 v
= si_build_fs_interp(ctx
, input_base
+ idx
, schan
,
4145 gather
= LLVMBuildInsertElement(ctx
->ac
.builder
,
4146 gather
, v
, LLVMConstInt(ctx
->i32
, idx
, false), "");
4149 emit_data
->output
[chan
] = LLVMBuildExtractElement(
4150 ctx
->ac
.builder
, gather
, array_idx
, "");
4154 static void vote_all_emit(
4155 const struct lp_build_tgsi_action
*action
,
4156 struct lp_build_tgsi_context
*bld_base
,
4157 struct lp_build_emit_data
*emit_data
)
4159 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4161 LLVMValueRef tmp
= ac_build_vote_all(&ctx
->ac
, emit_data
->args
[0]);
4162 emit_data
->output
[emit_data
->chan
] =
4163 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4166 static void vote_any_emit(
4167 const struct lp_build_tgsi_action
*action
,
4168 struct lp_build_tgsi_context
*bld_base
,
4169 struct lp_build_emit_data
*emit_data
)
4171 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4173 LLVMValueRef tmp
= ac_build_vote_any(&ctx
->ac
, emit_data
->args
[0]);
4174 emit_data
->output
[emit_data
->chan
] =
4175 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4178 static void vote_eq_emit(
4179 const struct lp_build_tgsi_action
*action
,
4180 struct lp_build_tgsi_context
*bld_base
,
4181 struct lp_build_emit_data
*emit_data
)
4183 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4185 LLVMValueRef tmp
= ac_build_vote_eq(&ctx
->ac
, emit_data
->args
[0]);
4186 emit_data
->output
[emit_data
->chan
] =
4187 LLVMBuildSExt(ctx
->ac
.builder
, tmp
, ctx
->i32
, "");
4190 static void ballot_emit(
4191 const struct lp_build_tgsi_action
*action
,
4192 struct lp_build_tgsi_context
*bld_base
,
4193 struct lp_build_emit_data
*emit_data
)
4195 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4196 LLVMBuilderRef builder
= ctx
->ac
.builder
;
4199 tmp
= lp_build_emit_fetch(bld_base
, emit_data
->inst
, 0, TGSI_CHAN_X
);
4200 tmp
= ac_build_ballot(&ctx
->ac
, tmp
);
4202 emit_data
->output
[0] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4204 if (ctx
->ac
.wave_size
== 32) {
4205 emit_data
->output
[1] = ctx
->i32_0
;
4207 tmp
= LLVMBuildLShr(builder
, tmp
, LLVMConstInt(ctx
->i64
, 32, 0), "");
4208 emit_data
->output
[1] = LLVMBuildTrunc(builder
, tmp
, ctx
->i32
, "");
4212 static void read_lane_emit(
4213 const struct lp_build_tgsi_action
*action
,
4214 struct lp_build_tgsi_context
*bld_base
,
4215 struct lp_build_emit_data
*emit_data
)
4217 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4219 if (emit_data
->inst
->Instruction
.Opcode
== TGSI_OPCODE_READ_INVOC
) {
4220 emit_data
->args
[0] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4221 0, emit_data
->src_chan
);
4223 /* Always read the source invocation (= lane) from the X channel. */
4224 emit_data
->args
[1] = lp_build_emit_fetch(bld_base
, emit_data
->inst
,
4226 emit_data
->arg_count
= 2;
4229 /* We currently have no other way to prevent LLVM from lifting the icmp
4230 * calls to a dominating basic block.
4232 ac_build_optimization_barrier(&ctx
->ac
, &emit_data
->args
[0]);
4234 for (unsigned i
= 0; i
< emit_data
->arg_count
; ++i
)
4235 emit_data
->args
[i
] = ac_to_integer(&ctx
->ac
, emit_data
->args
[i
]);
4237 emit_data
->output
[emit_data
->chan
] =
4238 ac_build_intrinsic(&ctx
->ac
, action
->intr_name
,
4239 ctx
->i32
, emit_data
->args
, emit_data
->arg_count
,
4240 AC_FUNC_ATTR_READNONE
|
4241 AC_FUNC_ATTR_CONVERGENT
);
4244 static unsigned si_llvm_get_stream(struct lp_build_tgsi_context
*bld_base
,
4245 struct lp_build_emit_data
*emit_data
)
4247 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4248 struct tgsi_src_register src0
= emit_data
->inst
->Src
[0].Register
;
4252 assert(src0
.File
== TGSI_FILE_IMMEDIATE
);
4254 imm
= ctx
->imms
[src0
.Index
* TGSI_NUM_CHANNELS
+ src0
.SwizzleX
];
4255 stream
= LLVMConstIntGetZExtValue(imm
) & 0x3;
4259 /* Emit one vertex from the geometry shader */
4260 static void si_llvm_emit_vertex(struct ac_shader_abi
*abi
,
4262 LLVMValueRef
*addrs
)
4264 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4266 if (ctx
->shader
->key
.as_ngg
) {
4267 gfx10_ngg_gs_emit_vertex(ctx
, stream
, addrs
);
4271 struct tgsi_shader_info
*info
= &ctx
->shader
->selector
->info
;
4272 struct si_shader
*shader
= ctx
->shader
;
4273 LLVMValueRef soffset
= LLVMGetParam(ctx
->main_fn
,
4274 ctx
->param_gs2vs_offset
);
4275 LLVMValueRef gs_next_vertex
;
4276 LLVMValueRef can_emit
;
4277 unsigned chan
, offset
;
4280 /* Write vertex attribute values to GSVS ring */
4281 gs_next_vertex
= LLVMBuildLoad(ctx
->ac
.builder
,
4282 ctx
->gs_next_vertex
[stream
],
4285 /* If this thread has already emitted the declared maximum number of
4286 * vertices, skip the write: excessive vertex emissions are not
4287 * supposed to have any effect.
4289 * If the shader has no writes to memory, kill it instead. This skips
4290 * further memory loads and may allow LLVM to skip to the end
4293 can_emit
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
, gs_next_vertex
,
4294 LLVMConstInt(ctx
->i32
,
4295 shader
->selector
->gs_max_out_vertices
, 0), "");
4297 bool use_kill
= !info
->writes_memory
;
4299 ac_build_kill_if_false(&ctx
->ac
, can_emit
);
4301 ac_build_ifcc(&ctx
->ac
, can_emit
, 6505);
4305 for (i
= 0; i
< info
->num_outputs
; i
++) {
4306 for (chan
= 0; chan
< 4; chan
++) {
4307 if (!(info
->output_usagemask
[i
] & (1 << chan
)) ||
4308 ((info
->output_streams
[i
] >> (2 * chan
)) & 3) != stream
)
4311 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->ac
.builder
, addrs
[4 * i
+ chan
], "");
4312 LLVMValueRef voffset
=
4313 LLVMConstInt(ctx
->i32
, offset
*
4314 shader
->selector
->gs_max_out_vertices
, 0);
4317 voffset
= LLVMBuildAdd(ctx
->ac
.builder
, voffset
, gs_next_vertex
, "");
4318 voffset
= LLVMBuildMul(ctx
->ac
.builder
, voffset
,
4319 LLVMConstInt(ctx
->i32
, 4, 0), "");
4321 out_val
= ac_to_integer(&ctx
->ac
, out_val
);
4323 ac_build_buffer_store_dword(&ctx
->ac
,
4324 ctx
->gsvs_ring
[stream
],
4326 voffset
, soffset
, 0,
4327 ac_glc
| ac_slc
, true);
4331 gs_next_vertex
= LLVMBuildAdd(ctx
->ac
.builder
, gs_next_vertex
, ctx
->i32_1
, "");
4332 LLVMBuildStore(ctx
->ac
.builder
, gs_next_vertex
, ctx
->gs_next_vertex
[stream
]);
4334 /* Signal vertex emission if vertex data was written. */
4336 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (stream
<< 8),
4337 si_get_gs_wave_id(ctx
));
4341 ac_build_endif(&ctx
->ac
, 6505);
4344 /* Emit one vertex from the geometry shader */
4345 static void si_tgsi_emit_vertex(
4346 const struct lp_build_tgsi_action
*action
,
4347 struct lp_build_tgsi_context
*bld_base
,
4348 struct lp_build_emit_data
*emit_data
)
4350 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4351 unsigned stream
= si_llvm_get_stream(bld_base
, emit_data
);
4353 si_llvm_emit_vertex(&ctx
->abi
, stream
, ctx
->outputs
[0]);
4356 /* Cut one primitive from the geometry shader */
4357 static void si_llvm_emit_primitive(struct ac_shader_abi
*abi
,
4360 struct si_shader_context
*ctx
= si_shader_context_from_abi(abi
);
4362 if (ctx
->shader
->key
.as_ngg
) {
4363 LLVMBuildStore(ctx
->ac
.builder
, ctx
->ac
.i32_0
, ctx
->gs_curprim_verts
[stream
]);
4367 /* Signal primitive cut */
4368 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (stream
<< 8),
4369 si_get_gs_wave_id(ctx
));
4372 /* Cut one primitive from the geometry shader */
4373 static void si_tgsi_emit_primitive(
4374 const struct lp_build_tgsi_action
*action
,
4375 struct lp_build_tgsi_context
*bld_base
,
4376 struct lp_build_emit_data
*emit_data
)
4378 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4380 si_llvm_emit_primitive(&ctx
->abi
, si_llvm_get_stream(bld_base
, emit_data
));
4383 static void si_llvm_emit_barrier(const struct lp_build_tgsi_action
*action
,
4384 struct lp_build_tgsi_context
*bld_base
,
4385 struct lp_build_emit_data
*emit_data
)
4387 struct si_shader_context
*ctx
= si_shader_context(bld_base
);
4389 /* GFX6 only (thanks to a hw bug workaround):
4390 * The real barrier instruction isn’t needed, because an entire patch
4391 * always fits into a single wave.
4393 if (ctx
->screen
->info
.chip_class
== GFX6
&&
4394 ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
4395 ac_build_waitcnt(&ctx
->ac
, AC_WAIT_LGKM
| AC_WAIT_VLOAD
| AC_WAIT_VSTORE
);
4399 ac_build_s_barrier(&ctx
->ac
);
4402 void si_create_function(struct si_shader_context
*ctx
,
4404 LLVMTypeRef
*returns
, unsigned num_returns
,
4405 struct si_function_info
*fninfo
,
4406 unsigned max_workgroup_size
)
4410 si_llvm_create_func(ctx
, name
, returns
, num_returns
,
4411 fninfo
->types
, fninfo
->num_params
);
4412 ctx
->return_value
= LLVMGetUndef(ctx
->return_type
);
4414 for (i
= 0; i
< fninfo
->num_sgpr_params
; ++i
) {
4415 LLVMValueRef P
= LLVMGetParam(ctx
->main_fn
, i
);
4417 /* The combination of:
4421 * allows the optimization passes to move loads and reduces
4422 * SGPR spilling significantly.
4424 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4425 AC_FUNC_ATTR_INREG
);
4427 if (LLVMGetTypeKind(LLVMTypeOf(P
)) == LLVMPointerTypeKind
) {
4428 ac_add_function_attr(ctx
->ac
.context
, ctx
->main_fn
, i
+ 1,
4429 AC_FUNC_ATTR_NOALIAS
);
4430 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
4434 for (i
= 0; i
< fninfo
->num_params
; ++i
) {
4435 if (fninfo
->assign
[i
])
4436 *fninfo
->assign
[i
] = LLVMGetParam(ctx
->main_fn
, i
);
4439 if (ctx
->screen
->info
.address32_hi
) {
4440 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4441 "amdgpu-32bit-address-high-bits",
4442 ctx
->screen
->info
.address32_hi
);
4445 ac_llvm_set_workgroup_size(ctx
->main_fn
, max_workgroup_size
);
4447 LLVMAddTargetDependentFunctionAttr(ctx
->main_fn
,
4448 "no-signed-zeros-fp-math",
4452 static void declare_streamout_params(struct si_shader_context
*ctx
,
4453 struct pipe_stream_output_info
*so
,
4454 struct si_function_info
*fninfo
)
4456 if (ctx
->screen
->use_ngg_streamout
)
4459 /* Streamout SGPRs. */
4460 if (so
->num_outputs
) {
4461 if (ctx
->type
!= PIPE_SHADER_TESS_EVAL
)
4462 ctx
->param_streamout_config
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4464 ctx
->param_streamout_config
= fninfo
->num_params
- 1;
4466 ctx
->param_streamout_write_index
= add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4468 /* A streamout buffer offset is loaded if the stride is non-zero. */
4469 for (int i
= 0; i
< 4; i
++) {
4473 ctx
->param_streamout_offset
[i
] = add_arg(fninfo
, ARG_SGPR
, ctx
->ac
.i32
);
4477 static unsigned si_get_max_workgroup_size(const struct si_shader
*shader
)
4479 switch (shader
->selector
->type
) {
4480 case PIPE_SHADER_VERTEX
:
4481 case PIPE_SHADER_TESS_EVAL
:
4482 return shader
->key
.as_ngg
? 128 : 0;
4484 case PIPE_SHADER_TESS_CTRL
:
4485 /* Return this so that LLVM doesn't remove s_barrier
4486 * instructions on chips where we use s_barrier. */
4487 return shader
->selector
->screen
->info
.chip_class
>= GFX7
? 128 : 0;
4489 case PIPE_SHADER_GEOMETRY
:
4490 return shader
->selector
->screen
->info
.chip_class
>= GFX9
? 128 : 0;
4492 case PIPE_SHADER_COMPUTE
:
4493 break; /* see below */
4499 const unsigned *properties
= shader
->selector
->info
.properties
;
4500 unsigned max_work_group_size
=
4501 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] *
4502 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
] *
4503 properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
];
4505 if (!max_work_group_size
) {
4506 /* This is a variable group size compute shader,
4507 * compile it for the maximum possible group size.
4509 max_work_group_size
= SI_MAX_VARIABLE_THREADS_PER_BLOCK
;
4511 return max_work_group_size
;
4514 static void declare_const_and_shader_buffers(struct si_shader_context
*ctx
,
4515 struct si_function_info
*fninfo
,
4518 LLVMTypeRef const_shader_buf_type
;
4520 if (ctx
->shader
->selector
->info
.const_buffers_declared
== 1 &&
4521 ctx
->shader
->selector
->info
.shader_buffers_declared
== 0)
4522 const_shader_buf_type
= ctx
->f32
;
4524 const_shader_buf_type
= ctx
->v4i32
;
4526 unsigned const_and_shader_buffers
=
4527 add_arg(fninfo
, ARG_SGPR
,
4528 ac_array_in_const32_addr_space(const_shader_buf_type
));
4531 ctx
->param_const_and_shader_buffers
= const_and_shader_buffers
;
4534 static void declare_samplers_and_images(struct si_shader_context
*ctx
,
4535 struct si_function_info
*fninfo
,
4538 unsigned samplers_and_images
=
4539 add_arg(fninfo
, ARG_SGPR
,
4540 ac_array_in_const32_addr_space(ctx
->v8i32
));
4543 ctx
->param_samplers_and_images
= samplers_and_images
;
4546 static void declare_per_stage_desc_pointers(struct si_shader_context
*ctx
,
4547 struct si_function_info
*fninfo
,
4550 declare_const_and_shader_buffers(ctx
, fninfo
, assign_params
);
4551 declare_samplers_and_images(ctx
, fninfo
, assign_params
);
4554 static void declare_global_desc_pointers(struct si_shader_context
*ctx
,
4555 struct si_function_info
*fninfo
)
4557 ctx
->param_rw_buffers
= add_arg(fninfo
, ARG_SGPR
,
4558 ac_array_in_const32_addr_space(ctx
->v4i32
));
4559 ctx
->param_bindless_samplers_and_images
= add_arg(fninfo
, ARG_SGPR
,
4560 ac_array_in_const32_addr_space(ctx
->v8i32
));
4563 static void declare_vs_specific_input_sgprs(struct si_shader_context
*ctx
,
4564 struct si_function_info
*fninfo
)
4566 ctx
->param_vs_state_bits
= add_arg(fninfo
, ARG_SGPR
, ctx
->i32
);
4567 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.base_vertex
);
4568 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.start_instance
);
4569 add_arg_assign(fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.draw_id
);
4572 static void declare_vs_input_vgprs(struct si_shader_context
*ctx
,
4573 struct si_function_info
*fninfo
,
4574 unsigned *num_prolog_vgprs
)
4576 struct si_shader
*shader
= ctx
->shader
;
4578 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.vertex_id
);
4579 if (shader
->key
.as_ls
) {
4580 ctx
->param_rel_auto_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4581 if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4582 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user VGPR */
4583 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4585 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4586 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4588 } else if (ctx
->screen
->info
.chip_class
>= GFX10
) {
4589 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr */
4590 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* user vgpr or PrimID (legacy) */
4591 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4593 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.instance_id
);
4594 ctx
->param_vs_prim_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4595 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
); /* unused */
4598 if (!shader
->is_gs_copy_shader
) {
4599 /* Vertex load indices. */
4600 ctx
->param_vertex_index0
= fninfo
->num_params
;
4601 for (unsigned i
= 0; i
< shader
->selector
->info
.num_inputs
; i
++)
4602 add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4603 *num_prolog_vgprs
+= shader
->selector
->info
.num_inputs
;
4607 static void declare_vs_blit_inputs(struct si_shader_context
*ctx
,
4608 struct si_function_info
*fninfo
,
4609 unsigned vs_blit_property
)
4611 ctx
->param_vs_blit_inputs
= fninfo
->num_params
;
4612 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x1, y1 */
4613 add_arg(fninfo
, ARG_SGPR
, ctx
->i32
); /* i16 x2, y2 */
4614 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* depth */
4616 if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_COLOR
) {
4617 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color0 */
4618 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color1 */
4619 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color2 */
4620 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* color3 */
4621 } else if (vs_blit_property
== SI_VS_BLIT_SGPRS_POS_TEXCOORD
) {
4622 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x1 */
4623 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y1 */
4624 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.x2 */
4625 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.y2 */
4626 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.z */
4627 add_arg(fninfo
, ARG_SGPR
, ctx
->f32
); /* texcoord.w */
4631 static void declare_tes_input_vgprs(struct si_shader_context
*ctx
,
4632 struct si_function_info
*fninfo
)
4634 ctx
->param_tes_u
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4635 ctx
->param_tes_v
= add_arg(fninfo
, ARG_VGPR
, ctx
->f32
);
4636 ctx
->param_tes_rel_patch_id
= add_arg(fninfo
, ARG_VGPR
, ctx
->i32
);
4637 add_arg_assign(fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tes_patch_id
);
4641 /* Convenient merged shader definitions. */
4642 SI_SHADER_MERGED_VERTEX_TESSCTRL
= PIPE_SHADER_TYPES
,
4643 SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
,
4646 static void create_function(struct si_shader_context
*ctx
)
4648 struct si_shader
*shader
= ctx
->shader
;
4649 struct si_function_info fninfo
;
4650 LLVMTypeRef returns
[16+32*4];
4651 unsigned i
, num_return_sgprs
;
4652 unsigned num_returns
= 0;
4653 unsigned num_prolog_vgprs
= 0;
4654 unsigned type
= ctx
->type
;
4655 unsigned vs_blit_property
=
4656 shader
->selector
->info
.properties
[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD
];
4658 si_init_function_info(&fninfo
);
4660 /* Set MERGED shaders. */
4661 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
4662 if (shader
->key
.as_ls
|| type
== PIPE_SHADER_TESS_CTRL
)
4663 type
= SI_SHADER_MERGED_VERTEX_TESSCTRL
; /* LS or HS */
4664 else if (shader
->key
.as_es
|| shader
->key
.as_ngg
|| type
== PIPE_SHADER_GEOMETRY
)
4665 type
= SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
;
4668 LLVMTypeRef v3i32
= LLVMVectorType(ctx
->i32
, 3);
4671 case PIPE_SHADER_VERTEX
:
4672 declare_global_desc_pointers(ctx
, &fninfo
);
4674 if (vs_blit_property
) {
4675 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4678 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4682 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4683 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4684 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4685 ac_array_in_const32_addr_space(ctx
->v4i32
));
4687 if (shader
->key
.as_es
) {
4688 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4689 } else if (shader
->key
.as_ls
) {
4690 /* no extra parameters */
4692 if (shader
->is_gs_copy_shader
) {
4693 fninfo
.num_params
= ctx
->param_vs_state_bits
+ 1;
4694 fninfo
.num_sgpr_params
= fninfo
.num_params
;
4697 /* The locations of the other parameters are assigned dynamically. */
4698 declare_streamout_params(ctx
, &shader
->selector
->so
,
4703 declare_vs_input_vgprs(ctx
, &fninfo
, &num_prolog_vgprs
);
4706 if (shader
->key
.opt
.vs_as_prim_discard_cs
) {
4707 for (i
= 0; i
< 4; i
++)
4708 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4712 case PIPE_SHADER_TESS_CTRL
: /* GFX6-GFX8 */
4713 declare_global_desc_pointers(ctx
, &fninfo
);
4714 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4715 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4716 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4717 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4718 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4719 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4720 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4723 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4724 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4726 /* param_tcs_offchip_offset and param_tcs_factor_offset are
4727 * placed after the user SGPRs.
4729 for (i
= 0; i
< GFX6_TCS_NUM_USER_SGPR
+ 2; i
++)
4730 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4731 for (i
= 0; i
< 11; i
++)
4732 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4735 case SI_SHADER_MERGED_VERTEX_TESSCTRL
:
4736 /* Merged stages have 8 system SGPRs at the beginning. */
4737 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
4738 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4739 ctx
->type
== PIPE_SHADER_TESS_CTRL
);
4740 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4741 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4742 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4743 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4744 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4745 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused */
4747 declare_global_desc_pointers(ctx
, &fninfo
);
4748 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4749 ctx
->type
== PIPE_SHADER_VERTEX
);
4750 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4752 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4753 ctx
->param_tcs_out_lds_offsets
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4754 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4755 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4756 ac_array_in_const32_addr_space(ctx
->v4i32
));
4758 /* VGPRs (first TCS, then VS) */
4759 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_patch_id
);
4760 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.tcs_rel_ids
);
4762 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4763 declare_vs_input_vgprs(ctx
, &fninfo
,
4766 /* LS return values are inputs to the TCS main shader part. */
4767 for (i
= 0; i
< 8 + GFX9_TCS_NUM_USER_SGPR
; i
++)
4768 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4769 for (i
= 0; i
< 2; i
++)
4770 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4772 /* TCS return values are inputs to the TCS epilog.
4774 * param_tcs_offchip_offset, param_tcs_factor_offset,
4775 * param_tcs_offchip_layout, and param_rw_buffers
4776 * should be passed to the epilog.
4778 for (i
= 0; i
<= 8 + GFX9_SGPR_TCS_OUT_LAYOUT
; i
++)
4779 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4780 for (i
= 0; i
< 11; i
++)
4781 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4785 case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY
:
4786 /* Merged stages have 8 system SGPRs at the beginning. */
4787 /* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
4788 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4789 ctx
->type
== PIPE_SHADER_GEOMETRY
);
4791 if (ctx
->shader
->key
.as_ngg
)
4792 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->gs_tg_info
);
4794 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4796 ctx
->param_merged_wave_info
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4797 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4798 ctx
->param_merged_scratch_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4799 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
4800 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
4802 declare_global_desc_pointers(ctx
, &fninfo
);
4803 if (ctx
->type
!= PIPE_SHADER_VERTEX
|| !vs_blit_property
) {
4804 declare_per_stage_desc_pointers(ctx
, &fninfo
,
4805 (ctx
->type
== PIPE_SHADER_VERTEX
||
4806 ctx
->type
== PIPE_SHADER_TESS_EVAL
));
4809 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4810 if (vs_blit_property
)
4811 declare_vs_blit_inputs(ctx
, &fninfo
, vs_blit_property
);
4813 declare_vs_specific_input_sgprs(ctx
, &fninfo
);
4815 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4816 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4817 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4818 /* Declare as many input SGPRs as the VS has. */
4821 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4822 ctx
->param_vertex_buffers
= add_arg(&fninfo
, ARG_SGPR
,
4823 ac_array_in_const32_addr_space(ctx
->v4i32
));
4826 /* VGPRs (first GS, then VS/TES) */
4827 ctx
->param_gs_vtx01_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4828 ctx
->param_gs_vtx23_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4829 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4830 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4831 ctx
->param_gs_vtx45_offset
= add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
4833 if (ctx
->type
== PIPE_SHADER_VERTEX
) {
4834 declare_vs_input_vgprs(ctx
, &fninfo
,
4836 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
4837 declare_tes_input_vgprs(ctx
, &fninfo
);
4840 if (ctx
->shader
->key
.as_es
&&
4841 (ctx
->type
== PIPE_SHADER_VERTEX
||
4842 ctx
->type
== PIPE_SHADER_TESS_EVAL
)) {
4843 unsigned num_user_sgprs
;
4845 if (ctx
->type
== PIPE_SHADER_VERTEX
)
4846 num_user_sgprs
= GFX9_VSGS_NUM_USER_SGPR
;
4848 num_user_sgprs
= GFX9_TESGS_NUM_USER_SGPR
;
4850 /* ES return values are inputs to GS. */
4851 for (i
= 0; i
< 8 + num_user_sgprs
; i
++)
4852 returns
[num_returns
++] = ctx
->i32
; /* SGPRs */
4853 for (i
= 0; i
< 5; i
++)
4854 returns
[num_returns
++] = ctx
->f32
; /* VGPRs */
4858 case PIPE_SHADER_TESS_EVAL
:
4859 declare_global_desc_pointers(ctx
, &fninfo
);
4860 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4861 ctx
->param_vs_state_bits
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4862 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4863 ctx
->param_tes_offchip_addr
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4865 if (shader
->key
.as_es
) {
4866 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4867 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4868 ctx
->param_es2gs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4870 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4871 declare_streamout_params(ctx
, &shader
->selector
->so
,
4873 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4877 declare_tes_input_vgprs(ctx
, &fninfo
);
4880 case PIPE_SHADER_GEOMETRY
:
4881 declare_global_desc_pointers(ctx
, &fninfo
);
4882 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4883 ctx
->param_gs2vs_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4884 ctx
->param_gs_wave_id
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
4887 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[0]);
4888 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[1]);
4889 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_prim_id
);
4890 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[2]);
4891 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[3]);
4892 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[4]);
4893 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->gs_vtx_offset
[5]);
4894 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &ctx
->abi
.gs_invocation_id
);
4897 case PIPE_SHADER_FRAGMENT
:
4898 declare_global_desc_pointers(ctx
, &fninfo
);
4899 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4900 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
4901 add_arg_assign_checked(&fninfo
, ARG_SGPR
, ctx
->i32
,
4902 &ctx
->abi
.prim_mask
, SI_PARAM_PRIM_MASK
);
4904 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_SAMPLE
);
4905 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTER
);
4906 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_PERSP_CENTROID
);
4907 add_arg_checked(&fninfo
, ARG_VGPR
, v3i32
, SI_PARAM_PERSP_PULL_MODEL
);
4908 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_SAMPLE
);
4909 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTER
);
4910 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->v2i32
, SI_PARAM_LINEAR_CENTROID
);
4911 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->f32
, SI_PARAM_LINE_STIPPLE_TEX
);
4912 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4913 &ctx
->abi
.frag_pos
[0], SI_PARAM_POS_X_FLOAT
);
4914 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4915 &ctx
->abi
.frag_pos
[1], SI_PARAM_POS_Y_FLOAT
);
4916 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4917 &ctx
->abi
.frag_pos
[2], SI_PARAM_POS_Z_FLOAT
);
4918 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4919 &ctx
->abi
.frag_pos
[3], SI_PARAM_POS_W_FLOAT
);
4920 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4921 &ctx
->abi
.front_face
, SI_PARAM_FRONT_FACE
);
4922 shader
->info
.face_vgpr_index
= 20;
4923 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->i32
,
4924 &ctx
->abi
.ancillary
, SI_PARAM_ANCILLARY
);
4925 shader
->info
.ancillary_vgpr_index
= 21;
4926 add_arg_assign_checked(&fninfo
, ARG_VGPR
, ctx
->f32
,
4927 &ctx
->abi
.sample_coverage
, SI_PARAM_SAMPLE_COVERAGE
);
4928 add_arg_checked(&fninfo
, ARG_VGPR
, ctx
->i32
, SI_PARAM_POS_FIXED_PT
);
4930 /* Color inputs from the prolog. */
4931 if (shader
->selector
->info
.colors_read
) {
4932 unsigned num_color_elements
=
4933 util_bitcount(shader
->selector
->info
.colors_read
);
4935 assert(fninfo
.num_params
+ num_color_elements
<= ARRAY_SIZE(fninfo
.types
));
4936 for (i
= 0; i
< num_color_elements
; i
++)
4937 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
4939 num_prolog_vgprs
+= num_color_elements
;
4942 /* Outputs for the epilog. */
4943 num_return_sgprs
= SI_SGPR_ALPHA_REF
+ 1;
4946 util_bitcount(shader
->selector
->info
.colors_written
) * 4 +
4947 shader
->selector
->info
.writes_z
+
4948 shader
->selector
->info
.writes_stencil
+
4949 shader
->selector
->info
.writes_samplemask
+
4950 1 /* SampleMaskIn */;
4952 num_returns
= MAX2(num_returns
,
4954 PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
4956 for (i
= 0; i
< num_return_sgprs
; i
++)
4957 returns
[i
] = ctx
->i32
;
4958 for (; i
< num_returns
; i
++)
4959 returns
[i
] = ctx
->f32
;
4962 case PIPE_SHADER_COMPUTE
:
4963 declare_global_desc_pointers(ctx
, &fninfo
);
4964 declare_per_stage_desc_pointers(ctx
, &fninfo
, true);
4965 if (shader
->selector
->info
.uses_grid_size
)
4966 add_arg_assign(&fninfo
, ARG_SGPR
, v3i32
, &ctx
->abi
.num_work_groups
);
4967 if (shader
->selector
->info
.uses_block_size
&&
4968 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
4969 ctx
->param_block_size
= add_arg(&fninfo
, ARG_SGPR
, v3i32
);
4971 unsigned cs_user_data_dwords
=
4972 shader
->selector
->info
.properties
[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD
];
4973 if (cs_user_data_dwords
) {
4974 ctx
->param_cs_user_data
= add_arg(&fninfo
, ARG_SGPR
,
4975 LLVMVectorType(ctx
->i32
, cs_user_data_dwords
));
4978 for (i
= 0; i
< 3; i
++) {
4979 ctx
->abi
.workgroup_ids
[i
] = NULL
;
4980 if (shader
->selector
->info
.uses_block_id
[i
])
4981 add_arg_assign(&fninfo
, ARG_SGPR
, ctx
->i32
, &ctx
->abi
.workgroup_ids
[i
]);
4984 add_arg_assign(&fninfo
, ARG_VGPR
, v3i32
, &ctx
->abi
.local_invocation_ids
);
4987 assert(0 && "unimplemented shader");
4991 si_create_function(ctx
, "main", returns
, num_returns
, &fninfo
,
4992 si_get_max_workgroup_size(shader
));
4994 /* Reserve register locations for VGPR inputs the PS prolog may need. */
4995 if (ctx
->type
== PIPE_SHADER_FRAGMENT
&& !ctx
->shader
->is_monolithic
) {
4996 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
4997 "InitialPSInputAddr",
4998 S_0286D0_PERSP_SAMPLE_ENA(1) |
4999 S_0286D0_PERSP_CENTER_ENA(1) |
5000 S_0286D0_PERSP_CENTROID_ENA(1) |
5001 S_0286D0_LINEAR_SAMPLE_ENA(1) |
5002 S_0286D0_LINEAR_CENTER_ENA(1) |
5003 S_0286D0_LINEAR_CENTROID_ENA(1) |
5004 S_0286D0_FRONT_FACE_ENA(1) |
5005 S_0286D0_ANCILLARY_ENA(1) |
5006 S_0286D0_POS_FIXED_PT_ENA(1));
5009 shader
->info
.num_input_sgprs
= 0;
5010 shader
->info
.num_input_vgprs
= 0;
5012 for (i
= 0; i
< fninfo
.num_sgpr_params
; ++i
)
5013 shader
->info
.num_input_sgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5015 for (; i
< fninfo
.num_params
; ++i
)
5016 shader
->info
.num_input_vgprs
+= ac_get_type_size(fninfo
.types
[i
]) / 4;
5018 assert(shader
->info
.num_input_vgprs
>= num_prolog_vgprs
);
5019 shader
->info
.num_input_vgprs
-= num_prolog_vgprs
;
5021 if (shader
->key
.as_ls
|| ctx
->type
== PIPE_SHADER_TESS_CTRL
) {
5022 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5023 /* The LSHS size is not known until draw time, so we append it
5024 * at the end of whatever LDS use there may be in the rest of
5025 * the shader (currently none, unless LLVM decides to do its
5026 * own LDS-based lowering).
5028 ctx
->ac
.lds
= LLVMAddGlobalInAddressSpace(
5029 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5030 "__lds_end", AC_ADDR_SPACE_LDS
);
5031 LLVMSetAlignment(ctx
->ac
.lds
, 256);
5033 ac_declare_lds_as_pointer(&ctx
->ac
);
5038 /* Ensure that the esgs ring is declared.
5040 * We declare it with 64KB alignment as a hint that the
5041 * pointer value will always be 0.
5043 static void declare_esgs_ring(struct si_shader_context
*ctx
)
5048 assert(!LLVMGetNamedGlobal(ctx
->ac
.module
, "esgs_ring"));
5050 ctx
->esgs_ring
= LLVMAddGlobalInAddressSpace(
5051 ctx
->ac
.module
, LLVMArrayType(ctx
->i32
, 0),
5054 LLVMSetLinkage(ctx
->esgs_ring
, LLVMExternalLinkage
);
5055 LLVMSetAlignment(ctx
->esgs_ring
, 64 * 1024);
5059 * Load ESGS and GSVS ring buffer resource descriptors and save the variables
5062 static void preload_ring_buffers(struct si_shader_context
*ctx
)
5064 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5066 LLVMValueRef buf_ptr
= LLVMGetParam(ctx
->main_fn
,
5067 ctx
->param_rw_buffers
);
5069 if (ctx
->shader
->key
.as_es
|| ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5070 if (ctx
->screen
->info
.chip_class
<= GFX8
) {
5072 ctx
->type
== PIPE_SHADER_GEOMETRY
? SI_GS_RING_ESGS
5074 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, ring
, 0);
5077 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5079 if (USE_LDS_SYMBOLS
&& HAVE_LLVM
>= 0x0900) {
5080 /* Declare the ESGS ring as an explicit LDS symbol. */
5081 declare_esgs_ring(ctx
);
5083 ac_declare_lds_as_pointer(&ctx
->ac
);
5084 ctx
->esgs_ring
= ctx
->ac
.lds
;
5089 if (ctx
->shader
->is_gs_copy_shader
) {
5090 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5093 ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5094 } else if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
5095 const struct si_shader_selector
*sel
= ctx
->shader
->selector
;
5096 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, SI_RING_GSVS
, 0);
5097 LLVMValueRef base_ring
;
5099 base_ring
= ac_build_load_to_sgpr(&ctx
->ac
, buf_ptr
, offset
);
5101 /* The conceptual layout of the GSVS ring is
5102 * v0c0 .. vLv0 v0c1 .. vLc1 ..
5103 * but the real memory layout is swizzled across
5105 * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
5107 * Override the buffer descriptor accordingly.
5109 LLVMTypeRef v2i64
= LLVMVectorType(ctx
->i64
, 2);
5110 uint64_t stream_offset
= 0;
5112 for (unsigned stream
= 0; stream
< 4; ++stream
) {
5113 unsigned num_components
;
5115 unsigned num_records
;
5116 LLVMValueRef ring
, tmp
;
5118 num_components
= sel
->info
.num_stream_output_components
[stream
];
5119 if (!num_components
)
5122 stride
= 4 * num_components
* sel
->gs_max_out_vertices
;
5124 /* Limit on the stride field for <= GFX7. */
5125 assert(stride
< (1 << 14));
5127 num_records
= ctx
->ac
.wave_size
;
5129 ring
= LLVMBuildBitCast(builder
, base_ring
, v2i64
, "");
5130 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_0
, "");
5131 tmp
= LLVMBuildAdd(builder
, tmp
,
5132 LLVMConstInt(ctx
->i64
,
5133 stream_offset
, 0), "");
5134 stream_offset
+= stride
* ctx
->ac
.wave_size
;
5136 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_0
, "");
5137 ring
= LLVMBuildBitCast(builder
, ring
, ctx
->v4i32
, "");
5138 tmp
= LLVMBuildExtractElement(builder
, ring
, ctx
->i32_1
, "");
5139 tmp
= LLVMBuildOr(builder
, tmp
,
5140 LLVMConstInt(ctx
->i32
,
5141 S_008F04_STRIDE(stride
) |
5142 S_008F04_SWIZZLE_ENABLE(1), 0), "");
5143 ring
= LLVMBuildInsertElement(builder
, ring
, tmp
, ctx
->i32_1
, "");
5144 ring
= LLVMBuildInsertElement(builder
, ring
,
5145 LLVMConstInt(ctx
->i32
, num_records
, 0),
5146 LLVMConstInt(ctx
->i32
, 2, 0), "");
5149 S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X
) |
5150 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y
) |
5151 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z
) |
5152 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W
) |
5153 S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */
5154 S_008F0C_ADD_TID_ENABLE(1);
5156 if (ctx
->ac
.chip_class
>= GFX10
) {
5157 rsrc3
|= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT
) |
5158 S_008F0C_OOB_SELECT(2) |
5159 S_008F0C_RESOURCE_LEVEL(1);
5161 rsrc3
|= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT
) |
5162 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32
) |
5163 S_008F0C_ELEMENT_SIZE(1); /* element_size = 4 (bytes) */
5166 ring
= LLVMBuildInsertElement(builder
, ring
,
5167 LLVMConstInt(ctx
->i32
, rsrc3
, false),
5168 LLVMConstInt(ctx
->i32
, 3, 0), "");
5170 ctx
->gsvs_ring
[stream
] = ring
;
5172 } else if (ctx
->type
== PIPE_SHADER_TESS_EVAL
) {
5173 ctx
->tess_offchip_ring
= get_tess_ring_descriptor(ctx
, TESS_OFFCHIP_RING_TES
);
5177 static void si_llvm_emit_polygon_stipple(struct si_shader_context
*ctx
,
5178 LLVMValueRef param_rw_buffers
,
5179 unsigned param_pos_fixed_pt
)
5181 LLVMBuilderRef builder
= ctx
->ac
.builder
;
5182 LLVMValueRef slot
, desc
, offset
, row
, bit
, address
[2];
5184 /* Use the fixed-point gl_FragCoord input.
5185 * Since the stipple pattern is 32x32 and it repeats, just get 5 bits
5186 * per coordinate to get the repeating effect.
5188 address
[0] = si_unpack_param(ctx
, param_pos_fixed_pt
, 0, 5);
5189 address
[1] = si_unpack_param(ctx
, param_pos_fixed_pt
, 16, 5);
5191 /* Load the buffer descriptor. */
5192 slot
= LLVMConstInt(ctx
->i32
, SI_PS_CONST_POLY_STIPPLE
, 0);
5193 desc
= ac_build_load_to_sgpr(&ctx
->ac
, param_rw_buffers
, slot
);
5195 /* The stipple pattern is 32x32, each row has 32 bits. */
5196 offset
= LLVMBuildMul(builder
, address
[1],
5197 LLVMConstInt(ctx
->i32
, 4, 0), "");
5198 row
= buffer_load_const(ctx
, desc
, offset
);
5199 row
= ac_to_integer(&ctx
->ac
, row
);
5200 bit
= LLVMBuildLShr(builder
, row
, address
[0], "");
5201 bit
= LLVMBuildTrunc(builder
, bit
, ctx
->i1
, "");
5202 ac_build_kill_if_false(&ctx
->ac
, bit
);
5205 /* For the UMR disassembler. */
5206 #define DEBUGGER_END_OF_CODE_MARKER 0xbf9f0000 /* invalid instruction */
5207 #define DEBUGGER_NUM_MARKERS 5
5209 static bool si_shader_binary_open(struct si_screen
*screen
,
5210 struct si_shader
*shader
,
5211 struct ac_rtld_binary
*rtld
)
5213 const struct si_shader_selector
*sel
= shader
->selector
;
5214 const char *part_elfs
[5];
5215 size_t part_sizes
[5];
5216 unsigned num_parts
= 0;
5218 #define add_part(shader_or_part) \
5219 if (shader_or_part) { \
5220 part_elfs[num_parts] = (shader_or_part)->binary.elf_buffer; \
5221 part_sizes[num_parts] = (shader_or_part)->binary.elf_size; \
5225 add_part(shader
->prolog
);
5226 add_part(shader
->previous_stage
);
5227 add_part(shader
->prolog2
);
5229 add_part(shader
->epilog
);
5233 struct ac_rtld_symbol lds_symbols
[2];
5234 unsigned num_lds_symbols
= 0;
5236 if (sel
&& screen
->info
.chip_class
>= GFX9
&& !shader
->is_gs_copy_shader
&&
5237 (sel
->type
== PIPE_SHADER_GEOMETRY
|| shader
->key
.as_ngg
)) {
5238 /* We add this symbol even on LLVM <= 8 to ensure that
5239 * shader->config.lds_size is set correctly below.
5241 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5242 sym
->name
= "esgs_ring";
5243 sym
->size
= shader
->gs_info
.esgs_ring_size
;
5244 sym
->align
= 64 * 1024;
5247 if (shader
->key
.as_ngg
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
5248 struct ac_rtld_symbol
*sym
= &lds_symbols
[num_lds_symbols
++];
5249 sym
->name
= "ngg_emit";
5250 sym
->size
= shader
->ngg
.ngg_emit_size
* 4;
5254 bool ok
= ac_rtld_open(rtld
, (struct ac_rtld_open_info
){
5255 .info
= &screen
->info
,
5257 .halt_at_entry
= screen
->options
.halt_shaders
,
5259 .shader_type
= tgsi_processor_to_shader_stage(sel
->type
),
5260 .wave_size
= si_get_shader_wave_size(shader
),
5261 .num_parts
= num_parts
,
5262 .elf_ptrs
= part_elfs
,
5263 .elf_sizes
= part_sizes
,
5264 .num_shared_lds_symbols
= num_lds_symbols
,
5265 .shared_lds_symbols
= lds_symbols
});
5267 if (rtld
->lds_size
> 0) {
5268 unsigned alloc_granularity
= screen
->info
.chip_class
>= GFX7
? 512 : 256;
5269 shader
->config
.lds_size
=
5270 align(rtld
->lds_size
, alloc_granularity
) / alloc_granularity
;
5276 static unsigned si_get_shader_binary_size(struct si_screen
*screen
, struct si_shader
*shader
)
5278 struct ac_rtld_binary rtld
;
5279 si_shader_binary_open(screen
, shader
, &rtld
);
5280 return rtld
.rx_size
;
5283 static bool si_get_external_symbol(void *data
, const char *name
, uint64_t *value
)
5285 uint64_t *scratch_va
= data
;
5287 if (!strcmp(scratch_rsrc_dword0_symbol
, name
)) {
5288 *value
= (uint32_t)*scratch_va
;
5291 if (!strcmp(scratch_rsrc_dword1_symbol
, name
)) {
5292 /* Enable scratch coalescing. */
5293 *value
= S_008F04_BASE_ADDRESS_HI(*scratch_va
>> 32) |
5294 S_008F04_SWIZZLE_ENABLE(1);
5301 bool si_shader_binary_upload(struct si_screen
*sscreen
, struct si_shader
*shader
,
5302 uint64_t scratch_va
)
5304 struct ac_rtld_binary binary
;
5305 if (!si_shader_binary_open(sscreen
, shader
, &binary
))
5308 si_resource_reference(&shader
->bo
, NULL
);
5309 shader
->bo
= si_aligned_buffer_create(&sscreen
->b
,
5310 sscreen
->info
.cpdma_prefetch_writes_memory
?
5311 0 : SI_RESOURCE_FLAG_READ_ONLY
,
5312 PIPE_USAGE_IMMUTABLE
,
5313 align(binary
.rx_size
, SI_CPDMA_ALIGNMENT
),
5319 struct ac_rtld_upload_info u
= {};
5321 u
.get_external_symbol
= si_get_external_symbol
;
5322 u
.cb_data
= &scratch_va
;
5323 u
.rx_va
= shader
->bo
->gpu_address
;
5324 u
.rx_ptr
= sscreen
->ws
->buffer_map(shader
->bo
->buf
, NULL
,
5325 PIPE_TRANSFER_READ_WRITE
|
5326 PIPE_TRANSFER_UNSYNCHRONIZED
|
5327 RADEON_TRANSFER_TEMPORARY
);
5331 bool ok
= ac_rtld_upload(&u
);
5333 sscreen
->ws
->buffer_unmap(shader
->bo
->buf
);
5334 ac_rtld_close(&binary
);
5339 static void si_shader_dump_disassembly(struct si_screen
*screen
,
5340 const struct si_shader_binary
*binary
,
5341 enum pipe_shader_type shader_type
,
5343 struct pipe_debug_callback
*debug
,
5344 const char *name
, FILE *file
)
5346 struct ac_rtld_binary rtld_binary
;
5348 if (!ac_rtld_open(&rtld_binary
, (struct ac_rtld_open_info
){
5349 .info
= &screen
->info
,
5350 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5351 .wave_size
= wave_size
,
5353 .elf_ptrs
= &binary
->elf_buffer
,
5354 .elf_sizes
= &binary
->elf_size
}))
5360 if (!ac_rtld_get_section_by_name(&rtld_binary
, ".AMDGPU.disasm", &disasm
, &nbytes
))
5363 if (nbytes
> INT_MAX
)
5366 if (debug
&& debug
->debug_message
) {
5367 /* Very long debug messages are cut off, so send the
5368 * disassembly one line at a time. This causes more
5369 * overhead, but on the plus side it simplifies
5370 * parsing of resulting logs.
5372 pipe_debug_message(debug
, SHADER_INFO
,
5373 "Shader Disassembly Begin");
5376 while (line
< nbytes
) {
5377 int count
= nbytes
- line
;
5378 const char *nl
= memchr(disasm
+ line
, '\n', nbytes
- line
);
5380 count
= nl
- (disasm
+ line
);
5383 pipe_debug_message(debug
, SHADER_INFO
,
5384 "%.*s", count
, disasm
+ line
);
5390 pipe_debug_message(debug
, SHADER_INFO
,
5391 "Shader Disassembly End");
5395 fprintf(file
, "Shader %s disassembly:\n", name
);
5396 fprintf(file
, "%*s", (int)nbytes
, disasm
);
5400 ac_rtld_close(&rtld_binary
);
5403 static void si_calculate_max_simd_waves(struct si_shader
*shader
)
5405 struct si_screen
*sscreen
= shader
->selector
->screen
;
5406 struct ac_shader_config
*conf
= &shader
->config
;
5407 unsigned num_inputs
= shader
->selector
->info
.num_inputs
;
5408 unsigned lds_increment
= sscreen
->info
.chip_class
>= GFX7
? 512 : 256;
5409 unsigned lds_per_wave
= 0;
5410 unsigned max_simd_waves
;
5412 max_simd_waves
= ac_get_max_simd_waves(sscreen
->info
.family
);
5414 /* Compute LDS usage for PS. */
5415 switch (shader
->selector
->type
) {
5416 case PIPE_SHADER_FRAGMENT
:
5417 /* The minimum usage per wave is (num_inputs * 48). The maximum
5418 * usage is (num_inputs * 48 * 16).
5419 * We can get anything in between and it varies between waves.
5421 * The 48 bytes per input for a single primitive is equal to
5422 * 4 bytes/component * 4 components/input * 3 points.
5424 * Other stages don't know the size at compile time or don't
5425 * allocate LDS per wave, but instead they do it per thread group.
5427 lds_per_wave
= conf
->lds_size
* lds_increment
+
5428 align(num_inputs
* 48, lds_increment
);
5430 case PIPE_SHADER_COMPUTE
:
5431 if (shader
->selector
) {
5432 unsigned max_workgroup_size
=
5433 si_get_max_workgroup_size(shader
);
5434 lds_per_wave
= (conf
->lds_size
* lds_increment
) /
5435 DIV_ROUND_UP(max_workgroup_size
,
5436 sscreen
->compute_wave_size
);
5442 /* Compute the per-SIMD wave counts. */
5443 if (conf
->num_sgprs
) {
5445 MIN2(max_simd_waves
,
5446 ac_get_num_physical_sgprs(sscreen
->info
.chip_class
) / conf
->num_sgprs
);
5449 if (conf
->num_vgprs
)
5450 max_simd_waves
= MIN2(max_simd_waves
, 256 / conf
->num_vgprs
);
5452 /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above
5453 * 16KB makes some SIMDs unoccupied). */
5455 max_simd_waves
= MIN2(max_simd_waves
, 16384 / lds_per_wave
);
5457 shader
->info
.max_simd_waves
= max_simd_waves
;
5460 void si_shader_dump_stats_for_shader_db(struct si_screen
*screen
,
5461 struct si_shader
*shader
,
5462 struct pipe_debug_callback
*debug
)
5464 const struct ac_shader_config
*conf
= &shader
->config
;
5466 if (screen
->options
.debug_disassembly
)
5467 si_shader_dump_disassembly(screen
, &shader
->binary
,
5468 shader
->selector
->type
,
5469 si_get_shader_wave_size(shader
),
5470 debug
, "main", NULL
);
5472 pipe_debug_message(debug
, SHADER_INFO
,
5473 "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d "
5474 "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d "
5475 "Spilled VGPRs: %d PrivMem VGPRs: %d",
5476 conf
->num_sgprs
, conf
->num_vgprs
,
5477 si_get_shader_binary_size(screen
, shader
),
5478 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5479 shader
->info
.max_simd_waves
, conf
->spilled_sgprs
,
5480 conf
->spilled_vgprs
, shader
->info
.private_mem_vgprs
);
5483 static void si_shader_dump_stats(struct si_screen
*sscreen
,
5484 struct si_shader
*shader
,
5486 bool check_debug_option
)
5488 const struct ac_shader_config
*conf
= &shader
->config
;
5490 if (!check_debug_option
||
5491 si_can_dump_shader(sscreen
, shader
->selector
->type
)) {
5492 if (shader
->selector
->type
== PIPE_SHADER_FRAGMENT
) {
5493 fprintf(file
, "*** SHADER CONFIG ***\n"
5494 "SPI_PS_INPUT_ADDR = 0x%04x\n"
5495 "SPI_PS_INPUT_ENA = 0x%04x\n",
5496 conf
->spi_ps_input_addr
, conf
->spi_ps_input_ena
);
5499 fprintf(file
, "*** SHADER STATS ***\n"
5502 "Spilled SGPRs: %d\n"
5503 "Spilled VGPRs: %d\n"
5504 "Private memory VGPRs: %d\n"
5505 "Code Size: %d bytes\n"
5507 "Scratch: %d bytes per wave\n"
5509 "********************\n\n\n",
5510 conf
->num_sgprs
, conf
->num_vgprs
,
5511 conf
->spilled_sgprs
, conf
->spilled_vgprs
,
5512 shader
->info
.private_mem_vgprs
,
5513 si_get_shader_binary_size(sscreen
, shader
),
5514 conf
->lds_size
, conf
->scratch_bytes_per_wave
,
5515 shader
->info
.max_simd_waves
);
5519 const char *si_get_shader_name(const struct si_shader
*shader
)
5521 switch (shader
->selector
->type
) {
5522 case PIPE_SHADER_VERTEX
:
5523 if (shader
->key
.as_es
)
5524 return "Vertex Shader as ES";
5525 else if (shader
->key
.as_ls
)
5526 return "Vertex Shader as LS";
5527 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
5528 return "Vertex Shader as Primitive Discard CS";
5529 else if (shader
->key
.as_ngg
)
5530 return "Vertex Shader as ESGS";
5532 return "Vertex Shader as VS";
5533 case PIPE_SHADER_TESS_CTRL
:
5534 return "Tessellation Control Shader";
5535 case PIPE_SHADER_TESS_EVAL
:
5536 if (shader
->key
.as_es
)
5537 return "Tessellation Evaluation Shader as ES";
5538 else if (shader
->key
.as_ngg
)
5539 return "Tessellation Evaluation Shader as ESGS";
5541 return "Tessellation Evaluation Shader as VS";
5542 case PIPE_SHADER_GEOMETRY
:
5543 if (shader
->is_gs_copy_shader
)
5544 return "GS Copy Shader as VS";
5546 return "Geometry Shader";
5547 case PIPE_SHADER_FRAGMENT
:
5548 return "Pixel Shader";
5549 case PIPE_SHADER_COMPUTE
:
5550 return "Compute Shader";
5552 return "Unknown Shader";
5556 void si_shader_dump(struct si_screen
*sscreen
, struct si_shader
*shader
,
5557 struct pipe_debug_callback
*debug
,
5558 FILE *file
, bool check_debug_option
)
5560 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5562 if (!check_debug_option
||
5563 si_can_dump_shader(sscreen
, shader_type
))
5564 si_dump_shader_key(shader
, file
);
5566 if (!check_debug_option
&& shader
->binary
.llvm_ir_string
) {
5567 if (shader
->previous_stage
&&
5568 shader
->previous_stage
->binary
.llvm_ir_string
) {
5569 fprintf(file
, "\n%s - previous stage - LLVM IR:\n\n",
5570 si_get_shader_name(shader
));
5571 fprintf(file
, "%s\n", shader
->previous_stage
->binary
.llvm_ir_string
);
5574 fprintf(file
, "\n%s - main shader part - LLVM IR:\n\n",
5575 si_get_shader_name(shader
));
5576 fprintf(file
, "%s\n", shader
->binary
.llvm_ir_string
);
5579 if (!check_debug_option
||
5580 (si_can_dump_shader(sscreen
, shader_type
) &&
5581 !(sscreen
->debug_flags
& DBG(NO_ASM
)))) {
5582 unsigned wave_size
= si_get_shader_wave_size(shader
);
5584 fprintf(file
, "\n%s:\n", si_get_shader_name(shader
));
5587 si_shader_dump_disassembly(sscreen
, &shader
->prolog
->binary
,
5588 shader_type
, wave_size
, debug
, "prolog", file
);
5589 if (shader
->previous_stage
)
5590 si_shader_dump_disassembly(sscreen
, &shader
->previous_stage
->binary
,
5591 shader_type
, wave_size
, debug
, "previous stage", file
);
5592 if (shader
->prolog2
)
5593 si_shader_dump_disassembly(sscreen
, &shader
->prolog2
->binary
,
5594 shader_type
, wave_size
, debug
, "prolog2", file
);
5596 si_shader_dump_disassembly(sscreen
, &shader
->binary
, shader_type
,
5597 wave_size
, debug
, "main", file
);
5600 si_shader_dump_disassembly(sscreen
, &shader
->epilog
->binary
,
5601 shader_type
, wave_size
, debug
, "epilog", file
);
5602 fprintf(file
, "\n");
5605 si_shader_dump_stats(sscreen
, shader
, file
, check_debug_option
);
5608 static int si_compile_llvm(struct si_screen
*sscreen
,
5609 struct si_shader_binary
*binary
,
5610 struct ac_shader_config
*conf
,
5611 struct ac_llvm_compiler
*compiler
,
5613 struct pipe_debug_callback
*debug
,
5614 enum pipe_shader_type shader_type
,
5617 bool less_optimized
)
5619 unsigned count
= p_atomic_inc_return(&sscreen
->num_compilations
);
5621 if (si_can_dump_shader(sscreen
, shader_type
)) {
5622 fprintf(stderr
, "radeonsi: Compiling shader %d\n", count
);
5624 if (!(sscreen
->debug_flags
& (DBG(NO_IR
) | DBG(PREOPT_IR
)))) {
5625 fprintf(stderr
, "%s LLVM IR:\n\n", name
);
5626 ac_dump_module(mod
);
5627 fprintf(stderr
, "\n");
5631 if (sscreen
->record_llvm_ir
) {
5632 char *ir
= LLVMPrintModuleToString(mod
);
5633 binary
->llvm_ir_string
= strdup(ir
);
5634 LLVMDisposeMessage(ir
);
5637 if (!si_replace_shader(count
, binary
)) {
5638 unsigned r
= si_llvm_compile(mod
, binary
, compiler
, debug
,
5639 less_optimized
, wave_size
);
5644 struct ac_rtld_binary rtld
;
5645 if (!ac_rtld_open(&rtld
, (struct ac_rtld_open_info
){
5646 .info
= &sscreen
->info
,
5647 .shader_type
= tgsi_processor_to_shader_stage(shader_type
),
5648 .wave_size
= wave_size
,
5650 .elf_ptrs
= &binary
->elf_buffer
,
5651 .elf_sizes
= &binary
->elf_size
}))
5654 bool ok
= ac_rtld_read_config(&rtld
, conf
);
5655 ac_rtld_close(&rtld
);
5659 /* Enable 64-bit and 16-bit denormals, because there is no performance
5662 * If denormals are enabled, all floating-point output modifiers are
5665 * Don't enable denormals for 32-bit floats, because:
5666 * - Floating-point output modifiers would be ignored by the hw.
5667 * - Some opcodes don't support denormals, such as v_mad_f32. We would
5668 * have to stop using those.
5669 * - GFX6 & GFX7 would be very slow.
5671 conf
->float_mode
|= V_00B028_FP_64_DENORMS
;
5676 static void si_llvm_build_ret(struct si_shader_context
*ctx
, LLVMValueRef ret
)
5678 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
5679 LLVMBuildRetVoid(ctx
->ac
.builder
);
5681 LLVMBuildRet(ctx
->ac
.builder
, ret
);
5684 /* Generate code for the hardware VS shader stage to go with a geometry shader */
5686 si_generate_gs_copy_shader(struct si_screen
*sscreen
,
5687 struct ac_llvm_compiler
*compiler
,
5688 struct si_shader_selector
*gs_selector
,
5689 struct pipe_debug_callback
*debug
)
5691 struct si_shader_context ctx
;
5692 struct si_shader
*shader
;
5693 LLVMBuilderRef builder
;
5694 struct si_shader_output_values outputs
[SI_MAX_VS_OUTPUTS
];
5695 struct tgsi_shader_info
*gsinfo
= &gs_selector
->info
;
5699 shader
= CALLOC_STRUCT(si_shader
);
5703 /* We can leave the fence as permanently signaled because the GS copy
5704 * shader only becomes visible globally after it has been compiled. */
5705 util_queue_fence_init(&shader
->ready
);
5707 shader
->selector
= gs_selector
;
5708 shader
->is_gs_copy_shader
= true;
5710 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
5711 si_get_wave_size(sscreen
, PIPE_SHADER_VERTEX
, false, false),
5713 ctx
.shader
= shader
;
5714 ctx
.type
= PIPE_SHADER_VERTEX
;
5716 builder
= ctx
.ac
.builder
;
5718 create_function(&ctx
);
5719 preload_ring_buffers(&ctx
);
5721 LLVMValueRef voffset
=
5722 LLVMBuildMul(ctx
.ac
.builder
, ctx
.abi
.vertex_id
,
5723 LLVMConstInt(ctx
.i32
, 4, 0), "");
5725 /* Fetch the vertex stream ID.*/
5726 LLVMValueRef stream_id
;
5728 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
)
5729 stream_id
= si_unpack_param(&ctx
, ctx
.param_streamout_config
, 24, 2);
5731 stream_id
= ctx
.i32_0
;
5733 /* Fill in output information. */
5734 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5735 outputs
[i
].semantic_name
= gsinfo
->output_semantic_name
[i
];
5736 outputs
[i
].semantic_index
= gsinfo
->output_semantic_index
[i
];
5738 for (int chan
= 0; chan
< 4; chan
++) {
5739 outputs
[i
].vertex_stream
[chan
] =
5740 (gsinfo
->output_streams
[i
] >> (2 * chan
)) & 3;
5744 LLVMBasicBlockRef end_bb
;
5745 LLVMValueRef switch_inst
;
5747 end_bb
= LLVMAppendBasicBlockInContext(ctx
.ac
.context
, ctx
.main_fn
, "end");
5748 switch_inst
= LLVMBuildSwitch(builder
, stream_id
, end_bb
, 4);
5750 for (int stream
= 0; stream
< 4; stream
++) {
5751 LLVMBasicBlockRef bb
;
5754 if (!gsinfo
->num_stream_output_components
[stream
])
5757 if (stream
> 0 && !gs_selector
->so
.num_outputs
)
5760 bb
= LLVMInsertBasicBlockInContext(ctx
.ac
.context
, end_bb
, "out");
5761 LLVMAddCase(switch_inst
, LLVMConstInt(ctx
.i32
, stream
, 0), bb
);
5762 LLVMPositionBuilderAtEnd(builder
, bb
);
5764 /* Fetch vertex data from GSVS ring */
5766 for (i
= 0; i
< gsinfo
->num_outputs
; ++i
) {
5767 for (unsigned chan
= 0; chan
< 4; chan
++) {
5768 if (!(gsinfo
->output_usagemask
[i
] & (1 << chan
)) ||
5769 outputs
[i
].vertex_stream
[chan
] != stream
) {
5770 outputs
[i
].values
[chan
] = LLVMGetUndef(ctx
.f32
);
5774 LLVMValueRef soffset
= LLVMConstInt(ctx
.i32
,
5775 offset
* gs_selector
->gs_max_out_vertices
* 16 * 4, 0);
5778 outputs
[i
].values
[chan
] =
5779 ac_build_buffer_load(&ctx
.ac
,
5780 ctx
.gsvs_ring
[0], 1,
5782 soffset
, 0, ac_glc
| ac_slc
,
5787 /* Streamout and exports. */
5788 if (!sscreen
->use_ngg_streamout
&& gs_selector
->so
.num_outputs
) {
5789 si_llvm_emit_streamout(&ctx
, outputs
,
5790 gsinfo
->num_outputs
,
5795 si_llvm_export_vs(&ctx
, outputs
, gsinfo
->num_outputs
);
5797 LLVMBuildBr(builder
, end_bb
);
5800 LLVMPositionBuilderAtEnd(builder
, end_bb
);
5802 LLVMBuildRetVoid(ctx
.ac
.builder
);
5804 ctx
.type
= PIPE_SHADER_GEOMETRY
; /* override for shader dumping */
5805 si_llvm_optimize_module(&ctx
);
5808 if (si_compile_llvm(sscreen
, &ctx
.shader
->binary
,
5809 &ctx
.shader
->config
, ctx
.compiler
,
5811 debug
, PIPE_SHADER_GEOMETRY
, ctx
.ac
.wave_size
,
5812 "GS Copy Shader", false) == 0) {
5813 if (si_can_dump_shader(sscreen
, PIPE_SHADER_GEOMETRY
))
5814 fprintf(stderr
, "GS Copy Shader:\n");
5815 si_shader_dump(sscreen
, ctx
.shader
, debug
, stderr
, true);
5817 if (!ctx
.shader
->config
.scratch_bytes_per_wave
)
5818 ok
= si_shader_binary_upload(sscreen
, ctx
.shader
, 0);
5823 si_llvm_dispose(&ctx
);
5829 si_fix_resource_usage(sscreen
, shader
);
5834 static void si_dump_shader_key_vs(const struct si_shader_key
*key
,
5835 const struct si_vs_prolog_bits
*prolog
,
5836 const char *prefix
, FILE *f
)
5838 fprintf(f
, " %s.instance_divisor_is_one = %u\n",
5839 prefix
, prolog
->instance_divisor_is_one
);
5840 fprintf(f
, " %s.instance_divisor_is_fetched = %u\n",
5841 prefix
, prolog
->instance_divisor_is_fetched
);
5842 fprintf(f
, " %s.unpack_instance_id_from_vertex_id = %u\n",
5843 prefix
, prolog
->unpack_instance_id_from_vertex_id
);
5844 fprintf(f
, " %s.ls_vgpr_fix = %u\n",
5845 prefix
, prolog
->ls_vgpr_fix
);
5847 fprintf(f
, " mono.vs.fetch_opencode = %x\n", key
->mono
.vs_fetch_opencode
);
5848 fprintf(f
, " mono.vs.fix_fetch = {");
5849 for (int i
= 0; i
< SI_MAX_ATTRIBS
; i
++) {
5850 union si_vs_fix_fetch fix
= key
->mono
.vs_fix_fetch
[i
];
5856 fprintf(f
, "%u.%u.%u.%u", fix
.u
.reverse
, fix
.u
.log_size
,
5857 fix
.u
.num_channels_m1
, fix
.u
.format
);
5862 static void si_dump_shader_key(const struct si_shader
*shader
, FILE *f
)
5864 const struct si_shader_key
*key
= &shader
->key
;
5865 enum pipe_shader_type shader_type
= shader
->selector
->type
;
5867 fprintf(f
, "SHADER KEY\n");
5869 switch (shader_type
) {
5870 case PIPE_SHADER_VERTEX
:
5871 si_dump_shader_key_vs(key
, &key
->part
.vs
.prolog
,
5872 "part.vs.prolog", f
);
5873 fprintf(f
, " as_es = %u\n", key
->as_es
);
5874 fprintf(f
, " as_ls = %u\n", key
->as_ls
);
5875 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5876 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5877 key
->mono
.u
.vs_export_prim_id
);
5878 fprintf(f
, " opt.vs_as_prim_discard_cs = %u\n",
5879 key
->opt
.vs_as_prim_discard_cs
);
5880 fprintf(f
, " opt.cs_prim_type = %s\n",
5881 tgsi_primitive_names
[key
->opt
.cs_prim_type
]);
5882 fprintf(f
, " opt.cs_indexed = %u\n",
5883 key
->opt
.cs_indexed
);
5884 fprintf(f
, " opt.cs_instancing = %u\n",
5885 key
->opt
.cs_instancing
);
5886 fprintf(f
, " opt.cs_primitive_restart = %u\n",
5887 key
->opt
.cs_primitive_restart
);
5888 fprintf(f
, " opt.cs_provoking_vertex_first = %u\n",
5889 key
->opt
.cs_provoking_vertex_first
);
5890 fprintf(f
, " opt.cs_need_correct_orientation = %u\n",
5891 key
->opt
.cs_need_correct_orientation
);
5892 fprintf(f
, " opt.cs_cull_front = %u\n",
5893 key
->opt
.cs_cull_front
);
5894 fprintf(f
, " opt.cs_cull_back = %u\n",
5895 key
->opt
.cs_cull_back
);
5896 fprintf(f
, " opt.cs_cull_z = %u\n",
5897 key
->opt
.cs_cull_z
);
5898 fprintf(f
, " opt.cs_halfz_clip_space = %u\n",
5899 key
->opt
.cs_halfz_clip_space
);
5902 case PIPE_SHADER_TESS_CTRL
:
5903 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
) {
5904 si_dump_shader_key_vs(key
, &key
->part
.tcs
.ls_prolog
,
5905 "part.tcs.ls_prolog", f
);
5907 fprintf(f
, " part.tcs.epilog.prim_mode = %u\n", key
->part
.tcs
.epilog
.prim_mode
);
5908 fprintf(f
, " mono.u.ff_tcs_inputs_to_copy = 0x%"PRIx64
"\n", key
->mono
.u
.ff_tcs_inputs_to_copy
);
5911 case PIPE_SHADER_TESS_EVAL
:
5912 fprintf(f
, " as_es = %u\n", key
->as_es
);
5913 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5914 fprintf(f
, " mono.u.vs_export_prim_id = %u\n",
5915 key
->mono
.u
.vs_export_prim_id
);
5918 case PIPE_SHADER_GEOMETRY
:
5919 if (shader
->is_gs_copy_shader
)
5922 if (shader
->selector
->screen
->info
.chip_class
>= GFX9
&&
5923 key
->part
.gs
.es
->type
== PIPE_SHADER_VERTEX
) {
5924 si_dump_shader_key_vs(key
, &key
->part
.gs
.vs_prolog
,
5925 "part.gs.vs_prolog", f
);
5927 fprintf(f
, " part.gs.prolog.tri_strip_adj_fix = %u\n", key
->part
.gs
.prolog
.tri_strip_adj_fix
);
5928 fprintf(f
, " part.gs.prolog.gfx9_prev_is_vs = %u\n", key
->part
.gs
.prolog
.gfx9_prev_is_vs
);
5929 fprintf(f
, " as_ngg = %u\n", key
->as_ngg
);
5932 case PIPE_SHADER_COMPUTE
:
5935 case PIPE_SHADER_FRAGMENT
:
5936 fprintf(f
, " part.ps.prolog.color_two_side = %u\n", key
->part
.ps
.prolog
.color_two_side
);
5937 fprintf(f
, " part.ps.prolog.flatshade_colors = %u\n", key
->part
.ps
.prolog
.flatshade_colors
);
5938 fprintf(f
, " part.ps.prolog.poly_stipple = %u\n", key
->part
.ps
.prolog
.poly_stipple
);
5939 fprintf(f
, " part.ps.prolog.force_persp_sample_interp = %u\n", key
->part
.ps
.prolog
.force_persp_sample_interp
);
5940 fprintf(f
, " part.ps.prolog.force_linear_sample_interp = %u\n", key
->part
.ps
.prolog
.force_linear_sample_interp
);
5941 fprintf(f
, " part.ps.prolog.force_persp_center_interp = %u\n", key
->part
.ps
.prolog
.force_persp_center_interp
);
5942 fprintf(f
, " part.ps.prolog.force_linear_center_interp = %u\n", key
->part
.ps
.prolog
.force_linear_center_interp
);
5943 fprintf(f
, " part.ps.prolog.bc_optimize_for_persp = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_persp
);
5944 fprintf(f
, " part.ps.prolog.bc_optimize_for_linear = %u\n", key
->part
.ps
.prolog
.bc_optimize_for_linear
);
5945 fprintf(f
, " part.ps.prolog.samplemask_log_ps_iter = %u\n", key
->part
.ps
.prolog
.samplemask_log_ps_iter
);
5946 fprintf(f
, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key
->part
.ps
.epilog
.spi_shader_col_format
);
5947 fprintf(f
, " part.ps.epilog.color_is_int8 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int8
);
5948 fprintf(f
, " part.ps.epilog.color_is_int10 = 0x%X\n", key
->part
.ps
.epilog
.color_is_int10
);
5949 fprintf(f
, " part.ps.epilog.last_cbuf = %u\n", key
->part
.ps
.epilog
.last_cbuf
);
5950 fprintf(f
, " part.ps.epilog.alpha_func = %u\n", key
->part
.ps
.epilog
.alpha_func
);
5951 fprintf(f
, " part.ps.epilog.alpha_to_one = %u\n", key
->part
.ps
.epilog
.alpha_to_one
);
5952 fprintf(f
, " part.ps.epilog.poly_line_smoothing = %u\n", key
->part
.ps
.epilog
.poly_line_smoothing
);
5953 fprintf(f
, " part.ps.epilog.clamp_color = %u\n", key
->part
.ps
.epilog
.clamp_color
);
5954 fprintf(f
, " mono.u.ps.interpolate_at_sample_force_center = %u\n", key
->mono
.u
.ps
.interpolate_at_sample_force_center
);
5955 fprintf(f
, " mono.u.ps.fbfetch_msaa = %u\n", key
->mono
.u
.ps
.fbfetch_msaa
);
5956 fprintf(f
, " mono.u.ps.fbfetch_is_1D = %u\n", key
->mono
.u
.ps
.fbfetch_is_1D
);
5957 fprintf(f
, " mono.u.ps.fbfetch_layered = %u\n", key
->mono
.u
.ps
.fbfetch_layered
);
5964 if ((shader_type
== PIPE_SHADER_GEOMETRY
||
5965 shader_type
== PIPE_SHADER_TESS_EVAL
||
5966 shader_type
== PIPE_SHADER_VERTEX
) &&
5967 !key
->as_es
&& !key
->as_ls
) {
5968 fprintf(f
, " opt.kill_outputs = 0x%"PRIx64
"\n", key
->opt
.kill_outputs
);
5969 fprintf(f
, " opt.clip_disable = %u\n", key
->opt
.clip_disable
);
5973 static void si_init_shader_ctx(struct si_shader_context
*ctx
,
5974 struct si_screen
*sscreen
,
5975 struct ac_llvm_compiler
*compiler
,
5979 struct lp_build_tgsi_context
*bld_base
;
5981 si_llvm_context_init(ctx
, sscreen
, compiler
, wave_size
,
5982 nir
? 64 : wave_size
);
5984 bld_base
= &ctx
->bld_base
;
5985 bld_base
->emit_fetch_funcs
[TGSI_FILE_CONSTANT
] = fetch_constant
;
5987 bld_base
->op_actions
[TGSI_OPCODE_INTERP_CENTROID
].emit
= build_interp_intrinsic
;
5988 bld_base
->op_actions
[TGSI_OPCODE_INTERP_SAMPLE
].emit
= build_interp_intrinsic
;
5989 bld_base
->op_actions
[TGSI_OPCODE_INTERP_OFFSET
].emit
= build_interp_intrinsic
;
5991 bld_base
->op_actions
[TGSI_OPCODE_MEMBAR
].emit
= membar_emit
;
5993 bld_base
->op_actions
[TGSI_OPCODE_CLOCK
].emit
= clock_emit
;
5995 bld_base
->op_actions
[TGSI_OPCODE_DDX
].emit
= si_llvm_emit_ddxy
;
5996 bld_base
->op_actions
[TGSI_OPCODE_DDY
].emit
= si_llvm_emit_ddxy
;
5997 bld_base
->op_actions
[TGSI_OPCODE_DDX_FINE
].emit
= si_llvm_emit_ddxy
;
5998 bld_base
->op_actions
[TGSI_OPCODE_DDY_FINE
].emit
= si_llvm_emit_ddxy
;
6000 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ALL
].emit
= vote_all_emit
;
6001 bld_base
->op_actions
[TGSI_OPCODE_VOTE_ANY
].emit
= vote_any_emit
;
6002 bld_base
->op_actions
[TGSI_OPCODE_VOTE_EQ
].emit
= vote_eq_emit
;
6003 bld_base
->op_actions
[TGSI_OPCODE_BALLOT
].emit
= ballot_emit
;
6004 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].intr_name
= "llvm.amdgcn.readfirstlane";
6005 bld_base
->op_actions
[TGSI_OPCODE_READ_FIRST
].emit
= read_lane_emit
;
6006 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].intr_name
= "llvm.amdgcn.readlane";
6007 bld_base
->op_actions
[TGSI_OPCODE_READ_INVOC
].emit
= read_lane_emit
;
6009 bld_base
->op_actions
[TGSI_OPCODE_EMIT
].emit
= si_tgsi_emit_vertex
;
6010 bld_base
->op_actions
[TGSI_OPCODE_ENDPRIM
].emit
= si_tgsi_emit_primitive
;
6011 bld_base
->op_actions
[TGSI_OPCODE_BARRIER
].emit
= si_llvm_emit_barrier
;
6014 static void si_optimize_vs_outputs(struct si_shader_context
*ctx
)
6016 struct si_shader
*shader
= ctx
->shader
;
6017 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6019 if ((ctx
->type
!= PIPE_SHADER_VERTEX
&&
6020 ctx
->type
!= PIPE_SHADER_TESS_EVAL
) ||
6021 shader
->key
.as_ls
||
6025 ac_optimize_vs_outputs(&ctx
->ac
,
6027 shader
->info
.vs_output_param_offset
,
6029 &shader
->info
.nr_param_exports
);
6032 static void si_init_exec_from_input(struct si_shader_context
*ctx
,
6033 unsigned param
, unsigned bitoffset
)
6035 LLVMValueRef args
[] = {
6036 LLVMGetParam(ctx
->main_fn
, param
),
6037 LLVMConstInt(ctx
->i32
, bitoffset
, 0),
6039 ac_build_intrinsic(&ctx
->ac
,
6040 "llvm.amdgcn.init.exec.from.input",
6041 ctx
->voidt
, args
, 2, AC_FUNC_ATTR_CONVERGENT
);
6044 static bool si_vs_needs_prolog(const struct si_shader_selector
*sel
,
6045 const struct si_vs_prolog_bits
*key
)
6047 /* VGPR initialization fixup for Vega10 and Raven is always done in the
6049 return sel
->vs_needs_prolog
|| key
->ls_vgpr_fix
;
6052 static bool si_compile_tgsi_main(struct si_shader_context
*ctx
)
6054 struct si_shader
*shader
= ctx
->shader
;
6055 struct si_shader_selector
*sel
= shader
->selector
;
6056 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
6058 // TODO clean all this up!
6059 switch (ctx
->type
) {
6060 case PIPE_SHADER_VERTEX
:
6061 ctx
->load_input
= declare_input_vs
;
6062 if (shader
->key
.as_ls
)
6063 ctx
->abi
.emit_outputs
= si_llvm_emit_ls_epilogue
;
6064 else if (shader
->key
.as_es
)
6065 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6066 else if (shader
->key
.opt
.vs_as_prim_discard_cs
)
6067 ctx
->abi
.emit_outputs
= si_llvm_emit_prim_discard_cs_epilogue
;
6068 else if (shader
->key
.as_ngg
)
6069 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6071 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6072 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6073 ctx
->abi
.load_base_vertex
= get_base_vertex
;
6075 case PIPE_SHADER_TESS_CTRL
:
6076 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tcs
;
6077 ctx
->abi
.load_tess_varyings
= si_nir_load_tcs_varyings
;
6078 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6079 bld_base
->emit_fetch_funcs
[TGSI_FILE_OUTPUT
] = fetch_output_tcs
;
6080 bld_base
->emit_store
= store_output_tcs
;
6081 ctx
->abi
.store_tcs_outputs
= si_nir_store_output_tcs
;
6082 ctx
->abi
.emit_outputs
= si_llvm_emit_tcs_epilogue
;
6083 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6084 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6086 case PIPE_SHADER_TESS_EVAL
:
6087 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_tes
;
6088 ctx
->abi
.load_tess_varyings
= si_nir_load_input_tes
;
6089 ctx
->abi
.load_tess_coord
= si_load_tess_coord
;
6090 ctx
->abi
.load_tess_level
= si_load_tess_level
;
6091 ctx
->abi
.load_patch_vertices_in
= si_load_patch_vertices_in
;
6092 if (shader
->key
.as_es
)
6093 ctx
->abi
.emit_outputs
= si_llvm_emit_es_epilogue
;
6094 else if (shader
->key
.as_ngg
)
6095 ctx
->abi
.emit_outputs
= gfx10_emit_ngg_epilogue
;
6097 ctx
->abi
.emit_outputs
= si_llvm_emit_vs_epilogue
;
6098 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6100 case PIPE_SHADER_GEOMETRY
:
6101 bld_base
->emit_fetch_funcs
[TGSI_FILE_INPUT
] = fetch_input_gs
;
6102 ctx
->abi
.load_inputs
= si_nir_load_input_gs
;
6103 ctx
->abi
.emit_vertex
= si_llvm_emit_vertex
;
6104 ctx
->abi
.emit_primitive
= si_llvm_emit_primitive
;
6105 ctx
->abi
.emit_outputs
= si_llvm_emit_gs_epilogue
;
6106 bld_base
->emit_epilogue
= si_tgsi_emit_gs_epilogue
;
6108 case PIPE_SHADER_FRAGMENT
:
6109 ctx
->load_input
= declare_input_fs
;
6110 ctx
->abi
.emit_outputs
= si_llvm_return_fs_outputs
;
6111 bld_base
->emit_epilogue
= si_tgsi_emit_epilogue
;
6112 ctx
->abi
.lookup_interp_param
= si_nir_lookup_interp_param
;
6113 ctx
->abi
.load_sample_position
= load_sample_position
;
6114 ctx
->abi
.load_sample_mask_in
= load_sample_mask_in
;
6115 ctx
->abi
.emit_fbfetch
= si_nir_emit_fbfetch
;
6116 ctx
->abi
.emit_kill
= si_llvm_emit_kill
;
6118 case PIPE_SHADER_COMPUTE
:
6119 ctx
->abi
.load_local_group_size
= get_block_size
;
6122 assert(!"Unsupported shader type");
6126 ctx
->abi
.load_ubo
= load_ubo
;
6127 ctx
->abi
.load_ssbo
= load_ssbo
;
6129 create_function(ctx
);
6130 preload_ring_buffers(ctx
);
6132 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
&&
6133 sel
->tcs_info
.tessfactors_are_def_in_all_invocs
) {
6134 for (unsigned i
= 0; i
< 6; i
++) {
6135 ctx
->invoc0_tess_factors
[i
] =
6136 ac_build_alloca_undef(&ctx
->ac
, ctx
->i32
, "");
6140 if (ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6141 for (unsigned i
= 0; i
< 4; i
++) {
6142 ctx
->gs_next_vertex
[i
] =
6143 ac_build_alloca(&ctx
->ac
, ctx
->i32
, "");
6145 if (shader
->key
.as_ngg
) {
6146 for (unsigned i
= 0; i
< 4; ++i
) {
6147 ctx
->gs_curprim_verts
[i
] =
6148 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6149 ctx
->gs_generated_prims
[i
] =
6150 ac_build_alloca(&ctx
->ac
, ctx
->ac
.i32
, "");
6153 unsigned scratch_size
= 8;
6154 if (sel
->so
.num_outputs
)
6157 LLVMTypeRef ai32
= LLVMArrayType(ctx
->i32
, scratch_size
);
6158 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6159 ai32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6160 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(ai32
));
6161 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6163 ctx
->gs_ngg_emit
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6164 LLVMArrayType(ctx
->i32
, 0), "ngg_emit", AC_ADDR_SPACE_LDS
);
6165 LLVMSetLinkage(ctx
->gs_ngg_emit
, LLVMExternalLinkage
);
6166 LLVMSetAlignment(ctx
->gs_ngg_emit
, 4);
6170 if (ctx
->type
!= PIPE_SHADER_GEOMETRY
&&
6171 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6172 /* Unconditionally declare scratch space base for streamout and
6173 * vertex compaction. Whether space is actually allocated is
6174 * determined during linking / PM4 creation.
6176 * Add an extra dword per vertex to ensure an odd stride, which
6177 * avoids bank conflicts for SoA accesses.
6179 declare_esgs_ring(ctx
);
6181 /* This is really only needed when streamout and / or vertex
6182 * compaction is enabled.
6184 LLVMTypeRef asi32
= LLVMArrayType(ctx
->i32
, 8);
6185 ctx
->gs_ngg_scratch
= LLVMAddGlobalInAddressSpace(ctx
->ac
.module
,
6186 asi32
, "ngg_scratch", AC_ADDR_SPACE_LDS
);
6187 LLVMSetInitializer(ctx
->gs_ngg_scratch
, LLVMGetUndef(asi32
));
6188 LLVMSetAlignment(ctx
->gs_ngg_scratch
, 4);
6191 /* For GFX9 merged shaders:
6192 * - Set EXEC for the first shader. If the prolog is present, set
6193 * EXEC there instead.
6194 * - Add a barrier before the second shader.
6195 * - In the second shader, reset EXEC to ~0 and wrap the main part in
6196 * an if-statement. This is required for correctness in geometry
6197 * shaders, to ensure that empty GS waves do not send GS_EMIT and
6200 * For monolithic merged shaders, the first shader is wrapped in an
6201 * if-block together with its prolog in si_build_wrapper_function.
6203 * NGG vertex and tess eval shaders running as the last
6204 * vertex/geometry stage handle execution explicitly using
6207 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6208 if (!shader
->is_monolithic
&&
6209 sel
->info
.num_instructions
> 1 && /* not empty shader */
6210 (shader
->key
.as_es
|| shader
->key
.as_ls
) &&
6211 (ctx
->type
== PIPE_SHADER_TESS_EVAL
||
6212 (ctx
->type
== PIPE_SHADER_VERTEX
&&
6213 !si_vs_needs_prolog(sel
, &shader
->key
.part
.vs
.prolog
)))) {
6214 si_init_exec_from_input(ctx
,
6215 ctx
->param_merged_wave_info
, 0);
6216 } else if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6217 ctx
->type
== PIPE_SHADER_GEOMETRY
||
6218 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)) {
6219 LLVMValueRef num_threads
;
6220 bool nested_barrier
;
6222 if (!shader
->is_monolithic
||
6223 (ctx
->type
== PIPE_SHADER_TESS_EVAL
&&
6224 (shader
->key
.as_ngg
&& !shader
->key
.as_es
)))
6225 ac_init_exec_full_mask(&ctx
->ac
);
6227 if (ctx
->type
== PIPE_SHADER_TESS_CTRL
||
6228 ctx
->type
== PIPE_SHADER_GEOMETRY
) {
6229 if (ctx
->type
== PIPE_SHADER_GEOMETRY
&& shader
->key
.as_ngg
) {
6230 gfx10_ngg_gs_emit_prologue(ctx
);
6231 nested_barrier
= false;
6233 nested_barrier
= true;
6236 /* Number of patches / primitives */
6237 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 8, 8);
6239 /* Number of vertices */
6240 num_threads
= si_unpack_param(ctx
, ctx
->param_merged_wave_info
, 0, 8);
6241 nested_barrier
= false;
6245 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
6246 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
6248 ctx
->merged_wrap_if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
6249 ctx
->merged_wrap_if_label
= 11500;
6250 ac_build_ifcc(&ctx
->ac
, ena
, ctx
->merged_wrap_if_label
);
6252 if (nested_barrier
) {
6253 /* Execute a barrier before the second shader in
6256 * Execute the barrier inside the conditional block,
6257 * so that empty waves can jump directly to s_endpgm,
6258 * which will also signal the barrier.
6260 * This is possible in gfx9, because an empty wave
6261 * for the second shader does not participate in
6262 * the epilogue. With NGG, empty waves may still
6263 * be required to export data (e.g. GS output vertices),
6264 * so we cannot let them exit early.
6266 * If the shader is TCS and the TCS epilog is present
6267 * and contains a barrier, it will wait there and then
6270 si_llvm_emit_barrier(NULL
, bld_base
, NULL
);
6275 if (sel
->force_correct_derivs_after_kill
) {
6276 ctx
->postponed_kill
= ac_build_alloca_undef(&ctx
->ac
, ctx
->i1
, "");
6277 /* true = don't kill. */
6278 LLVMBuildStore(ctx
->ac
.builder
, ctx
->i1true
,
6279 ctx
->postponed_kill
);
6283 if (!lp_build_tgsi_llvm(bld_base
, sel
->tokens
)) {
6284 fprintf(stderr
, "Failed to translate shader from TGSI to LLVM\n");
6288 if (!si_nir_build_llvm(ctx
, sel
->nir
)) {
6289 fprintf(stderr
, "Failed to translate shader from NIR to LLVM\n");
6294 si_llvm_build_ret(ctx
, ctx
->return_value
);
6299 * Compute the VS prolog key, which contains all the information needed to
6300 * build the VS prolog function, and set shader->info bits where needed.
6302 * \param info Shader info of the vertex shader.
6303 * \param num_input_sgprs Number of input SGPRs for the vertex shader.
6304 * \param prolog_key Key of the VS prolog
6305 * \param shader_out The vertex shader, or the next shader if merging LS+HS or ES+GS.
6306 * \param key Output shader part key.
6308 static void si_get_vs_prolog_key(const struct tgsi_shader_info
*info
,
6309 unsigned num_input_sgprs
,
6310 const struct si_vs_prolog_bits
*prolog_key
,
6311 struct si_shader
*shader_out
,
6312 union si_shader_part_key
*key
)
6314 memset(key
, 0, sizeof(*key
));
6315 key
->vs_prolog
.states
= *prolog_key
;
6316 key
->vs_prolog
.num_input_sgprs
= num_input_sgprs
;
6317 key
->vs_prolog
.last_input
= MAX2(1, info
->num_inputs
) - 1;
6318 key
->vs_prolog
.as_ls
= shader_out
->key
.as_ls
;
6319 key
->vs_prolog
.as_es
= shader_out
->key
.as_es
;
6320 key
->vs_prolog
.as_ngg
= shader_out
->key
.as_ngg
;
6322 if (shader_out
->selector
->type
== PIPE_SHADER_TESS_CTRL
) {
6323 key
->vs_prolog
.as_ls
= 1;
6324 key
->vs_prolog
.num_merged_next_stage_vgprs
= 2;
6325 } else if (shader_out
->selector
->type
== PIPE_SHADER_GEOMETRY
) {
6326 key
->vs_prolog
.as_es
= 1;
6327 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6328 } else if (shader_out
->key
.as_ngg
) {
6329 key
->vs_prolog
.num_merged_next_stage_vgprs
= 5;
6332 /* Enable loading the InstanceID VGPR. */
6333 uint16_t input_mask
= u_bit_consecutive(0, info
->num_inputs
);
6335 if ((key
->vs_prolog
.states
.instance_divisor_is_one
|
6336 key
->vs_prolog
.states
.instance_divisor_is_fetched
) & input_mask
)
6337 shader_out
->info
.uses_instanceid
= true;
6341 * Compute the PS prolog key, which contains all the information needed to
6342 * build the PS prolog function, and set related bits in shader->config.
6344 static void si_get_ps_prolog_key(struct si_shader
*shader
,
6345 union si_shader_part_key
*key
,
6346 bool separate_prolog
)
6348 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6350 memset(key
, 0, sizeof(*key
));
6351 key
->ps_prolog
.states
= shader
->key
.part
.ps
.prolog
;
6352 key
->ps_prolog
.colors_read
= info
->colors_read
;
6353 key
->ps_prolog
.num_input_sgprs
= shader
->info
.num_input_sgprs
;
6354 key
->ps_prolog
.num_input_vgprs
= shader
->info
.num_input_vgprs
;
6355 key
->ps_prolog
.wqm
= info
->uses_derivatives
&&
6356 (key
->ps_prolog
.colors_read
||
6357 key
->ps_prolog
.states
.force_persp_sample_interp
||
6358 key
->ps_prolog
.states
.force_linear_sample_interp
||
6359 key
->ps_prolog
.states
.force_persp_center_interp
||
6360 key
->ps_prolog
.states
.force_linear_center_interp
||
6361 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6362 key
->ps_prolog
.states
.bc_optimize_for_linear
);
6363 key
->ps_prolog
.ancillary_vgpr_index
= shader
->info
.ancillary_vgpr_index
;
6365 if (info
->colors_read
) {
6366 unsigned *color
= shader
->selector
->color_attr_index
;
6368 if (shader
->key
.part
.ps
.prolog
.color_two_side
) {
6369 /* BCOLORs are stored after the last input. */
6370 key
->ps_prolog
.num_interp_inputs
= info
->num_inputs
;
6371 key
->ps_prolog
.face_vgpr_index
= shader
->info
.face_vgpr_index
;
6372 if (separate_prolog
)
6373 shader
->config
.spi_ps_input_ena
|= S_0286CC_FRONT_FACE_ENA(1);
6376 for (unsigned i
= 0; i
< 2; i
++) {
6377 unsigned interp
= info
->input_interpolate
[color
[i
]];
6378 unsigned location
= info
->input_interpolate_loc
[color
[i
]];
6380 if (!(info
->colors_read
& (0xf << i
*4)))
6383 key
->ps_prolog
.color_attr_index
[i
] = color
[i
];
6385 if (shader
->key
.part
.ps
.prolog
.flatshade_colors
&&
6386 interp
== TGSI_INTERPOLATE_COLOR
)
6387 interp
= TGSI_INTERPOLATE_CONSTANT
;
6390 case TGSI_INTERPOLATE_CONSTANT
:
6391 key
->ps_prolog
.color_interp_vgpr_index
[i
] = -1;
6393 case TGSI_INTERPOLATE_PERSPECTIVE
:
6394 case TGSI_INTERPOLATE_COLOR
:
6395 /* Force the interpolation location for colors here. */
6396 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
)
6397 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6398 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
)
6399 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6402 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6403 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 0;
6404 if (separate_prolog
) {
6405 shader
->config
.spi_ps_input_ena
|=
6406 S_0286CC_PERSP_SAMPLE_ENA(1);
6409 case TGSI_INTERPOLATE_LOC_CENTER
:
6410 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 2;
6411 if (separate_prolog
) {
6412 shader
->config
.spi_ps_input_ena
|=
6413 S_0286CC_PERSP_CENTER_ENA(1);
6416 case TGSI_INTERPOLATE_LOC_CENTROID
:
6417 key
->ps_prolog
.color_interp_vgpr_index
[i
] = 4;
6418 if (separate_prolog
) {
6419 shader
->config
.spi_ps_input_ena
|=
6420 S_0286CC_PERSP_CENTROID_ENA(1);
6427 case TGSI_INTERPOLATE_LINEAR
:
6428 /* Force the interpolation location for colors here. */
6429 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
)
6430 location
= TGSI_INTERPOLATE_LOC_SAMPLE
;
6431 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
)
6432 location
= TGSI_INTERPOLATE_LOC_CENTER
;
6434 /* The VGPR assignment for non-monolithic shaders
6435 * works because InitialPSInputAddr is set on the
6436 * main shader and PERSP_PULL_MODEL is never used.
6439 case TGSI_INTERPOLATE_LOC_SAMPLE
:
6440 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6441 separate_prolog
? 6 : 9;
6442 if (separate_prolog
) {
6443 shader
->config
.spi_ps_input_ena
|=
6444 S_0286CC_LINEAR_SAMPLE_ENA(1);
6447 case TGSI_INTERPOLATE_LOC_CENTER
:
6448 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6449 separate_prolog
? 8 : 11;
6450 if (separate_prolog
) {
6451 shader
->config
.spi_ps_input_ena
|=
6452 S_0286CC_LINEAR_CENTER_ENA(1);
6455 case TGSI_INTERPOLATE_LOC_CENTROID
:
6456 key
->ps_prolog
.color_interp_vgpr_index
[i
] =
6457 separate_prolog
? 10 : 13;
6458 if (separate_prolog
) {
6459 shader
->config
.spi_ps_input_ena
|=
6460 S_0286CC_LINEAR_CENTROID_ENA(1);
6475 * Check whether a PS prolog is required based on the key.
6477 static bool si_need_ps_prolog(const union si_shader_part_key
*key
)
6479 return key
->ps_prolog
.colors_read
||
6480 key
->ps_prolog
.states
.force_persp_sample_interp
||
6481 key
->ps_prolog
.states
.force_linear_sample_interp
||
6482 key
->ps_prolog
.states
.force_persp_center_interp
||
6483 key
->ps_prolog
.states
.force_linear_center_interp
||
6484 key
->ps_prolog
.states
.bc_optimize_for_persp
||
6485 key
->ps_prolog
.states
.bc_optimize_for_linear
||
6486 key
->ps_prolog
.states
.poly_stipple
||
6487 key
->ps_prolog
.states
.samplemask_log_ps_iter
;
6491 * Compute the PS epilog key, which contains all the information needed to
6492 * build the PS epilog function.
6494 static void si_get_ps_epilog_key(struct si_shader
*shader
,
6495 union si_shader_part_key
*key
)
6497 struct tgsi_shader_info
*info
= &shader
->selector
->info
;
6498 memset(key
, 0, sizeof(*key
));
6499 key
->ps_epilog
.colors_written
= info
->colors_written
;
6500 key
->ps_epilog
.writes_z
= info
->writes_z
;
6501 key
->ps_epilog
.writes_stencil
= info
->writes_stencil
;
6502 key
->ps_epilog
.writes_samplemask
= info
->writes_samplemask
;
6503 key
->ps_epilog
.states
= shader
->key
.part
.ps
.epilog
;
6507 * Build the GS prolog function. Rotate the input vertices for triangle strips
6510 static void si_build_gs_prolog_function(struct si_shader_context
*ctx
,
6511 union si_shader_part_key
*key
)
6513 unsigned num_sgprs
, num_vgprs
;
6514 struct si_function_info fninfo
;
6515 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6516 LLVMTypeRef returns
[48];
6517 LLVMValueRef func
, ret
;
6519 si_init_function_info(&fninfo
);
6521 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6522 if (key
->gs_prolog
.states
.gfx9_prev_is_vs
)
6523 num_sgprs
= 8 + GFX9_VSGS_NUM_USER_SGPR
;
6525 num_sgprs
= 8 + GFX9_TESGS_NUM_USER_SGPR
;
6526 num_vgprs
= 5; /* ES inputs are not needed by GS */
6528 num_sgprs
= GFX6_GS_NUM_USER_SGPR
+ 2;
6532 for (unsigned i
= 0; i
< num_sgprs
; ++i
) {
6533 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
6534 returns
[i
] = ctx
->i32
;
6537 for (unsigned i
= 0; i
< num_vgprs
; ++i
) {
6538 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
);
6539 returns
[num_sgprs
+ i
] = ctx
->f32
;
6542 /* Create the function. */
6543 si_create_function(ctx
, "gs_prolog", returns
, num_sgprs
+ num_vgprs
,
6545 func
= ctx
->main_fn
;
6547 /* Set the full EXEC mask for the prolog, because we are only fiddling
6548 * with registers here. The main shader part will set the correct EXEC
6551 if (ctx
->screen
->info
.chip_class
>= GFX9
&& !key
->gs_prolog
.is_monolithic
)
6552 ac_init_exec_full_mask(&ctx
->ac
);
6554 /* Copy inputs to outputs. This should be no-op, as the registers match,
6555 * but it will prevent the compiler from overwriting them unintentionally.
6557 ret
= ctx
->return_value
;
6558 for (unsigned i
= 0; i
< num_sgprs
; i
++) {
6559 LLVMValueRef p
= LLVMGetParam(func
, i
);
6560 ret
= LLVMBuildInsertValue(builder
, ret
, p
, i
, "");
6562 for (unsigned i
= 0; i
< num_vgprs
; i
++) {
6563 LLVMValueRef p
= LLVMGetParam(func
, num_sgprs
+ i
);
6564 p
= ac_to_float(&ctx
->ac
, p
);
6565 ret
= LLVMBuildInsertValue(builder
, ret
, p
, num_sgprs
+ i
, "");
6568 if (key
->gs_prolog
.states
.tri_strip_adj_fix
) {
6569 /* Remap the input vertices for every other primitive. */
6570 const unsigned gfx6_vtx_params
[6] = {
6578 const unsigned gfx9_vtx_params
[3] = {
6583 LLVMValueRef vtx_in
[6], vtx_out
[6];
6584 LLVMValueRef prim_id
, rotate
;
6586 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6587 for (unsigned i
= 0; i
< 3; i
++) {
6588 vtx_in
[i
*2] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 0, 16);
6589 vtx_in
[i
*2+1] = si_unpack_param(ctx
, gfx9_vtx_params
[i
], 16, 16);
6592 for (unsigned i
= 0; i
< 6; i
++)
6593 vtx_in
[i
] = LLVMGetParam(func
, gfx6_vtx_params
[i
]);
6596 prim_id
= LLVMGetParam(func
, num_sgprs
+ 2);
6597 rotate
= LLVMBuildTrunc(builder
, prim_id
, ctx
->i1
, "");
6599 for (unsigned i
= 0; i
< 6; ++i
) {
6600 LLVMValueRef base
, rotated
;
6602 rotated
= vtx_in
[(i
+ 4) % 6];
6603 vtx_out
[i
] = LLVMBuildSelect(builder
, rotate
, rotated
, base
, "");
6606 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
6607 for (unsigned i
= 0; i
< 3; i
++) {
6608 LLVMValueRef hi
, out
;
6610 hi
= LLVMBuildShl(builder
, vtx_out
[i
*2+1],
6611 LLVMConstInt(ctx
->i32
, 16, 0), "");
6612 out
= LLVMBuildOr(builder
, vtx_out
[i
*2], hi
, "");
6613 out
= ac_to_float(&ctx
->ac
, out
);
6614 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6615 gfx9_vtx_params
[i
], "");
6618 for (unsigned i
= 0; i
< 6; i
++) {
6621 out
= ac_to_float(&ctx
->ac
, vtx_out
[i
]);
6622 ret
= LLVMBuildInsertValue(builder
, ret
, out
,
6623 gfx6_vtx_params
[i
], "");
6628 LLVMBuildRet(builder
, ret
);
6632 * Given a list of shader part functions, build a wrapper function that
6633 * runs them in sequence to form a monolithic shader.
6635 static void si_build_wrapper_function(struct si_shader_context
*ctx
,
6636 LLVMValueRef
*parts
,
6639 unsigned next_shader_first_part
)
6641 LLVMBuilderRef builder
= ctx
->ac
.builder
;
6642 /* PS epilog has one arg per color component; gfx9 merged shader
6643 * prologs need to forward 32 user SGPRs.
6645 struct si_function_info fninfo
;
6646 LLVMValueRef initial
[64], out
[64];
6647 LLVMTypeRef function_type
;
6648 unsigned num_first_params
;
6649 unsigned num_out
, initial_num_out
;
6650 ASSERTED
unsigned num_out_sgpr
; /* used in debug checks */
6651 ASSERTED
unsigned initial_num_out_sgpr
; /* used in debug checks */
6652 unsigned num_sgprs
, num_vgprs
;
6655 si_init_function_info(&fninfo
);
6657 for (unsigned i
= 0; i
< num_parts
; ++i
) {
6658 ac_add_function_attr(ctx
->ac
.context
, parts
[i
], -1,
6659 AC_FUNC_ATTR_ALWAYSINLINE
);
6660 LLVMSetLinkage(parts
[i
], LLVMPrivateLinkage
);
6663 /* The parameters of the wrapper function correspond to those of the
6664 * first part in terms of SGPRs and VGPRs, but we use the types of the
6665 * main part to get the right types. This is relevant for the
6666 * dereferenceable attribute on descriptor table pointers.
6671 function_type
= LLVMGetElementType(LLVMTypeOf(parts
[0]));
6672 num_first_params
= LLVMCountParamTypes(function_type
);
6674 for (unsigned i
= 0; i
< num_first_params
; ++i
) {
6675 LLVMValueRef param
= LLVMGetParam(parts
[0], i
);
6677 if (ac_is_sgpr_param(param
)) {
6678 assert(num_vgprs
== 0);
6679 num_sgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6681 num_vgprs
+= ac_get_type_size(LLVMTypeOf(param
)) / 4;
6686 while (gprs
< num_sgprs
+ num_vgprs
) {
6687 LLVMValueRef param
= LLVMGetParam(parts
[main_part
], fninfo
.num_params
);
6688 LLVMTypeRef type
= LLVMTypeOf(param
);
6689 unsigned size
= ac_get_type_size(type
) / 4;
6691 add_arg(&fninfo
, gprs
< num_sgprs
? ARG_SGPR
: ARG_VGPR
, type
);
6693 assert(ac_is_sgpr_param(param
) == (gprs
< num_sgprs
));
6694 assert(gprs
+ size
<= num_sgprs
+ num_vgprs
&&
6695 (gprs
>= num_sgprs
|| gprs
+ size
<= num_sgprs
));
6700 /* Prepare the return type. */
6701 unsigned num_returns
= 0;
6702 LLVMTypeRef returns
[32], last_func_type
, return_type
;
6704 last_func_type
= LLVMGetElementType(LLVMTypeOf(parts
[num_parts
- 1]));
6705 return_type
= LLVMGetReturnType(last_func_type
);
6707 switch (LLVMGetTypeKind(return_type
)) {
6708 case LLVMStructTypeKind
:
6709 num_returns
= LLVMCountStructElementTypes(return_type
);
6710 assert(num_returns
<= ARRAY_SIZE(returns
));
6711 LLVMGetStructElementTypes(return_type
, returns
);
6713 case LLVMVoidTypeKind
:
6716 unreachable("unexpected type");
6719 si_create_function(ctx
, "wrapper", returns
, num_returns
, &fninfo
,
6720 si_get_max_workgroup_size(ctx
->shader
));
6722 if (is_merged_shader(ctx
))
6723 ac_init_exec_full_mask(&ctx
->ac
);
6725 /* Record the arguments of the function as if they were an output of
6731 for (unsigned i
= 0; i
< fninfo
.num_params
; ++i
) {
6732 LLVMValueRef param
= LLVMGetParam(ctx
->main_fn
, i
);
6733 LLVMTypeRef param_type
= LLVMTypeOf(param
);
6734 LLVMTypeRef out_type
= i
< fninfo
.num_sgpr_params
? ctx
->i32
: ctx
->f32
;
6735 unsigned size
= ac_get_type_size(param_type
) / 4;
6738 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6739 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i32
, "");
6740 param_type
= ctx
->i32
;
6743 if (param_type
!= out_type
)
6744 param
= LLVMBuildBitCast(builder
, param
, out_type
, "");
6745 out
[num_out
++] = param
;
6747 LLVMTypeRef vector_type
= LLVMVectorType(out_type
, size
);
6749 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6750 param
= LLVMBuildPtrToInt(builder
, param
, ctx
->i64
, "");
6751 param_type
= ctx
->i64
;
6754 if (param_type
!= vector_type
)
6755 param
= LLVMBuildBitCast(builder
, param
, vector_type
, "");
6757 for (unsigned j
= 0; j
< size
; ++j
)
6758 out
[num_out
++] = LLVMBuildExtractElement(
6759 builder
, param
, LLVMConstInt(ctx
->i32
, j
, 0), "");
6762 if (i
< fninfo
.num_sgpr_params
)
6763 num_out_sgpr
= num_out
;
6766 memcpy(initial
, out
, sizeof(out
));
6767 initial_num_out
= num_out
;
6768 initial_num_out_sgpr
= num_out_sgpr
;
6770 /* Now chain the parts. */
6771 LLVMValueRef ret
= NULL
;
6772 for (unsigned part
= 0; part
< num_parts
; ++part
) {
6773 LLVMValueRef in
[48];
6774 LLVMTypeRef ret_type
;
6775 unsigned out_idx
= 0;
6776 unsigned num_params
= LLVMCountParams(parts
[part
]);
6778 /* Merged shaders are executed conditionally depending
6779 * on the number of enabled threads passed in the input SGPRs. */
6780 if (is_multi_part_shader(ctx
) && part
== 0) {
6781 LLVMValueRef ena
, count
= initial
[3];
6783 count
= LLVMBuildAnd(builder
, count
,
6784 LLVMConstInt(ctx
->i32
, 0x7f, 0), "");
6785 ena
= LLVMBuildICmp(builder
, LLVMIntULT
,
6786 ac_get_thread_id(&ctx
->ac
), count
, "");
6787 ac_build_ifcc(&ctx
->ac
, ena
, 6506);
6790 /* Derive arguments for the next part from outputs of the
6793 for (unsigned param_idx
= 0; param_idx
< num_params
; ++param_idx
) {
6795 LLVMTypeRef param_type
;
6797 unsigned param_size
;
6798 LLVMValueRef arg
= NULL
;
6800 param
= LLVMGetParam(parts
[part
], param_idx
);
6801 param_type
= LLVMTypeOf(param
);
6802 param_size
= ac_get_type_size(param_type
) / 4;
6803 is_sgpr
= ac_is_sgpr_param(param
);
6806 ac_add_function_attr(ctx
->ac
.context
, parts
[part
],
6807 param_idx
+ 1, AC_FUNC_ATTR_INREG
);
6808 } else if (out_idx
< num_out_sgpr
) {
6809 /* Skip returned SGPRs the current part doesn't
6810 * declare on the input. */
6811 out_idx
= num_out_sgpr
;
6814 assert(out_idx
+ param_size
<= (is_sgpr
? num_out_sgpr
: num_out
));
6816 if (param_size
== 1)
6819 arg
= ac_build_gather_values(&ctx
->ac
, &out
[out_idx
], param_size
);
6821 if (LLVMTypeOf(arg
) != param_type
) {
6822 if (LLVMGetTypeKind(param_type
) == LLVMPointerTypeKind
) {
6823 if (LLVMGetPointerAddressSpace(param_type
) ==
6824 AC_ADDR_SPACE_CONST_32BIT
) {
6825 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i32
, "");
6826 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6828 arg
= LLVMBuildBitCast(builder
, arg
, ctx
->i64
, "");
6829 arg
= LLVMBuildIntToPtr(builder
, arg
, param_type
, "");
6832 arg
= LLVMBuildBitCast(builder
, arg
, param_type
, "");
6836 in
[param_idx
] = arg
;
6837 out_idx
+= param_size
;
6840 ret
= ac_build_call(&ctx
->ac
, parts
[part
], in
, num_params
);
6842 if (is_multi_part_shader(ctx
) &&
6843 part
+ 1 == next_shader_first_part
) {
6844 ac_build_endif(&ctx
->ac
, 6506);
6846 /* The second half of the merged shader should use
6847 * the inputs from the toplevel (wrapper) function,
6848 * not the return value from the last call.
6850 * That's because the last call was executed condi-
6851 * tionally, so we can't consume it in the main
6854 memcpy(out
, initial
, sizeof(initial
));
6855 num_out
= initial_num_out
;
6856 num_out_sgpr
= initial_num_out_sgpr
;
6860 /* Extract the returned GPRs. */
6861 ret_type
= LLVMTypeOf(ret
);
6865 if (LLVMGetTypeKind(ret_type
) != LLVMVoidTypeKind
) {
6866 assert(LLVMGetTypeKind(ret_type
) == LLVMStructTypeKind
);
6868 unsigned ret_size
= LLVMCountStructElementTypes(ret_type
);
6870 for (unsigned i
= 0; i
< ret_size
; ++i
) {
6872 LLVMBuildExtractValue(builder
, ret
, i
, "");
6874 assert(num_out
< ARRAY_SIZE(out
));
6875 out
[num_out
++] = val
;
6877 if (LLVMTypeOf(val
) == ctx
->i32
) {
6878 assert(num_out_sgpr
+ 1 == num_out
);
6879 num_out_sgpr
= num_out
;
6885 /* Return the value from the last part. */
6886 if (LLVMGetTypeKind(LLVMTypeOf(ret
)) == LLVMVoidTypeKind
)
6887 LLVMBuildRetVoid(builder
);
6889 LLVMBuildRet(builder
, ret
);
6892 static bool si_should_optimize_less(struct ac_llvm_compiler
*compiler
,
6893 struct si_shader_selector
*sel
)
6895 if (!compiler
->low_opt_passes
)
6898 /* Assume a slow CPU. */
6899 assert(!sel
->screen
->info
.has_dedicated_vram
&&
6900 sel
->screen
->info
.chip_class
<= GFX8
);
6902 /* For a crazy dEQP test containing 2597 memory opcodes, mostly
6904 return sel
->type
== PIPE_SHADER_COMPUTE
&&
6905 sel
->info
.num_memory_instructions
> 1000;
6908 int si_compile_tgsi_shader(struct si_screen
*sscreen
,
6909 struct ac_llvm_compiler
*compiler
,
6910 struct si_shader
*shader
,
6911 struct pipe_debug_callback
*debug
)
6913 struct si_shader_selector
*sel
= shader
->selector
;
6914 struct si_shader_context ctx
;
6917 /* Dump TGSI code before doing TGSI->LLVM conversion in case the
6918 * conversion fails. */
6919 if (si_can_dump_shader(sscreen
, sel
->type
) &&
6920 !(sscreen
->debug_flags
& DBG(NO_TGSI
))) {
6922 tgsi_dump(sel
->tokens
, 0);
6924 nir_print_shader(sel
->nir
, stderr
);
6925 si_dump_streamout(&sel
->so
);
6928 si_init_shader_ctx(&ctx
, sscreen
, compiler
, si_get_shader_wave_size(shader
),
6930 si_llvm_context_set_ir(&ctx
, shader
);
6932 memset(shader
->info
.vs_output_param_offset
, AC_EXP_PARAM_UNDEFINED
,
6933 sizeof(shader
->info
.vs_output_param_offset
));
6935 shader
->info
.uses_instanceid
= sel
->info
.uses_instanceid
;
6937 if (!si_compile_tgsi_main(&ctx
)) {
6938 si_llvm_dispose(&ctx
);
6942 if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_VERTEX
) {
6943 LLVMValueRef parts
[2];
6944 bool need_prolog
= sel
->vs_needs_prolog
;
6946 parts
[1] = ctx
.main_fn
;
6949 union si_shader_part_key prolog_key
;
6950 si_get_vs_prolog_key(&sel
->info
,
6951 shader
->info
.num_input_sgprs
,
6952 &shader
->key
.part
.vs
.prolog
,
6953 shader
, &prolog_key
);
6954 si_build_vs_prolog_function(&ctx
, &prolog_key
);
6955 parts
[0] = ctx
.main_fn
;
6958 si_build_wrapper_function(&ctx
, parts
+ !need_prolog
,
6959 1 + need_prolog
, need_prolog
, 0);
6961 if (ctx
.shader
->key
.opt
.vs_as_prim_discard_cs
)
6962 si_build_prim_discard_compute_shader(&ctx
);
6963 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_TESS_CTRL
) {
6964 if (sscreen
->info
.chip_class
>= GFX9
) {
6965 struct si_shader_selector
*ls
= shader
->key
.part
.tcs
.ls
;
6966 LLVMValueRef parts
[4];
6967 bool vs_needs_prolog
=
6968 si_vs_needs_prolog(ls
, &shader
->key
.part
.tcs
.ls_prolog
);
6971 parts
[2] = ctx
.main_fn
;
6974 union si_shader_part_key tcs_epilog_key
;
6975 memset(&tcs_epilog_key
, 0, sizeof(tcs_epilog_key
));
6976 tcs_epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
6977 si_build_tcs_epilog_function(&ctx
, &tcs_epilog_key
);
6978 parts
[3] = ctx
.main_fn
;
6980 /* VS as LS main part */
6981 struct si_shader shader_ls
= {};
6982 shader_ls
.selector
= ls
;
6983 shader_ls
.key
.as_ls
= 1;
6984 shader_ls
.key
.mono
= shader
->key
.mono
;
6985 shader_ls
.key
.opt
= shader
->key
.opt
;
6986 shader_ls
.is_monolithic
= true;
6987 si_llvm_context_set_ir(&ctx
, &shader_ls
);
6989 if (!si_compile_tgsi_main(&ctx
)) {
6990 si_llvm_dispose(&ctx
);
6993 shader
->info
.uses_instanceid
|= ls
->info
.uses_instanceid
;
6994 parts
[1] = ctx
.main_fn
;
6997 if (vs_needs_prolog
) {
6998 union si_shader_part_key vs_prolog_key
;
6999 si_get_vs_prolog_key(&ls
->info
,
7000 shader_ls
.info
.num_input_sgprs
,
7001 &shader
->key
.part
.tcs
.ls_prolog
,
7002 shader
, &vs_prolog_key
);
7003 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7004 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7005 parts
[0] = ctx
.main_fn
;
7008 /* Reset the shader context. */
7009 ctx
.shader
= shader
;
7010 ctx
.type
= PIPE_SHADER_TESS_CTRL
;
7012 si_build_wrapper_function(&ctx
,
7013 parts
+ !vs_needs_prolog
,
7014 4 - !vs_needs_prolog
, vs_needs_prolog
,
7015 vs_needs_prolog
? 2 : 1);
7017 LLVMValueRef parts
[2];
7018 union si_shader_part_key epilog_key
;
7020 parts
[0] = ctx
.main_fn
;
7022 memset(&epilog_key
, 0, sizeof(epilog_key
));
7023 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7024 si_build_tcs_epilog_function(&ctx
, &epilog_key
);
7025 parts
[1] = ctx
.main_fn
;
7027 si_build_wrapper_function(&ctx
, parts
, 2, 0, 0);
7029 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_GEOMETRY
) {
7030 if (ctx
.screen
->info
.chip_class
>= GFX9
) {
7031 struct si_shader_selector
*es
= shader
->key
.part
.gs
.es
;
7032 LLVMValueRef es_prolog
= NULL
;
7033 LLVMValueRef es_main
= NULL
;
7034 LLVMValueRef gs_prolog
= NULL
;
7035 LLVMValueRef gs_main
= ctx
.main_fn
;
7038 union si_shader_part_key gs_prolog_key
;
7039 memset(&gs_prolog_key
, 0, sizeof(gs_prolog_key
));
7040 gs_prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7041 gs_prolog_key
.gs_prolog
.is_monolithic
= true;
7042 gs_prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7043 si_build_gs_prolog_function(&ctx
, &gs_prolog_key
);
7044 gs_prolog
= ctx
.main_fn
;
7047 struct si_shader shader_es
= {};
7048 shader_es
.selector
= es
;
7049 shader_es
.key
.as_es
= 1;
7050 shader_es
.key
.as_ngg
= shader
->key
.as_ngg
;
7051 shader_es
.key
.mono
= shader
->key
.mono
;
7052 shader_es
.key
.opt
= shader
->key
.opt
;
7053 shader_es
.is_monolithic
= true;
7054 si_llvm_context_set_ir(&ctx
, &shader_es
);
7056 if (!si_compile_tgsi_main(&ctx
)) {
7057 si_llvm_dispose(&ctx
);
7060 shader
->info
.uses_instanceid
|= es
->info
.uses_instanceid
;
7061 es_main
= ctx
.main_fn
;
7064 if (es
->vs_needs_prolog
) {
7065 union si_shader_part_key vs_prolog_key
;
7066 si_get_vs_prolog_key(&es
->info
,
7067 shader_es
.info
.num_input_sgprs
,
7068 &shader
->key
.part
.gs
.vs_prolog
,
7069 shader
, &vs_prolog_key
);
7070 vs_prolog_key
.vs_prolog
.is_monolithic
= true;
7071 si_build_vs_prolog_function(&ctx
, &vs_prolog_key
);
7072 es_prolog
= ctx
.main_fn
;
7075 /* Reset the shader context. */
7076 ctx
.shader
= shader
;
7077 ctx
.type
= PIPE_SHADER_GEOMETRY
;
7079 /* Prepare the array of shader parts. */
7080 LLVMValueRef parts
[4];
7081 unsigned num_parts
= 0, main_part
, next_first_part
;
7084 parts
[num_parts
++] = es_prolog
;
7086 parts
[main_part
= num_parts
++] = es_main
;
7087 parts
[next_first_part
= num_parts
++] = gs_prolog
;
7088 parts
[num_parts
++] = gs_main
;
7090 si_build_wrapper_function(&ctx
, parts
, num_parts
,
7091 main_part
, next_first_part
);
7093 LLVMValueRef parts
[2];
7094 union si_shader_part_key prolog_key
;
7096 parts
[1] = ctx
.main_fn
;
7098 memset(&prolog_key
, 0, sizeof(prolog_key
));
7099 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7100 si_build_gs_prolog_function(&ctx
, &prolog_key
);
7101 parts
[0] = ctx
.main_fn
;
7103 si_build_wrapper_function(&ctx
, parts
, 2, 1, 0);
7105 } else if (shader
->is_monolithic
&& ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7106 LLVMValueRef parts
[3];
7107 union si_shader_part_key prolog_key
;
7108 union si_shader_part_key epilog_key
;
7111 si_get_ps_prolog_key(shader
, &prolog_key
, false);
7112 need_prolog
= si_need_ps_prolog(&prolog_key
);
7114 parts
[need_prolog
? 1 : 0] = ctx
.main_fn
;
7117 si_build_ps_prolog_function(&ctx
, &prolog_key
);
7118 parts
[0] = ctx
.main_fn
;
7121 si_get_ps_epilog_key(shader
, &epilog_key
);
7122 si_build_ps_epilog_function(&ctx
, &epilog_key
);
7123 parts
[need_prolog
? 2 : 1] = ctx
.main_fn
;
7125 si_build_wrapper_function(&ctx
, parts
, need_prolog
? 3 : 2,
7126 need_prolog
? 1 : 0, 0);
7129 si_llvm_optimize_module(&ctx
);
7131 /* Post-optimization transformations and analysis. */
7132 si_optimize_vs_outputs(&ctx
);
7134 if ((debug
&& debug
->debug_message
) ||
7135 si_can_dump_shader(sscreen
, ctx
.type
)) {
7136 ctx
.shader
->info
.private_mem_vgprs
=
7137 ac_count_scratch_private_memory(ctx
.main_fn
);
7140 /* Make sure the input is a pointer and not integer followed by inttoptr. */
7141 assert(LLVMGetTypeKind(LLVMTypeOf(LLVMGetParam(ctx
.main_fn
, 0))) ==
7142 LLVMPointerTypeKind
);
7144 /* Compile to bytecode. */
7145 r
= si_compile_llvm(sscreen
, &shader
->binary
, &shader
->config
, compiler
,
7146 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7147 si_get_shader_name(shader
),
7148 si_should_optimize_less(compiler
, shader
->selector
));
7149 si_llvm_dispose(&ctx
);
7151 fprintf(stderr
, "LLVM failed to compile shader\n");
7155 /* Validate SGPR and VGPR usage for compute to detect compiler bugs.
7156 * LLVM 3.9svn has this bug.
7158 if (sel
->type
== PIPE_SHADER_COMPUTE
) {
7159 unsigned wave_size
= sscreen
->compute_wave_size
;
7160 unsigned max_vgprs
= 256;
7161 unsigned max_sgprs
= sscreen
->info
.chip_class
>= GFX8
? 800 : 512;
7162 unsigned max_sgprs_per_wave
= 128;
7163 unsigned max_block_threads
= si_get_max_workgroup_size(shader
);
7164 unsigned min_waves_per_cu
= DIV_ROUND_UP(max_block_threads
, wave_size
);
7165 unsigned min_waves_per_simd
= DIV_ROUND_UP(min_waves_per_cu
, 4);
7167 max_vgprs
= max_vgprs
/ min_waves_per_simd
;
7168 max_sgprs
= MIN2(max_sgprs
/ min_waves_per_simd
, max_sgprs_per_wave
);
7170 if (shader
->config
.num_sgprs
> max_sgprs
||
7171 shader
->config
.num_vgprs
> max_vgprs
) {
7172 fprintf(stderr
, "LLVM failed to compile a shader correctly: "
7173 "SGPR:VGPR usage is %u:%u, but the hw limit is %u:%u\n",
7174 shader
->config
.num_sgprs
, shader
->config
.num_vgprs
,
7175 max_sgprs
, max_vgprs
);
7177 /* Just terminate the process, because dependent
7178 * shaders can hang due to bad input data, but use
7179 * the env var to allow shader-db to work.
7181 if (!debug_get_bool_option("SI_PASS_BAD_SHADERS", false))
7186 /* Add the scratch offset to input SGPRs. */
7187 if (shader
->config
.scratch_bytes_per_wave
&& !is_merged_shader(&ctx
))
7188 shader
->info
.num_input_sgprs
+= 1; /* scratch byte offset */
7190 /* Calculate the number of fragment input VGPRs. */
7191 if (ctx
.type
== PIPE_SHADER_FRAGMENT
) {
7192 shader
->info
.num_input_vgprs
= 0;
7193 shader
->info
.face_vgpr_index
= -1;
7194 shader
->info
.ancillary_vgpr_index
= -1;
7196 if (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7197 shader
->info
.num_input_vgprs
+= 2;
7198 if (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7199 shader
->info
.num_input_vgprs
+= 2;
7200 if (G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7201 shader
->info
.num_input_vgprs
+= 2;
7202 if (G_0286CC_PERSP_PULL_MODEL_ENA(shader
->config
.spi_ps_input_addr
))
7203 shader
->info
.num_input_vgprs
+= 3;
7204 if (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_addr
))
7205 shader
->info
.num_input_vgprs
+= 2;
7206 if (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
))
7207 shader
->info
.num_input_vgprs
+= 2;
7208 if (G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_addr
))
7209 shader
->info
.num_input_vgprs
+= 2;
7210 if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader
->config
.spi_ps_input_addr
))
7211 shader
->info
.num_input_vgprs
+= 1;
7212 if (G_0286CC_POS_X_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7213 shader
->info
.num_input_vgprs
+= 1;
7214 if (G_0286CC_POS_Y_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7215 shader
->info
.num_input_vgprs
+= 1;
7216 if (G_0286CC_POS_Z_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7217 shader
->info
.num_input_vgprs
+= 1;
7218 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_addr
))
7219 shader
->info
.num_input_vgprs
+= 1;
7220 if (G_0286CC_FRONT_FACE_ENA(shader
->config
.spi_ps_input_addr
)) {
7221 shader
->info
.face_vgpr_index
= shader
->info
.num_input_vgprs
;
7222 shader
->info
.num_input_vgprs
+= 1;
7224 if (G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
)) {
7225 shader
->info
.ancillary_vgpr_index
= shader
->info
.num_input_vgprs
;
7226 shader
->info
.num_input_vgprs
+= 1;
7228 if (G_0286CC_SAMPLE_COVERAGE_ENA(shader
->config
.spi_ps_input_addr
))
7229 shader
->info
.num_input_vgprs
+= 1;
7230 if (G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
))
7231 shader
->info
.num_input_vgprs
+= 1;
7234 si_calculate_max_simd_waves(shader
);
7235 si_shader_dump_stats_for_shader_db(sscreen
, shader
, debug
);
7240 * Create, compile and return a shader part (prolog or epilog).
7242 * \param sscreen screen
7243 * \param list list of shader parts of the same category
7244 * \param type shader type
7245 * \param key shader part key
7246 * \param prolog whether the part being requested is a prolog
7247 * \param tm LLVM target machine
7248 * \param debug debug callback
7249 * \param build the callback responsible for building the main function
7250 * \return non-NULL on success
7252 static struct si_shader_part
*
7253 si_get_shader_part(struct si_screen
*sscreen
,
7254 struct si_shader_part
**list
,
7255 enum pipe_shader_type type
,
7257 union si_shader_part_key
*key
,
7258 struct ac_llvm_compiler
*compiler
,
7259 struct pipe_debug_callback
*debug
,
7260 void (*build
)(struct si_shader_context
*,
7261 union si_shader_part_key
*),
7264 struct si_shader_part
*result
;
7266 mtx_lock(&sscreen
->shader_parts_mutex
);
7268 /* Find existing. */
7269 for (result
= *list
; result
; result
= result
->next
) {
7270 if (memcmp(&result
->key
, key
, sizeof(*key
)) == 0) {
7271 mtx_unlock(&sscreen
->shader_parts_mutex
);
7276 /* Compile a new one. */
7277 result
= CALLOC_STRUCT(si_shader_part
);
7280 struct si_shader shader
= {};
7283 case PIPE_SHADER_VERTEX
:
7284 shader
.key
.as_ls
= key
->vs_prolog
.as_ls
;
7285 shader
.key
.as_es
= key
->vs_prolog
.as_es
;
7286 shader
.key
.as_ngg
= key
->vs_prolog
.as_ngg
;
7288 case PIPE_SHADER_TESS_CTRL
:
7290 shader
.key
.part
.tcs
.epilog
= key
->tcs_epilog
.states
;
7292 case PIPE_SHADER_GEOMETRY
:
7294 shader
.key
.as_ngg
= key
->gs_prolog
.as_ngg
;
7296 case PIPE_SHADER_FRAGMENT
:
7298 shader
.key
.part
.ps
.prolog
= key
->ps_prolog
.states
;
7300 shader
.key
.part
.ps
.epilog
= key
->ps_epilog
.states
;
7303 unreachable("bad shader part");
7306 struct si_shader_context ctx
;
7307 si_init_shader_ctx(&ctx
, sscreen
, compiler
,
7308 si_get_wave_size(sscreen
, type
, shader
.key
.as_ngg
,
7311 ctx
.shader
= &shader
;
7317 si_llvm_optimize_module(&ctx
);
7319 if (si_compile_llvm(sscreen
, &result
->binary
, &result
->config
, compiler
,
7320 ctx
.ac
.module
, debug
, ctx
.type
, ctx
.ac
.wave_size
,
7327 result
->next
= *list
;
7331 si_llvm_dispose(&ctx
);
7332 mtx_unlock(&sscreen
->shader_parts_mutex
);
7336 static LLVMValueRef
si_prolog_get_rw_buffers(struct si_shader_context
*ctx
)
7338 LLVMValueRef ptr
[2], list
;
7339 bool merged_shader
= is_merged_shader(ctx
);
7341 ptr
[0] = LLVMGetParam(ctx
->main_fn
, (merged_shader
? 8 : 0) + SI_SGPR_RW_BUFFERS
);
7342 list
= LLVMBuildIntToPtr(ctx
->ac
.builder
, ptr
[0],
7343 ac_array_in_const32_addr_space(ctx
->v4i32
), "");
7348 * Build the vertex shader prolog function.
7350 * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values).
7351 * All inputs are returned unmodified. The vertex load indices are
7352 * stored after them, which will be used by the API VS for fetching inputs.
7354 * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are:
7359 * (VertexID + BaseVertex),
7360 * (InstanceID + StartInstance),
7361 * (InstanceID / 2 + StartInstance)
7363 static void si_build_vs_prolog_function(struct si_shader_context
*ctx
,
7364 union si_shader_part_key
*key
)
7366 struct si_function_info fninfo
;
7367 LLVMTypeRef
*returns
;
7368 LLVMValueRef ret
, func
;
7370 unsigned first_vs_vgpr
= key
->vs_prolog
.num_merged_next_stage_vgprs
;
7371 unsigned num_input_vgprs
= key
->vs_prolog
.num_merged_next_stage_vgprs
+ 4;
7372 LLVMValueRef input_vgprs
[9];
7373 unsigned num_all_input_regs
= key
->vs_prolog
.num_input_sgprs
+
7375 unsigned user_sgpr_base
= key
->vs_prolog
.num_merged_next_stage_vgprs
? 8 : 0;
7377 si_init_function_info(&fninfo
);
7379 /* 4 preloaded VGPRs + vertex load indices as prolog outputs */
7380 returns
= alloca((num_all_input_regs
+ key
->vs_prolog
.last_input
+ 1) *
7381 sizeof(LLVMTypeRef
));
7384 /* Declare input and output SGPRs. */
7385 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7386 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7387 returns
[num_returns
++] = ctx
->i32
;
7390 /* Preloaded VGPRs (outputs must be floats) */
7391 for (i
= 0; i
< num_input_vgprs
; i
++) {
7392 add_arg_assign(&fninfo
, ARG_VGPR
, ctx
->i32
, &input_vgprs
[i
]);
7393 returns
[num_returns
++] = ctx
->f32
;
7396 /* Vertex load indices. */
7397 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++)
7398 returns
[num_returns
++] = ctx
->f32
;
7400 /* Create the function. */
7401 si_create_function(ctx
, "vs_prolog", returns
, num_returns
, &fninfo
, 0);
7402 func
= ctx
->main_fn
;
7404 if (key
->vs_prolog
.num_merged_next_stage_vgprs
) {
7405 if (!key
->vs_prolog
.is_monolithic
)
7406 si_init_exec_from_input(ctx
, 3, 0);
7408 if (key
->vs_prolog
.as_ls
&&
7409 ctx
->screen
->info
.has_ls_vgpr_init_bug
) {
7410 /* If there are no HS threads, SPI loads the LS VGPRs
7411 * starting at VGPR 0. Shift them back to where they
7414 LLVMValueRef has_hs_threads
=
7415 LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntNE
,
7416 si_unpack_param(ctx
, 3, 8, 8),
7419 for (i
= 4; i
> 0; --i
) {
7420 input_vgprs
[i
+ 1] =
7421 LLVMBuildSelect(ctx
->ac
.builder
, has_hs_threads
,
7423 input_vgprs
[i
- 1], "");
7428 unsigned vertex_id_vgpr
= first_vs_vgpr
;
7429 unsigned instance_id_vgpr
=
7430 ctx
->screen
->info
.chip_class
>= GFX10
?
7432 first_vs_vgpr
+ (key
->vs_prolog
.as_ls
? 2 : 1);
7434 ctx
->abi
.vertex_id
= input_vgprs
[vertex_id_vgpr
];
7435 ctx
->abi
.instance_id
= input_vgprs
[instance_id_vgpr
];
7437 /* InstanceID = VertexID >> 16;
7438 * VertexID = VertexID & 0xffff;
7440 if (key
->vs_prolog
.states
.unpack_instance_id_from_vertex_id
) {
7441 ctx
->abi
.instance_id
= LLVMBuildLShr(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7442 LLVMConstInt(ctx
->i32
, 16, 0), "");
7443 ctx
->abi
.vertex_id
= LLVMBuildAnd(ctx
->ac
.builder
, ctx
->abi
.vertex_id
,
7444 LLVMConstInt(ctx
->i32
, 0xffff, 0), "");
7447 /* Copy inputs to outputs. This should be no-op, as the registers match,
7448 * but it will prevent the compiler from overwriting them unintentionally.
7450 ret
= ctx
->return_value
;
7451 for (i
= 0; i
< key
->vs_prolog
.num_input_sgprs
; i
++) {
7452 LLVMValueRef p
= LLVMGetParam(func
, i
);
7453 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7455 for (i
= 0; i
< num_input_vgprs
; i
++) {
7456 LLVMValueRef p
= input_vgprs
[i
];
7458 if (i
== vertex_id_vgpr
)
7459 p
= ctx
->abi
.vertex_id
;
7460 else if (i
== instance_id_vgpr
)
7461 p
= ctx
->abi
.instance_id
;
7463 p
= ac_to_float(&ctx
->ac
, p
);
7464 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
,
7465 key
->vs_prolog
.num_input_sgprs
+ i
, "");
7468 LLVMValueRef original_ret
= ret
;
7469 bool wrapped
= false;
7470 LLVMBasicBlockRef if_entry_block
= NULL
;
7472 if (key
->vs_prolog
.is_monolithic
&& key
->vs_prolog
.as_ngg
) {
7473 LLVMValueRef num_threads
;
7476 num_threads
= si_unpack_param(ctx
, 3, 0, 8);
7477 ena
= LLVMBuildICmp(ctx
->ac
.builder
, LLVMIntULT
,
7478 ac_get_thread_id(&ctx
->ac
), num_threads
, "");
7479 if_entry_block
= LLVMGetInsertBlock(ctx
->ac
.builder
);
7480 ac_build_ifcc(&ctx
->ac
, ena
, 11501);
7484 /* Compute vertex load indices from instance divisors. */
7485 LLVMValueRef instance_divisor_constbuf
= NULL
;
7487 if (key
->vs_prolog
.states
.instance_divisor_is_fetched
) {
7488 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7489 LLVMValueRef buf_index
=
7490 LLVMConstInt(ctx
->i32
, SI_VS_CONST_INSTANCE_DIVISORS
, 0);
7491 instance_divisor_constbuf
=
7492 ac_build_load_to_sgpr(&ctx
->ac
, list
, buf_index
);
7495 for (i
= 0; i
<= key
->vs_prolog
.last_input
; i
++) {
7496 bool divisor_is_one
=
7497 key
->vs_prolog
.states
.instance_divisor_is_one
& (1u << i
);
7498 bool divisor_is_fetched
=
7499 key
->vs_prolog
.states
.instance_divisor_is_fetched
& (1u << i
);
7500 LLVMValueRef index
= NULL
;
7502 if (divisor_is_one
) {
7503 index
= ctx
->abi
.instance_id
;
7504 } else if (divisor_is_fetched
) {
7505 LLVMValueRef udiv_factors
[4];
7507 for (unsigned j
= 0; j
< 4; j
++) {
7509 buffer_load_const(ctx
, instance_divisor_constbuf
,
7510 LLVMConstInt(ctx
->i32
, i
*16 + j
*4, 0));
7511 udiv_factors
[j
] = ac_to_integer(&ctx
->ac
, udiv_factors
[j
]);
7513 /* The faster NUW version doesn't work when InstanceID == UINT_MAX.
7514 * Such InstanceID might not be achievable in a reasonable time though.
7516 index
= ac_build_fast_udiv_nuw(&ctx
->ac
, ctx
->abi
.instance_id
,
7517 udiv_factors
[0], udiv_factors
[1],
7518 udiv_factors
[2], udiv_factors
[3]);
7521 if (divisor_is_one
|| divisor_is_fetched
) {
7522 /* Add StartInstance. */
7523 index
= LLVMBuildAdd(ctx
->ac
.builder
, index
,
7524 LLVMGetParam(ctx
->main_fn
, user_sgpr_base
+
7525 SI_SGPR_START_INSTANCE
), "");
7527 /* VertexID + BaseVertex */
7528 index
= LLVMBuildAdd(ctx
->ac
.builder
,
7530 LLVMGetParam(func
, user_sgpr_base
+
7531 SI_SGPR_BASE_VERTEX
), "");
7534 index
= ac_to_float(&ctx
->ac
, index
);
7535 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, index
,
7536 fninfo
.num_params
+ i
, "");
7540 LLVMBasicBlockRef bbs
[2] = {
7541 LLVMGetInsertBlock(ctx
->ac
.builder
),
7544 ac_build_endif(&ctx
->ac
, 11501);
7546 LLVMValueRef values
[2] = {
7550 ret
= ac_build_phi(&ctx
->ac
, LLVMTypeOf(ret
), 2, values
, bbs
);
7553 si_llvm_build_ret(ctx
, ret
);
7556 static bool si_get_vs_prolog(struct si_screen
*sscreen
,
7557 struct ac_llvm_compiler
*compiler
,
7558 struct si_shader
*shader
,
7559 struct pipe_debug_callback
*debug
,
7560 struct si_shader
*main_part
,
7561 const struct si_vs_prolog_bits
*key
)
7563 struct si_shader_selector
*vs
= main_part
->selector
;
7565 if (!si_vs_needs_prolog(vs
, key
))
7568 /* Get the prolog. */
7569 union si_shader_part_key prolog_key
;
7570 si_get_vs_prolog_key(&vs
->info
, main_part
->info
.num_input_sgprs
,
7571 key
, shader
, &prolog_key
);
7574 si_get_shader_part(sscreen
, &sscreen
->vs_prologs
,
7575 PIPE_SHADER_VERTEX
, true, &prolog_key
, compiler
,
7576 debug
, si_build_vs_prolog_function
,
7577 "Vertex Shader Prolog");
7578 return shader
->prolog
!= NULL
;
7582 * Select and compile (or reuse) vertex shader parts (prolog & epilog).
7584 static bool si_shader_select_vs_parts(struct si_screen
*sscreen
,
7585 struct ac_llvm_compiler
*compiler
,
7586 struct si_shader
*shader
,
7587 struct pipe_debug_callback
*debug
)
7589 return si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, shader
,
7590 &shader
->key
.part
.vs
.prolog
);
7594 * Compile the TCS epilog function. This writes tesselation factors to memory
7595 * based on the output primitive type of the tesselator (determined by TES).
7597 static void si_build_tcs_epilog_function(struct si_shader_context
*ctx
,
7598 union si_shader_part_key
*key
)
7600 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
7601 struct si_function_info fninfo
;
7604 si_init_function_info(&fninfo
);
7606 if (ctx
->screen
->info
.chip_class
>= GFX9
) {
7607 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7608 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7609 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7610 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
); /* wave info */
7611 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7612 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7613 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7614 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7615 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7616 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7617 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7618 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7619 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7620 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7621 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7622 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7623 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7624 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7625 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7627 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7628 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7629 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7630 add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
7631 ctx
->param_tcs_offchip_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7632 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7633 ctx
->param_tcs_out_lds_layout
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7634 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7635 ctx
->param_tcs_offchip_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7636 ctx
->param_tcs_factor_offset
= add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7639 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7640 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* VGPR gap */
7641 unsigned tess_factors_idx
=
7642 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* patch index within the wave (REL_PATCH_ID) */
7643 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* invocation ID within the patch */
7644 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* LDS offset where tess factors should be loaded from */
7646 for (unsigned i
= 0; i
< 6; i
++)
7647 add_arg(&fninfo
, ARG_VGPR
, ctx
->i32
); /* tess factors */
7649 /* Create the function. */
7650 si_create_function(ctx
, "tcs_epilog", NULL
, 0, &fninfo
,
7651 ctx
->screen
->info
.chip_class
>= GFX7
? 128 : 0);
7652 ac_declare_lds_as_pointer(&ctx
->ac
);
7653 func
= ctx
->main_fn
;
7655 LLVMValueRef invoc0_tess_factors
[6];
7656 for (unsigned i
= 0; i
< 6; i
++)
7657 invoc0_tess_factors
[i
] = LLVMGetParam(func
, tess_factors_idx
+ 3 + i
);
7659 si_write_tess_factors(bld_base
,
7660 LLVMGetParam(func
, tess_factors_idx
),
7661 LLVMGetParam(func
, tess_factors_idx
+ 1),
7662 LLVMGetParam(func
, tess_factors_idx
+ 2),
7663 invoc0_tess_factors
, invoc0_tess_factors
+ 4);
7665 LLVMBuildRetVoid(ctx
->ac
.builder
);
7669 * Select and compile (or reuse) TCS parts (epilog).
7671 static bool si_shader_select_tcs_parts(struct si_screen
*sscreen
,
7672 struct ac_llvm_compiler
*compiler
,
7673 struct si_shader
*shader
,
7674 struct pipe_debug_callback
*debug
)
7676 if (sscreen
->info
.chip_class
>= GFX9
) {
7677 struct si_shader
*ls_main_part
=
7678 shader
->key
.part
.tcs
.ls
->main_shader_part_ls
;
7680 if (!si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, ls_main_part
,
7681 &shader
->key
.part
.tcs
.ls_prolog
))
7684 shader
->previous_stage
= ls_main_part
;
7687 /* Get the epilog. */
7688 union si_shader_part_key epilog_key
;
7689 memset(&epilog_key
, 0, sizeof(epilog_key
));
7690 epilog_key
.tcs_epilog
.states
= shader
->key
.part
.tcs
.epilog
;
7692 shader
->epilog
= si_get_shader_part(sscreen
, &sscreen
->tcs_epilogs
,
7693 PIPE_SHADER_TESS_CTRL
, false,
7694 &epilog_key
, compiler
, debug
,
7695 si_build_tcs_epilog_function
,
7696 "Tessellation Control Shader Epilog");
7697 return shader
->epilog
!= NULL
;
7701 * Select and compile (or reuse) GS parts (prolog).
7703 static bool si_shader_select_gs_parts(struct si_screen
*sscreen
,
7704 struct ac_llvm_compiler
*compiler
,
7705 struct si_shader
*shader
,
7706 struct pipe_debug_callback
*debug
)
7708 if (sscreen
->info
.chip_class
>= GFX9
) {
7709 struct si_shader
*es_main_part
;
7710 enum pipe_shader_type es_type
= shader
->key
.part
.gs
.es
->type
;
7712 if (es_type
== PIPE_SHADER_TESS_EVAL
&& shader
->key
.as_ngg
)
7713 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_ngg_es
;
7715 es_main_part
= shader
->key
.part
.gs
.es
->main_shader_part_es
;
7717 if (es_type
== PIPE_SHADER_VERTEX
&&
7718 !si_get_vs_prolog(sscreen
, compiler
, shader
, debug
, es_main_part
,
7719 &shader
->key
.part
.gs
.vs_prolog
))
7722 shader
->previous_stage
= es_main_part
;
7725 if (!shader
->key
.part
.gs
.prolog
.tri_strip_adj_fix
)
7728 union si_shader_part_key prolog_key
;
7729 memset(&prolog_key
, 0, sizeof(prolog_key
));
7730 prolog_key
.gs_prolog
.states
= shader
->key
.part
.gs
.prolog
;
7731 prolog_key
.gs_prolog
.as_ngg
= shader
->key
.as_ngg
;
7733 shader
->prolog2
= si_get_shader_part(sscreen
, &sscreen
->gs_prologs
,
7734 PIPE_SHADER_GEOMETRY
, true,
7735 &prolog_key
, compiler
, debug
,
7736 si_build_gs_prolog_function
,
7737 "Geometry Shader Prolog");
7738 return shader
->prolog2
!= NULL
;
7742 * Build the pixel shader prolog function. This handles:
7743 * - two-side color selection and interpolation
7744 * - overriding interpolation parameters for the API PS
7745 * - polygon stippling
7747 * All preloaded SGPRs and VGPRs are passed through unmodified unless they are
7748 * overriden by other states. (e.g. per-sample interpolation)
7749 * Interpolated colors are stored after the preloaded VGPRs.
7751 static void si_build_ps_prolog_function(struct si_shader_context
*ctx
,
7752 union si_shader_part_key
*key
)
7754 struct si_function_info fninfo
;
7755 LLVMValueRef ret
, func
;
7756 int num_returns
, i
, num_color_channels
;
7758 assert(si_need_ps_prolog(key
));
7760 si_init_function_info(&fninfo
);
7762 /* Declare inputs. */
7763 for (i
= 0; i
< key
->ps_prolog
.num_input_sgprs
; i
++)
7764 add_arg(&fninfo
, ARG_SGPR
, ctx
->i32
);
7766 for (i
= 0; i
< key
->ps_prolog
.num_input_vgprs
; i
++)
7767 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
7769 /* Declare outputs (same as inputs + add colors if needed) */
7770 num_returns
= fninfo
.num_params
;
7771 num_color_channels
= util_bitcount(key
->ps_prolog
.colors_read
);
7772 for (i
= 0; i
< num_color_channels
; i
++)
7773 fninfo
.types
[num_returns
++] = ctx
->f32
;
7775 /* Create the function. */
7776 si_create_function(ctx
, "ps_prolog", fninfo
.types
, num_returns
,
7778 func
= ctx
->main_fn
;
7780 /* Copy inputs to outputs. This should be no-op, as the registers match,
7781 * but it will prevent the compiler from overwriting them unintentionally.
7783 ret
= ctx
->return_value
;
7784 for (i
= 0; i
< fninfo
.num_params
; i
++) {
7785 LLVMValueRef p
= LLVMGetParam(func
, i
);
7786 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, p
, i
, "");
7789 /* Polygon stippling. */
7790 if (key
->ps_prolog
.states
.poly_stipple
) {
7791 /* POS_FIXED_PT is always last. */
7792 unsigned pos
= key
->ps_prolog
.num_input_sgprs
+
7793 key
->ps_prolog
.num_input_vgprs
- 1;
7794 LLVMValueRef list
= si_prolog_get_rw_buffers(ctx
);
7796 si_llvm_emit_polygon_stipple(ctx
, list
, pos
);
7799 if (key
->ps_prolog
.states
.bc_optimize_for_persp
||
7800 key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7801 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7802 LLVMValueRef center
[2], centroid
[2], tmp
, bc_optimize
;
7804 /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER;
7805 * The hw doesn't compute CENTROID if the whole wave only
7806 * contains fully-covered quads.
7808 * PRIM_MASK is after user SGPRs.
7810 bc_optimize
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7811 bc_optimize
= LLVMBuildLShr(ctx
->ac
.builder
, bc_optimize
,
7812 LLVMConstInt(ctx
->i32
, 31, 0), "");
7813 bc_optimize
= LLVMBuildTrunc(ctx
->ac
.builder
, bc_optimize
,
7816 if (key
->ps_prolog
.states
.bc_optimize_for_persp
) {
7817 /* Read PERSP_CENTER. */
7818 for (i
= 0; i
< 2; i
++)
7819 center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7820 /* Read PERSP_CENTROID. */
7821 for (i
= 0; i
< 2; i
++)
7822 centroid
[i
] = LLVMGetParam(func
, base
+ 4 + i
);
7823 /* Select PERSP_CENTROID. */
7824 for (i
= 0; i
< 2; i
++) {
7825 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7826 center
[i
], centroid
[i
], "");
7827 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7828 tmp
, base
+ 4 + i
, "");
7831 if (key
->ps_prolog
.states
.bc_optimize_for_linear
) {
7832 /* Read LINEAR_CENTER. */
7833 for (i
= 0; i
< 2; i
++)
7834 center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7835 /* Read LINEAR_CENTROID. */
7836 for (i
= 0; i
< 2; i
++)
7837 centroid
[i
] = LLVMGetParam(func
, base
+ 10 + i
);
7838 /* Select LINEAR_CENTROID. */
7839 for (i
= 0; i
< 2; i
++) {
7840 tmp
= LLVMBuildSelect(ctx
->ac
.builder
, bc_optimize
,
7841 center
[i
], centroid
[i
], "");
7842 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7843 tmp
, base
+ 10 + i
, "");
7848 /* Force per-sample interpolation. */
7849 if (key
->ps_prolog
.states
.force_persp_sample_interp
) {
7850 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7851 LLVMValueRef persp_sample
[2];
7853 /* Read PERSP_SAMPLE. */
7854 for (i
= 0; i
< 2; i
++)
7855 persp_sample
[i
] = LLVMGetParam(func
, base
+ i
);
7856 /* Overwrite PERSP_CENTER. */
7857 for (i
= 0; i
< 2; i
++)
7858 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7859 persp_sample
[i
], base
+ 2 + i
, "");
7860 /* Overwrite PERSP_CENTROID. */
7861 for (i
= 0; i
< 2; i
++)
7862 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7863 persp_sample
[i
], base
+ 4 + i
, "");
7865 if (key
->ps_prolog
.states
.force_linear_sample_interp
) {
7866 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7867 LLVMValueRef linear_sample
[2];
7869 /* Read LINEAR_SAMPLE. */
7870 for (i
= 0; i
< 2; i
++)
7871 linear_sample
[i
] = LLVMGetParam(func
, base
+ 6 + i
);
7872 /* Overwrite LINEAR_CENTER. */
7873 for (i
= 0; i
< 2; i
++)
7874 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7875 linear_sample
[i
], base
+ 8 + i
, "");
7876 /* Overwrite LINEAR_CENTROID. */
7877 for (i
= 0; i
< 2; i
++)
7878 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7879 linear_sample
[i
], base
+ 10 + i
, "");
7882 /* Force center interpolation. */
7883 if (key
->ps_prolog
.states
.force_persp_center_interp
) {
7884 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7885 LLVMValueRef persp_center
[2];
7887 /* Read PERSP_CENTER. */
7888 for (i
= 0; i
< 2; i
++)
7889 persp_center
[i
] = LLVMGetParam(func
, base
+ 2 + i
);
7890 /* Overwrite PERSP_SAMPLE. */
7891 for (i
= 0; i
< 2; i
++)
7892 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7893 persp_center
[i
], base
+ i
, "");
7894 /* Overwrite PERSP_CENTROID. */
7895 for (i
= 0; i
< 2; i
++)
7896 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7897 persp_center
[i
], base
+ 4 + i
, "");
7899 if (key
->ps_prolog
.states
.force_linear_center_interp
) {
7900 unsigned i
, base
= key
->ps_prolog
.num_input_sgprs
;
7901 LLVMValueRef linear_center
[2];
7903 /* Read LINEAR_CENTER. */
7904 for (i
= 0; i
< 2; i
++)
7905 linear_center
[i
] = LLVMGetParam(func
, base
+ 8 + i
);
7906 /* Overwrite LINEAR_SAMPLE. */
7907 for (i
= 0; i
< 2; i
++)
7908 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7909 linear_center
[i
], base
+ 6 + i
, "");
7910 /* Overwrite LINEAR_CENTROID. */
7911 for (i
= 0; i
< 2; i
++)
7912 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
,
7913 linear_center
[i
], base
+ 10 + i
, "");
7916 /* Interpolate colors. */
7917 unsigned color_out_idx
= 0;
7918 for (i
= 0; i
< 2; i
++) {
7919 unsigned writemask
= (key
->ps_prolog
.colors_read
>> (i
* 4)) & 0xf;
7920 unsigned face_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7921 key
->ps_prolog
.face_vgpr_index
;
7922 LLVMValueRef interp
[2], color
[4];
7923 LLVMValueRef interp_ij
= NULL
, prim_mask
= NULL
, face
= NULL
;
7928 /* If the interpolation qualifier is not CONSTANT (-1). */
7929 if (key
->ps_prolog
.color_interp_vgpr_index
[i
] != -1) {
7930 unsigned interp_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7931 key
->ps_prolog
.color_interp_vgpr_index
[i
];
7933 /* Get the (i,j) updated by bc_optimize handling. */
7934 interp
[0] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7936 interp
[1] = LLVMBuildExtractValue(ctx
->ac
.builder
, ret
,
7937 interp_vgpr
+ 1, "");
7938 interp_ij
= ac_build_gather_values(&ctx
->ac
, interp
, 2);
7941 /* Use the absolute location of the input. */
7942 prim_mask
= LLVMGetParam(func
, SI_PS_NUM_USER_SGPR
);
7944 if (key
->ps_prolog
.states
.color_two_side
) {
7945 face
= LLVMGetParam(func
, face_vgpr
);
7946 face
= ac_to_integer(&ctx
->ac
, face
);
7949 interp_fs_input(ctx
,
7950 key
->ps_prolog
.color_attr_index
[i
],
7951 TGSI_SEMANTIC_COLOR
, i
,
7952 key
->ps_prolog
.num_interp_inputs
,
7953 key
->ps_prolog
.colors_read
, interp_ij
,
7954 prim_mask
, face
, color
);
7957 unsigned chan
= u_bit_scan(&writemask
);
7958 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, color
[chan
],
7959 fninfo
.num_params
+ color_out_idx
++, "");
7963 /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
7966 * "When per-sample shading is active due to the use of a fragment
7967 * input qualified by sample or due to the use of the gl_SampleID
7968 * or gl_SamplePosition variables, only the bit for the current
7969 * sample is set in gl_SampleMaskIn. When state specifies multiple
7970 * fragment shader invocations for a given fragment, the sample
7971 * mask for any single fragment shader invocation may specify a
7972 * subset of the covered samples for the fragment. In this case,
7973 * the bit corresponding to each covered sample will be set in
7974 * exactly one fragment shader invocation."
7976 * The samplemask loaded by hardware is always the coverage of the
7977 * entire pixel/fragment, so mask bits out based on the sample ID.
7979 if (key
->ps_prolog
.states
.samplemask_log_ps_iter
) {
7980 /* The bit pattern matches that used by fixed function fragment
7982 static const uint16_t ps_iter_masks
[] = {
7983 0xffff, /* not used */
7989 assert(key
->ps_prolog
.states
.samplemask_log_ps_iter
< ARRAY_SIZE(ps_iter_masks
));
7991 uint32_t ps_iter_mask
= ps_iter_masks
[key
->ps_prolog
.states
.samplemask_log_ps_iter
];
7992 unsigned ancillary_vgpr
= key
->ps_prolog
.num_input_sgprs
+
7993 key
->ps_prolog
.ancillary_vgpr_index
;
7994 LLVMValueRef sampleid
= si_unpack_param(ctx
, ancillary_vgpr
, 8, 4);
7995 LLVMValueRef samplemask
= LLVMGetParam(func
, ancillary_vgpr
+ 1);
7997 samplemask
= ac_to_integer(&ctx
->ac
, samplemask
);
7998 samplemask
= LLVMBuildAnd(
8001 LLVMBuildShl(ctx
->ac
.builder
,
8002 LLVMConstInt(ctx
->i32
, ps_iter_mask
, false),
8005 samplemask
= ac_to_float(&ctx
->ac
, samplemask
);
8007 ret
= LLVMBuildInsertValue(ctx
->ac
.builder
, ret
, samplemask
,
8008 ancillary_vgpr
+ 1, "");
8011 /* Tell LLVM to insert WQM instruction sequence when needed. */
8012 if (key
->ps_prolog
.wqm
) {
8013 LLVMAddTargetDependentFunctionAttr(func
,
8014 "amdgpu-ps-wqm-outputs", "");
8017 si_llvm_build_ret(ctx
, ret
);
8021 * Build the pixel shader epilog function. This handles everything that must be
8022 * emulated for pixel shader exports. (alpha-test, format conversions, etc)
8024 static void si_build_ps_epilog_function(struct si_shader_context
*ctx
,
8025 union si_shader_part_key
*key
)
8027 struct lp_build_tgsi_context
*bld_base
= &ctx
->bld_base
;
8028 struct si_function_info fninfo
;
8029 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
8031 struct si_ps_exports exp
= {};
8033 si_init_function_info(&fninfo
);
8035 /* Declare input SGPRs. */
8036 ctx
->param_rw_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8037 ctx
->param_bindless_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8038 ctx
->param_const_and_shader_buffers
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8039 ctx
->param_samplers_and_images
= add_arg(&fninfo
, ARG_SGPR
, ctx
->ac
.intptr
);
8040 add_arg_checked(&fninfo
, ARG_SGPR
, ctx
->f32
, SI_PARAM_ALPHA_REF
);
8042 /* Declare input VGPRs. */
8043 unsigned required_num_params
=
8044 fninfo
.num_sgpr_params
+
8045 util_bitcount(key
->ps_epilog
.colors_written
) * 4 +
8046 key
->ps_epilog
.writes_z
+
8047 key
->ps_epilog
.writes_stencil
+
8048 key
->ps_epilog
.writes_samplemask
;
8050 required_num_params
= MAX2(required_num_params
,
8051 fninfo
.num_sgpr_params
+ PS_EPILOG_SAMPLEMASK_MIN_LOC
+ 1);
8053 while (fninfo
.num_params
< required_num_params
)
8054 add_arg(&fninfo
, ARG_VGPR
, ctx
->f32
);
8056 /* Create the function. */
8057 si_create_function(ctx
, "ps_epilog", NULL
, 0, &fninfo
, 0);
8058 /* Disable elimination of unused inputs. */
8059 ac_llvm_add_target_dep_function_attr(ctx
->main_fn
,
8060 "InitialPSInputAddr", 0xffffff);
8062 /* Process colors. */
8063 unsigned vgpr
= fninfo
.num_sgpr_params
;
8064 unsigned colors_written
= key
->ps_epilog
.colors_written
;
8065 int last_color_export
= -1;
8067 /* Find the last color export. */
8068 if (!key
->ps_epilog
.writes_z
&&
8069 !key
->ps_epilog
.writes_stencil
&&
8070 !key
->ps_epilog
.writes_samplemask
) {
8071 unsigned spi_format
= key
->ps_epilog
.states
.spi_shader_col_format
;
8073 /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */
8074 if (colors_written
== 0x1 && key
->ps_epilog
.states
.last_cbuf
> 0) {
8075 /* Just set this if any of the colorbuffers are enabled. */
8077 ((1ull << (4 * (key
->ps_epilog
.states
.last_cbuf
+ 1))) - 1))
8078 last_color_export
= 0;
8080 for (i
= 0; i
< 8; i
++)
8081 if (colors_written
& (1 << i
) &&
8082 (spi_format
>> (i
* 4)) & 0xf)
8083 last_color_export
= i
;
8087 while (colors_written
) {
8088 LLVMValueRef color
[4];
8089 int mrt
= u_bit_scan(&colors_written
);
8091 for (i
= 0; i
< 4; i
++)
8092 color
[i
] = LLVMGetParam(ctx
->main_fn
, vgpr
++);
8094 si_export_mrt_color(bld_base
, color
, mrt
,
8095 fninfo
.num_params
- 1,
8096 mrt
== last_color_export
, &exp
);
8099 /* Process depth, stencil, samplemask. */
8100 if (key
->ps_epilog
.writes_z
)
8101 depth
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8102 if (key
->ps_epilog
.writes_stencil
)
8103 stencil
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8104 if (key
->ps_epilog
.writes_samplemask
)
8105 samplemask
= LLVMGetParam(ctx
->main_fn
, vgpr
++);
8107 if (depth
|| stencil
|| samplemask
)
8108 si_export_mrt_z(bld_base
, depth
, stencil
, samplemask
, &exp
);
8109 else if (last_color_export
== -1)
8110 ac_build_export_null(&ctx
->ac
);
8113 si_emit_ps_exports(ctx
, &exp
);
8116 LLVMBuildRetVoid(ctx
->ac
.builder
);
8120 * Select and compile (or reuse) pixel shader parts (prolog & epilog).
8122 static bool si_shader_select_ps_parts(struct si_screen
*sscreen
,
8123 struct ac_llvm_compiler
*compiler
,
8124 struct si_shader
*shader
,
8125 struct pipe_debug_callback
*debug
)
8127 union si_shader_part_key prolog_key
;
8128 union si_shader_part_key epilog_key
;
8130 /* Get the prolog. */
8131 si_get_ps_prolog_key(shader
, &prolog_key
, true);
8133 /* The prolog is a no-op if these aren't set. */
8134 if (si_need_ps_prolog(&prolog_key
)) {
8136 si_get_shader_part(sscreen
, &sscreen
->ps_prologs
,
8137 PIPE_SHADER_FRAGMENT
, true,
8138 &prolog_key
, compiler
, debug
,
8139 si_build_ps_prolog_function
,
8140 "Fragment Shader Prolog");
8141 if (!shader
->prolog
)
8145 /* Get the epilog. */
8146 si_get_ps_epilog_key(shader
, &epilog_key
);
8149 si_get_shader_part(sscreen
, &sscreen
->ps_epilogs
,
8150 PIPE_SHADER_FRAGMENT
, false,
8151 &epilog_key
, compiler
, debug
,
8152 si_build_ps_epilog_function
,
8153 "Fragment Shader Epilog");
8154 if (!shader
->epilog
)
8157 /* Enable POS_FIXED_PT if polygon stippling is enabled. */
8158 if (shader
->key
.part
.ps
.prolog
.poly_stipple
) {
8159 shader
->config
.spi_ps_input_ena
|= S_0286CC_POS_FIXED_PT_ENA(1);
8160 assert(G_0286CC_POS_FIXED_PT_ENA(shader
->config
.spi_ps_input_addr
));
8163 /* Set up the enable bits for per-sample shading if needed. */
8164 if (shader
->key
.part
.ps
.prolog
.force_persp_sample_interp
&&
8165 (G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8166 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8167 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTER_ENA
;
8168 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8169 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_SAMPLE_ENA(1);
8171 if (shader
->key
.part
.ps
.prolog
.force_linear_sample_interp
&&
8172 (G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_ena
) ||
8173 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8174 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTER_ENA
;
8175 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8176 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_SAMPLE_ENA(1);
8178 if (shader
->key
.part
.ps
.prolog
.force_persp_center_interp
&&
8179 (G_0286CC_PERSP_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8180 G_0286CC_PERSP_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8181 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_SAMPLE_ENA
;
8182 shader
->config
.spi_ps_input_ena
&= C_0286CC_PERSP_CENTROID_ENA
;
8183 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8185 if (shader
->key
.part
.ps
.prolog
.force_linear_center_interp
&&
8186 (G_0286CC_LINEAR_SAMPLE_ENA(shader
->config
.spi_ps_input_ena
) ||
8187 G_0286CC_LINEAR_CENTROID_ENA(shader
->config
.spi_ps_input_ena
))) {
8188 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_SAMPLE_ENA
;
8189 shader
->config
.spi_ps_input_ena
&= C_0286CC_LINEAR_CENTROID_ENA
;
8190 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8193 /* POW_W_FLOAT requires that one of the perspective weights is enabled. */
8194 if (G_0286CC_POS_W_FLOAT_ENA(shader
->config
.spi_ps_input_ena
) &&
8195 !(shader
->config
.spi_ps_input_ena
& 0xf)) {
8196 shader
->config
.spi_ps_input_ena
|= S_0286CC_PERSP_CENTER_ENA(1);
8197 assert(G_0286CC_PERSP_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8200 /* At least one pair of interpolation weights must be enabled. */
8201 if (!(shader
->config
.spi_ps_input_ena
& 0x7f)) {
8202 shader
->config
.spi_ps_input_ena
|= S_0286CC_LINEAR_CENTER_ENA(1);
8203 assert(G_0286CC_LINEAR_CENTER_ENA(shader
->config
.spi_ps_input_addr
));
8206 /* Samplemask fixup requires the sample ID. */
8207 if (shader
->key
.part
.ps
.prolog
.samplemask_log_ps_iter
) {
8208 shader
->config
.spi_ps_input_ena
|= S_0286CC_ANCILLARY_ENA(1);
8209 assert(G_0286CC_ANCILLARY_ENA(shader
->config
.spi_ps_input_addr
));
8212 /* The sample mask input is always enabled, because the API shader always
8213 * passes it through to the epilog. Disable it here if it's unused.
8215 if (!shader
->key
.part
.ps
.epilog
.poly_line_smoothing
&&
8216 !shader
->selector
->info
.reads_samplemask
)
8217 shader
->config
.spi_ps_input_ena
&= C_0286CC_SAMPLE_COVERAGE_ENA
;
8222 void si_multiwave_lds_size_workaround(struct si_screen
*sscreen
,
8225 /* If tessellation is all offchip and on-chip GS isn't used, this
8226 * workaround is not needed.
8230 /* SPI barrier management bug:
8231 * Make sure we have at least 4k of LDS in use to avoid the bug.
8232 * It applies to workgroup sizes of more than one wavefront.
8234 if (sscreen
->info
.family
== CHIP_BONAIRE
||
8235 sscreen
->info
.family
== CHIP_KABINI
)
8236 *lds_size
= MAX2(*lds_size
, 8);
8239 static void si_fix_resource_usage(struct si_screen
*sscreen
,
8240 struct si_shader
*shader
)
8242 unsigned min_sgprs
= shader
->info
.num_input_sgprs
+ 2; /* VCC */
8244 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
, min_sgprs
);
8246 if (shader
->selector
->type
== PIPE_SHADER_COMPUTE
&&
8247 si_get_max_workgroup_size(shader
) > sscreen
->compute_wave_size
) {
8248 si_multiwave_lds_size_workaround(sscreen
,
8249 &shader
->config
.lds_size
);
8253 bool si_shader_create(struct si_screen
*sscreen
, struct ac_llvm_compiler
*compiler
,
8254 struct si_shader
*shader
,
8255 struct pipe_debug_callback
*debug
)
8257 struct si_shader_selector
*sel
= shader
->selector
;
8258 struct si_shader
*mainp
= *si_get_main_shader_part(sel
, &shader
->key
);
8261 /* LS, ES, VS are compiled on demand if the main part hasn't been
8262 * compiled for that stage.
8264 * GS are compiled on demand if the main part hasn't been compiled
8265 * for the chosen NGG-ness.
8267 * Vertex shaders are compiled on demand when a vertex fetch
8268 * workaround must be applied.
8270 if (shader
->is_monolithic
) {
8271 /* Monolithic shader (compiled as a whole, has many variants,
8272 * may take a long time to compile).
8274 r
= si_compile_tgsi_shader(sscreen
, compiler
, shader
, debug
);
8278 /* The shader consists of several parts:
8280 * - the middle part is the user shader, it has 1 variant only
8281 * and it was compiled during the creation of the shader
8283 * - the prolog part is inserted at the beginning
8284 * - the epilog part is inserted at the end
8286 * The prolog and epilog have many (but simple) variants.
8288 * Starting with gfx9, geometry and tessellation control
8289 * shaders also contain the prolog and user shader parts of
8290 * the previous shader stage.
8296 /* Copy the compiled TGSI shader data over. */
8297 shader
->is_binary_shared
= true;
8298 shader
->binary
= mainp
->binary
;
8299 shader
->config
= mainp
->config
;
8300 shader
->info
.num_input_sgprs
= mainp
->info
.num_input_sgprs
;
8301 shader
->info
.num_input_vgprs
= mainp
->info
.num_input_vgprs
;
8302 shader
->info
.face_vgpr_index
= mainp
->info
.face_vgpr_index
;
8303 shader
->info
.ancillary_vgpr_index
= mainp
->info
.ancillary_vgpr_index
;
8304 memcpy(shader
->info
.vs_output_param_offset
,
8305 mainp
->info
.vs_output_param_offset
,
8306 sizeof(mainp
->info
.vs_output_param_offset
));
8307 shader
->info
.uses_instanceid
= mainp
->info
.uses_instanceid
;
8308 shader
->info
.nr_pos_exports
= mainp
->info
.nr_pos_exports
;
8309 shader
->info
.nr_param_exports
= mainp
->info
.nr_param_exports
;
8311 /* Select prologs and/or epilogs. */
8312 switch (sel
->type
) {
8313 case PIPE_SHADER_VERTEX
:
8314 if (!si_shader_select_vs_parts(sscreen
, compiler
, shader
, debug
))
8317 case PIPE_SHADER_TESS_CTRL
:
8318 if (!si_shader_select_tcs_parts(sscreen
, compiler
, shader
, debug
))
8321 case PIPE_SHADER_TESS_EVAL
:
8323 case PIPE_SHADER_GEOMETRY
:
8324 if (!si_shader_select_gs_parts(sscreen
, compiler
, shader
, debug
))
8327 case PIPE_SHADER_FRAGMENT
:
8328 if (!si_shader_select_ps_parts(sscreen
, compiler
, shader
, debug
))
8331 /* Make sure we have at least as many VGPRs as there
8332 * are allocated inputs.
8334 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8335 shader
->info
.num_input_vgprs
);
8340 /* Update SGPR and VGPR counts. */
8341 if (shader
->prolog
) {
8342 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8343 shader
->prolog
->config
.num_sgprs
);
8344 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8345 shader
->prolog
->config
.num_vgprs
);
8347 if (shader
->previous_stage
) {
8348 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8349 shader
->previous_stage
->config
.num_sgprs
);
8350 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8351 shader
->previous_stage
->config
.num_vgprs
);
8352 shader
->config
.spilled_sgprs
=
8353 MAX2(shader
->config
.spilled_sgprs
,
8354 shader
->previous_stage
->config
.spilled_sgprs
);
8355 shader
->config
.spilled_vgprs
=
8356 MAX2(shader
->config
.spilled_vgprs
,
8357 shader
->previous_stage
->config
.spilled_vgprs
);
8358 shader
->info
.private_mem_vgprs
=
8359 MAX2(shader
->info
.private_mem_vgprs
,
8360 shader
->previous_stage
->info
.private_mem_vgprs
);
8361 shader
->config
.scratch_bytes_per_wave
=
8362 MAX2(shader
->config
.scratch_bytes_per_wave
,
8363 shader
->previous_stage
->config
.scratch_bytes_per_wave
);
8364 shader
->info
.uses_instanceid
|=
8365 shader
->previous_stage
->info
.uses_instanceid
;
8367 if (shader
->prolog2
) {
8368 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8369 shader
->prolog2
->config
.num_sgprs
);
8370 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8371 shader
->prolog2
->config
.num_vgprs
);
8373 if (shader
->epilog
) {
8374 shader
->config
.num_sgprs
= MAX2(shader
->config
.num_sgprs
,
8375 shader
->epilog
->config
.num_sgprs
);
8376 shader
->config
.num_vgprs
= MAX2(shader
->config
.num_vgprs
,
8377 shader
->epilog
->config
.num_vgprs
);
8379 si_calculate_max_simd_waves(shader
);
8382 if (shader
->key
.as_ngg
) {
8383 assert(!shader
->key
.as_es
&& !shader
->key
.as_ls
);
8384 gfx10_ngg_calculate_subgroup_info(shader
);
8385 } else if (sscreen
->info
.chip_class
>= GFX9
&& sel
->type
== PIPE_SHADER_GEOMETRY
) {
8386 gfx9_get_gs_info(shader
->previous_stage_sel
, sel
, &shader
->gs_info
);
8389 si_fix_resource_usage(sscreen
, shader
);
8390 si_shader_dump(sscreen
, shader
, debug
, stderr
, true);
8393 if (!si_shader_binary_upload(sscreen
, shader
, 0)) {
8394 fprintf(stderr
, "LLVM failed to upload shader\n");
8401 void si_shader_destroy(struct si_shader
*shader
)
8403 if (shader
->scratch_bo
)
8404 si_resource_reference(&shader
->scratch_bo
, NULL
);
8406 si_resource_reference(&shader
->bo
, NULL
);
8408 if (!shader
->is_binary_shared
)
8409 si_shader_binary_clean(&shader
->binary
);
8411 free(shader
->shader_log
);