radeonsi: pass tessellation ring addresses via user SGPRs
[mesa.git] / src / gallium / drivers / radeonsi / si_shader.h
1 /*
2 * Copyright 2012 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Tom Stellard <thomas.stellard@amd.com>
25 * Michel Dänzer <michel.daenzer@amd.com>
26 * Christian König <christian.koenig@amd.com>
27 */
28
29 /* The compiler middle-end architecture: Explaining (non-)monolithic shaders
30 * -------------------------------------------------------------------------
31 *
32 * Typically, there is one-to-one correspondence between API and HW shaders,
33 * that is, for every API shader, there is exactly one shader binary in
34 * the driver.
35 *
36 * The problem with that is that we also have to emulate some API states
37 * (e.g. alpha-test, and many others) in shaders too. The two obvious ways
38 * to deal with it are:
39 * - each shader has multiple variants for each combination of emulated states,
40 * and the variants are compiled on demand, possibly relying on a shader
41 * cache for good performance
42 * - patch shaders at the binary level
43 *
44 * This driver uses something completely different. The emulated states are
45 * usually implemented at the beginning or end of shaders. Therefore, we can
46 * split the shader into 3 parts:
47 * - prolog part (shader code dependent on states)
48 * - main part (the API shader)
49 * - epilog part (shader code dependent on states)
50 *
51 * Each part is compiled as a separate shader and the final binaries are
52 * concatenated. This type of shader is called non-monolithic, because it
53 * consists of multiple independent binaries. Creating a new shader variant
54 * is therefore only a concatenation of shader parts (binaries) and doesn't
55 * involve any compilation. The main shader parts are the only parts that are
56 * compiled when applications create shader objects. The prolog and epilog
57 * parts are compiled on the first use and saved, so that their binaries can
58 * be reused by many other shaders.
59 *
60 * One of the roles of the prolog part is to compute vertex buffer addresses
61 * for vertex shaders. A few of the roles of the epilog part are color buffer
62 * format conversions in pixel shaders that we have to do manually, and write
63 * tessellation factors in tessellation control shaders. The prolog and epilog
64 * have many other important responsibilities in various shader stages.
65 * They don't just "emulate legacy stuff".
66 *
67 * Monolithic shaders are shaders where the parts are combined before LLVM
68 * compilation, and the whole thing is compiled and optimized as one unit with
69 * one binary on the output. The result is the same as the non-monolithic
70 * shader, but the final code can be better, because LLVM can optimize across
71 * all shader parts. Monolithic shaders aren't usually used except for these
72 * special cases:
73 *
74 * 1) Some rarely-used states require modification of the main shader part
75 * itself, and in such cases, only the monolithic shader variant is
76 * compiled, and that's always done on the first use.
77 *
78 * 2) When we do cross-stage optimizations for separate shader objects and
79 * e.g. eliminate unused shader varyings, the resulting optimized shader
80 * variants are always compiled as monolithic shaders, and always
81 * asynchronously (i.e. not stalling ongoing rendering). We call them
82 * "optimized monolithic" shaders. The important property here is that
83 * the non-monolithic unoptimized shader variant is always available for use
84 * when the asynchronous compilation of the optimized shader is not done
85 * yet.
86 *
87 * Starting with GFX9 chips, some shader stages are merged, and the number of
88 * shader parts per shader increased. The complete new list of shader parts is:
89 * - 1st shader: prolog part
90 * - 1st shader: main part
91 * - 2nd shader: prolog part
92 * - 2nd shader: main part
93 * - 2nd shader: epilog part
94 */
95
96 /* How linking shader inputs and outputs between vertex, tessellation, and
97 * geometry shaders works.
98 *
99 * Inputs and outputs between shaders are stored in a buffer. This buffer
100 * lives in LDS (typical case for tessellation), but it can also live
101 * in memory (ESGS). Each input or output has a fixed location within a vertex.
102 * The highest used input or output determines the stride between vertices.
103 *
104 * Since GS and tessellation are only possible in the OpenGL core profile,
105 * only these semantics are valid for per-vertex data:
106 *
107 * Name Location
108 *
109 * POSITION 0
110 * PSIZE 1
111 * CLIPDIST0..1 2..3
112 * CULLDIST0..1 (not implemented)
113 * GENERIC0..31 4..35
114 *
115 * For example, a shader only writing GENERIC0 has the output stride of 5.
116 *
117 * Only these semantics are valid for per-patch data:
118 *
119 * Name Location
120 *
121 * TESSOUTER 0
122 * TESSINNER 1
123 * PATCH0..29 2..31
124 *
125 * That's how independent shaders agree on input and output locations.
126 * The si_shader_io_get_unique_index function assigns the locations.
127 *
128 * For tessellation, other required information for calculating the input and
129 * output addresses like the vertex stride, the patch stride, and the offsets
130 * where per-vertex and per-patch data start, is passed to the shader via
131 * user data SGPRs. The offsets and strides are calculated at draw time and
132 * aren't available at compile time.
133 */
134
135 #ifndef SI_SHADER_H
136 #define SI_SHADER_H
137
138 #include <llvm-c/Core.h> /* LLVMModuleRef */
139 #include <llvm-c/TargetMachine.h>
140 #include "tgsi/tgsi_scan.h"
141 #include "util/u_queue.h"
142 #include "si_state.h"
143
144 struct ac_shader_binary;
145
146 #define SI_MAX_VS_OUTPUTS 40
147
148 /* SGPR user data indices */
149 enum {
150 /* GFX9 merged shaders have RW_BUFFERS among the first 8 system SGPRs,
151 * and these two are used for other purposes.
152 */
153 SI_SGPR_RW_BUFFERS, /* rings (& stream-out, VS only) */
154 SI_SGPR_RW_BUFFERS_HI,
155 SI_SGPR_CONST_BUFFERS,
156 SI_SGPR_CONST_BUFFERS_HI,
157 SI_SGPR_SAMPLERS, /* images & sampler states interleaved */
158 SI_SGPR_SAMPLERS_HI,
159 SI_SGPR_IMAGES,
160 SI_SGPR_IMAGES_HI,
161 SI_SGPR_SHADER_BUFFERS,
162 SI_SGPR_SHADER_BUFFERS_HI,
163 SI_NUM_RESOURCE_SGPRS,
164
165 /* all VS variants */
166 SI_SGPR_VERTEX_BUFFERS = SI_NUM_RESOURCE_SGPRS,
167 SI_SGPR_VERTEX_BUFFERS_HI,
168 SI_SGPR_BASE_VERTEX,
169 SI_SGPR_START_INSTANCE,
170 SI_SGPR_DRAWID,
171 SI_SGPR_VS_STATE_BITS,
172 SI_VS_NUM_USER_SGPR,
173
174 /* TES */
175 SI_SGPR_TES_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
176 SI_SGPR_TES_OFFCHIP_ADDR_BASE64K,
177 SI_TES_NUM_USER_SGPR,
178
179 /* GFX6-8: TCS only */
180 GFX6_SGPR_TCS_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
181 GFX6_SGPR_TCS_OUT_OFFSETS,
182 GFX6_SGPR_TCS_OUT_LAYOUT,
183 GFX6_SGPR_TCS_IN_LAYOUT,
184 GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K,
185 GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K,
186 GFX6_TCS_NUM_USER_SGPR,
187
188 /* GFX9: Merged LS-HS (VS-TCS) only. */
189 GFX9_SGPR_TCS_OFFCHIP_LAYOUT = SI_VS_NUM_USER_SGPR,
190 GFX9_SGPR_TCS_OUT_OFFSETS,
191 GFX9_SGPR_TCS_OUT_LAYOUT,
192 GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K,
193 GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K,
194 GFX9_SGPR_unused_to_align_the_next_pointer,
195 GFX9_SGPR_TCS_CONST_BUFFERS,
196 GFX9_SGPR_TCS_CONST_BUFFERS_HI,
197 GFX9_SGPR_TCS_SAMPLERS, /* images & sampler states interleaved */
198 GFX9_SGPR_TCS_SAMPLERS_HI,
199 GFX9_SGPR_TCS_IMAGES,
200 GFX9_SGPR_TCS_IMAGES_HI,
201 GFX9_SGPR_TCS_SHADER_BUFFERS,
202 GFX9_SGPR_TCS_SHADER_BUFFERS_HI,
203 GFX9_TCS_NUM_USER_SGPR,
204
205 /* GFX9: Merged ES-GS (VS-GS or TES-GS). */
206 GFX9_SGPR_GS_CONST_BUFFERS = SI_VS_NUM_USER_SGPR,
207 GFX9_SGPR_GS_CONST_BUFFERS_HI,
208 GFX9_SGPR_GS_SAMPLERS,
209 GFX9_SGPR_GS_SAMPLERS_HI,
210 GFX9_SGPR_GS_IMAGES,
211 GFX9_SGPR_GS_IMAGES_HI,
212 GFX9_SGPR_GS_SHADER_BUFFERS,
213 GFX9_SGPR_GS_SHADER_BUFFERS_HI,
214 GFX9_GS_NUM_USER_SGPR,
215
216 /* GS limits */
217 GFX6_GS_NUM_USER_SGPR = SI_NUM_RESOURCE_SGPRS,
218 SI_GSCOPY_NUM_USER_SGPR = SI_SGPR_RW_BUFFERS_HI + 1,
219
220 /* PS only */
221 SI_SGPR_ALPHA_REF = SI_NUM_RESOURCE_SGPRS,
222 SI_PS_NUM_USER_SGPR,
223
224 /* CS only */
225 SI_SGPR_GRID_SIZE = SI_NUM_RESOURCE_SGPRS,
226 SI_SGPR_BLOCK_SIZE = SI_SGPR_GRID_SIZE + 3,
227 SI_CS_NUM_USER_SGPR = SI_SGPR_BLOCK_SIZE + 3
228 };
229
230 /* LLVM function parameter indices */
231 enum {
232 SI_NUM_RESOURCE_PARAMS = 5,
233
234 /* PS only parameters */
235 SI_PARAM_ALPHA_REF = SI_NUM_RESOURCE_PARAMS,
236 SI_PARAM_PRIM_MASK,
237 SI_PARAM_PERSP_SAMPLE,
238 SI_PARAM_PERSP_CENTER,
239 SI_PARAM_PERSP_CENTROID,
240 SI_PARAM_PERSP_PULL_MODEL,
241 SI_PARAM_LINEAR_SAMPLE,
242 SI_PARAM_LINEAR_CENTER,
243 SI_PARAM_LINEAR_CENTROID,
244 SI_PARAM_LINE_STIPPLE_TEX,
245 SI_PARAM_POS_X_FLOAT,
246 SI_PARAM_POS_Y_FLOAT,
247 SI_PARAM_POS_Z_FLOAT,
248 SI_PARAM_POS_W_FLOAT,
249 SI_PARAM_FRONT_FACE,
250 SI_PARAM_ANCILLARY,
251 SI_PARAM_SAMPLE_COVERAGE,
252 SI_PARAM_POS_FIXED_PT,
253
254 /* CS only parameters */
255 SI_PARAM_GRID_SIZE = SI_NUM_RESOURCE_PARAMS,
256 SI_PARAM_BLOCK_SIZE,
257 SI_PARAM_BLOCK_ID,
258 SI_PARAM_THREAD_ID,
259
260 SI_NUM_PARAMS = SI_PARAM_POS_FIXED_PT + 9, /* +8 for COLOR[0..1] */
261 };
262
263 /* Fields of driver-defined VS state SGPR. */
264 /* Clamp vertex color output (only used in VS as VS). */
265 #define S_VS_STATE_CLAMP_VERTEX_COLOR(x) (((unsigned)(x) & 0x1) << 0)
266 #define C_VS_STATE_CLAMP_VERTEX_COLOR 0xFFFFFFFE
267 #define S_VS_STATE_INDEXED(x) (((unsigned)(x) & 0x1) << 1)
268 #define C_VS_STATE_INDEXED 0xFFFFFFFD
269 #define S_VS_STATE_LS_OUT_PATCH_SIZE(x) (((unsigned)(x) & 0x1FFF) << 8)
270 #define C_VS_STATE_LS_OUT_PATCH_SIZE 0xFFE000FF
271 #define S_VS_STATE_LS_OUT_VERTEX_SIZE(x) (((unsigned)(x) & 0xFF) << 24)
272 #define C_VS_STATE_LS_OUT_VERTEX_SIZE 0x00FFFFFF
273
274 /* SI-specific system values. */
275 enum {
276 TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI = TGSI_SEMANTIC_COUNT,
277 TGSI_SEMANTIC_DEFAULT_TESSINNER_SI,
278 };
279
280 /* For VS shader key fix_fetch. */
281 enum {
282 SI_FIX_FETCH_NONE = 0,
283 SI_FIX_FETCH_A2_SNORM,
284 SI_FIX_FETCH_A2_SSCALED,
285 SI_FIX_FETCH_A2_SINT,
286 SI_FIX_FETCH_RGBA_32_UNORM,
287 SI_FIX_FETCH_RGBX_32_UNORM,
288 SI_FIX_FETCH_RGBA_32_SNORM,
289 SI_FIX_FETCH_RGBX_32_SNORM,
290 SI_FIX_FETCH_RGBA_32_USCALED,
291 SI_FIX_FETCH_RGBA_32_SSCALED,
292 SI_FIX_FETCH_RGBA_32_FIXED,
293 SI_FIX_FETCH_RGBX_32_FIXED,
294 SI_FIX_FETCH_RG_64_FLOAT,
295 SI_FIX_FETCH_RGB_64_FLOAT,
296 SI_FIX_FETCH_RGBA_64_FLOAT,
297 SI_FIX_FETCH_RGB_8, /* A = 1.0 */
298 SI_FIX_FETCH_RGB_8_INT, /* A = 1 */
299 SI_FIX_FETCH_RGB_16,
300 SI_FIX_FETCH_RGB_16_INT,
301 };
302
303 struct si_shader;
304
305 /* State of the context creating the shader object. */
306 struct si_compiler_ctx_state {
307 /* Should only be used by si_init_shader_selector_async and
308 * si_build_shader_variant if thread_index == -1 (non-threaded). */
309 LLVMTargetMachineRef tm;
310
311 /* Used if thread_index == -1 or if debug.async is true. */
312 struct pipe_debug_callback debug;
313
314 /* Used for creating the log string for gallium/ddebug. */
315 bool is_debug_context;
316 };
317
318 /* A shader selector is a gallium CSO and contains shader variants and
319 * binaries for one TGSI program. This can be shared by multiple contexts.
320 */
321 struct si_shader_selector {
322 struct pipe_reference reference;
323 struct si_screen *screen;
324 struct util_queue_fence ready;
325 struct si_compiler_ctx_state compiler_ctx_state;
326
327 mtx_t mutex;
328 struct si_shader *first_variant; /* immutable after the first variant */
329 struct si_shader *last_variant; /* mutable */
330
331 /* The compiled TGSI shader expecting a prolog and/or epilog (not
332 * uploaded to a buffer).
333 */
334 struct si_shader *main_shader_part;
335 struct si_shader *main_shader_part_ls; /* as_ls is set in the key */
336 struct si_shader *main_shader_part_es; /* as_es is set in the key */
337
338 struct si_shader *gs_copy_shader;
339
340 struct tgsi_token *tokens;
341 struct pipe_stream_output_info so;
342 struct tgsi_shader_info info;
343
344 /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
345 unsigned type;
346 bool vs_needs_prolog;
347
348 /* GS parameters. */
349 unsigned esgs_itemsize;
350 unsigned gs_input_verts_per_prim;
351 unsigned gs_output_prim;
352 unsigned gs_max_out_vertices;
353 unsigned gs_num_invocations;
354 unsigned max_gs_stream; /* count - 1 */
355 unsigned gsvs_vertex_size;
356 unsigned max_gsvs_emit_size;
357
358 /* PS parameters. */
359 unsigned color_attr_index[2];
360 unsigned db_shader_control;
361 /* Set 0xf or 0x0 (4 bits) per each written output.
362 * ANDed with spi_shader_col_format.
363 */
364 unsigned colors_written_4bit;
365
366 /* CS parameters */
367 unsigned local_size;
368
369 uint64_t outputs_written; /* "get_unique_index" bits */
370 uint32_t patch_outputs_written; /* "get_unique_index" bits */
371 uint32_t outputs_written2; /* "get_unique_index2" bits */
372
373 uint64_t inputs_read; /* "get_unique_index" bits */
374 uint32_t inputs_read2; /* "get_unique_index2" bits */
375 };
376
377 /* Valid shader configurations:
378 *
379 * API shaders VS | TCS | TES | GS |pass| PS
380 * are compiled as: | | | |thru|
381 * | | | | |
382 * Only VS & PS: VS | | | | | PS
383 * GFX6 - with GS: ES | | | GS | VS | PS
384 * - with tess: LS | HS | VS | | | PS
385 * - with both: LS | HS | ES | GS | VS | PS
386 * GFX9 - with GS: -> | | | GS | VS | PS
387 * - with tess: -> | HS | VS | | | PS
388 * - with both: -> | HS | -> | GS | VS | PS
389 *
390 * -> = merged with the next stage
391 */
392
393 /* Common VS bits between the shader key and the prolog key. */
394 struct si_vs_prolog_bits {
395 unsigned instance_divisors[SI_MAX_ATTRIBS];
396 };
397
398 /* Common TCS bits between the shader key and the epilog key. */
399 struct si_tcs_epilog_bits {
400 unsigned prim_mode:3;
401 unsigned tes_reads_tess_factors:1;
402 };
403
404 struct si_gs_prolog_bits {
405 unsigned tri_strip_adj_fix:1;
406 };
407
408 /* Common PS bits between the shader key and the prolog key. */
409 struct si_ps_prolog_bits {
410 unsigned color_two_side:1;
411 unsigned flatshade_colors:1;
412 unsigned poly_stipple:1;
413 unsigned force_persp_sample_interp:1;
414 unsigned force_linear_sample_interp:1;
415 unsigned force_persp_center_interp:1;
416 unsigned force_linear_center_interp:1;
417 unsigned bc_optimize_for_persp:1;
418 unsigned bc_optimize_for_linear:1;
419 };
420
421 /* Common PS bits between the shader key and the epilog key. */
422 struct si_ps_epilog_bits {
423 unsigned spi_shader_col_format;
424 unsigned color_is_int8:8;
425 unsigned color_is_int10:8;
426 unsigned last_cbuf:3;
427 unsigned alpha_func:3;
428 unsigned alpha_to_one:1;
429 unsigned poly_line_smoothing:1;
430 unsigned clamp_color:1;
431 };
432
433 union si_shader_part_key {
434 struct {
435 struct si_vs_prolog_bits states;
436 unsigned num_input_sgprs:6;
437 /* For merged stages such as LS-HS, HS input VGPRs are first. */
438 unsigned num_merged_next_stage_vgprs:3;
439 unsigned last_input:4;
440 unsigned as_ls:1;
441 /* Prologs for monolithic shaders shouldn't set EXEC. */
442 unsigned is_monolithic:1;
443 } vs_prolog;
444 struct {
445 struct si_tcs_epilog_bits states;
446 } tcs_epilog;
447 struct {
448 struct si_gs_prolog_bits states;
449 /* Prologs of monolithic shaders shouldn't set EXEC. */
450 unsigned is_monolithic:1;
451 } gs_prolog;
452 struct {
453 struct si_ps_prolog_bits states;
454 unsigned num_input_sgprs:6;
455 unsigned num_input_vgprs:5;
456 /* Color interpolation and two-side color selection. */
457 unsigned colors_read:8; /* color input components read */
458 unsigned num_interp_inputs:5; /* BCOLOR is at this location */
459 unsigned face_vgpr_index:5;
460 unsigned wqm:1;
461 char color_attr_index[2];
462 char color_interp_vgpr_index[2]; /* -1 == constant */
463 } ps_prolog;
464 struct {
465 struct si_ps_epilog_bits states;
466 unsigned colors_written:8;
467 unsigned writes_z:1;
468 unsigned writes_stencil:1;
469 unsigned writes_samplemask:1;
470 } ps_epilog;
471 };
472
473 struct si_shader_key {
474 /* Prolog and epilog flags. */
475 union {
476 struct {
477 struct si_vs_prolog_bits prolog;
478 } vs;
479 struct {
480 struct si_vs_prolog_bits ls_prolog; /* for merged LS-HS */
481 struct si_shader_selector *ls; /* for merged LS-HS */
482 struct si_tcs_epilog_bits epilog;
483 } tcs; /* tessellation control shader */
484 struct {
485 struct si_vs_prolog_bits vs_prolog; /* for merged ES-GS */
486 struct si_shader_selector *es; /* for merged ES-GS */
487 struct si_gs_prolog_bits prolog;
488 } gs;
489 struct {
490 struct si_ps_prolog_bits prolog;
491 struct si_ps_epilog_bits epilog;
492 } ps;
493 } part;
494
495 /* These two are initially set according to the NEXT_SHADER property,
496 * or guessed if the property doesn't seem correct.
497 */
498 unsigned as_es:1; /* export shader, which precedes GS */
499 unsigned as_ls:1; /* local shader, which precedes TCS */
500
501 /* Flags for monolithic compilation only. */
502 struct {
503 /* One byte for every input: SI_FIX_FETCH_* enums. */
504 uint8_t vs_fix_fetch[SI_MAX_ATTRIBS];
505 uint64_t ff_tcs_inputs_to_copy; /* for fixed-func TCS */
506 /* When PS needs PrimID and GS is disabled. */
507 unsigned vs_export_prim_id:1;
508 } mono;
509
510 /* Optimization flags for asynchronous compilation only. */
511 struct {
512 struct {
513 uint64_t kill_outputs; /* "get_unique_index" bits */
514 uint32_t kill_outputs2; /* "get_unique_index2" bits */
515 unsigned clip_disable:1;
516 } hw_vs; /* HW VS (it can be VS, TES, GS) */
517
518 /* For shaders where monolithic variants have better code.
519 *
520 * This is a flag that has no effect on code generation,
521 * but forces monolithic shaders to be used as soon as
522 * possible, because it's in the "opt" group.
523 */
524 unsigned prefer_mono:1;
525 } opt;
526 };
527
528 struct si_shader_config {
529 unsigned num_sgprs;
530 unsigned num_vgprs;
531 unsigned spilled_sgprs;
532 unsigned spilled_vgprs;
533 unsigned private_mem_vgprs;
534 unsigned lds_size;
535 unsigned spi_ps_input_ena;
536 unsigned spi_ps_input_addr;
537 unsigned float_mode;
538 unsigned scratch_bytes_per_wave;
539 unsigned rsrc1;
540 unsigned rsrc2;
541 };
542
543 /* GCN-specific shader info. */
544 struct si_shader_info {
545 ubyte vs_output_param_offset[SI_MAX_VS_OUTPUTS];
546 ubyte num_input_sgprs;
547 ubyte num_input_vgprs;
548 char face_vgpr_index;
549 bool uses_instanceid;
550 ubyte nr_pos_exports;
551 ubyte nr_param_exports;
552 };
553
554 struct si_shader {
555 struct si_compiler_ctx_state compiler_ctx_state;
556
557 struct si_shader_selector *selector;
558 struct si_shader_selector *previous_stage_sel; /* for refcounting */
559 struct si_shader *next_variant;
560
561 struct si_shader_part *prolog;
562 struct si_shader *previous_stage; /* for GFX9 */
563 struct si_shader_part *prolog2;
564 struct si_shader_part *epilog;
565
566 struct si_pm4_state *pm4;
567 struct r600_resource *bo;
568 struct r600_resource *scratch_bo;
569 struct si_shader_key key;
570 struct util_queue_fence optimized_ready;
571 bool compilation_failed;
572 bool is_monolithic;
573 bool is_optimized;
574 bool is_binary_shared;
575 bool is_gs_copy_shader;
576
577 /* The following data is all that's needed for binary shaders. */
578 struct ac_shader_binary binary;
579 struct si_shader_config config;
580 struct si_shader_info info;
581
582 /* Shader key + LLVM IR + disassembly + statistics.
583 * Generated for debug contexts only.
584 */
585 char *shader_log;
586 size_t shader_log_size;
587 };
588
589 struct si_shader_part {
590 struct si_shader_part *next;
591 union si_shader_part_key key;
592 struct ac_shader_binary binary;
593 struct si_shader_config config;
594 };
595
596 /* si_shader.c */
597 struct si_shader *
598 si_generate_gs_copy_shader(struct si_screen *sscreen,
599 LLVMTargetMachineRef tm,
600 struct si_shader_selector *gs_selector,
601 struct pipe_debug_callback *debug);
602 int si_compile_tgsi_shader(struct si_screen *sscreen,
603 LLVMTargetMachineRef tm,
604 struct si_shader *shader,
605 bool is_monolithic,
606 struct pipe_debug_callback *debug);
607 int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
608 struct si_shader *shader,
609 struct pipe_debug_callback *debug);
610 int si_compile_llvm(struct si_screen *sscreen,
611 struct ac_shader_binary *binary,
612 struct si_shader_config *conf,
613 LLVMTargetMachineRef tm,
614 LLVMModuleRef mod,
615 struct pipe_debug_callback *debug,
616 unsigned processor,
617 const char *name);
618 void si_shader_destroy(struct si_shader *shader);
619 unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
620 unsigned si_shader_io_get_unique_index2(unsigned name, unsigned index);
621 int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
622 void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
623 struct pipe_debug_callback *debug, unsigned processor,
624 FILE *f, bool check_debug_option);
625 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
626 unsigned *lds_size);
627 void si_shader_apply_scratch_relocs(struct si_context *sctx,
628 struct si_shader *shader,
629 struct si_shader_config *config,
630 uint64_t scratch_va);
631 void si_shader_binary_read_config(struct ac_shader_binary *binary,
632 struct si_shader_config *conf,
633 unsigned symbol_offset);
634 unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
635 bool writes_samplemask);
636 const char *si_get_shader_name(struct si_shader *shader, unsigned processor);
637
638 /* Inline helpers. */
639
640 /* Return the pointer to the main shader part's pointer. */
641 static inline struct si_shader **
642 si_get_main_shader_part(struct si_shader_selector *sel,
643 struct si_shader_key *key)
644 {
645 if (key->as_ls)
646 return &sel->main_shader_part_ls;
647 if (key->as_es)
648 return &sel->main_shader_part_es;
649 return &sel->main_shader_part;
650 }
651
652 #endif