src/gallium/drivers/radeonsi/si_shader.h

   1 /*
   2  * Copyright 2012 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Tom Stellard <thomas.stellard@amd.com>
  25  *      Michel Dänzer <michel.daenzer@amd.com>
  26  *      Christian König <christian.koenig@amd.com>
  27  */
  28
  29 /* The compiler middle-end architecture: Explaining (non-)monolithic shaders
  30  * -------------------------------------------------------------------------
  31  *
  32  * Typically, there is one-to-one correspondence between API and HW shaders,
  33  * that is, for every API shader, there is exactly one shader binary in
  34  * the driver.
  35  *
  36  * The problem with that is that we also have to emulate some API states
  37  * (e.g. alpha-test, and many others) in shaders too. The two obvious ways
  38  * to deal with it are:
  39  * - each shader has multiple variants for each combination of emulated states,
  40  *   and the variants are compiled on demand, possibly relying on a shader
  41  *   cache for good performance
  42  * - patch shaders at the binary level
  43  *
  44  * This driver uses something completely different. The emulated states are
  45  * usually implemented at the beginning or end of shaders. Therefore, we can
  46  * split the shader into 3 parts:
  47  * - prolog part (shader code dependent on states)
  48  * - main part (the API shader)
  49  * - epilog part (shader code dependent on states)
  50  *
  51  * Each part is compiled as a separate shader and the final binaries are
  52  * concatenated. This type of shader is called non-monolithic, because it
  53  * consists of multiple independent binaries. Creating a new shader variant
  54  * is therefore only a concatenation of shader parts (binaries) and doesn't
  55  * involve any compilation. The main shader parts are the only parts that are
  56  * compiled when applications create shader objects. The prolog and epilog
  57  * parts are compiled on the first use and saved, so that their binaries can
  58  * be reused by many other shaders.
  59  *
  60  * One of the roles of the prolog part is to compute vertex buffer addresses
  61  * for vertex shaders. A few of the roles of the epilog part are color buffer
  62  * format conversions in pixel shaders that we have to do manually, and write
  63  * tessellation factors in tessellation control shaders. The prolog and epilog
  64  * have many other important responsibilities in various shader stages.
  65  * They don't just "emulate legacy stuff".
  66  *
  67  * Monolithic shaders are shaders where the parts are combined before LLVM
  68  * compilation, and the whole thing is compiled and optimized as one unit with
  69  * one binary on the output. The result is the same as the non-monolithic
  70  * shader, but the final code can be better, because LLVM can optimize across
  71  * all shader parts. Monolithic shaders aren't usually used except for these
  72  * special cases:
  73  *
  74  * 1) Some rarely-used states require modification of the main shader part
  75  *    itself, and in such cases, only the monolithic shader variant is
  76  *    compiled, and that's always done on the first use.
  77  *
  78  * 2) When we do cross-stage optimizations for separate shader objects and
  79  *    e.g. eliminate unused shader varyings, the resulting optimized shader
  80  *    variants are always compiled as monolithic shaders, and always
  81  *    asynchronously (i.e. not stalling ongoing rendering). We call them
  82  *    "optimized monolithic" shaders. The important property here is that
  83  *    the non-monolithic unoptimized shader variant is always available for use
  84  *    when the asynchronous compilation of the optimized shader is not done
  85  *    yet.
  86  *
  87  * Starting with GFX9 chips, some shader stages are merged, and the number of
  88  * shader parts per shader increased. The complete new list of shader parts is:
  89  * - 1st shader: prolog part
  90  * - 1st shader: main part
  91  * - 2nd shader: prolog part
  92  * - 2nd shader: main part
  93  * - 2nd shader: epilog part
  94  */
  95
  96 /* How linking shader inputs and outputs between vertex, tessellation, and
  97  * geometry shaders works.
  98  *
  99  * Inputs and outputs between shaders are stored in a buffer. This buffer
 100  * lives in LDS (typical case for tessellation), but it can also live
 101  * in memory (ESGS). Each input or output has a fixed location within a vertex.
 102  * The highest used input or output determines the stride between vertices.
 103  *
 104  * Since GS and tessellation are only possible in the OpenGL core profile,
 105  * only these semantics are valid for per-vertex data:
 106  *
 107  *   Name             Location
 108  *
 109  *   POSITION         0
 110  *   PSIZE            1
 111  *   CLIPDIST0..1     2..3
 112  *   CULLDIST0..1     (not implemented)
 113  *   GENERIC0..31     4..35
 114  *
 115  * For example, a shader only writing GENERIC0 has the output stride of 5.
 116  *
 117  * Only these semantics are valid for per-patch data:
 118  *
 119  *   Name             Location
 120  *
 121  *   TESSOUTER        0
 122  *   TESSINNER        1
 123  *   PATCH0..29       2..31
 124  *
 125  * That's how independent shaders agree on input and output locations.
 126  * The si_shader_io_get_unique_index function assigns the locations.
 127  *
 128  * For tessellation, other required information for calculating the input and
 129  * output addresses like the vertex stride, the patch stride, and the offsets
 130  * where per-vertex and per-patch data start, is passed to the shader via
 131  * user data SGPRs. The offsets and strides are calculated at draw time and
 132  * aren't available at compile time.
 133  */
 134
 135 #ifndef SI_SHADER_H
 136 #define SI_SHADER_H
 137
 138 #include <llvm-c/Core.h> /* LLVMModuleRef */
 139 #include <llvm-c/TargetMachine.h>
 140 #include "tgsi/tgsi_scan.h"
 141 #include "util/u_queue.h"
 142
 143 #include "ac_binary.h"
 144 #include "si_state.h"
 145
 146 struct nir_shader;
 147
 148 #define SI_MAX_VS_OUTPUTS       40
 149
 150 /* Shader IO unique indices are supported for TGSI_SEMANTIC_GENERIC with an
 151  * index smaller than this.
 152  */
 153 #define SI_MAX_IO_GENERIC       46
 154
 155 /* SGPR user data indices */
 156 enum {
 157         /* GFX9 merged shaders have RW_BUFFERS among the first 8 system SGPRs,
 158          * and these two are used for other purposes.
 159          */
 160         SI_SGPR_RW_BUFFERS,  /* rings (& stream-out, VS only) */
 161         SI_SGPR_RW_BUFFERS_HI,
 162         SI_SGPR_CONST_AND_SHADER_BUFFERS,
 163         SI_SGPR_CONST_AND_SHADER_BUFFERS_HI,
 164         SI_SGPR_SAMPLERS_AND_IMAGES,
 165         SI_SGPR_SAMPLERS_AND_IMAGES_HI,
 166         SI_NUM_RESOURCE_SGPRS,
 167
 168         /* all VS variants */
 169         SI_SGPR_VERTEX_BUFFERS  = SI_NUM_RESOURCE_SGPRS,
 170         SI_SGPR_VERTEX_BUFFERS_HI,
 171         SI_SGPR_BASE_VERTEX,
 172         SI_SGPR_START_INSTANCE,
 173         SI_SGPR_DRAWID,
 174         SI_SGPR_VS_STATE_BITS,
 175         SI_VS_NUM_USER_SGPR,
 176
 177         /* TES */
 178         SI_SGPR_TES_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
 179         SI_SGPR_TES_OFFCHIP_ADDR_BASE64K,
 180         SI_TES_NUM_USER_SGPR,
 181
 182         /* GFX6-8: TCS only */
 183         GFX6_SGPR_TCS_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS,
 184         GFX6_SGPR_TCS_OUT_OFFSETS,
 185         GFX6_SGPR_TCS_OUT_LAYOUT,
 186         GFX6_SGPR_TCS_IN_LAYOUT,
 187         GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K,
 188         GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K,
 189         GFX6_TCS_NUM_USER_SGPR,
 190
 191         /* GFX9: Merged LS-HS (VS-TCS) only. */
 192         GFX9_SGPR_TCS_OFFCHIP_LAYOUT = SI_VS_NUM_USER_SGPR,
 193         GFX9_SGPR_TCS_OUT_OFFSETS,
 194         GFX9_SGPR_TCS_OUT_LAYOUT,
 195         GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K,
 196         GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K,
 197         GFX9_SGPR_unused_to_align_the_next_pointer,
 198         GFX9_SGPR_TCS_CONST_AND_SHADER_BUFFERS,
 199         GFX9_SGPR_TCS_CONST_AND_SHADER_BUFFERS_HI,
 200         GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES,
 201         GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES_HI,
 202         GFX9_TCS_NUM_USER_SGPR,
 203
 204         /* GFX9: Merged ES-GS (VS-GS or TES-GS). */
 205         GFX9_SGPR_GS_CONST_AND_SHADER_BUFFERS = SI_VS_NUM_USER_SGPR,
 206         GFX9_SGPR_GS_CONST_AND_SHADER_BUFFERS_HI,
 207         GFX9_SGPR_GS_SAMPLERS_AND_IMAGES,
 208         GFX9_SGPR_GS_SAMPLERS_AND_IMAGES_HI,
 209         GFX9_GS_NUM_USER_SGPR,
 210
 211         /* GS limits */
 212         GFX6_GS_NUM_USER_SGPR = SI_NUM_RESOURCE_SGPRS,
 213         SI_GSCOPY_NUM_USER_SGPR = SI_SGPR_RW_BUFFERS_HI + 1,
 214
 215         /* PS only */
 216         SI_SGPR_ALPHA_REF       = SI_NUM_RESOURCE_SGPRS,
 217         SI_PS_NUM_USER_SGPR,
 218 };
 219
 220 /* LLVM function parameter indices */
 221 enum {
 222         SI_NUM_RESOURCE_PARAMS = 3,
 223
 224         /* PS only parameters */
 225         SI_PARAM_ALPHA_REF = SI_NUM_RESOURCE_PARAMS,
 226         SI_PARAM_PRIM_MASK,
 227         SI_PARAM_PERSP_SAMPLE,
 228         SI_PARAM_PERSP_CENTER,
 229         SI_PARAM_PERSP_CENTROID,
 230         SI_PARAM_PERSP_PULL_MODEL,
 231         SI_PARAM_LINEAR_SAMPLE,
 232         SI_PARAM_LINEAR_CENTER,
 233         SI_PARAM_LINEAR_CENTROID,
 234         SI_PARAM_LINE_STIPPLE_TEX,
 235         SI_PARAM_POS_X_FLOAT,
 236         SI_PARAM_POS_Y_FLOAT,
 237         SI_PARAM_POS_Z_FLOAT,
 238         SI_PARAM_POS_W_FLOAT,
 239         SI_PARAM_FRONT_FACE,
 240         SI_PARAM_ANCILLARY,
 241         SI_PARAM_SAMPLE_COVERAGE,
 242         SI_PARAM_POS_FIXED_PT,
 243
 244         SI_NUM_PARAMS = SI_PARAM_POS_FIXED_PT + 9, /* +8 for COLOR[0..1] */
 245 };
 246
 247 /* Fields of driver-defined VS state SGPR. */
 248 /* Clamp vertex color output (only used in VS as VS). */
 249 #define S_VS_STATE_CLAMP_VERTEX_COLOR(x)        (((unsigned)(x) & 0x1) << 0)
 250 #define C_VS_STATE_CLAMP_VERTEX_COLOR           0xFFFFFFFE
 251 #define S_VS_STATE_INDEXED(x)                   (((unsigned)(x) & 0x1) << 1)
 252 #define C_VS_STATE_INDEXED                      0xFFFFFFFD
 253 #define S_VS_STATE_LS_OUT_PATCH_SIZE(x)         (((unsigned)(x) & 0x1FFF) << 8)
 254 #define C_VS_STATE_LS_OUT_PATCH_SIZE            0xFFE000FF
 255 #define S_VS_STATE_LS_OUT_VERTEX_SIZE(x)        (((unsigned)(x) & 0xFF) << 24)
 256 #define C_VS_STATE_LS_OUT_VERTEX_SIZE           0x00FFFFFF
 257
 258 /* SI-specific system values. */
 259 enum {
 260         TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI = TGSI_SEMANTIC_COUNT,
 261         TGSI_SEMANTIC_DEFAULT_TESSINNER_SI,
 262 };
 263
 264 /* For VS shader key fix_fetch. */
 265 enum {
 266         SI_FIX_FETCH_NONE = 0,
 267         SI_FIX_FETCH_A2_SNORM,
 268         SI_FIX_FETCH_A2_SSCALED,
 269         SI_FIX_FETCH_A2_SINT,
 270         SI_FIX_FETCH_RGBA_32_UNORM,
 271         SI_FIX_FETCH_RGBX_32_UNORM,
 272         SI_FIX_FETCH_RGBA_32_SNORM,
 273         SI_FIX_FETCH_RGBX_32_SNORM,
 274         SI_FIX_FETCH_RGBA_32_USCALED,
 275         SI_FIX_FETCH_RGBA_32_SSCALED,
 276         SI_FIX_FETCH_RGBA_32_FIXED,
 277         SI_FIX_FETCH_RGBX_32_FIXED,
 278         SI_FIX_FETCH_RG_64_FLOAT,
 279         SI_FIX_FETCH_RGB_64_FLOAT,
 280         SI_FIX_FETCH_RGBA_64_FLOAT,
 281         SI_FIX_FETCH_RGB_8,     /* A = 1.0 */
 282         SI_FIX_FETCH_RGB_8_INT, /* A = 1 */
 283         SI_FIX_FETCH_RGB_16,
 284         SI_FIX_FETCH_RGB_16_INT,
 285 };
 286
 287 struct si_shader;
 288
 289 /* State of the context creating the shader object. */
 290 struct si_compiler_ctx_state {
 291         /* Should only be used by si_init_shader_selector_async and
 292          * si_build_shader_variant if thread_index == -1 (non-threaded). */
 293         LLVMTargetMachineRef            tm;
 294
 295         /* Used if thread_index == -1 or if debug.async is true. */
 296         struct pipe_debug_callback      debug;
 297
 298         /* Used for creating the log string for gallium/ddebug. */
 299         bool                            is_debug_context;
 300 };
 301
 302 /* A shader selector is a gallium CSO and contains shader variants and
 303  * binaries for one TGSI program. This can be shared by multiple contexts.
 304  */
 305 struct si_shader_selector {
 306         struct pipe_reference   reference;
 307         struct si_screen        *screen;
 308         struct util_queue_fence ready;
 309         struct si_compiler_ctx_state compiler_ctx_state;
 310
 311         mtx_t           mutex;
 312         struct si_shader        *first_variant; /* immutable after the first variant */
 313         struct si_shader        *last_variant; /* mutable */
 314
 315         /* The compiled TGSI shader expecting a prolog and/or epilog (not
 316          * uploaded to a buffer).
 317          */
 318         struct si_shader        *main_shader_part;
 319         struct si_shader        *main_shader_part_ls; /* as_ls is set in the key */
 320         struct si_shader        *main_shader_part_es; /* as_es is set in the key */
 321
 322         struct si_shader        *gs_copy_shader;
 323
 324         struct tgsi_token       *tokens;
 325         struct nir_shader       *nir;
 326         struct pipe_stream_output_info  so;
 327         struct tgsi_shader_info         info;
 328
 329         /* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
 330         unsigned        type;
 331         bool            vs_needs_prolog;
 332         unsigned        pa_cl_vs_out_cntl;
 333         ubyte           clipdist_mask;
 334         ubyte           culldist_mask;
 335
 336         /* GS parameters. */
 337         unsigned        esgs_itemsize;
 338         unsigned        gs_input_verts_per_prim;
 339         unsigned        gs_output_prim;
 340         unsigned        gs_max_out_vertices;
 341         unsigned        gs_num_invocations;
 342         unsigned        max_gs_stream; /* count - 1 */
 343         unsigned        gsvs_vertex_size;
 344         unsigned        max_gsvs_emit_size;
 345         unsigned        enabled_streamout_buffer_mask;
 346
 347         /* PS parameters. */
 348         unsigned        color_attr_index[2];
 349         unsigned        db_shader_control;
 350         /* Set 0xf or 0x0 (4 bits) per each written output.
 351          * ANDed with spi_shader_col_format.
 352          */
 353         unsigned        colors_written_4bit;
 354
 355         /* CS parameters */
 356         unsigned local_size;
 357
 358         uint64_t        outputs_written;        /* "get_unique_index" bits */
 359         uint32_t        patch_outputs_written;  /* "get_unique_index_patch" bits */
 360
 361         uint64_t        inputs_read;            /* "get_unique_index" bits */
 362
 363         /* bitmasks of used descriptor slots */
 364         uint32_t        active_const_and_shader_buffers;
 365         uint64_t        active_samplers_and_images;
 366 };
 367
 368 /* Valid shader configurations:
 369  *
 370  * API shaders       VS | TCS | TES | GS |pass| PS
 371  * are compiled as:     |     |     |    |thru|
 372  *                      |     |     |    |    |
 373  * Only VS & PS:     VS |     |     |    |    | PS
 374  * GFX6 - with GS:   ES |     |     | GS | VS | PS
 375  *      - with tess: LS | HS  | VS  |    |    | PS
 376  *      - with both: LS | HS  | ES  | GS | VS | PS
 377  * GFX9 - with GS:   -> |     |     | GS | VS | PS
 378  *      - with tess: -> | HS  | VS  |    |    | PS
 379  *      - with both: -> | HS  | ->  | GS | VS | PS
 380  *
 381  * -> = merged with the next stage
 382  */
 383
 384 /* Use the byte alignment for all following structure members for optimal
 385  * shader key memory footprint.
 386  */
 387 #pragma pack(push, 1)
 388
 389 /* Common VS bits between the shader key and the prolog key. */
 390 struct si_vs_prolog_bits {
 391         /* - If neither "is_one" nor "is_fetched" has a bit set, the instance
 392          *   divisor is 0.
 393          * - If "is_one" has a bit set, the instance divisor is 1.
 394          * - If "is_fetched" has a bit set, the instance divisor will be loaded
 395          *   from the constant buffer.
 396          */
 397         uint16_t        instance_divisor_is_one;     /* bitmask of inputs */
 398         uint16_t        instance_divisor_is_fetched; /* bitmask of inputs */
 399 };
 400
 401 /* Common TCS bits between the shader key and the epilog key. */
 402 struct si_tcs_epilog_bits {
 403         unsigned        prim_mode:3;
 404         unsigned        tes_reads_tess_factors:1;
 405 };
 406
 407 struct si_gs_prolog_bits {
 408         unsigned        tri_strip_adj_fix:1;
 409 };
 410
 411 /* Common PS bits between the shader key and the prolog key. */
 412 struct si_ps_prolog_bits {
 413         unsigned        color_two_side:1;
 414         unsigned        flatshade_colors:1;
 415         unsigned        poly_stipple:1;
 416         unsigned        force_persp_sample_interp:1;
 417         unsigned        force_linear_sample_interp:1;
 418         unsigned        force_persp_center_interp:1;
 419         unsigned        force_linear_center_interp:1;
 420         unsigned        bc_optimize_for_persp:1;
 421         unsigned        bc_optimize_for_linear:1;
 422 };
 423
 424 /* Common PS bits between the shader key and the epilog key. */
 425 struct si_ps_epilog_bits {
 426         unsigned        spi_shader_col_format;
 427         unsigned        color_is_int8:8;
 428         unsigned        color_is_int10:8;
 429         unsigned        last_cbuf:3;
 430         unsigned        alpha_func:3;
 431         unsigned        alpha_to_one:1;
 432         unsigned        poly_line_smoothing:1;
 433         unsigned        clamp_color:1;
 434 };
 435
 436 union si_shader_part_key {
 437         struct {
 438                 struct si_vs_prolog_bits states;
 439                 unsigned        num_input_sgprs:6;
 440                 /* For merged stages such as LS-HS, HS input VGPRs are first. */
 441                 unsigned        num_merged_next_stage_vgprs:3;
 442                 unsigned        last_input:4;
 443                 unsigned        as_ls:1;
 444                 /* Prologs for monolithic shaders shouldn't set EXEC. */
 445                 unsigned        is_monolithic:1;
 446         } vs_prolog;
 447         struct {
 448                 struct si_tcs_epilog_bits states;
 449         } tcs_epilog;
 450         struct {
 451                 struct si_gs_prolog_bits states;
 452                 /* Prologs of monolithic shaders shouldn't set EXEC. */
 453                 unsigned        is_monolithic:1;
 454         } gs_prolog;
 455         struct {
 456                 struct si_ps_prolog_bits states;
 457                 unsigned        num_input_sgprs:6;
 458                 unsigned        num_input_vgprs:5;
 459                 /* Color interpolation and two-side color selection. */
 460                 unsigned        colors_read:8; /* color input components read */
 461                 unsigned        num_interp_inputs:5; /* BCOLOR is at this location */
 462                 unsigned        face_vgpr_index:5;
 463                 unsigned        wqm:1;
 464                 char            color_attr_index[2];
 465                 char            color_interp_vgpr_index[2]; /* -1 == constant */
 466         } ps_prolog;
 467         struct {
 468                 struct si_ps_epilog_bits states;
 469                 unsigned        colors_written:8;
 470                 unsigned        writes_z:1;
 471                 unsigned        writes_stencil:1;
 472                 unsigned        writes_samplemask:1;
 473         } ps_epilog;
 474 };
 475
 476 struct si_shader_key {
 477         /* Prolog and epilog flags. */
 478         union {
 479                 struct {
 480                         struct si_vs_prolog_bits prolog;
 481                 } vs;
 482                 struct {
 483                         struct si_vs_prolog_bits ls_prolog; /* for merged LS-HS */
 484                         struct si_shader_selector *ls;   /* for merged LS-HS */
 485                         struct si_tcs_epilog_bits epilog;
 486                 } tcs; /* tessellation control shader */
 487                 struct {
 488                         struct si_vs_prolog_bits vs_prolog; /* for merged ES-GS */
 489                         struct si_shader_selector *es;   /* for merged ES-GS */
 490                         struct si_gs_prolog_bits prolog;
 491                 } gs;
 492                 struct {
 493                         struct si_ps_prolog_bits prolog;
 494                         struct si_ps_epilog_bits epilog;
 495                 } ps;
 496         } part;
 497
 498         /* These two are initially set according to the NEXT_SHADER property,
 499          * or guessed if the property doesn't seem correct.
 500          */
 501         unsigned as_es:1; /* export shader, which precedes GS */
 502         unsigned as_ls:1; /* local shader, which precedes TCS */
 503
 504         /* Flags for monolithic compilation only. */
 505         struct {
 506                 /* One byte for every input: SI_FIX_FETCH_* enums. */
 507                 uint8_t         vs_fix_fetch[SI_MAX_ATTRIBS];
 508
 509                 union {
 510                         uint64_t        ff_tcs_inputs_to_copy; /* for fixed-func TCS */
 511                         /* When PS needs PrimID and GS is disabled. */
 512                         unsigned        vs_export_prim_id:1;
 513                 } u;
 514         } mono;
 515
 516         /* Optimization flags for asynchronous compilation only. */
 517         struct {
 518                 /* For HW VS (it can be VS, TES, GS) */
 519                 uint64_t        kill_outputs; /* "get_unique_index" bits */
 520                 unsigned        clip_disable:1;
 521
 522                 /* For shaders where monolithic variants have better code.
 523                  *
 524                  * This is a flag that has no effect on code generation,
 525                  * but forces monolithic shaders to be used as soon as
 526                  * possible, because it's in the "opt" group.
 527                  */
 528                 unsigned        prefer_mono:1;
 529         } opt;
 530 };
 531
 532 /* Restore the pack alignment to default. */
 533 #pragma pack(pop)
 534
 535 struct si_shader_config {
 536         unsigned                        num_sgprs;
 537         unsigned                        num_vgprs;
 538         unsigned                        spilled_sgprs;
 539         unsigned                        spilled_vgprs;
 540         unsigned                        private_mem_vgprs;
 541         unsigned                        lds_size;
 542         unsigned                        spi_ps_input_ena;
 543         unsigned                        spi_ps_input_addr;
 544         unsigned                        float_mode;
 545         unsigned                        scratch_bytes_per_wave;
 546         unsigned                        rsrc1;
 547         unsigned                        rsrc2;
 548 };
 549
 550 /* GCN-specific shader info. */
 551 struct si_shader_info {
 552         ubyte                   vs_output_param_offset[SI_MAX_VS_OUTPUTS];
 553         ubyte                   num_input_sgprs;
 554         ubyte                   num_input_vgprs;
 555         char                    face_vgpr_index;
 556         bool                    uses_instanceid;
 557         ubyte                   nr_pos_exports;
 558         ubyte                   nr_param_exports;
 559 };
 560
 561 struct si_shader {
 562         struct si_compiler_ctx_state    compiler_ctx_state;
 563
 564         struct si_shader_selector       *selector;
 565         struct si_shader_selector       *previous_stage_sel; /* for refcounting */
 566         struct si_shader                *next_variant;
 567
 568         struct si_shader_part           *prolog;
 569         struct si_shader                *previous_stage; /* for GFX9 */
 570         struct si_shader_part           *prolog2;
 571         struct si_shader_part           *epilog;
 572
 573         struct si_pm4_state             *pm4;
 574         struct r600_resource            *bo;
 575         struct r600_resource            *scratch_bo;
 576         struct si_shader_key            key;
 577         struct util_queue_fence         optimized_ready;
 578         bool                            compilation_failed;
 579         bool                            is_monolithic;
 580         bool                            is_optimized;
 581         bool                            is_binary_shared;
 582         bool                            is_gs_copy_shader;
 583
 584         /* The following data is all that's needed for binary shaders. */
 585         struct ac_shader_binary binary;
 586         struct si_shader_config         config;
 587         struct si_shader_info           info;
 588
 589         /* Shader key + LLVM IR + disassembly + statistics.
 590          * Generated for debug contexts only.
 591          */
 592         char                            *shader_log;
 593         size_t                          shader_log_size;
 594 };
 595
 596 struct si_shader_part {
 597         struct si_shader_part *next;
 598         union si_shader_part_key key;
 599         struct ac_shader_binary binary;
 600         struct si_shader_config config;
 601 };
 602
 603 /* si_shader.c */
 604 struct si_shader *
 605 si_generate_gs_copy_shader(struct si_screen *sscreen,
 606                            LLVMTargetMachineRef tm,
 607                            struct si_shader_selector *gs_selector,
 608                            struct pipe_debug_callback *debug);
 609 int si_compile_tgsi_shader(struct si_screen *sscreen,
 610                            LLVMTargetMachineRef tm,
 611                            struct si_shader *shader,
 612                            bool is_monolithic,
 613                            struct pipe_debug_callback *debug);
 614 int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
 615                      struct si_shader *shader,
 616                      struct pipe_debug_callback *debug);
 617 void si_shader_destroy(struct si_shader *shader);
 618 unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name, unsigned index);
 619 unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
 620 int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
 621 void si_shader_dump(struct si_screen *sscreen, const struct si_shader *shader,
 622                     struct pipe_debug_callback *debug, unsigned processor,
 623                     FILE *f, bool check_debug_option);
 624 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
 625                                       unsigned *lds_size);
 626 void si_shader_apply_scratch_relocs(struct si_shader *shader,
 627                                     uint64_t scratch_va);
 628 void si_shader_binary_read_config(struct ac_shader_binary *binary,
 629                                   struct si_shader_config *conf,
 630                                   unsigned symbol_offset);
 631 unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
 632                                     bool writes_samplemask);
 633 const char *si_get_shader_name(const struct si_shader *shader, unsigned processor);
 634
 635 /* si_shader_nir.c */
 636 void si_nir_scan_shader(const struct nir_shader *nir,
 637                         struct tgsi_shader_info *info);
 638 void si_lower_nir(struct si_shader_selector *sel);
 639
 640 /* Inline helpers. */
 641
 642 /* Return the pointer to the main shader part's pointer. */
 643 static inline struct si_shader **
 644 si_get_main_shader_part(struct si_shader_selector *sel,
 645                         struct si_shader_key *key)
 646 {
 647         if (key->as_ls)
 648                 return &sel->main_shader_part_ls;
 649         if (key->as_es)
 650                 return &sel->main_shader_part_es;
 651         return &sel->main_shader_part;
 652 }
 653
 654 static inline bool
 655 si_shader_uses_bindless_samplers(struct si_shader_selector *selector)
 656 {
 657         return selector ? selector->info.uses_bindless_samplers : false;
 658 }
 659
 660 static inline bool
 661 si_shader_uses_bindless_images(struct si_shader_selector *selector)
 662 {
 663         return selector ? selector->info.uses_bindless_images : false;
 664 }
 665
 666 #endif