src/gallium/drivers/radeonsi/si_shader_internal.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #ifndef SI_SHADER_PRIVATE_H
  25 #define SI_SHADER_PRIVATE_H
  26
  27 #include "si_shader.h"
  28 #include "gallivm/lp_bld_init.h"
  29 #include "gallivm/lp_bld_tgsi.h"
  30 #include "tgsi/tgsi_parse.h"
  31 #include "ac_llvm_util.h"
  32 #include "ac_llvm_build.h"
  33
  34 #include <llvm-c/Core.h>
  35 #include <llvm-c/TargetMachine.h>
  36
  37 struct pipe_debug_callback;
  38 struct radeon_shader_binary;
  39
  40 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
  41 #define RADEON_LLVM_MAX_INPUTS 32 * 4
  42 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
  43
  44 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
  45
  46 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4
  47 #define RADEON_LLVM_MAX_ADDRS 16
  48
  49 struct si_llvm_flow;
  50
  51 struct si_shader_context {
  52         struct lp_build_tgsi_context bld_base;
  53         struct gallivm_state gallivm;
  54         struct ac_llvm_context ac;
  55         struct si_shader *shader;
  56         struct si_screen *screen;
  57
  58         unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
  59
  60         /* Whether the prolog will be compiled separately. */
  61         bool separate_prolog;
  62
  63         /** This function is responsible for initilizing the inputs array and will be
  64           * called once for each input declared in the TGSI shader.
  65           */
  66         void (*load_input)(struct si_shader_context *,
  67                            unsigned input_index,
  68                            const struct tgsi_full_declaration *decl,
  69                            LLVMValueRef out[4]);
  70
  71         void (*load_system_value)(struct si_shader_context *,
  72                                   unsigned index,
  73                                   const struct tgsi_full_declaration *decl);
  74
  75         void (*declare_memory_region)(struct si_shader_context *,
  76                                       const struct tgsi_full_declaration *decl);
  77
  78         /** This array contains the input values for the shader.  Typically these
  79           * values will be in the form of a target intrinsic that will inform the
  80           * backend how to load the actual inputs to the shader.
  81           */
  82         struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
  83         LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
  84         LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
  85         LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
  86
  87         /** This pointer is used to contain the temporary values.
  88           * The amount of temporary used in tgsi can't be bound to a max value and
  89           * thus we must allocate this array at runtime.
  90           */
  91         LLVMValueRef *temps;
  92         unsigned temps_count;
  93         LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
  94
  95         LLVMValueRef *imms;
  96         unsigned imms_num;
  97
  98         struct si_llvm_flow *flow;
  99         unsigned flow_depth;
 100         unsigned flow_depth_max;
 101
 102         struct tgsi_array_info *temp_arrays;
 103         LLVMValueRef *temp_array_allocas;
 104
 105         LLVMValueRef undef_alloca;
 106
 107         LLVMValueRef main_fn;
 108         LLVMTypeRef return_type;
 109
 110         int param_streamout_config;
 111         int param_streamout_write_index;
 112         int param_streamout_offset[4];
 113         int param_vertex_id;
 114         int param_rel_auto_id;
 115         int param_vs_prim_id;
 116         int param_instance_id;
 117         int param_vertex_index0;
 118         int param_tes_u;
 119         int param_tes_v;
 120         int param_tes_rel_patch_id;
 121         int param_tes_patch_id;
 122         int param_es2gs_offset;
 123         int param_oc_lds;
 124
 125         LLVMTargetMachineRef tm;
 126
 127         unsigned range_md_kind;
 128         unsigned fpmath_md_kind;
 129         LLVMValueRef fpmath_md_2p5_ulp;
 130
 131         /* Preloaded descriptors. */
 132         LLVMValueRef esgs_ring;
 133         LLVMValueRef gsvs_ring[4];
 134
 135         LLVMValueRef lds;
 136         LLVMValueRef gs_next_vertex[4];
 137         LLVMValueRef return_value;
 138
 139         LLVMTypeRef voidt;
 140         LLVMTypeRef i1;
 141         LLVMTypeRef i8;
 142         LLVMTypeRef i32;
 143         LLVMTypeRef i64;
 144         LLVMTypeRef i128;
 145         LLVMTypeRef f32;
 146         LLVMTypeRef v16i8;
 147         LLVMTypeRef v2i32;
 148         LLVMTypeRef v4i32;
 149         LLVMTypeRef v4f32;
 150         LLVMTypeRef v8i32;
 151
 152         LLVMValueRef shared_memory;
 153 };
 154
 155 static inline struct si_shader_context *
 156 si_shader_context(struct lp_build_tgsi_context *bld_base)
 157 {
 158         return (struct si_shader_context*)bld_base;
 159 }
 160
 161 void si_llvm_add_attribute(LLVMValueRef F, const char *name, int value);
 162 void si_llvm_shader_type(LLVMValueRef F, unsigned type);
 163
 164 LLVMTargetRef si_llvm_get_amdgpu_target(const char *triple);
 165
 166 unsigned si_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary,
 167                          LLVMTargetMachineRef tm,
 168                          struct pipe_debug_callback *debug);
 169
 170 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
 171                           enum tgsi_opcode_type type);
 172
 173 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
 174                      enum tgsi_opcode_type type, LLVMValueRef value);
 175
 176 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
 177                                  LLVMValueRef index,
 178                                  unsigned num);
 179
 180 void si_llvm_context_init(struct si_shader_context *ctx,
 181                           struct si_screen *sscreen,
 182                           struct si_shader *shader,
 183                           LLVMTargetMachineRef tm,
 184                           const struct tgsi_shader_info *info,
 185                           const struct tgsi_token *tokens);
 186
 187 void si_llvm_create_func(struct si_shader_context *ctx,
 188                          const char *name,
 189                          LLVMTypeRef *return_types, unsigned num_return_elems,
 190                          LLVMTypeRef *ParamTypes, unsigned ParamCount);
 191
 192 void si_llvm_dispose(struct si_shader_context *ctx);
 193
 194 void si_llvm_finalize_module(struct si_shader_context *ctx,
 195                              bool run_verifier);
 196
 197 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
 198                                       enum tgsi_opcode_type type,
 199                                       LLVMValueRef ptr,
 200                                       LLVMValueRef ptr2);
 201
 202 LLVMValueRef si_llvm_saturate(struct lp_build_tgsi_context *bld_base,
 203                               LLVMValueRef value);
 204
 205 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
 206                                 const struct tgsi_full_src_register *reg,
 207                                 enum tgsi_opcode_type type,
 208                                 unsigned swizzle);
 209
 210 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
 211                         const struct tgsi_full_instruction *inst,
 212                         const struct tgsi_opcode_info *info,
 213                         LLVMValueRef dst[4]);
 214
 215 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
 216
 217 #endif