src/gallium/drivers/radeonsi/si_shader_internal.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 #ifndef SI_SHADER_PRIVATE_H
  26 #define SI_SHADER_PRIVATE_H
  27
  28 #include "si_shader.h"
  29 #include "gallivm/lp_bld_flow.h"
  30 #include "gallivm/lp_bld_init.h"
  31 #include "gallivm/lp_bld_tgsi.h"
  32 #include "tgsi/tgsi_parse.h"
  33 #include "ac_shader_abi.h"
  34
  35 #include <llvm-c/Core.h>
  36 #include <llvm-c/TargetMachine.h>
  37
  38 struct pipe_debug_callback;
  39
  40 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
  41 #define RADEON_LLVM_MAX_INPUTS 32 * 4
  42 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
  43
  44 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
  45 #define RADEON_LLVM_MAX_ADDRS 16
  46
  47 enum si_arg_regfile {
  48         ARG_SGPR,
  49         ARG_VGPR
  50 };
  51
  52 /**
  53  * Used to collect types and other info about arguments of the LLVM function
  54  * before the function is created.
  55  */
  56 struct si_function_info {
  57         LLVMTypeRef types[100];
  58         LLVMValueRef *assign[100];
  59         unsigned num_sgpr_params;
  60         unsigned num_params;
  61 };
  62
  63 struct si_shader_output_values {
  64         LLVMValueRef values[4];
  65         unsigned semantic_name;
  66         unsigned semantic_index;
  67         ubyte vertex_stream[4];
  68 };
  69
  70 struct si_shader_context {
  71         struct lp_build_tgsi_context bld_base;
  72         struct gallivm_state gallivm;
  73         struct ac_llvm_context ac;
  74         struct si_shader *shader;
  75         struct si_screen *screen;
  76
  77         unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
  78
  79         /* For clamping the non-constant index in resource indexing: */
  80         unsigned num_const_buffers;
  81         unsigned num_shader_buffers;
  82         unsigned num_images;
  83         unsigned num_samplers;
  84
  85         struct ac_shader_abi abi;
  86
  87         /** This function is responsible for initilizing the inputs array and will be
  88           * called once for each input declared in the TGSI shader.
  89           */
  90         void (*load_input)(struct si_shader_context *,
  91                            unsigned input_index,
  92                            const struct tgsi_full_declaration *decl,
  93                            LLVMValueRef out[4]);
  94
  95         /** This array contains the input values for the shader.  Typically these
  96           * values will be in the form of a target intrinsic that will inform the
  97           * backend how to load the actual inputs to the shader.
  98           */
  99         struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
 100         LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
 101         LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
 102         LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
 103
 104         /** This pointer is used to contain the temporary values.
 105           * The amount of temporary used in tgsi can't be bound to a max value and
 106           * thus we must allocate this array at runtime.
 107           */
 108         LLVMValueRef *temps;
 109         unsigned temps_count;
 110         LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
 111
 112         LLVMValueRef *imms;
 113         unsigned imms_num;
 114
 115         LLVMBasicBlockRef merged_wrap_if_entry_block;
 116         int merged_wrap_if_label;
 117
 118         struct tgsi_array_info *temp_arrays;
 119         LLVMValueRef *temp_array_allocas;
 120
 121         LLVMValueRef undef_alloca;
 122
 123         LLVMValueRef main_fn;
 124         LLVMTypeRef return_type;
 125
 126         /* Parameter indices for LLVMGetParam. */
 127         int param_rw_buffers;
 128         int param_const_and_shader_buffers;
 129         int param_samplers_and_images;
 130         int param_bindless_samplers_and_images;
 131         /* Common inputs for merged shaders. */
 132         int param_merged_wave_info;
 133         int param_merged_scratch_offset;
 134         /* API VS */
 135         int param_vertex_buffers;
 136         int param_rel_auto_id;
 137         int param_vs_prim_id;
 138         int param_vertex_index0;
 139         /* VS states and layout of LS outputs / TCS inputs at the end
 140          *   [0] = clamp vertex color
 141          *   [1] = indexed
 142          *   [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
 143          *            max = 32*32*4 + 32*4
 144          *   [24:31] = stride between vertices in DW = num_inputs * 4
 145          *             max = 32*4
 146          */
 147         int param_vs_state_bits;
 148         int param_vs_blit_inputs;
 149         /* HW VS */
 150         int param_streamout_config;
 151         int param_streamout_write_index;
 152         int param_streamout_offset[4];
 153
 154         /* API TCS & TES */
 155         /* Layout of TCS outputs in the offchip buffer
 156          * # 6 bits
 157          *   [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
 158          * # 6 bits
 159          *   [6:11] = the number of output vertices per patch, max = 32
 160          * # 20 bits
 161          *   [12:31] = the offset of per patch attributes in the buffer in bytes.
 162          *             max = NUM_PATCHES*32*32*16
 163          */
 164         int param_tcs_offchip_layout;
 165
 166         /* API TCS */
 167         /* Offsets where TCS outputs and TCS patch outputs live in LDS:
 168          *   [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
 169          *   [16:31] = TCS output patch0 offset for per-patch / 16
 170          *             max = (NUM_PATCHES + 1) * 32*32
 171          */
 172         int param_tcs_out_lds_offsets;
 173         /* Layout of TCS outputs / TES inputs:
 174          *   [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
 175          *            max = 32*32*4 + 32*4
 176          *   [13:18] = gl_PatchVerticesIn, max = 32
 177          *   [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
 178          */
 179         int param_tcs_out_lds_layout;
 180         int param_tcs_offchip_offset;
 181         int param_tcs_factor_offset;
 182
 183         /* API TES */
 184         int param_tes_offchip_addr;
 185         int param_tes_u;
 186         int param_tes_v;
 187         int param_tes_rel_patch_id;
 188         /* HW ES */
 189         int param_es2gs_offset;
 190         /* HW GS */
 191         /* On gfx10:
 192          *  - bits 0..10: ordered_wave_id
 193          *  - bits 12..20: number of vertices in group
 194          *  - bits 22..30: number of primitives in group
 195          */
 196         LLVMValueRef gs_tg_info;
 197         /* API GS */
 198         int param_gs2vs_offset;
 199         int param_gs_wave_id; /* GFX6 */
 200         LLVMValueRef gs_vtx_offset[6]; /* in dwords (GFX6) */
 201         int param_gs_vtx01_offset; /* in dwords (GFX9) */
 202         int param_gs_vtx23_offset; /* in dwords (GFX9) */
 203         int param_gs_vtx45_offset; /* in dwords (GFX9) */
 204         /* CS */
 205         int param_block_size;
 206         int param_cs_user_data;
 207
 208         struct ac_llvm_compiler *compiler;
 209
 210         /* Preloaded descriptors. */
 211         LLVMValueRef esgs_ring;
 212         LLVMValueRef gsvs_ring[4];
 213         LLVMValueRef tess_offchip_ring;
 214
 215         LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
 216         LLVMValueRef gs_next_vertex[4];
 217         LLVMValueRef gs_curprim_verts[4];
 218         LLVMValueRef gs_generated_prims[4];
 219         LLVMValueRef gs_ngg_emit;
 220         LLVMValueRef gs_ngg_scratch;
 221         LLVMValueRef postponed_kill;
 222         LLVMValueRef return_value;
 223
 224         LLVMTypeRef voidt;
 225         LLVMTypeRef i1;
 226         LLVMTypeRef i8;
 227         LLVMTypeRef i32;
 228         LLVMTypeRef i64;
 229         LLVMTypeRef i128;
 230         LLVMTypeRef f32;
 231         LLVMTypeRef v2i32;
 232         LLVMTypeRef v4i32;
 233         LLVMTypeRef v4f32;
 234         LLVMTypeRef v8i32;
 235
 236         LLVMValueRef i32_0;
 237         LLVMValueRef i32_1;
 238         LLVMValueRef i1false;
 239         LLVMValueRef i1true;
 240 };
 241
 242 static inline struct si_shader_context *
 243 si_shader_context(struct lp_build_tgsi_context *bld_base)
 244 {
 245         return (struct si_shader_context*)bld_base;
 246 }
 247
 248 static inline struct si_shader_context *
 249 si_shader_context_from_abi(struct ac_shader_abi *abi)
 250 {
 251         struct si_shader_context *ctx = NULL;
 252         return container_of(abi, ctx, abi);
 253 }
 254
 255 void si_init_function_info(struct si_function_info *fninfo);
 256 unsigned add_arg_assign(struct si_function_info *fninfo,
 257                         enum si_arg_regfile regfile, LLVMTypeRef type,
 258                         LLVMValueRef *assign);
 259 void si_create_function(struct si_shader_context *ctx,
 260                         const char *name,
 261                         LLVMTypeRef *returns, unsigned num_returns,
 262                         struct si_function_info *fninfo,
 263                         unsigned max_workgroup_size);
 264 unsigned si_llvm_compile(LLVMModuleRef M, struct si_shader_binary *binary,
 265                          struct ac_llvm_compiler *compiler,
 266                          struct pipe_debug_callback *debug,
 267                          bool less_optimized, unsigned wave_size);
 268
 269 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
 270                           enum tgsi_opcode_type type);
 271
 272 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
 273                      enum tgsi_opcode_type type, LLVMValueRef value);
 274
 275 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
 276                                  LLVMValueRef index,
 277                                  unsigned num);
 278
 279 void si_llvm_context_init(struct si_shader_context *ctx,
 280                           struct si_screen *sscreen,
 281                           struct ac_llvm_compiler *compiler,
 282                           unsigned wave_size);
 283 void si_llvm_context_set_ir(struct si_shader_context *ctx,
 284                             struct si_shader *shader);
 285
 286 void si_llvm_create_func(struct si_shader_context *ctx,
 287                          const char *name,
 288                          LLVMTypeRef *return_types, unsigned num_return_elems,
 289                          LLVMTypeRef *ParamTypes, unsigned ParamCount);
 290
 291 void si_llvm_dispose(struct si_shader_context *ctx);
 292
 293 void si_llvm_optimize_module(struct si_shader_context *ctx);
 294
 295 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
 296                                       LLVMTypeRef type,
 297                                       LLVMValueRef ptr,
 298                                       LLVMValueRef ptr2);
 299
 300 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
 301                                 const struct tgsi_full_src_register *reg,
 302                                 enum tgsi_opcode_type type,
 303                                 unsigned swizzle);
 304
 305 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible);
 306
 307 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
 308                                    LLVMTypeRef type,
 309                                    LLVMValueRef vertex_index,
 310                                    LLVMValueRef param_index,
 311                                    unsigned const_index,
 312                                    unsigned location,
 313                                    unsigned driver_location,
 314                                    unsigned component,
 315                                    unsigned num_components,
 316                                    bool is_patch,
 317                                    bool is_compact,
 318                                    bool load_input);
 319
 320 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
 321                                    unsigned input_index,
 322                                    unsigned vtx_offset_param,
 323                                    LLVMTypeRef type,
 324                                    unsigned swizzle);
 325
 326 LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
 327                                         enum glsl_interp_mode interp,
 328                                         unsigned location);
 329
 330 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
 331                         const struct tgsi_full_instruction *inst,
 332                         const struct tgsi_opcode_info *info,
 333                         unsigned index,
 334                         LLVMValueRef dst[4]);
 335
 336 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
 337                                    const struct tgsi_ind_register *ind,
 338                                    unsigned addr_mul, int rel_index);
 339 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
 340                                            const struct tgsi_ind_register *ind,
 341                                            int rel_index, unsigned num);
 342 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
 343
 344 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
 345 void si_shader_context_init_mem(struct si_shader_context *ctx);
 346
 347 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
 348                                   LLVMValueRef list, LLVMValueRef index,
 349                                   enum ac_descriptor_type type);
 350 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
 351                                 LLVMValueRef list, LLVMValueRef index,
 352                                 enum ac_descriptor_type desc_type,
 353                                 bool uses_store, bool bindless);
 354 LLVMValueRef si_nir_emit_fbfetch(struct ac_shader_abi *abi);
 355
 356 void si_load_system_value(struct si_shader_context *ctx,
 357                           unsigned index,
 358                           const struct tgsi_full_declaration *decl);
 359 void si_declare_compute_memory(struct si_shader_context *ctx);
 360 void si_tgsi_declare_compute_memory(struct si_shader_context *ctx,
 361                                     const struct tgsi_full_declaration *decl);
 362
 363 LLVMValueRef si_get_primitive_id(struct si_shader_context *ctx,
 364                                  unsigned swizzle);
 365 void si_llvm_export_vs(struct si_shader_context *ctx,
 366                        struct si_shader_output_values *outputs,
 367                        unsigned noutput);
 368 void si_emit_streamout_output(struct si_shader_context *ctx,
 369                               LLVMValueRef const *so_buffers,
 370                               LLVMValueRef const *so_write_offsets,
 371                               struct pipe_stream_output *stream_out,
 372                               struct si_shader_output_values *shader_out);
 373
 374 void si_llvm_load_input_vs(
 375         struct si_shader_context *ctx,
 376         unsigned input_index,
 377         LLVMValueRef out[4]);
 378 void si_llvm_load_input_fs(
 379         struct si_shader_context *ctx,
 380         unsigned input_index,
 381         LLVMValueRef out[4]);
 382
 383 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
 384
 385 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
 386                              unsigned param, unsigned rshift,
 387                              unsigned bitwidth);
 388
 389 void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
 390                              unsigned max_outputs,
 391                              LLVMValueRef *addrs);
 392 void gfx10_ngg_gs_emit_vertex(struct si_shader_context *ctx,
 393                               unsigned stream,
 394                               LLVMValueRef *addrs);
 395 void gfx10_ngg_gs_emit_prologue(struct si_shader_context *ctx);
 396 void gfx10_ngg_gs_emit_epilogue(struct si_shader_context *ctx);
 397 void gfx10_ngg_calculate_subgroup_info(struct si_shader *shader);
 398
 399 #endif